include/configs/taurus.h

   1 /*
   2  * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
   3  * (C) Copyright 2013 Siemens AG
   4  *
   5  * Based on:
   6  * U-Boot file: include/configs/at91sam9260ek.h
   7  *
   8  * (C) Copyright 2007-2008
   9  * Stelian Pop <stelian@popies.net>
  10  * Lead Tech Design <www.leadtechdesign.com>
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #ifndef __CONFIG_H
  16 #define __CONFIG_H
  17
  18 /*
  19  * SoC must be defined first, before hardware.h is included.
  20  * In this case SoC is defined in boards.cfg.
  21  */
  22 #include <asm/hardware.h>
  23 #include <linux/sizes.h>
  24
  25 #if defined(CONFIG_SPL_BUILD)
  26 #define CONFIG_SYS_ICACHE_OFF
  27 #define CONFIG_SYS_DCACHE_OFF
  28 #endif
  29 /*
  30  * Warning: changing CONFIG_SYS_TEXT_BASE requires
  31  * adapting the initial boot program.
  32  * Since the linker has to swallow that define, we must use a pure
  33  * hex number here!
  34  */
  35
  36 #define CONFIG_SYS_TEXT_BASE            0x21000000
  37
  38 /* ARM asynchronous clock */
  39 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  40 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* main clock xtal */
  41
  42 /* Misc CPU related */
  43 #define CONFIG_ARCH_CPU_INIT
  44 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  45 #define CONFIG_SETUP_MEMORY_TAGS
  46 #define CONFIG_INITRD_TAG
  47 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  48
  49 /* general purpose I/O */
  50 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  51 #define CONFIG_AT91_GPIO
  52 #define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  53
  54 /* serial console */
  55 #define CONFIG_ATMEL_USART
  56 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  57 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  58
  59
  60 /*
  61  * SDRAM: 1 bank, min 32, max 128 MB
  62  * Initialized before u-boot gets started.
  63  */
  64 #define CONFIG_NR_DRAM_BANKS            1
  65 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  66 #define CONFIG_SYS_SDRAM_SIZE           (128 * SZ_1M)
  67
  68 /*
  69  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  70  * leaving the correct space for initial global data structure above
  71  * that address while providing maximum stack area below.
  72  */
  73 #define CONFIG_SYS_INIT_SP_ADDR \
  74         (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  75
  76 /* NAND flash */
  77 #ifdef CONFIG_CMD_NAND
  78 #define CONFIG_NAND_ATMEL
  79 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  80 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  81 #define CONFIG_SYS_NAND_DBW_8
  82 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  83 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  84 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  85 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  86 #endif
  87
  88 /* Ethernet */
  89 #define CONFIG_MACB
  90 #define CONFIG_RMII
  91 #define CONFIG_AT91_WANTS_COMMON_PHY
  92
  93 #define CONFIG_AT91SAM9_WATCHDOG
  94 #define CONFIG_AT91_HW_WDT_TIMEOUT      15
  95 #if !defined(CONFIG_SPL_BUILD)
  96 /* Enable the watchdog */
  97 #define CONFIG_HW_WATCHDOG
  98 #endif
  99
 100 /* USB */
 101 #if defined(CONFIG_BOARD_TAURUS)
 102 #define CONFIG_USB_ATMEL
 103 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 104 #define CONFIG_USB_OHCI_NEW
 105 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 106 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000
 107 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9260"
 108 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 109
 110 /* USB DFU support */
 111 #define CONFIG_MTD_DEVICE
 112 #define CONFIG_MTD_PARTITIONS
 113
 114 #define CONFIG_USB_GADGET_AT91
 115
 116 /* DFU class support */
 117 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    (SZ_1M)
 118 #define DFU_MANIFEST_POLL_TIMEOUT       25000
 119 #endif
 120
 121 /* SPI EEPROM */
 122 #define CONFIG_SPI
 123 #define CONFIG_ATMEL_SPI
 124 #define TAURUS_SPI_MASK (1 << 4)
 125 #define TAURUS_SPI_CS_PIN       AT91_PIN_PA3
 126
 127 #if defined(CONFIG_SPL_BUILD)
 128 /* SPL related */
 129 #define CONFIG_SPL_SPI_LOAD
 130 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x20000
 131
 132 #define CONFIG_SF_DEFAULT_BUS 0
 133 #define CONFIG_SF_DEFAULT_SPEED 1000000
 134 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
 135 #endif
 136
 137 /* load address */
 138 #define CONFIG_SYS_LOAD_ADDR                    0x22000000
 139
 140 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
 141 #define CONFIG_ENV_OFFSET               0x100000
 142 #define CONFIG_ENV_OFFSET_REDUND        0x180000
 143 #define CONFIG_ENV_SIZE         (SZ_128K)       /* 1 sector = 128 kB */
 144 #define CONFIG_BOOTCOMMAND      "nand read 0x22000000 0x200000 0x300000; bootm"
 145
 146 #define CONFIG_SYS_LONGHELP
 147 #define CONFIG_CMDLINE_EDITING
 148 #define CONFIG_AUTO_COMPLETE
 149
 150 /*
 151  * Size of malloc() pool
 152  */
 153 #define CONFIG_SYS_MALLOC_LEN \
 154         ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
 155
 156 /* Defines for SPL */
 157 #define CONFIG_SPL_FRAMEWORK
 158 #define CONFIG_SPL_TEXT_BASE            0x0
 159 #define CONFIG_SPL_MAX_SIZE             (31 * SZ_512)
 160 #define CONFIG_SPL_STACK                (ATMEL_BASE_SRAM1 + SZ_16K)
 161 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
 162                                         CONFIG_SYS_MALLOC_LEN)
 163 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 164
 165 #define CONFIG_SPL_BSS_START_ADDR       CONFIG_SPL_MAX_SIZE
 166 #define CONFIG_SPL_BSS_MAX_SIZE         (3 * SZ_512)
 167
 168 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL  (2*32 + 14)
 169 #define CONFIG_SYS_USE_NANDFLASH        1
 170 #define CONFIG_SPL_NAND_DRIVERS
 171 #define CONFIG_SPL_NAND_BASE
 172 #define CONFIG_SPL_NAND_ECC
 173 #define CONFIG_SPL_NAND_RAW_ONLY
 174 #define CONFIG_SPL_NAND_SOFTECC
 175 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 176 #define CONFIG_SYS_NAND_U_BOOT_SIZE     SZ_512K
 177 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 178 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 180
 181 #define CONFIG_SYS_NAND_SIZE            (256 * SZ_1M)
 182 #define CONFIG_SYS_NAND_PAGE_SIZE       SZ_2K
 183 #define CONFIG_SYS_NAND_BLOCK_SIZE      (SZ_128K)
 184 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 185                                          CONFIG_SYS_NAND_PAGE_SIZE)
 186 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 187 #define CONFIG_SYS_NAND_ECCSIZE         256
 188 #define CONFIG_SYS_NAND_ECCBYTES        3
 189 #define CONFIG_SYS_NAND_OOBSIZE         64
 190 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 191                                           48, 49, 50, 51, 52, 53, 54, 55, \
 192                                           56, 57, 58, 59, 60, 61, 62, 63, }
 193
 194 #define CONFIG_SPL_ATMEL_SIZE
 195 #define CONFIG_SYS_MASTER_CLOCK         132096000
 196 #define AT91_PLL_LOCK_TIMEOUT           1000000
 197 #define CONFIG_SYS_AT91_PLLA            0x202A3F01
 198 #define CONFIG_SYS_MCKR                 0x1300
 199 #define CONFIG_SYS_MCKR_CSS             (0x02 | CONFIG_SYS_MCKR)
 200 #define CONFIG_SYS_AT91_PLLB            0x10193F05
 201
 202 #endif