include/configs/tbs2910.h

   1 /*
   2  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
   3  *
   4  * Configuration settings for the TBS2910 MatrixARM board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __TBS2910_CONFIG_H
  10 #define __TBS2910_CONFIG_H
  11
  12 #include "mx6_common.h"
  13
  14 /* General configuration */
  15 #define CONFIG_SYS_THUMB_BUILD
  16
  17 #define CONFIG_MACH_TYPE                3980
  18
  19 #define CONFIG_BOARD_EARLY_INIT_F
  20
  21 #define CONFIG_SYS_PROMPT               "Matrix U-Boot> "
  22 #define CONFIG_SYS_HZ                   1000
  23
  24 #define CONFIG_IMX6_THERMAL
  25
  26 /* Physical Memory Map */
  27 #define CONFIG_NR_DRAM_BANKS            1
  28 #define CONFIG_SYS_SDRAM_BASE           MMDC0_ARB_BASE_ADDR
  29
  30 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  31 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
  32 #define CONFIG_SYS_INIT_SP_OFFSET \
  33         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  34 #define CONFIG_SYS_INIT_SP_ADDR \
  35         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  36
  37 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024 * 1024)
  38
  39 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  40 #define CONFIG_SYS_MEMTEST_END \
  41         (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
  42
  43 #define CONFIG_SYS_BOOTMAPSZ            0x6C000000
  44
  45 /* Serial console */
  46 #define CONFIG_MXC_UART
  47 #define CONFIG_MXC_UART_BASE            UART1_BASE /* select UART1/UART2 */
  48 #define CONFIG_BAUDRATE                 115200
  49
  50 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
  51 #define CONFIG_CONSOLE_MUX
  52 #define CONFIG_CONS_INDEX               1
  53
  54 #define CONFIG_PRE_CONSOLE_BUFFER
  55 #define CONFIG_PRE_CON_BUF_SZ           4096
  56 #define CONFIG_PRE_CON_BUF_ADDR         0x7C000000
  57
  58 /* *** Command definition *** */
  59 #define CONFIG_CMD_BMODE
  60 #define CONFIG_CMD_MEMTEST
  61 #define CONFIG_CMD_TIME
  62
  63 /* Filesystems / image support */
  64 #define CONFIG_EFI_PARTITION
  65 #define CONFIG_FIT
  66
  67 /* MMC */
  68 #define CONFIG_SYS_FSL_USDHC_NUM        3
  69 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
  70 #define CONFIG_SUPPORT_EMMC_BOOT
  71
  72 /* Ethernet */
  73 #define CONFIG_FEC_MXC
  74 #define CONFIG_CMD_PING
  75 #define CONFIG_CMD_DHCP
  76 #define CONFIG_CMD_MII
  77 #define CONFIG_FEC_MXC
  78 #define CONFIG_MII
  79 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  80 #define CONFIG_FEC_XCV_TYPE             RGMII
  81 #define CONFIG_ETHPRIME                 "FEC"
  82 #define CONFIG_FEC_MXC_PHYADDR          4
  83 #define CONFIG_PHYLIB
  84 #define CONFIG_PHY_ATHEROS
  85
  86 /* Framebuffer */
  87 #define CONFIG_VIDEO
  88 #ifdef CONFIG_VIDEO
  89 #define CONFIG_VIDEO_IPUV3
  90 #define CONFIG_IPUV3_CLK                260000000
  91 #define CONFIG_CFB_CONSOLE
  92 #define CONFIG_CFB_CONSOLE_ANSI
  93 #define CONFIG_VIDEO_SW_CURSOR
  94 #define CONFIG_VGA_AS_SINGLE_DEVICE
  95 #define CONFIG_VIDEO_BMP_RLE8
  96 #define CONFIG_IMX_HDMI
  97 #define CONFIG_IMX_VIDEO_SKIP
  98 #define CONFIG_CMD_HDMIDETECT
  99 #endif
 100
 101 /* PCI */
 102 #define CONFIG_CMD_PCI
 103 #ifdef CONFIG_CMD_PCI
 104 #define CONFIG_PCI
 105 #define CONFIG_PCI_PNP
 106 #define CONFIG_PCI_SCAN_SHOW
 107 #define CONFIG_PCIE_IMX
 108 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
 109 #endif
 110
 111 /* SATA */
 112 #define CONFIG_CMD_SATA
 113 #ifdef CONFIG_CMD_SATA
 114 #define CONFIG_DWC_AHSATA
 115 #define CONFIG_SYS_SATA_MAX_DEVICE      1
 116 #define CONFIG_DWC_AHSATA_PORT_ID       0
 117 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
 118 #define CONFIG_LBA48
 119 #define CONFIG_LIBATA
 120 #endif
 121
 122 /* USB */
 123 #define CONFIG_CMD_USB
 124 #ifdef CONFIG_CMD_USB
 125 #define CONFIG_USB_EHCI
 126 #define CONFIG_USB_EHCI_MX6
 127 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 128 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 129 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 130 #define CONFIG_USB_STORAGE
 131 #define CONFIG_CMD_USB_MASS_STORAGE
 132 #ifdef CONFIG_CMD_USB_MASS_STORAGE
 133 #define CONFIG_CI_UDC
 134 #define CONFIG_USBD_HS
 135 #define CONFIG_USB_GADGET
 136 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 137 #define CONFIG_USB_GADGET_DUALSPEED
 138 #define CONFIG_USB_GADGET_VBUS_DRAW     0
 139 #define CONFIG_USB_GADGET_DOWNLOAD
 140 #define CONFIG_G_DNL_VENDOR_NUM         0x0525
 141 #define CONFIG_G_DNL_PRODUCT_NUM        0xa4a5
 142 #define CONFIG_G_DNL_MANUFACTURER       "TBS"
 143 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
 144 #define CONFIG_USB_KEYBOARD
 145 #ifdef CONFIG_USB_KEYBOARD
 146 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 147 #define CONFIG_SYS_STDIO_DEREGISTER
 148 #define CONFIG_PREBOOT \
 149         "if hdmidet; then " \
 150                 "usb start; " \
 151                 "run set_con_usb_hdmi; " \
 152         "else " \
 153                 "run set_con_serial; " \
 154         "fi;"
 155 #endif /* CONFIG_USB_KEYBOARD */
 156 #endif /* CONFIG_CMD_USB      */
 157
 158 /* RTC */
 159 #define CONFIG_CMD_DATE
 160 #ifdef CONFIG_CMD_DATE
 161 #define CONFIG_CMD_I2C
 162 #define CONFIG_RTC_DS1307
 163 #define CONFIG_SYS_RTC_BUS_NUM          2
 164 #endif
 165
 166 /* I2C */
 167 #define CONFIG_CMD_I2C
 168 #ifdef CONFIG_CMD_I2C
 169 #define CONFIG_SYS_I2C
 170 #define CONFIG_SYS_I2C_MXC
 171 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 172 #define CONFIG_SYS_I2C_SPEED            100000
 173 #define CONFIG_I2C_EDID
 174 #endif
 175
 176 /* Fuses */
 177 #define CONFIG_CMD_FUSE
 178 #ifdef CONFIG_CMD_FUSE
 179 #define CONFIG_MXC_OCOTP
 180 #endif
 181
 182 /* Environment organization */
 183 #define CONFIG_ENV_IS_IN_MMC
 184 #define CONFIG_SYS_MMC_ENV_DEV          2
 185 #define CONFIG_SYS_MMC_ENV_PART         1
 186 #define CONFIG_ENV_SIZE                 (8 * 1024)
 187 #define CONFIG_ENV_OFFSET               (384 * 1024)
 188 #define CONFIG_ENV_OVERWRITE
 189
 190 #define CONFIG_EXTRA_ENV_SETTINGS \
 191         "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
 192         "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
 193                         "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
 194         "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
 195         "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
 196                         "${bootargs_mmc3}\0" \
 197         "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
 198                         "rdinit=/sbin/init enable_wait_mode=off\0" \
 199         "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
 200                         "mmc read 0x10800000 0x800 0x4000; bootm\0" \
 201         "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
 202         "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
 203                         "run bootargs_upd; " \
 204                         "bootm 0x10800000 0x10d00000\0" \
 205         "console=ttymxc0\0" \
 206         "fan=gpio set 92\0" \
 207         "set_con_serial=setenv stdin serial; " \
 208                         "setenv stdout serial; " \
 209                         "setenv stderr serial;\0" \
 210         "set_con_usb_hdmi=setenv stdin serial,usbkbd; " \
 211                         "setenv stdout serial,vga; " \
 212                         "setenv stderr serial,vga;\0"
 213
 214 #define CONFIG_BOOTCOMMAND \
 215         "mmc rescan; " \
 216         "if run bootcmd_up1; then " \
 217                 "run bootcmd_up2; " \
 218         "else " \
 219                 "run bootcmd_mmc; " \
 220         "fi"
 221
 222 #endif                         /* __TBS2910_CONFIG_H * */