include/configs/woodburn_common.h

   1 /*
   2  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
   3  *
   4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
   5  *
   6  * Configuration for the woodburn board.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #ifndef __WOODBURN_COMMON_CONFIG_H
  12 #define __WOODBURN_COMMON_CONFIG_H
  13
  14 #include <asm/arch/imx-regs.h>
  15
  16  /* High Level Configuration Options */
  17 #define CONFIG_MX35
  18 #define CONFIG_MX35_HCLK_FREQ   24000000
  19 #define CONFIG_SYS_FSL_CLK
  20
  21 #define CONFIG_SYS_DCACHE_OFF
  22
  23 #define CONFIG_MACH_TYPE                MACH_TYPE_FLEA3
  24
  25 /* This is required to setup the ESDC controller */
  26
  27 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  28 #define CONFIG_REVISION_TAG
  29 #define CONFIG_SETUP_MEMORY_TAGS
  30 #define CONFIG_INITRD_TAG
  31
  32 /*
  33  * Size of malloc() pool
  34  */
  35 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
  36
  37 /*
  38  * Hardware drivers
  39  */
  40 #define CONFIG_SYS_I2C
  41 #define CONFIG_SYS_I2C_MXC
  42 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  43 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  44 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  45 #define CONFIG_SYS_SPD_BUS_NUM          0
  46 #define CONFIG_MXC_SPI
  47 #define CONFIG_MXC_GPIO
  48
  49 /* PMIC Controller */
  50 #define CONFIG_POWER
  51 #define CONFIG_POWER_I2C
  52 #define CONFIG_POWER_FSL
  53 #define CONFIG_POWER_FSL_MC13892
  54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x8
  55 #define CONFIG_RTC_MC13XXX
  56
  57 /* mmc driver */
  58 #define CONFIG_FSL_ESDHC
  59 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  60 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  61
  62 /*
  63  * UART (console)
  64  */
  65 #define CONFIG_MXC_UART
  66 #define CONFIG_MXC_UART_BASE    UART1_BASE
  67
  68 /* allow to overwrite serial and ethaddr */
  69 #define CONFIG_ENV_OVERWRITE
  70 #define CONFIG_CONS_INDEX       1
  71
  72 /*
  73  * Command definition
  74  */
  75 #define CONFIG_BOOTP_SUBNETMASK
  76 #define CONFIG_BOOTP_GATEWAY
  77 #define CONFIG_BOOTP_DNS
  78
  79 #define CONFIG_MXC_GPIO
  80
  81 #define CONFIG_NET_RETRY_COUNT  100
  82
  83
  84 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
  85
  86 /*
  87  * Ethernet on SOC (FEC)
  88  */
  89 #define CONFIG_FEC_MXC
  90 #define IMX_FEC_BASE    FEC_BASE_ADDR
  91 #define CONFIG_FEC_MXC_PHYADDR  0x1
  92
  93 #define CONFIG_MII
  94 #define CONFIG_DISCOVER_PHY
  95
  96 #define CONFIG_ARP_TIMEOUT      200UL
  97
  98 /*
  99  * Miscellaneous configurable options
 100  */
 101 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
 102 #define CONFIG_CMDLINE_EDITING
 103
 104 #define CONFIG_AUTO_COMPLETE
 105 /* Print Buffer Size */
 106 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 107 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 108 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 109
 110 #define CONFIG_SYS_MEMTEST_START        0       /* memtest works on */
 111 #define CONFIG_SYS_MEMTEST_END          0x10000
 112
 113 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 114
 115 /*
 116  * Physical Memory Map
 117  */
 118 #define CONFIG_NR_DRAM_BANKS    1
 119 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
 120 #define PHYS_SDRAM_1_SIZE       (256 * 1024 * 1024)
 121
 122 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
 123
 124 #define CONFIG_SYS_GBL_DATA_OFFSET      (LOW_LEVEL_SRAM_STACK - \
 125                                                 IRAM_BASE_ADDR - \
 126                                                 GENERATED_GBL_DATA_SIZE)
 127 #define CONFIG_SYS_INIT_SP_ADDR         (IRAM_BASE_ADDR + \
 128                                         CONFIG_SYS_GBL_DATA_OFFSET)
 129
 130 /*
 131  * MTD Command for mtdparts
 132  */
 133 #define CONFIG_MTD_DEVICE
 134 #define CONFIG_FLASH_CFI_MTD
 135 #define CONFIG_MTD_PARTITIONS
 136 #define MTDIDS_DEFAULT          "nand0=mxc_nand,nor0=physmap-flash.0"
 137 #define MTDPARTS_DEFAULT        "mtdparts=mxc_nand:50m(root1)," \
 138                                 "32m(rootfb)," \
 139                                 "64m(pcache)," \
 140                                 "64m(app1)," \
 141                                 "10m(app2),-(spool);" \
 142                                 "physmap-flash.0:512k(u-boot),64k(env1)," \
 143                                 "64k(env2),3776k(kernel1),3776k(kernel2)"
 144
 145 /*
 146  * FLASH and environment organization
 147  */
 148 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
 149 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
 150 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
 151 /* Monitor at beginning of flash */
 152 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 153 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
 154
 155 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
 156 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 157
 158 /* Address and size of Redundant Environment Sector     */
 159 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 160 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 161
 162 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + \
 163                                 CONFIG_SYS_MONITOR_LEN)
 164
 165 /*
 166  * CFI FLASH driver setup
 167  */
 168 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
 169 #define CONFIG_FLASH_CFI_DRIVER
 170
 171 /* A non-standard buffered write algorithm */
 172 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* faster */
 173 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
 174
 175 /*
 176  * NAND FLASH driver setup
 177  */
 178 #define CONFIG_NAND_MXC
 179 #define CONFIG_NAND_MXC_V1_1
 180 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
 181 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 182 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
 183 #define CONFIG_MXC_NAND_HWECC
 184 #define CONFIG_SYS_NAND_LARGEPAGE
 185
 186 #if 0
 187 #define CONFIG_MTD_DEBUG
 188 #define CONFIG_MTD_DEBUG_VERBOSE        7
 189 #endif
 190 #define CONFIG_SYS_NAND_ONFI_DETECTION
 191
 192 /*
 193  * Default environment and default scripts
 194  * to update uboot and load kernel
 195  */
 196
 197 #define CONFIG_HOSTNAME woodburn
 198 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 199         "netdev=eth0\0"                                                 \
 200         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 201                 "nfsroot=${serverip}:${rootpath}\0"                     \
 202         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 203         "addip_sta=setenv bootargs ${bootargs} "                        \
 204                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 205                 ":${hostname}:${netdev}:off panic=1\0"                  \
 206         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 207         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 208                 "else run addip_sta;fi\0"       \
 209         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 210         "addtty=setenv bootargs ${bootargs}"                            \
 211                 " console=ttymxc0,${baudrate}\0"                        \
 212         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 213         "loadaddr=80800000\0"                                           \
 214         "kernel_addr_r=80800000\0"                                      \
 215         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 216         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 217         "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"      \
 218         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 219                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 220         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 221                 "bootm ${kernel_addr}\0"                                \
 222         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 223                 "run nfsargs addip addtty addmtd addmisc;"              \
 224                 "bootm ${kernel_addr_r}\0"                              \
 225         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
 226                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
 227         "net_self=if run net_self_load;then "                           \
 228                 "run ramargs addip addtty addmtd addmisc;"              \
 229                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 230                 "else echo Images not loades;fi\0"                      \
 231         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"          \
 232         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 233         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
 234         "update=protect off ${uboot_addr} +80000;"                      \
 235                 "erase ${uboot_addr} +80000;"                           \
 236                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
 237         "upd=if run load;then echo Updating u-boot;if run update;"      \
 238                 "then echo U-Boot updated;"                             \
 239                         "else echo Error updating u-boot !;"            \
 240                         "echo Board without bootloader !!;"             \
 241                 "fi;"                                                   \
 242                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 243         "bootcmd=run net_nfs\0"
 244
 245 #endif                          /* __CONFIG_H */