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1 /*
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 Xilinx, Inc.
4 *
5 * Common configuration options for all Zynq boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
16 #endif
17
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE 0xf8f02000
23 #endif
24
25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
29
30 /* Serial drivers */
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE \
33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
34
35 #define CONFIG_ARM_DCC
36
37 /* Ethernet driver */
38 #if defined(CONFIG_ZYNQ_GEM)
39 # define CONFIG_MII
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_PHY_MARVELL
42 # define CONFIG_PHY_REALTEK
43 # define CONFIG_PHY_XILINX
44 # define CONFIG_BOOTP_BOOTPATH
45 # define CONFIG_BOOTP_GATEWAY
46 # define CONFIG_BOOTP_HOSTNAME
47 # define CONFIG_BOOTP_MAY_FAIL
48 #endif
49
50 /* SPI */
51 #ifdef CONFIG_ZYNQ_SPI
52 #endif
53
54 /* QSPI */
55 #ifdef CONFIG_ZYNQ_QSPI
56 # define CONFIG_SF_DEFAULT_SPEED 30000000
57 # define CONFIG_SPI_FLASH_ISSI
58 #endif
59
60 /* NOR */
61 #ifdef CONFIG_MTD_NOR_FLASH
62 # define CONFIG_SYS_FLASH_BASE 0xE2000000
63 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
64 # define CONFIG_SYS_MAX_FLASH_BANKS 1
65 # define CONFIG_SYS_MAX_FLASH_SECT 512
66 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
67 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
68 # define CONFIG_FLASH_SHOW_PROGRESS 10
69 # define CONFIG_SYS_FLASH_CFI
70 # undef CONFIG_SYS_FLASH_EMPTY_INFO
71 # define CONFIG_FLASH_CFI_DRIVER
72 # undef CONFIG_SYS_FLASH_PROTECTION
73 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
74 #endif
75
76 #ifdef CONFIG_NAND_ZYNQ
77 #define CONFIG_SYS_MAX_NAND_DEVICE 1
78 #define CONFIG_SYS_NAND_ONFI_DETECTION
79 #define CONFIG_MTD_DEVICE
80 #endif
81
82 /* MMC */
83 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
84 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
85 #endif
86
87 #ifdef CONFIG_USB_EHCI_ZYNQ
88 # define CONFIG_EHCI_IS_TDI
89
90 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
91 # define DFU_DEFAULT_POLL_TIMEOUT 300
92 # define CONFIG_USB_CABLE_CHECK
93 # define CONFIG_THOR_RESET_OFF
94 # define CONFIG_USB_FUNCTION_THOR
95 # define DFU_ALT_INFO_RAM \
96 "dfu_ram_info=" \
97 "set dfu_alt_info " \
98 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
99 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
100 "${ramdisk_image} ram 0x2000000 0x600000\0" \
101 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
102 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
103
104 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
105 # define DFU_ALT_INFO_MMC \
106 "dfu_mmc_info=" \
107 "set dfu_alt_info " \
108 "${kernel_image} fat 0 1\\\\;" \
109 "${devicetree_image} fat 0 1\\\\;" \
110 "${ramdisk_image} fat 0 1\0" \
111 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
112 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
113
114 # define DFU_ALT_INFO \
115 DFU_ALT_INFO_RAM \
116 DFU_ALT_INFO_MMC
117 # else
118 # define DFU_ALT_INFO \
119 DFU_ALT_INFO_RAM
120 # endif
121 #endif
122
123 #if !defined(DFU_ALT_INFO)
124 # define DFU_ALT_INFO
125 #endif
126
127 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
128 #define CONFIG_SYS_I2C_ZYNQ
129 #endif
130
131 /* I2C */
132 #if defined(CONFIG_SYS_I2C_ZYNQ)
133 # define CONFIG_SYS_I2C
134 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
135 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
136 #endif
137
138 /* EEPROM */
139 #ifdef CONFIG_ZYNQ_EEPROM
140 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
141 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
142 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
143 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
144 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
145 #endif
146
147 /* Total Size of Environment Sector */
148 #define CONFIG_ENV_SIZE (128 << 10)
149
150 /* Allow to overwrite serial and ethaddr */
151 #define CONFIG_ENV_OVERWRITE
152
153 /* Environment */
154 #ifndef CONFIG_ENV_IS_NOWHERE
155 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
156 # define CONFIG_ENV_OFFSET 0xE0000
157 #endif
158
159 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
160 #define CONFIG_PREBOOT
161
162 /* Boot configuration */
163 #define CONFIG_BOOTCOMMAND "run $modeboot || run distro_bootcmd"
164 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
165
166 /* Distro boot enablement */
167
168 #ifdef CONFIG_SPL_BUILD
169 #define BOOTENV
170 #else
171 #include <config_distro_defaults.h>
172
173 #ifdef CONFIG_CMD_MMC
174 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
175 #else
176 #define BOOT_TARGET_DEVICES_MMC(func)
177 #endif
178
179 #ifdef CONFIG_CMD_USB
180 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
181 #else
182 #define BOOT_TARGET_DEVICES_USB(func)
183 #endif
184
185 #if defined(CONFIG_CMD_PXE)
186 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
187 #else
188 #define BOOT_TARGET_DEVICES_PXE(func)
189 #endif
190
191 #if defined(CONFIG_CMD_DHCP)
192 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
193 #else
194 #define BOOT_TARGET_DEVICES_DHCP(func)
195 #endif
196
197 #define BOOT_TARGET_DEVICES(func) \
198 BOOT_TARGET_DEVICES_MMC(func) \
199 BOOT_TARGET_DEVICES_USB(func) \
200 BOOT_TARGET_DEVICES_PXE(func) \
201 BOOT_TARGET_DEVICES_DHCP(func)
202
203 #include <config_distro_bootcmd.h>
204 #endif /* CONFIG_SPL_BUILD */
205
206 /* Default environment */
207 #ifndef CONFIG_EXTRA_ENV_SETTINGS
208 #define CONFIG_EXTRA_ENV_SETTINGS \
209 "fit_image=fit.itb\0" \
210 "load_addr=0x2000000\0" \
211 "fit_size=0x800000\0" \
212 "flash_off=0x100000\0" \
213 "nor_flash_off=0xE2100000\0" \
214 "fdt_high=0x20000000\0" \
215 "initrd_high=0x20000000\0" \
216 "loadbootenv_addr=0x2000000\0" \
217 "fdt_addr_r=0x1f00000\0" \
218 "pxefile_addr_r=0x2000000\0" \
219 "kernel_addr_r=0x2000000\0" \
220 "scriptaddr=0x3000000\0" \
221 "ramdisk_addr_r=0x3100000\0" \
222 "bootenv=uEnv.txt\0" \
223 "bootenv_dev=mmc\0" \
224 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
225 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
226 "env import -t ${loadbootenv_addr} $filesize\0" \
227 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
228 "setbootenv=if env run bootenv_existence_test; then " \
229 "if env run loadbootenv; then " \
230 "env run importbootenv; " \
231 "fi; " \
232 "fi; \0" \
233 "sd_loadbootenv=set bootenv_dev mmc && " \
234 "run setbootenv \0" \
235 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
236 "preboot=if test $modeboot = sdboot; then " \
237 "run sd_loadbootenv; " \
238 "echo Checking if uenvcmd is set ...; " \
239 "if test -n $uenvcmd; then " \
240 "echo Running uenvcmd ...; " \
241 "run uenvcmd; " \
242 "fi; " \
243 "fi; \0" \
244 "norboot=echo Copying FIT from NOR flash to RAM... && " \
245 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
246 "bootm ${load_addr}\0" \
247 "sdboot=echo Copying FIT from SD to RAM... && " \
248 "load mmc 0 ${load_addr} ${fit_image} && " \
249 "bootm ${load_addr}\0" \
250 "jtagboot=echo TFTPing FIT to RAM... && " \
251 "tftpboot ${load_addr} ${fit_image} && " \
252 "bootm ${load_addr}\0" \
253 "usbboot=if usb start; then " \
254 "echo Copying FIT from USB to RAM... && " \
255 "load usb 0 ${load_addr} ${fit_image} && " \
256 "bootm ${load_addr}; fi\0" \
257 DFU_ALT_INFO \
258 BOOTENV
259 #endif
260
261 /* Miscellaneous configurable options */
262
263 #define CONFIG_CMDLINE_EDITING
264 #define CONFIG_AUTO_COMPLETE
265 #define CONFIG_SYS_LONGHELP
266 #define CONFIG_CLOCKS
267 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
268
269 #ifndef CONFIG_NR_DRAM_BANKS
270 # define CONFIG_NR_DRAM_BANKS 1
271 #endif
272
273 #define CONFIG_SYS_MEMTEST_START 0
274 #define CONFIG_SYS_MEMTEST_END 0x1000
275
276 #define CONFIG_SYS_MALLOC_LEN 0x1400000
277
278 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
279 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
280 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
281 CONFIG_SYS_INIT_RAM_SIZE - \
282 GENERATED_GBL_DATA_SIZE)
283
284 /* Enable the PL to be downloaded */
285 #define CONFIG_FPGA_ZYNQPL
286
287 /* FIT support */
288 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
289
290 /* Extend size of kernel image for uncompression */
291 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
292
293 /* Boot FreeBSD/vxWorks from an ELF image */
294 #define CONFIG_SYS_MMC_MAX_DEVICE 1
295
296 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
297
298 /* Commands */
299
300 /* SPL part */
301 #define CONFIG_SPL_FRAMEWORK
302
303 /* MMC support */
304 #ifdef CONFIG_MMC_SDHCI_ZYNQ
305 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
306 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
307 #endif
308
309 /* Disable dcache for SPL just for sure */
310 #ifdef CONFIG_SPL_BUILD
311 #define CONFIG_SYS_DCACHE_OFF
312 #endif
313
314 /* Address in RAM where the parameters must be copied by SPL. */
315 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
316
317 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
318 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
319
320 /* Not using MMC raw mode - just for compilation purpose */
321 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
322 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
323 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
324
325 /* qspi mode is working fine */
326 #ifdef CONFIG_ZYNQ_QSPI
327 #define CONFIG_SPL_SPI_LOAD
328 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
329 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
330 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
331 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
332 CONFIG_SYS_SPI_ARGS_SIZE)
333 #endif
334
335 /* for booting directly linux */
336
337 /* SP location before relocation, must use scratch RAM */
338 #define CONFIG_SPL_TEXT_BASE 0x0
339
340 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
341 #define CONFIG_SPL_MAX_SIZE 0x30000
342
343 /* On the top of OCM space */
344 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
345 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
346
347 /*
348 * SPL stack position - and stack goes down
349 * 0xfffffe00 is used for putting wfi loop.
350 * Set it up as limit for now.
351 */
352 #define CONFIG_SPL_STACK 0xfffffe00
353
354 /* BSS setup */
355 #define CONFIG_SPL_BSS_START_ADDR 0x100000
356 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
357
358 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
359
360 #endif /* __CONFIG_ZYNQ_COMMON_H */