include/configs/zynq-common.h

   1 /*
   2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
   3  * (C) Copyright 2013 Xilinx, Inc.
   4  *
   5  * Common configuration options for all Zynq boards.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_ZYNQ_COMMON_H
  11 #define __CONFIG_ZYNQ_COMMON_H
  12
  13 /* CPU clock */
  14 #ifndef CONFIG_CPU_FREQ_HZ
  15 # define CONFIG_CPU_FREQ_HZ     800000000
  16 #endif
  17
  18 /* Cache options */
  19 #define CONFIG_SYS_L2CACHE_OFF
  20 #ifndef CONFIG_SYS_L2CACHE_OFF
  21 # define CONFIG_SYS_L2_PL310
  22 # define CONFIG_SYS_PL310_BASE          0xf8f02000
  23 #endif
  24
  25 #define ZYNQ_SCUTIMER_BASEADDR          0xF8F00600
  26 #define CONFIG_SYS_TIMERBASE            ZYNQ_SCUTIMER_BASEADDR
  27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
  28 #define CONFIG_SYS_TIMER_COUNTER        (CONFIG_SYS_TIMERBASE + 0x4)
  29
  30 /* Serial drivers */
  31 #define CONFIG_BAUDRATE         115200
  32 /* The following table includes the supported baudrates */
  33 #define CONFIG_SYS_BAUDRATE_TABLE  \
  34         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  35
  36 #define CONFIG_ARM_DCC
  37 #define CONFIG_ZYNQ_SERIAL
  38
  39 /* Ethernet driver */
  40 #if defined(CONFIG_ZYNQ_GEM)
  41 # define CONFIG_MII
  42 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  43 # define CONFIG_PHY_MARVELL
  44 # define CONFIG_PHY_REALTEK
  45 # define CONFIG_PHY_XILINX
  46 # define CONFIG_BOOTP_BOOTPATH
  47 # define CONFIG_BOOTP_GATEWAY
  48 # define CONFIG_BOOTP_HOSTNAME
  49 # define CONFIG_BOOTP_MAY_FAIL
  50 #endif
  51
  52 /* SPI */
  53 #ifdef CONFIG_ZYNQ_SPI
  54 #endif
  55
  56 /* QSPI */
  57 #ifdef CONFIG_ZYNQ_QSPI
  58 # define CONFIG_SF_DEFAULT_SPEED        30000000
  59 # define CONFIG_SPI_FLASH_ISSI
  60 #endif
  61
  62 /* NOR */
  63 #ifndef CONFIG_SYS_NO_FLASH
  64 # define CONFIG_SYS_FLASH_BASE          0xE2000000
  65 # define CONFIG_SYS_FLASH_SIZE          (16 * 1024 * 1024)
  66 # define CONFIG_SYS_MAX_FLASH_BANKS     1
  67 # define CONFIG_SYS_MAX_FLASH_SECT      512
  68 # define CONFIG_SYS_FLASH_ERASE_TOUT    1000
  69 # define CONFIG_SYS_FLASH_WRITE_TOUT    5000
  70 # define CONFIG_FLASH_SHOW_PROGRESS     10
  71 # define CONFIG_SYS_FLASH_CFI
  72 # undef CONFIG_SYS_FLASH_EMPTY_INFO
  73 # define CONFIG_FLASH_CFI_DRIVER
  74 # undef CONFIG_SYS_FLASH_PROTECTION
  75 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  76 #endif
  77
  78 #ifdef CONFIG_NAND_ZYNQ
  79 #define CONFIG_CMD_NAND_LOCK_UNLOCK
  80 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  81 #define CONFIG_SYS_NAND_ONFI_DETECTION
  82 #define CONFIG_MTD_DEVICE
  83 #endif
  84
  85 /* MMC */
  86 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
  87 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ     52000000
  88 #endif
  89
  90 #ifdef CONFIG_USB_EHCI_ZYNQ
  91 # define CONFIG_EHCI_IS_TDI
  92
  93 # define CONFIG_SYS_DFU_DATA_BUF_SIZE   0x600000
  94 # define DFU_DEFAULT_POLL_TIMEOUT       300
  95 # define CONFIG_USB_CABLE_CHECK
  96 # define CONFIG_CMD_THOR_DOWNLOAD
  97 # define CONFIG_THOR_RESET_OFF
  98 # define CONFIG_USB_FUNCTION_THOR
  99 # define DFU_ALT_INFO_RAM \
 100         "dfu_ram_info=" \
 101         "set dfu_alt_info " \
 102         "${kernel_image} ram 0x3000000 0x500000\\\\;" \
 103         "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
 104         "${ramdisk_image} ram 0x2000000 0x600000\0" \
 105         "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
 106         "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
 107
 108 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
 109 #  define DFU_ALT_INFO_MMC \
 110         "dfu_mmc_info=" \
 111         "set dfu_alt_info " \
 112         "${kernel_image} fat 0 1\\\\;" \
 113         "${devicetree_image} fat 0 1\\\\;" \
 114         "${ramdisk_image} fat 0 1\0" \
 115         "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
 116         "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
 117
 118 #  define DFU_ALT_INFO  \
 119         DFU_ALT_INFO_RAM \
 120         DFU_ALT_INFO_MMC
 121 # else
 122 #  define DFU_ALT_INFO  \
 123         DFU_ALT_INFO_RAM
 124 # endif
 125 #endif
 126
 127 #if !defined(DFU_ALT_INFO)
 128 # define DFU_ALT_INFO
 129 #endif
 130
 131 #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB)
 132 # define CONFIG_SUPPORT_VFAT
 133 # define CONFIG_FAT_WRITE
 134 #endif
 135
 136 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
 137 #define CONFIG_SYS_I2C_ZYNQ
 138 #endif
 139
 140 /* I2C */
 141 #if defined(CONFIG_SYS_I2C_ZYNQ)
 142 # define CONFIG_SYS_I2C
 143 # define CONFIG_SYS_I2C_ZYNQ_SPEED              100000
 144 # define CONFIG_SYS_I2C_ZYNQ_SLAVE              0
 145 #endif
 146
 147 /* EEPROM */
 148 #ifdef CONFIG_ZYNQ_EEPROM
 149 # define CONFIG_CMD_EEPROM
 150 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
 151 # define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
 152 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      4
 153 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 154 # define CONFIG_SYS_EEPROM_SIZE                 1024 /* Bytes */
 155 #endif
 156
 157 /* Total Size of Environment Sector */
 158 #define CONFIG_ENV_SIZE                 (128 << 10)
 159
 160 /* Allow to overwrite serial and ethaddr */
 161 #define CONFIG_ENV_OVERWRITE
 162
 163 /* Environment */
 164 #ifndef CONFIG_ENV_IS_NOWHERE
 165 # ifndef CONFIG_SYS_NO_FLASH
 166 /* Environment in NOR flash */
 167 #  define CONFIG_ENV_IS_IN_FLASH
 168 # elif defined(CONFIG_ZYNQ_QSPI)
 169 /* Environment in Serial Flash */
 170 #  define CONFIG_ENV_IS_IN_SPI_FLASH
 171 # elif defined(CONFIG_SYS_NO_FLASH)
 172 #  define CONFIG_ENV_IS_NOWHERE
 173 # endif
 174
 175 # define CONFIG_ENV_SECT_SIZE           CONFIG_ENV_SIZE
 176 # define CONFIG_ENV_OFFSET              0xE0000
 177 #endif
 178
 179 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
 180 #define CONFIG_PREBOOT
 181
 182 /* Default environment */
 183 #ifndef CONFIG_EXTRA_ENV_SETTINGS
 184 #define CONFIG_EXTRA_ENV_SETTINGS       \
 185         "fit_image=fit.itb\0"           \
 186         "load_addr=0x2000000\0"         \
 187         "fit_size=0x800000\0"           \
 188         "flash_off=0x100000\0"          \
 189         "nor_flash_off=0xE2100000\0"    \
 190         "fdt_high=0x20000000\0"         \
 191         "initrd_high=0x20000000\0"      \
 192         "loadbootenv_addr=0x2000000\0" \
 193         "bootenv=uEnv.txt\0" \
 194         "bootenv_dev=mmc\0" \
 195         "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
 196         "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
 197                 "env import -t ${loadbootenv_addr} $filesize\0" \
 198         "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
 199         "setbootenv=if env run bootenv_existence_test; then " \
 200                         "if env run loadbootenv; then " \
 201                                 "env run importbootenv; " \
 202                         "fi; " \
 203                 "fi; \0" \
 204         "sd_loadbootenv=set bootenv_dev mmc && " \
 205                         "run setbootenv \0" \
 206         "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
 207         "preboot=if test $modeboot = sdboot; then " \
 208                         "run sd_loadbootenv; " \
 209                         "echo Checking if uenvcmd is set ...; " \
 210                         "if test -n $uenvcmd; then " \
 211                                 "echo Running uenvcmd ...; " \
 212                                 "run uenvcmd; " \
 213                         "fi; " \
 214                 "fi; \0" \
 215         "norboot=echo Copying FIT from NOR flash to RAM... && " \
 216                 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
 217                 "bootm ${load_addr}\0" \
 218         "sdboot=echo Copying FIT from SD to RAM... && " \
 219                 "load mmc 0 ${load_addr} ${fit_image} && " \
 220                 "bootm ${load_addr}\0" \
 221         "jtagboot=echo TFTPing FIT to RAM... && " \
 222                 "tftpboot ${load_addr} ${fit_image} && " \
 223                 "bootm ${load_addr}\0" \
 224         "usbboot=if usb start; then " \
 225                         "echo Copying FIT from USB to RAM... && " \
 226                         "load usb 0 ${load_addr} ${fit_image} && " \
 227                         "bootm ${load_addr}; fi\0" \
 228                 DFU_ALT_INFO
 229 #endif
 230
 231 #define CONFIG_BOOTCOMMAND              "run $modeboot"
 232 #define CONFIG_SYS_LOAD_ADDR            0 /* default? */
 233
 234 /* Miscellaneous configurable options */
 235
 236 #define CONFIG_CMDLINE_EDITING
 237 #define CONFIG_AUTO_COMPLETE
 238 #define CONFIG_SYS_LONGHELP
 239 #define CONFIG_CLOCKS
 240 #define CONFIG_CMD_CLK
 241 #define CONFIG_SYS_MAXARGS              32 /* max number of command args */
 242 #define CONFIG_SYS_CBSIZE               256 /* Console I/O Buffer Size */
 243 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 244                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 245
 246 #ifndef CONFIG_NR_DRAM_BANKS
 247 # define CONFIG_NR_DRAM_BANKS           1
 248 #endif
 249
 250 #define CONFIG_SYS_MEMTEST_START        0
 251 #define CONFIG_SYS_MEMTEST_END          0x1000
 252
 253 #define CONFIG_SYS_MALLOC_LEN           0x1400000
 254
 255 #define CONFIG_SYS_INIT_RAM_ADDR        0xFFFF0000
 256 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 257 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 258                                         CONFIG_SYS_INIT_RAM_SIZE - \
 259                                         GENERATED_GBL_DATA_SIZE)
 260
 261 /* Enable the PL to be downloaded */
 262 #define CONFIG_FPGA
 263 #define CONFIG_FPGA_XILINX
 264 #define CONFIG_FPGA_ZYNQPL
 265 #define CONFIG_CMD_FPGA_LOADMK
 266 #define CONFIG_CMD_FPGA_LOADP
 267 #define CONFIG_CMD_FPGA_LOADBP
 268 #define CONFIG_CMD_FPGA_LOADFS
 269
 270 /* FIT support */
 271 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
 272
 273 /* FDT support */
 274 #define CONFIG_DISPLAY_BOARDINFO_LATE
 275
 276 /* Extend size of kernel image for uncompression */
 277 #define CONFIG_SYS_BOOTM_LEN    (60 * 1024 * 1024)
 278
 279 /* Boot FreeBSD/vxWorks from an ELF image */
 280 #define CONFIG_SYS_MMC_MAX_DEVICE       1
 281
 282 #define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"
 283
 284 /* Commands */
 285
 286 /* SPL part */
 287 #define CONFIG_CMD_SPL
 288 #define CONFIG_SPL_FRAMEWORK
 289 #define CONFIG_SPL_BOARD_INIT
 290
 291 #define CONFIG_SPL_LDSCRIPT     "arch/arm/mach-zynq/u-boot-spl.lds"
 292
 293 /* MMC support */
 294 #ifdef CONFIG_MMC_SDHCI_ZYNQ
 295 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 296 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
 297 #endif
 298
 299 /* Disable dcache for SPL just for sure */
 300 #ifdef CONFIG_SPL_BUILD
 301 #define CONFIG_SYS_DCACHE_OFF
 302 #undef CONFIG_FPGA
 303 #endif
 304
 305 /* Address in RAM where the parameters must be copied by SPL. */
 306 #define CONFIG_SYS_SPL_ARGS_ADDR        0x10000000
 307
 308 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "system.dtb"
 309 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 310
 311 /* Not using MMC raw mode - just for compilation purpose */
 312 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0
 313 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0
 314 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
 315
 316 /* qspi mode is working fine */
 317 #ifdef CONFIG_ZYNQ_QSPI
 318 #define CONFIG_SPL_SPI_LOAD
 319 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x100000
 320 #define CONFIG_SYS_SPI_ARGS_OFFS        0x200000
 321 #define CONFIG_SYS_SPI_ARGS_SIZE        0x80000
 322 #define CONFIG_SYS_SPI_KERNEL_OFFS      (CONFIG_SYS_SPI_ARGS_OFFS + \
 323                                         CONFIG_SYS_SPI_ARGS_SIZE)
 324 #endif
 325
 326 /* for booting directly linux */
 327
 328 /* SP location before relocation, must use scratch RAM */
 329 #define CONFIG_SPL_TEXT_BASE    0x0
 330
 331 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
 332 #define CONFIG_SPL_MAX_SIZE     0x30000
 333
 334 /* The highest 64k OCM address */
 335 #define OCM_HIGH_ADDR   0xffff0000
 336
 337 /* On the top of OCM space */
 338 #define CONFIG_SYS_SPL_MALLOC_START     OCM_HIGH_ADDR
 339 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x2000
 340
 341 /*
 342  * SPL stack position - and stack goes down
 343  * 0xfffffe00 is used for putting wfi loop.
 344  * Set it up as limit for now.
 345  */
 346 #define CONFIG_SPL_STACK        0xfffffe00
 347
 348 /* BSS setup */
 349 #define CONFIG_SPL_BSS_START_ADDR       0x100000
 350 #define CONFIG_SPL_BSS_MAX_SIZE         0x100000
 351
 352 #define CONFIG_SYS_UBOOT_START  CONFIG_SYS_TEXT_BASE
 353
 354 #endif /* __CONFIG_ZYNQ_COMMON_H */