LIBS += drivers/serial/libserial.a
LIBS += drivers/usb/libusb.a
LIBS += drivers/video/libvideo.a
-LIBS += post/libpost.a post/drivers/libpostdrivers.a
-LIBS += $(shell if [ -d post/lib_$(ARCH) ]; then echo \
- "post/lib_$(ARCH)/libpost$(ARCH).a"; fi)
-LIBS += $(shell if [ -d post/lib_$(ARCH)/fpu ]; then echo \
- "post/lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
-LIBS += $(shell if [ -d post/cpu/$(CPU) ]; then echo \
- "post/cpu/$(CPU)/libpost$(CPU).a"; fi)
-LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
- "post/board/$(BOARDDIR)/libpost$(BOARD).a"; fi)
LIBS += common/libcommon.a
LIBS += libfdt/libfdt.a
LIBS += api/libapi.a
+LIBS += post/libpost.a
LIBS := $(addprefix $(obj),$(LIBS))
.PHONY : $(LIBS) $(VERSION_FILE)
void hw_watchdog_reset(void)
{
int val;
+#if defined(CONFIG_WD_MAX_RATE)
+ unsigned long long ct = get_ticks();
+
+ /*
+ * Don't allow watch-dog triggering more frequently than
+ * the predefined value CONFIG_WD_MAX_RATE [ticks].
+ */
+ if (ct >= gd->wdt_last) {
+ if ((ct - gd->wdt_last) < CONFIG_WD_MAX_RATE)
+ return;
+ } else {
+ /* Time base counter had been reset */
+ if (((unsigned long long)(-1) - gd->wdt_last + ct) <
+ CONFIG_WD_MAX_RATE)
+ return;
+ }
+ gd->wdt_last = get_ticks();
+#endif
/*
* Toggle watchdog output
#ifdef CONFIG_HAS_DATAFLASH
#include <dataflash.h>
#endif
+#include <watchdog.h>
#if defined(CONFIG_CMD_MEMORY) \
|| defined(CONFIG_CMD_I2C) \
}
}
start[test_offset] = pattern;
+ WATCHDOG_RESET();
/*
* Check for addr bits stuck low or shorted.
* Fill memory with a known pattern.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
start[offset] = pattern;
}
* Check each location and invert it for the second pass.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
temp = start[offset];
if (temp != pattern) {
printf ("\nFAILURE (read/write) @ 0x%.8lx:"
* Check each location for the inverted pattern and zero it.
*/
for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
+ WATCHDOG_RESET();
anti_pattern = ~pattern;
temp = start[offset];
if (temp != anti_pattern) {
pattern, "");
for (addr=start,val=pattern; addr<end; addr++) {
+ WATCHDOG_RESET();
*addr = val;
val += incr;
}
puts ("Reading...");
for (addr=start,val=pattern; addr<end; addr++) {
+ WATCHDOG_RESET();
readback = *addr;
if (readback != val) {
printf ("\nMem error @ 0x%08X: "
#endif
#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
+#endif
+#if defined(CONFIG_WD_MAX_RATE)
+ unsigned long long wdt_last; /* trace watch-dog triggering rate */
#endif
void **jt; /* jump table */
} gd_t;
int cpu_release(int nr, int argc, char *argv[]);
#endif
+#ifdef CONFIG_POST
+#define CONFIG_HAS_POST
+#endif
+
#endif /* __COMMON_H_ */
#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
#define CFG_DSPIC_TEST_MASK 0x00000001
+/* Additional registers for watchdog timer post test */
+
+#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
+#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
+#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
+#define CFG_WATCHDOG_MAGIC 0x12480000
+#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
+#define CFG_DSPIC_TEST_MASK 0x00000001
+
/*-----------------------------------------------------------------------
* Serial Port
*----------------------------------------------------------------------*/
#define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */
#define CONFIG_WD_PERIOD 40000 /* in usec */
+#define CONFIG_WD_MAX_RATE 66600 /* in ticks */
/*
* For booting Linux, the board info and command line data
# MA 02111-1307 USA
#
+include $(TOPDIR)/include/autoconf.mk
-SUBDIRS = drivers cpu lib_$(ARCH) board/$(BOARDDIR)
+LIB = libpost.a
+GPLIB-$(CONFIG_HAS_POST) += libgenpost.a
+COBJS-$(CONFIG_HAS_POST) += post.o tests.o
-LIB = libpost.a
+SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.a
+SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \
+ "lib_$(ARCH)/libpost$(ARCH).a"; fi)
+SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH)/fpu ]; then echo \
+ "lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
+SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d cpu/$(CPU) ]; then echo \
+ "cpu/$(CPU)/libpost$(CPU).a"; fi)
+SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d board/$(BOARD) ]; then echo \
+ "board/$(BOARD)/libpost$(BOARD).a"; fi)
-COBJS = post.o tests.o
+GPLIB := $(GPLIB-y)
+SPLIB := $(SPLIB-y)
+COBJS := $(COBJS-y)
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+LIB := $(obj)$(LIB)
-include $(TOPDIR)/post/rules.mk
+all: $(LIB)
+
+# generic POST library
+$(GPLIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+# specific POST libraries
+$(SPLIB): $(obj).depend
+ $(MAKE) -C $(dir $(subst $(obj),,$@))
+
+# the POST lib archive
+$(LIB): $(GPLIB) $(SPLIB)
+ (echo create $(LIB); for lib in $(GPLIB) $(SPLIB) ; \
+ do echo addlib $$lib; done; echo save) \
+ | $(AR) -M
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
#include <post.h>
#include <common.h>
-#ifdef CONFIG_POST
-
/*
* SYSMON test
*
}
#endif /* CONFIG_POST & CFG_POST_SYSMON */
-#endif /* CONFIG_POST */
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
+include $(TOPDIR)/include/autoconf.mk
LIB = libpostlwmon5.a
-COBJS = sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
+COBJS-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o
include $(TOPDIR)/post/rules.mk
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
-
#if CONFIG_POST & CFG_POST_DSP
#include <asm/io.h>
}
#endif /* CONFIG_POST & CFG_POST_DSP */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
/* There are two tests for dsPIC currently implemented:
* 1. dsPIC ready test. Done in board_early_init_f(). Only result verified here.
* 2. dsPIC POST result test. This test gets dsPIC POST codes and version.
#if CONFIG_POST & CFG_POST_BSPEC2
/* Read a register from the dsPIC. */
-int dspic_read(ushort reg, ushort *data)
+int dspic_read(ushort reg)
{
- uchar buf[sizeof(*data)];
- int rval;
-
- rval = i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, sizeof(reg),
- buf, sizeof(*data));
+ uchar buf[2];
- *data = (buf[0] << 8) | buf[1];
+ if (i2c_read(CFG_I2C_DSPIC_IO_ADDR, reg, 2, buf, 2))
+ return -1;
- return rval;
+ return (uint)((buf[0] << 8) | buf[1]);
}
/* Verify error codes regs, display version */
int dspic_post_test(int flags)
{
- ushort data;
+ int data;
int ret = 0;
post_log("\n");
- if (dspic_read(DSPIC_VERSION_REG, &data)) {
+ data = dspic_read(DSPIC_VERSION_REG);
+ if (data == -1) {
post_log("dsPIC : failed read version\n");
ret = 1;
} else {
(data >> 8) & 0xFF, data & 0xFF);
}
- if (dspic_read(DSPIC_POST_ERROR_REG, &data)) {
+ data = dspic_read(DSPIC_POST_ERROR_REG);
+ if (data != 0) ret = 1;
+ if (data == -1) {
post_log("dsPIC : failed read POST code\n");
} else {
post_log("dsPIC POST code 0x%04X\n", data);
}
- if (data != 0)
- ret = 1;
- if (dspic_read(DSPIC_SYS_ERROR_REG, &data)) {
+ data = dspic_read(DSPIC_SYS_ERROR_REG);
+ if (data == -1) {
post_log("dsPIC : failed read system error\n");
ret = 1;
- } else if (data != 0) {
+ } else {
post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
- ret = 1;
}
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC2 */
-#endif /* CONFIG_POST */
*/
#include <common.h>
-#ifdef CONFIG_POST
-
/* This test performs testing of FPGA SCRATCH register,
* gets FPGA version and run get_ram_size() on FPGA memory
*/
}
#endif /* CONFIG_POST & CFG_POST_BSPEC3 */
-#endif /* CONFIG_POST */
*/
#include <common.h>
-#ifdef CONFIG_POST
-
/* This test attempts to verify board GDC. A scratch register tested, then
* simple memory test (get_ram_size()) run over GDC memory.
*/
return ret;
}
#endif /* CONFIG_POST & CFG_POST_BSPEC4 */
-#endif /* CONFIG_POST */
#include <post.h>
#include <common.h>
-#ifdef CONFIG_POST
-
/*
* SYSMON test
*
* The test passes when all the following voltages and temperatures
* are within allowed ranges:
*
- * Temperature -40 .. +85 C
- * +5V +4.75 .. +5.25 V
- * +5V standby +4.75 .. +5.25 V
+ * Temperature -40 .. +85 C
+ * +5V +4.75 .. +5.25 V
+ * +5V standby +4.75 .. +5.25 V
*
* LCD backlight is not enabled if temperature values are not within
* allowed ranges (-30 .. + 80). The brightness of backlite can be
DECLARE_GLOBAL_DATA_PTR;
/* from dspic.c */
-extern int dspic_read(ushort reg, ushort *data);
+extern int dspic_read(ushort reg);
#define RELOC(x) if (x != NULL) x = (void *) ((ulong) (x) + gd->reloc_off)
static void sysmon_dspic_init (sysmon_t * this);
static int sysmon_dspic_read (sysmon_t * this, uint addr);
-static int sysmon_dspic_read_sgn (sysmon_t * this, uint addr);
static void sysmon_backlight_disable (sysmon_table_t * this);
struct sysmon_s
static sysmon_t sysmon_dspic =
{CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read};
-static sysmon_t sysmon_dspic_sgn =
- {CFG_I2C_DSPIC_IO_ADDR, sysmon_dspic_init, sysmon_dspic_read_sgn};
-
static sysmon_t * sysmon_list[] =
{
&sysmon_dspic,
- &sysmon_dspic_sgn,
NULL
};
static sysmon_table_t sysmon_table[] =
{
- {"Temperature", " C", &sysmon_dspic_sgn, NULL, sysmon_backlight_disable,
+ {"Temperature", " C", &sysmon_dspic, NULL, sysmon_backlight_disable,
1, 1, -32768, 32767, 0xFFFF, 0x8000-40, 0x8000+85, 0,
- 0x8000-30, 0x8000+80, 0, 0x12BC},
+ 0x8000-30, 0x8000+80, 0, 0x12BC},
{"+ 5 V", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, 0, 0xFFFF, 0xFFFF, 4750, 5250, 0,
- 4750, 5250, 0, 0x12CA},
+ 100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
+ 0x8000+4750, 0x8000+5250, 0, 0x12CA},
{"+ 5 V standby", "V", &sysmon_dspic, NULL, NULL,
- 100, 1000, 0, 0xFFFF, 0xFFFF, 4750, 5250, 0,
- 4750, 5250, 0, 0x12C6},
+ 100, 1000, -0x8000, 0x7FFF, 0xFFFF, 0x8000+4750, 0x8000+5250, 0,
+ 0x8000+4750, 0x8000+5250, 0, 0x12C6},
};
static int sysmon_table_size = sizeof(sysmon_table) / sizeof(sysmon_table[0]);
static char buf[32];
char *p, sign;
int decimal, frac;
- int unit_val =
+ int unit_val;
+
+ unit_val =
s->unit_min + (s->unit_max - s->unit_min) * val / s->val_mask;
if (val == -1)
static int sysmon_dspic_read (sysmon_t * this, uint addr)
{
- ushort data;
-
- return (dspic_read(addr, &data)) ? -1 : data;
-}
-
-static int sysmon_dspic_read_sgn (sysmon_t * this, uint addr)
-{
- ushort data;
+ int res = dspic_read(addr);
/* To fit into the table range we should add 0x8000 */
- return (dspic_read(addr, &data)) ? -1 :
- (signed short)data + 0x8000;
+ return (res == -1) ? -1 : (res + 0x8000);
}
static void sysmon_backlight_disable (sysmon_table_t * this)
}
#endif /* CONFIG_POST & CFG_POST_SYSMON */
-#endif /* CONFIG_POST */
#include <common.h>
-/*
- * This test verifies if the reason of last reset was an abnormal voltage
+/* This test verifies if the reason of last reset was an abnormal voltage
* condition, than it performs watchdog test, measuing time required to
* trigger watchdog reset.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
int sysmon1_post_test(int flags)
{
- if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS) == 0) {
- /*
- * 3.1. GPIO62 is low
+ if (gpio_read_in_bit(CFG_GPIO_SYSMON_STATUS)) {
+ /* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
post_log("Abnormal voltage detected (GPIO62)\n");
int lwmon5_watchdog_post_test(int flags)
{
- ulong time;
-
/* On each reset scratch register 1 should be tested,
* but first test GPIO62:
*/
if (!(flags & POST_MANUAL) && sysmon1_post_test(flags)) {
- /*
- * 3.1. GPIO62 is low
+ /* 3.1. GPIO62 is low
* Assuming system voltage failure.
*/
/* 3.1.1. Set scratch register 1 to 0x0000xxxx */
}
if (watchdog_magic_read() != CFG_WATCHDOG_MAGIC) {
- /*
- * 3.2. Scratch register 1 differs from magic value 0x1248xxxx
+ /* 3.2. Scratch register 1 differs from magic value 0x1248xxxx
* Assuming PowerOn
*/
int ints;
ulong base;
+ ulong time;
/* 3.2.1. Set magic value to scratch register */
watchdog_magic_write(CFG_WATCHDOG_MAGIC);
if (ints)
enable_interrupts ();
- /*
- * 3.2.5. Reset didn't happen. - Set 0x0000xxxx
+ /* 3.2.5. Reset didn't happen. - Set 0x0000xxxx
* into scratch register 1
*/
watchdog_magic_write(0);
/* 3.2.6. Mark test as failed. */
post_log("hw watchdog time : %u ms, failed ", time);
return 2;
+ } else {
+ /* 3.3. Scratch register matches magic value 0x1248xxxx
+ * Assume this is watchdog-initiated reset
+ */
+ ulong time;
+ /* 3.3.1. So, the test succeed, save measured time to syslog. */
+ time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
+ post_log("hw watchdog time : %u ms, passed ", time);
+ /* 3.3.2. Set scratch register 1 to 0x0000xxxx */
+ watchdog_magic_write(0);
+ return 0;
}
-
- /*
- * 3.3. Scratch register matches magic value 0x1248xxxx
- * Assume this is watchdog-initiated reset
- */
- /* 3.3.1. So, the test succeed, save measured time to syslog. */
- time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
- post_log("hw watchdog time : %u ms, passed ", time);
- /* 3.3.2. Set scratch register 1 to 0x0000xxxx */
- watchdog_magic_write(0);
-
- return 0;
+ return -1;
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
-#endif /* CONFIG_POST */
* in the board specific function.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_CODEC
}
#endif /* CONFIG_POST & CFG_POST_CODEC */
-#endif /* CONFIG_POST */
* in the board specific function.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_DSP
}
#endif /* CONFIG_POST & CFG_POST_DSP */
-#endif /* CONFIG_POST */
* several test scenarios.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include <watchdog.h>
}
#endif /* CONFIG_POST & CFG_POST_CACHE */
-#endif /* CONFIG_POST */
#include <config.h>
-#ifdef CONFIG_POST
#if defined(CONFIG_MPC823) || \
defined(CONFIG_MPC850) || \
defined(CONFIG_MPC855) || \
#endif /* CONFIG_MPC823 || MPC850 || MPC855 || MPC860 */
#endif /* CONFIG_POST & CFG_POST_CACHE */
-#endif /* CONFIG_POST */
* TEST_NUM - number of tests
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_ETHER
#if defined(CONFIG_8xx)
}
#endif /* CONFIG_POST & CFG_POST_ETHER */
-
-#endif /* CONFIG_POST */
* corresponding table value.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_SPR
return ret;
}
#endif /* CONFIG_POST & CFG_POST_SPR */
-#endif /* CONFIG_POST */
* TEST_NUM - number of tests
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_UART
#if defined(CONFIG_8xx)
}
#endif /* CONFIG_POST & CFG_POST_UART */
-
-#endif /* CONFIG_POST */
* Initialization Example.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_USB
}
#endif /* CONFIG_POST & CFG_POST_USB */
-
-#endif /* CONFIG_POST */
* reboots, on the second iteration the test routine reports a success.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include <watchdog.h>
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
-#endif /* CONFIG_POST */
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
+include $(TOPDIR)/include/autoconf.mk
LIB = libpostppc4xx.a
-AOBJS = cache_4xx.o
-COBJS = cache.o denali_ecc.o ether.o fpu.o spr.o uart.o watchdog.o
+AOBJS-$(CONFIG_HAS_POST) += cache_4xx.o
+COBJS-$(CONFIG_HAS_POST) += cache.o denali_ecc.o ether.o fpu.o spr.o uart.o watchdog.o
include $(TOPDIR)/post/rules.mk
* several test scenarios.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_CACHE
}
#endif /* CONFIG_POST & CFG_POST_CACHE */
-#endif /* CONFIG_POST */
#include <config.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
blr
#endif /* CONFIG_POST & CFG_POST_CACHE */
-#endif /* CONFIG_POST */
#include <common.h>
#include <watchdog.h>
-#if defined(CONFIG_POST) && (defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#include <post.h>
return ret;
}
#endif /* CONFIG_POST & CFG_POST_ECC */
-#endif /* defined(CONFIG_POST) && ... */
+#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */
* TEST_NUM - number of tests
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_ETHER
}
#endif /* CONFIG_POST & CFG_POST_ETHER */
-#endif /* CONFIG_POST */
#include <config.h>
-#ifdef CONFIG_POST
#if defined(CONFIG_440EP) || \
defined(CONFIG_440EPX)
}
#endif
-#endif /* CONFIG_POST */
* corresponding table value.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_SPR
}
#endif /* CONFIG_POST & CFG_POST_SPR */
-#endif /* CONFIG_POST */
* characters are transmitted.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_UART
}
#endif /* CONFIG_POST & CFG_POST_UART */
-#endif /* CONFIG_POST */
* reboots, on the second iteration the test routine reports a success.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_WATCHDOG
}
#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
-#endif /* CONFIG_POST */
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
-
-SUBDIRS =
+include $(TOPDIR)/config.mk
LIB = libpostdrivers.a
-COBJS = i2c.o memory.o rtc.o
+COBJS-$(CONFIG_HAS_POST) += i2c.o memory.o rtc.o
include $(TOPDIR)/post/rules.mk
#include <common.h>
-#ifdef CONFIG_POST
-
/*
* I2C test
*
}
#endif /* CONFIG_POST & CFG_POST_I2C */
-#endif /* CONFIG_POST */
* the whole RAM.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include <watchdog.h>
}
#endif /* CONFIG_POST & CFG_POST_MEMORY */
-#endif /* CONFIG_POST */
* nonleap-years.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include <rtc.h>
}
#endif /* CONFIG_POST & CFG_POST_RTC */
-#endif /* CONFIG_POST */
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
-SUBDIRS = fpu
+include $(TOPDIR)/config.mk
LIB = libpostppc.a
-AOBJS = asm.o
-COBJS = cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
-COBJS += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
-COBJS += store.o load.o cr.o b.o multi.o string.o complex.o
+AOBJS-$(CONFIG_HAS_POST) += asm.o
+COBJS-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o
+COBJS-$(CONFIG_HAS_POST) += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o
+COBJS-$(CONFIG_HAS_POST) += store.o load.o cr.o b.o multi.o string.o complex.o
include $(TOPDIR)/post/rules.mk
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
#include <config.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
blr
#endif
-#endif
* linked in U-Boot at build time.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* the result in and the expected result.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* the result in and the expected result.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* calculations, but probably under different timing conditions, etc.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* For more details refer to post/cpu/ *.c files.
*/
-#ifdef CONFIG_POST
-
#include <watchdog.h>
#include <post.h>
#include <asm/mmu.h>
}
#endif /* CONFIG_POST & CFG_POST_CPU */
-#endif /* CONFIG_POST */
* expected one.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-
+include $(TOPDIR)/config.mk
LIB = libpostppcfpu.a
-COBJS += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o
-COBJS += acc1.o compare-fp-1.o mul-subnormal-single-1.o
+COBJS-$(CONFIG_HAS_POST) += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o
+COBJS-$(CONFIG_HAS_POST) += acc1.o compare-fp-1.o mul-subnormal-single-1.o
include $(TOPDIR)/post/rules.mk
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
* For more details refer to post/cpu/ *.c files.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
#if CONFIG_POST & CFG_POST_FPU
}
#endif /* CONFIG_POST & CFG_POST_FPU */
-#endif /* CONFIG_POST */
* register (it must change for "load with update" instructions).
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* of the source and target buffers are then compared.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* with update" instructions).
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* of the source and target buffers are then compared.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
}
#endif
-#endif
#include <logbuff.h>
#endif
-#ifdef CONFIG_POST
-
DECLARE_GLOBAL_DATA_PTR;
#define POST_MAX_NUMBER 32
return 0; /* Not implemented yet */
#endif
}
-
-#endif /* CONFIG_POST */
include $(TOPDIR)/config.mk
+COBJS := $(COBJS-y)
+AOBJS := $(AOBJS-y)
SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
LIB := $(obj)$(LIB)
#include <common.h>
-#ifdef CONFIG_POST
-
#include <post.h>
extern int cache_post_test (int flags);
};
unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
-
-#endif /* CONFIG_POST */
projects / people / ms / u-boot.git / commitdiff
