Merge branch 'master' of git://git.denx.de/u-boot-socfpga

diff --git a/Kconfig b/Kconfig
index 4b462166656074d5979dee513b80c5c1c1deac02..817f4f08a02f0806a0d1d63c04e0e1e6829abf07 100644 (file)
--- a/Kconfig
+++ b/Kconfig
@@ -183,6 +183,11 @@ config FIT
          verified boot (secure boot using RSA). This option enables that
          feature.
 
+config SPL_FIT
+       bool "Support Flattened Image Tree within SPL"
+       depends on FIT
+       depends on SPL
+
 config FIT_VERBOSE
        bool "Display verbose messages on FIT boot"
        depends on FIT
@@ -205,6 +210,12 @@ config FIT_SIGNATURE
          format support in this case, enable it using
          CONFIG_IMAGE_FORMAT_LEGACY.
 
+config SPL_FIT_SIGNATURE
+       bool "Enable signature verification of FIT firmware within SPL"
+       depends on SPL_FIT
+       depends on SPL_DM
+       select SPL_RSA
+
 config FIT_BEST_MATCH
        bool "Select the best match for the kernel device tree"
        depends on FIT

diff --git a/README b/README
index 1d0b946977b22cc9a746515d4a9779b68b6bd64b..03bed180591a7a0cafd003f53b889991c183741e 100644 (file)
--- a/README
+++ b/README
@@ -4824,6 +4824,11 @@ Low Level (hardware related) configuration options:
                other boot loader or by a debugger which performs
                these initializations itself.
 
+- CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+               [ARM926EJ-S only] This allows just the call to lowlevel_init()
+               to be skipped. The normal CPU15 init (such as enabling the
+               instruction cache) is still performed.
+
 - CONFIG_SPL_BUILD
                Modifies the behaviour of start.S when compiling a loader
                that is executed before the actual U-Boot. E.g. when

diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h
index b6f7724931ceab6dd674b56920e9134a4fe62c28..42e7f22b28ddb4ea2db55b6eef8c5558bbb3ecf6 100644 (file)
--- a/arch/arc/include/asm/io.h
+++ b/arch/arc/include/asm/io.h
@@ -10,6 +10,46 @@
 #include <linux/types.h>
 #include <asm/byteorder.h>
 
+#ifdef CONFIG_ISA_ARCV2
+
+/*
+ * ARCv2 based HS38 cores are in-order issue, but still weakly ordered
+ * due to micro-arch buffering/queuing of load/store, cache hit vs. miss ...
+ *
+ * Explicit barrier provided by DMB instruction
+ *  - Operand supports fine grained load/store/load+store semantics
+ *  - Ensures that selected memory operation issued before it will complete
+ *    before any subsequent memory operation of same type
+ *  - DMB guarantees SMP as well as local barrier semantics
+ *    (asm-generic/barrier.h ensures sane smp_*mb if not defined here, i.e.
+ *    UP: barrier(), SMP: smp_*mb == *mb)
+ *  - DSYNC provides DMB+completion_of_cache_bpu_maintenance_ops hence not needed
+ *    in the general case. Plus it only provides full barrier.
+ */
+
+#define mb()   asm volatile("dmb 3\n" : : : "memory")
+#define rmb()  asm volatile("dmb 1\n" : : : "memory")
+#define wmb()  asm volatile("dmb 2\n" : : : "memory")
+
+#else
+
+/*
+ * ARCompact based cores (ARC700) only have SYNC instruction which is super
+ * heavy weight as it flushes the pipeline as well.
+ * There are no real SMP implementations of such cores.
+ */
+
+#define mb()   asm volatile("sync\n" : : : "memory")
+#endif
+
+#ifdef CONFIG_ISA_ARCV2
+#define __iormb()              rmb()
+#define __iowmb()              wmb()
+#else
+#define __iormb()              do { } while (0)
+#define __iowmb()              do { } while (0)
+#endif
+
 /*
  * Given a physical address and a length, return a virtual address
  * that can be used to access the memory range with the caching
@@ -72,18 +112,6 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
        return w;
 }
 
-#define readb __raw_readb
-
-static inline u16 readw(const volatile void __iomem *addr)
-{
-       return __le16_to_cpu(__raw_readw(addr));
-}
-
-static inline u32 readl(const volatile void __iomem *addr)
-{
-       return __le32_to_cpu(__raw_readl(addr));
-}
-
 static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
 {
        __asm__ __volatile__("stb%U1    %0, %1\n"
@@ -108,10 +136,6 @@ static inline void __raw_writel(u32 w, volatile void __iomem *addr)
                             : "memory");
 }
 
-#define writeb __raw_writeb
-#define writew(b, addr) __raw_writew(__cpu_to_le16(b), addr)
-#define writel(b, addr) __raw_writel(__cpu_to_le32(b), addr)
-
 static inline int __raw_readsb(unsigned int addr, void *data, int bytelen)
 {
        __asm__ __volatile__ ("1:ld.di  r8, [r0]\n"
@@ -184,6 +208,45 @@ static inline int __raw_writesl(unsigned int addr, void *data, int longlen)
        return longlen;
 }
 
+/*
+ * MMIO can also get buffered/optimized in micro-arch, so barriers needed
+ * Based on ARM model for the typical use case
+ *
+ *     <ST [DMA buffer]>
+ *     <writel MMIO "go" reg>
+ *  or:
+ *     <readl MMIO "status" reg>
+ *     <LD [DMA buffer]>
+ *
+ * http://lkml.kernel.org/r/20150622133656.GG1583@arm.com
+ */
+#define readb(c)               ({ u8  __v = readb_relaxed(c); __iormb(); __v; })
+#define readw(c)               ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
+#define readl(c)               ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
+
+#define writeb(v,c)            ({ __iowmb(); writeb_relaxed(v,c); })
+#define writew(v,c)            ({ __iowmb(); writew_relaxed(v,c); })
+#define writel(v,c)            ({ __iowmb(); writel_relaxed(v,c); })
+
+/*
+ * Relaxed API for drivers which can handle barrier ordering themselves
+ *
+ * Also these are defined to perform little endian accesses.
+ * To provide the typical device register semantics of fixed endian,
+ * swap the byte order for Big Endian
+ *
+ * http://lkml.kernel.org/r/201603100845.30602.arnd@arndb.de
+ */
+#define readb_relaxed(c)       __raw_readb(c)
+#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
+                                       __raw_readw(c)); __r; })
+#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
+                                       __raw_readl(c)); __r; })
+
+#define writeb_relaxed(v,c)    __raw_writeb(v,c)
+#define writew_relaxed(v,c)    __raw_writew((__force u16) cpu_to_le16(v),c)
+#define writel_relaxed(v,c)    __raw_writel((__force u32) cpu_to_le32(v),c)
+
 #define out_arch(type, endian, a, v)   __raw_write##type(cpu_to_##endian(v), a)
 #define in_arch(type, endian, a)       endian##_to_cpu(__raw_read##type(a))
 

diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index d1fb66153771a607a56afde1bc67bbe95dab743d..b6ec83112cd8aa5264d9572c9ef97fbf0f9462ce 100644 (file)
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -209,6 +209,9 @@ void cache_init(void)
        read_decode_cache_bcr_arcv2();
 
        if (ioc_exists) {
+               flush_dcache_all();
+               invalidate_dcache_all();
+
                /* IO coherency base - 0x8z */
                write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, 0x80000);
                /* IO coherency aperture size - 512Mb: 0x8z-0xAz */
@@ -417,13 +420,10 @@ void flush_cache(unsigned long start, unsigned long size)
 
 void invalidate_dcache_all(void)
 {
-#ifdef CONFIG_ISA_ARCV2
-       if (!ioc_exists)
-#endif
-               __dc_entire_op(OP_INV);
+       __dc_entire_op(OP_INV);
 
 #ifdef CONFIG_ISA_ARCV2
-       if (slc_exists && !ioc_exists)
+       if (slc_exists)
                __slc_entire_op(OP_INV);
 #endif
 }

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 30ed279474bc792eb707663e43a6bd33641fed99..84cabb8fd8d4cd5ebf86c1396f8c51a43b389949 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -350,26 +350,49 @@ config TARGET_DRACO
        bool "Support draco"
        select CPU_V7
        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
 
 config TARGET_THUBAN
        bool "Support thuban"
        select CPU_V7
        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
 
 config TARGET_RASTABAN
        bool "Support rastaban"
        select CPU_V7
        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
+
+config TARGET_ETAMIN
+        bool "Support etamin"
+        select CPU_V7
+        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
 
 config TARGET_PXM2
        bool "Support pxm2"
        select CPU_V7
        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
 
 config TARGET_RUT
        bool "Support rut"
        select CPU_V7
        select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
 
 config TARGET_PENGWYN
        bool "Support pengwyn"
@@ -396,6 +419,14 @@ config TARGET_AM335X_EVM
        select DM_GPIO
        select TI_I2C_BOARD_DETECT
 
+config TARGET_AM335X_SHC
+       bool "Support am335x based shc board from bosch"
+       select CPU_V7
+       select SUPPORT_SPL
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
+
 config TARGET_AM335X_SL50
        bool "Support am335x_sl50"
        select CPU_V7
@@ -428,6 +459,10 @@ config TARGET_TI816X_EVM
        select CPU_V7
        select SUPPORT_SPL
 
+config TARGET_BCM23550_W1D
+       bool "Support bcm23550_w1d"
+       select CPU_V7
+
 config TARGET_BCM28155_AP
        bool "Support bcm28155_ap"
        select CPU_V7
@@ -544,6 +579,10 @@ config RMOBILE
        bool "Renesas ARM SoCs"
        select CPU_V7
 
+config TARGET_S32V234EVB
+       bool "Support s32v234evb"
+       select ARM64
+
 config ARCH_SNAPDRAGON
        bool "Qualcomm Snapdragon SoCs"
        select ARM64
@@ -875,6 +914,7 @@ source "arch/arm/cpu/armv8/Kconfig"
 
 source "arch/arm/imx-common/Kconfig"
 
+source "board/bosch/shc/Kconfig"
 source "board/BuR/kwb/Kconfig"
 source "board/BuR/tseries/Kconfig"
 source "board/CarMediaLab/flea3/Kconfig"
@@ -884,6 +924,7 @@ source "board/armadeus/apf27/Kconfig"
 source "board/armltd/vexpress/Kconfig"
 source "board/armltd/vexpress64/Kconfig"
 source "board/bluegiga/apx4devkit/Kconfig"
+source "board/broadcom/bcm23550_w1d/Kconfig"
 source "board/broadcom/bcm28155_ap/Kconfig"
 source "board/broadcom/bcmcygnus/Kconfig"
 source "board/broadcom/bcmnsp/Kconfig"
@@ -915,6 +956,7 @@ source "board/freescale/mx53ard/Kconfig"
 source "board/freescale/mx53evk/Kconfig"
 source "board/freescale/mx53loco/Kconfig"
 source "board/freescale/mx53smd/Kconfig"
+source "board/freescale/s32v234evb/Kconfig"
 source "board/freescale/vf610twr/Kconfig"
 source "board/gumstix/pepper/Kconfig"
 source "board/h2200/Kconfig"

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 3ebdfddc8098a4de195166de4f30c43fdba1f07b..2f8fd6acc20e52b1e18d5049a1db78e9f09bc425 100644 (file)
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -82,6 +82,7 @@ cpu_init_crit:
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
        mcr     p15, 0, r0, c1, c0, 0
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        /*
         * Jump to board specific initialization... The Mask ROM will have already initialized
         * basic memory.  Go here to bump up clock rate and handle wake up conditions.
@@ -89,5 +90,6 @@ cpu_init_crit:
        mov     ip, lr          /* persevere link reg across call */
        bl      lowlevel_init   /* go setup pll,mux,memory */
        mov     lr, ip          /* restore link */
+#endif
        mov     pc, lr          /* back to my caller */
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 69cabebed91edbba882b5b7821f22aaaa3969bcc..3ada6d026fa9d37036a0bf0978e4f0c22930d9de 100644 (file)
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -135,6 +135,7 @@ cpu_init_crit:
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
        mcr     p15, 0, r0, c1, c0, 0
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        /*
         * before relocating, we have to setup RAM timing
         * because memory timing is board-dependend, you will
@@ -143,7 +144,7 @@ cpu_init_crit:
        mov     ip, lr
 
        bl      lowlevel_init
-
        mov     lr, ip
+#endif
        mov     pc, lr
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index a6af0fcb36eef20d0bb650d9b5b3419b685f46df..229862079a329ac8639aeef2884d395c439e1f71 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -167,9 +167,9 @@ const char *get_imx_type(u32 imxtype)
 {
        switch (imxtype) {
        case MXC_CPU_MX23:
-               return "23";    /* Quad-Plus version of the mx6 */
+               return "23";
        case MXC_CPU_MX28:
-               return "28";    /* Dual-Plus version of the mx6 */
+               return "28";
        default:
                return "??";
        }

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index f05113da9df21ff5a28ebc644fc83bf5399f8606..959d1ed86d8af82c62a1f497aa90c50d3f109318 100644 (file)
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -101,11 +101,13 @@ flush_dcache:
 #endif
        mcr     p15, 0, r0, c1, c0, 0
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        /*
         * Go setup Memory and board specific bits prior to relocation.
         */
        mov     ip, lr          /* perserve link reg across call */
        bl      lowlevel_init   /* go setup pll,mux,memory */
        mov     lr, ip          /* restore link */
+#endif
        mov     pc, lr          /* back to my caller */
 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */

diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 214cd8cbd9070f36feaa046bcd56f163fe245ae7..51053c32dc11dd54aa2c9c21be917fc1c2b57028 100644 (file)
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -90,11 +90,13 @@ cpu_init_crit:
        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
        mcr     p15, 0, r0, c1, c0, 0
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        /*
         * Go setup Memory and board specific bits prior to relocation.
         */
        mov     ip, lr          /* perserve link reg across call */
        bl      lowlevel_init   /* go setup memory */
        mov     lr, ip          /* restore link */
+#endif
        mov     pc, lr          /* back to my caller */
 #endif

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 328c4b10e9768f67724f0ded8b1382f8dbafdcd5..0a5ac97df0d0a7f60ddda86952c75ab7a4e0520e 100644 (file)
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -38,6 +38,7 @@ obj-y += s5p-common/
 endif
 
 obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
+obj-$(if $(filter bcm235xx,$(SOC)),y) += bcm235xx/
 obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
 obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
 obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/

diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
index 92142c893444bc63ad7e1b811172c5996d6005a0..7b841b2d556da3492cfc1ce58e19149cbb237f1c 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c
@@ -159,3 +159,76 @@ void enable_basic_clocks(void)
        /* Select the Master osc 24 MHZ as Timer2 clock source */
        writel(0x1, &cmdpll->clktimer2clk);
 }
+
+/*
+ * Enable Spread Spectrum for the MPU by calculating the required
+ * values and setting the registers accordingly.
+ * @param permille The spreading in permille (10th of a percent)
+ */
+void set_mpu_spreadspectrum(int permille)
+{
+       u32 multiplier_m;
+       u32 predivider_n;
+       u32 cm_clksel_dpll_mpu;
+       u32 cm_clkmode_dpll_mpu;
+       u32 ref_clock;
+       u32 pll_bandwidth;
+       u32 mod_freq_divider;
+       u32 exponent;
+       u32 mantissa;
+       u32 delta_m_step;
+
+       printf("Enabling Spread Spectrum of %d permille for MPU\n",
+              permille);
+
+       /* Read PLL parameter m and n */
+       cm_clksel_dpll_mpu = readl(&cmwkup->clkseldpllmpu);
+       multiplier_m = (cm_clksel_dpll_mpu >> 8) & 0x3FF;
+       predivider_n = cm_clksel_dpll_mpu & 0x7F;
+
+       /*
+        * Calculate reference clock (clock after pre-divider),
+        * its max. PLL bandwidth,
+        * and resulting mod_freq_divider
+        */
+       ref_clock = V_OSCK / (predivider_n + 1);
+       pll_bandwidth = ref_clock / 70;
+       mod_freq_divider = ref_clock / (4 * pll_bandwidth);
+
+       /* Calculate Mantissa/Exponent */
+       exponent = 0;
+       mantissa = mod_freq_divider;
+       while ((mantissa > 127) && (exponent < 7)) {
+               exponent++;
+               mantissa /= 2;
+       }
+       if (mantissa > 127)
+               mantissa = 127;
+
+       mod_freq_divider = mantissa << exponent;
+
+       /*
+        * Calculate Modulation steps
+        * As we use Downspread only, the spread is twice the value of
+        * permille, so Div2!
+        * As it takes the value in percent, divide by ten!
+        */
+       delta_m_step = ((u32)((multiplier_m * permille) / 10 / 2)) << 18;
+       delta_m_step /= 100;
+       delta_m_step /= mod_freq_divider;
+       if (delta_m_step > 0xFFFFF)
+               delta_m_step = 0xFFFFF;
+
+       /* Setup Spread Spectrum */
+       writel(delta_m_step, &cmwkup->sscdeltamstepdllmpu);
+       writel((exponent << 8) | mantissa, &cmwkup->sscmodfreqdivdpllmpu);
+       cm_clkmode_dpll_mpu = readl(&cmwkup->clkmoddpllmpu);
+       /* clear all SSC flags */
+       cm_clkmode_dpll_mpu &= ~(0xF << CM_CLKMODE_DPLL_SSC_EN_SHIFT);
+       /* enable SSC with Downspread only */
+       cm_clkmode_dpll_mpu |=  CM_CLKMODE_DPLL_SSC_EN_MASK |
+                               CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK;
+       writel(cm_clkmode_dpll_mpu, &cmwkup->clkmoddpllmpu);
+       while (!(readl(&cmwkup->clkmoddpllmpu) & 0x2000))
+               ;
+}

diff --git a/arch/arm/cpu/armv7/bcm235xx/Makefile b/arch/arm/cpu/armv7/bcm235xx/Makefile
new file mode 100644 (file)
index 0000000..7fdb263
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2013 Broadcom Corporation.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  += clk-core.o
+obj-y  += clk-bcm235xx.o
+obj-y  += clk-sdio.o
+obj-y  += clk-bsc.o
+obj-$(CONFIG_BCM_SF2_ETH) += clk-eth.o
+obj-y  += clk-usb-otg.o

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
new file mode 100644 (file)
index 0000000..ce3d019
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bcm235xx.c
@@ -0,0 +1,573 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/*
+ *
+ * bcm235xx-specific clock tables
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/arch/sysmap.h>
+#include <asm/kona-common/clk.h>
+#include "clk-core.h"
+
+#define CLOCK_1K               1000
+#define CLOCK_1M               (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+       .clk    =       { \
+               .name   =       #clk_name, \
+               .parent =       clk_parent, \
+               .rate   =       clk_rate, \
+               .div    =       clk_div, \
+               .ops    =       &ref_clk_ops, \
+       }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal,   0,              26  * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m,       0,              96  * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m,       0,              96  * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m,      0,              312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m,      &ref_312m.clk,  104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m,       &ref_104m.clk,  52  * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m,       &ref_52m.clk,   13  * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m,      0,              312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m,      &var_312m.clk,  104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m,       &var_104m.clk,  52  * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m,       &var_52m.clk,   13  * CLOCK_1M, 4);
+
+struct refclk_lkup {
+       struct refclk *procclk;
+       const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+       MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+       MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+       MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+       MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+       int i;
+       struct refclk_lkup *tblp = refclk_str_tbl;
+       for (i = 0; i < refclk_entries; i++, tblp++) {
+               if (!(strcmp(name, tblp->name)))
+                       return tblp->procclk;
+       }
+       return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+       26 * CLOCK_1M,
+       52 * CLOCK_1M,
+       104 * CLOCK_1M,
+       156 * CLOCK_1M,
+       156 * CLOCK_1M,
+       208 * CLOCK_1M,
+       312 * CLOCK_1M,
+       312 * CLOCK_1M
+};
+
+unsigned long master_ahb_freq_tbl[8] = {
+       26 * CLOCK_1M,
+       52 * CLOCK_1M,
+       52 * CLOCK_1M,
+       52 * CLOCK_1M,
+       78 * CLOCK_1M,
+       104 * CLOCK_1M,
+       104 * CLOCK_1M,
+       156 * CLOCK_1M
+};
+
+unsigned long slave_axi_freq_tbl[8] = {
+       26 * CLOCK_1M,
+       52 * CLOCK_1M,
+       78 * CLOCK_1M,
+       104 * CLOCK_1M,
+       156 * CLOCK_1M,
+       156 * CLOCK_1M
+};
+
+unsigned long slave_apb_freq_tbl[8] = {
+       26 * CLOCK_1M,
+       26 * CLOCK_1M,
+       39 * CLOCK_1M,
+       52 * CLOCK_1M,
+       52 * CLOCK_1M,
+       78 * CLOCK_1M
+};
+
+unsigned long esub_freq_tbl[8] = {
+       78 * CLOCK_1M,
+       156 * CLOCK_1M,
+       156 * CLOCK_1M,
+       156 * CLOCK_1M,
+       208 * CLOCK_1M,
+       208 * CLOCK_1M,
+       208 * CLOCK_1M
+};
+
+static struct bus_clk_data bsc1_apb_data = {
+       .gate = HW_SW_GATE_AUTO(0x0458, 16, 0, 1),
+};
+
+static struct bus_clk_data bsc2_apb_data = {
+       .gate = HW_SW_GATE_AUTO(0x045c, 16, 0, 1),
+};
+
+static struct bus_clk_data bsc3_apb_data = {
+       .gate = HW_SW_GATE_AUTO(0x0484, 16, 0, 1),
+};
+
+/* * Master CCU clocks */
+static struct peri_clk_data sdio1_data = {
+       .gate           = HW_SW_GATE(0x0358, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_52m",
+                                "ref_52m",
+                                "var_96m",
+                                "ref_96m"),
+       .sel            = SELECTOR(0x0a28, 0, 3),
+       .div            = DIVIDER(0x0a28, 4, 14),
+       .trig           = TRIGGER(0x0afc, 9),
+};
+
+static struct peri_clk_data sdio2_data = {
+       .gate           = HW_SW_GATE(0x035c, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_52m",
+                                "ref_52m",
+                                "var_96m",
+                                "ref_96m"),
+       .sel            = SELECTOR(0x0a2c, 0, 3),
+       .div            = DIVIDER(0x0a2c, 4, 14),
+       .trig           = TRIGGER(0x0afc, 10),
+};
+
+static struct peri_clk_data sdio3_data = {
+       .gate           = HW_SW_GATE(0x0364, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_52m",
+                                "ref_52m",
+                                "var_96m",
+                                "ref_96m"),
+       .sel            = SELECTOR(0x0a34, 0, 3),
+       .div            = DIVIDER(0x0a34, 4, 14),
+       .trig           = TRIGGER(0x0afc, 12),
+};
+
+static struct peri_clk_data sdio4_data = {
+       .gate           = HW_SW_GATE(0x0360, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_52m",
+                                "ref_52m",
+                                "var_96m",
+                                "ref_96m"),
+       .sel            = SELECTOR(0x0a30, 0, 3),
+       .div            = DIVIDER(0x0a30, 4, 14),
+       .trig           = TRIGGER(0x0afc, 11),
+};
+
+static struct peri_clk_data sdio1_sleep_data = {
+       .clocks         = CLOCKS("ref_32k"),
+       .gate           = SW_ONLY_GATE(0x0358, 20, 4),
+};
+
+static struct peri_clk_data sdio2_sleep_data = {
+       .clocks         = CLOCKS("ref_32k"),
+       .gate           = SW_ONLY_GATE(0x035c, 20, 4),
+};
+
+static struct peri_clk_data sdio3_sleep_data = {
+       .clocks         = CLOCKS("ref_32k"),
+       .gate           = SW_ONLY_GATE(0x0364, 20, 4),
+};
+
+static struct peri_clk_data sdio4_sleep_data = {
+       .clocks         = CLOCKS("ref_32k"),
+       .gate           = SW_ONLY_GATE(0x0360, 20, 4),
+};
+
+static struct bus_clk_data usb_otg_ahb_data = {
+       .gate           = HW_SW_GATE_AUTO(0x0348, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio1_ahb_data = {
+       .gate           = HW_SW_GATE_AUTO(0x0358, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio2_ahb_data = {
+       .gate           = HW_SW_GATE_AUTO(0x035c, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio3_ahb_data = {
+       .gate           = HW_SW_GATE_AUTO(0x0364, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio4_ahb_data = {
+       .gate           = HW_SW_GATE_AUTO(0x0360, 16, 0, 1),
+};
+
+/* * Slave CCU clocks */
+static struct peri_clk_data bsc1_data = {
+       .gate           = HW_SW_GATE(0x0458, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_104m",
+                                "ref_104m",
+                                "var_13m",
+                                "ref_13m"),
+       .sel            = SELECTOR(0x0a64, 0, 3),
+       .trig           = TRIGGER(0x0afc, 23),
+};
+
+static struct peri_clk_data bsc2_data = {
+       .gate           = HW_SW_GATE(0x045c, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_104m",
+                                "ref_104m",
+                                "var_13m",
+                                "ref_13m"),
+       .sel            = SELECTOR(0x0a68, 0, 3),
+       .trig           = TRIGGER(0x0afc, 24),
+};
+
+static struct peri_clk_data bsc3_data = {
+       .gate           = HW_SW_GATE(0x0484, 18, 2, 3),
+       .clocks         = CLOCKS("ref_crystal",
+                                "var_104m",
+                                "ref_104m",
+                                "var_13m",
+                                "ref_13m"),
+       .sel            = SELECTOR(0x0a84, 0, 3),
+       .trig           = TRIGGER(0x0b00, 2),
+};
+
+/*
+ * CCU clocks
+ */
+
+static struct ccu_clock kpm_ccu_clk = {
+       .clk = {
+               .name = "kpm_ccu_clk",
+               .ops = &ccu_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .num_policy_masks = 1,
+       .policy_freq_offset = 0x00000008,
+       .freq_bit_shift = 8,
+       .policy_ctl_offset = 0x0000000c,
+       .policy0_mask_offset = 0x00000010,
+       .policy1_mask_offset = 0x00000014,
+       .policy2_mask_offset = 0x00000018,
+       .policy3_mask_offset = 0x0000001c,
+       .lvm_en_offset = 0x00000034,
+       .freq_id = 2,
+       .freq_tbl = master_axi_freq_tbl,
+};
+
+static struct ccu_clock kps_ccu_clk = {
+       .clk = {
+               .name = "kps_ccu_clk",
+               .ops = &ccu_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+       },
+       .num_policy_masks = 2,
+       .policy_freq_offset = 0x00000008,
+       .freq_bit_shift = 8,
+       .policy_ctl_offset = 0x0000000c,
+       .policy0_mask_offset = 0x00000010,
+       .policy1_mask_offset = 0x00000014,
+       .policy2_mask_offset = 0x00000018,
+       .policy3_mask_offset = 0x0000001c,
+       .policy0_mask2_offset = 0x00000048,
+       .policy1_mask2_offset = 0x0000004c,
+       .policy2_mask2_offset = 0x00000050,
+       .policy3_mask2_offset = 0x00000054,
+       .lvm_en_offset = 0x00000034,
+       .freq_id = 2,
+       .freq_tbl = slave_axi_freq_tbl,
+};
+
+#ifdef CONFIG_BCM_SF2_ETH
+static struct ccu_clock esub_ccu_clk = {
+       .clk = {
+               .name = "esub_ccu_clk",
+               .ops = &ccu_clk_ops,
+               .ccu_clk_mgr_base = ESUB_CLK_BASE_ADDR,
+       },
+       .num_policy_masks = 1,
+       .policy_freq_offset = 0x00000008,
+       .freq_bit_shift = 8,
+       .policy_ctl_offset = 0x0000000c,
+       .policy0_mask_offset = 0x00000010,
+       .policy1_mask_offset = 0x00000014,
+       .policy2_mask_offset = 0x00000018,
+       .policy3_mask_offset = 0x0000001c,
+       .lvm_en_offset = 0x00000034,
+       .freq_id = 2,
+       .freq_tbl = esub_freq_tbl,
+};
+#endif
+
+/*
+ * Bus clocks
+ */
+
+/* KPM bus clocks */
+static struct bus_clock usb_otg_ahb_clk = {
+       .clk = {
+               .name = "usb_otg_ahb_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .freq_tbl = master_ahb_freq_tbl,
+       .data = &usb_otg_ahb_data,
+};
+
+static struct bus_clock sdio1_ahb_clk = {
+       .clk = {
+               .name = "sdio1_ahb_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .freq_tbl = master_ahb_freq_tbl,
+       .data = &sdio1_ahb_data,
+};
+
+static struct bus_clock sdio2_ahb_clk = {
+       .clk = {
+               .name = "sdio2_ahb_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .freq_tbl = master_ahb_freq_tbl,
+       .data = &sdio2_ahb_data,
+};
+
+static struct bus_clock sdio3_ahb_clk = {
+       .clk = {
+               .name = "sdio3_ahb_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .freq_tbl = master_ahb_freq_tbl,
+       .data = &sdio3_ahb_data,
+};
+
+static struct bus_clock sdio4_ahb_clk = {
+       .clk = {
+               .name = "sdio4_ahb_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .freq_tbl = master_ahb_freq_tbl,
+       .data = &sdio4_ahb_data,
+};
+
+static struct bus_clock bsc1_apb_clk = {
+       .clk = {
+               .name = "bsc1_apb_clk",
+               .parent = &kps_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+       },
+       .freq_tbl = slave_apb_freq_tbl,
+       .data = &bsc1_apb_data,
+};
+
+static struct bus_clock bsc2_apb_clk = {
+       .clk = {
+               .name = "bsc2_apb_clk",
+               .parent = &kps_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+               },
+       .freq_tbl = slave_apb_freq_tbl,
+       .data = &bsc2_apb_data,
+};
+
+static struct bus_clock bsc3_apb_clk = {
+       .clk = {
+               .name = "bsc3_apb_clk",
+               .parent = &kps_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+               },
+       .freq_tbl = slave_apb_freq_tbl,
+       .data = &bsc3_apb_data,
+};
+
+/* KPM peripheral */
+static struct peri_clock sdio1_clk = {
+       .clk = {
+               .name = "sdio1_clk",
+               .parent = &ref_52m.clk,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio1_data,
+};
+
+static struct peri_clock sdio2_clk = {
+       .clk = {
+               .name = "sdio2_clk",
+               .parent = &ref_52m.clk,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio2_data,
+};
+
+static struct peri_clock sdio3_clk = {
+       .clk = {
+               .name = "sdio3_clk",
+               .parent = &ref_52m.clk,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio3_data,
+};
+
+static struct peri_clock sdio4_clk = {
+       .clk = {
+               .name = "sdio4_clk",
+               .parent = &ref_52m.clk,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio4_data,
+};
+
+static struct peri_clock sdio1_sleep_clk = {
+       .clk = {
+               .name = "sdio1_sleep_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio1_sleep_data,
+};
+
+static struct peri_clock sdio2_sleep_clk = {
+       .clk = {
+               .name = "sdio2_sleep_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio2_sleep_data,
+};
+
+static struct peri_clock sdio3_sleep_clk = {
+       .clk = {
+               .name = "sdio3_sleep_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio3_sleep_data,
+};
+
+static struct peri_clock sdio4_sleep_clk = {
+       .clk = {
+               .name = "sdio4_sleep_clk",
+               .parent = &kpm_ccu_clk.clk,
+               .ops = &bus_clk_ops,
+               .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR,
+       },
+       .data = &sdio4_sleep_data,
+};
+
+/* KPS peripheral clock */
+static struct peri_clock bsc1_clk = {
+       .clk = {
+               .name = "bsc1_clk",
+               .parent = &ref_13m.clk,
+               .rate = 13 * CLOCK_1M,
+               .div = 1,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+       },
+       .data = &bsc1_data,
+};
+
+static struct peri_clock bsc2_clk = {
+       .clk = {
+               .name = "bsc2_clk",
+               .parent = &ref_13m.clk,
+               .rate = 13 * CLOCK_1M,
+               .div = 1,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+       },
+       .data = &bsc2_data,
+};
+
+static struct peri_clock bsc3_clk = {
+       .clk = {
+               .name = "bsc3_clk",
+               .parent = &ref_13m.clk,
+               .rate = 13 * CLOCK_1M,
+               .div = 1,
+               .ops = &peri_clk_ops,
+               .ccu_clk_mgr_base = KONA_SLV_CLK_BASE_ADDR,
+       },
+       .data = &bsc3_data,
+};
+
+/* public table for registering clocks */
+struct clk_lookup arch_clk_tbl[] = {
+       /* Peripheral clocks */
+       CLK_LK(sdio1),
+       CLK_LK(sdio2),
+       CLK_LK(sdio3),
+       CLK_LK(sdio4),
+       CLK_LK(sdio1_sleep),
+       CLK_LK(sdio2_sleep),
+       CLK_LK(sdio3_sleep),
+       CLK_LK(sdio4_sleep),
+       CLK_LK(bsc1),
+       CLK_LK(bsc2),
+       CLK_LK(bsc3),
+       /* Bus clocks */
+       CLK_LK(usb_otg_ahb),
+       CLK_LK(sdio1_ahb),
+       CLK_LK(sdio2_ahb),
+       CLK_LK(sdio3_ahb),
+       CLK_LK(sdio4_ahb),
+       CLK_LK(bsc1_apb),
+       CLK_LK(bsc2_apb),
+       CLK_LK(bsc3_apb),
+#ifdef CONFIG_BCM_SF2_ETH
+       CLK_LK(esub_ccu),
+#endif
+};
+
+/* public array size */
+unsigned int arch_clk_tbl_array_size = ARRAY_SIZE(arch_clk_tbl);

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
new file mode 100644 (file)
index 0000000..d263068
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-bsc.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/arch/sysmap.h>
+#include <asm/kona-common/clk.h>
+#include "clk-core.h"
+
+/* Enable appropriate clocks for a BSC/I2C port */
+int clk_bsc_enable(void *base)
+{
+       int ret;
+       char *bscstr, *apbstr;
+
+       switch ((u32) base) {
+       case PMU_BSC_BASE_ADDR:
+               /* PMU clock is always enabled */
+               return 0;
+       case BSC1_BASE_ADDR:
+               bscstr = "bsc1_clk";
+               apbstr = "bsc1_apb_clk";
+               break;
+       case BSC2_BASE_ADDR:
+               bscstr = "bsc2_clk";
+               apbstr = "bsc2_apb_clk";
+               break;
+       case BSC3_BASE_ADDR:
+               bscstr = "bsc3_clk";
+               apbstr = "bsc3_apb_clk";
+               break;
+       default:
+               printf("%s: base 0x%p not found\n", __func__, base);
+               return -EINVAL;
+       }
+
+       /* Note that the bus clock must be enabled first */
+
+       ret = clk_get_and_enable(apbstr);
+       if (ret)
+               return ret;
+
+       ret = clk_get_and_enable(bscstr);
+       if (ret)
+               return ret;
+
+       return 0;
+}

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
new file mode 100644 (file)
index 0000000..2b5da6b
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
@@ -0,0 +1,513 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/*
+ *
+ * bcm235xx architecture clock framework
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <bitfield.h>
+#include <asm/arch/sysmap.h>
+#include <asm/kona-common/clk.h>
+#include "clk-core.h"
+
+#define CLK_WR_ACCESS_PASSWORD 0x00a5a501
+#define WR_ACCESS_OFFSET       0       /* common to all clock blocks */
+#define POLICY_CTL_GO          1       /* Load and refresh policy masks */
+#define POLICY_CTL_GO_ATL      4       /* Active Load */
+
+/* Helper function */
+int clk_get_and_enable(char *clkstr)
+{
+       int ret = 0;
+       struct clk *c;
+
+       debug("%s: %s\n", __func__, clkstr);
+
+       c = clk_get(clkstr);
+       if (c) {
+               ret = clk_enable(c);
+               if (ret)
+                       return ret;
+       } else {
+               printf("%s: Couldn't find %s\n", __func__, clkstr);
+               return -EINVAL;
+       }
+       return ret;
+}
+
+/*
+ * Poll a register in a CCU's address space, returning when the
+ * specified bit in that register's value is set (or clear). Delay
+ * a microsecond after each read of the register. Returns true if
+ * successful, or false if we gave up trying.
+ *
+ * Caller must ensure the CCU lock is held.
+ */
+#define CLK_GATE_DELAY_USEC 2000
+static inline int wait_bit(void *base, u32 offset, u32 bit, bool want)
+{
+       unsigned int tries;
+       u32 bit_mask = 1 << bit;
+
+       for (tries = 0; tries < CLK_GATE_DELAY_USEC; tries++) {
+               u32 val;
+               bool bit_val;
+
+               val = readl(base + offset);
+               bit_val = (val & bit_mask) ? 1 : 0;
+               if (bit_val == want)
+                       return 0;       /* success */
+               udelay(1);
+       }
+
+       debug("%s: timeout on addr 0x%p, waiting for bit %d to go to %d\n",
+             __func__, base + offset, bit, want);
+
+       return -ETIMEDOUT;
+}
+
+/* Enable a peripheral clock */
+static int peri_clk_enable(struct clk *c, int enable)
+{
+       int ret = 0;
+       u32 reg;
+       struct peri_clock *peri_clk = to_peri_clk(c);
+       struct peri_clk_data *cd = peri_clk->data;
+       struct bcm_clk_gate *gate = &cd->gate;
+       void *base = (void *)c->ccu_clk_mgr_base;
+
+
+       debug("%s: %s\n", __func__, c->name);
+
+       clk_get_rate(c);        /* Make sure rate and sel are filled in */
+
+       /* enable access */
+       writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET);
+
+       if (enable) {
+               debug("%s %s set rate %lu div %lu sel %d parent %lu\n",
+                     __func__, c->name, c->rate, c->div, c->sel,
+                     c->parent->rate);
+
+               /*
+                * clkgate - only software controllable gates are
+                * supported by u-boot which includes all clocks
+                * that matter. This avoids bringing in a lot of extra
+                * complexity as done in the kernel framework.
+                */
+               if (gate_exists(gate)) {
+                       reg = readl(base + cd->gate.offset);
+                       reg |= (1 << cd->gate.en_bit);
+                       writel(reg, base + cd->gate.offset);
+               }
+
+               /* div and pll select */
+               if (divider_exists(&cd->div)) {
+                       reg = readl(base + cd->div.offset);
+                       bitfield_replace(reg, cd->div.shift, cd->div.width,
+                                        c->div - 1);
+                       writel(reg, base + cd->div.offset);
+               }
+
+               /* frequency selector */
+               if (selector_exists(&cd->sel)) {
+                       reg = readl(base + cd->sel.offset);
+                       bitfield_replace(reg, cd->sel.shift, cd->sel.width,
+                                        c->sel);
+                       writel(reg, base + cd->sel.offset);
+               }
+
+               /* trigger */
+               if (trigger_exists(&cd->trig)) {
+                       writel((1 << cd->trig.bit), base + cd->trig.offset);
+
+                       /* wait for trigger status bit to go to 0 */
+                       ret = wait_bit(base, cd->trig.offset, cd->trig.bit, 0);
+                       if (ret)
+                               return ret;
+               }
+
+               /* wait for running (status_bit = 1) */
+               ret = wait_bit(base, cd->gate.offset, cd->gate.status_bit, 1);
+               if (ret)
+                       return ret;
+       } else {
+               debug("%s disable clock %s\n", __func__, c->name);
+
+               /* clkgate */
+               reg = readl(base + cd->gate.offset);
+               reg &= ~(1 << cd->gate.en_bit);
+               writel(reg, base + cd->gate.offset);
+
+               /* wait for stop (status_bit = 0) */
+               ret = wait_bit(base, cd->gate.offset, cd->gate.status_bit, 0);
+       }
+
+       /* disable access */
+       writel(0, base + WR_ACCESS_OFFSET);
+
+       return ret;
+}
+
+/* Set the rate of a peripheral clock */
+static int peri_clk_set_rate(struct clk *c, unsigned long rate)
+{
+       int ret = 0;
+       int i;
+       unsigned long diff;
+       unsigned long new_rate = 0, div = 1;
+       struct peri_clock *peri_clk = to_peri_clk(c);
+       struct peri_clk_data *cd = peri_clk->data;
+       const char **clock;
+
+       debug("%s: %s\n", __func__, c->name);
+       diff = rate;
+
+       i = 0;
+       for (clock = cd->clocks; *clock; clock++, i++) {
+               struct refclk *ref = refclk_str_to_clk(*clock);
+               if (!ref) {
+                       printf("%s: Lookup of %s failed\n", __func__, *clock);
+                       return -EINVAL;
+               }
+
+               /* round to the new rate */
+               div = ref->clk.rate / rate;
+               if (div == 0)
+                       div = 1;
+
+               new_rate = ref->clk.rate / div;
+
+               /* get the min diff */
+               if (abs(new_rate - rate) < diff) {
+                       diff = abs(new_rate - rate);
+                       c->sel = i;
+                       c->parent = &ref->clk;
+                       c->rate = new_rate;
+                       c->div = div;
+               }
+       }
+
+       debug("%s %s set rate %lu div %lu sel %d parent %lu\n", __func__,
+             c->name, c->rate, c->div, c->sel, c->parent->rate);
+       return ret;
+}
+
+/* Get the rate of a peripheral clock */
+static unsigned long peri_clk_get_rate(struct clk *c)
+{
+       struct peri_clock *peri_clk = to_peri_clk(c);
+       struct peri_clk_data *cd = peri_clk->data;
+       void *base = (void *)c->ccu_clk_mgr_base;
+       int div = 1;
+       const char **clock;
+       struct refclk *ref;
+       u32 reg;
+
+       debug("%s: %s\n", __func__, c->name);
+       if (selector_exists(&cd->sel)) {
+               reg = readl(base + cd->sel.offset);
+               c->sel = bitfield_extract(reg, cd->sel.shift, cd->sel.width);
+       } else {
+               /*
+                * For peri clocks that don't have a selector, the single
+                * reference clock will always exist at index 0.
+                */
+               c->sel = 0;
+       }
+
+       if (divider_exists(&cd->div)) {
+               reg = readl(base + cd->div.offset);
+               div = bitfield_extract(reg, cd->div.shift, cd->div.width);
+               div += 1;
+       }
+
+       clock = cd->clocks;
+       ref = refclk_str_to_clk(clock[c->sel]);
+       if (!ref) {
+               printf("%s: Can't lookup %s\n", __func__, clock[c->sel]);
+               return 0;
+       }
+
+       c->parent = &ref->clk;
+       c->div = div;
+       c->rate = c->parent->rate / c->div;
+       debug("%s parent rate %lu div %d sel %d rate %lu\n", __func__,
+             c->parent->rate, div, c->sel, c->rate);
+
+       return c->rate;
+}
+
+/* Peripheral clock operations */
+struct clk_ops peri_clk_ops = {
+       .enable = peri_clk_enable,
+       .set_rate = peri_clk_set_rate,
+       .get_rate = peri_clk_get_rate,
+};
+
+/* Enable a CCU clock */
+static int ccu_clk_enable(struct clk *c, int enable)
+{
+       struct ccu_clock *ccu_clk = to_ccu_clk(c);
+       void *base = (void *)c->ccu_clk_mgr_base;
+       int ret = 0;
+       u32 reg;
+
+       debug("%s: %s\n", __func__, c->name);
+       if (!enable)
+               return -EINVAL; /* CCU clock cannot shutdown */
+
+       /* enable access */
+       writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET);
+
+       /* config enable for policy engine */
+       writel(1, base + ccu_clk->lvm_en_offset);
+
+       /* wait for bit to go to 0 */
+       ret = wait_bit(base, ccu_clk->lvm_en_offset, 0, 0);
+       if (ret)
+               return ret;
+
+       /* freq ID */
+       if (!ccu_clk->freq_bit_shift)
+               ccu_clk->freq_bit_shift = 8;
+
+       /* Set frequency id for each of the 4 policies */
+       reg = ccu_clk->freq_id |
+           (ccu_clk->freq_id << (ccu_clk->freq_bit_shift)) |
+           (ccu_clk->freq_id << (ccu_clk->freq_bit_shift * 2)) |
+           (ccu_clk->freq_id << (ccu_clk->freq_bit_shift * 3));
+       writel(reg, base + ccu_clk->policy_freq_offset);
+
+       /* enable all clock mask */
+       writel(0x7fffffff, base + ccu_clk->policy0_mask_offset);
+       writel(0x7fffffff, base + ccu_clk->policy1_mask_offset);
+       writel(0x7fffffff, base + ccu_clk->policy2_mask_offset);
+       writel(0x7fffffff, base + ccu_clk->policy3_mask_offset);
+
+       if (ccu_clk->num_policy_masks == 2) {
+               writel(0x7fffffff, base + ccu_clk->policy0_mask2_offset);
+               writel(0x7fffffff, base + ccu_clk->policy1_mask2_offset);
+               writel(0x7fffffff, base + ccu_clk->policy2_mask2_offset);
+               writel(0x7fffffff, base + ccu_clk->policy3_mask2_offset);
+       }
+
+       /* start policy engine */
+       reg = readl(base + ccu_clk->policy_ctl_offset);
+       reg |= (POLICY_CTL_GO + POLICY_CTL_GO_ATL);
+       writel(reg, base + ccu_clk->policy_ctl_offset);
+
+       /* wait till started */
+       ret = wait_bit(base, ccu_clk->policy_ctl_offset, 0, 0);
+       if (ret)
+               return ret;
+
+       /* disable access */
+       writel(0, base + WR_ACCESS_OFFSET);
+
+       return ret;
+}
+
+/* Get the CCU clock rate */
+static unsigned long ccu_clk_get_rate(struct clk *c)
+{
+       struct ccu_clock *ccu_clk = to_ccu_clk(c);
+       debug("%s: %s\n", __func__, c->name);
+       c->rate = ccu_clk->freq_tbl[ccu_clk->freq_id];
+       return c->rate;
+}
+
+/* CCU clock operations */
+struct clk_ops ccu_clk_ops = {
+       .enable = ccu_clk_enable,
+       .get_rate = ccu_clk_get_rate,
+};
+
+/* Enable a bus clock */
+static int bus_clk_enable(struct clk *c, int enable)
+{
+       struct bus_clock *bus_clk = to_bus_clk(c);
+       struct bus_clk_data *cd = bus_clk->data;
+       void *base = (void *)c->ccu_clk_mgr_base;
+       int ret = 0;
+       u32 reg;
+
+       debug("%s: %s\n", __func__, c->name);
+       /* enable access */
+       writel(CLK_WR_ACCESS_PASSWORD, base + WR_ACCESS_OFFSET);
+
+       /* enable gating */
+       reg = readl(base + cd->gate.offset);
+       if (!!(reg & (1 << cd->gate.status_bit)) == !!enable)
+               debug("%s already %s\n", c->name,
+                     enable ? "enabled" : "disabled");
+       else {
+               int want = (enable) ? 1 : 0;
+               reg |= (1 << cd->gate.hw_sw_sel_bit);
+
+               if (enable)
+                       reg |= (1 << cd->gate.en_bit);
+               else
+                       reg &= ~(1 << cd->gate.en_bit);
+
+               writel(reg, base + cd->gate.offset);
+               ret = wait_bit(base, cd->gate.offset, cd->gate.status_bit,
+                              want);
+               if (ret)
+                       return ret;
+       }
+
+       /* disable access */
+       writel(0, base + WR_ACCESS_OFFSET);
+
+       return ret;
+}
+
+/* Get the rate of a bus clock */
+static unsigned long bus_clk_get_rate(struct clk *c)
+{
+       struct bus_clock *bus_clk = to_bus_clk(c);
+       struct ccu_clock *ccu_clk;
+
+       debug("%s: %s\n", __func__, c->name);
+       ccu_clk = to_ccu_clk(c->parent);
+
+       c->rate = bus_clk->freq_tbl[ccu_clk->freq_id];
+       c->div = ccu_clk->freq_tbl[ccu_clk->freq_id] / c->rate;
+       return c->rate;
+}
+
+/* Bus clock operations */
+struct clk_ops bus_clk_ops = {
+       .enable = bus_clk_enable,
+       .get_rate = bus_clk_get_rate,
+};
+
+/* Enable a reference clock */
+static int ref_clk_enable(struct clk *c, int enable)
+{
+       debug("%s: %s\n", __func__, c->name);
+       return 0;
+}
+
+/* Reference clock operations */
+struct clk_ops ref_clk_ops = {
+       .enable = ref_clk_enable,
+};
+
+/*
+ * clk.h implementation follows
+ */
+
+/* Initialize the clock framework */
+int clk_init(void)
+{
+       debug("%s:\n", __func__);
+       return 0;
+}
+
+/* Get a clock handle, give a name string */
+struct clk *clk_get(const char *con_id)
+{
+       int i;
+       struct clk_lookup *clk_tblp;
+
+       debug("%s: %s\n", __func__, con_id);
+
+       clk_tblp = arch_clk_tbl;
+       for (i = 0; i < arch_clk_tbl_array_size; i++, clk_tblp++) {
+               if (clk_tblp->con_id) {
+                       if (!con_id || strcmp(clk_tblp->con_id, con_id))
+                               continue;
+                       return clk_tblp->clk;
+               }
+       }
+       return NULL;
+}
+
+/* Enable a clock */
+int clk_enable(struct clk *c)
+{
+       int ret = 0;
+
+       debug("%s: %s\n", __func__, c->name);
+       if (!c->ops || !c->ops->enable)
+               return -1;
+
+       /* enable parent clock first */
+       if (c->parent)
+               ret = clk_enable(c->parent);
+
+       if (ret)
+               return ret;
+
+       if (!c->use_cnt) {
+               c->use_cnt++;
+               ret = c->ops->enable(c, 1);
+       }
+
+       return ret;
+}
+
+/* Disable a clock */
+void clk_disable(struct clk *c)
+{
+       debug("%s: %s\n", __func__, c->name);
+       if (!c->ops || !c->ops->enable)
+               return;
+
+       if (c->use_cnt) {
+               c->use_cnt--;
+               c->ops->enable(c, 0);
+       }
+
+       /* disable parent */
+       if (c->parent)
+               clk_disable(c->parent);
+}
+
+/* Get the clock rate */
+unsigned long clk_get_rate(struct clk *c)
+{
+       unsigned long rate;
+
+       debug("%s: %s\n", __func__, c->name);
+       if (!c || !c->ops || !c->ops->get_rate)
+               return 0;
+
+       rate = c->ops->get_rate(c);
+       debug("%s: rate = %ld\n", __func__, rate);
+       return rate;
+}
+
+/* Set the clock rate */
+int clk_set_rate(struct clk *c, unsigned long rate)
+{
+       int ret;
+
+       debug("%s: %s rate=%ld\n", __func__, c->name, rate);
+       if (!c || !c->ops || !c->ops->set_rate)
+               return -EINVAL;
+
+       if (c->use_cnt)
+               return -EINVAL;
+
+       ret = c->ops->set_rate(c, rate);
+
+       return ret;
+}
+
+/* Not required for this arch */
+/*
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+*/

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.h b/arch/arm/cpu/armv7/bcm235xx/clk-core.h
new file mode 100644 (file)
index 0000000..de9a1ef
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.h
@@ -0,0 +1,491 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <linux/stddef.h>
+
+#ifdef CONFIG_CLK_DEBUG
+#undef writel
+#undef readl
+static inline void writel(u32 val, void *addr)
+{
+       printf("Write [0x%p] = 0x%08x\n", addr, val);
+       *(u32 *)addr = val;
+}
+
+static inline u32 readl(void *addr)
+{
+       u32 val = *(u32 *)addr;
+       printf("Read  [0x%p] = 0x%08x\n", addr, val);
+       return val;
+}
+#endif
+
+struct clk;
+
+struct clk_lookup {
+       const char *dev_id;
+       const char *con_id;
+       struct clk *clk;
+};
+
+extern struct clk_lookup arch_clk_tbl[];
+extern unsigned int arch_clk_tbl_array_size;
+
+/**
+ * struct clk_ops - standard clock operations
+ * @enable: enable/disable clock, see clk_enable() and clk_disable()
+ * @set_rate: set the clock rate, see clk_set_rate().
+ * @get_rate: get the clock rate, see clk_get_rate().
+ * @round_rate: round a given clock rate, see clk_round_rate().
+ * @set_parent: set the clock's parent, see clk_set_parent().
+ *
+ * Group the common clock implementations together so that we
+ * don't have to keep setting the same fiels again. We leave
+ * enable in struct clk.
+ *
+ */
+struct clk_ops {
+       int (*enable)(struct clk *c, int enable);
+       int (*set_rate)(struct clk *c, unsigned long rate);
+       unsigned long (*get_rate)(struct clk *c);
+       unsigned long (*round_rate)(struct clk *c, unsigned long rate);
+       int (*set_parent)(struct clk *c, struct clk *parent);
+};
+
+struct clk {
+       struct clk *parent;
+       const char *name;
+       int use_cnt;
+       unsigned long rate;     /* in HZ */
+
+       /* programmable divider. 0 means fixed ratio to parent clock */
+       unsigned long div;
+
+       struct clk_src *src;
+       struct clk_ops *ops;
+
+       unsigned long ccu_clk_mgr_base;
+       int sel;
+};
+
+struct refclk *refclk_str_to_clk(const char *name);
+
+/* The common clock framework uses u8 to represent a parent index */
+#define PARENT_COUNT_MAX       ((u32)U8_MAX)
+
+#define BAD_CLK_INDEX          U8_MAX  /* Can't ever be valid */
+#define BAD_CLK_NAME           ((const char *)-1)
+
+#define BAD_SCALED_DIV_VALUE   U64_MAX
+
+/*
+ * Utility macros for object flag management. If possible, flags
+ * should be defined such that 0 is the desired default value.
+ */
+#define FLAG(type, flag)               BCM_CLK_ ## type ## _FLAGS_ ## flag
+#define FLAG_SET(obj, type, flag)      ((obj)->flags |= FLAG(type, flag))
+#define FLAG_CLEAR(obj, type, flag)    ((obj)->flags &= ~(FLAG(type, flag)))
+#define FLAG_FLIP(obj, type, flag)     ((obj)->flags ^= FLAG(type, flag))
+#define FLAG_TEST(obj, type, flag)     (!!((obj)->flags & FLAG(type, flag)))
+
+/* Clock field state tests */
+
+#define gate_exists(gate)              FLAG_TEST(gate, GATE, EXISTS)
+#define gate_is_enabled(gate)          FLAG_TEST(gate, GATE, ENABLED)
+#define gate_is_hw_controllable(gate)  FLAG_TEST(gate, GATE, HW)
+#define gate_is_sw_controllable(gate)  FLAG_TEST(gate, GATE, SW)
+#define gate_is_sw_managed(gate)       FLAG_TEST(gate, GATE, SW_MANAGED)
+#define gate_is_no_disable(gate)       FLAG_TEST(gate, GATE, NO_DISABLE)
+
+#define gate_flip_enabled(gate)                FLAG_FLIP(gate, GATE, ENABLED)
+
+#define divider_exists(div)            FLAG_TEST(div, DIV, EXISTS)
+#define divider_is_fixed(div)          FLAG_TEST(div, DIV, FIXED)
+#define divider_has_fraction(div)      (!divider_is_fixed(div) && \
+                                               (div)->frac_width > 0)
+
+#define selector_exists(sel)           ((sel)->width != 0)
+#define trigger_exists(trig)           FLAG_TEST(trig, TRIG, EXISTS)
+
+/* Clock type, used to tell common block what it's part of */
+enum bcm_clk_type {
+       bcm_clk_none,           /* undefined clock type */
+       bcm_clk_bus,
+       bcm_clk_core,
+       bcm_clk_peri
+};
+
+/*
+ * Gating control and status is managed by a 32-bit gate register.
+ *
+ * There are several types of gating available:
+ * - (no gate)
+ *     A clock with no gate is assumed to be always enabled.
+ * - hardware-only gating (auto-gating)
+ *     Enabling or disabling clocks with this type of gate is
+ *     managed automatically by the hardware. Such clocks can be
+ *     considered by the software to be enabled. The current status
+ *     of auto-gated clocks can be read from the gate status bit.
+ * - software-only gating
+ *     Auto-gating is not available for this type of clock.
+ *     Instead, software manages whether it's enabled by setting or
+ *     clearing the enable bit. The current gate status of a gate
+ *     under software control can be read from the gate status bit.
+ *     To ensure a change to the gating status is complete, the
+ *     status bit can be polled to verify that the gate has entered
+ *     the desired state.
+ * - selectable hardware or software gating
+ *     Gating for this type of clock can be configured to be either
+ *     under software or hardware control. Which type is in use is
+ *     determined by the hw_sw_sel bit of the gate register.
+ */
+struct bcm_clk_gate {
+       u32 offset;             /* gate register offset */
+       u32 status_bit;         /* 0: gate is disabled; 0: gatge is enabled */
+       u32 en_bit;             /* 0: disable; 1: enable */
+       u32 hw_sw_sel_bit;      /* 0: hardware gating; 1: software gating */
+       u32 flags;              /* BCM_CLK_GATE_FLAGS_* below */
+};
+
+/*
+ * Gate flags:
+ *   HW         means this gate can be auto-gated
+ *   SW         means the state of this gate can be software controlled
+ *   NO_DISABLE means this gate is (only) enabled if under software control
+ *   SW_MANAGED means the status of this gate is under software control
+ *   ENABLED    means this software-managed gate is *supposed* to be enabled
+ */
+#define BCM_CLK_GATE_FLAGS_EXISTS      ((u32)1 << 0)   /* Gate is valid */
+#define BCM_CLK_GATE_FLAGS_HW          ((u32)1 << 1)   /* Can auto-gate */
+#define BCM_CLK_GATE_FLAGS_SW          ((u32)1 << 2)   /* Software control */
+#define BCM_CLK_GATE_FLAGS_NO_DISABLE  ((u32)1 << 3)   /* HW or enabled */
+#define BCM_CLK_GATE_FLAGS_SW_MANAGED  ((u32)1 << 4)   /* SW now in control */
+#define BCM_CLK_GATE_FLAGS_ENABLED     ((u32)1 << 5)   /* If SW_MANAGED */
+
+/*
+ * Gate initialization macros.
+ *
+ * Any gate initially under software control will be enabled.
+ */
+
+/* A hardware/software gate initially under software control */
+#define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit)      \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .status_bit = (_status_bit),                            \
+               .en_bit = (_en_bit),                                    \
+               .hw_sw_sel_bit = (_hw_sw_sel_bit),                      \
+               .flags = FLAG(GATE, HW)|FLAG(GATE, SW)|                 \
+                       FLAG(GATE, SW_MANAGED)|FLAG(GATE, ENABLED)|     \
+                       FLAG(GATE, EXISTS),                             \
+       }
+
+/* A hardware/software gate initially under hardware control */
+#define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .status_bit = (_status_bit),                            \
+               .en_bit = (_en_bit),                                    \
+               .hw_sw_sel_bit = (_hw_sw_sel_bit),                      \
+               .flags = FLAG(GATE, HW)|FLAG(GATE, SW)|                 \
+                       FLAG(GATE, EXISTS),                             \
+       }
+
+/* A hardware-or-enabled gate (enabled if not under hardware control) */
+#define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit)  \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .status_bit = (_status_bit),                            \
+               .en_bit = (_en_bit),                                    \
+               .hw_sw_sel_bit = (_hw_sw_sel_bit),                      \
+               .flags = FLAG(GATE, HW)|FLAG(GATE, SW)|                 \
+                       FLAG(GATE, NO_DISABLE)|FLAG(GATE, EXISTS),      \
+       }
+
+/* A software-only gate */
+#define SW_ONLY_GATE(_offset, _status_bit, _en_bit)                    \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .status_bit = (_status_bit),                            \
+               .en_bit = (_en_bit),                                    \
+               .flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)|         \
+                       FLAG(GATE, ENABLED)|FLAG(GATE, EXISTS),         \
+       }
+
+/* A hardware-only gate */
+#define HW_ONLY_GATE(_offset, _status_bit)                             \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .status_bit = (_status_bit),                            \
+               .flags = FLAG(GATE, HW)|FLAG(GATE, EXISTS),             \
+       }
+
+/*
+ * Each clock can have zero, one, or two dividers which change the
+ * output rate of the clock. Each divider can be either fixed or
+ * variable. If there are two dividers, they are the "pre-divider"
+ * and the "regular" or "downstream" divider. If there is only one,
+ * there is no pre-divider.
+ *
+ * A fixed divider is any non-zero (positive) value, and it
+ * indicates how the input rate is affected by the divider.
+ *
+ * The value of a variable divider is maintained in a sub-field of a
+ * 32-bit divider register. The position of the field in the
+ * register is defined by its offset and width. The value recorded
+ * in this field is always 1 less than the value it represents.
+ *
+ * In addition, a variable divider can indicate that some subset
+ * of its bits represent a "fractional" part of the divider. Such
+ * bits comprise the low-order portion of the divider field, and can
+ * be viewed as representing the portion of the divider that lies to
+ * the right of the decimal point. Most variable dividers have zero
+ * fractional bits. Variable dividers with non-zero fraction width
+ * still record a value 1 less than the value they represent; the
+ * added 1 does *not* affect the low-order bit in this case, it
+ * affects the bits above the fractional part only. (Often in this
+ * code a divider field value is distinguished from the value it
+ * represents by referring to the latter as a "divisor".)
+ *
+ * In order to avoid dealing with fractions, divider arithmetic is
+ * performed using "scaled" values. A scaled value is one that's
+ * been left-shifted by the fractional width of a divider. Dividing
+ * a scaled value by a scaled divisor produces the desired quotient
+ * without loss of precision and without any other special handling
+ * for fractions.
+ *
+ * The recorded value of a variable divider can be modified. To
+ * modify either divider (or both), a clock must be enabled (i.e.,
+ * using its gate). In addition, a trigger register (described
+ * below) must be used to commit the change, and polled to verify
+ * the change is complete.
+ */
+struct bcm_clk_div {
+       union {
+               struct {        /* variable divider */
+                       u32 offset;     /* divider register offset */
+                       u32 shift;      /* field shift */
+                       u32 width;      /* field width */
+                       u32 frac_width; /* field fraction width */
+
+                       u64 scaled_div; /* scaled divider value */
+               };
+               u32 fixed;      /* non-zero fixed divider value */
+       };
+       u32 flags;              /* BCM_CLK_DIV_FLAGS_* below */
+};
+
+/*
+ * Divider flags:
+ *   EXISTS means this divider exists
+ *   FIXED means it is a fixed-rate divider
+ */
+#define BCM_CLK_DIV_FLAGS_EXISTS       ((u32)1 << 0)   /* Divider is valid */
+#define BCM_CLK_DIV_FLAGS_FIXED                ((u32)1 << 1)   /* Fixed-value */
+
+/* Divider initialization macros */
+
+/* A fixed (non-zero) divider */
+#define FIXED_DIVIDER(_value)                                          \
+       {                                                               \
+               .fixed = (_value),                                      \
+               .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED),            \
+       }
+
+/* A divider with an integral divisor */
+#define DIVIDER(_offset, _shift, _width)                               \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .shift = (_shift),                                      \
+               .width = (_width),                                      \
+               .scaled_div = BAD_SCALED_DIV_VALUE,                     \
+               .flags = FLAG(DIV, EXISTS),                             \
+       }
+
+/* A divider whose divisor has an integer and fractional part */
+#define FRAC_DIVIDER(_offset, _shift, _width, _frac_width)             \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .shift = (_shift),                                      \
+               .width = (_width),                                      \
+               .frac_width = (_frac_width),                            \
+               .scaled_div = BAD_SCALED_DIV_VALUE,                     \
+               .flags = FLAG(DIV, EXISTS),                             \
+       }
+
+/*
+ * Clocks may have multiple "parent" clocks. If there is more than
+ * one, a selector must be specified to define which of the parent
+ * clocks is currently in use. The selected clock is indicated in a
+ * sub-field of a 32-bit selector register. The range of
+ * representable selector values typically exceeds the number of
+ * available parent clocks. Occasionally the reset value of a
+ * selector field is explicitly set to a (specific) value that does
+ * not correspond to a defined input clock.
+ *
+ * We register all known parent clocks with the common clock code
+ * using a packed array (i.e., no empty slots) of (parent) clock
+ * names, and refer to them later using indexes into that array.
+ * We maintain an array of selector values indexed by common clock
+ * index values in order to map between these common clock indexes
+ * and the selector values used by the hardware.
+ *
+ * Like dividers, a selector can be modified, but to do so a clock
+ * must be enabled, and a trigger must be used to commit the change.
+ */
+struct bcm_clk_sel {
+       u32 offset;             /* selector register offset */
+       u32 shift;              /* field shift */
+       u32 width;              /* field width */
+
+       u32 parent_count;       /* number of entries in parent_sel[] */
+       u32 *parent_sel;        /* array of parent selector values */
+       u8 clk_index;           /* current selected index in parent_sel[] */
+};
+
+/* Selector initialization macro */
+#define SELECTOR(_offset, _shift, _width)                              \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .shift = (_shift),                                      \
+               .width = (_width),                                      \
+               .clk_index = BAD_CLK_INDEX,                             \
+       }
+
+/*
+ * Making changes to a variable divider or a selector for a clock
+ * requires the use of a trigger. A trigger is defined by a single
+ * bit within a register. To signal a change, a 1 is written into
+ * that bit. To determine when the change has been completed, that
+ * trigger bit is polled; the read value will be 1 while the change
+ * is in progress, and 0 when it is complete.
+ *
+ * Occasionally a clock will have more than one trigger. In this
+ * case, the "pre-trigger" will be used when changing a clock's
+ * selector and/or its pre-divider.
+ */
+struct bcm_clk_trig {
+       u32 offset;             /* trigger register offset */
+       u32 bit;                /* trigger bit */
+       u32 flags;              /* BCM_CLK_TRIG_FLAGS_* below */
+};
+
+/*
+ * Trigger flags:
+ *   EXISTS means this trigger exists
+ */
+#define BCM_CLK_TRIG_FLAGS_EXISTS      ((u32)1 << 0)   /* Trigger is valid */
+
+/* Trigger initialization macro */
+#define TRIGGER(_offset, _bit)                                         \
+       {                                                               \
+               .offset = (_offset),                                    \
+               .bit = (_bit),                                          \
+               .flags = FLAG(TRIG, EXISTS),                            \
+       }
+
+struct bus_clk_data {
+       struct bcm_clk_gate gate;
+};
+
+struct core_clk_data {
+       struct bcm_clk_gate gate;
+};
+
+struct peri_clk_data {
+       struct bcm_clk_gate gate;
+       struct bcm_clk_trig pre_trig;
+       struct bcm_clk_div pre_div;
+       struct bcm_clk_trig trig;
+       struct bcm_clk_div div;
+       struct bcm_clk_sel sel;
+       const char *clocks[];   /* must be last; use CLOCKS() to declare */
+};
+#define CLOCKS(...)    { __VA_ARGS__, NULL, }
+#define NO_CLOCKS      { NULL, }       /* Must use of no parent clocks */
+
+struct refclk {
+       struct clk clk;
+};
+
+struct peri_clock {
+       struct clk clk;
+       struct peri_clk_data *data;
+};
+
+struct ccu_clock {
+       struct clk clk;
+
+       int num_policy_masks;
+       unsigned long policy_freq_offset;
+       int freq_bit_shift;     /* 8 for most CCUs */
+       unsigned long policy_ctl_offset;
+       unsigned long policy0_mask_offset;
+       unsigned long policy1_mask_offset;
+       unsigned long policy2_mask_offset;
+       unsigned long policy3_mask_offset;
+       unsigned long policy0_mask2_offset;
+       unsigned long policy1_mask2_offset;
+       unsigned long policy2_mask2_offset;
+       unsigned long policy3_mask2_offset;
+       unsigned long lvm_en_offset;
+
+       int freq_id;
+       unsigned long *freq_tbl;
+};
+
+struct bus_clock {
+       struct clk clk;
+       struct bus_clk_data *data;
+       unsigned long *freq_tbl;
+};
+
+struct ref_clock {
+       struct clk clk;
+};
+
+static inline int is_same_clock(struct clk *a, struct clk *b)
+{
+       return a == b;
+}
+
+#define to_clk(p) (&((p)->clk))
+#define name_to_clk(name) (&((name##_clk).clk))
+/* declare a struct clk_lookup */
+#define CLK_LK(name) \
+{.con_id = __stringify(name##_clk), .clk = name_to_clk(name),}
+
+static inline struct refclk *to_refclk(struct clk *clock)
+{
+       return container_of(clock, struct refclk, clk);
+}
+
+static inline struct peri_clock *to_peri_clk(struct clk *clock)
+{
+       return container_of(clock, struct peri_clock, clk);
+}
+
+static inline struct ccu_clock *to_ccu_clk(struct clk *clock)
+{
+       return container_of(clock, struct ccu_clock, clk);
+}
+
+static inline struct bus_clock *to_bus_clk(struct clk *clock)
+{
+       return container_of(clock, struct bus_clock, clk);
+}
+
+static inline struct ref_clock *to_ref_clk(struct clk *clock)
+{
+       return container_of(clock, struct ref_clock, clk);
+}
+
+extern struct clk_ops peri_clk_ops;
+extern struct clk_ops ccu_clk_ops;
+extern struct clk_ops bus_clk_ops;
+extern struct clk_ops ref_clk_ops;
+
+int clk_get_and_enable(char *clkstr);

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
new file mode 100644 (file)
index 0000000..b0b92b9
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
@@ -0,0 +1,143 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/arch/sysmap.h>
+#include <asm/kona-common/clk.h>
+#include "clk-core.h"
+
+#define WR_ACCESS_ADDR                 ESUB_CLK_BASE_ADDR
+#define WR_ACCESS_PASSWORD                             0xA5A500
+
+#define PLLE_POST_RESETB_ADDR          (ESUB_CLK_BASE_ADDR + 0x00000C00)
+
+#define PLLE_RESETB_ADDR               (ESUB_CLK_BASE_ADDR + 0x00000C58)
+#define PLLE_RESETB_I_PLL_RESETB_PLLE_MASK             0x00010000
+#define PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK       0x00000001
+
+#define PLL_LOCK_ADDR                  (ESUB_CLK_BASE_ADDR + 0x00000C38)
+#define PLL_LOCK_PLL_LOCK_PLLE_MASK                    0x00000001
+
+#define ESW_SYS_DIV_ADDR               (ESUB_CLK_BASE_ADDR + 0x00000A04)
+#define ESW_SYS_DIV_PLL_SELECT_MASK                    0x00000300
+#define ESW_SYS_DIV_DIV_MASK                           0x0000001C
+#define ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT            0x00000100
+#define ESW_SYS_DIV_DIV_SELECT                         0x4
+#define ESW_SYS_DIV_TRIGGER_MASK                       0x00000001
+
+#define ESUB_AXI_DIV_DEBUG_ADDR                (ESUB_CLK_BASE_ADDR + 0x00000E04)
+#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK             0x0000001C
+#define ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK    0x00000040
+#define ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT     0x0
+#define ESUB_AXI_DIV_DEBUG_TRIGGER_MASK                        0x00000001
+
+#define PLL_MAX_RETRY  100
+
+/* Enable appropriate clocks for Ethernet */
+int clk_eth_enable(void)
+{
+       int rc = -1;
+       int retry_count = 0;
+       rc = clk_get_and_enable("esub_ccu_clk");
+
+       /* Enable Access to CCU registers */
+       writel((1 | WR_ACCESS_PASSWORD), WR_ACCESS_ADDR);
+
+       writel(readl(PLLE_POST_RESETB_ADDR) &
+              ~PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK,
+              PLLE_POST_RESETB_ADDR);
+
+       /* Take PLL out of reset and put into normal mode */
+       writel(readl(PLLE_RESETB_ADDR) | PLLE_RESETB_I_PLL_RESETB_PLLE_MASK,
+              PLLE_RESETB_ADDR);
+
+       /* Wait for PLL lock */
+       rc = -1;
+       while (retry_count < PLL_MAX_RETRY) {
+               udelay(100);
+               if (readl(PLL_LOCK_ADDR) & PLL_LOCK_PLL_LOCK_PLLE_MASK) {
+                       rc = 0;
+                       break;
+               }
+               retry_count++;
+       }
+
+       if (rc == -1) {
+               printf("%s: ETH-PLL lock timeout, Ethernet is not enabled!\n",
+                      __func__);
+               return -1;
+       }
+
+       writel(readl(PLLE_POST_RESETB_ADDR) |
+              PLLE_POST_RESETB_I_POST_RESETB_PLLE_MASK,
+              PLLE_POST_RESETB_ADDR);
+
+       /* Switch esw_sys_clk to use 104MHz(208MHz/2) clock */
+       writel((readl(ESW_SYS_DIV_ADDR) &
+               ~(ESW_SYS_DIV_PLL_SELECT_MASK | ESW_SYS_DIV_DIV_MASK)) |
+              ESW_SYS_DIV_PLL_VAR_208M_CLK_SELECT | ESW_SYS_DIV_DIV_SELECT,
+              ESW_SYS_DIV_ADDR);
+
+       writel(readl(ESW_SYS_DIV_ADDR) | ESW_SYS_DIV_TRIGGER_MASK,
+              ESW_SYS_DIV_ADDR);
+
+       /* Wait for trigger complete */
+       rc = -1;
+       retry_count = 0;
+       while (retry_count < PLL_MAX_RETRY) {
+               udelay(100);
+               if (!(readl(ESW_SYS_DIV_ADDR) & ESW_SYS_DIV_TRIGGER_MASK)) {
+                       rc = 0;
+                       break;
+               }
+               retry_count++;
+       }
+
+       if (rc == -1) {
+               printf("%s: SYS CLK Trigger timeout, Ethernet is not enabled!\n",
+                      __func__);
+               return -1;
+       }
+
+       /* switch Esub AXI clock to 208MHz */
+       writel((readl(ESUB_AXI_DIV_DEBUG_ADDR) &
+               ~(ESUB_AXI_DIV_DEBUG_PLL_SELECT_MASK |
+                 ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK |
+                 ESUB_AXI_DIV_DEBUG_TRIGGER_MASK)) |
+              ESUB_AXI_DIV_DEBUG_PLL_VAR_208M_CLK_SELECT |
+              ESUB_AXI_DIV_DEBUG_PLL_SELECT_OVERRIDE_MASK,
+              ESUB_AXI_DIV_DEBUG_ADDR);
+
+       writel(readl(ESUB_AXI_DIV_DEBUG_ADDR) |
+              ESUB_AXI_DIV_DEBUG_TRIGGER_MASK,
+              ESUB_AXI_DIV_DEBUG_ADDR);
+
+       /* Wait for trigger complete */
+       rc = -1;
+       retry_count = 0;
+       while (retry_count < PLL_MAX_RETRY) {
+               udelay(100);
+               if (!(readl(ESUB_AXI_DIV_DEBUG_ADDR) &
+                     ESUB_AXI_DIV_DEBUG_TRIGGER_MASK)) {
+                       rc = 0;
+                       break;
+               }
+               retry_count++;
+       }
+
+       if (rc == -1) {
+               printf("%s: AXI CLK Trigger timeout, Ethernet is not enabled!\n",
+                      __func__);
+               return -1;
+       }
+
+       /* Disable Access to CCU registers */
+       writel(WR_ACCESS_PASSWORD, WR_ACCESS_ADDR);
+
+       return rc;
+}

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
new file mode 100644 (file)
index 0000000..b2ce6d6
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-sdio.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <asm/arch/sysmap.h>
+#include <asm/kona-common/clk.h>
+#include "clk-core.h"
+
+/* Enable appropriate clocks for an SDIO port */
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+       int ret;
+       struct clk *c;
+
+       char *clkstr;
+       char *slpstr;
+       char *ahbstr;
+
+       switch ((u32) base) {
+       case CONFIG_SYS_SDIO_BASE0:
+               clkstr = CONFIG_SYS_SDIO0 "_clk";
+               ahbstr = CONFIG_SYS_SDIO0 "_ahb_clk";
+               slpstr = CONFIG_SYS_SDIO0 "_sleep_clk";
+               break;
+       case CONFIG_SYS_SDIO_BASE1:
+               clkstr = CONFIG_SYS_SDIO1 "_clk";
+               ahbstr = CONFIG_SYS_SDIO1 "_ahb_clk";
+               slpstr = CONFIG_SYS_SDIO1 "_sleep_clk";
+               break;
+       case CONFIG_SYS_SDIO_BASE2:
+               clkstr = CONFIG_SYS_SDIO2 "_clk";
+               ahbstr = CONFIG_SYS_SDIO2 "_ahb_clk";
+               slpstr = CONFIG_SYS_SDIO2 "_sleep_clk";
+               break;
+       case CONFIG_SYS_SDIO_BASE3:
+               clkstr = CONFIG_SYS_SDIO3 "_clk";
+               ahbstr = CONFIG_SYS_SDIO3 "_ahb_clk";
+               slpstr = CONFIG_SYS_SDIO3 "_sleep_clk";
+               break;
+       default:
+               printf("%s: base 0x%p not found\n", __func__, base);
+               return -EINVAL;
+       }
+
+       ret = clk_get_and_enable(ahbstr);
+       if (ret)
+               return ret;
+
+       ret = clk_get_and_enable(slpstr);
+       if (ret)
+               return ret;
+
+       c = clk_get(clkstr);
+       if (c) {
+               ret = clk_set_rate(c, rate);
+               if (ret)
+                       return ret;
+
+               ret = clk_enable(c);
+               if (ret)
+                       return ret;
+       } else {
+               printf("%s: Couldn't find %s\n", __func__, clkstr);
+               return -EINVAL;
+       }
+       *actual_ratep = rate;
+       return 0;
+}

diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
new file mode 100644 (file)
index 0000000..1d7c5af
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-usb-otg.c
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/errno.h>
+#include <asm/arch/sysmap.h>
+#include "clk-core.h"
+
+/* Enable appropriate clocks for the USB OTG port */
+int clk_usb_otg_enable(void *base)
+{
+       char *ahbstr;
+
+       switch ((u32) base) {
+       case HSOTG_BASE_ADDR:
+               ahbstr = "usb_otg_ahb_clk";
+               break;
+       default:
+               printf("%s: base 0x%p not found\n", __func__, base);
+               return -EINVAL;
+       }
+
+       return clk_get_and_enable(ahbstr);
+}

diff --git a/arch/arm/cpu/armv7/kona-common/Makefile b/arch/arm/cpu/armv7/kona-common/Makefile
index da225cb4f744248ca1c43fa92cab82e6b8378373..5167ebbef906176288e0257472b83e44ca00fa77 100644 (file)
--- a/arch/arm/cpu/armv7/kona-common/Makefile
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -7,3 +7,4 @@
 obj-y  += s_init.o
 obj-y  += hwinit-common.o
 obj-y  += clk-stubs.o
+obj-${CONFIG_KONA_RESET_S} += reset.o

diff --git a/arch/arm/cpu/armv7/kona-common/reset.S b/arch/arm/cpu/armv7/kona-common/reset.S
new file mode 100644 (file)
index 0000000..220a1ec
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/reset.S
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+.globl reset_cpu
+reset_cpu:
+       ldr     r1, =0x35001f00
+       ldr     r2, [r1]
+       ldr     r4, =0x80000000
+       and     r4, r2, r4
+       ldr     r3, =0xA5A500
+       orr     r4, r4, r3
+       orr     r4, r4, #0x1
+
+       str     r4, [r1]
+
+       ldr     r1, =0x35001f04
+       ldr     r2, [r1]
+       ldr     r4, =0x80000000
+       and     r4, r2, r4
+       str     r4, [r1]
+
+_loop_forever:
+       b       _loop_forever

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index e6f227548afeae90487a3f8353daadb51adf7130..ff932aa7ed413332d40d7bf36a01d9b440f85c47 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -97,7 +97,7 @@ void enable_enet_clk(unsigned char enable)
 {
        u32 mask, *addr;
 
-       if (is_cpu_type(MXC_CPU_MX6UL)) {
+       if (is_mx6ul()) {
                mask = MXC_CCM_CCGR3_ENET_MASK;
                addr = &imx_ccm->CCGR3;
        } else {
@@ -117,7 +117,7 @@ void enable_uart_clk(unsigned char enable)
 {
        u32 mask;
 
-       if (is_cpu_type(MXC_CPU_MX6UL))
+       if (is_mx6ul())
                mask = MXC_CCM_CCGR5_UART_MASK;
        else
                mask = MXC_CCM_CCGR5_UART_MASK | MXC_CCM_CCGR5_UART_SERIAL_MASK;
@@ -168,7 +168,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num)
                        reg &= ~mask;
                __raw_writel(reg, &imx_ccm->CCGR2);
        } else {
-               if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) {
+               if (is_mx6sx() || is_mx6ul()) {
                        mask = MXC_CCM_CCGR6_I2C4_MASK;
                        addr = &imx_ccm->CCGR6;
                } else {
@@ -279,7 +279,7 @@ static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num)
 
        switch (pll) {
        case PLL_BUS:
-               if (!is_cpu_type(MXC_CPU_MX6UL)) {
+               if (!is_mx6ul()) {
                        if (pfd_num == 3) {
                                /* No PFD3 on PPL2 */
                                return 0;
@@ -379,8 +379,8 @@ static u32 get_ipg_per_clk(void)
        u32 reg, perclk_podf;
 
        reg = __raw_readl(&imx_ccm->cscmr1);
-       if (is_cpu_type(MXC_CPU_MX6SL) || is_cpu_type(MXC_CPU_MX6SX) ||
-           is_mx6dqp() || is_cpu_type(MXC_CPU_MX6UL)) {
+       if (is_mx6sl() || is_mx6sx() ||
+           is_mx6dqp() || is_mx6ul()) {
                if (reg & MXC_CCM_CSCMR1_PER_CLK_SEL_MASK)
                        return MXC_HCLK; /* OSC 24Mhz */
        }
@@ -396,8 +396,7 @@ static u32 get_uart_clk(void)
        u32 freq = decode_pll(PLL_USBOTG, MXC_HCLK) / 6; /* static divider */
        reg = __raw_readl(&imx_ccm->cscdr1);
 
-       if (is_cpu_type(MXC_CPU_MX6SL) || is_cpu_type(MXC_CPU_MX6SX) ||
-           is_mx6dqp() || is_cpu_type(MXC_CPU_MX6UL)) {
+       if (is_mx6sl() || is_mx6sx() || is_mx6dqp() || is_mx6ul()) {
                if (reg & MXC_CCM_CSCDR1_UART_CLK_SEL)
                        freq = MXC_HCLK;
        }
@@ -416,8 +415,7 @@ static u32 get_cspi_clk(void)
        cspi_podf = (reg & MXC_CCM_CSCDR2_ECSPI_CLK_PODF_MASK) >>
                     MXC_CCM_CSCDR2_ECSPI_CLK_PODF_OFFSET;
 
-       if (is_mx6dqp() || is_cpu_type(MXC_CPU_MX6SL) ||
-           is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) {
+       if (is_mx6dqp() || is_mx6sl() || is_mx6sx() || is_mx6ul()) {
                if (reg & MXC_CCM_CSCDR2_ECSPI_CLK_SEL_MASK)
                        return MXC_HCLK / (cspi_podf + 1);
        }
@@ -479,14 +477,13 @@ static u32 get_mmdc_ch0_clk(void)
 
        u32 freq, podf, per2_clk2_podf, pmu_misc2_audio_div;
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
-           is_cpu_type(MXC_CPU_MX6SL)) {
+       if (is_mx6sx() || is_mx6ul() || is_mx6sl()) {
                podf = (cbcdr & MXC_CCM_CBCDR_MMDC_CH1_PODF_MASK) >>
                        MXC_CCM_CBCDR_MMDC_CH1_PODF_OFFSET;
                if (cbcdr & MXC_CCM_CBCDR_PERIPH2_CLK_SEL) {
                        per2_clk2_podf = (cbcdr & MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_MASK) >>
                                MXC_CCM_CBCDR_PERIPH2_CLK2_PODF_OFFSET;
-                       if (is_cpu_type(MXC_CPU_MX6SL)) {
+                       if (is_mx6sl()) {
                                if (cbcmr & MXC_CCM_CBCMR_PERIPH2_CLK2_SEL)
                                        freq = MXC_HCLK;
                                else
@@ -618,7 +615,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
 
        debug("mxs_set_lcdclk, freq = %dKHz\n", freq);
 
-       if ((!is_cpu_type(MXC_CPU_MX6SX)) && !is_cpu_type(MXC_CPU_MX6UL)) {
+       if (!is_mx6sx() && !is_mx6ul()) {
                debug("This chip not support lcd!\n");
                return;
        }
@@ -630,7 +627,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
                        return;
        }
 
-       if (is_cpu_type(MXC_CPU_MX6SX)) {
+       if (is_mx6sx()) {
                reg = readl(&imx_ccm->cscdr2);
                /* Can't change clocks when clock not from pre-mux */
                if ((reg & MXC_CCM_CSCDR2_LCDIF2_CLK_SEL_MASK) != 0)
@@ -711,7 +708,7 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
                                MXC_CCM_CBCMR_LCDIF1_PODF_MASK,
                                ((postd - 1) <<
                                 MXC_CCM_CBCMR_LCDIF1_PODF_OFFSET));
-       } else if (is_cpu_type(MXC_CPU_MX6SX)) {
+       } else if (is_mx6sx()) {
                /* Setting LCDIF2 for i.MX6SX */
                if (enable_pll_video(pll_div, pll_num, pll_denom, post_div))
                        return;
@@ -737,7 +734,7 @@ int enable_lcdif_clock(u32 base_addr)
        u32 reg = 0;
        u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
 
-       if (is_cpu_type(MXC_CPU_MX6SX)) {
+       if (is_mx6sx()) {
                if ((base_addr != LCDIF1_BASE_ADDR) &&
                    (base_addr != LCDIF2_BASE_ADDR)) {
                        puts("Wrong LCD interface!\n");
@@ -752,7 +749,7 @@ int enable_lcdif_clock(u32 base_addr)
                         MXC_CCM_CCGR3_DISP_AXI_MASK) :
                        (MXC_CCM_CCGR3_LCDIF1_PIX_MASK |
                         MXC_CCM_CCGR3_DISP_AXI_MASK);
-       } else if (is_cpu_type(MXC_CPU_MX6UL)) {
+       } else if (is_mx6ul()) {
                if (base_addr != LCDIF1_BASE_ADDR) {
                        puts("Wrong LCD interface!\n");
                        return -EINVAL;
@@ -850,8 +847,7 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
                reg |= BF_ANADIG_PLL_ENET_DIV_SELECT(freq);
        } else if (fec_id == 1) {
                /* Only i.MX6SX/UL support ENET2 */
-               if (!(is_cpu_type(MXC_CPU_MX6SX) ||
-                     is_cpu_type(MXC_CPU_MX6UL)))
+               if (!(is_mx6sx() || is_mx6ul()))
                        return -EINVAL;
                reg &= ~BM_ANADIG_PLL_ENET2_DIV_SELECT;
                reg |= BF_ANADIG_PLL_ENET2_DIV_SELECT(freq);
@@ -1044,7 +1040,7 @@ int enable_pcie_clock(void)
 #define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF        0xa
 #define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF        0xb
 
-       if (is_cpu_type(MXC_CPU_MX6SX))
+       if (is_mx6sx())
                lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF;
        else
                lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF;
@@ -1228,7 +1224,7 @@ static void disable_ldb_di_clock_sources(void)
        /* Make sure PFDs are disabled at boot. */
        reg = readl(&mxc_ccm->analog_pfd_528);
        /* Cannot disable pll2_pfd2_396M, as it is the MMDC clock in iMX6DL */
-       if (is_cpu_type(MXC_CPU_MX6DL))
+       if (is_mx6sdl())
                reg |= 0x80008080;
        else
                reg |= 0x80808080;
@@ -1251,7 +1247,7 @@ static void enable_ldb_di_clock_sources(void)
        int reg;
 
        reg = readl(&mxc_ccm->analog_pfd_528);
-       if (is_cpu_type(MXC_CPU_MX6DL))
+       if (is_mx6sdl())
                reg &= ~(0x80008080);
        else
                reg &= ~(0x80808080);

diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index 1e7ae289337fd665177cda4a6ddcf8b2c893798d..f151eec545ce025834a7a9f0a064a9ff2873aee3 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -888,8 +888,7 @@ void mx6sdl_dram_iocfg(unsigned width,
 #define MR(val, ba, cmd, cs1) \
        ((val << 16) | (1 << 15) | (cmd << 4) | (cs1 << 3) | ba)
 #define MMDC1(entry, value) do {                                         \
-       if (!is_cpu_type(MXC_CPU_MX6SX) && !is_cpu_type(MXC_CPU_MX6UL) && \
-           !is_cpu_type(MXC_CPU_MX6SL))                                  \
+       if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl())                    \
                mmdc1->entry = value;                                     \
        } while (0)
 
@@ -1197,12 +1196,11 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,
        u16 mem_speed = ddr3_cfg->mem_speed;
 
        mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
-       if (!is_cpu_type(MXC_CPU_MX6SX) && !is_cpu_type(MXC_CPU_MX6UL) &&
-           !is_cpu_type(MXC_CPU_MX6SL))
+       if (!is_mx6sx() && !is_mx6ul() && !is_mx6sl())
                mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR;
 
        /* Limit mem_speed for MX6D/MX6Q */
-       if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) {
+       if (is_mx6dq() || is_mx6dqp()) {
                if (mem_speed > 1066)
                        mem_speed = 1066; /* 1066 MT/s */
 
@@ -1221,7 +1219,7 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,
         * Data rate of 1066 MT/s requires 533 MHz DDR3 clock, but MX6D/Q supports
         * up to 528 MHz, so reduce the clock to fit chip specs
         */
-       if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) {
+       if (is_mx6dq() || is_mx6dqp()) {
                if (clock > 528)
                        clock = 528; /* 528 MHz */
        }

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index d4b22ad7f315072c8df91be9c3b214c15879eeb7..88fcfdc2aa61641534e18164af74854942d8cf66 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -108,6 +108,12 @@ u32 get_cpu_rev(void)
 #define OCOTP_CFG3_SPEED_1GHZ  2
 #define OCOTP_CFG3_SPEED_1P2GHZ        3
 
+/*
+ * For i.MX6UL
+ */
+#define OCOTP_CFG3_SPEED_528MHZ 1
+#define OCOTP_CFG3_SPEED_696MHZ 2
+
 u32 get_cpu_speed_grade_hz(void)
 {
        struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
@@ -120,17 +126,26 @@ u32 get_cpu_speed_grade_hz(void)
        val >>= OCOTP_CFG3_SPEED_SHIFT;
        val &= 0x3;
 
+       if (is_mx6ul()) {
+               if (val == OCOTP_CFG3_SPEED_528MHZ)
+                       return 528000000;
+               else if (val == OCOTP_CFG3_SPEED_696MHZ)
+                       return 69600000;
+               else
+                       return 0;
+       }
+
        switch (val) {
        /* Valid for IMX6DQ */
        case OCOTP_CFG3_SPEED_1P2GHZ:
-               if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+               if (is_mx6dq() || is_mx6dqp())
                        return 1200000000;
        /* Valid for IMX6SX/IMX6SDL/IMX6DQ */
        case OCOTP_CFG3_SPEED_1GHZ:
                return 996000000;
        /* Valid for IMX6DQ */
        case OCOTP_CFG3_SPEED_850MHZ:
-               if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+               if (is_mx6dq() || is_mx6dqp())
                        return 852000000;
        /* Valid for IMX6SX/IMX6SDL/IMX6DQ */
        case OCOTP_CFG3_SPEED_800MHZ:
@@ -278,7 +293,7 @@ static void clear_mmdc_ch_mask(void)
        reg = readl(&mxc_ccm->ccdr);
 
        /* Clear MMDC channel mask */
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6SL))
+       if (is_mx6sx() || is_mx6ul() || is_mx6sl())
                reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK);
        else
                reg &= ~(MXC_CCM_CCDR_MMDC_CH1_HS_MASK | MXC_CCM_CCDR_MMDC_CH0_HS_MASK);
@@ -444,8 +459,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
        struct fuse_bank4_regs *fuse =
                        (struct fuse_bank4_regs *)bank->fuse_regs;
 
-       if ((is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) && 
-               dev_id == 1) {
+       if ((is_mx6sx() || is_mx6ul()) && dev_id == 1) {
                u32 value = readl(&fuse->mac_addr2);
                mac[0] = value >> 24 ;
                mac[1] = value >> 16 ;
@@ -509,7 +523,7 @@ void s_init(void)
        u32 mask528;
        u32 reg, periph1, periph2;
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL))
+       if (is_mx6sx() || is_mx6ul())
                return;
 
        /* Due to hardware limitation, on MX6Q we need to gate/ungate all PFDs

diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 073bbc6d014e1d05e3bf13a981c5fc3544fc15fb..ef46c92b098b223f4499812413ac840874290568 100644 (file)
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -441,3 +441,11 @@ void s_init(void)
 
        return;
 }
+
+void reset_misc(void)
+{
+#ifdef CONFIG_VIDEO_MXS
+       lcdif_power_down();
+#endif
+}
+

diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c
index 0456263d6ecc60b52ec1b5ef5d72fd27fc9a1c11..8333b200015fb77e522852b4d08b00701560adbf 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/boot-common.c
+++ b/arch/arm/cpu/armv7/omap-common/boot-common.c
@@ -200,7 +200,7 @@ void spl_board_init(void)
 #endif
 }
 
-int board_mmc_init(bd_t *bis)
+__weak int board_mmc_init(bd_t *bis)
 {
        switch (spl_boot_device()) {
        case BOOT_DEVICE_MMC1:

diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 0c44ea53e12ed34df596abb5ed0f285f273b0b2b..5f5597772b6daa99d090d7fb83f76de1649cdefe 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -280,6 +280,8 @@ static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const arg
                                omap_nand_switch_ecc(1, 1);
                        else if (strncmp(argv[2], "bch8", 4) == 0)
                                omap_nand_switch_ecc(1, 8);
+                       else if (strncmp(argv[2], "bch16", 5) == 0)
+                               omap_nand_switch_ecc(1, 16);
                        else
                                goto usage;
                }
@@ -308,8 +310,8 @@ usage:
 U_BOOT_CMD(
        nandecc, 3, 1,  do_switch_ecc,
        "switch OMAP3 NAND ECC calculation algorithm",
-       "hw [hamming|bch8] - Switch between NAND hardware 1-bit hamming and"
-       " 8-bit BCH\n"
+       "hw [hamming|bch8|bch16] - Switch between NAND hardware 1-bit hamming"
+       " and 8-bit/16-bit BCH\n"
        "                           ecc calculation (second parameter may"
        " be omitted).\n"
        "nandecc sw               - Switch to NAND software ecc algorithm."

diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig
index 026bf24ddcb4b3632cf582c36e701fb6e24607ff..4fb5ef95cbe98254b14c41396710939be223cc1c 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/Kconfig
+++ b/arch/arm/cpu/armv7/omap5/Kconfig
@@ -14,8 +14,8 @@ config TARGET_DRA7XX_EVM
        bool "TI DRA7XX"
        select TI_I2C_BOARD_DETECT
 
-config TARGET_BEAGLE_X15
-       bool "BeagleBoard X15"
+config TARGET_AM57XX_EVM
+       bool "AM57XX"
        select TI_I2C_BOARD_DETECT
 
 endchoice

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 5b91446a8db4fe4891d9a64579e4ed4bf29155a2..62dd275f7ee8debb00a0472af52d30fe2578eaed 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -364,82 +364,6 @@ struct vcores_data omap5430_volts_es2 = {
        .mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
 };
 
-struct vcores_data dra752_volts = {
-       .mpu.value      = VDD_MPU_DRA7,
-       .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-       .mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
-       .mpu.addr       = TPS659038_REG_ADDR_SMPS12,
-       .mpu.pmic       = &tps659038,
-       .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-       .eve.value      = VDD_EVE_DRA7,
-       .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-       .eve.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
-       .eve.addr       = TPS659038_REG_ADDR_SMPS45,
-       .eve.pmic       = &tps659038,
-       .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-       .gpu.value      = VDD_GPU_DRA7,
-       .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-       .gpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
-       .gpu.addr       = TPS659038_REG_ADDR_SMPS6,
-       .gpu.pmic       = &tps659038,
-       .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-       .core.value     = VDD_CORE_DRA7,
-       .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .core.addr      = TPS659038_REG_ADDR_SMPS7,
-       .core.pmic      = &tps659038,
-
-       .iva.value      = VDD_IVA_DRA7,
-       .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-       .iva.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
-       .iva.addr       = TPS659038_REG_ADDR_SMPS8,
-       .iva.pmic       = &tps659038,
-       .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
-struct vcores_data dra722_volts = {
-       .mpu.value      = VDD_MPU_DRA7,
-       .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-       .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .mpu.addr       = TPS65917_REG_ADDR_SMPS1,
-       .mpu.pmic       = &tps659038,
-       .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-       .core.value     = VDD_CORE_DRA7,
-       .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .core.addr      = TPS65917_REG_ADDR_SMPS2,
-       .core.pmic      = &tps659038,
-
-       /*
-        * The DSPEVE, GPU and IVA rails are usually grouped on DRA72x
-        * designs and powered by TPS65917 SMPS3, as on the J6Eco EVM.
-        */
-       .gpu.value      = VDD_GPU_DRA7,
-       .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-       .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .gpu.addr       = TPS65917_REG_ADDR_SMPS3,
-       .gpu.pmic       = &tps659038,
-       .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-       .eve.value      = VDD_EVE_DRA7,
-       .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-       .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .eve.addr       = TPS65917_REG_ADDR_SMPS3,
-       .eve.pmic       = &tps659038,
-       .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-       .iva.value      = VDD_IVA_DRA7,
-       .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-       .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-       .iva.addr       = TPS65917_REG_ADDR_SMPS3,
-       .iva.pmic       = &tps659038,
-       .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
 /*
  * Enable essential clock domains, modules and
  * do some additional special settings needed
@@ -802,7 +726,6 @@ void __weak hw_data_init(void)
        case DRA752_ES2_0:
        *prcm = &dra7xx_prcm;
        *dplls_data = &dra7xx_dplls;
-       *omap_vcores = &dra752_volts;
        *ctrl = &dra7xx_ctrl;
        break;
 
@@ -810,7 +733,6 @@ void __weak hw_data_init(void)
        case DRA722_ES2_0:
        *prcm = &dra7xx_prcm;
        *dplls_data = &dra72x_dplls;
-       *omap_vcores = &dra722_volts;
        *ctrl = &dra7xx_ctrl;
        break;
 

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b18094447b0601e8a7ff539c0b286c693c66d5da..691e5d3fe165c79af45826e24cda182560333e67 100644 (file)
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -66,7 +66,9 @@ save_boot_params_ret:
        /* the mask ROM code should have PLL and others stable */
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
        bl      cpu_init_cp15
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        bl      cpu_init_crit
+#endif
 #endif
 
        bl      _main
@@ -250,7 +252,8 @@ skip_errata_621766:
        mov     pc, r5                  @ back to my caller
 ENDPROC(cpu_init_cp15)
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+       !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
 /*************************************************************************
  *
  * CPU_init_critical registers

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 1c85aa924db05108329c4982460cf68e8300523a..bf8644ccd2e70b6b066af38df530ed3342098c7d 100644 (file)
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -17,5 +17,6 @@ obj-y += transition.o
 obj-y  += fwcall.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
+obj-$(CONFIG_S32V234) += s32v234/
 obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
 obj-$(CONFIG_TARGET_HIKEY) += hisilicon/

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 9a5a6b53f76aefd9bf7efbe163216fdb2a04a794..8062106e3e90fad3df513ab7e4a4e26fbdab2115 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -528,6 +528,13 @@ u32 fsl_qoriq_core_to_type(unsigned int core)
        return -1;      /* cannot identify the cluster */
 }
 
+uint get_svr(void)
+{
+       struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+
+       return gur_in32(&gur->svr);
+}
+
 #ifdef CONFIG_DISPLAY_CPUINFO
 int print_cpuinfo(void)
 {
@@ -636,6 +643,9 @@ int timer_init(void)
 #ifdef CONFIG_FSL_LSCH3
        u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
 #endif
+#ifdef CONFIG_LS2080A
+       u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET;
+#endif
 #ifdef COUNTER_FREQUENCY_REAL
        unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
 
@@ -650,6 +660,15 @@ int timer_init(void)
        out_le32(cltbenr, 0xf);
 #endif
 
+#ifdef CONFIG_LS2080A
+       /*
+        * In certain Layerscape SoCs, the clock for each core's
+        * has an enable bit in the PMU Physical Core Time Base Enable
+        * Register (PCTBENR), which allows the watchdog to operate.
+        */
+       setbits_le32(pctbenr, 0xff);
+#endif
+
        /* Enable clock for timer
         * This is a global setting.
         */

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
index f9323c1d289d999a88b30492c87963caaf5672d2..da5e052569c49bcd5bab96b0fee1cc2c981ebba7 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
+++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
@@ -121,6 +121,35 @@ mcboottimeout:     MC boot timeout in milliseconds. If this variable is not defined
 mcmemsize:     MC DRAM block size. If this variable is not defined, the value
                CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
 
+mcinitcmd:     This environment variable is defined to initiate MC and DPL deployment
+               from the location where it is stored(NOR, NAND, SD, SATA, USB)during
+               u-boot booting.If this variable is not defined then MC_BOOT_ENV_VAR
+               will be null and MC will not be booted and DPL will not be applied
+               during U-boot booting.However the MC, DPC and DPL can be applied from
+               console independently.
+               The variable needs to be set from the console once and then on
+               rebooting the parameters set in the varible will automatically be
+               executed. The commmand is demostrated taking an example of mc boot
+               using NOR Flash i.e. MC, DPL, and DPC is stored in the NOR flash:
+
+               cp.b 0xa0000000 0x580300000 $filesize
+               cp.b 0x80000000 0x580800000 $filesize
+               cp.b 0x90000000 0x580700000 $filesize
+
+               setenv mcinitcmd 'fsl_mc start mc 0x580300000 0x580800000'
+
+               If only linux is to be booted then the mcinitcmd environment should be set as
+
+               setenv mcinitcmd 'fsl_mc start mc 0x580300000 0x580800000;fsl_mc apply DPL 0x580700000'
+
+               Here the addresses 0xa0000000, 0x80000000, 0x80000000 are of DDR to where
+               MC binary, DPC binary and DPL binary are stored and 0x580300000, 0x580800000
+               and 0x580700000 are addresses in NOR where these are copied. It is to be
+               noted that these addresses in 'fsl_mc start mc 0x580300000 0x580800000;fsl_mc apply DPL 0x580700000'
+               can be replaced with the addresses of DDR to
+               which these will be copied in case of these binaries being stored in other
+               devices like SATA, USB, NAND, SD etc.
+
 Booting from NAND
 -------------------
 Booting from NAND requires two images, RCW and u-boot-with-spl.bin.

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index dd633f36905c77d318ffab53d83eb2dca65c3c5b..d8ec426ce2ee45a473a6b62adfcbbb396c4e47bf 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -124,15 +124,6 @@ void erratum_a009635(void)
 }
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009635 */
 
-static void erratum_a008751(void)
-{
-#ifdef CONFIG_SYS_FSL_ERRATUM_A008751
-       u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
-
-       writel(0x27672b2a, scfg + SCFG_USB3PRM1CR / 4);
-#endif
-}
-
 static void erratum_rcw_src(void)
 {
 #if defined(CONFIG_SPL)
@@ -189,7 +180,6 @@ void bypass_smmu(void)
 }
 void fsl_lsch3_early_init_f(void)
 {
-       erratum_a008751();
        erratum_rcw_src();
        init_early_memctl_regs();       /* tighten IFC timing */
        erratum_a009203();

diff --git a/arch/arm/cpu/armv8/s32v234/Makefile b/arch/arm/cpu/armv8/s32v234/Makefile
new file mode 100644 (file)
index 0000000..49774f6
--- /dev/null
+++ b/arch/arm/cpu/armv8/s32v234/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2013-2016, Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += generic.o
+obj-y += cpu.o

diff --git a/arch/arm/cpu/armv8/s32v234/cpu.c b/arch/arm/cpu/armv8/s32v234/cpu.c
new file mode 100644 (file)
index 0000000..dac12a2
--- /dev/null
+++ b/arch/arm/cpu/armv8/s32v234/cpu.c
@@ -0,0 +1,97 @@
+/*
+ * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <asm/arch/mc_me_regs.h>
+#include "cpu.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 cpu_mask(void)
+{
+       return readl(MC_ME_CS);
+}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+
+#define S32V234_IRAM_BASE        0x3e800000UL
+#define S32V234_IRAM_SIZE        0x800000UL
+#define S32V234_DRAM_BASE1       0x80000000UL
+#define S32V234_DRAM_SIZE1       0x40000000UL
+#define S32V234_DRAM_BASE2       0xC0000000UL
+#define S32V234_DRAM_SIZE2       0x20000000UL
+#define S32V234_PERIPH_BASE      0x40000000UL
+#define S32V234_PERIPH_SIZE      0x40000000UL
+
+static struct mm_region s32v234_mem_map[] = {
+       {
+               .base = S32V234_IRAM_BASE,
+               .size = S32V234_IRAM_SIZE,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_OUTER_SHARE
+       }, {
+               .base = S32V234_DRAM_BASE1,
+               .size = S32V234_DRAM_SIZE1,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_OUTER_SHARE
+       }, {
+               .base = S32V234_PERIPH_BASE,
+               .size = S32V234_PERIPH_SIZE,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE
+                        /* TODO: Do we need these? */
+                        /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
+       }, {
+               .base = S32V234_DRAM_BASE2,
+               .size = S32V234_DRAM_SIZE2,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
+                        PTE_BLOCK_OUTER_SHARE
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
+struct mm_region *mem_map = s32v234_mem_map;
+
+#endif
+
+/*
+ * Return the number of cores on this SOC.
+ */
+int cpu_numcores(void)
+{
+       int numcores;
+       u32 mask;
+
+       mask = cpu_mask();
+       numcores = hweight32(cpu_mask());
+
+       /* Verify if M4 is deactivated */
+       if (mask & 0x1)
+               numcores--;
+
+       return numcores;
+}
+
+#if defined(CONFIG_ARCH_EARLY_INIT_R)
+int arch_early_init_r(void)
+{
+       int rv;
+       asm volatile ("dsb sy");
+       rv = fsl_s32v234_wake_seconday_cores();
+
+       if (rv)
+               printf("Did not wake secondary cores\n");
+
+       asm volatile ("sev");
+       return 0;
+}
+#endif /* CONFIG_ARCH_EARLY_INIT_R */

diff --git a/arch/arm/cpu/armv8/s32v234/cpu.h b/arch/arm/cpu/armv8/s32v234/cpu.h
new file mode 100644 (file)
index 0000000..402ac29
--- /dev/null
+++ b/arch/arm/cpu/armv8/s32v234/cpu.h
@@ -0,0 +1,8 @@
+/*
+ * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+u32 cpu_mask(void);
+int cpu_numcores(void);

diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c
new file mode 100644 (file)
index 0000000..7bb894e
--- /dev/null
+++ b/arch/arm/cpu/armv8/s32v234/generic.c
@@ -0,0 +1,350 @@
+/*
+ * (C) Copyright 2013-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/mc_cgm_regs.h>
+#include <asm/arch/mc_me_regs.h>
+#include <asm/arch/mc_rgm_regs.h>
+#include <netdev.h>
+#include <div64.h>
+#include <errno.h>
+
+u32 get_cpu_rev(void)
+{
+       struct mscm_ir *mscmir = (struct mscm_ir *)MSCM_BASE_ADDR;
+       u32 cpu = readl(&mscmir->cpxtype);
+
+       return cpu;
+}
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static uintptr_t get_pllfreq(u32 pll, u32 refclk_freq, u32 plldv,
+                            u32 pllfd, u32 selected_output)
+{
+       u32 vco = 0, plldv_prediv = 0, plldv_mfd = 0, pllfd_mfn = 0;
+       u32 plldv_rfdphi_div = 0, fout = 0;
+       u32 dfs_portn = 0, dfs_mfn = 0, dfs_mfi = 0;
+
+       if (selected_output > DFS_MAXNUMBER) {
+               return -1;
+       }
+
+       plldv_prediv =
+           (plldv & PLLDIG_PLLDV_PREDIV_MASK) >> PLLDIG_PLLDV_PREDIV_OFFSET;
+       plldv_mfd = (plldv & PLLDIG_PLLDV_MFD_MASK);
+
+       pllfd_mfn = (pllfd & PLLDIG_PLLFD_MFN_MASK);
+
+       plldv_prediv = plldv_prediv == 0 ? 1 : plldv_prediv;
+
+       /* The formula for VCO is from TR manual, rev. D */
+       vco = refclk_freq / plldv_prediv * (plldv_mfd + pllfd_mfn / 20481);
+
+       if (selected_output != 0) {
+               /* Determine the RFDPHI for PHI1 */
+               plldv_rfdphi_div =
+                   (plldv & PLLDIG_PLLDV_RFDPHI1_MASK) >>
+                   PLLDIG_PLLDV_RFDPHI1_OFFSET;
+               plldv_rfdphi_div = plldv_rfdphi_div == 0 ? 1 : plldv_rfdphi_div;
+               if (pll == ARM_PLL || pll == ENET_PLL || pll == DDR_PLL) {
+                       dfs_portn =
+                           readl(DFS_DVPORTn(pll, selected_output - 1));
+                       dfs_mfi =
+                           (dfs_portn & DFS_DVPORTn_MFI_MASK) >>
+                           DFS_DVPORTn_MFI_OFFSET;
+                       dfs_mfn =
+                           (dfs_portn & DFS_DVPORTn_MFI_MASK) >>
+                           DFS_DVPORTn_MFI_OFFSET;
+                       fout = vco / (dfs_mfi + (dfs_mfn / 256));
+               } else {
+                       fout = vco / plldv_rfdphi_div;
+               }
+
+       } else {
+               /* Determine the RFDPHI for PHI0 */
+               plldv_rfdphi_div =
+                   (plldv & PLLDIG_PLLDV_RFDPHI_MASK) >>
+                   PLLDIG_PLLDV_RFDPHI_OFFSET;
+               fout = vco / plldv_rfdphi_div;
+       }
+
+       return fout;
+
+}
+
+/* Implemented for ARMPLL, PERIPH_PLL, ENET_PLL, DDR_PLL, VIDEO_LL */
+static uintptr_t decode_pll(enum pll_type pll, u32 refclk_freq,
+                           u32 selected_output)
+{
+       u32 plldv, pllfd;
+
+       plldv = readl(PLLDIG_PLLDV(pll));
+       pllfd = readl(PLLDIG_PLLFD(pll));
+
+       return get_pllfreq(pll, refclk_freq, plldv, pllfd, selected_output);
+}
+
+static u32 get_mcu_main_clk(void)
+{
+       u32 coreclk_div;
+       u32 sysclk_sel;
+       u32 freq = 0;
+
+       sysclk_sel = readl(CGM_SC_SS(MC_CGM1_BASE_ADDR)) & MC_CGM_SC_SEL_MASK;
+       sysclk_sel >>= MC_CGM_SC_SEL_OFFSET;
+
+       coreclk_div =
+           readl(CGM_SC_DCn(MC_CGM1_BASE_ADDR, 0)) & MC_CGM_SC_DCn_PREDIV_MASK;
+       coreclk_div >>= MC_CGM_SC_DCn_PREDIV_OFFSET;
+       coreclk_div += 1;
+
+       switch (sysclk_sel) {
+       case MC_CGM_SC_SEL_FIRC:
+               freq = FIRC_CLK_FREQ;
+               break;
+       case MC_CGM_SC_SEL_XOSC:
+               freq = XOSC_CLK_FREQ;
+               break;
+       case MC_CGM_SC_SEL_ARMPLL:
+               /* ARMPLL has as source XOSC and CORE_CLK has as input PHI0 */
+               freq = decode_pll(ARM_PLL, XOSC_CLK_FREQ, 0);
+               break;
+       case MC_CGM_SC_SEL_CLKDISABLE:
+               printf("Sysclk is disabled\n");
+               break;
+       default:
+               printf("unsupported system clock select\n");
+       }
+
+       return freq / coreclk_div;
+}
+
+static u32 get_sys_clk(u32 number)
+{
+       u32 sysclk_div, sysclk_div_number;
+       u32 sysclk_sel;
+       u32 freq = 0;
+
+       switch (number) {
+       case 3:
+               sysclk_div_number = 0;
+               break;
+       case 6:
+               sysclk_div_number = 1;
+               break;
+       default:
+               printf("unsupported system clock \n");
+               return -1;
+       }
+       sysclk_sel = readl(CGM_SC_SS(MC_CGM0_BASE_ADDR)) & MC_CGM_SC_SEL_MASK;
+       sysclk_sel >>= MC_CGM_SC_SEL_OFFSET;
+
+       sysclk_div =
+           readl(CGM_SC_DCn(MC_CGM1_BASE_ADDR, sysclk_div_number)) &
+           MC_CGM_SC_DCn_PREDIV_MASK;
+       sysclk_div >>= MC_CGM_SC_DCn_PREDIV_OFFSET;
+       sysclk_div += 1;
+
+       switch (sysclk_sel) {
+       case MC_CGM_SC_SEL_FIRC:
+               freq = FIRC_CLK_FREQ;
+               break;
+       case MC_CGM_SC_SEL_XOSC:
+               freq = XOSC_CLK_FREQ;
+               break;
+       case MC_CGM_SC_SEL_ARMPLL:
+               /* ARMPLL has as source XOSC and SYSn_CLK has as input DFS1 */
+               freq = decode_pll(ARM_PLL, XOSC_CLK_FREQ, 1);
+               break;
+       case MC_CGM_SC_SEL_CLKDISABLE:
+               printf("Sysclk is disabled\n");
+               break;
+       default:
+               printf("unsupported system clock select\n");
+       }
+
+       return freq / sysclk_div;
+}
+
+static u32 get_peripherals_clk(void)
+{
+       u32 aux5clk_div;
+       u32 freq = 0;
+
+       aux5clk_div =
+           readl(CGM_ACn_DCm(MC_CGM0_BASE_ADDR, 5, 0)) &
+           MC_CGM_ACn_DCm_PREDIV_MASK;
+       aux5clk_div >>= MC_CGM_ACn_DCm_PREDIV_OFFSET;
+       aux5clk_div += 1;
+
+       freq = decode_pll(PERIPH_PLL, XOSC_CLK_FREQ, 0);
+
+       return freq / aux5clk_div;
+
+}
+
+static u32 get_uart_clk(void)
+{
+       u32 auxclk3_div, auxclk3_sel, freq = 0;
+
+       auxclk3_sel =
+           readl(CGM_ACn_SS(MC_CGM0_BASE_ADDR, 3)) & MC_CGM_ACn_SEL_MASK;
+       auxclk3_sel >>= MC_CGM_ACn_SEL_OFFSET;
+
+       auxclk3_div =
+           readl(CGM_ACn_DCm(MC_CGM0_BASE_ADDR, 3, 0)) &
+           MC_CGM_ACn_DCm_PREDIV_MASK;
+       auxclk3_div >>= MC_CGM_ACn_DCm_PREDIV_OFFSET;
+       auxclk3_div += 1;
+
+       switch (auxclk3_sel) {
+       case MC_CGM_ACn_SEL_FIRC:
+               freq = FIRC_CLK_FREQ;
+               break;
+       case MC_CGM_ACn_SEL_XOSC:
+               freq = XOSC_CLK_FREQ;
+               break;
+       case MC_CGM_ACn_SEL_PERPLLDIVX:
+               freq = get_peripherals_clk() / 3;
+               break;
+       case MC_CGM_ACn_SEL_SYSCLK:
+               freq = get_sys_clk(6);
+               break;
+       default:
+               printf("unsupported system clock select\n");
+       }
+
+       return freq / auxclk3_div;
+}
+
+static u32 get_fec_clk(void)
+{
+       u32 aux2clk_div;
+       u32 freq = 0;
+
+       aux2clk_div =
+           readl(CGM_ACn_DCm(MC_CGM0_BASE_ADDR, 2, 0)) &
+           MC_CGM_ACn_DCm_PREDIV_MASK;
+       aux2clk_div >>= MC_CGM_ACn_DCm_PREDIV_OFFSET;
+       aux2clk_div += 1;
+
+       freq = decode_pll(ENET_PLL, XOSC_CLK_FREQ, 0);
+
+       return freq / aux2clk_div;
+}
+
+static u32 get_usdhc_clk(void)
+{
+       u32 aux15clk_div;
+       u32 freq = 0;
+
+       aux15clk_div =
+           readl(CGM_ACn_DCm(MC_CGM0_BASE_ADDR, 15, 0)) &
+           MC_CGM_ACn_DCm_PREDIV_MASK;
+       aux15clk_div >>= MC_CGM_ACn_DCm_PREDIV_OFFSET;
+       aux15clk_div += 1;
+
+       freq = decode_pll(ENET_PLL, XOSC_CLK_FREQ, 4);
+
+       return freq / aux15clk_div;
+}
+
+static u32 get_i2c_clk(void)
+{
+       return get_peripherals_clk();
+}
+
+/* return clocks in Hz */
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+       switch (clk) {
+       case MXC_ARM_CLK:
+               return get_mcu_main_clk();
+       case MXC_PERIPHERALS_CLK:
+               return get_peripherals_clk();
+       case MXC_UART_CLK:
+               return get_uart_clk();
+       case MXC_FEC_CLK:
+               return get_fec_clk();
+       case MXC_I2C_CLK:
+               return get_i2c_clk();
+       case MXC_USDHC_CLK:
+               return get_usdhc_clk();
+       default:
+               break;
+       }
+       printf("Error: Unsupported function to read the frequency! \
+                       Please define it correctly!");
+       return -1;
+}
+
+/* Not yet implemented - int soc_clk_dump(); */
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+static char *get_reset_cause(void)
+{
+       u32 cause = readl(MC_RGM_BASE_ADDR + 0x300);
+
+       switch (cause) {
+       case F_SWT4:
+               return "WDOG";
+       case F_JTAG:
+               return "JTAG";
+       case F_FCCU_SOFT:
+               return "FCCU soft reaction";
+       case F_FCCU_HARD:
+               return "FCCU hard reaction";
+       case F_SOFT_FUNC:
+               return "Software Functional reset";
+       case F_ST_DONE:
+               return "Self Test done reset";
+       case F_EXT_RST:
+               return "External reset";
+       default:
+               return "unknown reset";
+       }
+
+}
+
+#define SRC_SCR_SW_RST                                 (1<<12)
+
+void reset_cpu(ulong addr)
+{
+       printf("Feature not supported.\n");
+};
+
+int print_cpuinfo(void)
+{
+       printf("CPU:   Freescale Treerunner S32V234 at %d MHz\n",
+              mxc_get_clock(MXC_ARM_CLK) / 1000000);
+       printf("Reset cause: %s\n", get_reset_cause());
+
+       return 0;
+}
+#endif
+
+int cpu_eth_init(bd_t * bis)
+{
+       int rc = -ENODEV;
+
+#if defined(CONFIG_FEC_MXC)
+       rc = fecmxc_initialize(bis);
+#endif
+
+       return rc;
+}
+
+int get_clocks(void)
+{
+#ifdef CONFIG_FSL_ESDHC
+       gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK);
+#endif
+       return 0;
+}

diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 408b70dbc1fe2f336173c9933120b4d9a1be560b..f5318c90d123f8a5c66d6f297f32f4d88323ad3a 100644 (file)
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -96,6 +96,7 @@ cpu_init_crit:
        ldr     r1, cpuspeed
        str     r1, [r0, #PPCR]
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY
        /*
         * before relocating, we have to setup RAM timing
         * because memory timing is board-dependend, you will
@@ -104,6 +105,7 @@ cpu_init_crit:
        mov     ip,     lr
        bl      lowlevel_init
        mov     lr,     ip
+#endif
 
        /*
         * disable MMU stuff and enable I-cache

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f81bd8b5e57c6781ba3bc55d31650247d6347ce5..0a41eb2c938373c1cd5b3ee4dcc755b02d96404c 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -2,6 +2,7 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
+dtb-$(CONFIG_AT91FAMILY) += at91sam9g45-gurnard.dtb
 dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb
 dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb
 dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
@@ -94,10 +95,14 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
        zynqmp-zc1751-xm016-dc2.dtb             \
        zynqmp-zc1751-xm018-dc4.dtb             \
        zynqmp-zc1751-xm019-dc5.dtb
-dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb am335x-evm.dtb \
+dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
+       am335x-draco.dtb \
+       am335x-evm.dtb \
        am335x-evmsk.dtb \
        am335x-bonegreen.dtb \
-       am335x-icev2.dtb
+       am335x-icev2.dtb \
+       am335x-pxm50.dtb \
+       am335x-rut.dtb
 dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb    \
        am43x-epos-evm.dtb \
        am437x-idk-evm.dtb
@@ -115,7 +120,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) +=                               \
        socfpga_cyclone5_vining_fpga.dtb
 
 dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb
-dtb-$(CONFIG_TARGET_BEAGLE_X15) += am57xx-beagle-x15.dtb
+dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
+       am572x-idk.dtb
 dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
 
 dtb-$(CONFIG_LS102XA) += ls1021a-qds-duart.dtb \

diff --git a/arch/arm/dts/am335x-draco.dts b/arch/arm/dts/am335x-draco.dts
new file mode 100644 (file)
index 0000000..25d0480
--- /dev/null
+++ b/arch/arm/dts/am335x-draco.dts
@@ -0,0 +1,152 @@
+/*
+ * Support for Siemens DRACO board
+ *
+ * Copyright (C) 2014 - Lukas Stockmann <lukas.stockmann@siemens.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-draco.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "Siemens DRACO";
+       compatible = "siemens,draco", "ti,am33xx";
+
+       /* ethernet alias is needed for the MAC address passing from U-Boot */
+       aliases {
+               ethernet0 = &cpsw_emac0;
+               mdio-gpio0 = &mdio0;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               button0 {
+                       label = "button0";
+                       gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_F1>; /* button0 */
+               };
+               button1 {
+                       label = "button1";
+                       gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_F2>; /* button1 */
+               };
+       };
+
+       ocp {
+               debugss: debugss@4b000000 {
+                       compatible = "ti,debugss";
+                       ti,hwmods = "debugss";
+                       reg = <0x4b000000 1000000>;
+                       status = "disabled";
+               };
+       };
+};
+
+&am33xx_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&gpio_mux_pins>;
+
+       gpio_mux_pins: gpio_mux_pins {
+               pinctrl-single,pins = <
+                       0x1d0 (PIN_INPUT | MUX_MODE0)   /* tms jtag */
+                       0x1d4 (PIN_INPUT | MUX_MODE0)   /* tdi jtag */
+                       0x1d8 (PIN_OUTPUT | MUX_MODE0)  /* tdo jtag */
+                       0x1dc (PIN_INPUT | MUX_MODE0)   /* tck jtag */
+                       0x1e0 (PIN_INPUT | MUX_MODE0)   /* trstn jtag */
+               >;
+       };
+
+       cpsw_default: cpsw_default {
+               pinctrl-single,pins = <
+                       0x0E8 (PIN_INPUT_PULLUP | MUX_MODE7)    /* lcd_plck FIX STO should be a OUTPUT driven high*/
+                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_crs.rmii1_crs_dv */
+                       0x114 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txen.mii1_txen */
+                       0x124 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd1.mii1_txd1 */
+                       0x128 (PIN_OUTPUT | MUX_MODE1)          /* mii1_txd0.mii1_txd0 */
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.mii1_rxd1 */
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.mii1_rxd0 */
+                       0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* rmii1_refclk.rmii1_refclk */
+               >;
+       };
+
+       cpsw_sleep: cpsw_sleep {
+               pinctrl-single,pins = <
+                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       davinci_mdio_default: davinci_mdio_default {
+               pinctrl-single,pins = <
+                       /* MDIO */
+                       0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)   /* mdio_data.mdio_data */
+                       0x14c (PIN_OUTPUT | MUX_MODE0)                  /* mdio_clk.mdio_clk */
+               >;
+       };
+
+       davinci_mdio_sleep: davinci_mdio_sleep {
+               pinctrl-single,pins = <
+                       /* MDIO reset value */
+                       0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       gpio_mdio_default: gpio_mdio_default {
+               pinctrl-single,pins = <
+                       /* MDIO via GPIO */
+                       0x148 (PIN_INPUT | MUX_MODE7)   /* mdio_data.mdio_data GPIO0_0 */
+                       0x14c (PIN_OUTPUT | MUX_MODE7)  /* mdio_clk.mdio_clk GPIO0_1 */
+               >;
+       };
+};
+
+&mac {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&cpsw_default>;
+       pinctrl-1 = <&cpsw_sleep>;
+       slaves = <1>;                   /* use only one emac if */
+
+       mdio0: gpio {
+               compatible = "virtual,mdio-gpio";
+               pinctrl-names = "default";
+               pinctrl-0 = <&gpio_mdio_default>;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+               gpios = <&gpio0 1 GPIO_ACTIVE_HIGH      /* MDIO-CLK */
+                        &gpio0 0 GPIO_ACTIVE_HIGH>;    /* MDIO-DATA */
+
+               phy0: ethernet-phy@1 {
+                       reg = <0>;
+               };
+       };
+};
+
+/* Disable davinci/am335x mdio interface on this platform */
+&davinci_mdio {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&davinci_mdio_default>;
+       pinctrl-1 = <&davinci_mdio_sleep>;
+       status = "disabled";
+};
+
+&cpsw_emac0 {
+       phy_id = <&mdio0>, <0>;
+       phy-mode = "rmii";
+};
+
+&phy_sel {
+       rmii-clock-ext;
+};

diff --git a/arch/arm/dts/am335x-draco.dtsi b/arch/arm/dts/am335x-draco.dtsi
new file mode 100644 (file)
index 0000000..b38ff55
--- /dev/null
+++ b/arch/arm/dts/am335x-draco.dtsi
@@ -0,0 +1,169 @@
+/*
+ * Common support for Siemens Draco SOM (AM335x based)
+ *
+ * Copyright (C) 2013,2014 - Stefan Roese <sr@denx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/ {
+       chosen {
+               stdout-path = &uart0;
+               tick-timer = &timer2;
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x08000000>; /* 128 MB */
+       };
+
+       ocp {
+               uart0: serial@44e09000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart0_pins>;
+                       status = "okay";
+               };
+
+               i2c0: i2c@44e0b000 {
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&i2c0_pins>;
+
+                       status = "okay";
+                       clock-frequency = <400000>;
+
+                       eeprom: eeprom@50 {
+                               compatible = "atmel,24c128";
+                               reg = <0x50>;
+                               pagesize = <64>;
+                       };
+               };
+
+               musb: usb@47400000 {
+                       status = "okay";
+
+                       control@44e10620 {
+                               status = "okay";
+                       };
+
+                       usb-phy@47401300 {
+                               status = "okay";
+                       };
+
+                       usb-phy@47401b00 {
+                               status = "okay";
+                       };
+
+                       usb@47401000 {
+                               status = "okay";
+                       };
+
+                       usb@47401800 {
+                               status = "okay";
+                               dr_mode = "host";
+                       };
+
+                       dma-controller@47402000  {
+                               status = "okay";
+                       };
+               };
+       };
+};
+
+&am33xx_pinmux {
+               i2c0_pins: pinmux_i2c0_pins {
+                       pinctrl-single,pins = <
+                               0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
+                               0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+                       >;
+               };
+
+               uart0_pins: pinmux_uart0_pins {
+                       pinctrl-single,pins = <
+                               0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
+                               0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+                       >;
+               };
+
+               nandflash_pins: nandflash_pins {
+                       pinctrl-single,pins = <
+                               0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
+                               0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
+                               0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
+                               0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
+                               0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                               0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                               0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                               0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+                               0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
+                               0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
+                               0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0  */
+                               0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
+                               0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
+                               0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
+                               0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+                       >;
+               };
+       };
+
+
+&timer3 {
+       status = "disabled";
+};
+
+&uart4 {
+       status = "disabled";
+};
+
+&elm {
+       status = "okay";
+};
+
+&gpmc {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&nandflash_pins>;
+
+       ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
+
+       nand@0,0 {
+               reg = <0 0 0>; /* CS0, offset 0 */
+               nand-bus-width = <8>;
+               ti,nand-ecc-opt = "bch8";
+               gpmc,device-nand = "true";
+               gpmc,device-width = <1>;
+               gpmc,sync-clk-ps = <0>;
+               gpmc,cs-on-ns = <0>;
+               gpmc,cs-rd-off-ns = <44>;
+               gpmc,cs-wr-off-ns = <44>;
+               gpmc,adv-on-ns = <6>;
+               gpmc,adv-rd-off-ns = <34>;
+               gpmc,adv-wr-off-ns = <44>;
+               gpmc,we-on-ns = <0>;
+               gpmc,we-off-ns = <40>;
+               gpmc,oe-on-ns = <0>;
+               gpmc,oe-off-ns = <54>;
+               gpmc,access-ns = <64>;
+               gpmc,rd-cycle-ns = <82>;
+               gpmc,wr-cycle-ns = <82>;
+               gpmc,wait-on-read = "true";
+               gpmc,wait-on-write = "true";
+               gpmc,bus-turnaround-ns = <0>;
+               gpmc,cycle2cycle-delay-ns = <0>;
+               gpmc,clk-activation-ns = <0>;
+               gpmc,wait-monitoring-ns = <0>;
+               gpmc,wr-access-ns = <40>;
+               gpmc,wr-data-mux-bus-ns = <0>;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+               elm_id = <&elm>;
+       };
+};
+
+/* disable the RTC node as its not accessible on the draco/dxr2 board */
+&rtc {
+       status = "disabled";
+       ti,hwmods = "disabled";
+};

diff --git a/arch/arm/dts/am335x-pxm2.dtsi b/arch/arm/dts/am335x-pxm2.dtsi
new file mode 100644 (file)
index 0000000..8d58cd4
--- /dev/null
+++ b/arch/arm/dts/am335x-pxm2.dtsi
@@ -0,0 +1,539 @@
+/*
+ * Copyright (C) 2014 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * Based on:
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "am33xx.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       chosen {
+               stdout-path = &uart0;
+               tick-timer = &timer2;
+       };
+
+       cpus {
+               cpu@0 {
+                       cpu0-supply = <&vdd1_reg>;
+               };
+       };
+
+       backlight0: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&ecap0 0 50000 0>;
+               brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
+                                    38 40 43 45 48 51 53 56 58 61 63 66 68 71
+                                    73 76 79 81 84 86 89 91 94 96 99 102 104
+                                    107 109 112 114 117 119 122 124 127 130
+                                    132 135 137 140 142 145 147 150 153 155
+                                    158 160 163 165 168 170 173 175 178 181
+                                    183 186 188 191 193 196 198 201 204 206
+                                    209 211 214 216 219 221 224 226 229 232
+                                    234 237 239 242 244 247 249 252 255>;
+               default-brightness-level = <80>;
+               power-supply = <&backlight_reg>;
+               enable-gpios = <&gpio3 16 0>;
+       };
+
+       backlight_reg: fixedregulator0 {
+               compatible = "regulator-fixed";
+               regulator-name = "backlight_reg";
+               regulator-boot-on;
+       };
+
+       gpio_keys: restart-keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               autorepeat;
+
+               restart0 {
+                       label = "restart";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_blue {
+                       label = "blue";
+                       gpios = <&gpio3 20 0>;
+               };
+               led_green {
+                       label = "green";
+                       gpios = <&gpio1 31 0>;
+               };
+               led_red {
+                       label = "red";
+                       gpios = <&gpio3 21 0>;
+               };
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x10000000>; /* 256 MB */
+       };
+
+       reg_lcd_3v3: fixedregulator1 {
+               compatible = "regulator-gpio";
+                regulator-name = "lcd-3v3";
+               regulator-min-microvolt = <1800000>;
+                regulator-max-microvolt = <3300000>;
+               regulator-type = "voltage";
+               startup-delay-us = <100>;
+               states = <1800000 0x1
+                         2900000 0x0>;
+               enable-at-boot;
+                gpios = <&gpio3 19 0>;
+                enable-active-high;
+        };
+
+       vbat: fixedregulator2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vbat";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+       };
+
+       vmmc: fixedregulator3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vmmc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+};
+
+&cppi41dma  {
+       status = "okay";
+};
+
+&cpsw_emac0 {
+       phy_id = <&davinci_mdio>, <0>;
+       phy-mode = "rgmii-txid";
+};
+
+&cpsw_emac1 {
+       phy_id = <&davinci_mdio>, <1>;
+       phy-mode = "rgmii-txid";
+};
+
+&davinci_mdio {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&davinci_mdio_default>;
+       pinctrl-1 = <&davinci_mdio_sleep>;
+       status = "okay";
+};
+
+&elm {
+       status = "okay";
+};
+
+&epwmss0 {
+       status = "okay";
+
+       ecap0: ecap@48300100 {
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&ecap0_pins>;
+       };
+};
+
+&gpmc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nandflash_pins>;
+       status = "okay";
+
+       ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
+
+       nand@0,0 {
+               reg = <0 0 0>; /* CS0, offset 0 */
+               nand-bus-width = <8>;
+               ti,nand-ecc-opt = "bch8";
+               gpmc,device-nand = "true";
+               gpmc,device-width = <1>;
+               gpmc,sync-clk-ps = <0>;
+               gpmc,cs-on-ns = <0>;
+               gpmc,cs-rd-off-ns = <44>;
+               gpmc,cs-wr-off-ns = <44>;
+               gpmc,adv-on-ns = <6>;
+               gpmc,adv-rd-off-ns = <34>;
+               gpmc,adv-wr-off-ns = <44>;
+               gpmc,we-on-ns = <0>;
+               gpmc,we-off-ns = <40>;
+               gpmc,oe-on-ns = <0>;
+               gpmc,oe-off-ns = <54>;
+               gpmc,access-ns = <64>;
+               gpmc,rd-cycle-ns = <82>;
+               gpmc,wr-cycle-ns = <82>;
+               gpmc,wait-on-read = "true";
+               gpmc,wait-on-write = "true";
+               gpmc,bus-turnaround-ns = <0>;
+               gpmc,cycle2cycle-delay-ns = <0>;
+               gpmc,clk-activation-ns = <0>;
+               gpmc,wait-monitoring-ns = <0>;
+               gpmc,wr-access-ns = <40>;
+               gpmc,wr-data-mux-bus-ns = <0>;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+               elm_id = <&elm>;
+       };
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c0_pins>;
+       clock-frequency = <400000>;
+       status = "okay";
+
+       tps: tps@2d {
+               reg = <0x2d>;
+       };
+       eeprom: eeprom@50 {
+               compatible = "atmel,24c128";
+               reg = <0x50>;
+               pagesize = <32>;
+       };
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       tsl2563: tsl2563@49 {
+               compatible = "amstaos,tsl2563";
+               reg = <0x49>;
+       };
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c2_pins>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       egalax_ts@04 {
+               compatible = "eeti,egalax_ts";
+               reg = <0x04>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <24 2>;
+               wakeup-gpios = <&gpio1 25 0>;
+       };
+};
+
+&lcdc {
+       status = "okay";
+};
+
+&mac {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&cpsw_default>;
+       pinctrl-1 = <&cpsw_sleep>;
+       status = "okay";
+};
+
+&mmc1 {
+       vmmc-supply = <&vmmc>;
+       bus-width = <4>;
+       cd-gpios = <&gpio0 6 0>;
+       wp-gpios = <&gpio3 18 0>;
+       status = "okay";
+};
+
+&phy_sel {
+       rgmii-no-delay;
+};
+
+#include "tps65910.dtsi"
+
+&tps {
+       vcc1-supply = <&vbat>;
+       vcc2-supply = <&vbat>;
+       vcc3-supply = <&vbat>;
+       vcc4-supply = <&vbat>;
+       vcc5-supply = <&vbat>;
+       vcc6-supply = <&vbat>;
+       vcc7-supply = <&vbat>;
+       vccio-supply = <&vbat>;
+
+       regulators {
+               vrtc_reg: regulator@0 {
+                       regulator-always-on;
+               };
+
+               vio_reg: regulator@1 {
+                       regulator-always-on;
+               };
+
+               vdd1_reg: regulator@2 {
+                       /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                       regulator-name = "vdd_mpu";
+                       regulator-min-microvolt = <912500>;
+                       regulator-max-microvolt = <1312500>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               vdd2_reg: regulator@3 {
+                       /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                       regulator-name = "vdd_core";
+                       regulator-min-microvolt = <912500>;
+                       regulator-max-microvolt = <1150000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               vdd3_reg: regulator@4 {
+                       regulator-always-on;
+               };
+
+               vdig1_reg: regulator@5 {
+                       regulator-always-on;
+               };
+
+               vdig2_reg: regulator@6 {
+                       regulator-always-on;
+               };
+
+               vpll_reg: regulator@7 {
+                       regulator-always-on;
+               };
+
+               vdac_reg: regulator@8 {
+                       regulator-always-on;
+               };
+
+               vaux1_reg: regulator@9 {
+                       regulator-always-on;
+               };
+
+               vaux2_reg: regulator@10 {
+                       regulator-always-on;
+               };
+
+               vaux33_reg: regulator@11 {
+                       regulator-always-on;
+               };
+
+               vmmc_reg: regulator@12 {
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+
+       status = "okay";
+};
+
+&usb {
+       status = "okay";
+};
+
+&usb_ctrl_mod {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usb0_phy {
+       status = "okay";
+};
+
+&usb1_phy {
+       status = "okay";
+};
+
+&am33xx_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&clkout2_pin &gpio_pin>;
+
+       clkout2_pin: pinmux_clkout2_pin {
+               pinctrl-single,pins = <
+                       0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+               >;
+       };
+
+       cpsw_default: cpsw_default {
+               pinctrl-single,pins = <
+                       /* Slave 1 */
+                       0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
+                       0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
+                       0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
+                       0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
+                       0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
+                       0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
+                       0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
+                       0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rgmii1_rclk */
+                       0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd3.rgmii1_rd3 */
+                       0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd2.rgmii1_rd2 */
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
+               >;
+       };
+
+       cpsw_sleep: cpsw_sleep {
+               pinctrl-single,pins = <
+                       /* Slave 1 reset value */
+                       0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       davinci_mdio_default: davinci_mdio_default {
+               pinctrl-single,pins = <
+                       /* MDIO */
+                       0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
+                       0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+               >;
+       };
+
+       davinci_mdio_sleep: davinci_mdio_sleep {
+               pinctrl-single,pins = <
+                       /* MDIO reset value */
+                       0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       ecap0_pins: ecap_pins {
+               pinctrl-single,pins = <
+                       0x198 (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* mcasp0_axr0.gpio3_16 Backlight enable */
+                       0x164 (MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
+               >;
+       };
+
+
+       gpio_pin: gpio_pin {
+               pinctrl-single,pins = <
+                       0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)    /* gpmc_a6.gpio1_22 touch reset */
+                       0x60 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a8.gpio1_24 touch irq */
+                       0x64 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a9.gpio1_25 touch power */
+                       0x6c (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_a11.gpio1_27 pad14 to DFU */
+                       0x21c (MUX_MODE0)       /* usb0_drvvbus */
+                       0x234 (MUX_MODE0)       /* usb1_drvvbus */
+                       0x1a0 (PIN_INPUT_PULLUP | MUX_MODE4)    /* mcasp0_aclkr.mmc0_sdwp */
+                       0x160 (PIN_INPUT_PULLUP | MUX_MODE5)    /* spi0_cs1.mmc0_sdcd */
+               >;
+       };
+
+       i2c0_pins: pinmux_i2c0_pins {
+               pinctrl-single,pins = <
+                       0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
+                       0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+               >;
+       };
+
+       i2c1_pins: pinmux_i2c1_pins {
+               pinctrl-single,pins = <
+                       0x158 (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_d1.i2c1_sda */
+                       0x15c (PIN_INPUT_PULLUP | MUX_MODE2)    /* spi0_cs0.i2c1_scl */
+               >;
+       };
+
+       i2c2_pins: pinmux_i2c2_pins {
+               pinctrl-single,pins = <
+                       0x150 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)    /* spi0_sclk.i2c2_sda */
+                       0x154 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)    /* spi0_cs0.i2c2_scl */
+               >;
+       };
+
+       lcd_pins_s0: lcd_pins_s0 {
+               pinctrl-single,pins = <
+                       0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad8.lcd_data23 */
+                       0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad9.lcd_data22 */
+                       0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad10.lcd_data21 */
+                       0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad11.lcd_data20 */
+                       0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad12.lcd_data19 */
+                       0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad13.lcd_data18 */
+                       0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad14.lcd_data17 */
+                       0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad15.lcd_data16 */
+                       0xa0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data0.lcd_data0 */
+                       0xa4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data1.lcd_data1 */
+                       0xa8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data2.lcd_data2 */
+                       0xac (PIN_OUTPUT | MUX_MODE0)           /* lcd_data3.lcd_data3 */
+                       0xb0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data4.lcd_data4 */
+                       0xb4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data5.lcd_data5 */
+                       0xb8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data6.lcd_data6 */
+                       0xbc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data7.lcd_data7 */
+                       0xc0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data8.lcd_data8 */
+                       0xc4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data9.lcd_data9 */
+                       0xc8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data10.lcd_data10 */
+                       0xcc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data11.lcd_data11 */
+                       0xd0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data12.lcd_data12 */
+                       0xd4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data13.lcd_data13 */
+                       0xd8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data14.lcd_data14 */
+                       0xdc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data15.lcd_data15 */
+                       0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_vsync.lcd_vsync */
+                       0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_hsync.lcd_hsync */
+                       0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_pclk.lcd_pclk */
+                       0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_ac_bias_en.lcd_ac_bias_en */
+                       0x194 (PIN_OUTPUT_PULLUP | MUX_MODE7)   /* mcasp0_fsx.gpio3_15 LCD enable */
+               >;
+       };
+
+       nandflash_pins: pinmux_nandflash_pins {
+               pinctrl-single,pins = <
+                       0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
+                       0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
+                       0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
+                       0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
+                       0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                       0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                       0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                       0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+                       0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
+                       0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
+                       0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
+                       0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
+                       0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
+                       0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
+                       0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+               >;
+       };
+
+       uart0_pins: pinmux_uart0_pins {
+               pinctrl-single,pins = <
+                       0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
+                       0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
+               >;
+       };
+};
+
+&wdt2 {
+       wdt-keep-enabled;
+};

diff --git a/arch/arm/dts/am335x-pxm50.dts b/arch/arm/dts/am335x-pxm50.dts
new file mode 100644 (file)
index 0000000..f4e66d2
--- /dev/null
+++ b/arch/arm/dts/am335x-pxm50.dts
@@ -0,0 +1,59 @@
+/*
+ * Copyright (C) 2014 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am335x-pxm2.dtsi"
+
+/ {
+       model = "PXM2/PXM50";
+       compatible = "ti,am335x-evm", "ti,am33xx";
+
+               panel {
+                       compatible = "ti,tilcdc,panel";
+                       backlight = <&backlight0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&lcd_pins_s0>;
+                       enable-gpios = <&gpio3 15 0>;
+                       status = "okay";
+
+                       panel-info {
+                               ac-bias           = <255>;
+                               ac-bias-intrpt    = <0>;
+                               dma-burst-sz      = <16>;
+                               bpp               = <32>;
+                               fdd               = <0x80>;
+                               sync-edge         = <0>;
+                               sync-ctrl         = <1>;
+                               raster-order      = <0>;
+                               fifo-th           = <0>;
+                               tft-alt-mode      = <0>;
+                               invert-pxl-clk    = <0>;
+                       };
+
+                       display-timings {
+                               native-mode = <&timing1>;
+
+                               timing1: 1376x768p50 {
+                                       clock-frequency = <60000000>;
+                                       hactive = <1376>;
+                                       vactive = <768>;
+                                       hfront-porch = <14>;
+                                       hback-porch = <64>;
+                                       hsync-len = <56>;
+                                       vback-porch = <28>;
+                                       vfront-porch = <1>;
+                                       vsync-len = <6>;
+                                       hsync-active = <1>;
+                                       vsync-active = <1>;
+                               };
+                       };
+               };
+};

diff --git a/arch/arm/dts/am335x-rut.dts b/arch/arm/dts/am335x-rut.dts
new file mode 100644 (file)
index 0000000..c6cfbb8
--- /dev/null
+++ b/arch/arm/dts/am335x-rut.dts
@@ -0,0 +1,611 @@
+/*
+ * Copyright (C) 2014 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * Based on:
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "RUT";
+       compatible = "ti,am335x-evm", "ti,am33xx";
+
+       buzzer {
+               compatible = "pwm-beeper";
+               pwms = <&ecap0 0 16000 0>;
+       };
+
+       chosen {
+               stdout-path = &uart0;
+               tick-timer = &timer2;
+       };
+
+       cpus {
+               cpu@0 {
+                       cpu0-supply = <&dcdc2_reg>;
+               };
+       };
+
+       gpio_keys: powerfail-keys {
+               compatible = "gpio-keys";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               autorepeat;
+
+               pwr-fail0 {
+                       label = "power-fail";
+                       linux,code = <KEY_POWER>;
+                       gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+                       gpio-key,wakeup;
+               };
+
+               pwr-fail1 {
+                       label = "power-fail-redundant";
+                       linux,code = <KEY_POWER>;
+                       gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+                       gpio-key,wakeup;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_green {
+                       label = "rut:green:debug:run_mode";
+                       gpios = <&gpio3 20 1>;
+                       /* activelow = 1, default trigger heartbeat */
+               };
+               led_yellow {
+                       label = "rut:debug:yellow:osc_ch1";
+                       gpios = <&gpio0 17 1>;
+                       /* activelow = 1, default trigger mmc0 */
+               };
+               led_red {
+                       label = "rut:debug:red:osc_ch2";
+                       gpios = <&gpio0 16 1>;
+                       /* activelow = 1, default trigger debug_osc_ch2 */
+               };
+               /* optional */
+               led_alive {
+                       label = "rut:alive";
+                       gpios = <&gpio0 15 1>;
+                       linux,default-trigger = "heartbeat";
+                       /* activelow = 1, default trigger heartbeat */
+               };
+
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x10000000>; /* 256 MB */
+       };
+
+       panel {
+               compatible = "ti,tilcdc,panel";
+               pinctrl-names = "default";
+               pinctrl-0 = <&lcd_pins_s0>;
+               status = "okay";
+
+               /* FORMIKE_KWH043ST20_F01 */
+               panel-info {
+                       ac-bias           = <255>;
+                       ac-bias-intrpt    = <0>;
+                       dma-burst-sz      = <16>;
+                       bpp               = <16>;
+                       fdd               = <0x80>;
+                       sync-edge         = <0>;
+                       sync-ctrl         = <1>;
+                       raster-order      = <0>;
+                       fifo-th           = <0>;
+                       tft-alt-mode      = <0>;
+                       invert-pxl-clk    = <1>;
+               };
+
+               display-timings {
+                       native-mode = <&timing1>;
+                       timing1: 480x800p60 {
+                               clock-frequency = <29925000>;
+                               hactive = <480>;
+                               vactive = <800>;
+                               hfront-porch = <50>;
+                               hback-porch = <50>;
+                               hsync-len = <50>;
+                               vback-porch = <50>;
+                               vfront-porch = <50>;
+                               vsync-len = <50>;
+                               hsync-active = <1>;
+                               vsync-active = <1>;
+                       };
+               };
+       };
+
+       vmmc: fixedregulator3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vmmc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
+       watchdog {
+               compatible = "linux,wdt-gpio";
+               gpios = <&gpio0 14 0>;
+               hw_algo = "level";
+               hw_margin_ms = <30000>;
+       };
+};
+
+&aes {
+       status = "okay";
+};
+
+&cppi41dma  {
+       status = "okay";
+};
+
+&cpsw_emac0 {
+       phy_id = <&davinci_mdio>, <1>;
+       phy-mode = "rmii";
+};
+
+&cpsw_emac1 {
+       phy_id = <&davinci_mdio>, <0>;
+       phy-mode = "rmii";
+};
+
+&davinci_mdio {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&davinci_mdio_default>;
+       pinctrl-1 = <&davinci_mdio_sleep>;
+       status = "okay";
+       gpios = <&gpio2 18 0>;
+
+        ethernet_phy: ethernet-phy@1 {
+                compatible = "ethernet-phy-id2000.5ce1";
+                reg = <1>;
+               natsemi,master_mode_fixup;
+        };
+};
+
+&elm {
+       status = "okay";
+};
+
+&epwmss0 {
+       status = "okay";
+
+       ecap0: ecap@48300100 {
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&ecap0_pins>;
+       };
+};
+
+&epwmss1 {
+       status = "okay";
+
+       ehrpwm1: ehrpwm@48302200 {
+               status = "okay";
+               pinctrl-names = "default";
+               pinctrl-0 = <&epwmss1_pins>;
+       };
+};
+
+&gpmc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&nandflash_pins>;
+       status = "okay";
+
+       ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
+
+       nand@0,0 {
+               reg = <0 0 0>; /* CS0, offset 0 */
+               nand-bus-width = <8>;
+               ti,nand-ecc-opt = "bch8";
+               gpmc,device-nand = "true";
+               gpmc,device-width = <1>;
+               gpmc,sync-clk-ps = <0>;
+               gpmc,cs-on-ns = <0>;
+               gpmc,cs-rd-off-ns = <57>;
+               gpmc,cs-wr-off-ns = <57>;
+               gpmc,adv-on-ns = <0>;
+               gpmc,adv-rd-off-ns = <57>;
+               gpmc,adv-wr-off-ns = <57>;
+               gpmc,we-on-ns = <0>;
+               gpmc,we-off-ns = <48>;
+               gpmc,oe-on-ns = <0>;
+               gpmc,oe-off-ns = <57>;
+               gpmc,access-ns = <38>;
+               gpmc,rd-cycle-ns = <67>;
+               gpmc,wr-cycle-ns = <67>;
+               gpmc,wait-on-read = "true";
+               gpmc,wait-on-write = "true";
+               gpmc,bus-turnaround-ns = <0>;
+               gpmc,cycle2cycle-delay-ns = <0>;
+               gpmc,clk-activation-ns = <0>;
+               gpmc,wait-monitoring-ns = <0>;
+               gpmc,wr-access-ns = <96>;
+               gpmc,wr-data-mux-bus-ns = <0>;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+               elm_id = <&elm>;
+       };
+};
+
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c0_pins>;
+       clock-frequency = <400000>;
+       status = "okay";
+
+       eeprom: eeprom@50 {
+               compatible = "atmel,24c128";
+               reg = <0x50>;
+               pagesize = <32>;
+       };
+
+       tps: tps@24 {
+               reg = <0x24>;
+       };
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       atmel: atmel_mxt_ts@4a {
+               compatible = "atmel,maxtouch";
+               reg = <0x4a>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <28 8>;
+               gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
+       };
+
+       temp@48 {
+               compatible = "st,ds75";
+               reg = <0x4c>;
+       };
+};
+
+&lcdc {
+       status = "okay";
+};
+
+&mac {
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&cpsw_default>;
+       pinctrl-1 = <&cpsw_sleep>;
+       status = "okay";
+};
+
+&mmc1 {
+       vmmc-supply = <&vmmc>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       status = "okay";
+};
+
+&phy_sel {
+       rmii-clock-ext;
+};
+
+&sham {
+       status = "okay";
+};
+
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_pins>;
+       status = "okay";
+       spi-flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "mx25l25635e";
+               reg = <0>; /* Chip select 0 */
+               spi-max-frequency = <24000000>;
+
+               partition@0 {
+                       label = "dummy";
+                       reg = <0x0000000 0x8000>;
+               };
+       };
+};
+
+&spi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi1_pins>;
+       status = "okay";
+
+       lcd_init: lcd@0 {
+               compatible = "formike,kwh043st20";
+               reg = <0>;
+               reset-gpios = <&gpio3 19 0>;
+               spi-max-frequency = <1200000>;
+               spi-cpol;
+               spi-cpha;
+               power-on-delay = <10>;
+               reset-delay = <10>;
+       };
+};
+
+/include/ "tps65217.dtsi"
+
+&tps {
+       backlight0: backlight {
+               isel = <1>;  /* 1 - ISET1, 2 ISET2 */
+               fdim = <1000>; /* TPS65217_BL_FDIM_100HZ */
+               default-brightness = <80>;
+       };
+
+       regulators {
+               dcdc1_reg: regulator@0 {
+                       regulator-always-on;
+               };
+
+               dcdc2_reg: regulator@1 {
+                       /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+                       regulator-name = "vdd_mpu";
+                       regulator-min-microvolt = <925000>;
+                       regulator-max-microvolt = <1325000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               dcdc3_reg: regulator@2 {
+                       /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+                       regulator-name = "vdd_core";
+                       regulator-min-microvolt = <925000>;
+                       regulator-max-microvolt = <1150000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+               };
+
+               ldo1_reg: regulator@3 {
+                       regulator-always-on;
+               };
+
+               ldo2_reg: regulator@4 {
+                       regulator-always-on;
+               };
+
+               ldo3_reg: regulator@5 {
+                       regulator-always-on;
+               };
+
+               ldo4_reg: regulator@6 {
+                       regulator-always-on;
+               };
+       };
+};
+
+&tscadc {
+       status = "okay";
+       adc {
+               ti,adc-channels = <4 5 6 7>;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+
+       status = "okay";
+};
+
+&usb {
+       status = "okay";
+};
+
+&usb_ctrl_mod {
+       status = "okay";
+};
+
+&usb0 {
+       dr_mode = "device";
+       status = "okay";
+};
+
+&usb0_phy {
+       status = "okay";
+};
+
+&am33xx_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&clkout2_pin &gpio_pin>;
+
+       clkout2_pin: pinmux_clkout2_pin {
+               pinctrl-single,pins = <
+                       0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
+               >;
+       };
+
+       cpsw_default: cpsw_default {
+               pinctrl-single,pins = <
+                       /* Slave 1 */
+                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
+                       0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.mii1_rxerr */
+                       0x114 (MUX_MODE1)       /* mii1_txen.mii1_txen */
+                       0x124 (MUX_MODE1)       /* mii1_txd1.mii1_txd1 */
+                       0x128 (MUX_MODE1)       /* mii1_txd0.mii1_txd0 */
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.mii1_rxd1 */
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.mii1_rxd0 */
+                       0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
+               >;
+       };
+
+       cpsw_sleep: cpsw_sleep {
+               pinctrl-single,pins = <
+                       /* Slave 1 reset value */
+                       0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       davinci_mdio_default: davinci_mdio_default {
+               pinctrl-single,pins = <
+                       /* MDIO */
+                       0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
+                       0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
+               >;
+       };
+
+       davinci_mdio_sleep: davinci_mdio_sleep {
+               pinctrl-single,pins = <
+                       /* MDIO reset value */
+                       0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+                       0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+               >;
+       };
+
+       ecap0_pins: ecap_pins {
+               pinctrl-single,pins = <
+                       0x164 (MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 buzzer frequency: ecap.0 */
+               >;
+       };
+
+       epwmss1_pins: epwmss_pins {
+               pinctrl-single,pins = <
+                       0x48 (PIN_INPUT | MUX_MODE7)    /* gpmc_a2.gpio1_18 buzzer frequency: ehrpwm1A high-Z due to connected to ecap0 by R0469 */
+                       0x4c (MUX_MODE6)        /* gpmc_a3.ehrpwm1B buzzer volume pwm */
+               >;
+       };
+
+       gpio_pin: gpio_pin {
+               pinctrl-single,pins = <
+                       0x6c (PIN_INPUT | MUX_MODE7)            /* gpmc_a11.gpio1_27 PWR_FAIL_GPIO_SPARE */
+                       0x78 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_be1n.gpio1_28 TOUCH_CHANGE_N */
+                       0x88 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)         /* gpmc_csn3.gpio2_0 RUT_GPIO0_GPIO */
+                       0x118 (PIN_INPUT | MUX_MODE7)           /* gmii1_rxdv.gpio3_4 PWR_FAIL_GPIO */
+                       0x11c (MUX_MODE7)                       /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */
+                       0x120 (MUX_MODE7)                       /* mii1_txd2.gpio0_17 DEBUG_OSC_CH1_GPIO */
+                       0x134 (MUX_MODE7)                       /* gmii1_rxd3.gpio2_18 PHY_RSTn_GPIO */
+                       0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* gmii1_rxd2.gpio2_19 PHY_INT_GPIO */
+                       0x180 (MUX_MODE7)                       /* uart1_rxd.gpio0_14 WATCHDOG_TRIGGER_GPIO */
+                       0x184 (MUX_MODE7)                       /* uart1_txd.gpio0_15 ALIVE_LED_N_GPIO */
+                       0x1a0 (MUX_MODE7)                       /* mcasp0_aclkr.gpio3_18 MAXTOUCH_RESET_GPIO */
+                       0x1a4 (MUX_MODE7)                       /* mcasp0_fsr.gpio3_19 DISPLAY_RESET_GPIO */
+                       0x1a8 (MUX_MODE7)                       /* mcasp0_axr1.gpio3_20 DEBUG_RUN_MODE_GPIO */
+                       0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* mcasp0_ahclkx.gpio3_21 NORFLASH_WP_GPIO */
+                       0x1b0 (PIN_OUTPUT | MUX_MODE3)          /* xdma_event_intr0.clkout1 */
+               >;
+       };
+
+       i2c0_pins: pinmux_i2c0_pins {
+               pinctrl-single,pins = <
+                       0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
+                       0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
+               >;
+       };
+
+       i2c1_pins: pinmux_i2c1_pins {
+               pinctrl-single,pins = <
+                       0x168 (PIN_INPUT | MUX_MODE3)   /* uart0_ctsn.i2c1_sda */
+                       0x16c (PIN_INPUT | MUX_MODE3)   /* uart0.rtsn.i2c1_scl */
+               >;
+       };
+
+       lcd_pins_s0: lcd_pins_s0 {
+               pinctrl-single,pins = <
+                       0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad8.lcd_data23 */
+                       0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad9.lcd_data22 */
+                       0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad10.lcd_data21 */
+                       0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad11.lcd_data20 */
+                       0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad12.lcd_data19 */
+                       0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad13.lcd_data18 */
+                       0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad14.lcd_data17 */
+                       0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad15.lcd_data16 */
+                       0xa0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data0.lcd_data0 */
+                       0xa4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data1.lcd_data1 */
+                       0xa8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data2.lcd_data2 */
+                       0xac (PIN_OUTPUT | MUX_MODE0)           /* lcd_data3.lcd_data3 */
+                       0xb0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data4.lcd_data4 */
+                       0xb4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data5.lcd_data5 */
+                       0xb8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data6.lcd_data6 */
+                       0xbc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data7.lcd_data7 */
+                       0xc0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data8.lcd_data8 */
+                       0xc4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data9.lcd_data9 */
+                       0xc8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data10.lcd_data10 */
+                       0xcc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data11.lcd_data11 */
+                       0xd0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data12.lcd_data12 */
+                       0xd4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data13.lcd_data13 */
+                       0xd8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data14.lcd_data14 */
+                       0xdc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data15.lcd_data15 */
+                       0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_vsync.lcd_vsync */
+                       0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_hsync.lcd_hsync */
+                       0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_pclk.lcd_pclk */
+                       0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_ac_bias_en.lcd_ac_bias_en */
+               >;
+       };
+
+       mmc1_pins: mmc1_pins {
+               pinctrl-single,pins = <
+                       0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat0.mmc0_dat0 */
+                       0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat1.mmc0_dat1 */
+                       0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat2.mmc0_dat2 */
+                       0xfc (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat3.mmc0_dat3 */
+                       0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
+                       0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
+               >;
+       };
+
+       nandflash_pins: pinmux_nandflash_pins {
+               pinctrl-single,pins = <
+                       0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
+                       0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
+                       0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
+                       0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
+                       0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
+                       0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
+                       0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
+                       0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
+                       0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
+                       0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
+                       0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
+                       0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
+                       0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
+                       0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
+                       0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
+               >;
+       };
+
+       spi0_pins: pinmux_spi0_pins {
+               pinctrl-single,pins = <
+                       0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_sclk.spi0_sclk */
+                       0x154 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d0.spi0_d0 */
+                       0x158 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d1.spi0_d1 */
+                       0x15c (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_CS0.spi0_CS0 */
+               >;
+       };
+
+       spi1_pins: pinmux_spi1_pins {
+               pinctrl-single,pins = <
+                       0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* mcasp0_aclkx.spi1_sclk */
+                       0x194 (PIN_INPUT_PULLUP | MUX_MODE3)    /* mcasp0_fsx.spi1_d0 */
+                       0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* mcasp0_axr0.spi1_d1 */
+                       0x19c (PIN_INPUT_PULLUP | MUX_MODE3)    /* mcasp0_ahclkr.spi1_cs0 */
+               >;
+       };
+
+       uart0_pins: pinmux_uart0_pins {
+               pinctrl-single,pins = <
+                       0x170 (PIN_INPUT | MUX_MODE0)   /* uart0_rxd.uart0_rxd */
+                       0x174 (PIN_OUTPUT | MUX_MODE0)  /* uart0_txd.uart0_txd */
+               >;
+       };
+};

diff --git a/arch/arm/dts/am572x-idk.dts b/arch/arm/dts/am572x-idk.dts
new file mode 100644 (file)
index 0000000..b340551
--- /dev/null
+++ b/arch/arm/dts/am572x-idk.dts
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+#include "dra74x.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "am57xx-idk-common.dtsi"
+
+/ {
+       model = "TI AM5728 IDK";
+       compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
+                    "ti,dra7";
+
+       chosen {
+               stdout-path = &uart3;
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x0 0x80000000 0x0 0x80000000>;
+       };
+
+       extcon_usb2: extcon_usb2 {
+               compatible = "linux,extcon-usb-gpio";
+               id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
+       };
+
+       status-leds {
+               compatible = "gpio-leds";
+               cpu0-led {
+                       label = "status0:red:cpu0";
+                       gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+                       linux,default-trigger = "cpu0";
+               };
+
+               usr0-led {
+                       label = "status0:green:usr";
+                       gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               heartbeat-led {
+                       label = "status0:blue:heartbeat";
+                       gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+                       linux,default-trigger = "heartbeat";
+               };
+
+               cpu1-led {
+                       label = "status1:red:cpu1";
+                       gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+                       linux,default-trigger = "cpu1";
+               };
+
+               usr1-led {
+                       label = "status1:green:usr";
+                       gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+               };
+
+               mmc0-led {
+                       label = "status1:blue:mmc0";
+                       gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
+                       default-state = "off";
+                       linux,default-trigger = "mmc0";
+               };
+       };
+};
+
+&omap_dwc3_2 {
+       extcon = <&extcon_usb2>;
+};
+
+&mmc1 {
+       status = "okay";
+       vmmc-supply = <&v3_3d>;
+       vmmc_aux-supply = <&ldo1_reg>;
+       bus-width = <4>;
+       cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
+};

diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi
new file mode 100644 (file)
index 0000000..2805b68
--- /dev/null
+++ b/arch/arm/dts/am57xx-idk-common.dtsi
@@ -0,0 +1,302 @@
+/*
+ * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+       aliases {
+               rtc0 = &tps659038_rtc;
+               rtc1 = &rtc;
+       };
+
+       vmain: fixedregulator-vmain {
+               compatible = "regulator-fixed";
+               regulator-name = "VMAIN";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       v3_3d: fixedregulator-v3_3d {
+               compatible = "regulator-fixed";
+               regulator-name = "V3_3D";
+               vin-supply = <&smps9_reg>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vtt_fixed: fixedregulator-vtt {
+               /* TPS51200 */
+               compatible = "regulator-fixed";
+               regulator-name = "vtt_fixed";
+               vin-supply = <&v3_3d>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       tps659038: tps659038@58 {
+               compatible = "ti,tps659038";
+               reg = <0x58>;
+               interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
+                              &dra7_pmx_core 0x418>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               ti,system-power-controller;
+
+               tps659038_pmic {
+                       compatible = "ti,tps659038-pmic";
+                       regulators {
+                               smps12_reg: smps12 {
+                                       /* VDD_MPU */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps12";
+                                       regulator-min-microvolt = <850000>;
+                                       regulator-max-microvolt = <1250000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               smps3_reg: smps3 {
+                                       /* VDD_DDR EMIF1 EMIF2 */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps3";
+                                       regulator-min-microvolt = <1350000>;
+                                       regulator-max-microvolt = <1350000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               smps45_reg: smps45 {
+                                       /* VDD_DSPEVE on AM572 */
+                                       /* VDD_IVA + VDD_DSP on AM571 */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps45";
+                                       regulator-min-microvolt = <850000>;
+                                       regulator-max-microvolt = <1250000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               smps6_reg: smps6 {
+                                       /* VDD_GPU */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps6";
+                                       regulator-min-microvolt = <850000>;
+                                       regulator-max-microvolt = <1250000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               smps7_reg: smps7 {
+                                       /* VDD_CORE */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps7";
+                                       regulator-min-microvolt = <850000>;
+                                       regulator-max-microvolt = <1150000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               smps8_reg: smps8 {
+                                       /* 5728 - VDD_IVAHD */
+                                       /* 5718 - N.C. test point */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps8";
+                               };
+
+                               smps9_reg: smps9 {
+                                       /* VDD_3_3D */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "smps9";
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldo1_reg: ldo1 {
+                                       /* VDDSHV8 - VSDMMC  */
+                                       /* NOTE: on rev 1.3a, data supply */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldo1";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <3300000>;
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+
+                               ldo2_reg: ldo2 {
+                                       /* VDDSH18V */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldo2";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldo3_reg: ldo3 {
+                                       /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldo3";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldo4_reg: ldo4 {
+                                       /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldo4";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               /* LDO5-8 unused */
+
+                               ldo9_reg: ldo9 {
+                                       /* VDD_RTC  */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldo9";
+                                       regulator-min-microvolt = <840000>;
+                                       regulator-max-microvolt = <1160000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldoln_reg: ldoln {
+                                       /* VDDA_1V8_PLL */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldoln";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldousb_reg: ldousb {
+                                       /* VDDA_3V_USB: VDDA_USBHS33 */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldousb";
+                                       regulator-min-microvolt = <3300000>;
+                                       regulator-max-microvolt = <3300000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               ldortc_reg: ldortc {
+                                       /* VDDA_RTC  */
+                                       vin-supply = <&vmain>;
+                                       regulator-name = "ldortc";
+                                       regulator-min-microvolt = <1800000>;
+                                       regulator-max-microvolt = <1800000>;
+                                       regulator-always-on;
+                                       regulator-boot-on;
+                               };
+
+                               regen1: regen1 {
+                                       /* VDD_3V3_ON */
+                                       regulator-name = "regen1";
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+
+                               regen2: regen2 {
+                                       /* Needed for PMIC internal resource */
+                                       regulator-name = "regen2";
+                                       regulator-boot-on;
+                                       regulator-always-on;
+                               };
+                       };
+               };
+
+               tps659038_rtc: tps659038_rtc {
+                       compatible = "ti,palmas-rtc";
+                       interrupt-parent = <&tps659038>;
+                       interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
+                       wakeup-source;
+               };
+
+               tps659038_pwr_button: tps659038_pwr_button {
+                       compatible = "ti,palmas-pwrbutton";
+                       interrupt-parent = <&tps659038>;
+                       interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+                       wakeup-source;
+                       ti,palmas-long-press-seconds = <12>;
+               };
+
+               tps659038_gpio: tps659038_gpio {
+                       compatible = "ti,palmas-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+       };
+};
+
+&uart3 {
+       status = "okay";
+       interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
+                              &dra7_pmx_core 0x248>;
+};
+
+&rtc {
+       status = "okay";
+       ext-clk-src;
+};
+
+&mac {
+       status = "okay";
+       dual_emac;
+};
+
+&cpsw_emac0 {
+       phy_id = <&davinci_mdio>, <0>;
+       phy-mode = "rgmii";
+       dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+       phy_id = <&davinci_mdio>, <1>;
+       phy-mode = "rgmii";
+       dual_emac_res_vlan = <2>;
+};
+
+&usb2_phy1 {
+       phy-supply = <&ldousb_reg>;
+};
+
+&usb2_phy2 {
+       phy-supply = <&ldousb_reg>;
+};
+
+&usb1 {
+       dr_mode = "host";
+};
+
+&usb2 {
+       dr_mode = "otg";
+};
+
+&mmc2 {
+       status = "okay";
+       vmmc-supply = <&v3_3d>;
+       bus-width = <8>;
+       ti,non-removable;
+       max-frequency = <96000000>;
+};

diff --git a/arch/arm/dts/at91sam9g45-gurnard.dts b/arch/arm/dts/at91sam9g45-gurnard.dts
new file mode 100644 (file)
index 0000000..75c1e99
--- /dev/null
+++ b/arch/arm/dts/at91sam9g45-gurnard.dts
@@ -0,0 +1,157 @@
+/*
+ * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
+ *
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * Licensed under GPLv2.
+ */
+/dts-v1/;
+#include "at91sam9g45.dtsi"
+
+/ {
+       model = "Bluewater Systems Gurnard";
+       compatible = "atmel,at91sam9g45", "atmel,at91sam9";
+
+       chosen {
+               bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory {
+               reg = <0x20000000 0x8000000>;
+       };
+
+       clocks {
+               slow_xtal {
+                       clock-frequency = <32768>;
+               };
+
+               main_xtal {
+                       clock-frequency = <18432000>;
+               };
+       };
+
+       ahb {
+               u-boot,dm-pre-reloc;
+
+               fb@0x00500000 {
+                       u-boot,dm-pre-reloc;
+                       status = "okay";
+                       display-timings {
+                               rev1 {
+                                       clock-frequency = <4166666>;
+                                       hactive = <480>;
+                                       vactive = <272>;
+                                       hfront-porch = <1>;
+                                       hback-porch = <1>;
+                                       hsync-len = <1>;
+                                       vback-porch = <4>;
+                                       vfront-porch = <2>;
+                                       vsync-len = <1>;
+                                       hsync-active = <0>;
+                                       vsync-active = <0>;
+                               };
+
+                               rev2 {
+                                       clock-frequency = <4166666>;
+                                       hactive = <480>;
+                                       vactive = <272>;
+                                       hfront-porch = <2>;
+                                       hback-porch = <2>;
+                                       hsync-len = <10>;
+                                       vback-porch = <2>;
+                                       vfront-porch = <2>;
+                                       vsync-len = <10>;
+                                       hsync-active = <0>;
+                                       vsync-active = <0>;
+                               };
+                       };
+               };
+
+               apb {
+                       pinctrl@fffff400 {
+                               board {
+                                       pinctrl_pck0_as_mck: pck0_as_mck {
+                                               atmel,pins =
+                                                       <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC1 periph B */
+                                       };
+
+                               };
+
+                               mmc0_slot1 {
+                                       pinctrl_board_mmc0_slot1: mmc0_slot1-board {
+                                               atmel,pins =
+                                                       <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;   /* PC9 gpio CD pin pull up and deglitch */
+                                       };
+                               };
+                       };
+
+                       dbgu: serial@ffffee00 {
+                               status = "okay";
+                       };
+
+                       macb0: ethernet@fffbc000 {
+                               phy-mode = "rmii";
+                               status = "okay";
+                       };
+
+                       mmc0: mmc@fff80000 {
+                               pinctrl-0 = <
+                                       &pinctrl_board_mmc0_slot1
+                                       &pinctrl_mmc0_slot0_clk_cmd_dat0
+                                       &pinctrl_mmc0_slot0_dat1_3>;
+                               status = "okay";
+                               slot@1 {
+                                       reg = <1>;
+                                       bus-width = <4>;
+                                       cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
+                               };
+                       };
+
+                       ssc0: ssc@fff9c000 {
+                               status = "okay";
+                               pinctrl-0 = <&pinctrl_ssc0_tx>;
+                       };
+
+                       spi0: spi@fffa4000 {
+                               cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
+                               mtd_dataflash@0 {
+                                       compatible = "atmel,at45", "atmel,dataflash";
+                                       spi-max-frequency = <50000000>;
+                                       reg = <1>;
+                               };
+                       };
+
+                       shdwc@fffffd10 {
+                               atmel,wakeup-counter = <10>;
+                               atmel,wakeup-rtt-timer;
+                       };
+
+                       rtc@fffffd20 {
+                               atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+                               status = "okay";
+                       };
+
+                       watchdog@fffffd40 {
+                               status = "okay";
+                       };
+
+                       gpbr: syscon@fffffd60 {
+                               status = "okay";
+                       };
+               };
+
+               nand0: nand@40000000 {
+                       nand-bus-width = <8>;
+                       nand-ecc-mode = "hardware";
+                       nand-on-flash-bbt;
+                       status = "okay";
+               };
+
+               usb1: ehci@00800000 {
+                       atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
+                       status = "okay";
+               };
+       };
+
+};

diff --git a/arch/arm/dts/at91sam9g45.dtsi b/arch/arm/dts/at91sam9g45.dtsi
new file mode 100644 (file)
index 0000000..af8b708
--- /dev/null
+++ b/arch/arm/dts/at91sam9g45.dtsi
@@ -0,0 +1,1335 @@
+/*
+ * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
+ *                    applies to AT91SAM9G45, AT91SAM9M10,
+ *                    AT91SAM9G46, AT91SAM9M11 SoC
+ *
+ *  Copyright (C) 2011 Atmel,
+ *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include "skeleton.dtsi"
+#include <dt-bindings/dma/at91.h>
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/at91.h>
+
+/ {
+       model = "Atmel AT91SAM9G45 family SoC";
+       compatible = "atmel,at91sam9g45";
+       interrupt-parent = <&aic>;
+
+       aliases {
+               serial0 = &dbgu;
+               serial1 = &usart0;
+               serial2 = &usart1;
+               serial3 = &usart2;
+               serial4 = &usart3;
+               gpio0 = &pioA;
+               gpio1 = &pioB;
+               gpio2 = &pioC;
+               gpio3 = &pioD;
+               gpio4 = &pioE;
+               tcb0 = &tcb0;
+               tcb1 = &tcb1;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               ssc0 = &ssc0;
+               ssc1 = &ssc1;
+               pwm0 = &pwm0;
+       };
+       cpus {
+               #address-cells = <0>;
+               #size-cells = <0>;
+
+               cpu {
+                       compatible = "arm,arm926ej-s";
+                       device_type = "cpu";
+               };
+       };
+
+       memory {
+               reg = <0x70000000 0x10000000>;
+       };
+
+       clocks {
+               slow_xtal: slow_xtal {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <0>;
+               };
+
+               main_xtal: main_xtal {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <0>;
+               };
+
+               adc_op_clk: adc_op_clk{
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <300000>;
+               };
+       };
+
+       sram: sram@00300000 {
+               compatible = "mmio-sram";
+               reg = <0x00300000 0x10000>;
+       };
+
+       ahb {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               apb {
+                       compatible = "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       aic: interrupt-controller@fffff000 {
+                               #interrupt-cells = <3>;
+                               compatible = "atmel,at91rm9200-aic";
+                               interrupt-controller;
+                               reg = <0xfffff000 0x200>;
+                               atmel,external-irqs = <31>;
+                       };
+
+                       ramc0: ramc@ffffe400 {
+                               compatible = "atmel,at91sam9g45-ddramc";
+                               reg = <0xffffe400 0x200>;
+                               clocks = <&ddrck>;
+                               clock-names = "ddrck";
+                       };
+
+                       ramc1: ramc@ffffe600 {
+                               compatible = "atmel,at91sam9g45-ddramc";
+                               reg = <0xffffe600 0x200>;
+                               clocks = <&ddrck>;
+                               clock-names = "ddrck";
+                       };
+
+                       pmc: pmc@fffffc00 {
+                               compatible = "atmel,at91sam9g45-pmc", "syscon";
+                               reg = <0xfffffc00 0x100>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               interrupt-controller;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               #interrupt-cells = <1>;
+
+                               main_osc: main_osc {
+                                       compatible = "atmel,at91rm9200-clk-main-osc";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MOSCS>;
+                                       clocks = <&main_xtal>;
+                               };
+
+                               main: mainck {
+                                       compatible = "atmel,at91rm9200-clk-main";
+                                       #clock-cells = <0>;
+                                       clocks = <&main_osc>;
+                               };
+
+                               plla: pllack {
+                                       compatible = "atmel,at91rm9200-clk-pll";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKA>;
+                                       clocks = <&main>;
+                                       reg = <0>;
+                                       atmel,clk-input-range = <2000000 32000000>;
+                                       #atmel,pll-clk-output-range-cells = <4>;
+                                       atmel,pll-clk-output-ranges = <745000000 800000000 0 0
+                                                                      695000000 750000000 1 0
+                                                                      645000000 700000000 2 0
+                                                                      595000000 650000000 3 0
+                                                                      545000000 600000000 0 1
+                                                                      495000000 555000000 1 1
+                                                                      445000000 500000000 2 1
+                                                                      400000000 450000000 3 1>;
+                               };
+
+                               plladiv: plladivck {
+                                       compatible = "atmel,at91sam9x5-clk-plldiv";
+                                       #clock-cells = <0>;
+                                       clocks = <&plla>;
+                               };
+
+                               utmi: utmick {
+                                       compatible = "atmel,at91sam9x5-clk-utmi";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_LOCKU>;
+                                       clocks = <&main>;
+                               };
+
+                               mck: masterck {
+                                       compatible = "atmel,at91rm9200-clk-master";
+                                       #clock-cells = <0>;
+                                       interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
+                                       atmel,clk-output-range = <0 133333333>;
+                                       atmel,clk-divisors = <1 2 4 3>;
+                               };
+
+                               usb: usbck {
+                                       compatible = "atmel,at91sam9x5-clk-usb";
+                                       #clock-cells = <0>;
+                                       clocks = <&plladiv>, <&utmi>;
+                               };
+
+                               prog: progck {
+                                       compatible = "atmel,at91sam9g45-clk-programmable";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       interrupt-parent = <&pmc>;
+                                       clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
+
+                                       prog0: prog0 {
+                                               #clock-cells = <0>;
+                                               reg = <0>;
+                                               interrupts = <AT91_PMC_PCKRDY(0)>;
+                                       };
+
+                                       prog1: prog1 {
+                                               #clock-cells = <0>;
+                                               reg = <1>;
+                                               interrupts = <AT91_PMC_PCKRDY(1)>;
+                                       };
+                               };
+
+                               systemck {
+                                       compatible = "atmel,at91rm9200-clk-system";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       ddrck: ddrck {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                               clocks = <&mck>;
+                                       };
+
+                                       uhpck: uhpck {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                               clocks = <&usb>;
+                                       };
+
+                                       pck0: pck0 {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                               clocks = <&prog0>;
+                                       };
+
+                                       pck1: pck1 {
+                                               #clock-cells = <0>;
+                                               reg = <9>;
+                                               clocks = <&prog1>;
+                                       };
+                               };
+
+                               periphck {
+                                       compatible = "atmel,at91rm9200-clk-peripheral";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       clocks = <&mck>;
+
+                                       pioA_clk: pioA_clk {
+                                               #clock-cells = <0>;
+                                               reg = <2>;
+                                       };
+
+                                       pioB_clk: pioB_clk {
+                                               #clock-cells = <0>;
+                                               reg = <3>;
+                                       };
+
+                                       pioC_clk: pioC_clk {
+                                               #clock-cells = <0>;
+                                               reg = <4>;
+                                       };
+
+                                       pioDE_clk: pioDE_clk {
+                                               #clock-cells = <0>;
+                                               reg = <5>;
+                                       };
+
+                                       trng_clk: trng_clk {
+                                               #clock-cells = <0>;
+                                               reg = <6>;
+                                       };
+
+                                       usart0_clk: usart0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <7>;
+                                       };
+
+                                       usart1_clk: usart1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <8>;
+                                       };
+
+                                       usart2_clk: usart2_clk {
+                                               #clock-cells = <0>;
+                                               reg = <9>;
+                                       };
+
+                                       usart3_clk: usart3_clk {
+                                               #clock-cells = <0>;
+                                               reg = <10>;
+                                       };
+
+                                       mci0_clk: mci0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <11>;
+                                       };
+
+                                       twi0_clk: twi0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <12>;
+                                       };
+
+                                       twi1_clk: twi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <13>;
+                                       };
+
+                                       spi0_clk: spi0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <14>;
+                                       };
+
+                                       spi1_clk: spi1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <15>;
+                                       };
+
+                                       ssc0_clk: ssc0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <16>;
+                                       };
+
+                                       ssc1_clk: ssc1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <17>;
+                                       };
+
+                                       tcb0_clk: tcb0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <18>;
+                                       };
+
+                                       pwm_clk: pwm_clk {
+                                               #clock-cells = <0>;
+                                               reg = <19>;
+                                       };
+
+                                       adc_clk: adc_clk {
+                                               #clock-cells = <0>;
+                                               reg = <20>;
+                                       };
+
+                                       dma0_clk: dma0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <21>;
+                                       };
+
+                                       uhphs_clk: uhphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <22>;
+                                       };
+
+                                       lcd_clk: lcd_clk {
+                                               #clock-cells = <0>;
+                                               reg = <23>;
+                                       };
+
+                                       ac97_clk: ac97_clk {
+                                               #clock-cells = <0>;
+                                               reg = <24>;
+                                       };
+
+                                       macb0_clk: macb0_clk {
+                                               #clock-cells = <0>;
+                                               reg = <25>;
+                                       };
+
+                                       isi_clk: isi_clk {
+                                               #clock-cells = <0>;
+                                               reg = <26>;
+                                       };
+
+                                       udphs_clk: udphs_clk {
+                                               #clock-cells = <0>;
+                                               reg = <27>;
+                                       };
+
+                                       aestdessha_clk: aestdessha_clk {
+                                               #clock-cells = <0>;
+                                               reg = <28>;
+                                       };
+
+                                       mci1_clk: mci1_clk {
+                                               #clock-cells = <0>;
+                                               reg = <29>;
+                                       };
+
+                                       vdec_clk: vdec_clk {
+                                               #clock-cells = <0>;
+                                               reg = <30>;
+                                       };
+                               };
+                       };
+
+                       rstc@fffffd00 {
+                               compatible = "atmel,at91sam9g45-rstc";
+                               reg = <0xfffffd00 0x10>;
+                               clocks = <&clk32k>;
+                       };
+
+                       pit: timer@fffffd30 {
+                               compatible = "atmel,at91sam9260-pit";
+                               reg = <0xfffffd30 0xf>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&mck>;
+                       };
+
+
+                       shdwc@fffffd10 {
+                               compatible = "atmel,at91sam9rl-shdwc";
+                               reg = <0xfffffd10 0x10>;
+                               clocks = <&clk32k>;
+                       };
+
+                       tcb0: timer@fff7c000 {
+                               compatible = "atmel,at91rm9200-tcb";
+                               reg = <0xfff7c000 0x100>;
+                               interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
+                               clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+                       };
+
+                       tcb1: timer@fffd4000 {
+                               compatible = "atmel,at91rm9200-tcb";
+                               reg = <0xfffd4000 0x100>;
+                               interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
+                               clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
+                       };
+
+                       dma: dma-controller@ffffec00 {
+                               compatible = "atmel,at91sam9g45-dma";
+                               reg = <0xffffec00 0x200>;
+                               interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
+                               #dma-cells = <2>;
+                               clocks = <&dma0_clk>;
+                               clock-names = "dma_clk";
+                       };
+
+                       pinctrl@fffff200 {
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
+                               ranges = <0xfffff200 0xfffff200 0xa00>;
+
+                               atmel,mux-mask = <
+                                     /*    A         B     */
+                                      0xffffffff 0xffc003ff  /* pioA */
+                                      0xffffffff 0x800f8f00  /* pioB */
+                                      0xffffffff 0x00000e00  /* pioC */
+                                      0xffffffff 0xff0c1381  /* pioD */
+                                      0xffffffff 0x81ffff81  /* pioE */
+                                     >;
+
+                               /* shared pinctrl settings */
+                               adc0 {
+                                       pinctrl_adc0_adtrg: adc0_adtrg {
+                                               atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad0: adc0_ad0 {
+                                               atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad1: adc0_ad1 {
+                                               atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad2: adc0_ad2 {
+                                               atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad3: adc0_ad3 {
+                                               atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad4: adc0_ad4 {
+                                               atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad5: adc0_ad5 {
+                                               atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad6: adc0_ad6 {
+                                               atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                                       pinctrl_adc0_ad7: adc0_ad7 {
+                                               atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
+                               dbgu {
+                                       pinctrl_dbgu: dbgu-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A */
+                                                        AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
+                                       };
+                               };
+
+                               i2c0 {
+                                       pinctrl_i2c0: i2c0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
+                                                        AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
+                                       };
+                               };
+
+                               i2c1 {
+                                       pinctrl_i2c1: i2c1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
+                                                        AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
+                                       };
+                               };
+
+                               isi {
+                                       pinctrl_isi_data_0_7: isi-0-data-0-7 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
+                                                       AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
+                                                       AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
+                                                       AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
+                                                       AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
+                                                       AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
+                                                       AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
+                                                       AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
+                                                       AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
+                                                       AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
+                                                       AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
+                                       };
+
+                                       pinctrl_isi_data_8_9: isi-0-data-8-9 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
+                                                       AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
+                                       };
+
+                                       pinctrl_isi_data_10_11: isi-0-data-10-11 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
+                                                       AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
+                                       };
+                               };
+
+                               usart0 {
+                                       pinctrl_usart0: usart0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A with pullup */
+                                                        AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
+                                       };
+
+                                       pinctrl_usart0_rts: usart0_rts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
+                                       };
+
+                                       pinctrl_usart0_cts: usart0_cts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
+                                       };
+                               };
+
+                               uart1 {
+                                       pinctrl_usart1: usart1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
+                                                        AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
+                                       };
+
+                                       pinctrl_usart1_rts: usart1_rts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
+                                       };
+
+                                       pinctrl_usart1_cts: usart1_cts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
+                                       };
+                               };
+
+                               usart2 {
+                                       pinctrl_usart2: usart2-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
+                                                        AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A */
+                                       };
+
+                                       pinctrl_usart2_rts: usart2_rts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC9 periph B */
+                                       };
+
+                                       pinctrl_usart2_cts: usart2_cts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
+                                       };
+                               };
+
+                               usart3 {
+                                       pinctrl_usart3: usart3-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
+                                                        AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
+                                       };
+
+                                       pinctrl_usart3_rts: usart3_rts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
+                                       };
+
+                                       pinctrl_usart3_cts: usart3_cts-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
+                                       };
+                               };
+
+                               nand {
+                                       pinctrl_nand: nand-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PC8 gpio RDY pin pull_up*/
+                                                        AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PC14 gpio enable pin pull_up */
+                                       };
+                               };
+
+                               macb {
+                                       pinctrl_macb_rmii: macb_rmii-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
+                                                        AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
+                                                        AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
+                                                        AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
+                                                        AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
+                                                        AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
+                                                        AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
+                                                        AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
+                                                        AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
+                                                        AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
+                                       };
+
+                                       pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA6 periph B */
+                                                        AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA7 periph B */
+                                                        AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA8 periph B */
+                                                        AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA9 periph B */
+                                                        AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
+                                                        AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
+                                                        AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA29 periph B */
+                                                        AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
+                                       };
+                               };
+
+                               mmc0 {
+                                       pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A */
+                                                        AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
+                                                        AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA2 periph A with pullup */
+                                       };
+
+                                       pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
+                                                        AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
+                                                        AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
+                                       };
+
+                                       pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
+                                                        AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+                                                        AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
+                                                        AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA9 periph A with pullup */
+                                       };
+                               };
+
+                               mmc1 {
+                                       pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA31 periph A */
+                                                        AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA22 periph A with pullup */
+                                                        AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
+                                       };
+
+                                       pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
+                                                        AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA25 periph A with pullup */
+                                                        AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA26 periph A with pullup */
+                                       };
+
+                                       pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA27 periph A with pullup */
+                                                        AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
+                                                        AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA29 periph A with pullup */
+                                                        AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA30 periph A with pullup */
+                                       };
+                               };
+
+                               ssc0 {
+                                       pinctrl_ssc0_tx: ssc0_tx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A */
+                                                        AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A */
+                                                        AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD2 periph A */
+                                       };
+
+                                       pinctrl_ssc0_rx: ssc0_rx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A */
+                                                        AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD4 periph A */
+                                                        AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD5 periph A */
+                                       };
+                               };
+
+                               ssc1 {
+                                       pinctrl_ssc1_tx: ssc1_tx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A */
+                                                        AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A */
+                                                        AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
+                                       };
+
+                                       pinctrl_ssc1_rx: ssc1_rx-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD13 periph A */
+                                                        AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A */
+                                                        AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
+                                       };
+                               };
+
+                               spi0 {
+                                       pinctrl_spi0: spi0-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI0_MISO pin */
+                                                        AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI0_MOSI pin */
+                                                        AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI0_SPCK pin */
+                                       };
+                               };
+
+                               spi1 {
+                                       pinctrl_spi1: spi1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A SPI1_MISO pin */
+                                                        AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A SPI1_MOSI pin */
+                                                        AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
+                                       };
+                               };
+
+                               tcb0 {
+                                       pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
+                                               atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
+                                               atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
+                                               atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
+                                               atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
+                                               atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
+                                               atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
+                                               atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
+                                               atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
+                                               atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
+                               tcb1 {
+                                       pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
+                                               atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
+                                               atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
+                                               atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
+                                               atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
+                                               atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
+                                               atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
+                                               atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
+                                               atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+
+                                       pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
+                                               atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+                                       };
+                               };
+
+                               fb {
+                                       pinctrl_fb: fb-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE0 periph A */
+                                                        AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE2 periph A */
+                                                        AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE3 periph A */
+                                                        AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE4 periph A */
+                                                        AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE5 periph A */
+                                                        AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE6 periph A */
+                                                        AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE7 periph A */
+                                                        AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE8 periph A */
+                                                        AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE9 periph A */
+                                                        AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE10 periph A */
+                                                        AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE11 periph A */
+                                                        AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE12 periph A */
+                                                        AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE13 periph A */
+                                                        AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE14 periph A */
+                                                        AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE15 periph A */
+                                                        AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE16 periph A */
+                                                        AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE17 periph A */
+                                                        AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE18 periph A */
+                                                        AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE19 periph A */
+                                                        AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE20 periph A */
+                                                        AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
+                                                        AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE22 periph A */
+                                                        AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
+                                                        AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
+                                                        AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
+                                                        AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
+                                                        AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
+                                                        AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
+                                                        AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
+                                                        AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
+                                       };
+                               };
+
+                               pioA: gpio@fffff200 {
+                                       compatible = "atmel,at91rm9200-gpio";
+                                       reg = <0xfffff200 0x200>;
+                                       interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+                                       #gpio-cells = <2>;
+                                       gpio-controller;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                                       clocks = <&pioA_clk>;
+                               };
+
+                               pioB: gpio@fffff400 {
+                                       compatible = "atmel,at91rm9200-gpio";
+                                       reg = <0xfffff400 0x200>;
+                                       interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+                                       #gpio-cells = <2>;
+                                       gpio-controller;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                                       clocks = <&pioB_clk>;
+                               };
+
+                               pioC: gpio@fffff600 {
+                                       compatible = "atmel,at91rm9200-gpio";
+                                       reg = <0xfffff600 0x200>;
+                                       interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+                                       #gpio-cells = <2>;
+                                       gpio-controller;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                                       clocks = <&pioC_clk>;
+                               };
+
+                               pioD: gpio@fffff800 {
+                                       compatible = "atmel,at91rm9200-gpio";
+                                       reg = <0xfffff800 0x200>;
+                                       interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
+                                       #gpio-cells = <2>;
+                                       gpio-controller;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                                       clocks = <&pioDE_clk>;
+                               };
+
+                               pioE: gpio@fffffa00 {
+                                       compatible = "atmel,at91rm9200-gpio";
+                                       reg = <0xfffffa00 0x200>;
+                                       interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
+                                       #gpio-cells = <2>;
+                                       gpio-controller;
+                                       interrupt-controller;
+                                       #interrupt-cells = <2>;
+                                       clocks = <&pioDE_clk>;
+                               };
+                       };
+
+                       dbgu: serial@ffffee00 {
+                               compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
+                               reg = <0xffffee00 0x200>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_dbgu>;
+                               clocks = <&mck>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       usart0: serial@fff8c000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfff8c000 0x200>;
+                               interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
+                               atmel,use-dma-rx;
+                               atmel,use-dma-tx;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_usart0>;
+                               clocks = <&usart0_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       usart1: serial@fff90000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfff90000 0x200>;
+                               interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
+                               atmel,use-dma-rx;
+                               atmel,use-dma-tx;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_usart1>;
+                               clocks = <&usart1_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       usart2: serial@fff94000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfff94000 0x200>;
+                               interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
+                               atmel,use-dma-rx;
+                               atmel,use-dma-tx;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_usart2>;
+                               clocks = <&usart2_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       usart3: serial@fff98000 {
+                               compatible = "atmel,at91sam9260-usart";
+                               reg = <0xfff98000 0x200>;
+                               interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
+                               atmel,use-dma-rx;
+                               atmel,use-dma-tx;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_usart3>;
+                               clocks = <&usart3_clk>;
+                               clock-names = "usart";
+                               status = "disabled";
+                       };
+
+                       macb0: ethernet@fffbc000 {
+                               compatible = "cdns,at91sam9260-macb", "cdns,macb";
+                               reg = <0xfffbc000 0x100>;
+                               interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_macb_rmii>;
+                               clocks = <&macb0_clk>, <&macb0_clk>;
+                               clock-names = "hclk", "pclk";
+                               status = "disabled";
+                       };
+
+                       trng@fffcc000 {
+                               compatible = "atmel,at91sam9g45-trng";
+                               reg = <0xfffcc000 0x4000>;
+                               interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&trng_clk>;
+                       };
+
+                       i2c0: i2c@fff84000 {
+                               compatible = "atmel,at91sam9g10-i2c";
+                               reg = <0xfff84000 0x100>;
+                               interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&twi0_clk>;
+                               status = "disabled";
+                       };
+
+                       i2c1: i2c@fff88000 {
+                               compatible = "atmel,at91sam9g10-i2c";
+                               reg = <0xfff88000 0x100>;
+                               interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c1>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&twi1_clk>;
+                               status = "disabled";
+                       };
+
+                       ssc0: ssc@fff9c000 {
+                               compatible = "atmel,at91sam9g45-ssc";
+                               reg = <0xfff9c000 0x4000>;
+                               interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+                               clocks = <&ssc0_clk>;
+                               clock-names = "pclk";
+                               status = "disabled";
+                       };
+
+                       ssc1: ssc@fffa0000 {
+                               compatible = "atmel,at91sam9g45-ssc";
+                               reg = <0xfffa0000 0x4000>;
+                               interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+                               clocks = <&ssc1_clk>;
+                               clock-names = "pclk";
+                               status = "disabled";
+                       };
+
+                       adc0: adc@fffb0000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91sam9g45-adc";
+                               reg = <0xfffb0000 0x100>;
+                               interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&adc_clk>, <&adc_op_clk>;
+                               clock-names = "adc_clk", "adc_op_clk";
+                               atmel,adc-channels-used = <0xff>;
+                               atmel,adc-vref = <3300>;
+                               atmel,adc-startup-time = <40>;
+                               atmel,adc-res = <8 10>;
+                               atmel,adc-res-names = "lowres", "highres";
+                               atmel,adc-use-res = "highres";
+
+                               trigger@0 {
+                                       reg = <0>;
+                                       trigger-name = "external-rising";
+                                       trigger-value = <0x1>;
+                                       trigger-external;
+                               };
+                               trigger@1 {
+                                       reg = <1>;
+                                       trigger-name = "external-falling";
+                                       trigger-value = <0x2>;
+                                       trigger-external;
+                               };
+
+                               trigger@2 {
+                                       reg = <2>;
+                                       trigger-name = "external-any";
+                                       trigger-value = <0x3>;
+                                       trigger-external;
+                               };
+
+                               trigger@3 {
+                                       reg = <3>;
+                                       trigger-name = "continuous";
+                                       trigger-value = <0x6>;
+                               };
+                       };
+
+                       isi@fffb4000 {
+                               compatible = "atmel,at91sam9g45-isi";
+                               reg = <0xfffb4000 0x4000>;
+                               interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
+                               clocks = <&isi_clk>;
+                               clock-names = "isi_clk";
+                               status = "disabled";
+                               port {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
+                       };
+
+                       pwm0: pwm@fffb8000 {
+                               compatible = "atmel,at91sam9rl-pwm";
+                               reg = <0xfffb8000 0x300>;
+                               interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
+                               #pwm-cells = <3>;
+                               clocks = <&pwm_clk>;
+                               status = "disabled";
+                       };
+
+                       mmc0: mmc@fff80000 {
+                               compatible = "atmel,hsmci";
+                               reg = <0xfff80000 0x600>;
+                               interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
+                               pinctrl-names = "default";
+                               dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
+                               dma-names = "rxtx";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&mci0_clk>;
+                               clock-names = "mci_clk";
+                               status = "disabled";
+                       };
+
+                       mmc1: mmc@fffd0000 {
+                               compatible = "atmel,hsmci";
+                               reg = <0xfffd0000 0x600>;
+                               interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
+                               pinctrl-names = "default";
+                               dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
+                               dma-names = "rxtx";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&mci1_clk>;
+                               clock-names = "mci_clk";
+                               status = "disabled";
+                       };
+
+                       watchdog@fffffd40 {
+                               compatible = "atmel,at91sam9260-wdt";
+                               reg = <0xfffffd40 0x10>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&clk32k>;
+                               atmel,watchdog-type = "hardware";
+                               atmel,reset-type = "all";
+                               atmel,dbg-halt;
+                               status = "disabled";
+                       };
+
+                       spi0: spi@fffa4000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91rm9200-spi";
+                               reg = <0xfffa4000 0x200>;
+                               interrupts = <14 4 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_spi0>;
+                               clocks = <&spi0_clk>;
+                               clock-names = "spi_clk";
+                               status = "disabled";
+                       };
+
+                       spi1: spi@fffa8000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91rm9200-spi";
+                               reg = <0xfffa8000 0x200>;
+                               interrupts = <15 4 3>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_spi1>;
+                               clocks = <&spi1_clk>;
+                               clock-names = "spi_clk";
+                               status = "disabled";
+                       };
+
+                       usb2: gadget@fff78000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "atmel,at91sam9g45-udc";
+                               reg = <0x00600000 0x80000
+                                      0xfff78000 0x400>;
+                               interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
+                               clocks = <&udphs_clk>, <&utmi>;
+                               clock-names = "pclk", "hclk";
+                               status = "disabled";
+
+                               ep0 {
+                                       reg = <0>;
+                                       atmel,fifo-size = <64>;
+                                       atmel,nb-banks = <1>;
+                               };
+
+                               ep1 {
+                                       reg = <1>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <2>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep2 {
+                                       reg = <2>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <2>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep3 {
+                                       reg = <3>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                               };
+
+                               ep4 {
+                                       reg = <4>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                               };
+
+                               ep5 {
+                                       reg = <5>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+
+                               ep6 {
+                                       reg = <6>;
+                                       atmel,fifo-size = <1024>;
+                                       atmel,nb-banks = <3>;
+                                       atmel,can-dma;
+                                       atmel,can-isoc;
+                               };
+                       };
+
+                       sckc@fffffd50 {
+                               compatible = "atmel,at91sam9x5-sckc";
+                               reg = <0xfffffd50 0x4>;
+
+                               slow_osc: slow_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-osc";
+                                       #clock-cells = <0>;
+                                       atmel,startup-time-usec = <1200000>;
+                                       clocks = <&slow_xtal>;
+                               };
+
+                               slow_rc_osc: slow_rc_osc {
+                                       compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
+                                       #clock-cells = <0>;
+                                       atmel,startup-time-usec = <75>;
+                                       clock-frequency = <32768>;
+                                       clock-accuracy = <50000000>;
+                               };
+
+                               clk32k: slck {
+                                       compatible = "atmel,at91sam9x5-clk-slow";
+                                       #clock-cells = <0>;
+                                       clocks = <&slow_rc_osc &slow_osc>;
+                               };
+                       };
+
+                       rtc@fffffd20 {
+                               compatible = "atmel,at91sam9260-rtt";
+                               reg = <0xfffffd20 0x10>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&clk32k>;
+                               status = "disabled";
+                       };
+
+                       rtc@fffffdb0 {
+                               compatible = "atmel,at91rm9200-rtc";
+                               reg = <0xfffffdb0 0x30>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+                               clocks = <&clk32k>;
+                               status = "disabled";
+                       };
+
+                       gpbr: syscon@fffffd60 {
+                               compatible = "atmel,at91sam9260-gpbr", "syscon";
+                               reg = <0xfffffd60 0x10>;
+                               status = "disabled";
+                       };
+               };
+
+               fb0: fb@0x00500000 {
+                       compatible = "atmel,at91sam9g45-lcdc";
+                       reg = <0x00500000 0x1000>;
+                       interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_fb>;
+                       clocks = <&lcd_clk>, <&lcd_clk>;
+                       clock-names = "hclk", "lcdc_clk";
+                       status = "disabled";
+               };
+
+               nand0: nand@40000000 {
+                       compatible = "atmel,at91rm9200-nand";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       reg = <0x40000000 0x10000000
+                              0xffffe200 0x200
+                             >;
+                       atmel,nand-addr-offset = <21>;
+                       atmel,nand-cmd-offset = <22>;
+                       atmel,nand-has-dma;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_nand>;
+                       gpios = <&pioC 8 GPIO_ACTIVE_HIGH
+                                &pioC 14 GPIO_ACTIVE_HIGH
+                                0
+                               >;
+                       status = "disabled";
+               };
+
+               usb0: ohci@00700000 {
+                       compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+                       reg = <0x00700000 0x100000>;
+                       interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                       clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
+                       clock-names = "ohci_clk", "hclk", "uhpck";
+                       status = "disabled";
+               };
+
+               usb1: ehci@00800000 {
+                       compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+                       reg = <0x00800000 0x100000>;
+                       interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
+                       clocks = <&utmi>, <&uhphs_clk>;
+                       clock-names = "usb_clk", "ehci_clk";
+                       status = "disabled";
+               };
+       };
+
+       i2c@0 {
+               compatible = "i2c-gpio";
+               gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
+                        &pioA 21 GPIO_ACTIVE_HIGH /* scl */
+                       >;
+               i2c-gpio,sda-open-drain;
+               i2c-gpio,scl-open-drain;
+               i2c-gpio,delay-us = <5>;        /* ~100 kHz */
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+};

diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index 547ec278376910b6b5cde92aae91d97a9fd12cfb..0a7f1ffb2db39cac2caf62c10c7bf6c0f1b77d96 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -15,6 +15,7 @@
        compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
 
        aliases {
+               spi0 = &qspi;
                spi1 = &dspi;
        };
 };
@@ -51,3 +52,16 @@
                reg = <2>;
        };
 };
+
+&qspi {
+       bus-num = <0>;
+       status = "okay";
+
+       qflash0: s25fs256s@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+       };
+};

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index a5c579c5a54e35f6df192471db4d43a4805aa327..68ed1338535c516512fac31cea2b2187210f2560 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -126,4 +126,14 @@
                interrupts = <0 26 0x4>; /* Level high type */
                num-cs = <6>;
        };
+
+       qspi: quadspi@1550000 {
+               compatible = "fsl,vf610-qspi";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x0 0x20c0000 0x0 0x10000>,
+                       <0x0 0x20000000 0x0 0x10000000>;
+               reg-names = "QuadSPI", "QuadSPI-memory";
+               num-cs = <4>;
+       };
 };

diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c
index 8bbcc224546311213bf1ddccda9b0cb5981e89db..67318250607dd23604d2d799c4a4dff23764289b 100644 (file)
--- a/arch/arm/imx-common/hab.c
+++ b/arch/arm/imx-common/hab.c
@@ -17,60 +17,55 @@
 
 #define hab_rvt_report_event_p                                 \
 (                                                              \
-       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
-         is_cpu_type(MXC_CPU_MX6D)) &&                         \
-         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       (is_mx6dqp()) ?                                         \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
-        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?           \
+       ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
+       (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?          \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)        \
 )
 
 #define hab_rvt_report_status_p                                        \
 (                                                              \
-       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
-         is_cpu_type(MXC_CPU_MX6D)) &&                         \
-         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       (is_mx6dqp()) ?                                         \
+       ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
+       (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?           \
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
-        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?          \
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)      \
 )
 
 #define hab_rvt_authenticate_image_p                           \
 (                                                              \
-       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
-         is_cpu_type(MXC_CPU_MX6D)) &&                         \
-         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       (is_mx6dqp()) ?                                         \
+       ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
+       (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?           \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
-        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?          \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)    \
 )
 
 #define hab_rvt_entry_p                                                \
 (                                                              \
-       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
-         is_cpu_type(MXC_CPU_MX6D)) &&                         \
-         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       (is_mx6dqp()) ?                                         \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
-        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?           \
+       ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
+       (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?          \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY)                      \
 )
 
 #define hab_rvt_exit_p                                         \
 (                                                              \
-       ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
-         is_cpu_type(MXC_CPU_MX6D)) &&                         \
-         (soc_rev() >= CHIP_REV_1_5)) ?                        \
+       (is_mx6dqp()) ?                                         \
+       ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
+       (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?           \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
-        (soc_rev() >= CHIP_REV_1_2)) ?                         \
+       (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ?          \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT)                        \
 )
@@ -424,8 +419,7 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
                         */
                        /* Check MMU enabled */
                        if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
-                               if (is_cpu_type(MXC_CPU_MX6Q) ||
-                                   is_cpu_type(MXC_CPU_MX6D)) {
+                               if (is_mx6dq()) {
                                        /*
                                         * This won't work on Rev 1.0.0 of
                                         * i.MX6Q/D, since their ROM doesn't
@@ -434,10 +428,9 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
                                         */
                                        if (!is_mx6dqp())
                                                writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
-                               } else if (is_cpu_type(MXC_CPU_MX6DL) ||
-                                          is_cpu_type(MXC_CPU_MX6SOLO)) {
+                               } else if (is_mx6sdl()) {
                                        writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
-                               } else if (is_cpu_type(MXC_CPU_MX6SL)) {
+                               } else if (is_mx6sl()) {
                                        writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
                                }
                        }

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c
index 15dab1d904239accc3676956ec5a8acbf3d8e444..3d2ce3a82e9addbd7a2ce735694b6a0b07b50d1c 100644 (file)
--- a/arch/arm/imx-common/init.c
+++ b/arch/arm/imx-common/init.c
@@ -44,7 +44,7 @@ void init_aips(void)
        writel(0x00000000, &aips2->opacr3);
        writel(0x00000000, &aips2->opacr4);
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7)) {
+       if (is_mx6sx() || is_mx7()) {
                /*
                 * Set all MPROTx to be non-bufferable, trusted for R/W,
                 * not forced to user-mode.
@@ -78,8 +78,7 @@ void imx_set_wdog_powerdown(bool enable)
        writew(enable, &wdog1->wmcr);
        writew(enable, &wdog2->wmcr);
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
-                       is_soc_type(MXC_SOC_MX7))
+       if (is_mx6sx() || is_mx6ul() || is_mx7())
                writew(enable, &wdog3->wmcr);
 #ifdef CONFIG_MX7D
        writew(enable, &wdog4->wmcr);

diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c
index 228d5f8f1cb75c88a39c79794607072da8942bb9..66137d148a7beea051b6ceccad2892259dd73f1b 100644 (file)
--- a/arch/arm/imx-common/iomux-v3.c
+++ b/arch/arm/imx-common/iomux-v3.c
@@ -83,7 +83,7 @@ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
 
 #if defined(CONFIG_MX6QDL)
        stride = 2;
-       if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
+       if (!is_mx6dq())
                p += 1;
 #else
        stride = 1;

diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c
index d174a463f88a70ed8d646a0e1c36e9f833d64e68..acf9831870c860fb4137e69b79f5c9524d933f73 100644 (file)
--- a/arch/arm/imx-common/sata.c
+++ b/arch/arm/imx-common/sata.c
@@ -15,7 +15,7 @@ int setup_sata(void)
        struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
        int ret;
 
-       if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
+       if (!is_mx6dq() && !is_mx6dqp())
                return 1;
 
        ret = enable_sata_clock();

diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c
index 92c7218e699225ebf110845b6858cedf94903855..a01590ced2261c28d3ad9d02505eb7d6a9f58f70 100644 (file)
--- a/arch/arm/imx-common/timer.c
+++ b/arch/arm/imx-common/timer.c
@@ -43,10 +43,8 @@ DECLARE_GLOBAL_DATA_PTR;
 static inline int gpt_has_clk_source_osc(void)
 {
 #if defined(CONFIG_MX6)
-       if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
-           (soc_rev() > CHIP_REV_1_0)) || is_cpu_type(MXC_CPU_MX6DL) ||
-            is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
-            is_cpu_type(MXC_CPU_MX6UL))
+       if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
+           is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul())
                return 1;
 
        return 0;
@@ -86,10 +84,7 @@ int timer_init(void)
                i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
 
                /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */
-               if (is_cpu_type(MXC_CPU_MX6DL) ||
-                   is_cpu_type(MXC_CPU_MX6SOLO) ||
-                   is_cpu_type(MXC_CPU_MX6SX) ||
-                   is_cpu_type(MXC_CPU_MX6UL)) {
+               if (is_mx6sdl() || is_mx6sx() || is_mx6ul()) {
                        i |= GPTCR_24MEN;
 
                        /* Produce 3Mhz clock */

diff --git a/arch/arm/include/asm/arch-am33xx/clock.h b/arch/arm/include/asm/arch-am33xx/clock.h
index a6d2419fb843de713880e16b09fe7e57ad43a090..acf3fd55a881cf7dcf7699f1a00370340bf6f2d6 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/clock.h
+++ b/arch/arm/include/asm/arch-am33xx/clock.h
@@ -44,6 +44,9 @@
 /* CM_CLKMODE_DPLL */
 #define CM_CLKMODE_DPLL_SSC_EN_SHIFT           12
 #define CM_CLKMODE_DPLL_SSC_EN_MASK            (1 << 12)
+#define CM_CLKMODE_DPLL_SSC_ACK_MASK           (1 << 13)
+#define CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK    (1 << 14)
+#define CM_CLKMODE_DPLL_SSC_TYPE_MASK          (1 << 15)
 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT         11
 #define CM_CLKMODE_DPLL_REGM4XEN_MASK          (1 << 11)
 #define CM_CLKMODE_DPLL_LPMODE_EN_SHIFT                10
@@ -114,4 +117,5 @@ void enable_basic_clocks(void);
 void do_enable_clocks(u32 *const *, u32 *const *, u8);
 void do_disable_clocks(u32 *const *, u32 *const *, u8);
 
+void set_mpu_spreadspectrum(int permille);
 #endif

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 112ac5eacd9148a08691e5bc1d0be856f5174ae6..62bca8cc17455eb0c294f99c4b1da87ddddd9dee 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -99,7 +99,8 @@ struct cm_wkuppll {
        unsigned int timer0clkctrl;     /* offset 0x10 */
        unsigned int resv2[3];
        unsigned int idlestdpllmpu;     /* offset 0x20 */
-       unsigned int resv3[2];
+       unsigned int sscdeltamstepdllmpu; /* off  0x24 */
+       unsigned int sscmodfreqdivdpllmpu; /* off 0x28 */
        unsigned int clkseldpllmpu;     /* offset 0x2c */
        unsigned int resv4[1];
        unsigned int idlestdpllddr;     /* offset 0x34 */
@@ -497,6 +498,8 @@ struct ctrl_stat {
 #define OMAP_GPIO_SYSSTATUS            0x0114
 #define OMAP_GPIO_IRQSTATUS1           0x002c
 #define OMAP_GPIO_IRQSTATUS2           0x0030
+#define OMAP_GPIO_IRQSTATUS_SET_0      0x0034
+#define OMAP_GPIO_IRQSTATUS_SET_1      0x0038
 #define OMAP_GPIO_CTRL                 0x0130
 #define OMAP_GPIO_OE                   0x0134
 #define OMAP_GPIO_DATAIN               0x0138

diff --git a/arch/arm/include/asm/arch-bcm235xx/gpio.h b/arch/arm/include/asm/arch-bcm235xx/gpio.h
new file mode 100644 (file)
index 0000000..da31f98
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm235xx/gpio.h
@@ -0,0 +1,15 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_BCM235XX_GPIO_H
+#define __ARCH_BCM235XX_GPIO_H
+
+/*
+ * Empty file - cmd_gpio.c requires this. The implementation
+ * is in drivers/gpio/kona_gpio.c instead of inlined here.
+ */
+
+#endif

diff --git a/arch/arm/include/asm/arch-bcm235xx/sysmap.h b/arch/arm/include/asm/arch-bcm235xx/sysmap.h
new file mode 100644 (file)
index 0000000..90eb2ff
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm235xx/sysmap.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_BCM235XX_SYSMAP_H
+
+#define BSC1_BASE_ADDR         0x3e016000
+#define BSC2_BASE_ADDR         0x3e017000
+#define BSC3_BASE_ADDR         0x3e018000
+#define GPIO2_BASE_ADDR                0x35003000
+#define HSOTG_BASE_ADDR                0x3f120000
+#define HSOTG_CTRL_BASE_ADDR   0x3f130000
+#define KONA_MST_CLK_BASE_ADDR 0x3f001000
+#define KONA_SLV_CLK_BASE_ADDR 0x3e011000
+#define PMU_BSC_BASE_ADDR      0x3500d000
+#define SDIO1_BASE_ADDR                0x3f180000
+#define SDIO2_BASE_ADDR                0x3f190000
+#define SDIO3_BASE_ADDR                0x3f1a0000
+#define SDIO4_BASE_ADDR                0x3f1b0000
+#define TIMER_BASE_ADDR                0x3e00d000
+
+#define HSOTG_DCTL_OFFSET                                      0x00000804
+#define    HSOTG_DCTL_SFTDISCON_MASK                           0x00000002
+
+#define HSOTG_CTRL_PHY_P1CTL_OFFSET                            0x00000008
+#define    HSOTG_CTRL_PHY_P1CTL_SOFT_RESET_MASK                        0x00000002
+#define    HSOTG_CTRL_PHY_P1CTL_NON_DRIVING_MASK               0x00000001
+
+#endif

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index 1cebe2fbb010736ae0e35a944773a025e3638701..df877ddc7dc0ec9c49787a4b8169285a18a6219d 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -122,6 +122,8 @@ static const struct sys_mmu_table early_mmu_table[] = {
          PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN },
        { CONFIG_SYS_FSL_OCRAM_BASE, CONFIG_SYS_FSL_OCRAM_BASE,
          CONFIG_SYS_FSL_OCRAM_SIZE, MT_NORMAL, PTE_BLOCK_NON_SHARE },
+       { CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
+         CONFIG_SYS_FSL_QSPI_SIZE1,  MT_NORMAL, PTE_BLOCK_NON_SHARE},
        /* For IFC Region #1, only the first 4MB is cache-enabled */
        { CONFIG_SYS_FSL_IFC_BASE1, CONFIG_SYS_FSL_IFC_BASE1,
          CONFIG_SYS_FSL_IFC_SIZE1_1, MT_NORMAL, PTE_BLOCK_NON_SHARE },
@@ -176,6 +178,8 @@ static const struct sys_mmu_table final_mmu_table[] = {
        { CONFIG_SYS_FSL_DRAM_BASE1, CONFIG_SYS_FSL_DRAM_BASE1,
          CONFIG_SYS_FSL_DRAM_SIZE1, MT_NORMAL,
          PTE_BLOCK_OUTER_SHARE | PTE_BLOCK_NS },
+       { CONFIG_SYS_FSL_QSPI_BASE1, CONFIG_SYS_FSL_QSPI_BASE1,
+         CONFIG_SYS_FSL_QSPI_SIZE1,  MT_NORMAL, PTE_BLOCK_NON_SHARE},
        { CONFIG_SYS_FSL_QSPI_BASE2, CONFIG_SYS_FSL_QSPI_BASE2,
          CONFIG_SYS_FSL_QSPI_SIZE2, MT_DEVICE_NGNRNE,
          PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN },

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index e98e055d9f1150e29ddd20b88718f8afa8150d3c..8b8a7c15bddb1bf05df2515f3113bd430e46db72 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -596,4 +596,6 @@ struct ccsr_cci400 {
 #define SCR0_CLIENTPD_MASK             0x00000001
 #define SCR0_USFCFG_MASK               0x00000400
 
+uint get_svr(void);
+
 #endif /* __ARCH_FSL_LSCH2_IMMAP_H__*/

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 65b3357009a5deac414d80b4774aab750784dc68..3ad46eb37143983895330dbb16c7fc840e293369 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -26,6 +26,7 @@
 #define CONFIG_SYS_FSL_TIMER_ADDR              0x023d0000
 #define CONFIG_SYS_FSL_PMU_CLTBENR             (CONFIG_SYS_FSL_PMU_ADDR + \
                                                 0x18A0)
+#define FSL_PMU_PCTBENR_OFFSET (CONFIG_SYS_FSL_PMU_ADDR + 0x8A0)
 
 #define CONFIG_SYS_FSL_WRIOP1_ADDR             (CONFIG_SYS_IMMR + 0x7B80000)
 #define CONFIG_SYS_FSL_WRIOP1_MDIO1    (CONFIG_SYS_FSL_WRIOP1_ADDR + 0x16000)
@@ -128,6 +129,8 @@
 #define DCFG_PORSR1_RCW_SRC_NOR                0x12f00000
 #define DCFG_RCWSR13                   0x130
 #define DCFG_RCWSR13_DSPI              (0 << 8)
+#define DCFG_RCWSR15                   0x138
+#define DCFG_RCWSR15_IFCGRPABASE_QSPI  0x3
 
 #define DCFG_DCSR_BASE         0X700100000ULL
 #define DCFG_DCSR_PORCR1               0x000
@@ -139,6 +142,8 @@
 /* Supplemental Configuration */
 #define SCFG_BASE              0x01fc0000
 #define SCFG_USB3PRM1CR                        0x000
+#define SCFG_USB3PRM1CR_INIT           0x27672b2a
+#define SCFG_QSPICLKCTLR       0x10
 
 #define TP_ITYP_AV             0x00000001      /* Initiator available */
 #define TP_ITYP_TYPE(x)        (((x) & 0x6) >> 1)      /* Initiator Type */
@@ -319,4 +324,7 @@ struct ccsr_reset {
        u32 ip_rev1;                    /* 0xbf8 */
        u32 ip_rev2;                    /* 0xbfc */
 };
+
+uint get_svr(void);
+
 #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 02ecc6257e16993385821cc6be545a565c096861..2cb6c5430e782e59ecfe296516bb66810f3c7d57 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -53,6 +53,8 @@ struct cpu_type {
 #define SVR_MIN(svr)           (((svr) >> 0) & 0xf)
 #define SVR_SOC_VER(svr)       (((svr) >> 8) & SVR_WO_E)
 #define IS_E_PROCESSOR(svr)    (!((svr >> 8) & 0x1))
+#define IS_SVR_REV(svr, maj, min) \
+               ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG    0xa003fffe

diff --git a/arch/arm/include/asm/arch-s32v234/clock.h b/arch/arm/include/asm/arch-s32v234/clock.h
new file mode 100644 (file)
index 0000000..df92fb2
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/clock.h
@@ -0,0 +1,34 @@
+/*
+ * (C) Copyright 2015-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H
+
+#include <common.h>
+
+enum mxc_clock {
+       MXC_ARM_CLK = 0,
+       MXC_BUS_CLK,
+       MXC_PERIPHERALS_CLK,
+       MXC_UART_CLK,
+       MXC_USDHC_CLK,
+       MXC_FEC_CLK,
+       MXC_I2C_CLK,
+};
+enum pll_type {
+       ARM_PLL = 0,
+       PERIPH_PLL,
+       ENET_PLL,
+       DDR_PLL,
+       VIDEO_PLL,
+};
+
+unsigned int mxc_get_clock(enum mxc_clock clk);
+void clock_init(void);
+
+#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
+
+#endif /* __ASM_ARCH_CLOCK_H */

diff --git a/arch/arm/include/asm/arch-s32v234/ddr.h b/arch/arm/include/asm/arch-s32v234/ddr.h
new file mode 100644 (file)
index 0000000..10a9a79
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/ddr.h
@@ -0,0 +1,157 @@
+/*
+ * (C) Copyright 2015-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_DDR_H__
+#define __ARCH_ARM_MACH_S32V234_DDR_H__
+
+#define DDR0   0
+#define DDR1   1
+
+/* DDR offset in MSCR register */
+#define _DDR0_RESET    168
+#define _DDR0_CLK0     169
+#define _DDR0_CAS      170
+#define _DDR0_RAS      171
+#define _DDR0_WE_B     172
+#define _DDR0_CKE0     173
+#define _DDR0_CKE1     174
+#define _DDR0_CS_B0    175
+#define _DDR0_CS_B1    176
+#define _DDR0_BA0      177
+#define _DDR0_BA1      178
+#define _DDR0_BA2      179
+#define _DDR0_A0       180
+#define _DDR0_A1       181
+#define _DDR0_A2       182
+#define _DDR0_A3       183
+#define _DDR0_A4       184
+#define _DDR0_A5       185
+#define _DDR0_A6       186
+#define _DDR0_A7       187
+#define _DDR0_A8       188
+#define _DDR0_A9       189
+#define _DDR0_A10      190
+#define _DDR0_A11      191
+#define _DDR0_A12      192
+#define _DDR0_A13      193
+#define _DDR0_A14      194
+#define _DDR0_A15      195
+#define _DDR0_DM0      196
+#define _DDR0_DM1      197
+#define _DDR0_DM2      198
+#define _DDR0_DM3      199
+#define _DDR0_DQS0     200
+#define _DDR0_DQS1     201
+#define _DDR0_DQS2     202
+#define _DDR0_DQS3     203
+#define _DDR0_D0       204
+#define _DDR0_D1       205
+#define _DDR0_D2       206
+#define _DDR0_D3       207
+#define _DDR0_D4       208
+#define _DDR0_D5       209
+#define _DDR0_D6       210
+#define _DDR0_D7       211
+#define _DDR0_D8       212
+#define _DDR0_D9       213
+#define _DDR0_D10      214
+#define _DDR0_D11      215
+#define _DDR0_D12      216
+#define _DDR0_D13      217
+#define _DDR0_D14      218
+#define _DDR0_D15      219
+#define _DDR0_D16      220
+#define _DDR0_D17      221
+#define _DDR0_D18      222
+#define _DDR0_D19      223
+#define _DDR0_D20      224
+#define _DDR0_D21      225
+#define _DDR0_D22      226
+#define _DDR0_D23      227
+#define _DDR0_D24      228
+#define _DDR0_D25      229
+#define _DDR0_D26      230
+#define _DDR0_D27      231
+#define _DDR0_D28      232
+#define _DDR0_D29      233
+#define _DDR0_D30      234
+#define _DDR0_D31      235
+#define _DDR0_ODT0     236
+#define _DDR0_ODT1     237
+#define _DDR0_ZQ       238
+#define _DDR1_RESET    239
+#define _DDR1_CLK0     240
+#define _DDR1_CAS      241
+#define _DDR1_RAS      242
+#define _DDR1_WE_B     243
+#define _DDR1_CKE0     244
+#define _DDR1_CKE1     245
+#define _DDR1_CS_B0    246
+#define _DDR1_CS_B1    247
+#define _DDR1_BA0      248
+#define _DDR1_BA1      249
+#define _DDR1_BA2      250
+#define _DDR1_A0       251
+#define _DDR1_A1       252
+#define _DDR1_A2       253
+#define _DDR1_A3       254
+#define _DDR1_A4       255
+#define _DDR1_A5       256
+#define _DDR1_A6       257
+#define _DDR1_A7       258
+#define _DDR1_A8       259
+#define _DDR1_A9       260
+#define _DDR1_A10      261
+#define _DDR1_A11      262
+#define _DDR1_A12      263
+#define _DDR1_A13      264
+#define _DDR1_A14      265
+#define _DDR1_A15      266
+#define _DDR1_DM0      267
+#define _DDR1_DM1      268
+#define _DDR1_DM2      269
+#define _DDR1_DM3      270
+#define _DDR1_DQS0     271
+#define _DDR1_DQS1     272
+#define _DDR1_DQS2     273
+#define _DDR1_DQS3     274
+#define _DDR1_D0       275
+#define _DDR1_D1       276
+#define _DDR1_D2       277
+#define _DDR1_D3       278
+#define _DDR1_D4       279
+#define _DDR1_D5       280
+#define _DDR1_D6       281
+#define _DDR1_D7       282
+#define _DDR1_D8       283
+#define _DDR1_D9       284
+#define _DDR1_D10      285
+#define _DDR1_D11      286
+#define _DDR1_D12      287
+#define _DDR1_D13      288
+#define _DDR1_D14      289
+#define _DDR1_D15      290
+#define _DDR1_D16      291
+#define _DDR1_D17      292
+#define _DDR1_D18      293
+#define _DDR1_D19      294
+#define _DDR1_D20      295
+#define _DDR1_D21      296
+#define _DDR1_D22      297
+#define _DDR1_D23      298
+#define _DDR1_D24      299
+#define _DDR1_D25      300
+#define _DDR1_D26      301
+#define _DDR1_D27      302
+#define _DDR1_D28      303
+#define _DDR1_D29      304
+#define _DDR1_D30      305
+#define _DDR1_D31      306
+#define _DDR1_ODT0     307
+#define _DDR1_ODT1     308
+#define _DDR1_ZQ       309
+
+#endif

diff --git a/arch/arm/include/asm/arch-s32v234/imx-regs.h b/arch/arm/include/asm/arch-s32v234/imx-regs.h
new file mode 100644 (file)
index 0000000..a42f6cc
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/imx-regs.h
@@ -0,0 +1,329 @@
+/*
+ * (C) Copyright 2013-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_IMX_REGS_H__
+#define __ASM_ARCH_IMX_REGS_H__
+
+#define ARCH_MXC
+
+#define IRAM_BASE_ADDR      0x3E800000 /* internal ram */
+#define IRAM_SIZE           0x00400000 /* 4MB */
+
+#define AIPS0_BASE_ADDR     (0x40000000UL)
+#define AIPS1_BASE_ADDR     (0x40080000UL)
+
+/* AIPS 0 */
+#define AXBS_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00000000)
+#define CSE3_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00001000)
+#define EDMA_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00002000)
+#define XRDC_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00004000)
+#define SWT0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0000A000)
+#define SWT1_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0000B000)
+#define STM0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0000D000)
+#define NIC301_BASE_ADDR                               (AIPS0_BASE_ADDR + 0x00010000)
+#define GC3000_BASE_ADDR                               (AIPS0_BASE_ADDR + 0x00020000)
+#define DEC200_DECODER_BASE_ADDR               (AIPS0_BASE_ADDR + 0x00026000)
+#define DEC200_ENCODER_BASE_ADDR               (AIPS0_BASE_ADDR + 0x00027000)
+#define TWOD_ACE_BASE_ADDR                             (AIPS0_BASE_ADDR + 0x00028000)
+#define MIPI_CSI0_BASE_ADDR                            (AIPS0_BASE_ADDR + 0x00030000)
+#define DMAMUX0_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x00031000)
+#define ENET_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00032000)
+#define FLEXRAY_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x00034000)
+#define MMDC0_BASE_ADDR                                        (AIPS0_BASE_ADDR + 0x00036000)
+#define MEW0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00037000)
+#define MONITOR_DDR0_BASE_ADDR                 (AIPS0_BASE_ADDR + 0x00038000)
+#define MONITOR_CCI0_BASE_ADDR                 (AIPS0_BASE_ADDR + 0x00039000)
+#define PIT0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0003A000)
+#define MC_CGM0_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x0003C000)
+#define MC_CGM1_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x0003F000)
+#define MC_CGM2_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x00042000)
+#define MC_CGM3_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x00045000)
+#define MC_RGM_BASE_ADDR                               (AIPS0_BASE_ADDR + 0x00048000)
+#define MC_ME_BASE_ADDR                                        (AIPS0_BASE_ADDR + 0x0004A000)
+#define MC_PCU_BASE_ADDR                               (AIPS0_BASE_ADDR + 0x0004B000)
+#define ADC0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0004D000)
+#define FLEXTIMER_BASE_ADDR                            (AIPS0_BASE_ADDR + 0x0004F000)
+#define I2C0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00051000)
+#define LINFLEXD0_BASE_ADDR                            (AIPS0_BASE_ADDR + 0x00053000)
+#define FLEXCAN0_BASE_ADDR                             (AIPS0_BASE_ADDR + 0x00055000)
+#define SPI0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00057000)
+#define SPI2_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00059000)
+#define CRC0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x0005B000)
+#define USDHC_BASE_ADDR                                        (AIPS0_BASE_ADDR + 0x0005D000)
+#define OCOTP_CONTROLLER_BASE_ADDR             (AIPS0_BASE_ADDR + 0x0005F000)
+#define WKPU_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00063000)
+#define VIU0_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00064000)
+#define HPSMI_SRAM_CONTROLLER_BASE_ADDR        (AIPS0_BASE_ADDR + 0x00068000)
+#define SIUL2_BASE_ADDR                                        (AIPS0_BASE_ADDR + 0x0006C000)
+#define SIPI_BASE_ADDR                                 (AIPS0_BASE_ADDR + 0x00074000)
+#define LFAST_BASE_ADDR                                        (AIPS0_BASE_ADDR + 0x00078000)
+#define SSE_BASE_ADDR                                  (AIPS0_BASE_ADDR + 0x00079000)
+#define SRC_SOC_BASE_ADDR                              (AIPS0_BASE_ADDR + 0x0007C000)
+
+/* AIPS 1 */
+#define ERM_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000000000)
+#define MSCM_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000001000)
+#define SEMA42_BASE_ADDR                               (AIPS1_BASE_ADDR + 0X000002000)
+#define INTC_MON_BASE_ADDR                             (AIPS1_BASE_ADDR + 0X000003000)
+#define SWT2_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000004000)
+#define SWT3_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000005000)
+#define SWT4_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000006000)
+#define STM1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000007000)
+#define EIM_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000008000)
+#define APB_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000009000)
+#define XBIC_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000012000)
+#define MIPI_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000020000)
+#define DMAMUX1_BASE_ADDR                              (AIPS1_BASE_ADDR + 0X000021000)
+#define MMDC1_BASE_ADDR                                        (AIPS1_BASE_ADDR + 0X000022000)
+#define MEW1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000023000)
+#define DDR1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000024000)
+#define CCI1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000025000)
+#define QUADSPI0_BASE_ADDR                             (AIPS1_BASE_ADDR + 0X000026000)
+#define PIT1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X00002A000)
+#define FCCU_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000030000)
+#define FLEXTIMER_FTM1_BASE_ADDR               (AIPS1_BASE_ADDR + 0X000036000)
+#define I2C1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000038000)
+#define I2C2_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X00003A000)
+#define LINFLEXD1_BASE_ADDR                            (AIPS1_BASE_ADDR + 0X00003C000)
+#define FLEXCAN1_BASE_ADDR                             (AIPS1_BASE_ADDR + 0X00003E000)
+#define SPI1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000040000)
+#define SPI3_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000042000)
+#define IPL_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000043000)
+#define CGM_CMU_BASE_ADDR                              (AIPS1_BASE_ADDR + 0X000044000)
+#define PMC_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000048000)
+#define CRC1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X00004C000)
+#define TMU_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X00004E000)
+#define VIU1_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000050000)
+#define JPEG_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000054000)
+#define H264_DEC_BASE_ADDR                             (AIPS1_BASE_ADDR + 0X000058000)
+#define H264_ENC_BASE_ADDR                             (AIPS1_BASE_ADDR + 0X00005C000)
+#define MEMU_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000060000)
+#define STCU_BASE_ADDR                                 (AIPS1_BASE_ADDR + 0X000064000)
+#define SLFTST_CTRL_BASE_ADDR                  (AIPS1_BASE_ADDR + 0X000066000)
+#define MCT_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X000068000)
+#define REP_BASE_ADDR                                  (AIPS1_BASE_ADDR + 0X00006A000)
+#define MBIST_CONTROLLER_BASE_ADDR             (AIPS1_BASE_ADDR + 0X00006C000)
+#define BOOT_LOADER_BASE_ADDR                  (AIPS1_BASE_ADDR + 0X00006F000)
+
+/* TODO Remove this after the IOMUX framework is implemented */
+#define IOMUXC_BASE_ADDR SIUL2_BASE_ADDR
+
+/* MUX mode and PAD ctrl are in one register */
+#define CONFIG_IOMUX_SHARE_CONF_REG
+
+#define FEC_QUIRK_ENET_MAC
+#define I2C_QUIRK_REG
+
+/* MSCM interrupt router */
+#define MSCM_IRSPRC_CPn_EN             3
+#define MSCM_IRSPRC_NUM                        176
+#define MSCM_CPXTYPE_RYPZ_MASK         0xFF
+#define MSCM_CPXTYPE_RYPZ_OFFSET       0
+#define MSCM_CPXTYPE_PERS_MASK         0xFFFFFF00
+#define MSCM_CPXTYPE_PERS_OFFSET       8
+#define MSCM_CPXTYPE_PERS_A53          0x413533
+#define MSCM_CPXTYPE_PERS_CM4          0x434d34
+
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include <asm/types.h>
+
+/* System Reset Controller (SRC) */
+struct src {
+       u32 bmr1;
+       u32 bmr2;
+       u32 gpr1_boot;
+       u32 reserved_0x00C[61];
+       u32 gpr1;
+       u32 gpr2;
+       u32 gpr3;
+       u32 gpr4;
+       u32 gpr5;
+       u32 gpr6;
+       u32 gpr7;
+       u32 reserved_0x11C[1];
+       u32 gpr9;
+       u32 gpr10;
+       u32 gpr11;
+       u32 gpr12;
+       u32 gpr13;
+       u32 gpr14;
+       u32 gpr15;
+       u32 gpr16;
+       u32 reserved_0x140[1];
+       u32 gpr17;
+       u32 gpr18;
+       u32 gpr19;
+       u32 gpr20;
+       u32 gpr21;
+       u32 gpr22;
+       u32 gpr23;
+       u32 gpr24;
+       u32 gpr25;
+       u32 gpr26;
+       u32 gpr27;
+       u32 reserved_0x16C[5];
+       u32 pcie_config1;
+       u32 ddr_self_ref_ctrl;
+       u32 pcie_config0;
+       u32 reserved_0x18C[4];
+       u32 soc_misc_config2;
+};
+
+/* SRC registers definitions */
+
+/* SRC_GPR1 */
+#define SRC_GPR1_PLL_SOURCE(pll,val)( ((val) & SRC_GPR1_PLL_SOURCE_MASK) << \
+                                                                               (SRC_GPR1_PLL_OFFSET + (pll)) )
+#define SRC_GPR1_PLL_SOURCE_MASK       (0x1)
+
+#define SRC_GPR1_PLL_OFFSET                    (27)
+#define SRC_GPR1_FIRC_CLK_SOURCE       (0x0)
+#define SRC_GPR1_XOSC_CLK_SOURCE       (0x1)
+
+/* Periodic Interrupt Timer (PIT) */
+struct pit_reg {
+       u32 mcr;
+       u32 recv0[55];
+       u32 ltmr64h;
+       u32 ltmr64l;
+       u32 recv1[6];
+       u32 ldval0;
+       u32 cval0;
+       u32 tctrl0;
+       u32 tflg0;
+       u32 ldval1;
+       u32 cval1;
+       u32 tctrl1;
+       u32 tflg1;
+       u32 ldval2;
+       u32 cval2;
+       u32 tctrl2;
+       u32 tflg2;
+       u32 ldval3;
+       u32 cval3;
+       u32 tctrl3;
+       u32 tflg3;
+       u32 ldval4;
+       u32 cval4;
+       u32 tctrl4;
+       u32 tflg4;
+       u32 ldval5;
+       u32 cval5;
+       u32 tctrl5;
+       u32 tflg5;
+};
+
+/* Watchdog Timer (WDOG) */
+struct wdog_regs {
+       u32 cr;
+       u32 ir;
+       u32 to;
+       u32 wn;
+       u32 sr;
+       u32 co;
+       u32 sk;
+};
+
+/* UART */
+struct linflex_fsl {
+       u32 lincr1;
+       u32 linier;
+       u32 linsr;
+       u32 linesr;
+       u32 uartcr;
+       u32 uartsr;
+       u32 lintcsr;
+       u32 linocr;
+       u32 lintocr;
+       u32 linfbrr;
+       u32 linibrr;
+       u32 lincfr;
+       u32 lincr2;
+       u32 bidr;
+       u32 bdrl;
+       u32 bdrm;
+       u32 ifer;
+       u32 ifmi;
+       u32 ifmr;
+       u32 ifcr0;
+       u32 ifcr1;
+       u32 ifcr2;
+       u32 ifcr3;
+       u32 ifcr4;
+       u32 ifcr5;
+       u32 ifcr6;
+       u32 ifcr7;
+       u32 ifcr8;
+       u32 ifcr9;
+       u32 ifcr10;
+       u32 ifcr11;
+       u32 ifcr12;
+       u32 ifcr13;
+       u32 ifcr14;
+       u32 ifcr15;
+       u32 gcr;
+       u32 uartpto;
+       u32 uartcto;
+       u32 dmatxe;
+       u32 dmarxe;
+};
+
+/* MSCM Interrupt Router */
+struct mscm_ir {
+       u32 cpxtype;            /* Processor x Type Register                    */
+       u32 cpxnum;             /* Processor x Number Register                  */
+       u32 cpxmaster;          /* Processor x Master Number Register   */
+       u32 cpxcount;           /* Processor x Count Register                   */
+       u32 cpxcfg0;            /* Processor x Configuration 0 Register */
+       u32 cpxcfg1;            /* Processor x Configuration 1 Register */
+       u32 cpxcfg2;            /* Processor x Configuration 2 Register */
+       u32 cpxcfg3;            /* Processor x Configuration 3 Register */
+       u32 cp0type;            /* Processor 0 Type Register                    */
+       u32 cp0num;             /* Processor 0 Number Register                  */
+       u32 cp0master;          /* Processor 0 Master Number Register   */
+       u32 cp0count;           /* Processor 0 Count Register                   */
+       u32 cp0cfg0;            /* Processor 0 Configuration 0 Register */
+       u32 cp0cfg1;            /* Processor 0 Configuration 1 Register */
+       u32 cp0cfg2;            /* Processor 0 Configuration 2 Register */
+       u32 cp0cfg3;            /* Processor 0 Configuration 3 Register */
+       u32 cp1type;            /* Processor 1 Type Register                    */
+       u32 cp1num;             /* Processor 1 Number Register                  */
+       u32 cp1master;          /* Processor 1 Master Number Register   */
+       u32 cp1count;           /* Processor 1 Count Register                   */
+       u32 cp1cfg0;            /* Processor 1 Configuration 0 Register */
+       u32 cp1cfg1;            /* Processor 1 Configuration 1 Register */
+       u32 cp1cfg2;            /* Processor 1 Configuration 2 Register */
+       u32 cp1cfg3;            /* Processor 1 Configuration 3 Register */
+       u32 reserved_0x060[232];
+       u32 ocmdr0;             /* On-Chip Memory Descriptor Register   */
+       u32 reserved_0x404[2];
+       u32 ocmdr3;             /* On-Chip Memory Descriptor Register   */
+       u32 reserved_0x410[28];
+       u32 tcmdr[4];           /* Generic Tightly Coupled Memory Descriptor Register   */
+       u32 reserved_0x490[28];
+       u32 cpce0;              /* Core Parity Checking Enable Register 0                               */
+       u32 reserved_0x504[191];
+       u32 ircp0ir;            /* Interrupt Router CP0 Interrupt Register                              */
+       u32 ircp1ir;            /* Interrupt Router CP1 Interrupt Register                              */
+       u32 reserved_0x808[6];
+       u32 ircpgir;            /* Interrupt Router CPU Generate Interrupt Register             */
+       u32 reserved_0x824[23];
+       u16 irsprc[176];        /* Interrupt Router Shared Peripheral Routing Control Register  */
+       u32 reserved_0x9e0[136];
+       u32 iahbbe0;            /* Gasket Burst Enable Register                                                 */
+       u32 reserved_0xc04[63];
+       u32 ipcge;              /* Interconnect Parity Checking Global Enable Register  */
+       u32 reserved_0xd04[3];
+       u32 ipce[4];            /* Interconnect Parity Checking Enable Register                 */
+       u32 reserved_0xd20[8];
+       u32 ipcgie;             /* Interconnect Parity Checking Global Injection Enable Register        */
+       u32 reserved_0xd44[3];
+       u32 ipcie[4];           /* Interconnect Parity Checking Injection Enable Register       */
+};
+
+#endif /* __ASSEMBLER__ */
+
+#endif /* __ASM_ARCH_IMX_REGS_H__ */

diff --git a/arch/arm/include/asm/arch-s32v234/lpddr2.h b/arch/arm/include/asm/arch-s32v234/lpddr2.h
new file mode 100644 (file)
index 0000000..5a05965
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/lpddr2.h
@@ -0,0 +1,75 @@
+/*
+ * (C) Copyright 2015-2016, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_LPDDR2_H__
+#define __ARCH_ARM_MACH_S32V234_LPDDR2_H__
+
+/* definitions for LPDDR2 PAD values */
+#define LPDDR2_CLK0_PAD        \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |\
+        SIUL2_MSCR_DSE_48ohm | SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_CRPOINT_TRIM_1 |                    \
+        SIUL2_MSCR_DCYCLE_TRIM_NONE)
+#define LPDDR2_CKEn_PAD        \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |\
+        SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_DSE_48ohm)
+#define LPDDR2_CS_Bn_PAD       \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |\
+        SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_DSE_48ohm)
+#define LPDDR2_DMn_PAD \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |\
+        SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_DSE_48ohm)
+#define LPDDR2_DQSn_PAD        \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |        \
+        SIUL2_MSCR_DSE_48ohm | SIUL2_MSCR_PUE_EN | SIUL2_MSCR_PUS_100K_DOWN |                                          \
+        SIUL2_MSCR_PKE_EN | SIUL2_MSCR_CRPOINT_TRIM_1 | SIUL2_MSCR_DCYCLE_TRIM_NONE)
+#define LPDDR2_An_PAD  \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |        \
+        SIUL2_MSCR_DSE_48ohm | SIUL2_MSCR_DDR_DO_TRIM_50PS | SIUL2_MSCR_DCYCLE_TRIM_LEFT               |       \
+        SIUL2_MSCR_PUS_100K_UP)
+#define LPDDR2_Dn_PAD  \
+       (SIUL2_MSCR_DDR_SEL_LPDDR2 | SIUL2_MSCR_DDR_INPUT_DIFF_DDR | SIUL2_MSCR_DDR_ODT_120ohm |        \
+        SIUL2_MSCR_DSE_48ohm | SIUL2_MSCR_DDR_DO_TRIM_50PS | SIUL2_MSCR_DCYCLE_TRIM_LEFT               |       \
+        SIUL2_MSCR_PUS_100K_UP)
+
+#define _MDCTL                                                 0x03010000
+
+#define MMDC_MDSCR_CFG_VALUE                   0x00008000      /* Set MDSCR[CON_REQ] (configuration request) */
+#define MMDC_MDCFG0_VALUE                              0x464F61A5      /* tRFCab=70 (=130ns),tXSR=80 (=tRFCab+10ns),tXP=4 (=7.5ns),tXPDLL=n/a,tFAW=27 (50 ns),tCL(RL)=8 */
+#define MMDC_MDCFG1_VALUE                              0x00180E63      /* tRCD=n/a,tRPpb=n/a,tRC=n/a ,tRAS=25 (=47ns),tRPA=n/a,tWR=8 (=15.0ns),tMRD=3,tWL=4 */
+#define MMDC_MDCFG2_VALUE                              0x000000DD      /* tDLLK=n/a,tRTP=4 (=7.5ns),tWTR=4 (=7.5ns),tRRD=6 (=10ns) */
+#define MMDC_MDCFG3LP_VALUE                            0x001F099B      /* RC_LP=tRAS+tRPab=32 (>60ns), tRCD_LP=10 (18ns) , tRPpb_LP=10 (18ns), tRPab_LP=12 (21ns) */
+#define MMDC_MDOTC_VALUE                               0x00000000      /* tAOFPD=n/a,tAONPD=n/a,tANPD=n/a,tAXPD=n/a,tODTLon=n/a,tODT_idle_off=n/a */
+#define MMDC_MDMISC_VALUE                              0x00001688      /* WALAT=0, BI bank interleave on, LPDDR2_S2=0, MIF3=3, RALAT=2, 8 banks, LPDDR2 */
+#define MMDC_MDOR_VALUE                                        0x00000010      /* tXPR=n/a , SDE_to_RST=n/a, RST_to_CKE=14 */
+#define MMDC_MPMUR0_VALUE                              0x00000800      /* Force delay line initialisation */
+#define MMDC_MDSCR_RST_VALUE                   0x003F8030      /* Reset command CS0 */
+#define MMDC_MPZQLP2CTL_VALUE                  0x1B5F0109      /* ZQ_LP2_HW_ZQCS=0x1B (90ns spec), ZQ_LP2_HW_ZQCL=0x5F (160ns spec), ZQ_LP2_HW_ZQINIT=0x109 (1us spec) */
+#define MMDC_MPZQHWCTRL_VALUE                  0xA0010003      /* ZQ_EARLY_COMPARATOR_EN_TIMER=0x14, TZQ_CS=n/a, TZQ_OPER=n/a, TZQ_INIT=n/a, ZQ_HW_FOR=1, ZQ_HW_PER=0, ZQ_MODE=3 */
+#define MMDC_MDSCR_MR1_VALUE                   0xC2018030      /* Configure MR1: BL 4, burst type interleaved, wrap control no wrap, tWR cycles 8 */
+#define MMDC_MDSCR_MR2_VALUE                   0x06028030      /* Configure MR2: RL=8, WL=4 */
+#define MMDC_MDSCR_MR3_VALUE                   0x01038030      /* Configure MR3: DS=34R */
+#define MMDC_MDSCR_MR10_VALUE                  0xFF0A8030      /* Configure MR10: Calibration at init */
+#define MMDC_MDASP_MODULE0_VALUE               0x0000007F      /* 2Gb, 256 MB memory so CS0 is 256 MB  (0x90000000) */
+#define MMDC_MPRDDLCTL_MODULE0_VALUE   0x4D4B4F4B      /* Read delay line offsets */
+#define MMDC_MPWRDLCTL_MODULE0_VALUE   0x38383737      /* Write delay line offsets */
+#define MMDC_MPDGCTRL0_MODULE0_VALUE   0x20000000      /* Read DQS gating control 0 (disabled) */
+#define MMDC_MPDGCTRL1_MODULE0_VALUE   0x00000000      /* Read DQS gating control 1 */
+#define MMDC_MDASP_MODULE1_VALUE               0x0000007F      /* 2Gb, 256 MB memory so CS0 is 256 MB  (0xD0000000) */
+#define MMDC_MPRDDLCTL_MODULE1_VALUE   0x4D4B4F4B      /* Read delay line offsets */
+#define MMDC_MPWRDLCTL_MODULE1_VALUE   0x38383737      /* Write delay line offsets */
+#define MMDC_MPDGCTRL0_MODULE1_VALUE   0x20000000      /* Read DQS gating control 0 (disabled) */
+#define MMDC_MPDGCTRL1_MODULE1_VALUE   0x00000000      /* Read DQS gating control 1 */
+#define MMDC_MDRWD_VALUE                               0x0F9F26D2      /* Read/write command delay - default used */
+#define MMDC_MDPDC_VALUE                               0x00020024      /* Power down control */
+#define MMDC_MDREF_VALUE                               0x30B01800      /* Refresh control */
+#define MMDC_MPODTCTRL_VALUE                   0x00000000      /* No ODT */
+#define MMDC_MDSCR_DEASSERT_VALUE                              0x00000000      /* Deassert the configuration request */
+
+/* set I/O pads for DDR */
+void lpddr2_config_iomux(uint8_t module);
+void config_mmdc(uint8_t module);
+
+#endif

diff --git a/arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h b/arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h
new file mode 100644 (file)
index 0000000..eb50475
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/mc_cgm_regs.h
@@ -0,0 +1,254 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_MCCGM_REGS_H__
+#define __ARCH_ARM_MACH_S32V234_MCCGM_REGS_H__
+
+#ifndef __ASSEMBLY__
+
+/* MC_CGM registers definitions */
+/* MC_CGM_SC_SS */
+#define CGM_SC_SS(cgm_addr)                    ( ((cgm_addr) + 0x000007E4) )
+#define MC_CGM_SC_SEL_FIRC                     (0x0)
+#define MC_CGM_SC_SEL_XOSC                     (0x1)
+#define MC_CGM_SC_SEL_ARMPLL           (0x2)
+#define MC_CGM_SC_SEL_CLKDISABLE       (0xF)
+
+/* MC_CGM_SC_DCn */
+#define CGM_SC_DCn(cgm_addr,dc)                ( ((cgm_addr) + 0x000007E8) + ((dc) * 0x4) )
+#define MC_CGM_SC_DCn_PREDIV(val)      (MC_CGM_SC_DCn_PREDIV_MASK & ((val) << MC_CGM_SC_DCn_PREDIV_OFFSET))
+#define MC_CGM_SC_DCn_PREDIV_MASK      (0x00070000)
+#define MC_CGM_SC_DCn_PREDIV_OFFSET    (16)
+#define MC_CGM_SC_DCn_DE                       (1 << 31)
+#define MC_CGM_SC_SEL_MASK                     (0x0F000000)
+#define MC_CGM_SC_SEL_OFFSET           (24)
+
+/* MC_CGM_ACn_DCm */
+#define CGM_ACn_DCm(cgm_addr,ac,dc)            ( ((cgm_addr) + 0x00000808) + ((ac) * 0x20) + ((dc) * 0x4) )
+#define MC_CGM_ACn_DCm_PREDIV(val)             (MC_CGM_ACn_DCm_PREDIV_MASK & ((val) << MC_CGM_ACn_DCm_PREDIV_OFFSET))
+
+/*
+ * MC_CGM_ACn_DCm_PREDIV_MASK is on 5 bits because practical test has shown
+ * that the 5th bit is always ignored during writes if the current
+ * MC_CGM_ACn_DCm_PREDIV field has only 4 bits
+ *
+ * The manual states only selectors 1, 5 and 15 have DC0_PREDIV on 5 bits
+ *
+ * This should be changed if any problems occur.
+ */
+#define MC_CGM_ACn_DCm_PREDIV_MASK             (0x001F0000)
+#define MC_CGM_ACn_DCm_PREDIV_OFFSET   (16)
+#define MC_CGM_ACn_DCm_DE                              (1 << 31)
+
+/*
+ * MC_CGM_ACn_SC/MC_CGM_ACn_SS
+ */
+#define CGM_ACn_SC(cgm_addr,ac)                        ((cgm_addr + 0x00000800) + ((ac) * 0x20))
+#define CGM_ACn_SS(cgm_addr,ac)                        ((cgm_addr + 0x00000804) + ((ac) * 0x20))
+#define MC_CGM_ACn_SEL_MASK                            (0x07000000)
+#define MC_CGM_ACn_SEL_SET(source)             (MC_CGM_ACn_SEL_MASK & (((source) & 0x7) << MC_CGM_ACn_SEL_OFFSET))
+#define MC_CGM_ACn_SEL_OFFSET                  (24)
+
+#define MC_CGM_ACn_SEL_FIRC                            (0x0)
+#define MC_CGM_ACn_SEL_XOSC                            (0x1)
+#define MC_CGM_ACn_SEL_ARMPLL                  (0x2)
+/*
+ * According to the manual some PLL can be divided by X (X={1,3,5}):
+ * PERPLLDIVX, VIDEOPLLDIVX.
+ */
+#define MC_CGM_ACn_SEL_PERPLLDIVX              (0x3)
+#define MC_CGM_ACn_SEL_ENETPLL                 (0x4)
+#define MC_CGM_ACn_SEL_DDRPLL                  (0x5)
+#define MC_CGM_ACn_SEL_EXTSRCPAD               (0x7)
+#define MC_CGM_ACn_SEL_SYSCLK                  (0x8)
+#define MC_CGM_ACn_SEL_VIDEOPLLDIVX            (0x9)
+#define MC_CGM_ACn_SEL_PERCLK                  (0xA)
+
+/* PLLDIG PLL Divider Register (PLLDIG_PLLDV) */
+#define PLLDIG_PLLDV(pll)                              ((MC_CGM0_BASE_ADDR + 0x00000028) + ((pll) * 0x80))
+#define PLLDIG_PLLDV_MFD(div)                  (PLLDIG_PLLDV_MFD_MASK & (div))
+#define PLLDIG_PLLDV_MFD_MASK                  (0x000000FF)
+
+/*
+ * PLLDIG_PLLDV_RFDPHIB has a different format for /32 according to
+ * the reference manual. This other value respect the formula 2^[RFDPHIBY+1]
+ */
+#define PLLDIG_PLLDV_RFDPHI_SET(val)   (PLLDIG_PLLDV_RFDPHI_MASK & (((val) & PLLDIG_PLLDV_RFDPHI_MAXVALUE) << PLLDIG_PLLDV_RFDPHI_OFFSET))
+#define PLLDIG_PLLDV_RFDPHI_MASK               (0x003F0000)
+#define PLLDIG_PLLDV_RFDPHI_MAXVALUE   (0x3F)
+#define PLLDIG_PLLDV_RFDPHI_OFFSET             (16)
+
+#define PLLDIG_PLLDV_RFDPHI1_SET(val)  (PLLDIG_PLLDV_RFDPHI1_MASK & (((val) & PLLDIG_PLLDV_RFDPHI1_MAXVALUE) << PLLDIG_PLLDV_RFDPHI1_OFFSET))
+#define PLLDIG_PLLDV_RFDPHI1_MASK              (0x7E000000)
+#define PLLDIG_PLLDV_RFDPHI1_MAXVALUE  (0x3F)
+#define PLLDIG_PLLDV_RFDPHI1_OFFSET            (25)
+
+#define PLLDIG_PLLDV_PREDIV_SET(val)   (PLLDIG_PLLDV_PREDIV_MASK & (((val) & PLLDIG_PLLDV_PREDIV_MAXVALUE) << PLLDIG_PLLDV_PREDIV_OFFSET))
+#define PLLDIG_PLLDV_PREDIV_MASK               (0x00007000)
+#define PLLDIG_PLLDV_PREDIV_MAXVALUE   (0x7)
+#define PLLDIG_PLLDV_PREDIV_OFFSET             (12)
+
+/* PLLDIG PLL Fractional  Divide Register (PLLDIG_PLLFD) */
+#define PLLDIG_PLLFD(pll)                              ((MC_CGM0_BASE_ADDR + 0x00000030) + ((pll) * 0x80))
+#define PLLDIG_PLLFD_MFN_SET(val)              (PLLDIG_PLLFD_MFN_MASK & (val))
+#define PLLDIG_PLLFD_MFN_MASK                  (0x00007FFF)
+#define PLLDIG_PLLFD_SMDEN                             (1 << 30)
+
+/* PLL Calibration Register 1 (PLLDIG_PLLCAL1) */
+#define PLLDIG_PLLCAL1(pll)                            ((MC_CGM0_BASE_ADDR + 0x00000038) + ((pll) * 0x80))
+#define PLLDIG_PLLCAL1_NDAC1_SET(val)  (PLLDIG_PLLCAL1_NDAC1_MASK & ((val) << PLLDIG_PLLCAL1_NDAC1_OFFSET))
+#define PLLDIG_PLLCAL1_NDAC1_OFFSET            (24)
+#define PLLDIG_PLLCAL1_NDAC1_MASK              (0x7F000000)
+
+/* Digital Frequency Synthesizer (DFS) */
+/* According to the manual there are 3 DFS modules only for ARM_PLL, DDR_PLL, ENET_PLL */
+#define DFS0_BASE_ADDR                         (MC_CGM0_BASE_ADDR + 0x00000040)
+
+/* DFS DLL Program Register 1 */
+#define DFS_DLLPRG1(pll)                       (DFS0_BASE_ADDR + 0x00000000 + ((pll) * 0x80))
+
+#define DFS_DLLPRG1_V2IGC_SET(val)     (DFS_DLLPRG1_V2IGC_MASK & ((val) << DFS_DLLPRG1_V2IGC_OFFSET))
+#define DFS_DLLPRG1_V2IGC_OFFSET       (0)
+#define DFS_DLLPRG1_V2IGC_MASK         (0x00000007)
+
+#define DFS_DLLPRG1_LCKWT_SET(val)             (DFS_DLLPRG1_LCKWT_MASK & ((val) << DFS_DLLPRG1_LCKWT_OFFSET))
+#define DFS_DLLPRG1_LCKWT_OFFSET               (4)
+#define DFS_DLLPRG1_LCKWT_MASK                 (0x00000030)
+
+#define DFS_DLLPRG1_DACIN_SET(val)             (DFS_DLLPRG1_DACIN_MASK & ((val) << DFS_DLLPRG1_DACIN_OFFSET))
+#define DFS_DLLPRG1_DACIN_OFFSET               (6)
+#define DFS_DLLPRG1_DACIN_MASK                 (0x000001C0)
+
+#define DFS_DLLPRG1_CALBYPEN_SET(val)  (DFS_DLLPRG1_CALBYPEN_MASK & ((val) << DFS_DLLPRG1_CALBYPEN_OFFSET))
+#define DFS_DLLPRG1_CALBYPEN_OFFSET            (9)
+#define DFS_DLLPRG1_CALBYPEN_MASK              (0x00000200)
+
+#define DFS_DLLPRG1_VSETTLCTRL_SET(val)        (DFS_DLLPRG1_VSETTLCTRL_MASK & ((val) << DFS_DLLPRG1_VSETTLCTRL_OFFSET))
+#define DFS_DLLPRG1_VSETTLCTRL_OFFSET  (10)
+#define DFS_DLLPRG1_VSETTLCTRL_MASK            (0x00000C00)
+
+#define DFS_DLLPRG1_CPICTRL_SET(val)   (DFS_DLLPRG1_CPICTRL_MASK & ((val) << DFS_DLLPRG1_CPICTRL_OFFSET))
+#define DFS_DLLPRG1_CPICTRL_OFFSET             (12)
+#define DFS_DLLPRG1_CPICTRL_MASK               (0x00007000)
+
+/* DFS Control Register (DFS_CTRL) */
+#define DFS_CTRL(pll)                                  (DFS0_BASE_ADDR + 0x00000018 + ((pll) * 0x80))
+#define DFS_CTRL_DLL_LOLIE                             (1 << 0)
+#define DFS_CTRL_DLL_RESET                             (1 << 1)
+
+/* DFS Port Status Register (DFS_PORTSR) */
+#define DFS_PORTSR(pll)                                                (DFS0_BASE_ADDR + 0x0000000C +((pll) * 0x80))
+/* DFS Port Reset Register (DFS_PORTRESET) */
+#define DFS_PORTRESET(pll)                                     (DFS0_BASE_ADDR + 0x00000014 + ((pll) * 0x80))
+#define DFS_PORTRESET_PORTRESET_SET(val)       (DFS_PORTRESET_PORTRESET_MASK | (((val) & DFS_PORTRESET_PORTRESET_MAXVAL) << DFS_PORTRESET_PORTRESET_OFFSET))
+#define DFS_PORTRESET_PORTRESET_MAXVAL         (0xF)
+#define DFS_PORTRESET_PORTRESET_MASK           (0x0000000F)
+#define DFS_PORTRESET_PORTRESET_OFFSET         (0)
+
+/* DFS Divide Register Portn (DFS_DVPORTn) */
+#define DFS_DVPORTn(pll,n)                     (DFS0_BASE_ADDR + ((pll) * 0x80) + (0x0000001C + ((n) * 0x4)))
+
+/*
+ * The mathematical formula for fdfs_clockout is the following:
+ * fdfs_clckout = fdfs_clkin / ( DFS_DVPORTn[MFI] + (DFS_DVPORTn[MFN]/256) )
+ */
+#define DFS_DVPORTn_MFI_SET(val)       (DFS_DVPORTn_MFI_MASK & (((val) & DFS_DVPORTn_MFI_MAXVAL) << DFS_DVPORTn_MFI_OFFSET) )
+#define DFS_DVPORTn_MFN_SET(val)       (DFS_DVPORTn_MFN_MASK & (((val) & DFS_DVPORTn_MFN_MAXVAL) << DFS_DVPORTn_MFN_OFFSET) )
+#define DFS_DVPORTn_MFI_MASK           (0x0000FF00)
+#define DFS_DVPORTn_MFN_MASK           (0x000000FF)
+#define DFS_DVPORTn_MFI_MAXVAL         (0xFF)
+#define DFS_DVPORTn_MFN_MAXVAL         (0xFF)
+#define DFS_DVPORTn_MFI_OFFSET         (8)
+#define DFS_DVPORTn_MFN_OFFSET         (0)
+#define DFS_MAXNUMBER                          (4)
+
+#define DFS_PARAMS_Nr                          (3)
+
+/* Frequencies are in Hz */
+#define FIRC_CLK_FREQ                          (48000000)
+#define XOSC_CLK_FREQ                          (40000000)
+
+#define PLL_MIN_FREQ                           (650000000)
+#define PLL_MAX_FREQ                           (1300000000)
+
+#define ARM_PLL_PHI0_FREQ                      (1000000000)
+#define ARM_PLL_PHI1_FREQ                      (1000000000)
+/* ARM_PLL_PHI1_DFS1_FREQ - 266 Mhz */
+#define ARM_PLL_PHI1_DFS1_EN           (1)
+#define ARM_PLL_PHI1_DFS1_MFI          (3)
+#define ARM_PLL_PHI1_DFS1_MFN          (194)
+/* ARM_PLL_PHI1_DFS2_REQ - 600 Mhz */
+#define ARM_PLL_PHI1_DFS2_EN           (1)
+#define ARM_PLL_PHI1_DFS2_MFI          (1)
+#define ARM_PLL_PHI1_DFS2_MFN          (170)
+/* ARM_PLL_PHI1_DFS3_FREQ - 600 Mhz */
+#define ARM_PLL_PHI1_DFS3_EN           (1)
+#define ARM_PLL_PHI1_DFS3_MFI          (1)
+#define ARM_PLL_PHI1_DFS3_MFN          (170)
+#define ARM_PLL_PHI1_DFS_Nr                    (3)
+#define ARM_PLL_PLLDV_PREDIV           (2)
+#define ARM_PLL_PLLDV_MFD                      (50)
+#define ARM_PLL_PLLDV_MFN                      (0)
+
+#define PERIPH_PLL_PHI0_FREQ           (400000000)
+#define PERIPH_PLL_PHI1_FREQ           (100000000)
+#define PERIPH_PLL_PHI1_DFS_Nr         (0)
+#define PERIPH_PLL_PLLDV_PREDIV                (1)
+#define PERIPH_PLL_PLLDV_MFD           (30)
+#define PERIPH_PLL_PLLDV_MFN           (0)
+
+#define ENET_PLL_PHI0_FREQ                     (500000000)
+#define ENET_PLL_PHI1_FREQ                     (1000000000)
+/* ENET_PLL_PHI1_DFS1_FREQ - 350 Mhz*/
+#define ENET_PLL_PHI1_DFS1_EN          (1)
+#define ENET_PLL_PHI1_DFS1_MFI         (2)
+#define ENET_PLL_PHI1_DFS1_MFN         (219)
+/* ENET_PLL_PHI1_DFS2_FREQ - 350 Mhz*/
+#define ENET_PLL_PHI1_DFS2_EN          (1)
+#define ENET_PLL_PHI1_DFS2_MFI         (2)
+#define ENET_PLL_PHI1_DFS2_MFN         (219)
+/* ENET_PLL_PHI1_DFS3_FREQ - 320 Mhz*/
+#define ENET_PLL_PHI1_DFS3_EN          (1)
+#define ENET_PLL_PHI1_DFS3_MFI         (3)
+#define ENET_PLL_PHI1_DFS3_MFN         (32)
+/* ENET_PLL_PHI1_DFS1_FREQ - 50 Mhz*/
+#define ENET_PLL_PHI1_DFS4_EN          (1)
+#define ENET_PLL_PHI1_DFS4_MFI         (2)
+#define ENET_PLL_PHI1_DFS4_MFN         (0)
+#define ENET_PLL_PHI1_DFS_Nr           (4)
+#define ENET_PLL_PLLDV_PREDIV          (2)
+#define ENET_PLL_PLLDV_MFD                     (50)
+#define ENET_PLL_PLLDV_MFN                     (0)
+
+#define DDR_PLL_PHI0_FREQ                      (533000000)
+#define DDR_PLL_PHI1_FREQ                      (1066000000)
+/* DDR_PLL_PHI1_DFS1_FREQ - 500 Mhz */
+#define DDR_PLL_PHI1_DFS1_EN           (1)
+#define DDR_PLL_PHI1_DFS1_MFI          (2)
+#define DDR_PLL_PHI1_DFS1_MFN          (33)
+/* DDR_PLL_PHI1_DFS2_REQ - 500 Mhz */
+#define DDR_PLL_PHI1_DFS2_EN           (1)
+#define DDR_PLL_PHI1_DFS2_MFI          (2)
+#define DDR_PLL_PHI1_DFS2_MFN          (33)
+/* DDR_PLL_PHI1_DFS3_FREQ - 350 Mhz */
+#define DDR_PLL_PHI1_DFS3_EN           (1)
+#define DDR_PLL_PHI1_DFS3_MFI          (3)
+#define DDR_PLL_PHI1_DFS3_MFN          (11)
+#define DDR_PLL_PHI1_DFS_Nr                    (3)
+#define DDR_PLL_PLLDV_PREDIV           (2)
+#define DDR_PLL_PLLDV_MFD                      (53)
+#define DDR_PLL_PLLDV_MFN                      (6144)
+
+#define VIDEO_PLL_PHI0_FREQ                    (600000000)
+#define VIDEO_PLL_PHI1_FREQ                    (0)
+#define VIDEO_PLL_PHI1_DFS_Nr          (0)
+#define VIDEO_PLL_PLLDV_PREDIV         (1)
+#define VIDEO_PLL_PLLDV_MFD                    (30)
+#define VIDEO_PLL_PLLDV_MFN                    (0)
+
+#endif
+
+#endif /*__ARCH_ARM_MACH_S32V234_MCCGM_REGS_H__ */

diff --git a/arch/arm/include/asm/arch-s32v234/mc_me_regs.h b/arch/arm/include/asm/arch-s32v234/mc_me_regs.h
new file mode 100644 (file)
index 0000000..a1172e0
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/mc_me_regs.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_MCME_REGS_H__
+#define __ARCH_ARM_MACH_S32V234_MCME_REGS_H__
+
+#ifndef __ASSEMBLY__
+
+/* MC_ME registers definitions */
+
+/* MC_ME_GS */
+#define MC_ME_GS                                               (MC_ME_BASE_ADDR + 0x00000000)
+
+#define MC_ME_GS_S_SYSCLK_FIRC                 (0x0 << 0)
+#define MC_ME_GS_S_SYSCLK_FXOSC                        (0x1 << 0)
+#define MC_ME_GS_S_SYSCLK_ARMPLL               (0x2 << 0)
+#define MC_ME_GS_S_STSCLK_DISABLE              (0xF << 0)
+#define MC_ME_GS_S_FIRC                                        (1 << 4)
+#define MC_ME_GS_S_XOSC                                        (1 << 5)
+#define MC_ME_GS_S_ARMPLL                              (1 << 6)
+#define MC_ME_GS_S_PERPLL                              (1 << 7)
+#define MC_ME_GS_S_ENETPLL                             (1 << 8)
+#define MC_ME_GS_S_DDRPLL                              (1 << 9)
+#define MC_ME_GS_S_VIDEOPLL                            (1 << 10)
+#define MC_ME_GS_S_MVR                                 (1 << 20)
+#define MC_ME_GS_S_PDO                                 (1 << 23)
+#define MC_ME_GS_S_MTRANS                              (1 << 27)
+#define MC_ME_GS_S_CRT_MODE_RESET              (0x0 << 28)
+#define MC_ME_GS_S_CRT_MODE_TEST               (0x1 << 28)
+#define MC_ME_GS_S_CRT_MODE_DRUN               (0x3 << 28)
+#define MC_ME_GS_S_CRT_MODE_RUN0               (0x4 << 28)
+#define MC_ME_GS_S_CRT_MODE_RUN1               (0x5 << 28)
+#define MC_ME_GS_S_CRT_MODE_RUN2               (0x6 << 28)
+#define MC_ME_GS_S_CRT_MODE_RUN3               (0x7 << 28)
+
+/* MC_ME_MCTL */
+#define MC_ME_MCTL                                             (MC_ME_BASE_ADDR + 0x00000004)
+
+#define MC_ME_MCTL_KEY                                 (0x00005AF0)
+#define MC_ME_MCTL_INVERTEDKEY                 (0x0000A50F)
+#define MC_ME_MCTL_RESET                               (0x0 << 28)
+#define MC_ME_MCTL_TEST                                        (0x1 << 28)
+#define MC_ME_MCTL_DRUN                                        (0x3 << 28)
+#define MC_ME_MCTL_RUN0                                        (0x4 << 28)
+#define MC_ME_MCTL_RUN1                                        (0x5 << 28)
+#define MC_ME_MCTL_RUN2                                        (0x6 << 28)
+#define MC_ME_MCTL_RUN3                                        (0x7 << 28)
+
+/* MC_ME_ME */
+#define MC_ME_ME                                               (MC_ME_BASE_ADDR + 0x00000008)
+
+#define MC_ME_ME_RESET_FUNC                            (1 << 0)
+#define MC_ME_ME_TEST                                  (1 << 1)
+#define MC_ME_ME_DRUN                                  (1 << 3)
+#define MC_ME_ME_RUN0                                  (1 << 4)
+#define MC_ME_ME_RUN1                                  (1 << 5)
+#define MC_ME_ME_RUN2                                  (1 << 6)
+#define MC_ME_ME_RUN3                                  (1 << 7)
+
+/* MC_ME_RUN_PCn */
+#define MC_ME_RUN_PCn(n)                               (MC_ME_BASE_ADDR + 0x00000080 + 0x4 * (n))
+
+#define MC_ME_RUN_PCn_RESET                            (1 << 0)
+#define MC_ME_RUN_PCn_TEST                             (1 << 1)
+#define MC_ME_RUN_PCn_DRUN                             (1 << 3)
+#define MC_ME_RUN_PCn_RUN0                             (1 << 4)
+#define MC_ME_RUN_PCn_RUN1                             (1 << 5)
+#define MC_ME_RUN_PCn_RUN2                             (1 << 6)
+#define MC_ME_RUN_PCn_RUN3                             (1 << 7)
+
+/*
+ * MC_ME_RESET_MC/MC_ME_TEST_MC
+ * MC_ME_DRUN_MC
+ * MC_ME_RUNn_MC
+ */
+#define MC_ME_RESET_MC                                         (MC_ME_BASE_ADDR + 0x00000020)
+#define MC_ME_TEST_MC                                          (MC_ME_BASE_ADDR + 0x00000024)
+#define MC_ME_DRUN_MC                                          (MC_ME_BASE_ADDR + 0x0000002C)
+#define MC_ME_RUNn_MC(n)                                       (MC_ME_BASE_ADDR + 0x00000030 + 0x4 * (n))
+
+#define MC_ME_RUNMODE_MC_SYSCLK(val)   (MC_ME_RUNMODE_MC_SYSCLK_MASK & (val))
+#define MC_ME_RUNMODE_MC_SYSCLK_MASK   (0x0000000F)
+#define MC_ME_RUNMODE_MC_FIRCON                        (1 << 4)
+#define MC_ME_RUNMODE_MC_XOSCON                        (1 << 5)
+#define MC_ME_RUNMODE_MC_PLL(pll)              (1 << (6 + (pll)))
+#define MC_ME_RUNMODE_MC_MVRON                 (1 << 20)
+#define MC_ME_RUNMODE_MC_PDO                   (1 << 23)
+#define MC_ME_RUNMODE_MC_PWRLVL0               (1 << 28)
+#define MC_ME_RUNMODE_MC_PWRLVL1               (1 << 29)
+#define MC_ME_RUNMODE_MC_PWRLVL2               (1 << 30)
+
+/* MC_ME_DRUN_SEC_CC_I */
+#define MC_ME_DRUN_SEC_CC_I                                    (MC_ME_BASE_ADDR + 0x260)
+/* MC_ME_RUNn_SEC_CC_I */
+#define MC_ME_RUNn_SEC_CC_I(n)                         (MC_ME_BASE_ADDR + 0x270 + (n) * 0x10)
+#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK(val,offset)      ((MC_ME_RUNMODE_SEC_CC_I_SYSCLK_MASK & (val)) << offset)
+#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK1_OFFSET  (4)
+#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK2_OFFSET  (8)
+#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK3_OFFSET  (12)
+#define MC_ME_RUNMODE_SEC_CC_I_SYSCLK_MASK             (0x3)
+
+/*
+ * ME_PCTLn
+ * Please note that these registers are 8 bits width, so
+ * the operations over them should be done using 8 bits operations.
+ */
+#define MC_ME_PCTLn_RUNPCm(n)                  ( (n) & MC_ME_PCTLn_RUNPCm_MASK )
+#define MC_ME_PCTLn_RUNPCm_MASK                        (0x7)
+
+/* DEC200 Peripheral Control Register          */
+#define MC_ME_PCTL39   (MC_ME_BASE_ADDR + 0x000000E4)
+/* 2D-ACE Peripheral Control Register          */
+#define MC_ME_PCTL40   (MC_ME_BASE_ADDR + 0x000000EB)
+/* ENET Peripheral Control Register            */
+#define MC_ME_PCTL50   (MC_ME_BASE_ADDR + 0x000000F1)
+/* DMACHMUX0 Peripheral Control Register       */
+#define MC_ME_PCTL49   (MC_ME_BASE_ADDR + 0x000000F2)
+/* CSI0 Peripheral Control Register                    */
+#define MC_ME_PCTL48   (MC_ME_BASE_ADDR + 0x000000F3)
+/* MMDC0 Peripheral Control Register           */
+#define MC_ME_PCTL54   (MC_ME_BASE_ADDR + 0x000000F5)
+/* FRAY Peripheral Control Register                    */
+#define MC_ME_PCTL52   (MC_ME_BASE_ADDR + 0x000000F7)
+/* PIT0 Peripheral Control Register                    */
+#define MC_ME_PCTL58   (MC_ME_BASE_ADDR + 0x000000F9)
+/* FlexTIMER0 Peripheral Control Register      */
+#define MC_ME_PCTL79   (MC_ME_BASE_ADDR + 0x0000010C)
+/* SARADC0 Peripheral Control Register         */
+#define MC_ME_PCTL77   (MC_ME_BASE_ADDR + 0x0000010E)
+/* LINFLEX0 Peripheral Control Register                */
+#define MC_ME_PCTL83   (MC_ME_BASE_ADDR + 0x00000110)
+/* IIC0 Peripheral Control Register                    */
+#define MC_ME_PCTL81   (MC_ME_BASE_ADDR + 0x00000112)
+/* DSPI0 Peripheral Control Register           */
+#define MC_ME_PCTL87   (MC_ME_BASE_ADDR + 0x00000114)
+/* CANFD0 Peripheral Control Register          */
+#define MC_ME_PCTL85   (MC_ME_BASE_ADDR + 0x00000116)
+/* CRC0 Peripheral Control Register                    */
+#define MC_ME_PCTL91   (MC_ME_BASE_ADDR + 0x00000118)
+/* DSPI2 Peripheral Control Register           */
+#define MC_ME_PCTL89   (MC_ME_BASE_ADDR + 0x0000011A)
+/* SDHC Peripheral Control Register                    */
+#define MC_ME_PCTL93   (MC_ME_BASE_ADDR + 0x0000011E)
+/* VIU0 Peripheral Control Register                    */
+#define MC_ME_PCTL100  (MC_ME_BASE_ADDR + 0x00000127)
+/* HPSMI Peripheral Control Register           */
+#define MC_ME_PCTL104  (MC_ME_BASE_ADDR + 0x0000012B)
+/* SIPI Peripheral Control Register                    */
+#define MC_ME_PCTL116  (MC_ME_BASE_ADDR + 0x00000137)
+/* LFAST Peripheral Control Register           */
+#define MC_ME_PCTL120  (MC_ME_BASE_ADDR + 0x0000013B)
+/* MMDC1 Peripheral Control Register           */
+#define MC_ME_PCTL162  (MC_ME_BASE_ADDR + 0x00000161)
+/* DMACHMUX1 Peripheral Control Register       */
+#define MC_ME_PCTL161  (MC_ME_BASE_ADDR + 0x00000162)
+/* CSI1 Peripheral Control Register                    */
+#define MC_ME_PCTL160  (MC_ME_BASE_ADDR + 0x00000163)
+/* QUADSPI0 Peripheral Control Register                */
+#define MC_ME_PCTL166  (MC_ME_BASE_ADDR + 0x00000165)
+/* PIT1 Peripheral Control Register                    */
+#define MC_ME_PCTL170  (MC_ME_BASE_ADDR + 0x00000169)
+/* FlexTIMER1 Peripheral Control Register      */
+#define MC_ME_PCTL182  (MC_ME_BASE_ADDR + 0x00000175)
+/* IIC2 Peripheral Control Register                    */
+#define MC_ME_PCTL186  (MC_ME_BASE_ADDR + 0x00000179)
+/* IIC1 Peripheral Control Register                    */
+#define MC_ME_PCTL184  (MC_ME_BASE_ADDR + 0x0000017B)
+/* CANFD1 Peripheral Control Register          */
+#define MC_ME_PCTL190  (MC_ME_BASE_ADDR + 0x0000017D)
+/* LINFLEX1 Peripheral Control Register                */
+#define MC_ME_PCTL188  (MC_ME_BASE_ADDR + 0x0000017F)
+/* DSPI3 Peripheral Control Register           */
+#define MC_ME_PCTL194  (MC_ME_BASE_ADDR + 0x00000181)
+/* DSPI1 Peripheral Control Register           */
+#define MC_ME_PCTL192  (MC_ME_BASE_ADDR + 0x00000183)
+/* TSENS Peripheral Control Register           */
+#define MC_ME_PCTL206  (MC_ME_BASE_ADDR + 0x0000018D)
+/* CRC1 Peripheral Control Register                    */
+#define MC_ME_PCTL204  (MC_ME_BASE_ADDR + 0x0000018F)
+/* VIU1 Peripheral Control Register            */
+#define MC_ME_PCTL208  (MC_ME_BASE_ADDR + 0x00000193)
+/* JPEG Peripheral Control Register            */
+#define MC_ME_PCTL212  (MC_ME_BASE_ADDR + 0x00000197)
+/* H264_DEC Peripheral Control Register        */
+#define MC_ME_PCTL216  (MC_ME_BASE_ADDR + 0x0000019B)
+/* H264_ENC Peripheral Control Register        */
+#define MC_ME_PCTL220  (MC_ME_BASE_ADDR + 0x0000019F)
+/* MBIST Peripheral Control Register   */
+#define MC_ME_PCTL236  (MC_ME_BASE_ADDR + 0x000001A9)
+
+/* Core status register */
+#define MC_ME_CS               (MC_ME_BASE_ADDR + 0x000001C0)
+
+#endif
+
+#endif /*__ARCH_ARM_MACH_S32V234_MCME_REGS_H__ */

diff --git a/arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h b/arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h
new file mode 100644 (file)
index 0000000..f39e81b
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/mc_rgm_regs.h
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__
+#define __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__
+
+#define MC_RGM_DES                     (MC_RGM_BASE_ADDR)
+#define MC_RGM_FES                     (MC_RGM_BASE_ADDR + 0x300)
+#define MC_RGM_FERD                    (MC_RGM_BASE_ADDR + 0x310)
+#define MC_RGM_FBRE                    (MC_RGM_BASE_ADDR + 0x330)
+#define MC_RGM_FESS                    (MC_RGM_BASE_ADDR + 0x340)
+#define MC_RGM_DDR_HE                  (MC_RGM_BASE_ADDR + 0x350)
+#define MC_RGM_DDR_HS                  (MC_RGM_BASE_ADDR + 0x354)
+#define MC_RGM_FRHE                    (MC_RGM_BASE_ADDR + 0x358)
+#define MC_RGM_FREC                    (MC_RGM_BASE_ADDR + 0x600)
+#define MC_RGM_FRET                    (MC_RGM_BASE_ADDR + 0x607)
+#define MC_RGM_DRET                    (MC_RGM_BASE_ADDR + 0x60B)
+
+/* function reset sources mask */
+#define F_SWT4                         0x8000
+#define F_JTAG                         0x400
+#define F_FCCU_SOFT                    0x40
+#define F_FCCU_HARD                    0x20
+#define F_SOFT_FUNC                    0x8
+#define F_ST_DONE                      0x4
+#define F_EXT_RST                      0x1
+
+#endif /* __ARCH_ARM_MACH_S32V234_MCRGM_REGS_H__ */

diff --git a/arch/arm/include/asm/arch-s32v234/mmdc.h b/arch/arm/include/asm/arch-s32v234/mmdc.h
new file mode 100644 (file)
index 0000000..504aa68
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/mmdc.h
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_MMDC_H__
+#define __ARCH_ARM_MACH_S32V234_MMDC_H__
+
+#define MMDC0                          0
+#define MMDC1                          1
+
+#define MMDC_MDCTL                     0x0
+#define MMDC_MDPDC                     0x4
+#define MMDC_MDOTC                     0x8
+#define MMDC_MDCFG0                    0xC
+#define MMDC_MDCFG1                    0x10
+#define MMDC_MDCFG2                    0x14
+#define MMDC_MDMISC                    0x18
+#define MMDC_MDSCR                     0x1C
+#define MMDC_MDREF                     0x20
+#define MMDC_MDRWD                     0x2C
+#define MMDC_MDOR                      0x30
+#define MMDC_MDMRR                     0x34
+#define MMDC_MDCFG3LP          0x38
+#define MMDC_MDMR4                     0x3C
+#define MMDC_MDASP                     0x40
+#define MMDC_MAARCR                    0x400
+#define MMDC_MAPSR                     0x404
+#define MMDC_MAEXIDR0          0x408
+#define MMDC_MAEXIDR1          0x40C
+#define MMDC_MADPCR0           0x410
+#define MMDC_MADPCR1           0x414
+#define MMDC_MADPSR0           0x418
+#define MMDC_MADPSR1           0x41C
+#define MMDC_MADPSR2           0x420
+#define MMDC_MADPSR3           0x424
+#define MMDC_MADPSR4           0x428
+#define MMDC_MADPSR5           0x42C
+#define MMDC_MASBS0                    0x430
+#define MMDC_MASBS1                    0x434
+#define MMDC_MAGENP                    0x440
+#define MMDC_MPZQHWCTRL                0x800
+#define MMDC_MPWLGCR           0x808
+#define MMDC_MPWLDECTRL0       0x80C
+#define MMDC_MPWLDECTRL1       0x810
+#define MMDC_MPWLDLST          0x814
+#define MMDC_MPODTCTRL         0x818
+#define MMDC_MPRDDQBY0DL       0x81C
+#define MMDC_MPRDDQBY1DL       0x820
+#define MMDC_MPRDDQBY2DL       0x824
+#define MMDC_MPRDDQBY3DL       0x828
+#define MMDC_MPDGCTRL0         0x83C
+#define MMDC_MPDGCTRL1         0x840
+#define MMDC_MPDGDLST0         0x844
+#define MMDC_MPRDDLCTL         0x848
+#define MMDC_MPRDDLST          0x84C
+#define MMDC_MPWRDLCTL         0x850
+#define MMDC_MPWRDLST          0x854
+#define MMDC_MPZQLP2CTL                0x85C
+#define MMDC_MPRDDLHWCTL       0x860
+#define MMDC_MPWRDLHWCTL       0x864
+#define MMDC_MPRDDLHWST0       0x868
+#define MMDC_MPRDDLHWST1       0x86C
+#define MMDC_MPWRDLHWST1       0x870
+#define MMDC_MPWRDLHWST2       0x874
+#define MMDC_MPWLHWERR         0x878
+#define MMDC_MPDGHWST0         0x87C
+#define MMDC_MPDGHWST1         0x880
+#define MMDC_MPDGHWST2         0x884
+#define MMDC_MPDGHWST3         0x888
+#define MMDC_MPPDCMPR1         0x88C
+#define MMDC_MPPDCMPR2         0x890
+#define MMDC_MPSWDAR0          0x894
+#define MMDC_MPSWDRDR0         0x898
+#define MMDC_MPSWDRDR1         0x89C
+#define MMDC_MPSWDRDR2         0x8A0
+#define MMDC_MPSWDRDR3         0x8A4
+#define MMDC_MPSWDRDR4         0x8A8
+#define MMDC_MPSWDRDR5         0x8AC
+#define MMDC_MPSWDRDR6         0x8B0
+#define MMDC_MPSWDRDR7         0x8B4
+#define MMDC_MPMUR0                    0x8B8
+#define MMDC_MPDCCR                    0x8C0
+
+#define MMDC_MPMUR0_FRC_MSR                    (1 << 11)
+#define MMDC_MPZQHWCTRL_ZQ_HW_FOR      (1 << 16)
+
+#endif

diff --git a/arch/arm/include/asm/arch-s32v234/siul.h b/arch/arm/include/asm/arch-s32v234/siul.h
new file mode 100644 (file)
index 0000000..2e8c211
--- /dev/null
+++ b/arch/arm/include/asm/arch-s32v234/siul.h
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ARCH_ARM_MACH_S32V234_SIUL_H__
+#define __ARCH_ARM_MACH_S32V234_SIUL_H__
+
+#include "ddr.h"
+
+#define SIUL2_MIDR1                            (SIUL2_BASE_ADDR + 0x00000004)
+#define SIUL2_MIDR2                            (SIUL2_BASE_ADDR + 0x00000008)
+#define SIUL2_DISR0                            (SIUL2_BASE_ADDR + 0x00000010)
+#define SIUL2_DIRER0                           (SIUL2_BASE_ADDR + 0x00000018)
+#define SIUL2_DIRSR0                           (SIUL2_BASE_ADDR + 0x00000020)
+#define SIUL2_IREER0                           (SIUL2_BASE_ADDR + 0x00000028)
+#define SIUL2_IFEER0                           (SIUL2_BASE_ADDR + 0x00000030)
+#define SIUL2_IFER0                            (SIUL2_BASE_ADDR + 0x00000038)
+
+#define SIUL2_IFMCR_BASE                       (SIUL2_BASE_ADDR + 0x00000040)
+#define SIUL2_IFMCRn(i)                                (SIUL2_IFMCR_BASE + 4 * (i))
+
+#define SIUL2_IFCPR                            (SIUL2_BASE_ADDR + 0x000000C0)
+
+/* SIUL2_MSCR specifications as stated in Reference Manual:
+ * 0 - 359 Output Multiplexed Signal Configuration Registers
+ * 512- 1023 Input Multiplexed Signal Configuration Registers */
+#define SIUL2_MSCR_BASE                                (SIUL2_BASE_ADDR + 0x00000240)
+#define SIUL2_MSCRn(i)                         (SIUL2_MSCR_BASE + 4 * (i))
+
+#define SIUL2_IMCR_BASE                                (SIUL2_BASE_ADDR + 0x00000A40)
+#define SIUL2_IMCRn(i)                         (SIUL2_IMCR_BASE +  4 * (i))
+
+#define SIUL2_GPDO_BASE                                (SIUL2_BASE_ADDR + 0x00001300)
+#define SIUL2_GPDOn(i)                         (SIUL2_GPDO_BASE + 4 * (i))
+
+#define SIUL2_GPDI_BASE                                (SIUL2_BASE_ADDR + 0x00001500)
+#define SIUL2_GPDIn(i)                         (SIUL2_GPDI_BASE + 4 * (i))
+
+#define SIUL2_PGPDO_BASE                       (SIUL2_BASE_ADDR + 0x00001700)
+#define SIUL2_PGPDOn(i)                                (SIUL2_PGPDO_BASE +  2 * (i))
+
+#define SIUL2_PGPDI_BASE                       (SIUL2_BASE_ADDR + 0x00001740)
+#define SIUL2_PGPDIn(i)                                (SIUL2_PGPDI_BASE + 2 * (i))
+
+#define SIUL2_MPGPDO_BASE                      (SIUL2_BASE_ADDR + 0x00001780)
+#define SIUL2_MPGPDOn(i)                       (SIUL2_MPGPDO_BASE + 4 * (i))
+
+/* SIUL2_MSCR masks */
+#define SIUL2_MSCR_DDR_DO_TRIM(v)      ((v) & 0xC0000000)
+#define SIUL2_MSCR_DDR_DO_TRIM_MIN     (0 << 30)
+#define SIUL2_MSCR_DDR_DO_TRIM_50PS    (1 << 30)
+#define SIUL2_MSCR_DDR_DO_TRIM_100PS   (2 << 30)
+#define SIUL2_MSCR_DDR_DO_TRIM_150PS   (3 << 30)
+
+#define SIUL2_MSCR_DDR_INPUT(v)                ((v) & 0x20000000)
+#define SIUL2_MSCR_DDR_INPUT_CMOS      (0 << 29)
+#define SIUL2_MSCR_DDR_INPUT_DIFF_DDR  (1 << 29)
+
+#define SIUL2_MSCR_DDR_SEL(v)          ((v) & 0x18000000)
+#define SIUL2_MSCR_DDR_SEL_DDR3                (0 << 27)
+#define SIUL2_MSCR_DDR_SEL_LPDDR2      (2 << 27)
+
+#define SIUL2_MSCR_DDR_ODT(v)          ((v) & 0x07000000)
+#define SIUL2_MSCR_DDR_ODT_120ohm      (1 << 24)
+#define SIUL2_MSCR_DDR_ODT_60ohm       (2 << 24)
+#define SIUL2_MSCR_DDR_ODT_40ohm       (3 << 24)
+#define SIUL2_MSCR_DDR_ODT_30ohm       (4 << 24)
+#define SIUL2_MSCR_DDR_ODT_24ohm       (5 << 24)
+#define SIUL2_MSCR_DDR_ODT_20ohm       (6 << 24)
+#define SIUL2_MSCR_DDR_ODT_17ohm       (7 << 24)
+
+#define SIUL2_MSCR_DCYCLE_TRIM(v)      ((v) & 0x00C00000)
+#define SIUL2_MSCR_DCYCLE_TRIM_NONE    (0 << 22)
+#define SIUL2_MSCR_DCYCLE_TRIM_LEFT    (1 << 22)
+#define SIUL2_MSCR_DCYCLE_TRIM_RIGHT   (2 << 22)
+
+#define SIUL2_MSCR_OBE(v)              ((v) & 0x00200000)
+#define SIUL2_MSCR_OBE_EN              (1 << 21)
+
+#define SIUL2_MSCR_ODE(v)              ((v) & 0x00100000)
+#define SIUL2_MSCR_ODE_EN              (1 << 20)
+
+#define SIUL2_MSCR_IBE(v)              ((v) & 0x00010000)
+#define SIUL2_MSCR_IBE_EN              (1 << 19)
+
+#define SIUL2_MSCR_HYS(v)              ((v) & 0x00400000)
+#define SIUL2_MSCR_HYS_EN              (1 << 18)
+
+#define SIUL2_MSCR_INV(v)              ((v) & 0x00020000)
+#define SIUL2_MSCR_INV_EN              (1 << 17)
+
+#define SIUL2_MSCR_PKE(v)              ((v) & 0x00010000)
+#define SIUL2_MSCR_PKE_EN              (1 << 16)
+
+#define SIUL2_MSCR_SRE(v)              ((v) & 0x0000C000)
+#define SIUL2_MSCR_SRE_SPEED_LOW_50    (0 << 14)
+#define SIUL2_MSCR_SRE_SPEED_LOW_100   (1 << 14)
+#define SIUL2_MSCR_SRE_SPEED_HIGH_100  (2 << 14)
+#define SIUL2_MSCR_SRE_SPEED_HIGH_200  (3 << 14)
+
+#define SIUL2_MSCR_PUE(v)              ((v) & 0x00002000)
+#define SIUL2_MSCR_PUE_EN              (1 << 13)
+
+#define SIUL2_MSCR_PUS(v)              ((v) & 0x00001800)
+#define SIUL2_MSCR_PUS_100K_DOWN       (0 << 11)
+#define SIUL2_MSCR_PUS_50K_DOWN                (1 << 11)
+#define SIUL2_MSCR_PUS_100K_UP         (2 << 11)
+#define SIUL2_MSCR_PUS_33K_UP          (3 << 11)
+
+#define SIUL2_MSCR_DSE(v)              ((v) & 0x00000700)
+#define SIUL2_MSCR_DSE_240ohm          (1 << 8)
+#define SIUL2_MSCR_DSE_120ohm          (2 << 8)
+#define SIUL2_MSCR_DSE_80ohm           (3 << 8)
+#define SIUL2_MSCR_DSE_60ohm           (4 << 8)
+#define SIUL2_MSCR_DSE_48ohm           (5 << 8)
+#define SIUL2_MSCR_DSE_40ohm           (6 << 8)
+#define SIUL2_MSCR_DSE_34ohm           (7 << 8)
+
+#define SIUL2_MSCR_CRPOINT_TRIM(v)     ((v) & 0x000000C0)
+#define SIUL2_MSCR_CRPOINT_TRIM_1      (1 << 6)
+
+#define SIUL2_MSCR_SMC(v)              ((v) & 0x00000020)
+#define SIUL2_MSCR_MUX_MODE(v)         ((v) & 0x0000000f)
+#define SIUL2_MSCR_MUX_MODE_ALT1       (0x1)
+#define SIUL2_MSCR_MUX_MODE_ALT2       (0x2)
+#define SIUL2_MSCR_MUX_MODE_ALT3       (0x3)
+
+/* UART settings */
+#define SIUL2_UART0_TXD_PAD    12
+#define SIUL2_UART_TXD         (SIUL2_MSCR_OBE_EN | SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_DSE_60ohm |    \
+                               SIUL2_MSCR_SRE_SPEED_LOW_100 | SIUL2_MSCR_MUX_MODE_ALT1)
+
+#define SIUL2_UART0_MSCR_RXD_PAD       11
+#define SIUL2_UART0_IMCR_RXD_PAD       200
+
+#define SIUL2_UART_MSCR_RXD    (SIUL2_MSCR_PUE_EN | SIUL2_MSCR_IBE_EN | SIUL2_MSCR_DCYCLE_TRIM_RIGHT)
+#define SIUL2_UART_IMCR_RXD    (SIUL2_MSCR_MUX_MODE_ALT2)
+
+/* uSDHC settings */
+#define SIUL2_USDHC_PAD_CTRL_BASE      (SIUL2_MSCR_SRE_SPEED_HIGH_200 | SIUL2_MSCR_OBE_EN |    \
+                                               SIUL2_MSCR_DSE_34ohm | SIUL2_MSCR_PKE_EN | SIUL2_MSCR_IBE_EN |          \
+                                               SIUL2_MSCR_PUS_100K_UP | SIUL2_MSCR_PUE_EN )
+#define SIUL2_USDHC_PAD_CTRL_CMD       (SIUL2_USDHC_PAD_CTRL_BASE | SIUL2_MSCR_MUX_MODE_ALT1)
+#define SIUL2_USDHC_PAD_CTRL_CLK       (SIUL2_USDHC_PAD_CTRL_BASE | SIUL2_MSCR_MUX_MODE_ALT2)
+#define SIUL2_USDHC_PAD_CTRL_DAT0_3    (SIUL2_USDHC_PAD_CTRL_BASE | SIUL2_MSCR_MUX_MODE_ALT2)
+#define SIUL2_USDHC_PAD_CTRL_DAT4_7    (SIUL2_USDHC_PAD_CTRL_BASE | SIUL2_MSCR_MUX_MODE_ALT3)
+
+#endif /*__ARCH_ARM_MACH_S32V234_SIUL_H__ */

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index f2990db9289f5e06cf19396847c5486f6a054a4d..c2e72f5a86b2595609d856d75a2ce18a1a87021a 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -222,7 +222,12 @@ struct sunxi_ccm_reg {
 #define CCM_PLL11_CTRL_UPD             (0x1 << 30)
 #define CCM_PLL11_CTRL_EN              (0x1 << 31)
 
+#if defined(CONFIG_MACH_SUN50I)
+/* AHB1=100MHz failsafe setup from the FEL mode, usable with PMIC defaults */
+#define AHB1_ABP1_DIV_DEFAULT          0x00003190 /* AHB1=PLL6/6,APB1=AHB1/2 */
+#else
 #define AHB1_ABP1_DIV_DEFAULT          0x00003180 /* AHB1=PLL6/3,APB1=AHB1/2 */
+#endif
 
 #define AXI_GATE_OFFSET_DRAM           0
 

diff --git a/arch/arm/include/asm/imx-common/sys_proto.h b/arch/arm/include/asm/imx-common/sys_proto.h
index 386c2dc42b9f300ba9a4aac4bc2987e59ca7394e..32f95b33c228fcde617f85366b4f16350c893534 100644 (file)
--- a/arch/arm/include/asm/imx-common/sys_proto.h
+++ b/arch/arm/include/asm/imx-common/sys_proto.h
@@ -24,7 +24,15 @@
 #define is_cpu_type(cpu) (get_cpu_type() == cpu)
 #define is_soc_type(soc) (get_soc_type() == soc)
 
+#define is_mx6() (is_soc_type(MXC_SOC_MX6))
+#define is_mx7() (is_soc_type(MXC_SOC_MX7))
+
 #define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
+#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+#define is_mx6sdl() (is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6DL))
+#define is_mx6sx() (is_cpu_type(MXC_CPU_MX6SX))
+#define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
+#define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
 
 u32 get_nr_cpus(void);
 u32 get_cpu_rev(void);

diff --git a/arch/arm/include/asm/setjmp.h b/arch/arm/include/asm/setjmp.h
index b8b85b79dd41f2673dc744c740be950f9a6c5142..ae738b2457ba13634ae9ab7198ec3c11bcc3a630 100644 (file)
--- a/arch/arm/include/asm/setjmp.h
+++ b/arch/arm/include/asm/setjmp.h
@@ -43,13 +43,14 @@ static inline int setjmp(jmp_buf jmp)
 #else
        asm volatile(
 #ifdef CONFIG_SYS_THUMB_BUILD
-               "adr r0, jmp_target + 1\n"
+               "adr r0, jmp_target\n"
+               "add r0, r0, $1\n"
 #else
                "adr r0, jmp_target\n"
 #endif
                "mov r1, %1\n"
                "mov r2, sp\n"
-               "stm r1, {r0, r2, r4, r5, r6, r7}\n"
+               "stm r1!, {r0, r2, r4, r5, r6, r7}\n"
                "b 2f\n"
                "jmp_target: "
                "mov %0, #1\n"
@@ -61,8 +62,6 @@ static inline int setjmp(jmp_buf jmp)
                  "cc", "memory");
 #endif
 
-printf("%s:%d target=%#lx\n", __func__, __LINE__, jmp->target);
-
        return r;
 }
 
@@ -84,7 +83,7 @@ static inline __noreturn void longjmp(jmp_buf jmp)
 #else
        asm volatile(
                "mov r1, %0\n"
-               "ldm r1, {r0, r2, r4, r5, r6, r7}\n"
+               "ldm r1!, {r0, r2, r4, r5, r6, r7}\n"
                "mov sp, r2\n"
                "bx r0\n"
                :

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 73a9c74512a21a8fcfc261faefd81c9e366e42ed..6180699fed9593e279ee03546c1d46cce26e86bd 100644 (file)
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -23,6 +23,14 @@ config TARGET_SNAPPER9260
        select DM_SERIAL
        select DM_GPIO
 
+config TARGET_GURNARD
+       bool "Support gurnard"
+       select CPU_ARM926EJS
+       select DM
+       select DM_SERIAL
+       select DM_GPIO
+       select DM_ETH
+
 config TARGET_AT91SAM9261EK
        bool "Atmel at91sam9261 reference board"
        select CPU_ARM926EJS
@@ -149,6 +157,7 @@ source "board/atmel/sama5d3_xplained/Kconfig"
 source "board/atmel/sama5d3xek/Kconfig"
 source "board/atmel/sama5d4_xplained/Kconfig"
 source "board/atmel/sama5d4ek/Kconfig"
+source "board/bluewater/gurnard/Kconfig"
 source "board/bluewater/snapper9260/Kconfig"
 source "board/calao/usb_a9263/Kconfig"
 source "board/denx/ma5d4evk/Kconfig"

diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index d2abf310a59989c51362585fff3d83a6bc007d4e..a908004b0a4a9c1f031619af3e54d4d40e2f3e7f 100644 (file)
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -10,8 +10,8 @@ obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o
 obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
 obj-$(CONFIG_SAMA5D2) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
-obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
-obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
+obj-$(CONFIG_SAMA5D3) += bootparams_atmel.o mpddrc.o spl_atmel.o
+obj-$(CONFIG_SAMA5D4) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o
 obj-y += spl.o
 endif
 

diff --git a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
index 0d83426ead11708b6f9c9516a00ae3f4957cf727..eddfdb0853662b3392432ccf0ce68cc4f074f08c 100644 (file)
--- a/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
+++ b/arch/arm/mach-at91/arm926ejs/at91sam9m10g45_devices.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <dm.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
@@ -165,3 +166,20 @@ void at91_mci_hw_init(void)
        at91_periph_clk_enable(ATMEL_ID_MCI0);
 }
 #endif
+
+/* Platform data for the GPIOs */
+static const struct at91_port_platdata at91sam9260_plat[] = {
+       { ATMEL_BASE_PIOA, "PA" },
+       { ATMEL_BASE_PIOB, "PB" },
+       { ATMEL_BASE_PIOC, "PC" },
+       { ATMEL_BASE_PIOD, "PD" },
+       { ATMEL_BASE_PIOE, "PE" },
+};
+
+U_BOOT_DEVICES(at91sam9260_gpios) = {
+       { "gpio_at91", &at91sam9260_plat[0] },
+       { "gpio_at91", &at91sam9260_plat[1] },
+       { "gpio_at91", &at91sam9260_plat[2] },
+       { "gpio_at91", &at91sam9260_plat[3] },
+       { "gpio_at91", &at91sam9260_plat[4] },
+};

diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 7684f09afcbb8fa649031077c702204855e5c61f..680ceb03145d6f8f0217d4ee52997f3dfd65b66c 100644 (file)
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -67,18 +67,18 @@ typedef struct at91_pmc {
 #define AT91_PMC_MOR_MOSCEN            0x01
 #define AT91_PMC_MOR_OSCBYPASS         0x02
 #define AT91_PMC_MOR_MOSCRCEN          0x08
-#define AT91_PMC_MOR_OSCOUNT(x)                ((x & 0xff) << 8)
-#define AT91_PMC_MOR_KEY(x)            ((x & 0xff) << 16)
+#define AT91_PMC_MOR_OSCOUNT(x)                (((x) & 0xff) << 8)
+#define AT91_PMC_MOR_KEY(x)            (((x) & 0xff) << 16)
 #define AT91_PMC_MOR_MOSCSEL           (1 << 24)
 
-#define AT91_PMC_PLLXR_DIV(x)          (x & 0xFF)
-#define AT91_PMC_PLLXR_PLLCOUNT(x)     ((x & 0x3F) << 8)
-#define AT91_PMC_PLLXR_OUT(x)          ((x & 0x03) << 14)
+#define AT91_PMC_PLLXR_DIV(x)          ((x) & 0xFF)
+#define AT91_PMC_PLLXR_PLLCOUNT(x)     (((x) & 0x3F) << 8)
+#define AT91_PMC_PLLXR_OUT(x)          (((x) & 0x03) << 14)
 #if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D3) || \
        defined(CONFIG_SAMA5D4)
-#define AT91_PMC_PLLXR_MUL(x)          ((x & 0x7F) << 18)
+#define AT91_PMC_PLLXR_MUL(x)          (((x) & 0x7F) << 18)
 #else
-#define AT91_PMC_PLLXR_MUL(x)          ((x & 0x7FF) << 16)
+#define AT91_PMC_PLLXR_MUL(x)          (((x) & 0x7FF) << 16)
 #endif
 #define AT91_PMC_PLLAR_29              0x20000000
 #define AT91_PMC_PLLBR_USBDIV_1                0x00000000
@@ -158,7 +158,7 @@ typedef struct at91_pmc {
 #define AT91_PMC_PCR_CMD_WRITE         (0x1 << 12)
 #define AT91_PMC_PCR_DIV               (0x3 << 16)
 #define AT91_PMC_PCR_GCKDIV            (0xff << 20)
-#define                AT91_PMC_PCR_GCKDIV_(x)         ((x & 0xff) << 20)
+#define                AT91_PMC_PCR_GCKDIV_(x)         (((x) & 0xff) << 20)
 #define                AT91_PMC_PCR_GCKDIV_OFFSET      20
 #define AT91_PMC_PCR_EN                        (0x1 << 28)
 #define AT91_PMC_PCR_GCKEN             (0x1 << 29)

diff --git a/arch/arm/mach-at91/include/mach/at91_rtc.h b/arch/arm/mach-at91/include/mach/at91_rtc.h
new file mode 100644 (file)
index 0000000..73070e3
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_rtc.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Real Time Clock (RTC) - System peripheral registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef AT91_RTC_H
+#define AT91_RTC_H
+
+/* Control Register */
+#define AT91_RTC_CR            (ATMEL_BASE_RTC + 0x00)
+#define AT91_RTC_UPDTIM                (1 <<  0)       /* Update Request Time */
+#define AT91_RTC_UPDCAL                (1 <<  1)       /* Update Request Calendar */
+#define AT91_RTC_TIMEVSEL      (3 <<  8)       /* Time Event Selection */
+#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8)
+#define AT91_RTC_TIMEVSEL_HOUR (1 << 8)
+#define AT91_RTC_TIMEVSEL_DAY24        (2 << 8)
+#define AT91_RTC_TIMEVSEL_DAY12        (3 << 8)
+#define AT91_RTC_CALEVSEL      (3 << 16)       /* Calendar Event Selection */
+#define AT91_RTC_CALEVSEL_WEEK (0 << 16)
+#define AT91_RTC_CALEVSEL_MONTH        (1 << 16)
+#define AT91_RTC_CALEVSEL_YEAR (2 << 16)
+
+#define AT91_RTC_MR            (ATMEL_BASE_RTC + 0x04) /* Mode Register */
+#define AT91_RTC_HRMOD         (1 <<  0)               /* 12/24 Hour Mode */
+
+#define AT91_RTC_TIMR          (ATMEL_BASE_RTC + 0x08) /* Time Register */
+#define AT91_RTC_SEC           (0x7f <<  0)            /* Current Second */
+#define AT91_RTC_MIN           (0x7f <<  8)            /* Current Minute */
+#define AT91_RTC_HOUR          (0x3f << 16)            /* Current Hour */
+#define AT91_RTC_AMPM          (1    << 22)            /* AM/PM */
+
+#define AT91_RTC_CALR          (ATMEL_BASE_RTC + 0x0c) /* Calendar Register */
+#define AT91_RTC_CENT          (0x7f <<  0)            /* Current Century */
+#define AT91_RTC_YEAR          (0xff <<  8)            /* Current Year */
+#define AT91_RTC_MONTH         (0x1f << 16)            /* Current Month */
+#define AT91_RTC_DAY           (7    << 21)            /* Current Day */
+#define AT91_RTC_DATE          (0x3f << 24)            /* Current Date */
+
+#define AT91_RTC_TIMALR                (ATMEL_BASE_RTC + 0x10) /* Time Alarm */
+#define AT91_RTC_SECEN         (1 <<  7)               /* Second Alarm Enab */
+#define AT91_RTC_MINEN         (1 << 15)               /* Minute Alarm Enab */
+#define AT91_RTC_HOUREN                (1 << 23)               /* Hour Alarm Enable */
+
+#define AT91_RTC_CALALR                (ATMEL_BASE_RTC + 0x14) /* Calendar Alarm */
+#define AT91_RTC_MTHEN         (1 << 23)               /* Month Alarm Enable */
+#define AT91_RTC_DATEEN                (1 << 31)               /* Date Alarm Enable */
+
+#define AT91_RTC_SR            (ATMEL_BASE_RTC + 0x18) /* Status Register */
+#define AT91_RTC_ACKUPD                (1 <<  0)               /* Ack for Update */
+#define AT91_RTC_ALARM         (1 <<  1)               /* Alarm Flag */
+#define AT91_RTC_SECEV         (1 <<  2)               /* Second Event */
+#define AT91_RTC_TIMEV         (1 <<  3)               /* Time Event */
+#define AT91_RTC_CALEV         (1 <<  4)               /* Calendar Event */
+
+#define AT91_RTC_SCCR          (ATMEL_BASE_RTC + 0x1c) /* Status Clear Cmd */
+#define AT91_RTC_IER           (ATMEL_BASE_RTC + 0x20) /* Interrupt Enable */
+#define AT91_RTC_IDR           (ATMEL_BASE_RTC + 0x24) /* Interrupt Disable */
+#define AT91_RTC_IMR           (ATMEL_BASE_RTC + 0x28) /* Interrupt Mask */
+
+#define AT91_RTC_VER           (ATMEL_BASE_RTC + 0x2c) /* Valid Entry */
+#define AT91_RTC_NVTIM         (1 <<  0)               /* Non-valid Time */
+#define AT91_RTC_NVCAL         (1 <<  1)               /* Non-valid Calendar */
+#define AT91_RTC_NVTIMALR      (1 <<  2)               /* .. Time Alarm */
+#define AT91_RTC_NVCALALR      (1 <<  3)               /* .. Calendar Alarm */
+
+#endif

diff --git a/arch/arm/mach-at91/include/mach/at91_sck.h b/arch/arm/mach-at91/include/mach/at91_sck.h
new file mode 100644 (file)
index 0000000..ce8e577
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/at91_sck.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2016 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef AT91_SCK_H
+#define AT91_SCK_H
+
+/*
+ * SCKCR flags
+ */
+#define AT91SAM9G45_SCKCR_RCEN     (1 << 0)    /* RC Oscillator Enable */
+#define AT91SAM9G45_SCKCR_OSC32EN   (1 << 1)   /* 32kHz Oscillator Enable */
+#define AT91SAM9G45_SCKCR_OSC32BYP  (1 << 2)   /* 32kHz Oscillator Bypass */
+#define AT91SAM9G45_SCKCR_OSCSEL    (1 << 3)   /* Slow Clock Selector */
+#define                AT91SAM9G45_SCKCR_OSCSEL_RC     (0 << 3)
+#define                AT91SAM9G45_SCKCR_OSCSEL_32     (1 << 3)
+
+#endif

diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45.h b/arch/arm/mach-at91/include/mach/at91sam9g45.h
index cf1c73f3d986219e3aa3fb3a212299fc0928a750..5c32e24ed0f24559f2cf66124752053b25fc1351 100644 (file)
--- a/arch/arm/mach-at91/include/mach/at91sam9g45.h
+++ b/arch/arm/mach-at91/include/mach/at91sam9g45.h
@@ -109,6 +109,7 @@
 #define ATMEL_BASE_RTT         0xfffffd20
 #define ATMEL_BASE_PIT         0xfffffd30
 #define ATMEL_BASE_WDT         0xfffffd40
+#define ATMEL_BASE_SCKCR       0xfffffd50
 #define ATMEL_BASE_GPBR                0xfffffd60
 #define ATMEL_BASE_RTC         0xfffffdb0
 /* Reserved:   0xfffffdc0 - 0xffffffff */

diff --git a/arch/arm/mach-at91/include/mach/sama5_boot.h b/arch/arm/mach-at91/include/mach/sama5_boot.h
new file mode 100644 (file)
index 0000000..8911a44
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama5_boot.h
@@ -0,0 +1,25 @@
+/*
+ * Boot mode definitions for the SAMA5Dx SoC
+ *
+ * Copyright (C) 2016 Marek Vasut <marex@denx.de>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __SAMA5_BOOT_H
+#define __SAMA5_BOOT_H
+
+/* Boot modes stored by BootROM in r4 */
+#define ATMEL_SAMA5_BOOT_FROM_OFF      0
+#define ATMEL_SAMA5_BOOT_FROM_MASK     0xf
+#define ATMEL_SAMA5_BOOT_FROM_SPI      (0 << 0)
+#define ATMEL_SAMA5_BOOT_FROM_MCI      (1 << 0)
+#define ATMEL_SAMA5_BOOT_FROM_SMC      (2 << 0)
+#define ATMEL_SAMA5_BOOT_FROM_TWI      (3 << 0)
+#define ATMEL_SAMA5_BOOT_FROM_QSPI     (4 << 0)
+#define ATMEL_SAMA5_BOOT_FROM_SAMBA    (7 << 0)
+
+#define ATMEL_SAMA5_BOOT_DEV_ID_OFF    4
+#define ATMEL_SAMA5_BOOT_DEV_ID_MASK   0xf
+
+#endif /* __SAMA5_BOOT_H */

diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h
index ee841da971a527d90915783db969a7b3ee49e2ef..25c85411e5a1e3c7ce3ee9dc6def14d3b1358f9e 100644 (file)
--- a/arch/arm/mach-at91/include/mach/sama5d2.h
+++ b/arch/arm/mach-at91/include/mach/sama5d2.h
@@ -230,18 +230,6 @@
 /* No PMECC Galois table in ROM */
 #define NO_GALOIS_TABLE_IN_ROM
 
-/* Boot modes stored by BootROM in r4 */
-#define ATMEL_SAMA5D2_BOOT_FROM_OFF    0
-#define ATMEL_SAMA5D2_BOOT_FROM_MASK   0xf
-#define ATMEL_SAMA5D2_BOOT_FROM_SPI    (0 << 0)
-#define ATMEL_SAMA5D2_BOOT_FROM_MCI    (1 << 0)
-#define ATMEL_SAMA5D2_BOOT_FROM_SMC    (2 << 0)
-#define ATMEL_SAMA5D2_BOOT_FROM_TWI    (3 << 0)
-#define ATMEL_SAMA5D2_BOOT_FROM_QSPI   (4 << 0)
-
-#define ATMEL_SAMA5D2_BOOT_DEV_ID_OFF  4
-#define ATMEL_SAMA5D2_BOOT_DEV_ID_MASK 0xf
-
 #ifndef __ASSEMBLY__
 unsigned int get_chip_id(void);
 unsigned int get_extension_chip_id(void);

diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c
index c4ed224d03dffa9ef0f19172cba33ca6fea9e496..f255b59195e6da69e704192d65308143fd637b2b 100644 (file)
--- a/arch/arm/mach-at91/spl.c
+++ b/arch/arm/mach-at91/spl.c
@@ -23,20 +23,22 @@ void at91_disable_wdt(void)
 }
 #endif
 
-#if defined(CONFIG_SAMA5D2)
+#if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D3) || \
+    defined(CONFIG_SAMA5D4)
+#include <asm/arch/sama5_boot.h>
 struct {
        u32     r4;
 } bootrom_stash __attribute__((section(".data")));
 
 u32 spl_boot_device(void)
 {
-       u32 dev = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_FROM_OFF) &
-                 ATMEL_SAMA5D2_BOOT_FROM_MASK;
-       u32 off = (bootrom_stash.r4 >> ATMEL_SAMA5D2_BOOT_DEV_ID_OFF) &
-                 ATMEL_SAMA5D2_BOOT_DEV_ID_MASK;
+       u32 dev = (bootrom_stash.r4 >> ATMEL_SAMA5_BOOT_FROM_OFF) &
+                 ATMEL_SAMA5_BOOT_FROM_MASK;
+       u32 off = (bootrom_stash.r4 >> ATMEL_SAMA5_BOOT_DEV_ID_OFF) &
+                 ATMEL_SAMA5_BOOT_DEV_ID_MASK;
 
 #if defined(CONFIG_SYS_USE_MMC)
-       if (dev == ATMEL_SAMA5D2_BOOT_FROM_MCI) {
+       if (dev == ATMEL_SAMA5_BOOT_FROM_MCI) {
                if (off == 0)
                        return BOOT_DEVICE_MMC1;
                if (off == 1)
@@ -47,10 +49,13 @@ u32 spl_boot_device(void)
 #endif
 
 #if defined(CONFIG_SYS_USE_SERIALFLASH) || defined(CONFIG_SYS_USE_SPIFLASH)
-       if (dev == ATMEL_SAMA5D2_BOOT_FROM_SPI)
+       if (dev == ATMEL_SAMA5_BOOT_FROM_SPI)
                return BOOT_DEVICE_SPI;
 #endif
 
+       if (dev == ATMEL_SAMA5_BOOT_FROM_SAMBA)
+               return BOOT_DEVICE_USB;
+
        printf("ERROR: SMC/TWI/QSPI boot device not supported!\n"
               "       Boot device %i, controller number %i\n", dev, off);
 

diff --git a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
index 64412e0ecce009ce19e13d7009f33bd49968e106..5971ad256b8b055db4bead72cb088c97dce8dcba 100644 (file)
--- a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
+++ b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c
@@ -21,11 +21,11 @@ void uniphier_smp_kick_all_cpus(void)
        rom_boot_rsv0 = map_sysmem(UNIPHIER_SMPCTRL_ROM_RSV0, SZ_8);
 
        writeq((u64)uniphier_secondary_startup, rom_boot_rsv0);
-       readq(rom_boot_rsv0);   /* relax */
 
        unmap_sysmem(rom_boot_rsv0);
 
        uniphier_smp_setup();
 
-       asm("sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */
+       asm("dsb        ishst\n" /* Ensure the write to ROM_RSV0 is visible */
+           "sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */
 }

diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 845f047b027da675425f70f1d7bf548b28e2e549..a45412677a0ffcfad93ca01f7a6ee222471f90ce 100644 (file)
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -39,6 +39,9 @@ static int uniphier_set_fdt_file(void)
        int buf_len = 256;
        int ret;
 
+       if (getenv("fdt_file"))
+               return 0;       /* do nothing if it is already set */
+
        ret = fdt_get_string(gd->fdt_blob, 0, "compatible", &compat);
        if (ret)
                return -EINVAL;
@@ -56,9 +59,7 @@ static int uniphier_set_fdt_file(void)
 
        strncat(dtb_name, ".dtb", buf_len);
 
-       setenv("fdt_file", dtb_name);
-
-       return 0;
+       return setenv("fdt_file", dtb_name);
 }
 
 int board_late_init(void)

diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile
index d7fefc5bbd0d6af8e7df8e3f00247fcafb7c749d..a8980210b1cbb3082161333e16ef8fefb1d94cca 100644 (file)
--- a/arch/arm/mach-uniphier/boot-mode/Makefile
+++ b/arch/arm/mach-uniphier/boot-mode/Makefile
@@ -14,4 +14,8 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B)      += boot-mode-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD11)       += boot-mode-ld20.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD20)       += boot-mode-ld20.o
 
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE)     += spl_board.o
+else
 obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o
+endif

diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
index 96a127082c6abf118482aa92195018b944d22f21..24255a0f5081ccf2b65d4e17200a9f5e92bdeb3e 100644 (file)
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
@@ -9,6 +9,7 @@
 #include <linux/io.h>
 
 #include "../sg-regs.h"
+#include "../soc-info.h"
 #include "boot-device.h"
 
 static struct boot_device_info boot_device_table[] = {
@@ -54,8 +55,24 @@ static int get_boot_mode_sel(void)
 u32 uniphier_ld20_boot_device(void)
 {
        int boot_mode;
+       u32 usb_boot_mask;
 
-       if (~readl(SG_PINMON0) & 0x00000780)
+       switch (uniphier_get_soc_type()) {
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+       case SOC_UNIPHIER_LD11:
+               usb_boot_mask = 0x00000080;
+               break;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+       case SOC_UNIPHIER_LD20:
+               usb_boot_mask = 0x00000780;
+               break;
+#endif
+       default:
+               BUG();
+       }
+
+       if (~readl(SG_PINMON0) & usb_boot_mask)
                return BOOT_DEVICE_USB;
 
        boot_mode = get_boot_mode_sel();

diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index 4b744da2529af728733b90da39028ff8d046cda1..d34b9af9a18700b4d4dcfc643d442bb9c5867bc8 100644 (file)
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -51,11 +51,30 @@ u32 spl_boot_device_raw(void)
 
 u32 spl_boot_device(void)
 {
-       u32 ret;
+       u32 mode;
 
-       ret = spl_boot_device_raw();
+       mode = spl_boot_device_raw();
 
-       return ret == BOOT_DEVICE_USB ? BOOT_DEVICE_NOR : ret;
+       switch (uniphier_get_soc_type()) {
+#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
+       case SOC_UNIPHIER_PXS2:
+       case SOC_UNIPHIER_LD6B:
+               if (mode == BOOT_DEVICE_USB)
+                       mode = BOOT_DEVICE_NOR;
+               break;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
+       case SOC_UNIPHIER_LD11:
+       case SOC_UNIPHIER_LD20:
+               if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB)
+                       mode = BOOT_DEVICE_BOARD;
+               break;
+#endif
+       default:
+               break;
+       }
+
+       return mode;
 }
 
 u32 spl_boot_mode(void)

diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c
new file mode 100644 (file)
index 0000000..86292b6
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/spl_board.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <asm/processor.h>
+
+#include "../soc-info.h"
+
+void spl_board_announce_boot_device(void)
+{
+       printf("eMMC");
+}
+
+struct uniphier_romfunc_table {
+       void *mmc_send_cmd;
+       void *mmc_card_blockaddr;
+       void *mmc_switch_part;
+       void *mmc_load_image;
+};
+
+static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = {
+       .mmc_send_cmd = (void *)0x20d8,
+       .mmc_card_blockaddr = (void *)0x1b68,
+       .mmc_switch_part = (void *)0x1c38,
+       .mmc_load_image = (void *)0x2e48,
+};
+
+static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = {
+       .mmc_send_cmd = (void *)0x2130,
+       .mmc_card_blockaddr = (void *)0x1ba0,
+       .mmc_switch_part = (void *)0x1c70,
+       .mmc_load_image = (void *)0x2ef0,
+};
+
+int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32),
+                                int (**card_blockaddr)(u32),
+                                int (**switch_part)(int),
+                                int (**load_image)(u32, uintptr_t, u32))
+{
+       const struct uniphier_romfunc_table *table;
+
+       switch (uniphier_get_soc_type()) {
+       case SOC_UNIPHIER_LD11:
+               table = &uniphier_ld11_romfunc_table;
+               break;
+       case SOC_UNIPHIER_LD20:
+               table = &uniphier_ld20_romfunc_table;
+               break;
+       default:
+               printf("unsupported SoC\n");
+               return -EINVAL;
+       }
+
+       *send_cmd = table->mmc_send_cmd;
+       *card_blockaddr = table->mmc_card_blockaddr;
+       *switch_part = table->mmc_switch_part;
+       *load_image = table->mmc_load_image;
+
+       return 0;
+}
+
+int spl_board_load_image(void)
+{
+       int (*send_cmd)(u32 cmd, u32 arg);
+       int (*card_blockaddr)(u32 rca);
+       int (*switch_part)(int part);
+       int (*load_image)(u32 dev_addr, uintptr_t load_addr, u32 block_cnt);
+       u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
+       const u32 rca = 0x1000; /* RCA assigned by Boot ROM */
+       int ret;
+
+       ret = uniphier_rom_get_mmc_funcptr(&send_cmd, &card_blockaddr,
+                                          &switch_part, &load_image);
+       if (ret)
+               return ret;
+
+       /*
+        * deselect card before SEND_CSD command.
+        * Do not check the return code.  It fails, but it is OK.
+        */
+       (*send_cmd)(0x071a0000, 0); /* CMD7 (arg=0) */
+
+       /* reset CMD Line */
+       writeb(0x6, 0x5a00022f);
+       while (readb(0x5a00022f))
+               cpu_relax();
+
+       ret = (*card_blockaddr)(rca);
+       if (ret) {
+               debug("card is block addressing\n");
+       } else {
+               debug("card is byte addressing\n");
+               dev_addr *= 512;
+       }
+
+       ret = (*send_cmd)(0x071a0000, rca << 16); /* CMD7: select card again */
+       if (ret)
+               printf("failed to select card\n");
+
+       ret = (*switch_part)(1); /* Switch to Boot Partition 1 */
+       if (ret)
+               printf("failed to switch partition\n");
+
+       ret = (*load_image)(dev_addr, CONFIG_SYS_TEXT_BASE, 1);
+       if (ret) {
+               printf("failed to load image\n");
+               return ret;
+       }
+
+       ret = spl_parse_image_header((void *)CONFIG_SYS_TEXT_BASE);
+       if (ret)
+               return ret;
+
+       ret = (*load_image)(dev_addr, spl_image.load_addr,
+                           spl_image.size / 512);
+       if (ret) {
+               printf("failed to load image\n");
+               return ret;
+       }
+
+       return 0;
+}

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5c30ae981dfdd871817316637862da326ef38fbc..21066f0fda69c1649cf981b52e2ae53c13a982d1 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -253,7 +253,7 @@ config SYS_DCACHE_SIZE
          The total size of the L1 Dcache, if known at compile time.
 
 config SYS_DCACHE_LINE_SIZE
-       hex
+       int
        default 0
        help
          The size of L1 Dcache lines, if known at compile time.

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 5f520c069f6205ea977ea96c383933455ea0dc89..db81953f86c5486bd1730fed99ac72a5b52f7401 100644 (file)
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -91,5 +91,5 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
        if (start_addr == stop)
                return;
 
-       cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_I);
+       cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D);
 }

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index e522ff3b7f651cb8f8dcbc7d02983b255674dad3..269043dedc13c976fd77f2fb9e6ee0cbbe9f1687 100644 (file)
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -24,6 +24,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
+#include <syscon.h>
 #include <asm/control_regs.h>
 #include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
@@ -751,6 +752,10 @@ int cpu_init_r(void)
        uclass_first_device(UCLASS_PCH, &dev);
        uclass_first_device(UCLASS_LPC, &dev);
 
+       /* Set up pin control if available */
+       ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
+       debug("%s, pinctrl=%p, ret=%d\n", __func__, dev, ret);
+
        return 0;
 }
 

diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
index 4a50d8665e59cce41509450fd38a7b6660ef18be..c8907ce44bcdcf7296db77ac7eb021441bf8997d 100644 (file)
--- a/arch/x86/dts/bayleybay.dts
+++ b/arch/x86/dts/bayleybay.dts
@@ -65,6 +65,26 @@
                };
        };
 
+       pch_pinctrl {
+               compatible = "intel,x86-pinctrl";
+               reg = <0 0>;
+
+               /*
+                * As of today, the latest version FSP (gold4) for BayTrail
+                * misses the PAD configuration of the SD controller's Card
+                * Detect signal. The default PAD value for the CD pin sets
+                * the pin to work in GPIO mode, which causes card detect
+                * status cannot be reflected by the Present State register
+                * in the SD controller (bit 16 & bit 18 are always zero).
+                *
+                * Configure this pin to function 1 (SD controller).
+                */
+               sdmmc3_cd@0 {
+                       pad-offset = <0x3a0>;
+                       mode-func = <1>;
+               };
+       };
+
        pci {
                compatible = "pci-x86";
                #address-cells = <3>;
@@ -213,7 +233,7 @@
                fsp,mrc-init-mmio-size = <0x800>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <2>;
+               fsp,emmc-boot-mode = <1>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;

diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
index 1a4ecaad0e917d2ac3ec038f227a6cf282128e4a..fba089d6668a98eabdb02565b498860168850a12 100644 (file)
--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
@@ -30,6 +30,22 @@
 
        pch_pinctrl {
                compatible = "intel,x86-pinctrl";
+               reg = <0 0>;
+
+               /*
+                * As of today, the latest version FSP (gold4) for BayTrail
+                * misses the PAD configuration of the SD controller's Card
+                * Detect signal. The default PAD value for the CD pin sets
+                * the pin to work in GPIO mode, which causes card detect
+                * status cannot be reflected by the Present State register
+                * in the SD controller (bit 16 & bit 18 are always zero).
+                *
+                * Configure this pin to function 1 (SD controller).
+                */
+               sdmmc3_cd@0 {
+                       pad-offset = <0x3a0>;
+                       mode-func = <1>;
+               };
        };
 
        chosen {
@@ -217,7 +233,7 @@
                fsp,mrc-init-mmio-size = <0x800>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <2>;
+               fsp,emmc-boot-mode = <1>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 936455b5e55ada3aff85dfd0b61dbf6ebd4fe3b9..1a8a8cc7f1bb6c355922530fb81ddf88d6ea10b3 100644 (file)
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -29,6 +29,7 @@
 
        pch_pinctrl {
                compatible = "intel,x86-pinctrl";
+               reg = <0 0>;
 
                /* GPIO E0 */
                soc_gpio_s5_0@0 {
@@ -72,6 +73,21 @@
                        output-value = <1>;
                        direction = <PIN_OUTPUT>;
                };
+
+               /*
+                * As of today, the latest version FSP (gold4) for BayTrail
+                * misses the PAD configuration of the SD controller's Card
+                * Detect signal. The default PAD value for the CD pin sets
+                * the pin to work in GPIO mode, which causes card detect
+                * status cannot be reflected by the Present State register
+                * in the SD controller (bit 16 & bit 18 are always zero).
+                *
+                * Configure this pin to function 1 (SD controller).
+                */
+               sdmmc3_cd@0 {
+                       pad-offset = <0x3a0>;
+                       mode-func = <1>;
+               };
        };
 
        chosen {
@@ -246,7 +262,7 @@
                fsp,mrc-init-mmio-size = <0x800>;
                fsp,mrc-init-spd-addr1 = <0xa0>;
                fsp,mrc-init-spd-addr2 = <0xa2>;
-               fsp,emmc-boot-mode = <2>;
+               fsp,emmc-boot-mode = <1>;
                fsp,enable-sdio;
                fsp,enable-sdcard;
                fsp,enable-hsuart1;

diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index ffb4678e510b38e9249db3209bf0dd8666155613..bb71286dba88a80325e3d5a06fff540a36a3d7c9 100644 (file)
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -183,20 +183,20 @@ static int acpi_create_madt_lapic(struct acpi_madt_lapic *lapic,
 int acpi_create_madt_lapics(u32 current)
 {
        struct udevice *dev;
-       int length = 0;
+       int total_length = 0;
 
        for (uclass_find_first_device(UCLASS_CPU, &dev);
             dev;
             uclass_find_next_device(&dev)) {
                struct cpu_platdata *plat = dev_get_parent_platdata(dev);
-
-               length += acpi_create_madt_lapic(
-                       (struct acpi_madt_lapic *)current,
-                       plat->cpu_id, plat->cpu_id);
+               int length = acpi_create_madt_lapic(
+                               (struct acpi_madt_lapic *)current,
+                               plat->cpu_id, plat->cpu_id);
                current += length;
+               total_length += length;
        }
 
-       return length;
+       return total_length;
 }
 
 int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,

diff --git a/board/bluewater/gurnard/Kconfig b/board/bluewater/gurnard/Kconfig
new file mode 100644 (file)
index 0000000..e2cd9f0
--- /dev/null
+++ b/board/bluewater/gurnard/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_GURNARD
+
+config SYS_BOARD
+       default "gurnard"
+
+config SYS_VENDOR
+       default "bluewater"
+
+config SYS_CONFIG_NAME
+       default "snapper9g45"
+
+endif

diff --git a/board/bluewater/gurnard/MAINTAINERS b/board/bluewater/gurnard/MAINTAINERS
new file mode 100644 (file)
index 0000000..5e546d4
--- /dev/null
+++ b/board/bluewater/gurnard/MAINTAINERS
@@ -0,0 +1,6 @@
+GURNARD BOARD
+M:     Simon Glass <sjg@chromium.org>
+S:     Maintained
+F:     board/bluewater/gurnard/
+F:     include/configs/snapper9g45.h
+F:     configs/gurnard_defconfig

diff --git a/board/bluewater/gurnard/Makefile b/board/bluewater/gurnard/Makefile
new file mode 100644 (file)
index 0000000..f646d35
--- /dev/null
+++ b/board/bluewater/gurnard/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2003-2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2011 Bluewater Systems
+# Ryan Mallon <ryan@bluewatersys.com>
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  += gurnard.o

diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c
new file mode 100644 (file)
index 0000000..2a36d29
--- /dev/null
+++ b/board/bluewater/gurnard/gurnard.c
@@ -0,0 +1,449 @@
+/*
+ * Bluewater Systems Snapper 9260/9G20 modules
+ *
+ * (C) Copyright 2011 Bluewater Systems
+ *   Author: Andre Renaud <andre@bluewatersys.com>
+ *   Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <atmel_lcd.h>
+#include <atmel_lcdc.h>
+#include <atmel_mci.h>
+#include <dm.h>
+#include <lcd.h>
+#include <net.h>
+#ifndef CONFIG_DM_ETH
+#include <netdev.h>
+#endif
+#include <spi.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/arch/at91sam9g45_matrix.h>
+#include <asm/arch/at91sam9_smc.h>
+#include <asm/arch/at91_common.h>
+#include <asm/arch/at91_emac.h>
+#include <asm/arch/at91_rstc.h>
+#include <asm/arch/at91_rtc.h>
+#include <asm/arch/at91_sck.h>
+#include <asm/arch/atmel_serial.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/gpio.h>
+#include <dm/uclass-internal.h>
+
+#ifdef CONFIG_GURNARD_SPLASH
+#include "splash_logo.h"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* IO Expander pins */
+#define IO_EXP_ETH_RESET       (0 << 1)
+#define IO_EXP_ETH_POWER       (1 << 1)
+
+#ifdef CONFIG_MACB
+static void gurnard_macb_hw_init(void)
+{
+       struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
+
+       at91_periph_clk_enable(ATMEL_ID_EMAC);
+
+       /*
+        * Enable pull-up on:
+        *      RXDV (PA12) => MODE0 - PHY also has pull-up
+        *      ERX0 (PA13) => MODE1 - PHY also has pull-up
+        *      ERX1 (PA15) => MODE2 - PHY also has pull-up
+        */
+       writel(pin_to_mask(AT91_PIN_PA15) |
+              pin_to_mask(AT91_PIN_PA12) |
+              pin_to_mask(AT91_PIN_PA13),
+              &pioa->puer);
+
+       at91_phy_reset();
+
+       at91_macb_hw_init();
+}
+#endif
+
+#ifdef CONFIG_CMD_NAND
+static int gurnard_nand_hw_init(void)
+{
+       struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+       struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+       ulong flags;
+       int ret;
+
+       /* Enable CS3 as NAND/SmartMedia */
+       setbits_le32(&matrix->ebicsa, AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+
+       /* Configure SMC CS3 for NAND/SmartMedia */
+       writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
+              AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
+              &smc->cs[3].setup);
+       writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
+              AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
+              &smc->cs[3].pulse);
+       writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
+              &smc->cs[3].cycle);
+#ifdef CONFIG_SYS_NAND_DBW_16
+       flags = AT91_SMC_MODE_DBW_16;
+#else
+       flags = AT91_SMC_MODE_DBW_8;
+#endif
+       writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+              AT91_SMC_MODE_EXNW_DISABLE |
+              flags |
+              AT91_SMC_MODE_TDF_CYCLE(3),
+              &smc->cs[3].mode);
+
+       ret = gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand_rdy");
+       if (ret)
+               return ret;
+       gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
+
+       /* Enable NandFlash */
+       ret = gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand_ce");
+       if (ret)
+               return ret;
+       gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_GURNARD_SPLASH
+static void lcd_splash(int width, int height)
+{
+       u16 colour;
+       int x, y;
+       u16 *base_addr = (u16 *)gd->video_bottom;
+
+       memset(base_addr, 0xff, width * height * 2);
+       /*
+        * Blit the logo to the center of the screen
+        */
+       for (y = 0; y < BMP_LOGO_HEIGHT; y++) {
+               for (x = 0; x < BMP_LOGO_WIDTH; x++) {
+                       int posx, posy;
+                       colour = bmp_logo_palette[bmp_logo_bitmap[
+                           y * BMP_LOGO_WIDTH + x]];
+                       posx = x + (width - BMP_LOGO_WIDTH) / 2;
+                       posy = y;
+                       base_addr[posy * width + posx] = colour;
+               }
+       }
+}
+#endif
+
+#ifdef CONFIG_DM_VIDEO
+static void at91sam9g45_lcd_hw_init(void)
+{
+       at91_set_A_periph(AT91_PIN_PE0, 0);     /* LCDDPWR */
+       at91_set_A_periph(AT91_PIN_PE2, 0);     /* LCDCC */
+       at91_set_A_periph(AT91_PIN_PE3, 0);     /* LCDVSYNC */
+       at91_set_A_periph(AT91_PIN_PE4, 0);     /* LCDHSYNC */
+       at91_set_A_periph(AT91_PIN_PE5, 0);     /* LCDDOTCK */
+
+       at91_set_A_periph(AT91_PIN_PE7, 0);     /* LCDD0 */
+       at91_set_A_periph(AT91_PIN_PE8, 0);     /* LCDD1 */
+       at91_set_A_periph(AT91_PIN_PE9, 0);     /* LCDD2 */
+       at91_set_A_periph(AT91_PIN_PE10, 0);    /* LCDD3 */
+       at91_set_A_periph(AT91_PIN_PE11, 0);    /* LCDD4 */
+       at91_set_A_periph(AT91_PIN_PE12, 0);    /* LCDD5 */
+       at91_set_A_periph(AT91_PIN_PE13, 0);    /* LCDD6 */
+       at91_set_A_periph(AT91_PIN_PE14, 0);    /* LCDD7 */
+       at91_set_A_periph(AT91_PIN_PE15, 0);    /* LCDD8 */
+       at91_set_A_periph(AT91_PIN_PE16, 0);    /* LCDD9 */
+       at91_set_A_periph(AT91_PIN_PE17, 0);    /* LCDD10 */
+       at91_set_A_periph(AT91_PIN_PE18, 0);    /* LCDD11 */
+       at91_set_A_periph(AT91_PIN_PE19, 0);    /* LCDD12 */
+       at91_set_B_periph(AT91_PIN_PE20, 0);    /* LCDD13 */
+       at91_set_A_periph(AT91_PIN_PE21, 0);    /* LCDD14 */
+       at91_set_A_periph(AT91_PIN_PE22, 0);    /* LCDD15 */
+       at91_set_A_periph(AT91_PIN_PE23, 0);    /* LCDD16 */
+       at91_set_A_periph(AT91_PIN_PE24, 0);    /* LCDD17 */
+       at91_set_A_periph(AT91_PIN_PE25, 0);    /* LCDD18 */
+       at91_set_A_periph(AT91_PIN_PE26, 0);    /* LCDD19 */
+       at91_set_A_periph(AT91_PIN_PE27, 0);    /* LCDD20 */
+       at91_set_B_periph(AT91_PIN_PE28, 0);    /* LCDD21 */
+       at91_set_A_periph(AT91_PIN_PE29, 0);    /* LCDD22 */
+       at91_set_A_periph(AT91_PIN_PE30, 0);    /* LCDD23 */
+
+       at91_periph_clk_enable(ATMEL_ID_LCDC);
+}
+#endif
+
+#ifdef CONFIG_GURNARD_FPGA
+/**
+ * Initialise the memory bus settings so that we can talk to the
+ * memory mapped FPGA
+ */
+static int fpga_hw_init(void)
+{
+       struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
+       struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
+       int i;
+
+       setbits_le32(&matrix->ebicsa, AT91_MATRIX_EBI_CS1A_SDRAMC);
+
+       at91_set_a_periph(2, 4, 0); /* EBIA21 */
+       at91_set_a_periph(2, 5, 0); /* EBIA22 */
+       at91_set_a_periph(2, 6, 0); /* EBIA23 */
+       at91_set_a_periph(2, 7, 0); /* EBIA24 */
+       at91_set_a_periph(2, 12, 0); /* EBIA25 */
+       for (i = 15; i <= 31; i++) /* EBINWAIT & EBID16 - 31 */
+               at91_set_a_periph(2, i, 0);
+
+       /* configure SMC cs0 for FPGA access timing */
+       writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(2) |
+              AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(2),
+              &smc->cs[0].setup);
+       writel(AT91_SMC_PULSE_NWE(5) | AT91_SMC_PULSE_NCS_WR(4) |
+              AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(4),
+              &smc->cs[0].pulse);
+       writel(AT91_SMC_CYCLE_NWE(6) | AT91_SMC_CYCLE_NRD(6),
+              &smc->cs[0].cycle);
+       writel(AT91_SMC_MODE_BAT |
+              AT91_SMC_MODE_EXNW_DISABLE |
+              AT91_SMC_MODE_DBW_32 |
+              AT91_SMC_MODE_TDF |
+              AT91_SMC_MODE_TDF_CYCLE(2),
+              &smc->cs[0].mode);
+
+       /* Do a write to within EBI_CS1 to enable the SDCK */
+       writel(0, ATMEL_BASE_CS1);
+
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_CMD_USB
+
+#define USB0_ENABLE_PIN                AT91_PIN_PB22
+#define USB1_ENABLE_PIN                AT91_PIN_PB23
+
+void gurnard_usb_init(void)
+{
+       at91_set_gpio_output(USB0_ENABLE_PIN, 1);
+       at91_set_gpio_value(USB0_ENABLE_PIN, 0);
+       at91_set_gpio_output(USB1_ENABLE_PIN, 1);
+       at91_set_gpio_value(USB1_ENABLE_PIN, 0);
+}
+#endif
+
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+int cpu_mmc_init(bd_t *bis)
+{
+       return atmel_mci_init((void *)ATMEL_BASE_MCI0);
+}
+#endif
+
+static void gurnard_enable_console(int enable)
+{
+       at91_set_gpio_output(AT91_PIN_PB14, 1);
+       at91_set_gpio_value(AT91_PIN_PB14, enable ? 0 : 1);
+}
+
+void at91sam9g45_slowclock_init(void)
+{
+       /*
+        * On AT91SAM9G45 revC CPUs, the slow clock can be based on an
+        * internal impreciseRC oscillator or an external 32kHz oscillator.
+        * Switch to the latter.
+        */
+       unsigned i, tmp;
+       ulong *reg = (ulong *)ATMEL_BASE_SCKCR;
+
+       tmp = readl(reg);
+       if ((tmp & AT91SAM9G45_SCKCR_OSCSEL) == AT91SAM9G45_SCKCR_OSCSEL_RC) {
+               timer_init();
+               tmp |= AT91SAM9G45_SCKCR_OSC32EN;
+               writel(tmp, reg);
+               for (i = 0; i < 1200; i++)
+                       udelay(1000);
+               tmp |= AT91SAM9G45_SCKCR_OSCSEL_32;
+               writel(tmp, reg);
+               udelay(200);
+               tmp &= ~AT91SAM9G45_SCKCR_RCEN;
+               writel(tmp, reg);
+       }
+}
+
+int board_early_init_f(void)
+{
+       at91_seriald_hw_init();
+       gurnard_enable_console(1);
+
+       return 0;
+}
+
+int board_init(void)
+{
+       const char *rev_str;
+#ifdef CONFIG_CMD_NAND
+       int ret;
+#endif
+
+       at91_periph_clk_enable(ATMEL_ID_PIOA);
+       at91_periph_clk_enable(ATMEL_ID_PIOB);
+       at91_periph_clk_enable(ATMEL_ID_PIOC);
+       at91_periph_clk_enable(ATMEL_ID_PIODE);
+
+       at91sam9g45_slowclock_init();
+
+       /*
+        * Clear the RTC IDR to disable all IRQs. Avoid issues when Linux
+        * boots with spurious IRQs.
+        */
+       writel(0xffffffff, AT91_RTC_IDR);
+
+       /* Make sure that the reset signal is attached properly */
+       setbits_le32(AT91_ASM_RSTC_MR, AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN);
+
+       gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
+
+       /* Address of boot parameters */
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+#ifdef CONFIG_CMD_NAND
+       ret = gurnard_nand_hw_init();
+       if (ret)
+               return ret;
+#endif
+#ifdef CONFIG_ATMEL_SPI
+       at91_spi0_hw_init(1 << 4);
+#endif
+
+#ifdef CONFIG_MACB
+       gurnard_macb_hw_init();
+#endif
+
+#ifdef CONFIG_GURNARD_FPGA
+       fpga_hw_init();
+#endif
+
+#ifdef CONFIG_CMD_USB
+       gurnard_usb_init();
+#endif
+
+#ifdef CONFIG_CMD_MMC
+       at91_set_A_periph(AT91_PIN_PA12, 0);
+       at91_set_gpio_output(AT91_PIN_PA8, 1);
+       at91_set_gpio_value(AT91_PIN_PA8, 0);
+       at91_mci_hw_init();
+#endif
+
+#ifdef CONFIG_DM_VIDEO
+       at91sam9g45_lcd_hw_init();
+       at91_set_A_periph(AT91_PIN_PE6, 1);     /* power up */
+
+       /* Select the second timing index for board rev 2 */
+       rev_str = getenv("board_rev");
+       if (rev_str && !strncmp(rev_str, "2", 1)) {
+               struct udevice *dev;
+
+               uclass_find_first_device(UCLASS_VIDEO, &dev);
+               if (dev) {
+                       struct atmel_lcd_platdata *plat = dev_get_platdata(dev);
+
+                       plat->timing_index = 1;
+               }
+       }
+#endif
+
+       return 0;
+}
+
+int board_late_init(void)
+{
+       u_int8_t env_enetaddr[8];
+       char *env_str;
+       char *end;
+       int i;
+
+       /*
+        * Set MAC address so we do not need to init Ethernet before Linux
+        * boot
+        */
+       env_str = getenv("ethaddr");
+       if (env_str) {
+               struct at91_emac *emac = (struct at91_emac *)ATMEL_BASE_EMAC;
+               /* Parse MAC address */
+               for (i = 0; i < 6; i++) {
+                       env_enetaddr[i] = env_str ?
+                               simple_strtoul(env_str, &end, 16) : 0;
+                       if (env_str)
+                               env_str = (*end) ? end+1 : end;
+               }
+
+               /* Set hardware address */
+               writel(env_enetaddr[0] | env_enetaddr[1] << 8 |
+                      env_enetaddr[2] << 16 | env_enetaddr[3] << 24,
+                      &emac->sa2l);
+               writel((env_enetaddr[4] | env_enetaddr[5] << 8), &emac->sa2h);
+
+               printf("MAC:   %s\n", getenv("ethaddr"));
+       } else {
+               /* Not set in environment */
+               printf("MAC:   not set\n");
+       }
+#ifdef CONFIG_GURNARD_SPLASH
+       lcd_splash(480, 272);
+#endif
+
+       return 0;
+}
+
+#ifndef CONFIG_DM_ETH
+int board_eth_init(bd_t *bis)
+{
+       return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0);
+}
+#endif
+
+int dram_init(void)
+{
+       gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+                                   CONFIG_SYS_SDRAM_SIZE);
+       return 0;
+}
+
+void reset_phy(void)
+{
+}
+
+/* This breaks the Ethernet MAC at present */
+void enable_caches(void)
+{
+       dcache_enable();
+}
+
+/* SPI chip select control - only used for FPGA programming */
+#ifdef CONFIG_ATMEL_SPI
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+       return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+       /* We don't use chipselects for FPGA programming */
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+       /* We don't use chipselects for FPGA programming */
+}
+#endif /* CONFIG_ATMEL_SPI */
+
+static struct atmel_serial_platdata at91sam9260_serial_plat = {
+       .base_addr = ATMEL_BASE_DBGU,
+};
+
+U_BOOT_DEVICE(at91sam9260_serial) = {
+       .name   = "serial_atmel",
+       .platdata = &at91sam9260_serial_plat,
+};

diff --git a/board/bluewater/gurnard/splash_logo.h b/board/bluewater/gurnard/splash_logo.h
new file mode 100644 (file)
index 0000000..fb87dea
--- /dev/null
+++ b/board/bluewater/gurnard/splash_logo.h
@@ -0,0 +1,2619 @@
+/* generated by ppm_logo (c) 2004 by Andre Renaud from logo_gurnard_small.ppm*/
+#ifndef __BMP_LOGO_H__
+#define __BMP_LOGO_H__
+#define BMP_LOGO_WIDTH 187
+#define BMP_LOGO_HEIGHT 139
+#define BMP_LOGO_COLORS 255
+#define BMP_LOGO_OFFSET 50
+
+unsigned short bmp_logo_palette[] = {
+       0xb61a, 0x9d78, 0xdefc, 0xffff, 0x7455, 0x32b1, 0xb5fa, 0xe75e,
+       0xffdf, 0xc65b, 0x9538, 0xd6dc, 0xce9b, 0xf7df, 0xadb9, 0x84d7,
+       0xffff, 0xffff, 0xffdf, 0x5bb4, 0x4b11, 0x3ad1, 0xf7bf, 0xf7bf,
+       0xffff, 0xffff, 0xf79e, 0xef9e, 0x6c35, 0xef7e, 0xe75d, 0xdf1d,
+       0xdf1c, 0xf7df, 0xde9a, 0xed96, 0xe6fb, 0xdb4d, 0xc945, 0xe410,
+       0xffdf, 0xc965, 0xc986, 0xd2aa, 0xe451, 0xed14, 0xef5d, 0xffbe,
+       0xffff, 0xef3c, };
+
+unsigned char bmp_logo_bitmap[] = {
+       0x0000, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001, 0x0001,
+       0x0001, 0x0001, 0x0001, 0x0002, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0004, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0006, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0004, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0006, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0004, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0006, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0004, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0001, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007, 0x0007,
+       0x0008, 0x0003, 0x0003, 0x0003, 0x0003, 0x0004, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0009, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0004, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0009, 0x0003, 0x0003, 0x0003, 0x0003, 0x0004,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0009, 0x0003, 0x0003, 0x0003, 0x0003, 0x0004, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0009, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0004, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x000a, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
+       0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b, 0x000b,
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+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0027, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0006, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0004, 0x0025,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026, 0x0026,
+       0x0026, 0x0026, 0x0026, 0x0026, 0x0027, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003,
+       0x0003, 0x0003, 0x0006, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0005,
+       0x0005, 0x0005, 0x0005, 0x0005, 0x0005, 0x0004, 0x0023, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d, 0x002d,
+       0x002d, 0x0022, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x0003, 0x001f,
+       0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e, 0x000e,
+       0x000e, 0x000e, 0x0009, };
+#endif

diff --git a/board/bosch/shc/Kconfig b/board/bosch/shc/Kconfig
new file mode 100644 (file)
index 0000000..c71af11
--- /dev/null
+++ b/board/bosch/shc/Kconfig
@@ -0,0 +1,87 @@
+if TARGET_AM335X_SHC
+
+config SYS_BOARD
+       default "shc"
+
+config SYS_VENDOR
+       default "bosch"
+
+config SYS_SOC
+       default "am33xx"
+
+config SYS_CONFIG_NAME
+       default "am335x_shc"
+
+choice
+       prompt "enable different boot versions for the shc board"
+       default EMMC
+       help
+         Select the boot version of the shc board.
+
+config SHC_EMMC
+       bool "enable eMMC"
+       help
+         enable here the eMMC functionality on the bosch shc board.
+
+config SHC_ICT
+       bool "enable ICT"
+       help
+         enable here the ICT functionality on the bosch shc board
+
+config SHC_NETBOOT
+       bool "enable NETBOOT"
+       help
+         enable here the NETBOOT functionality on the bosch shc board
+
+config SHC_SDBOOT
+       bool "enable SDBOOT"
+       help
+         enable here the SDBOOT functionality on the bosch shc board
+
+endchoice
+
+choice
+       prompt "enable different board versions for the shc board"
+       default C3_SAMPLE
+       help
+         Select the board version of the shc board.
+
+config B_SAMPLE
+       bool "B Sample board version"
+       help
+         activate, if you want to build for the B sample version
+         of the bosch shc board
+
+config B2_SAMPLE
+       bool "B2 Sample board version"
+       help
+         activate, if you want to build for the B2 sample version
+         of the bosch shc board
+
+config C_SAMPLE
+       bool "C Sample board version"
+       help
+         activate, if you want to build for the C sample version
+         of the bosch shc board
+
+config C2_SAMPLE
+       bool "C2 Sample board version"
+       help
+         activate, if you want to build for the C2 sample version
+         of the bosch shc board
+
+config C3_SAMPLE
+       bool "C3 Sample board version"
+       help
+         activate, if you want to build for the C3 sample version
+         of the bosch shc board
+
+config SERIES
+       bool "Series board version"
+       help
+         activate, if you want to build for the Series version
+         of the bosch shc board
+
+endchoice
+
+endif

diff --git a/board/bosch/shc/MAINTAINERS b/board/bosch/shc/MAINTAINERS
new file mode 100644 (file)
index 0000000..ae3c035
--- /dev/null
+++ b/board/bosch/shc/MAINTAINERS
@@ -0,0 +1,11 @@
+SHC BOARD
+M:     Heiko Schocher <hs@denx.de>
+S:     Maintained
+F:     board/bosch/shc
+F:     include/configs/am335x_shc.h
+F:     configs/am335x_shc_defconfig
+F:     configs/am335x_shc_ict_defconfig
+F:     configs/am335x_shc_netboot_defconfig
+F:     configs/am335x_shc_prompt_defconfig
+F:     configs/am335x_shc_sdboot_defconfig
+F:     configs/am335x_shc_sdboot_prompt_defconfig

diff --git a/board/bosch/shc/Makefile b/board/bosch/shc/Makefile
new file mode 100644 (file)
index 0000000..4fec2bf
--- /dev/null
+++ b/board/bosch/shc/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  := mux.o
+obj-y  += board.o

diff --git a/board/bosch/shc/README b/board/bosch/shc/README
new file mode 100644 (file)
index 0000000..2f206e0
--- /dev/null
+++ b/board/bosch/shc/README
@@ -0,0 +1,114 @@
+Summary
+=======
+
+This document covers various features of the 'am335x_shc' build.
+
+Hardware
+========
+
+AM335X based board:
+
+I2C:   ready
+DRAM:  512 MiB
+Enabling the D-Cache
+MMC:   OMAP SD/MMC: 0 @ 26 MHz, OMAP SD/MMC: 1 @ 26 MHz
+Net:   cpsw
+
+Following boot options are possible:
+
+2 Jumpers:
+
+Jumper 1 Jumper 2 Bootmode
+off      off    eMMC boot
+on       off    SD boot
+off      on     Net boot
+
+Compiling
+=========
+
+$ make am335x_shc_defconfig
+  HOSTCC  scripts/basic/fixdep
+  HOSTCC  scripts/kconfig/conf.o
+  SHIPPED scripts/kconfig/zconf.tab.c
+  SHIPPED scripts/kconfig/zconf.lex.c
+  SHIPPED scripts/kconfig/zconf.hash.c
+  HOSTCC  scripts/kconfig/zconf.tab.o
+  HOSTLD  scripts/kconfig/conf
+#
+# configuration written to .config
+#
+$ make -s all
+
+-> now you have the MLO and the u-boot.img file, you can put
+on your SD card or eMMC.
+
+Configuring
+===========
+
+There are a lot of board versions and boot configurations, which
+can be selected through "make menuconfig"
+
+ARM architecture  --->
+  enable different boot versions for the shc board (enable eMMC)  --->
+   (X) enable eMMC
+   ( ) enable ICT
+   ( ) enable NETBOOT
+   ( ) enable SDBOOT
+
+  enable different board versions for the shc board (C3 Sample board version)  --->
+   ( ) B Sample board version
+   ( ) B2 Sample board version
+   ( ) C Sample board version
+   ( ) C2 Sample board version
+   (X) C3 Sample board version
+   ( ) Series board version
+
+Netboot
+=======
+- see also doc/SPL/README.am335x-network
+
+- set the jumper into netboot mode
+- compile the U-boot sources with:
+  make am335x_shc_netboot_defconfig
+  make all
+- copy the images into your tftp boot directory
+  cp spl/u-boot-spl.bin /tftpboot/.../u-boot-spl-restore.bin
+  cp u-boot.img /tftpboot/.../u-boot-restore.img
+- power on the board, and you should get something like this:
+
+U-Boot SPL 2016.05-rc2-00016-gf23b960-dirty (Apr 26 2016 - 09:02:18)
+#### NETBOOT ####
+SHC
+MPU reference clock runs at 6 MHz
+Setting MPU clock to 594 MHz
+Enabling Spread Spectrum of 18 permille for MPU
+Trying to boot from net
+Using default environment
+
+<ethaddr> not set. Validating first E-fuse MAC
+cpsw
+cpsw Waiting for PHY auto negotiation to complete... done
+link up on port 0, speed 100, full duplex
+BOOTP broadcast 1
+BOOTP broadcast 2
+DHCP client bound to address 192.168.20.91 (258 ms)
+Using cpsw device
+TFTP from server 192.168.1.1; our IP address is 192.168.20.91
+Filename 'shc/u-boot-restore.img'.
+Load address: 0x807fffc0
+Loading: ##################
+         1.2 MiB/s
+done
+Bytes transferred = 262480 (40150 hex)
+
+
+U-Boot 2016.05-rc2-00016-gf23b960-dirty (Apr 26 2016 - 09:02:18 +0200)
+
+       Watchdog enabled
+I2C:   ready
+DRAM:  512 MiB
+MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
+*** Warning - bad CRC, using default environment
+
+Net:   cpsw
+switch to partitions #0, OK

diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
new file mode 100644 (file)
index 0000000..e90693f
--- /dev/null
+++ b/board/bosch/shc/board.c
@@ -0,0 +1,648 @@
+/*
+ * board.c
+ *
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Based on:
+ * Board functions for TI AM335X based boards
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <spl.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/omap.h>
+#include <asm/arch/ddr_defs.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
+#include <asm/io.h>
+#include <asm/emif.h>
+#include <asm/gpio.h>
+#include <i2c.h>
+#include <miiphy.h>
+#include <cpsw.h>
+#include <power/tps65217.h>
+#include <environment.h>
+#include <watchdog.h>
+#include <environment.h>
+#include "mmc.h"
+#include "board.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_SPL_BUILD) || \
+       (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_DM_ETH))
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+#endif
+static struct shc_eeprom __attribute__((section(".data"))) header;
+static int shc_eeprom_valid;
+
+/*
+ * Read header information from EEPROM into global structure.
+ */
+static int read_eeprom(void)
+{
+       /* Check if baseboard eeprom is available */
+       if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
+               puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
+               return -ENODEV;
+       }
+
+       /* read the eeprom using i2c */
+       if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
+                    sizeof(header))) {
+               puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
+               return -EIO;
+       }
+
+       if (header.magic != HDR_MAGIC) {
+               printf("Incorrect magic number (0x%x) in EEPROM\n",
+                      header.magic);
+               return -EIO;
+       }
+
+       shc_eeprom_valid = 1;
+
+       return 0;
+}
+
+static void shc_request_gpio(void)
+{
+       gpio_request(LED_PWR_BL_GPIO, "LED PWR BL");
+       gpio_request(LED_PWR_RD_GPIO, "LED PWR RD");
+       gpio_request(RESET_GPIO, "reset");
+       gpio_request(WIFI_REGEN_GPIO, "WIFI REGEN");
+       gpio_request(WIFI_RST_GPIO, "WIFI rst");
+       gpio_request(ZIGBEE_RST_GPIO, "ZigBee rst");
+       gpio_request(BIDCOS_RST_GPIO, "BIDCOS rst");
+       gpio_request(ENOC_RST_GPIO, "ENOC rst");
+#if defined CONFIG_B_SAMPLE
+       gpio_request(LED_PWR_GN_GPIO, "LED PWR GN");
+       gpio_request(LED_CONN_BL_GPIO, "LED CONN BL");
+       gpio_request(LED_CONN_RD_GPIO, "LED CONN RD");
+       gpio_request(LED_CONN_GN_GPIO, "LED CONN GN");
+#else
+       gpio_request(LED_LAN_BL_GPIO, "LED LAN BL");
+       gpio_request(LED_LAN_RD_GPIO, "LED LAN RD");
+       gpio_request(LED_CLOUD_BL_GPIO, "LED CLOUD BL");
+       gpio_request(LED_CLOUD_RD_GPIO, "LED CLOUD RD");
+       gpio_request(LED_PWM_GPIO, "LED PWM");
+       gpio_request(Z_WAVE_RST_GPIO, "Z WAVE rst");
+#endif
+       gpio_request(BACK_BUTTON_GPIO, "Back button");
+       gpio_request(FRONT_BUTTON_GPIO, "Front button");
+}
+
+/*
+ * Function which forces all installed modules into running state for ICT
+ * testing. Called by SPL.
+ */
+static void __maybe_unused force_modules_running(void)
+{
+       /* Wi-Fi power regulator enable - high = enabled */
+       gpio_direction_output(WIFI_REGEN_GPIO, 1);
+       /*
+        * Wait for Wi-Fi power regulator to reach a stable voltage
+        * (soft-start time, max. 350 µs)
+        */
+       __udelay(350);
+
+       /* Wi-Fi module reset - high = running */
+       gpio_direction_output(WIFI_RST_GPIO, 1);
+
+       /* ZigBee reset - high = running */
+       gpio_direction_output(ZIGBEE_RST_GPIO, 1);
+
+       /* BidCos reset - high = running */
+       gpio_direction_output(BIDCOS_RST_GPIO, 1);
+
+#if !defined(CONFIG_B_SAMPLE)
+       /* Z-Wave reset - high = running */
+       gpio_direction_output(Z_WAVE_RST_GPIO, 1);
+#endif
+
+       /* EnOcean reset - low = running */
+       gpio_direction_output(ENOC_RST_GPIO, 0);
+}
+
+/*
+ * Function which forces all installed modules into reset - to be released by
+ * the OS, called by SPL
+ */
+static void __maybe_unused force_modules_reset(void)
+{
+       /* Wi-Fi module reset - low = reset */
+       gpio_direction_output(WIFI_RST_GPIO, 0);
+
+       /* Wi-Fi power regulator enable - low = disabled */
+       gpio_direction_output(WIFI_REGEN_GPIO, 0);
+
+       /* ZigBee reset - low = reset */
+       gpio_direction_output(ZIGBEE_RST_GPIO, 0);
+
+       /* BidCos reset - low = reset */
+       /*gpio_direction_output(BIDCOS_RST_GPIO, 0);*/
+
+#if !defined(CONFIG_B_SAMPLE)
+       /* Z-Wave reset - low = reset */
+       gpio_direction_output(Z_WAVE_RST_GPIO, 0);
+#endif
+
+       /* EnOcean reset - high = reset*/
+       gpio_direction_output(ENOC_RST_GPIO, 1);
+}
+
+/*
+ * Function to set the LEDs in the state "Bootloader booting"
+ */
+static void __maybe_unused leds_set_booting(void)
+{
+#if defined(CONFIG_B_SAMPLE)
+
+       /* Turn all red LEDs on */
+       gpio_direction_output(LED_PWR_RD_GPIO, 1);
+       gpio_direction_output(LED_CONN_RD_GPIO, 1);
+
+#else /* All other SHCs starting with B2-Sample */
+       /* Set the PWM GPIO */
+       gpio_direction_output(LED_PWM_GPIO, 1);
+       /* Turn all red LEDs on */
+       gpio_direction_output(LED_PWR_RD_GPIO, 1);
+       gpio_direction_output(LED_LAN_RD_GPIO, 1);
+       gpio_direction_output(LED_CLOUD_RD_GPIO, 1);
+
+#endif
+}
+
+/*
+ * Function to set the LEDs in the state "Bootloader error"
+ */
+static void leds_set_failure(int state)
+{
+#if defined(CONFIG_B_SAMPLE)
+       /* Turn all blue and green LEDs off */
+       gpio_set_value(LED_PWR_BL_GPIO, 0);
+       gpio_set_value(LED_PWR_GN_GPIO, 0);
+       gpio_set_value(LED_CONN_BL_GPIO, 0);
+       gpio_set_value(LED_CONN_GN_GPIO, 0);
+
+       /* Turn all red LEDs to 'state' */
+       gpio_set_value(LED_PWR_RD_GPIO, state);
+       gpio_set_value(LED_CONN_RD_GPIO, state);
+
+#else /* All other SHCs starting with B2-Sample */
+       /* Set the PWM GPIO */
+       gpio_direction_output(LED_PWM_GPIO, 1);
+
+       /* Turn all blue LEDs off */
+       gpio_set_value(LED_PWR_BL_GPIO, 0);
+       gpio_set_value(LED_LAN_BL_GPIO, 0);
+       gpio_set_value(LED_CLOUD_BL_GPIO, 0);
+
+       /* Turn all red LEDs to 'state' */
+       gpio_set_value(LED_PWR_RD_GPIO, state);
+       gpio_set_value(LED_LAN_RD_GPIO, state);
+       gpio_set_value(LED_CLOUD_RD_GPIO, state);
+#endif
+}
+
+/*
+ * Function to set the LEDs in the state "Bootloader finished"
+ */
+static void leds_set_finish(void)
+{
+#if defined(CONFIG_B_SAMPLE)
+       /* Turn all LEDs off */
+       gpio_set_value(LED_PWR_BL_GPIO, 0);
+       gpio_set_value(LED_PWR_RD_GPIO, 0);
+       gpio_set_value(LED_PWR_GN_GPIO, 0);
+       gpio_set_value(LED_CONN_BL_GPIO, 0);
+       gpio_set_value(LED_CONN_RD_GPIO, 0);
+       gpio_set_value(LED_CONN_GN_GPIO, 0);
+#else /* All other SHCs starting with B2-Sample */
+       /* Turn all LEDs off */
+       gpio_set_value(LED_PWR_BL_GPIO, 0);
+       gpio_set_value(LED_PWR_RD_GPIO, 0);
+       gpio_set_value(LED_LAN_BL_GPIO, 0);
+       gpio_set_value(LED_LAN_RD_GPIO, 0);
+       gpio_set_value(LED_CLOUD_BL_GPIO, 0);
+       gpio_set_value(LED_CLOUD_RD_GPIO, 0);
+
+       /* Turn off the PWM GPIO and mux it to EHRPWM */
+       gpio_set_value(LED_PWM_GPIO, 0);
+       enable_shc_board_pwm_pin_mux();
+#endif
+}
+
+static void check_button_status(void)
+{
+       ulong value;
+       gpio_direction_input(FRONT_BUTTON_GPIO);
+       value = gpio_get_value(FRONT_BUTTON_GPIO);
+
+       if (value == 0) {
+               printf("front button activated !\n");
+               setenv("harakiri", "1");
+       }
+}
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#ifdef CONFIG_SPL_OS_BOOT
+int spl_start_uboot(void)
+{
+       return 1;
+}
+#endif
+
+static void shc_board_early_init(void)
+{
+       shc_request_gpio();
+# ifdef CONFIG_SHC_ICT
+       /* Force all modules into enabled state for ICT testing */
+       force_modules_running();
+# else
+       /* Force all modules to enter Reset state until released by the OS */
+       force_modules_reset();
+# endif
+       leds_set_booting();
+}
+
+#define MPU_SPREADING_PERMILLE 18 /* Spread 1.8 percent */
+#define OSC    (V_OSCK/1000000)
+/* Bosch: Predivider must be fixed to 4, so N = 4-1 */
+#define MPUPLL_N        (4-1)
+/* Bosch: Fref = 24 MHz / (N+1) = 24 MHz / 4 = 6 MHz */
+#define MPUPLL_FREF (OSC / (MPUPLL_N + 1))
+
+const struct dpll_params dpll_ddr_shc = {
+               400, OSC-1, 1, -1, -1, -1, -1};
+
+const struct dpll_params *get_dpll_ddr_params(void)
+{
+       return &dpll_ddr_shc;
+}
+
+/*
+ * As we enabled downspread SSC with 1.8%, the values needed to be corrected
+ * such that the 20% overshoot will not lead to too high frequencies.
+ * In all cases, this is achieved by subtracting one from M (6 MHz less).
+ * Example: 600 MHz CPU
+ *   Step size: 24 MHz OSC, N = 4 (fix) --> Fref = 6 MHz
+ *   600 MHz - 6 MHz (1x Fref) = 594 MHz
+ *   SSC: 594 MHz * 1.8% = 10.7 MHz SSC
+ *   Overshoot: 10.7 MHz * 20 % = 2.2 MHz
+ *   --> Fmax = 594 MHz + 2.2 MHz = 596.2 MHz, lower than 600 MHz --> OK!
+ */
+const struct dpll_params dpll_mpu_shc_opp100 = {
+               99, MPUPLL_N, 1, -1, -1, -1, -1};
+
+void am33xx_spl_board_init(void)
+{
+       int sil_rev;
+       int mpu_vdd;
+
+       puts(BOARD_ID_STR);
+
+       /*
+        * Set CORE Frequency to OPP100
+        * Hint: DCDC3 (CORE) defaults to 1.100V (for OPP100)
+        */
+       do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
+
+       sil_rev = readl(&cdev->deviceid) >> 28;
+       if (sil_rev < 2) {
+               puts("We do not support Silicon Revisions below 2.0!\n");
+               return;
+       }
+
+       dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
+       if (i2c_probe(TPS65217_CHIP_PM))
+               return;
+
+       /*
+        * Retrieve the CPU max frequency by reading the efuse
+        * SHC-Default: 600 MHz
+        */
+       switch (dpll_mpu_opp100.m) {
+       case MPUPLL_M_1000:
+               mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
+               break;
+       case MPUPLL_M_800:
+               mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
+               break;
+       case MPUPLL_M_720:
+               mpu_vdd = TPS65217_DCDC_VOLT_SEL_1200MV;
+               break;
+       case MPUPLL_M_600:
+               mpu_vdd = TPS65217_DCDC_VOLT_SEL_1100MV;
+               break;
+       case MPUPLL_M_300:
+               mpu_vdd = TPS65217_DCDC_VOLT_SEL_950MV;
+               break;
+       default:
+               puts("Cannot determine the frequency, failing!\n");
+               return;
+       }
+
+       if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
+               puts("tps65217_voltage_update failure\n");
+               return;
+       }
+
+       /* Set MPU Frequency to what we detected */
+       printf("MPU reference clock runs at %d MHz\n", MPUPLL_FREF);
+       printf("Setting MPU clock to %d MHz\n", MPUPLL_FREF *
+              dpll_mpu_shc_opp100.m);
+       do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_shc_opp100);
+
+       /* Enable Spread Spectrum for this freq to be clean on EMI side */
+       set_mpu_spreadspectrum(MPU_SPREADING_PERMILLE);
+
+       /*
+        * Using the default voltages for the PMIC (TPS65217D)
+        * LS1 = 1.8V (VDD_1V8)
+        * LS2 = 3.3V (VDD_3V3A)
+        * LDO1 = 1.8V (VIO and VRTC)
+        * LDO2 = 3.3V (VDD_3V3AUX)
+        */
+       shc_board_early_init();
+}
+
+void set_uart_mux_conf(void)
+{
+       enable_uart0_pin_mux();
+}
+
+void set_mux_conf_regs(void)
+{
+       enable_shc_board_pin_mux();
+}
+
+const struct ctrl_ioregs ioregs_evmsk = {
+       .cm0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
+       .cm1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
+       .cm2ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
+       .dt0ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
+       .dt1ioctl               = MT41K256M16HA125E_IOCTRL_VALUE,
+};
+
+static const struct ddr_data ddr3_shc_data = {
+       .datardsratio0 = MT41K256M16HA125E_RD_DQS,
+       .datawdsratio0 = MT41K256M16HA125E_WR_DQS,
+       .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
+       .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
+};
+
+static const struct cmd_control ddr3_shc_cmd_ctrl_data = {
+       .cmd0csratio = MT41K256M16HA125E_RATIO,
+       .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+       .cmd1csratio = MT41K256M16HA125E_RATIO,
+       .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+
+       .cmd2csratio = MT41K256M16HA125E_RATIO,
+       .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
+};
+
+static struct emif_regs ddr3_shc_emif_reg_data = {
+       .sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
+       .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
+       .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
+       .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
+       .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
+       .zq_config = MT41K256M16HA125E_ZQ_CFG,
+       .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
+                               PHY_EN_DYN_PWRDN,
+};
+
+void sdram_init(void)
+{
+       /* Configure the DDR3 RAM */
+       config_ddr(400, &ioregs_evmsk, &ddr3_shc_data,
+                  &ddr3_shc_cmd_ctrl_data, &ddr3_shc_emif_reg_data, 0);
+}
+#endif
+
+/*
+ * Basic board specific setup.  Pinmux has been handled already.
+ */
+int board_init(void)
+{
+#if defined(CONFIG_HW_WATCHDOG)
+       hw_watchdog_init();
+#endif
+       i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+       if (read_eeprom() < 0)
+               puts("EEPROM Content Invalid.\n");
+
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
+       gpmc_init();
+#endif
+       shc_request_gpio();
+
+       return 0;
+}
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+       check_button_status();
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+       if (shc_eeprom_valid)
+               if (is_valid_ethaddr(header.mac_addr))
+                       eth_setenv_enetaddr("ethaddr", header.mac_addr);
+#endif
+
+       return 0;
+}
+#endif
+
+#ifndef CONFIG_DM_ETH
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
+       (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+static void cpsw_control(int enabled)
+{
+       /* VTP can be added here */
+
+       return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+       {
+               .slave_reg_ofs  = 0x208,
+               .sliver_reg_ofs = 0xd80,
+               .phy_addr       = 0,
+       },
+       {
+               .slave_reg_ofs  = 0x308,
+               .sliver_reg_ofs = 0xdc0,
+               .phy_addr       = 1,
+       },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+       .mdio_base              = CPSW_MDIO_BASE,
+       .cpsw_base              = CPSW_BASE,
+       .mdio_div               = 0xff,
+       .channels               = 8,
+       .cpdma_reg_ofs          = 0x800,
+       .slaves                 = 1,
+       .slave_data             = cpsw_slaves,
+       .ale_reg_ofs            = 0xd00,
+       .ale_entries            = 1024,
+       .host_port_reg_ofs      = 0x108,
+       .hw_stats_reg_ofs       = 0x900,
+       .bd_ram_ofs             = 0x2000,
+       .mac_control            = (1 << 5),
+       .control                = cpsw_control,
+       .host_port_num          = 0,
+       .version                = CPSW_CTRL_VERSION_2,
+};
+#endif
+
+/*
+ * This function will:
+ * Read the eFuse for MAC addresses, and set ethaddr/eth1addr/usbnet_devaddr
+ * in the environment
+ * Perform fixups to the PHY present on certain boards.  We only need this
+ * function in:
+ * - SPL with either CPSW or USB ethernet support
+ * - Full U-Boot, with either CPSW or USB ethernet
+ * Build in only these cases to avoid warnings about unused variables
+ * when we build an SPL that has neither option but full U-Boot will.
+ */
+#if ((defined(CONFIG_SPL_ETH_SUPPORT) || \
+       defined(CONFIG_SPL_USBETH_SUPPORT)) && \
+       defined(CONFIG_SPL_BUILD)) || \
+       ((defined(CONFIG_DRIVER_TI_CPSW) || \
+         defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET)) && \
+        !defined(CONFIG_SPL_BUILD))
+int board_eth_init(bd_t *bis)
+{
+       int rv, n = 0;
+       uint8_t mac_addr[6];
+       uint32_t mac_hi, mac_lo;
+
+       /* try reading mac address from efuse */
+       mac_lo = readl(&cdev->macid0l);
+       mac_hi = readl(&cdev->macid0h);
+       mac_addr[0] = mac_hi & 0xFF;
+       mac_addr[1] = (mac_hi & 0xFF00) >> 8;
+       mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
+       mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
+       mac_addr[4] = mac_lo & 0xFF;
+       mac_addr[5] = (mac_lo & 0xFF00) >> 8;
+
+#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
+       (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
+       if (!getenv("ethaddr")) {
+               printf("<ethaddr> not set. Validating first E-fuse MAC\n");
+
+               if (is_valid_ethaddr(mac_addr))
+                       eth_setenv_enetaddr("ethaddr", mac_addr);
+       }
+
+       writel(MII_MODE_ENABLE, &cdev->miisel);
+       cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
+       cpsw_slaves[1].phy_if = cpsw_slaves[0].phy_if;
+       rv = cpsw_register(&cpsw_data);
+       if (rv < 0)
+               printf("Error %d registering CPSW switch\n", rv);
+       else
+               n += rv;
+#endif
+
+#if defined(CONFIG_USB_ETHER) && \
+       (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT))
+       if (is_valid_ethaddr(mac_addr))
+               eth_setenv_enetaddr("usbnet_devaddr", mac_addr);
+
+       rv = usb_eth_initialize(bis);
+       if (rv < 0)
+               printf("Error %d registering USB_ETHER\n", rv);
+       else
+               n += rv;
+#endif
+       return n;
+}
+#endif
+
+#endif /* CONFIG_DM_ETH */
+
+#ifdef CONFIG_SHOW_BOOT_PROGRESS
+static void bosch_check_reset_pin(void)
+{
+       if (readl(GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0) & RESET_MASK) {
+               printf("Resetting ...\n");
+               writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
+               disable_interrupts();
+               reset_cpu(0);
+               /*NOTREACHED*/
+       }
+}
+
+static void hang_bosch(const char *cause, int code)
+{
+       int lv;
+
+       gpio_direction_input(RESET_GPIO);
+
+       /* Enable reset pin interrupt on falling edge */
+       writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_IRQSTATUS_SET_0);
+       writel(RESET_MASK, GPIO1_BASE + OMAP_GPIO_FALLINGDETECT);
+       enable_interrupts();
+
+       puts(cause);
+       for (;;) {
+               for (lv = 0; lv < code; lv++) {
+                       bosch_check_reset_pin();
+                       leds_set_failure(1);
+                       __udelay(150 * 1000);
+                       leds_set_failure(0);
+                       __udelay(150 * 1000);
+               }
+#if defined(BLINK_CODE)
+               __udelay(300 * 1000);
+#endif
+       }
+}
+
+void show_boot_progress(int val)
+{
+       switch (val) {
+       case BOOTSTAGE_ID_NEED_RESET:
+               hang_bosch("need reset", 4);
+               break;
+       }
+}
+#endif
+
+void arch_preboot_os(void)
+{
+       leds_set_finish();
+}
+
+#if defined(CONFIG_GENERIC_MMC)
+int board_mmc_init(bd_t *bis)
+{
+       int ret;
+
+       /* Bosch: Do not enable 52MHz for eMMC device to avoid EMI */
+       ret = omap_mmc_init(0, MMC_MODE_HS_52MHz, 26000000, -1, -1);
+       if (ret)
+               return ret;
+
+       ret = omap_mmc_init(1, MMC_MODE_HS_52MHz, 26000000, -1, -1);
+       return ret;
+}
+#endif

diff --git a/board/bosch/shc/board.h b/board/bosch/shc/board.h
new file mode 100644 (file)
index 0000000..46167fe
--- /dev/null
+++ b/board/bosch/shc/board.h
@@ -0,0 +1,187 @@
+/*
+ * board.h
+ *
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Based on:
+ * TI AM335x boards information header
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/* Definition to control the GPIOs (for LEDs and Reset) */
+#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
+
+static inline int board_is_b_sample(void)
+{
+#if defined CONFIG_B_SAMPLE
+       return 1;
+#else
+       return 0;
+#endif
+}
+
+static inline int board_is_c_sample(void)
+{
+#if defined CONFIG_C_SAMPLE
+       return 1;
+#else
+       return 0;
+#endif
+}
+
+static inline int board_is_c3_sample(void)
+{
+#if defined CONFIG_C3_SAMPLE
+       return 1;
+#else
+       return 0;
+#endif
+}
+
+static inline int board_is_series(void)
+{
+#if defined CONFIG_SERIES
+       return 1;
+#else
+       return 0;
+#endif
+}
+
+/*
+ * Definitions for pinmuxing header and Board ID strings
+ */
+#if defined CONFIG_B_SAMPLE
+# define BOARD_ID_STR "SHC B-Sample\n"
+#elif defined CONFIG_B2_SAMPLE
+# define BOARD_ID_STR "SHC B2-Sample\n"
+#elif defined CONFIG_C_SAMPLE
+# if defined(CONFIG_SHC_NETBOOT)
+#  define BOARD_ID_STR "#### NETBOOT ####\nSHC C-Sample\n"
+# elif defined(CONFIG_SHC_SDBOOT)
+#  define BOARD_ID_STR "#### SDBOOT ####\nSHC C-Sample\n"
+# else
+#  define BOARD_ID_STR "SHC C-Sample\n"
+# endif
+#elif defined CONFIG_C2_SAMPLE
+# if defined(CONFIG_SHC_ICT)
+#  define BOARD_ID_STR "#### ICT ####\nSHC C2-Sample\n"
+# elif defined(CONFIG_SHC_NETBOOT)
+#  define BOARD_ID_STR "#### NETBOOT ####\nSHC C2-Sample\n"
+# elif defined(CONFIG_SHC_SDBOOT)
+#  define BOARD_ID_STR "#### SDBOOT ####\nSHC C2-Sample\n"
+# else
+#  define BOARD_ID_STR "SHC C2-Sample\n"
+# endif
+#elif defined CONFIG_C3_SAMPLE
+# if defined(CONFIG_SHC_ICT)
+#  define BOARD_ID_STR "#### ICT ####\nSHC C3-Sample\n"
+# elif defined(CONFIG_SHC_NETBOOT)
+#  define BOARD_ID_STR "#### NETBOOT ####\nSHC C3-Sample\n"
+# elif defined(CONFIG_SHC_SDBOOT)
+#  define BOARD_ID_STR "#### SDBOOT ####\nSHC C3-Sample\n"
+# else
+#  define BOARD_ID_STR "SHC C3-Sample\n"
+# endif
+#elif defined CONFIG_SERIES
+# if defined(CONFIG_SHC_ICT)
+#  define BOARD_ID_STR "#### ICT ####\nSHC\n"
+# elif defined(CONFIG_SHC_NETBOOT)
+#  define BOARD_ID_STR "#### NETBOOT ####\nSHC\n"
+# elif defined(CONFIG_SHC_SDBOOT)
+#  define BOARD_ID_STR "#### SDBOOT ####\nSHC\n"
+# else
+#  define BOARD_ID_STR "SHC\n"
+# endif
+#else
+# define BOARD_ID_STR "Unknown device!\n"
+#endif
+
+/*
+ * Definitions for GPIO pin assignments
+ */
+#if defined CONFIG_B_SAMPLE
+
+# define LED_PWR_BL_GPIO   GPIO_TO_PIN(1, 17)
+# define LED_PWR_RD_GPIO   GPIO_TO_PIN(1, 18)
+# define LED_PWR_GN_GPIO   GPIO_TO_PIN(1, 19)
+# define LED_CONN_BL_GPIO  GPIO_TO_PIN(0, 26)
+# define LED_CONN_RD_GPIO  GPIO_TO_PIN(0, 22)
+# define LED_CONN_GN_GPIO  GPIO_TO_PIN(0, 23)
+# define RESET_GPIO        GPIO_TO_PIN(1, 29)
+# define WIFI_REGEN_GPIO   GPIO_TO_PIN(1, 16)
+# define WIFI_RST_GPIO     GPIO_TO_PIN(0, 27)
+# define ZIGBEE_RST_GPIO   GPIO_TO_PIN(3, 18)
+# define BIDCOS_RST_GPIO   GPIO_TO_PIN(0, 12)
+# define ENOC_RST_GPIO     GPIO_TO_PIN(1, 22)
+
+#else
+
+# define LED_PWR_BL_GPIO   GPIO_TO_PIN(0, 22)
+# define LED_PWR_RD_GPIO   GPIO_TO_PIN(0, 23)
+# define LED_LAN_BL_GPIO   GPIO_TO_PIN(1, 17)
+# define LED_LAN_RD_GPIO   GPIO_TO_PIN(0, 26)
+# define LED_CLOUD_BL_GPIO GPIO_TO_PIN(1, 18)
+# define LED_CLOUD_RD_GPIO GPIO_TO_PIN(2, 2)
+# define LED_PWM_GPIO      GPIO_TO_PIN(1, 19)
+# define RESET_GPIO        GPIO_TO_PIN(1, 29)
+# define WIFI_REGEN_GPIO   GPIO_TO_PIN(1, 16)
+# define WIFI_RST_GPIO     GPIO_TO_PIN(0, 27)
+# define ZIGBEE_RST_GPIO   GPIO_TO_PIN(3, 18)
+# define BIDCOS_RST_GPIO   GPIO_TO_PIN(1, 24)
+# define Z_WAVE_RST_GPIO   GPIO_TO_PIN(1, 21)
+# define ENOC_RST_GPIO     GPIO_TO_PIN(1, 22)
+
+#endif
+
+#define BACK_BUTTON_GPIO    GPIO_TO_PIN(1, 29)
+#define FRONT_BUTTON_GPIO   GPIO_TO_PIN(1, 25)
+
+/* Reset is on GPIO pin 29 of GPIO bank 1 */
+#define RESET_MASK     (0x1 << 29)
+
+#define HDR_MAGIC      0x43485342
+#define HDR_ETH_ALEN   6
+#define HDR_NAME_LEN   8
+#define HDR_REV_LEN    8
+#define HDR_SER_LEN    16
+#define HDR_ROOT_LEN   12
+#define HDR_FATC_LEN   12
+
+/*
+* SHC parameters held in On-Board I²C EEPROM device.
+*
+* Header Format
+*
+*  Name     Size   Contents
+*-------------------------------------------------------------
+*  Magic     4     0x42 0x53 0x48 0x43  [BSHC]
+*
+*  Version   2     0x0100 for v1.0
+*
+*  Lenght    2     The length of the complete structure, not only this header
+*
+*  Eth-MAC   6     Ethernet MAC Address
+*                  SHC Pool: 7C:AC:B2:00:10:01 - TBD
+*
+*  --- Further values follow, not important for Bootloader ---
+*/
+
+struct  shc_eeprom {
+       u32  magic;
+       u16  version;
+       u16  lenght;
+       uint8_t mac_addr[HDR_ETH_ALEN];
+};
+
+void enable_uart0_pin_mux(void);
+void enable_shc_board_pin_mux(void);
+void enable_shc_board_pwm_pin_mux(void);
+
+#endif

diff --git a/board/bosch/shc/mux.c b/board/bosch/shc/mux.c
new file mode 100644 (file)
index 0000000..e8ada65
--- /dev/null
+++ b/board/bosch/shc/mux.c
@@ -0,0 +1,261 @@
+/*
+ * mux.c
+ *
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Based on:
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/mux.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include "board.h"
+
+static struct module_pin_mux uart0_pin_mux[] = {
+       {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)},   /* UART0_RXD */
+       {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)},             /* UART0_TXD */
+       {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)},  /* UART0_CTS */
+       {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)},            /* UART0_RTS */
+       {-1},
+};
+
+static struct module_pin_mux uart1_pin_mux[] = {
+       {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)},  /* UART1_RXD */
+       {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)},             /* UART1_TXD */
+       {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)},  /* UART1_CTS */
+       {OFFSET(uart1_rtsn), (MODE(0) | PULLUDDIS)},            /* UART1_RTS */
+       {-1},
+};
+
+static struct module_pin_mux uart2_pin_mux[] = {
+       {OFFSET(spi0_sclk), (MODE(1) | PULLUDDIS | RXACTIVE)},  /* UART2_RXD */
+       {OFFSET(spi0_d0), (MODE(1) | PULLUDDIS)},               /* UART2_TXD */
+       {-1},
+};
+
+static struct module_pin_mux spi1_pin_mux[] = {
+       {OFFSET(mcasp0_aclkx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_SCLK */
+       {OFFSET(mcasp0_fsx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D0 */
+       {OFFSET(mcasp0_axr0), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D1 */
+       {OFFSET(mcasp0_ahclkr), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_CS0 */
+       {-1},
+};
+
+static struct module_pin_mux uart4_pin_mux[] = {
+       {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
+       {OFFSET(gpmc_wpn), (MODE(6) | PULLUP_EN)},              /* UART4_TXD */
+       {-1},
+};
+
+static struct module_pin_mux mmc0_pin_mux[] = {
+       {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUDDIS)},  /* MMC0_DAT3 */
+       {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUDDIS)},  /* MMC0_DAT2 */
+       {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUDDIS)},  /* MMC0_DAT1 */
+       {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUDDIS)},  /* MMC0_DAT0 */
+       {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},   /* MMC0_CLK */
+       {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUDDIS)},   /* MMC0_CMD */
+       {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUDDIS)},   /* MMC0_CD */
+       {-1},
+};
+
+static struct module_pin_mux mmc1_pin_mux[] = {
+       {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
+       {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
+       {OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
+       {OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
+       {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT3 */
+       {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT2 */
+       {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT1 */
+       {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)},   /* MMC1_DAT0 */
+       {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUDDIS)},  /* MMC1_CLK */
+       {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)},  /* MMC1_CMD */
+       {-1},
+};
+
+static struct module_pin_mux mmc2_pin_mux[] = {
+       {OFFSET(gpmc_ad12), (MODE(3) | PULLUDDIS | RXACTIVE)}, /* MMC2_DAT0 */
+       {OFFSET(gpmc_ad13), (MODE(3) | PULLUDDIS | RXACTIVE)}, /* MMC2_DAT1 */
+       {OFFSET(gpmc_ad14), (MODE(3) | PULLUDDIS | RXACTIVE)}, /* MMC2_DAT2 */
+       {OFFSET(gpmc_ad15), (MODE(3) | PULLUDDIS | RXACTIVE)}, /* MMC2_DAT3 */
+       {OFFSET(gpmc_csn3), (MODE(3) | RXACTIVE | PULLUDDIS)}, /* MMC2_CMD */
+       {OFFSET(gpmc_clk), (MODE(3) | RXACTIVE | PULLUDDIS)},  /* MMC2_CLK */
+       {-1},
+};
+static struct module_pin_mux i2c0_pin_mux[] = {
+       {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDDIS)}, /* I2C_DATA */
+       {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDDIS)}, /* I2C_SCLK */
+       {-1},
+};
+
+static struct module_pin_mux gpio0_7_pin_mux[] = {
+       {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUP_EN)},     /* GPIO0_7 */
+       {-1},
+};
+
+static struct module_pin_mux jtag_pin_mux[] = {
+       {OFFSET(xdma_event_intr0), (MODE(6) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(xdma_event_intr1), (MODE(6) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(nresetin_out), (MODE(0) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(nnmi), (MODE(0) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(tms), (MODE(0) | RXACTIVE | PULLUP_EN)},
+       {OFFSET(tdi), (MODE(0) | RXACTIVE | PULLUP_EN)},
+       {OFFSET(tdo), (MODE(0) | PULLUP_EN)},
+       {OFFSET(tck), (MODE(0) | RXACTIVE | PULLUP_EN)},
+       {OFFSET(ntrst), (MODE(0) | RXACTIVE)},
+       {OFFSET(emu0), (MODE(0) | RXACTIVE | PULLUP_EN)},
+       {OFFSET(emu1), (MODE(0) | RXACTIVE | PULLUP_EN)},
+       {OFFSET(pmic_power_en), (MODE(0) | PULLUP_EN)},
+       {OFFSET(rsvd2), (MODE(0) | PULLUP_EN)},
+       {OFFSET(rtc_porz), (MODE(0) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(ext_wakeup), (MODE(0) | RXACTIVE)},
+       {OFFSET(enz_kaldo_1p8v), (MODE(0) | RXACTIVE | PULLUDDIS)},
+       {OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN)},
+       {OFFSET(usb1_drvvbus), (MODE(0) | PULLUDDIS)},
+       {-1},
+};
+
+static struct module_pin_mux gpio_pin_mux[] = {
+       {OFFSET(gpmc_ad8), (MODE(7) | PULLUDDIS)},      /* gpio0[22] - LED_PWR_BL (external pull-down) */
+       {OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)},      /* gpio0[23] - LED_PWR_RD (external pull-down) */
+       {OFFSET(gpmc_ad10), (MODE(7) | PULLUDDIS)},     /* gpio0[26] - LED_LAN_RD (external pull-down) */
+       {OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)},     /* gpio0[27] - #WIFI_RST (external pull-down) */
+       {OFFSET(gpmc_a0), (MODE(7) | PULLUDDIS)},       /* gpio1[16] - WIFI_REGEN */
+       {OFFSET(gpmc_a1), (MODE(7) | PULLUDDIS)},       /* gpio1[17] - LED_LAN_BL */
+       {OFFSET(gpmc_a2), (MODE(7) | PULLUDDIS)},       /* gpio1[18] - LED_Cloud_BL */
+       {OFFSET(gpmc_a3), (MODE(7) | PULLUDDIS)},       /* gpio1[19] -  LED_PWM as GPIO */
+       {OFFSET(gpmc_a4), (MODE(7))},                   /* gpio1[20] -  #eMMC_RST */
+       {OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)},       /* gpio1[21] -  #Z-Wave_RST */
+       {OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)},       /* gpio1[22] -  ENOC_RST */
+       {OFFSET(gpmc_a7), (MODE(7) | PULLUP_EN)},       /* gpio1[23] -  WIFI_MODE */
+       {OFFSET(gpmc_a8), (MODE(7) | RXACTIVE | PULLUDDIS)},    /* gpio1[24] -  #BIDCOS_RST */
+       {OFFSET(gpmc_a9), (MODE(7) | RXACTIVE | PULLUDDIS)},    /* gpio1[25] -  USR_BUTTON */
+       {OFFSET(gpmc_a10), (MODE(7) | RXACTIVE | PULLUDDIS)},   /* gpio1[26] -  #USB1_OC */
+       {OFFSET(gpmc_a11), (MODE(7) | RXACTIVE | PULLUDDIS)},   /* gpio1[27] -  BIDCOS_PROG */
+       {OFFSET(gpmc_be1n), (MODE(7) | PULLUP_EN)},     /* gpio1[28] -  ZIGBEE_PC7 */
+       {OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUDDIS)},  /* gpio1[29] -  RESET_BUTTON */
+       {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS)}, /* gpio2[2] -  LED_Cloud_RD */
+       {OFFSET(gpmc_oen_ren), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* gpio2[3] -  #WIFI_POR */
+       {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},      /* gpio2[4] -  N/C */
+       {OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)}, /* gpio2[5] -  EEPROM_WP */
+       {OFFSET(lcd_data0), (MODE(7) | PULLUDDIS)},     /* gpio2[6] */
+       {OFFSET(lcd_data1), (MODE(7) | PULLUDDIS)},     /* gpio2[7] */
+       {OFFSET(lcd_data2), (MODE(7) | PULLUDDIS)},     /* gpio2[8] */
+       {OFFSET(lcd_data3), (MODE(7) | PULLUDDIS)},     /* gpio2[9] */
+       {OFFSET(lcd_data4), (MODE(7) | PULLUDDIS)},     /* gpio2[10] */
+       {OFFSET(lcd_data5), (MODE(7) | PULLUDDIS)},     /* gpio2[11] */
+       {OFFSET(lcd_data6), (MODE(7) | PULLUDDIS)},     /* gpio2[12] */
+       {OFFSET(lcd_data7), (MODE(7) | PULLUDDIS)},     /* gpio2[13] */
+       {OFFSET(lcd_data8), (MODE(7) | PULLUDDIS)},     /* gpio2[14] */
+       {OFFSET(lcd_data9), (MODE(7) | PULLUDDIS)},     /* gpio2[15] */
+       {OFFSET(lcd_data10), (MODE(7) | PULLUDDIS)},    /* gpio2[16] */
+       {OFFSET(lcd_data11), (MODE(7) | PULLUDDIS)},    /* gpio2[17] */
+       {OFFSET(lcd_data12), (MODE(7) | PULLUDDIS)},    /* gpio0[8] */
+       {OFFSET(lcd_data13), (MODE(7) | PULLUDDIS)},    /* gpio0[9] */
+       {OFFSET(lcd_data14), (MODE(7) | PULLUDDIS)},    /* gpio0[10] */
+       {OFFSET(lcd_data15), (MODE(7) | PULLUDDIS)},    /* gpio0[11] */
+       {OFFSET(lcd_vsync), (MODE(7) | PULLUDDIS)},     /* gpio2[22] */
+       {OFFSET(lcd_hsync), (MODE(7) | PULLUDDIS)},     /* gpio2[23] */
+       {OFFSET(lcd_pclk), (MODE(7) | PULLUDDIS)},      /* gpio2[24] */
+       {OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)},/* gpio2[25] */
+       {OFFSET(spi0_d1), (MODE(7) | PULLUDDIS)},       /* gpio0[4] */
+       {OFFSET(spi0_cs0), (MODE(7) | PULLUDDIS)},      /* gpio0[5] */
+       {OFFSET(mcasp0_aclkr), (MODE(7) | PULLUDDIS)},  /* gpio3[18] - #ZIGBEE_RST */
+       {OFFSET(mcasp0_fsr), (MODE(7)) | PULLUDDIS},    /* gpio3[19] - ZIGBEE_BOOT */
+       {OFFSET(mcasp0_axr1), (MODE(7) | RXACTIVE)},    /* gpio3[19] - ZIGBEE_BOOT */
+       {OFFSET(mcasp0_ahclkx), (MODE(7) | RXACTIVE | PULLUP_EN)},/* gpio3[21] - ZIGBEE_PC5 */
+       {-1},
+};
+
+static struct module_pin_mux mii1_pin_mux[] = {
+       {OFFSET(mii1_col), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_crs), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxerr), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_txen), MODE(0)},
+       {OFFSET(mii1_rxdv), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_txd3), MODE(0)},
+       {OFFSET(mii1_txd2), MODE(0)},
+       {OFFSET(mii1_txd1), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_txd0), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_txclk), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxclk), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxd3), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxd2), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxd1), MODE(0) | RXACTIVE},
+       {OFFSET(mii1_rxd0), MODE(0) | RXACTIVE},
+       {OFFSET(rmii1_refclk), MODE(7) | RXACTIVE},
+       {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},
+       {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},
+       {-1},
+};
+
+static struct module_pin_mux pwm_pin_mux[] = {
+       {OFFSET(gpmc_a3), (MODE(6) | PULLUDDIS)},
+       {-1},
+};
+
+void enable_uart0_pin_mux(void)
+{
+       configure_module_pin_mux(uart0_pin_mux);
+}
+
+void enable_uart1_pin_mux(void)
+{
+       configure_module_pin_mux(uart1_pin_mux);
+}
+
+void enable_uart2_pin_mux(void)
+{
+       configure_module_pin_mux(uart2_pin_mux);
+}
+
+void enable_uart3_pin_mux(void)
+{
+}
+
+void enable_uart4_pin_mux(void)
+{
+       configure_module_pin_mux(uart4_pin_mux);
+}
+
+void enable_uart5_pin_mux(void)
+{
+}
+
+void enable_i2c0_pin_mux(void)
+{
+       configure_module_pin_mux(i2c0_pin_mux);
+}
+
+void enable_shc_board_pwm_pin_mux(void)
+{
+       configure_module_pin_mux(pwm_pin_mux);
+}
+
+void enable_shc_board_pin_mux(void)
+{
+       /* Do board-specific muxes. */
+       if (board_is_c3_sample() || board_is_series()) {
+               configure_module_pin_mux(mii1_pin_mux);
+               configure_module_pin_mux(mmc0_pin_mux);
+               configure_module_pin_mux(mmc1_pin_mux);
+               configure_module_pin_mux(mmc2_pin_mux);
+               configure_module_pin_mux(i2c0_pin_mux);
+               configure_module_pin_mux(gpio0_7_pin_mux);
+               configure_module_pin_mux(gpio_pin_mux);
+               configure_module_pin_mux(uart1_pin_mux);
+               configure_module_pin_mux(uart2_pin_mux);
+               configure_module_pin_mux(uart4_pin_mux);
+               configure_module_pin_mux(spi1_pin_mux);
+               configure_module_pin_mux(jtag_pin_mux);
+       } else {
+               puts("Unknown board, cannot configure pinmux.");
+               hang();
+       }
+}

diff --git a/board/broadcom/bcm23550_w1d/Kconfig b/board/broadcom/bcm23550_w1d/Kconfig
new file mode 100644 (file)
index 0000000..007a127
--- /dev/null
+++ b/board/broadcom/bcm23550_w1d/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_BCM23550_W1D
+
+config SYS_BOARD
+       default "bcm23550_w1d"
+
+config SYS_VENDOR
+       default "broadcom"
+
+config SYS_SOC
+       default "bcm235xx"
+
+config SYS_CONFIG_NAME
+       default "bcm23550_w1d"
+
+endif

diff --git a/board/broadcom/bcm23550_w1d/MAINTAINERS b/board/broadcom/bcm23550_w1d/MAINTAINERS
new file mode 100644 (file)
index 0000000..fdaa539
--- /dev/null
+++ b/board/broadcom/bcm23550_w1d/MAINTAINERS
@@ -0,0 +1,6 @@
+BCM23550_W1D BOARD
+M:     Steve Rae <srae@broadcom.com>
+S:     Maintained
+F:     board/broadcom/bcm23550_w1d/
+F:     include/configs/bcm23550_w1d.h
+F:     configs/bcm23550_w1d_defconfig

diff --git a/board/broadcom/bcm23550_w1d/Makefile b/board/broadcom/bcm23550_w1d/Makefile
new file mode 100644 (file)
index 0000000..76bd032
--- /dev/null
+++ b/board/broadcom/bcm23550_w1d/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y  += bcm23550_w1d.o

diff --git a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
new file mode 100644 (file)
index 0000000..0cb059f
--- /dev/null
+++ b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <mmc.h>
+#include <asm/kona-common/kona_sdhci.h>
+#include <asm/kona-common/clk.h>
+#include <asm/arch/sysmap.h>
+
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+#include <g_dnl.h>
+
+#define SECWATCHDOG_SDOGCR_OFFSET      0x00000000
+#define SECWATCHDOG_SDOGCR_EN_SHIFT    27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT        26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT  20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT    0
+
+#ifndef CONFIG_USB_SERIALNO
+#define CONFIG_USB_SERIALNO "1234567890"
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+       printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+       /* adress of boot parameters */
+       gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+       clk_init();
+
+       return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+       return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+       gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+                                   CONFIG_SYS_SDRAM_SIZE);
+       return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+       gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+       int ret = 0;
+
+       /* Register eMMC - SDIO2 */
+       ret = kona_sdhci_init(1, 400000, 0);
+       if (ret)
+               return ret;
+
+       /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+       ret = kona_sdhci_init(3, 400000, 0);
+       return ret;
+}
+#endif
+
+#ifdef CONFIG_USB_GADGET
+static struct dwc2_plat_otg_data bcm_otg_data = {
+       .regs_otg       = HSOTG_BASE_ADDR
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+       debug("%s: performing dwc2_udc_probe\n", __func__);
+       return dwc2_udc_probe(&bcm_otg_data);
+}
+
+int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
+{
+       debug("%s\n", __func__);
+       if (!getenv("serial#"))
+               g_dnl_set_serialnumber(CONFIG_USB_SERIALNO);
+       return 0;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+       debug("%s\n", __func__);
+       return 1;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+       debug("%s\n", __func__);
+       return 0;
+}
+#endif

diff --git a/board/dbau1x00/MAINTAINERS b/board/dbau1x00/MAINTAINERS
index b94ed8154c4699c4264bbbbf11907a2232c753ff..21853ed2fe97bf960af831e6befd220306f3bf5b 100644 (file)
--- a/board/dbau1x00/MAINTAINERS
+++ b/board/dbau1x00/MAINTAINERS
@@ -1,6 +1,6 @@
 DBAU1X00 BOARD
-M:     Thomas Lange <thomas@corelatus.se>
-S:     Maintained
+#M:    -
+S:     Orphan (since 2016-06)
 F:     board/dbau1x00/
 F:     include/configs/dbau1x00.h
 F:     configs/dbau1000_defconfig

diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index 33ad7dcf3e08d179832ba3cb200d469e037a5186..95ff68b3649f188f0749498596935ba44ea98941 100644 (file)
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -20,6 +20,7 @@
 
 #include "ls2080aqds_qixis.h"
 
+#define MC_BOOT_ENV_VAR "mcinitcmd"
 
 #ifdef CONFIG_FSL_MC_ENET
  /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
@@ -714,6 +715,7 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
 int board_eth_init(bd_t *bis)
 {
        int error;
+       char *mc_boot_env_var;
 #ifdef CONFIG_FSL_MC_ENET
        struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
        int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) &
@@ -781,6 +783,9 @@ int board_eth_init(bd_t *bis)
                }
        }
 
+       mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
+       if (mc_boot_env_var)
+               run_command_list(mc_boot_env_var, -1, 0);
        error = cpu_eth_init(bis);
 
        if (hwconfig_f("xqsgmii", env_hwconfig)) {

diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 897793d85b7db6dac3348e2e87245e6323010629..7d95debcaafd4ca13bdfe357ff1728a3acd5c4c9 100644 (file)
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -26,6 +26,7 @@
 
 #define PIN_MUX_SEL_SDHC       0x00
 #define PIN_MUX_SEL_DSPI       0x0a
+#define SCFG_QSPICLKCTRL_DIV_20        (5 << 27)
 
 #define SET_SDHC_MUX_SEL(reg, value)   ((reg & 0xf0) | value)
 
@@ -80,6 +81,8 @@ int checkboard(void)
                puts("PromJet\n");
        else if (sw == 0x9)
                puts("NAND\n");
+       else if (sw == 0xf)
+               puts("QSPI\n");
        else if (sw == 0x15)
                printf("IFCCard\n");
        else
@@ -207,6 +210,15 @@ int board_init(void)
        else
                config_board_mux(MUX_TYPE_SDHC);
 
+#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
+       val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
+
+       if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
+               QIXIS_WRITE(brdcfg[9],
+                           (QIXIS_READ(brdcfg[9]) & 0xf8) |
+                            FSL_QIXIS_BRDCFG9_QSPI);
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
        gd->env_addr = (ulong)&default_environment[0];
 #endif
@@ -218,7 +230,14 @@ int board_init(void)
 
 int board_early_init_f(void)
 {
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+       i2c_early_init_f();
+#endif
        fsl_lsch3_early_init_f();
+#ifdef CONFIG_FSL_QSPI
+       /* input clk: 1/2 platform clk, output: input/20 */
+       out_le32(SCFG_BASE + SCFG_QSPICLKCTLR, SCFG_QSPICLKCTRL_DIV_20);
+#endif
        return 0;
 }
 
@@ -298,6 +317,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
        fdt_fixup_memory_banks(blob, base, size, 2);
 
+       fdt_fixup_dr_usb(blob, bd);
+
 #ifdef CONFIG_FSL_MC_ENET
        fdt_fixup_board_enet(blob);
        err = fsl_mc_ldpaa_exit(bd);

diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index 58ea7465477c86e959ce2603247698c1d4aa9e15..799799c251c2f21ed9eb8fe57ee00b4bc7df7bb4 100644 (file)
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -20,9 +20,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define MC_BOOT_ENV_VAR "mcinitcmd"
 int board_eth_init(bd_t *bis)
 {
 #if defined(CONFIG_FSL_MC_ENET)
+       char *mc_boot_env_var;
        int i, interface;
        struct memac_mdio_info mdio_info;
        struct mii_dev *dev;
@@ -89,6 +91,9 @@ int board_eth_init(bd_t *bis)
                }
        }
 
+       mc_boot_env_var = getenv(MC_BOOT_ENV_VAR);
+       if (mc_boot_env_var)
+               run_command_list(mc_boot_env_var, -1, 0);
        cpu_eth_init(bis);
 #endif /* CONFIG_FMAN_ENET */
 

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 52e5e3f516d341da0bc7b70e1093aa3d2f2044b0..a65cd4ab8053d9ac2f5ff35be6516015ca772f8c 100644 (file)
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -281,6 +281,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
        fdt_fixup_memory_banks(blob, base, size, 2);
 
+       fdt_fixup_dr_usb(blob, bd);
+
 #ifdef CONFIG_FSL_MC_ENET
        fdt_fixup_board_enet(blob);
        err = fsl_mc_ldpaa_exit(bd);

diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
index c2e9c5739bf1629994ef4831754c8b64fdc6b461..d63a979be5899d45c910fb24058e0e2ea95b827f 100644 (file)
--- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
+++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
@@ -321,39 +321,6 @@ static void setup_gpmi_nand(void)
 }
 #endif
 
-int mx6_rgmii_rework(struct phy_device *phydev)
-{
-       unsigned short val;
-
-       /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-       val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-       val &= 0xffe3;
-       val |= 0x18;
-       phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-       /* introduce tx clock delay */
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-       val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-       val |= 0x0100;
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
-       return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-       mx6_rgmii_rework(phydev);
-
-       if (phydev->drv->config)
-               phydev->drv->config(phydev);
-
-       return 0;
-}
-
 static void setup_fec(void)
 {
        if (is_mx6dqp()) {
@@ -625,9 +592,9 @@ int board_late_init(void)
 
        if (is_mx6dqp())
                setenv("board_rev", "MX6QP");
-       else if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+       else if (is_mx6dq())
                setenv("board_rev", "MX6Q");
-       else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO))
+       else if (is_mx6sdl())
                setenv("board_rev", "MX6DL");
 #endif
 

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 2319354fa33850b49f1f54239e85941023f1e788..0cf68097f4f43e3d5a278e86d357454c921b9146 100644 (file)
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -177,13 +177,27 @@ static iomux_v3_cfg_t const rgb_pads[] = {
        MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 | MUX_PAD_CTRL(NO_PAD_CTRL),
        MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 | MUX_PAD_CTRL(NO_PAD_CTRL),
        MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const bl_pads[] = {
        MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
+static void enable_backlight(void)
+{
+       imx_iomux_v3_setup_multiple_pads(bl_pads, ARRAY_SIZE(bl_pads));
+       gpio_direction_output(DISP0_PWR_EN, 1);
+}
+
 static void enable_rgb(struct display_info_t const *dev)
 {
        imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads));
-       gpio_direction_output(DISP0_PWR_EN, 1);
+       enable_backlight();
+}
+
+static void enable_lvds(struct display_info_t const *dev)
+{
+       enable_backlight();
 }
 
 static struct i2c_pads_info i2c_pad_info1 = {
@@ -370,7 +384,7 @@ struct display_info_t const displays[] = {{
        .addr   = 0,
        .pixfmt = IPU_PIX_FMT_RGB666,
        .detect = NULL,
-       .enable = NULL,
+       .enable = enable_lvds,
        .mode   = {
                .name           = "Hannstar-XGA",
                .refresh        = 60,
@@ -649,9 +663,9 @@ int board_late_init(void)
 
        if (is_mx6dqp())
                setenv("board_rev", "MX6QP");
-       else if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
+       else if (is_mx6dq())
                setenv("board_rev", "MX6Q");
-       else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO))
+       else if (is_mx6sdl())
                setenv("board_rev", "MX6DL");
 #endif
 

diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index f1915a8200680b6658a6b31d6179c5c0c6bbc76d..256d6029b4e6556ed13ad8f50312ccd7f445f1fa 100644 (file)
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -230,14 +230,14 @@ int board_mmc_init(bd_t *bis)
                        printf("Warning: you configured more USDHC controllers"
                                "(%d) than supported by the board\n", i + 1);
                        return -EINVAL;
-                       }
-
-                       ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
-                       if (ret) {
-                               printf("Warning: failed to initialize "
-                                       "mmc dev %d\n", i);
-                               return ret;
-                       }
+               }
+
+               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+               if (ret) {
+                       printf("Warning: failed to initialize "
+                               "mmc dev %d\n", i);
+                       return ret;
+               }
        }
 
        return 0;

diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 88d3fbd9b19ff4019135baadf637bc083e6c2038..92c92117cd9b2ecae52829725b02645b9ab080ff 100644 (file)
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -66,7 +66,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define IOX_SDI IMX_GPIO_NR(5, 10)
 #define IOX_STCP IMX_GPIO_NR(5, 7)
 #define IOX_SHCP IMX_GPIO_NR(5, 11)
-#define IOX_OE IMX_GPIO_NR(5, 18)
+#define IOX_OE IMX_GPIO_NR(5, 8)
 
 static iomux_v3_cfg_t const iox_pads[] = {
        /* IOX_SDI */
@@ -117,7 +117,7 @@ static enum qn_level seq[3][2] = {
 
 static enum qn_func qn_output[8] = {
        qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset,
-       qn_disable, qn_enable
+       qn_disable, qn_disable
 };
 
 static void iox74lv_init(void)
@@ -154,8 +154,6 @@ static void iox74lv_init(void)
         * shift register will be output to pins
         */
        gpio_direction_output(IOX_STCP, 1);
-
-       gpio_direction_output(IOX_OE, 1);
 };
 
 #ifdef CONFIG_SYS_I2C_MXC
@@ -305,7 +303,7 @@ static void setup_iomux_uart(void)
 
 #define QSPI_PAD_CTRL1 \
        (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
-        PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm)
+        PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
 
 static iomux_v3_cfg_t const quadspi_pads[] = {
        MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index c3062f1e95c9696e6834c4103d64aea40d4e4925..1f4fc03c8f558a2a3abc0cb2cf020b4a12e07028 100644 (file)
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -171,7 +171,7 @@ static enum qn_level seq[3][2] = {
 
 static enum qn_func qn_output[8] = {
        qn_disable, qn_reset, qn_reset, qn_reset, qn_reset, qn_reset, qn_enable,
-       qn_enable
+       qn_disable
 };
 
 static void iox74lv_init(void)

diff --git a/board/freescale/s32v234evb/Kconfig b/board/freescale/s32v234evb/Kconfig
new file mode 100644 (file)
index 0000000..e71dfc4
--- /dev/null
+++ b/board/freescale/s32v234evb/Kconfig
@@ -0,0 +1,23 @@
+if TARGET_S32V234EVB
+
+config SYS_CPU
+       string
+       default "armv8"
+
+config SYS_BOARD
+       string
+       default "s32v234evb"
+
+config SYS_VENDOR
+       string
+       default "freescale"
+
+config SYS_SOC
+       string
+       default "s32v234"
+
+config SYS_CONFIG_NAME
+       string
+       default "s32v234evb"
+
+endif

diff --git a/board/freescale/s32v234evb/MAINTAINERS b/board/freescale/s32v234evb/MAINTAINERS
new file mode 100644 (file)
index 0000000..62b2e1b
--- /dev/null
+++ b/board/freescale/s32v234evb/MAINTAINERS
@@ -0,0 +1,8 @@
+S32V234 Evaluation BOARD
+M:     Eddy Petrișor <eddy.petrisor@gmail.com>
+S:     Maintained
+F:     arch/arm/cpu/armv8/s32v234/
+F:     arch/arm/include/asm/arch-s32v234/
+F:     board/freescale/s32v234evb/
+F:     include/configs/s32v234evb.h
+F:     configs/s32v234evb_defconfig

diff --git a/board/freescale/s32v234evb/Makefile b/board/freescale/s32v234evb/Makefile
new file mode 100644 (file)
index 0000000..69e6d3e
--- /dev/null
+++ b/board/freescale/s32v234evb/Makefile
@@ -0,0 +1,11 @@
+#
+# (C) Copyright 2013-2015, Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y   := clock.o
+obj-y   += lpddr2.o
+obj-y   += s32v234evb.o
+
+#########################################################################

diff --git a/board/freescale/s32v234evb/clock.c b/board/freescale/s32v234evb/clock.c
new file mode 100644 (file)
index 0000000..d218c21
--- /dev/null
+++ b/board/freescale/s32v234evb/clock.c
@@ -0,0 +1,344 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mc_cgm_regs.h>
+#include <asm/arch/mc_me_regs.h>
+#include <asm/arch/clock.h>
+
+/*
+ * Select the clock reference for required pll.
+ * pll - ARM_PLL, PERIPH_PLL, ENET_PLL, DDR_PLL, VIDEO_PLL.
+ * refclk_freq - input referece clock frequency (FXOSC - 40 MHZ, FIRC - 48 MHZ)
+ */
+static int select_pll_source_clk(enum pll_type pll, u32 refclk_freq)
+{
+       u32 clk_src;
+       u32 pll_idx;
+       volatile struct src *src = (struct src *)SRC_SOC_BASE_ADDR;
+
+       /* select the pll clock source */
+       switch (refclk_freq) {
+       case FIRC_CLK_FREQ:
+               clk_src = SRC_GPR1_FIRC_CLK_SOURCE;
+               break;
+       case XOSC_CLK_FREQ:
+               clk_src = SRC_GPR1_XOSC_CLK_SOURCE;
+               break;
+       default:
+               /* The clock frequency for the source clock is unknown */
+               return -1;
+       }
+       /*
+        * The hardware definition is not uniform, it has to calculate again
+        * the recurrence formula.
+        */
+       switch (pll) {
+       case PERIPH_PLL:
+               pll_idx = 3;
+               break;
+       case ENET_PLL:
+               pll_idx = 1;
+               break;
+       case DDR_PLL:
+               pll_idx = 2;;
+               break;
+       default:
+               pll_idx = pll;
+       }
+
+       writel(readl(&src->gpr1) | SRC_GPR1_PLL_SOURCE(pll_idx, clk_src),
+              &src->gpr1);
+
+       return 0;
+}
+
+static void entry_to_target_mode(u32 mode)
+{
+       writel(mode | MC_ME_MCTL_KEY, MC_ME_MCTL);
+       writel(mode | MC_ME_MCTL_INVERTEDKEY, MC_ME_MCTL);
+       while ((readl(MC_ME_GS) & MC_ME_GS_S_MTRANS) != 0x00000000) ;
+}
+
+/*
+ * Program the pll according to the input parameters.
+ * pll - ARM_PLL, PERIPH_PLL, ENET_PLL, DDR_PLL, VIDEO_PLL.
+ * refclk_freq - input reference clock frequency (FXOSC - 40 MHZ, FIRC - 48 MHZ)
+ * freq - expected output frequency for PHY0
+ * freq1 - expected output frequency for PHY1
+ * dfs_nr - number of DFS modules for current PLL
+ * dfs - array with the activation dfs field, mfn and mfi
+ * plldv_prediv - divider of clkfreq_ref
+ * plldv_mfd - loop multiplication factor divider
+ * pllfd_mfn - numerator loop multiplication factor divider
+ * Please consult the PLLDIG chapter of platform manual
+ * before to use this function.
+ *)
+ */
+static int program_pll(enum pll_type pll, u32 refclk_freq, u32 freq0, u32 freq1,
+                      u32 dfs_nr, u32 dfs[][DFS_PARAMS_Nr], u32 plldv_prediv,
+                      u32 plldv_mfd, u32 pllfd_mfn)
+{
+       u32 i, rfdphi1, rfdphi, dfs_on = 0, fvco;
+
+       /*
+        * This formula is from platform reference manual (Rev. 1, 6/2015), PLLDIG chapter.
+        */
+       fvco =
+           (refclk_freq / plldv_prediv) * (plldv_mfd +
+                                           pllfd_mfn / (float)20480);
+
+       /*
+        * VCO should have value in [ PLL_MIN_FREQ, PLL_MAX_FREQ ]. Please consult
+        * the platform DataSheet in order to determine the allowed values.
+        */
+
+       if (fvco < PLL_MIN_FREQ || fvco > PLL_MAX_FREQ) {
+               return -1;
+       }
+
+       if (select_pll_source_clk(pll, refclk_freq) < 0) {
+               return -1;
+       }
+
+       rfdphi = fvco / freq0;
+
+       rfdphi1 = (freq1 == 0) ? 0 : fvco / freq1;
+
+       writel(PLLDIG_PLLDV_RFDPHI1_SET(rfdphi1) |
+              PLLDIG_PLLDV_RFDPHI_SET(rfdphi) |
+              PLLDIG_PLLDV_PREDIV_SET(plldv_prediv) |
+              PLLDIG_PLLDV_MFD(plldv_mfd), PLLDIG_PLLDV(pll));
+
+       writel(readl(PLLDIG_PLLFD(pll)) | PLLDIG_PLLFD_MFN_SET(pllfd_mfn) |
+              PLLDIG_PLLFD_SMDEN, PLLDIG_PLLFD(pll));
+
+       /* switch on the pll in current mode */
+       writel(readl(MC_ME_RUNn_MC(0)) | MC_ME_RUNMODE_MC_PLL(pll),
+              MC_ME_RUNn_MC(0));
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+       /* Only ARM_PLL, ENET_PLL and DDR_PLL */
+       if ((pll == ARM_PLL) || (pll == ENET_PLL) || (pll == DDR_PLL)) {
+               /* DFS clk enable programming */
+               writel(DFS_CTRL_DLL_RESET, DFS_CTRL(pll));
+
+               writel(DFS_DLLPRG1_CPICTRL_SET(0x5) |
+                      DFS_DLLPRG1_VSETTLCTRL_SET(0x1) |
+                      DFS_DLLPRG1_CALBYPEN_SET(0x0) |
+                      DFS_DLLPRG1_DACIN_SET(0x1) | DFS_DLLPRG1_LCKWT_SET(0x0) |
+                      DFS_DLLPRG1_V2IGC_SET(0x5), DFS_DLLPRG1(pll));
+
+               for (i = 0; i < dfs_nr; i++) {
+                       if (dfs[i][0]) {
+                               writel(DFS_DVPORTn_MFI_SET(dfs[i][2]) |
+                                      DFS_DVPORTn_MFN_SET(dfs[i][1]),
+                                      DFS_DVPORTn(pll, i));
+                               dfs_on |= (dfs[i][0] << i);
+                       }
+               }
+
+               writel(readl(DFS_CTRL(pll)) & ~DFS_CTRL_DLL_RESET,
+                      DFS_CTRL(pll));
+               writel(readl(DFS_PORTRESET(pll)) &
+                      ~DFS_PORTRESET_PORTRESET_SET(dfs_on),
+                      DFS_PORTRESET(pll));
+               while ((readl(DFS_PORTSR(pll)) & dfs_on) != dfs_on) ;
+       }
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+       return 0;
+
+}
+
+static void aux_source_clk_config(uintptr_t cgm_addr, u8 ac, u32 source)
+{
+       /* select the clock source */
+       writel(MC_CGM_ACn_SEL_SET(source), CGM_ACn_SC(cgm_addr, ac));
+}
+
+static void aux_div_clk_config(uintptr_t cgm_addr, u8 ac, u8 dc, u32 divider)
+{
+       /* set the divider */
+       writel(MC_CGM_ACn_DCm_DE | MC_CGM_ACn_DCm_PREDIV(divider),
+              CGM_ACn_DCm(cgm_addr, ac, dc));
+}
+
+static void setup_sys_clocks(void)
+{
+
+       /* set ARM PLL DFS 1 as SYSCLK */
+       writel((readl(MC_ME_RUNn_MC(0)) & ~MC_ME_RUNMODE_MC_SYSCLK_MASK) |
+              MC_ME_RUNMODE_MC_SYSCLK(0x2), MC_ME_RUNn_MC(0));
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+       /* select sysclks  ARMPLL, ARMPLLDFS2, ARMPLLDFS3 */
+       writel(MC_ME_RUNMODE_SEC_CC_I_SYSCLK
+              (0x2,
+               MC_ME_RUNMODE_SEC_CC_I_SYSCLK1_OFFSET) |
+              MC_ME_RUNMODE_SEC_CC_I_SYSCLK(0x2,
+                                            MC_ME_RUNMODE_SEC_CC_I_SYSCLK2_OFFSET)
+              | MC_ME_RUNMODE_SEC_CC_I_SYSCLK(0x2,
+                                              MC_ME_RUNMODE_SEC_CC_I_SYSCLK3_OFFSET),
+              MC_ME_RUNn_SEC_CC_I(0));
+
+       /* setup the sys clock divider for CORE_CLK (1000MHz) */
+       writel(MC_CGM_SC_DCn_DE | MC_CGM_SC_DCn_PREDIV(0x0),
+              CGM_SC_DCn(MC_CGM1_BASE_ADDR, 0));
+
+       /* setup the sys clock divider for CORE2_CLK (500MHz) */
+       writel(MC_CGM_SC_DCn_DE | MC_CGM_SC_DCn_PREDIV(0x1),
+              CGM_SC_DCn(MC_CGM1_BASE_ADDR, 1));
+       /* setup the sys clock divider for SYS3_CLK (266 MHz) */
+       writel(MC_CGM_SC_DCn_DE | MC_CGM_SC_DCn_PREDIV(0x0),
+              CGM_SC_DCn(MC_CGM0_BASE_ADDR, 0));
+
+       /* setup the sys clock divider for SYS6_CLK (133 Mhz) */
+       writel(MC_CGM_SC_DCn_DE | MC_CGM_SC_DCn_PREDIV(0x1),
+              CGM_SC_DCn(MC_CGM0_BASE_ADDR, 1));
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+}
+
+static void setup_aux_clocks(void)
+{
+       /*
+        * setup the aux clock divider for PERI_CLK
+        * (source: PERIPH_PLL_PHI_0/5, PERI_CLK - 80 MHz)
+        */
+       aux_source_clk_config(MC_CGM0_BASE_ADDR, 5, MC_CGM_ACn_SEL_PERPLLDIVX);
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 5, 0, 4);
+
+       /* setup the aux clock divider for LIN_CLK (40MHz) */
+       aux_source_clk_config(MC_CGM0_BASE_ADDR, 3, MC_CGM_ACn_SEL_PERPLLDIVX);
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 3, 0, 1);
+
+       /* setup the aux clock divider for ENET_TIME_CLK (50MHz) */
+       aux_source_clk_config(MC_CGM0_BASE_ADDR, 7, MC_CGM_ACn_SEL_ENETPLL);
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 7, 1, 9);
+
+       /* setup the aux clock divider for ENET_CLK (50MHz) */
+       aux_source_clk_config(MC_CGM2_BASE_ADDR, 2, MC_CGM_ACn_SEL_ENETPLL);
+       aux_div_clk_config(MC_CGM2_BASE_ADDR, 2, 0, 9);
+
+       /* setup the aux clock divider for SDHC_CLK (50 MHz). */
+       aux_source_clk_config(MC_CGM0_BASE_ADDR, 15, MC_CGM_ACn_SEL_ENETPLL);
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 15, 0, 9);
+
+       /* setup the aux clock divider for DDR_CLK (533MHz) and APEX_SYS_CLK (266MHz) */
+       aux_source_clk_config(MC_CGM0_BASE_ADDR, 8, MC_CGM_ACn_SEL_DDRPLL);
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 8, 0, 0);
+       /* setup the aux clock divider for DDR4_CLK (133,25MHz) */
+       aux_div_clk_config(MC_CGM0_BASE_ADDR, 8, 1, 3);
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+}
+
+static void enable_modules_clock(void)
+{
+       /* PIT0 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL58);
+       /* PIT1 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL170);
+       /* LINFLEX0 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL83);
+       /* LINFLEX1 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL188);
+       /* ENET */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL50);
+       /* SDHC */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL93);
+       /* IIC0 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL81);
+       /* IIC1 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL184);
+       /* IIC2 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL186);
+       /* MMDC0 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL54);
+       /* MMDC1 */
+       writeb(MC_ME_PCTLn_RUNPCm(0), MC_ME_PCTL162);
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+}
+
+void clock_init(void)
+{
+       unsigned int arm_dfs[ARM_PLL_PHI1_DFS_Nr][DFS_PARAMS_Nr] = {
+               {ARM_PLL_PHI1_DFS1_EN, ARM_PLL_PHI1_DFS1_MFN,
+                ARM_PLL_PHI1_DFS1_MFI},
+               {ARM_PLL_PHI1_DFS2_EN, ARM_PLL_PHI1_DFS2_MFN,
+                ARM_PLL_PHI1_DFS2_MFI},
+               {ARM_PLL_PHI1_DFS3_EN, ARM_PLL_PHI1_DFS3_MFN,
+                ARM_PLL_PHI1_DFS3_MFI}
+       };
+
+       unsigned int enet_dfs[ENET_PLL_PHI1_DFS_Nr][DFS_PARAMS_Nr] = {
+               {ENET_PLL_PHI1_DFS1_EN, ENET_PLL_PHI1_DFS1_MFN,
+                ENET_PLL_PHI1_DFS1_MFI},
+               {ENET_PLL_PHI1_DFS2_EN, ENET_PLL_PHI1_DFS2_MFN,
+                ENET_PLL_PHI1_DFS2_MFI},
+               {ENET_PLL_PHI1_DFS3_EN, ENET_PLL_PHI1_DFS3_MFN,
+                ENET_PLL_PHI1_DFS3_MFI},
+               {ENET_PLL_PHI1_DFS4_EN, ENET_PLL_PHI1_DFS4_MFN,
+                ENET_PLL_PHI1_DFS4_MFI}
+       };
+
+       unsigned int ddr_dfs[DDR_PLL_PHI1_DFS_Nr][DFS_PARAMS_Nr] = {
+               {DDR_PLL_PHI1_DFS1_EN, DDR_PLL_PHI1_DFS1_MFN,
+                DDR_PLL_PHI1_DFS1_MFI},
+               {DDR_PLL_PHI1_DFS2_EN, DDR_PLL_PHI1_DFS2_MFN,
+                DDR_PLL_PHI1_DFS2_MFI},
+               {DDR_PLL_PHI1_DFS3_EN, DDR_PLL_PHI1_DFS3_MFN,
+                DDR_PLL_PHI1_DFS3_MFI}
+       };
+
+       writel(MC_ME_RUN_PCn_DRUN | MC_ME_RUN_PCn_RUN0 | MC_ME_RUN_PCn_RUN1 |
+              MC_ME_RUN_PCn_RUN2 | MC_ME_RUN_PCn_RUN3, MC_ME_RUN_PCn(0));
+
+       /* turn on FXOSC */
+       writel(MC_ME_RUNMODE_MC_MVRON | MC_ME_RUNMODE_MC_XOSCON |
+              MC_ME_RUNMODE_MC_FIRCON | MC_ME_RUNMODE_MC_SYSCLK(0x1),
+              MC_ME_RUNn_MC(0));
+
+       entry_to_target_mode(MC_ME_MCTL_RUN0);
+
+       program_pll(ARM_PLL, XOSC_CLK_FREQ, ARM_PLL_PHI0_FREQ,
+                   ARM_PLL_PHI1_FREQ, ARM_PLL_PHI1_DFS_Nr, arm_dfs,
+                   ARM_PLL_PLLDV_PREDIV, ARM_PLL_PLLDV_MFD, ARM_PLL_PLLDV_MFN);
+
+       setup_sys_clocks();
+
+       program_pll(PERIPH_PLL, XOSC_CLK_FREQ, PERIPH_PLL_PHI0_FREQ,
+                   PERIPH_PLL_PHI1_FREQ, PERIPH_PLL_PHI1_DFS_Nr, NULL,
+                   PERIPH_PLL_PLLDV_PREDIV, PERIPH_PLL_PLLDV_MFD,
+                   PERIPH_PLL_PLLDV_MFN);
+
+       program_pll(ENET_PLL, XOSC_CLK_FREQ, ENET_PLL_PHI0_FREQ,
+                   ENET_PLL_PHI1_FREQ, ENET_PLL_PHI1_DFS_Nr, enet_dfs,
+                   ENET_PLL_PLLDV_PREDIV, ENET_PLL_PLLDV_MFD,
+                   ENET_PLL_PLLDV_MFN);
+
+       program_pll(DDR_PLL, XOSC_CLK_FREQ, DDR_PLL_PHI0_FREQ,
+                   DDR_PLL_PHI1_FREQ, DDR_PLL_PHI1_DFS_Nr, ddr_dfs,
+                   DDR_PLL_PLLDV_PREDIV, DDR_PLL_PLLDV_MFD, DDR_PLL_PLLDV_MFN);
+
+       program_pll(VIDEO_PLL, XOSC_CLK_FREQ, VIDEO_PLL_PHI0_FREQ,
+                   VIDEO_PLL_PHI1_FREQ, VIDEO_PLL_PHI1_DFS_Nr, NULL,
+                   VIDEO_PLL_PLLDV_PREDIV, VIDEO_PLL_PLLDV_MFD,
+                   VIDEO_PLL_PLLDV_MFN);
+
+       setup_aux_clocks();
+
+       enable_modules_clock();
+
+}

diff --git a/board/freescale/s32v234evb/lpddr2.c b/board/freescale/s32v234evb/lpddr2.c
new file mode 100644 (file)
index 0000000..ecc0842
--- /dev/null
+++ b/board/freescale/s32v234evb/lpddr2.c
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/siul.h>
+#include <asm/arch/lpddr2.h>
+#include <asm/arch/mmdc.h>
+
+volatile int mscr_offset_ck0;
+
+void lpddr2_config_iomux(uint8_t module)
+{
+       int i;
+
+       switch (module) {
+       case DDR0:
+               mscr_offset_ck0 = SIUL2_MSCRn(_DDR0_CKE0);
+               writel(LPDDR2_CLK0_PAD, SIUL2_MSCRn(_DDR0_CLK0));
+
+               writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR0_CKE0));
+               writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR0_CKE1));
+
+               writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR0_CS_B0));
+               writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR0_CS_B1));
+
+               for (i = _DDR0_DM0; i <= _DDR0_DM3; i++)
+                       writel(LPDDR2_DMn_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR0_DQS0; i <= _DDR0_DQS3; i++)
+                       writel(LPDDR2_DQSn_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR0_A0; i <= _DDR0_A9; i++)
+                       writel(LPDDR2_An_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR0_D0; i <= _DDR0_D31; i++)
+                       writel(LPDDR2_Dn_PAD, SIUL2_MSCRn(i));
+               break;
+       case DDR1:
+               writel(LPDDR2_CLK0_PAD, SIUL2_MSCRn(_DDR1_CLK0));
+
+               writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR1_CKE0));
+               writel(LPDDR2_CKEn_PAD, SIUL2_MSCRn(_DDR1_CKE1));
+
+               writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR1_CS_B0));
+               writel(LPDDR2_CS_Bn_PAD, SIUL2_MSCRn(_DDR1_CS_B1));
+
+               for (i = _DDR1_DM0; i <= _DDR1_DM3; i++)
+                       writel(LPDDR2_DMn_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR1_DQS0; i <= _DDR1_DQS3; i++)
+                       writel(LPDDR2_DQSn_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR1_A0; i <= _DDR1_A9; i++)
+                       writel(LPDDR2_An_PAD, SIUL2_MSCRn(i));
+
+               for (i = _DDR1_D0; i <= _DDR1_D31; i++)
+                       writel(LPDDR2_Dn_PAD, SIUL2_MSCRn(i));
+               break;
+       }
+}
+
+void config_mmdc(uint8_t module)
+{
+       unsigned long mmdc_addr = (module) ? MMDC1_BASE_ADDR : MMDC0_BASE_ADDR;
+
+       writel(MMDC_MDSCR_CFG_VALUE, mmdc_addr + MMDC_MDSCR);
+
+       writel(MMDC_MDCFG0_VALUE, mmdc_addr + MMDC_MDCFG0);
+       writel(MMDC_MDCFG1_VALUE, mmdc_addr + MMDC_MDCFG1);
+       writel(MMDC_MDCFG2_VALUE, mmdc_addr + MMDC_MDCFG2);
+       writel(MMDC_MDCFG3LP_VALUE, mmdc_addr + MMDC_MDCFG3LP);
+       writel(MMDC_MDOTC_VALUE, mmdc_addr + MMDC_MDOTC);
+       writel(MMDC_MDMISC_VALUE, mmdc_addr + MMDC_MDMISC);
+       writel(MMDC_MDOR_VALUE, mmdc_addr + MMDC_MDOR);
+       writel(_MDCTL, mmdc_addr + MMDC_MDCTL);
+
+       writel(MMDC_MPMUR0_VALUE, mmdc_addr + MMDC_MPMUR0);
+
+       while (readl(mmdc_addr + MMDC_MPMUR0) & MMDC_MPMUR0_FRC_MSR) {
+       }
+
+       writel(MMDC_MDSCR_RST_VALUE, mmdc_addr + MMDC_MDSCR);
+
+       /* Perform ZQ calibration */
+       writel(MMDC_MPZQLP2CTL_VALUE, mmdc_addr + MMDC_MPZQLP2CTL);
+       writel(MMDC_MPZQHWCTRL_VALUE, mmdc_addr + MMDC_MPZQHWCTRL);
+       while (readl(mmdc_addr + MMDC_MPZQHWCTRL) & MMDC_MPZQHWCTRL_ZQ_HW_FOR) {
+       }
+
+       /* Enable MMDC with CS0 */
+       writel(_MDCTL + 0x80000000, mmdc_addr + MMDC_MDCTL);
+
+       /* Complete the initialization sequence as defined by JEDEC */
+       writel(MMDC_MDSCR_MR1_VALUE, mmdc_addr + MMDC_MDSCR);
+       writel(MMDC_MDSCR_MR2_VALUE, mmdc_addr + MMDC_MDSCR);
+       writel(MMDC_MDSCR_MR3_VALUE, mmdc_addr + MMDC_MDSCR);
+       writel(MMDC_MDSCR_MR10_VALUE, mmdc_addr + MMDC_MDSCR);
+
+       /* Set the amount of DRAM */
+       /* Set DQS settings based on board type */
+
+       switch (module) {
+       case MMDC0:
+               writel(MMDC_MDASP_MODULE0_VALUE, mmdc_addr + MMDC_MDASP);
+               writel(MMDC_MPRDDLCTL_MODULE0_VALUE,
+                      mmdc_addr + MMDC_MPRDDLCTL);
+               writel(MMDC_MPWRDLCTL_MODULE0_VALUE,
+                      mmdc_addr + MMDC_MPWRDLCTL);
+               writel(MMDC_MPDGCTRL0_MODULE0_VALUE,
+                      mmdc_addr + MMDC_MPDGCTRL0);
+               writel(MMDC_MPDGCTRL1_MODULE0_VALUE,
+                      mmdc_addr + MMDC_MPDGCTRL1);
+               break;
+       case MMDC1:
+               writel(MMDC_MDASP_MODULE1_VALUE, mmdc_addr + MMDC_MDASP);
+               writel(MMDC_MPRDDLCTL_MODULE1_VALUE,
+                      mmdc_addr + MMDC_MPRDDLCTL);
+               writel(MMDC_MPWRDLCTL_MODULE1_VALUE,
+                      mmdc_addr + MMDC_MPWRDLCTL);
+               writel(MMDC_MPDGCTRL0_MODULE1_VALUE,
+                      mmdc_addr + MMDC_MPDGCTRL0);
+               writel(MMDC_MPDGCTRL1_MODULE1_VALUE,
+                      mmdc_addr + MMDC_MPDGCTRL1);
+               break;
+       }
+
+       writel(MMDC_MDRWD_VALUE, mmdc_addr + MMDC_MDRWD);
+       writel(MMDC_MDPDC_VALUE, mmdc_addr + MMDC_MDPDC);
+       writel(MMDC_MDREF_VALUE, mmdc_addr + MMDC_MDREF);
+       writel(MMDC_MPODTCTRL_VALUE, mmdc_addr + MMDC_MPODTCTRL);
+       writel(MMDC_MDSCR_DEASSERT_VALUE, mmdc_addr + MMDC_MDSCR);
+
+}

diff --git a/board/freescale/s32v234evb/s32v234evb.c b/board/freescale/s32v234evb/s32v234evb.c
new file mode 100644 (file)
index 0000000..3100f09
--- /dev/null
+++ b/board/freescale/s32v234evb/s32v234evb.c
@@ -0,0 +1,183 @@
+/*
+ * (C) Copyright 2013-2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/siul.h>
+#include <asm/arch/lpddr2.h>
+#include <asm/arch/clock.h>
+#include <mmc.h>
+#include <fsl_esdhc.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void setup_iomux_ddr(void)
+{
+       lpddr2_config_iomux(DDR0);
+       lpddr2_config_iomux(DDR1);
+
+}
+
+void ddr_phy_init(void)
+{
+}
+
+void ddr_ctrl_init(void)
+{
+       config_mmdc(0);
+       config_mmdc(1);
+}
+
+int dram_init(void)
+{
+       setup_iomux_ddr();
+
+       ddr_ctrl_init();
+
+       gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+
+       return 0;
+}
+
+static void setup_iomux_uart(void)
+{
+       /* Muxing for linflex */
+       /* Replace the magic values after bringup */
+
+       /* set TXD - MSCR[12] PA12 */
+       writel(SIUL2_UART_TXD, SIUL2_MSCRn(SIUL2_UART0_TXD_PAD));
+
+       /* set RXD - MSCR[11] - PA11 */
+       writel(SIUL2_UART_MSCR_RXD, SIUL2_MSCRn(SIUL2_UART0_MSCR_RXD_PAD));
+
+       /* set RXD - IMCR[200] - 200 */
+       writel(SIUL2_UART_IMCR_RXD, SIUL2_IMCRn(SIUL2_UART0_IMCR_RXD_PAD));
+}
+
+static void setup_iomux_enet(void)
+{
+}
+
+static void setup_iomux_i2c(void)
+{
+}
+
+#ifdef CONFIG_SYS_USE_NAND
+void setup_iomux_nfc(void)
+{
+}
+#endif
+
+#ifdef CONFIG_FSL_ESDHC
+struct fsl_esdhc_cfg esdhc_cfg[1] = {
+       {USDHC_BASE_ADDR},
+};
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+       /* eSDHC1 is always present */
+       return 1;
+}
+
+int board_mmc_init(bd_t * bis)
+{
+       esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_USDHC_CLK);
+
+       /* Set iomux PADS for USDHC */
+
+       /* PK6 pad: uSDHC clk */
+       writel(SIUL2_USDHC_PAD_CTRL_CLK, SIUL2_MSCRn(150));
+       writel(0x3, SIUL2_MSCRn(902));
+
+       /* PK7 pad: uSDHC CMD */
+       writel(SIUL2_USDHC_PAD_CTRL_CMD, SIUL2_MSCRn(151));
+       writel(0x3, SIUL2_MSCRn(901));
+
+       /* PK8 pad: uSDHC DAT0 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(152));
+       writel(0x3, SIUL2_MSCRn(903));
+
+       /* PK9 pad: uSDHC DAT1 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(153));
+       writel(0x3, SIUL2_MSCRn(904));
+
+       /* PK10 pad: uSDHC DAT2 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(154));
+       writel(0x3, SIUL2_MSCRn(905));
+
+       /* PK11 pad: uSDHC DAT3 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(155));
+       writel(0x3, SIUL2_MSCRn(906));
+
+       /* PK15 pad: uSDHC DAT4 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(159));
+       writel(0x3, SIUL2_MSCRn(907));
+
+       /* PL0 pad: uSDHC DAT5 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(160));
+       writel(0x3, SIUL2_MSCRn(908));
+
+       /* PL1 pad: uSDHC DAT6 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(161));
+       writel(0x3, SIUL2_MSCRn(909));
+
+       /* PL2 pad: uSDHC DAT7 */
+       writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(162));
+       writel(0x3, SIUL2_MSCRn(910));
+
+       return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
+}
+#endif
+
+static void mscm_init(void)
+{
+       struct mscm_ir *mscmir = (struct mscm_ir *)MSCM_BASE_ADDR;
+       int i;
+
+       for (i = 0; i < MSCM_IRSPRC_NUM; i++)
+               writew(MSCM_IRSPRC_CPn_EN, &mscmir->irsprc[i]);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+       if (phydev->drv->config)
+               phydev->drv->config(phydev);
+
+       return 0;
+}
+
+int board_early_init_f(void)
+{
+       clock_init();
+       mscm_init();
+
+       setup_iomux_uart();
+       setup_iomux_enet();
+       setup_iomux_i2c();
+#ifdef CONFIG_SYS_USE_NAND
+       setup_iomux_nfc();
+#endif
+       return 0;
+}
+
+int board_init(void)
+{
+       /* address of boot parameters */
+       gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+
+       return 0;
+}
+
+int checkboard(void)
+{
+       puts("Board: s32v234evb\n");
+
+       return 0;
+}

diff --git a/board/freescale/s32v234evb/s32v234evb.cfg b/board/freescale/s32v234evb/s32v234evb.cfg
new file mode 100644 (file)
index 0000000..6017a40
--- /dev/null
+++ b/board/freescale/s32v234evb/s32v234evb.cfg
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2013-2015, Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+/*
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+#include <asm/imx-common/imximage.cfg>
+
+/* image version */
+IMAGE_VERSION  2
+BOOT_FROM sd
+
+
+/*
+ * Boot Device : one of qspi, sd:
+ * qspi:   flash_offset: 0x1000
+ * sd/mmc: flash_offset: 0x1000
+ */
+
+
+#ifdef CONFIG_SECURE_BOOT
+SECURE_BOOT
+#endif

diff --git a/board/gateworks/gw_ventana/README b/board/gateworks/gw_ventana/README
index 94189076970914a689c204fce6d055008f3434b5..f3f8998aae613787946465887bf3877577df6df4 100644 (file)
--- a/board/gateworks/gw_ventana/README
+++ b/board/gateworks/gw_ventana/README
@@ -173,13 +173,8 @@ OS load time which defeats the purpose of Falcon mode in the first place.
 The SPL decides to boot either U-Boot (u-boot.img) or the OS (args + kernel)
 based on the return value of the spl_start_uboot() function. While often
 this can simply be the state of a GPIO based pushbutton or DIP switch, for
-Gateworks Ventana, we use the U-Boot environment 'boot_os' variable which if
-set to '1' will choose to boot the OS rather than U-Boot. While the choice
-of adding env support to the SPL adds a little bit of time to the boot
-process as well as (significant really) SPL code space this was deemed most
-flexible as within the large variety of Gateworks Ventana boards not all of
-them have a user pushbutton and that pushbutton may be configured as a hard
-reset per user configuration.
+Gateworks Ventana, we use an EEPROM register on i2c-0 at 0x50:0x00:
+set to '0' will choose to boot to U-Boot and otherwise it will boot to OS.
 
 To use Falcon mode it is required that you first 'prepare' the 'args' data
 that is stored on your boot medium along with the kernel (which can be any
@@ -235,8 +230,8 @@ using rootfs (ubi), kernel (uImage), and dtb from the network:
  # flash args (at 17MB)
  Ventana > nand erase.part args && nand write 18000000 args 100000
 
- # set boot_os env var to enable booting to Linux
- Ventana > setenv boot_os 1 && saveenv
+ # set i2c register 0x50:0x00=0 to boot to Linux
+ Ventana > i2c dev 0 && i2c mw 0x50 0x00.0 0 1
 
 Be sure to adjust 'bootargs' above to your OS needs (this will be different
 for various distros such as OpenWrt, Yocto, Android, etc). You can use the
@@ -309,8 +304,8 @@ out in U-Boot and use the following to enable Falcon mode:
  # write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)
  Ventana > mmc write 18000000 0x800 0x800
 
- # set boot_os to enable falcon mode
- Ventana > setenv boot_os 1 && saveenv
+ # set i2c register 0x50:0x00=0 to boot to Linux
+ Ventana > i2c dev 0 && i2c mw 0x50 0x00.0 0 1
 
 Be sure to adjust 'bootargs' above to your OS needs (this will be different
 for various distros such as OpenWrt, Yocto, Android, etc). You can use the

diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index a20190eef080fb93148faa3cf0e298727f51e229..929dde9880a8dd4658543e456e4d058d156a0557 100644 (file)
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -132,10 +132,10 @@ void setup_ventana_i2c(void)
 
 /* common to add baseboards */
 static iomux_v3_cfg_t const gw_gpio_pads[] = {
-       /* MSATA_EN */
-       IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
        /* RS232_EN# */
        IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | DIO_PAD_CFG),
+       /* SD3_VSELECT */
+       IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
 };
 
 /* prototype */
@@ -183,6 +183,8 @@ static iomux_v3_cfg_t const gw51xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
+       /* MSATA_EN */
+       IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
        /* PANLEDG# */
        IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
        /* PANLEDR# */
@@ -212,6 +214,8 @@ static iomux_v3_cfg_t const gw52xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
+       /* MSATA_EN */
+       IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
        /* CAN_STBY */
        IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
        /* USB_HUBRST# */
@@ -241,6 +245,8 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw54xx_gpio_pads[] = {
+       /* MSATA_EN */
+       IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
        /* CAN_STBY */
        IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG),
        /* PANLEDG# */
@@ -283,6 +289,8 @@ static iomux_v3_cfg_t const gw551x_gpio_pads[] = {
 };
 
 static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
+       /* MSATA_EN */
+       IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | DIO_PAD_CFG),
        /* USBOTG_SEL */
        IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
        /* USB_HUBRST# */
@@ -310,6 +318,20 @@ static iomux_v3_cfg_t const gw552x_gpio_pads[] = {
        IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
 };
 
+static iomux_v3_cfg_t const gw553x_gpio_pads[] = {
+       /* PANLEDG# */
+       IOMUX_PADS(PAD_KEY_COL2__GPIO4_IO10 | DIO_PAD_CFG),
+       /* PANLEDR# */
+       IOMUX_PADS(PAD_KEY_ROW2__GPIO4_IO11 | DIO_PAD_CFG),
+
+       /* VID_PWR */
+       IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG),
+       /* PCI_RST# */
+       IOMUX_PADS(PAD_GPIO_0__GPIO1_IO00 | DIO_PAD_CFG),
+       /* PCIESKT_WDIS# */
+       IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
+};
+
 
 /*
  * Board Specific GPIO
@@ -445,6 +467,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
                .vidin_en = IMX_GPIO_NR(3, 31),
                .usb_sel = IMX_GPIO_NR(1, 2),
                .wdis = IMX_GPIO_NR(7, 12),
+               .msata_en = GP_MSATA_SEL,
        },
 
        /* GW53xx */
@@ -489,6 +512,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
                .gps_shdn = IMX_GPIO_NR(1, 27),
                .vidin_en = IMX_GPIO_NR(3, 31),
                .wdis = IMX_GPIO_NR(7, 12),
+               .msata_en = GP_MSATA_SEL,
        },
 
        /* GW54xx */
@@ -535,6 +559,7 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
                .dioi2c_en = IMX_GPIO_NR(4,  5),
                .pcie_sson = IMX_GPIO_NR(1, 20),
                .wdis = IMX_GPIO_NR(5, 17),
+               .msata_en = GP_MSATA_SEL,
        },
 
        /* GW551x */
@@ -602,6 +627,47 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
                .pcie_rst = IMX_GPIO_NR(1, 29),
                .usb_sel = IMX_GPIO_NR(1, 7),
                .wdis = IMX_GPIO_NR(7, 12),
+               .msata_en = GP_MSATA_SEL,
+       },
+
+       /* GW553x */
+       {
+               .gpio_pads = gw553x_gpio_pads,
+               .num_pads = ARRAY_SIZE(gw553x_gpio_pads)/2,
+               .dio_cfg = {
+                       {
+                               { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
+                               IMX_GPIO_NR(1, 16),
+                               { 0, 0 },
+                               0
+                       },
+                       {
+                               { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) },
+                               IMX_GPIO_NR(1, 19),
+                               { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) },
+                               2
+                       },
+                       {
+                               { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) },
+                               IMX_GPIO_NR(1, 17),
+                               { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) },
+                               3
+                       },
+                       {
+                               { IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18) },
+                               IMX_GPIO_NR(1, 18),
+                               { IOMUX_PADS(PAD_SD1_CMD__PWM4_OUT) },
+                               4
+                       },
+               },
+               .num_gpios = 4,
+               .leds = {
+                       IMX_GPIO_NR(4, 10),
+                       IMX_GPIO_NR(4, 11),
+               },
+               .pcie_rst = IMX_GPIO_NR(1, 0),
+               .vidin_en = IMX_GPIO_NR(5, 20),
+               .wdis = IMX_GPIO_NR(7, 12),
        },
 };
 
@@ -616,10 +682,6 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
        gpio_request(GP_USB_OTG_PWR, "usbotg_pwr");
        gpio_direction_output(GP_USB_OTG_PWR, 0);
 
-       /* MSATA Enable - default to PCI */
-       gpio_request(GP_MSATA_SEL, "msata_en");
-       gpio_direction_output(GP_MSATA_SEL, 0);
-
        /* RS232_EN# */
        gpio_request(GP_RS232_EN, "rs232_en");
        gpio_direction_output(GP_RS232_EN, 0);
@@ -649,6 +711,12 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
                }
        }
 
+       /* MSATA Enable - default to PCI */
+       if (gpio_cfg[board].msata_en) {
+               gpio_request(gpio_cfg[board].msata_en, "msata_en");
+               gpio_direction_output(gpio_cfg[board].msata_en, 0);
+       }
+
        /* Expansion Mezzanine IO */
        if (gpio_cfg[board].mezz_pwren) {
                gpio_request(gpio_cfg[board].mezz_pwren, "mezz_pwr");
@@ -700,6 +768,11 @@ void setup_iomux_gpio(int board, struct ventana_board_info *info)
                gpio_request(gpio_cfg[board].wdis, "wlan_dis");
                gpio_direction_output(gpio_cfg[board].wdis, 1);
        }
+
+       /* sense vselect pin to see if we support uhs-i */
+       gpio_request(GP_SD3_VSELECT, "sd3_vselect");
+       gpio_direction_input(GP_SD3_VSELECT);
+       gpio_cfg[board].usd_vsel = !gpio_get_value(GP_SD3_VSELECT);
 }
 
 /* setup GPIO pinmux and default configuration per baseboard and env */
@@ -718,10 +791,9 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
        gpio_direction_output(GP_RS232_EN, (hwconfig("rs232")) ? 0 : 1);
 
        /* MSATA Enable */
-       if (is_cpu_type(MXC_CPU_MX6Q) &&
-           test_bit(EECONFIG_SATA, info->config)) {
+       if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
                gpio_direction_output(GP_MSATA_SEL,
-                                     (hwconfig("msata")) ?  1 : 0);
+                                     (hwconfig("msata")) ? 1 : 0);
        }
 
        /* USBOTG Select (PCISKT or FrontPanel) */
@@ -760,8 +832,13 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
                                               ctrl);
                        gpio_requestf(cfg->gpio_param, "dio%d", i);
                        gpio_direction_input(cfg->gpio_param);
-               } else if (hwconfig_subarg_cmp("dio2", "mode", "pwm") &&
+               } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
                           cfg->pwm_padmux) {
+                       if (!cfg->pwm_param) {
+                               printf("DIO%d:  Error: pwm config invalid\n",
+                                       i);
+                               continue;
+                       }
                        if (!quiet)
                                printf("DIO%d:  pwm%d\n", i, cfg->pwm_param);
                        imx_iomux_v3_setup_pad(cfg->pwm_padmux[cputype] |
@@ -770,8 +847,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info)
        }
 
        if (!quiet) {
-               if (is_cpu_type(MXC_CPU_MX6Q) &&
-                   (test_bit(EECONFIG_SATA, info->config))) {
+               if (gpio_cfg[board].msata_en && is_cpu_type(MXC_CPU_MX6Q)) {
                        printf("MSATA: %s\n", (hwconfig("msata") ?
                               "enabled" : "disabled"));
                }

diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
index 28f58160de516189fd980d4c70fab82bff31f07b..d037767ecc8f81408d2a5f96d45e1d04fa1d1154 100644 (file)
--- a/board/gateworks/gw_ventana/common.h
+++ b/board/gateworks/gw_ventana/common.h
@@ -17,6 +17,7 @@
 #define GP_SD3_CD      IMX_GPIO_NR(7, 0)
 #define GP_RS232_EN    IMX_GPIO_NR(2, 11)
 #define GP_MSATA_SEL   IMX_GPIO_NR(2, 8)
+#define GP_SD3_VSELECT IMX_GPIO_NR(6, 14)
 
 #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
        PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
@@ -76,6 +77,8 @@ struct ventana {
        int pcie_sson;
        int usb_sel;
        int wdis;
+       int msata_en;
+       bool usd_vsel;
 };
 
 extern struct ventana gpio_cfg[GW_UNKNOWN];

diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index ba159696b43cf51e85bdd71414eb1faa61fc2753..1382e5debea12b1fbfc2dc5d395ff27dd4f94244 100644 (file)
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -87,6 +87,9 @@ read_eeprom(int bus, struct ventana_board_info *info)
                } else if (info->model[4] == '2') {
                        type = GW552x;
                        break;
+               } else if (info->model[4] == '3') {
+                       type = GW553x;
+                       break;
                }
                /* fall through */
        default:
@@ -100,43 +103,12 @@ read_eeprom(int bus, struct ventana_board_info *info)
 /* list of config bits that the bootloader will remove from dtb if not set */
 struct ventana_eeprom_config econfig[] = {
        { "eth0", "ethernet0", EECONFIG_ETH0 },
-       { "eth1", "ethernet1", EECONFIG_ETH1 },
-       { "sata", "ahci0", EECONFIG_SATA },
-       { "pcie", NULL, EECONFIG_PCIE},
-       { "lvds0", NULL, EECONFIG_LVDS0 },
-       { "lvds1", NULL, EECONFIG_LVDS1 },
        { "usb0", NULL, EECONFIG_USB0 },
        { "usb1", NULL, EECONFIG_USB1 },
        { "mmc0", NULL, EECONFIG_SD0 },
        { "mmc1", NULL, EECONFIG_SD1 },
        { "mmc2", NULL, EECONFIG_SD2 },
        { "mmc3", NULL, EECONFIG_SD3 },
-       { "uart0", NULL, EECONFIG_UART0 },
-       { "uart1", NULL, EECONFIG_UART1 },
-       { "uart2", NULL, EECONFIG_UART2 },
-       { "uart3", NULL, EECONFIG_UART3 },
-       { "uart4", NULL, EECONFIG_UART4 },
-       { "ipu0", NULL, EECONFIG_IPU0 },
-       { "ipu1", NULL, EECONFIG_IPU1 },
-       { "can0", NULL, EECONFIG_FLEXCAN },
-       { "i2c0", NULL, EECONFIG_I2C0 },
-       { "i2c1", NULL, EECONFIG_I2C1 },
-       { "i2c2", NULL, EECONFIG_I2C2 },
-       { "vpu", NULL, EECONFIG_VPU },
-       { "csi0", NULL, EECONFIG_CSI0 },
-       { "csi1", NULL, EECONFIG_CSI1 },
-       { "spi0", NULL, EECONFIG_ESPCI0 },
-       { "spi1", NULL, EECONFIG_ESPCI1 },
-       { "spi2", NULL, EECONFIG_ESPCI2 },
-       { "spi3", NULL, EECONFIG_ESPCI3 },
-       { "spi4", NULL, EECONFIG_ESPCI4 },
-       { "spi5", NULL, EECONFIG_ESPCI5 },
-       { "gps", "pps", EECONFIG_GPS },
-       { "hdmi_in", NULL, EECONFIG_HDMI_IN },
-       { "hdmi_out", NULL, EECONFIG_HDMI_OUT },
-       { "cvbs_in", NULL, EECONFIG_VID_IN },
-       { "cvbs_out", NULL, EECONFIG_VID_OUT },
-       { "nand", NULL, EECONFIG_NAND },
        { /* Sentinel */ }
 };
 

diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 3febd1276ebc081edc741c5cb787c52d75cf6b74..2ca6d5c7659a33738303a269f10b9b93b6e5448c 100644 (file)
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -11,6 +11,7 @@
 #include <i2c.h>
 #include <linux/ctype.h>
 
+#include "ventana_eeprom.h"
 #include "gsc.h"
 
 /*
@@ -70,6 +71,8 @@ static void read_hwmon(const char *name, uint reg, uint size)
                puts("fRD\n");
        } else {
                ui = buf[0] | (buf[1]<<8) | (buf[2]<<16);
+               if (reg == GSC_HWMON_TEMP && ui > 0x8000)
+                       ui -= 0xffff;
                if (ui == 0xffffff)
                        puts("invalid\n");
                else
@@ -79,7 +82,6 @@ static void read_hwmon(const char *name, uint reg, uint size)
 
 int gsc_info(int verbose)
 {
-       const char *model = getenv("model");
        unsigned char buf[16];
 
        i2c_set_bus_num(0);
@@ -96,6 +98,12 @@ int gsc_info(int verbose)
                gsc_i2c_write(GSC_SC_ADDR, GSC_SC_STATUS, 1,
                              &buf[GSC_SC_STATUS], 1);
        }
+       if (!gsc_i2c_read(GSC_HWMON_ADDR, GSC_HWMON_TEMP, 1, buf, 2)) {
+               int ui = buf[0] | buf[1]<<8;
+               if (ui > 0x8000)
+                       ui -= 0xffff;
+               printf(" board temp at %dC", ui / 10);
+       }
        puts("\n");
        if (!verbose)
                return CMD_RET_SUCCESS;
@@ -109,10 +117,11 @@ int gsc_info(int verbose)
        read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
        read_hwmon("VDD_DDR",  GSC_HWMON_VDD_DDR, 3);
        read_hwmon("VDD_5P0",  GSC_HWMON_VDD_5P0, 3);
-       read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
+       if (strncasecmp((const char*) ventana_info.model, "GW553", 5))
+               read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
        read_hwmon("VDD_1P8",  GSC_HWMON_VDD_1P8, 3);
        read_hwmon("VDD_IO2",  GSC_HWMON_VDD_IO2, 3);
-       switch (model[3]) {
+       switch (ventana_info.model[3]) {
        case '1': /* GW51xx */
                read_hwmon("VDD_IO3",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
                break;
@@ -160,6 +169,48 @@ int gsc_boot_wd_disable(void)
 }
 
 #ifdef CONFIG_CMD_GSC
+static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc,
+                       char * const argv[])
+{
+       unsigned char reg;
+       unsigned long secs = 0;
+
+       if (argc < 2)
+               return CMD_RET_USAGE;
+
+       secs = simple_strtoul(argv[1], NULL, 10);
+       printf("GSC Sleeping for %ld seconds\n", secs);
+
+       i2c_set_bus_num(0);
+       reg = (secs >> 24) & 0xff;
+       if (gsc_i2c_write(GSC_SC_ADDR, 9, 1, &reg, 1))
+               goto error;
+       reg = (secs >> 16) & 0xff;
+       if (gsc_i2c_write(GSC_SC_ADDR, 8, 1, &reg, 1))
+               goto error;
+       reg = (secs >> 8) & 0xff;
+       if (gsc_i2c_write(GSC_SC_ADDR, 7, 1, &reg, 1))
+               goto error;
+       reg = secs & 0xff;
+       if (gsc_i2c_write(GSC_SC_ADDR, 6, 1, &reg, 1))
+               goto error;
+       if (gsc_i2c_read(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+               goto error;
+       reg |= (1 << 2);
+       if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+               goto error;
+       reg &= ~(1 << 2);
+       reg |= 0x3;
+       if (gsc_i2c_write(GSC_SC_ADDR, GSC_SC_CTRL1, 1, &reg, 1))
+               goto error;
+
+       return CMD_RET_SUCCESS;
+
+error:
+       printf("i2c error\n");
+       return CMD_RET_FAILURE;
+}
+
 static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        unsigned char reg;
@@ -206,13 +257,15 @@ static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
        if (strcasecmp(argv[1], "wd") == 0)
                return do_gsc_wd(cmdtp, flag, --argc, ++argv);
+       else if (strcasecmp(argv[1], "sleep") == 0)
+               return do_gsc_sleep(cmdtp, flag, --argc, ++argv);
 
        return CMD_RET_USAGE;
 }
 
 U_BOOT_CMD(
        gsc, 4, 1, do_gsc, "GSC configuration",
-       "[wd enable [30|60]]|[wd disable]\n"
+       "[wd enable [30|60]]|[wd disable]|[sleep <secs>]\n"
        );
 
 #endif /* CONFIG_CMD_GSC */

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index e2eeef37936610534f476096e97a704b29c0e9db..70395ac91db69ec5659f4fad93138e6f4ec84bec 100644 (file)
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -21,6 +21,7 @@
 #include <asm/io.h>
 #include <dm.h>
 #include <dm/platform_data/serial_mxc.h>
+#include <hwconfig.h>
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
@@ -59,8 +60,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
        IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
        IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
        IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
-       /* CD */
-       IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(IRQ_PAD_CTRL)),
+       IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
 };
 
 /* ENET */
@@ -266,7 +266,9 @@ int board_phy_config(struct phy_device *phydev)
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FEC_MXC
-       if (board_type != GW551x && board_type != GW552x) {
+       struct ventana_board_info *info = &ventana_info;
+
+       if (test_bit(EECONFIG_ETH0, info->config)) {
                setup_iomux_enet(GP_PHY_RST);
                cpu_eth_init(bis);
        }
@@ -317,6 +319,8 @@ static void enable_lvds(struct display_info_t const *dev)
        writel(reg, &iomux->gpr[2]);
 
        /* Enable Backlight */
+       gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio");
+       gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
        gpio_request(IMX_GPIO_NR(1, 18), "bklt_en");
        SETUP_IOMUX_PAD(PAD_SD1_CMD__GPIO1_IO18 | DIO_PAD_CFG);
        gpio_direction_output(IMX_GPIO_NR(1, 18), 1);
@@ -456,8 +460,7 @@ static void setup_display(void)
               <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
        writel(reg, &iomux->gpr[3]);
 
-       /* Backlight CABEN on LVDS connector */
-       gpio_request(IMX_GPIO_NR(1, 10), "bklt_gpio");
+       /* LVDS Backlight GPIO on LVDS connector - output low */
        SETUP_IOMUX_PAD(PAD_SD2_CLK__GPIO1_IO10 | DIO_PAD_CFG);
        gpio_direction_output(IMX_GPIO_NR(1, 10), 0);
 }
@@ -697,7 +700,9 @@ int misc_init_r(void)
                        setenv("model_base", str);
                        sprintf(fdt, "%s-%s.dtb", cputype, str);
                        setenv("fdt_file1", fdt);
-                       if (board_type != GW551x && board_type != GW552x)
+                       if (board_type != GW551x &&
+                           board_type != GW552x &&
+                           board_type != GW553x)
                                str[4] = 'x';
                        str[5] = 'x';
                        str[6] = 0;
@@ -776,6 +781,27 @@ static int ft_sethdmiinfmt(void *blob, char *mode)
        return 0;
 }
 
+/* enable a property of a node if the node is found */
+static inline void ft_enable_path(void *blob, const char *path)
+{
+       int i = fdt_path_offset(blob, path);
+       if (i >= 0) {
+               debug("enabling %s\n", path);
+               fdt_status_okay(blob, i);
+       }
+}
+
+/* remove a property of a node if the node is found */
+static inline void ft_delprop_path(void *blob, const char *path,
+                                  const char *name)
+{
+       int i = fdt_path_offset(blob, path);
+       if (i) {
+               debug("removing %s/%s\n", path, name);
+               fdt_delprop(blob, i, name);
+       }
+}
+
 /*
  * called prior to booting kernel or by 'fdt boardsetup' command
  *
@@ -879,6 +905,11 @@ int ft_board_setup(void *blob, bd_t *bd)
                                range[1] = cpu_to_fdt32(23);
                        }
                }
+
+               /* these have broken usd_vsel */
+               if (strstr((const char *)info->model, "SP318-B") ||
+                   strstr((const char *)info->model, "SP331-B"))
+                       gpio_cfg[board_type].usd_vsel = 0;
        }
 
        /*
@@ -919,6 +950,32 @@ int ft_board_setup(void *blob, bd_t *bd)
                ft_sethdmiinfmt(blob, "yuv422bt656");
        }
 
+       /* Configure DIO */
+       for (i = 0; i < gpio_cfg[board_type].num_gpios; i++) {
+               struct dio_cfg *cfg = &gpio_cfg[board_type].dio_cfg[i];
+               char arg[10];
+
+               sprintf(arg, "dio%d", i);
+               if (!hwconfig(arg))
+                       continue;
+               if (hwconfig_subarg_cmp(arg, "mode", "pwm") && cfg->pwm_param)
+               {
+                       char path[48];
+                       sprintf(path, "/soc/aips-bus@02000000/pwm@%08x",
+                               0x02080000 + (0x4000 * (cfg->pwm_param - 1)));
+                       printf("   Enabling pwm%d for DIO%d\n",
+                              cfg->pwm_param, i);
+                       ft_enable_path(blob, path);
+               }
+       }
+
+       /* remove no-1-8-v if UHS-I support is present */
+       if (gpio_cfg[board_type].usd_vsel) {
+               debug("Enabling UHS-I support\n");
+               ft_delprop_path(blob, "/soc/aips-bus@02100000/usdhc@02198000",
+                               "no-1-8-v");
+       }
+
        /*
         * Peripheral Config:
         *  remove nodes by alias path if EEPROM config tells us the

diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 0a6ad47c7df37f4500c6fd126aac2c695833401f..e7f699a2b5bd3ea7f17b11aae46ea1c46e4d7838 100644 (file)
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -15,6 +15,7 @@
 #include <asm/imx-common/iomux-v3.h>
 #include <asm/imx-common/mxc_i2c.h>
 #include <environment.h>
+#include <i2c.h>
 #include <spl.h>
 
 #include "gsc.h"
@@ -189,6 +190,20 @@ static struct mx6_ddr3_cfg mt41k256m16ha_125 = {
        .trasmin = 3500,
 };
 
+/* MT41K512M16HA-125 (8Gb density) */
+static struct mx6_ddr3_cfg mt41k512m16ha_125 = {
+       .mem_speed = 1600,
+       .density = 8,
+       .width = 16,
+       .banks = 8,
+       .rowaddr = 16,
+       .coladdr = 10,
+       .pagesz = 2,
+       .trcd = 1375,
+       .trcmin = 4875,
+       .trasmin = 3500,
+};
+
 /*
  * calibration - these are the various CPU/DDR3 combinations we support
  */
@@ -340,6 +355,19 @@ static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = {
        .p1_mpwrdlctl = 0X40304239,
 };
 
+static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
+       /* write leveling calibration determine */
+       .p0_mpwldectrl0 = 0x002A0025,
+       .p0_mpwldectrl1 = 0x003A002A,
+       /* Read DQS Gating calibration */
+       .p0_mpdgctrl0 = 0x43430356,
+       .p0_mpdgctrl1 = 0x033C0335,
+       /* Read Calibration: DQS delay relative to DQ read access */
+       .p0_mprddlctl = 0x4B373F42,
+       /* Write Calibration: DQ/DM delay relative to DQS write access */
+       .p0_mpwrdlctl = 0x303E3C36,
+};
+
 static void spl_dram_init(int width, int size_mb, int board_model)
 {
        struct mx6_ddr3_cfg *mem = NULL;
@@ -419,6 +447,11 @@ static void spl_dram_init(int width, int size_mb, int board_model)
                else
                        calib = &mx6sdl_256x32_mmdc_calib;
                debug("4gB density\n");
+       } else if (width == 32 && size_mb == 2048) {
+               mem = &mt41k512m16ha_125;
+               if (is_cpu_type(MXC_CPU_MX6Q))
+                       calib = &mx6dq_512x32_mmdc_calib;
+               debug("8gB density\n");
        } else if (width == 64 && size_mb == 512) {
                mem = &mt41k64m16jt_125;
                debug("1gB density\n");
@@ -526,9 +559,6 @@ void board_init_f(ulong dummy)
 
        /* Clear the BSS. */
        memset(__bss_start, 0, __bss_end - __bss_start);
-
-       /* disable boot watchdog */
-       gsc_boot_wd_disable();
 }
 
 /* called from board_init_r after gd setup if CONFIG_SPL_BOARD_INIT defined */
@@ -560,7 +590,7 @@ void spl_board_init(void)
 /* return 1 if we wish to boot to uboot vs os (falcon mode) */
 int spl_start_uboot(void)
 {
-       int ret = 1;
+       unsigned char ret = 1;
 
        debug("%s\n", __func__);
 #ifdef CONFIG_SPL_ENV_SUPPORT
@@ -569,7 +599,14 @@ int spl_start_uboot(void)
        debug("boot_os=%s\n", getenv("boot_os"));
        if (getenv_yesno("boot_os") == 1)
                ret = 0;
+#else
+       /* use i2c-0:0x50:0x00 for falcon boot mode (0=linux, else uboot) */
+       i2c_set_bus_num(0);
+       gsc_i2c_read(0x50, 0x0, 1, &ret, 1);
 #endif
+       if (!ret)
+               gsc_boot_wd_disable();
+
        debug("%s booting %s\n", __func__, ret ? "uboot" : "linux");
        return ret;
 }

diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index daff375e40b0a70fa0513fd3ad36023511a3b3ad..9ffad58e03e906cf0ec311a87481057ab7548f8d 100644 (file)
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -111,6 +111,7 @@ enum {
        GW54xx,
        GW551x,
        GW552x,
+       GW553x,
        GW_UNKNOWN,
        GW_BADCRC,
 };

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index ff8f4d7b972e842c6990afce8aa6fd95a4056953..d45ed44c68435ecb93ad33a1c5fb846889ead7ce 100644 (file)
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -601,6 +601,8 @@ int board_late_init(void)
 #ifdef CONFIG_CMD_BMODE
        add_board_boot_modes(board_boot_modes);
 #endif
+
+#ifdef CONFIG_VIDEO_IPUV3
        /* We need at least 200ms between power on and backlight on
         * as per specifications from CHI MEI */
        mdelay(250);
@@ -615,6 +617,7 @@ int board_late_init(void)
        gpio_direction_output(LVDS_BACKLIGHT_GP, 1);
 
        pwm_enable(0);
+#endif
 
        return 0;
 }

diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index c127f6ca271d48a9fc2136596f508043e5e67b8c..9cafcea53a3c7ea87d07cc8829710164e4f6af86 100644 (file)
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -83,8 +83,12 @@ int board_init(void)
 #ifdef CONFIG_FACTORYSET
        factoryset_read_eeprom(CONFIG_SYS_I2C_EEPROM_ADDR);
 #endif
+
        gpmc_init();
 
+#ifdef CONFIG_NAND_CS_INIT
+       board_nand_cs_init();
+#endif
 #ifdef CONFIG_VIDEO
        board_video_init();
 #endif

diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig
index 819d187087f7ab631600b352cca6884b5e66b6ba..a699c7d46f79a04e0b79fd80305b501fa20a70d3 100644 (file)
--- a/board/siemens/draco/Kconfig
+++ b/board/siemens/draco/Kconfig
@@ -45,3 +45,19 @@ config SYS_CONFIG_NAME
        default "rastaban"
 
 endif
+
+if TARGET_ETAMIN
+
+config SYS_BOARD
+        default "draco"
+
+config SYS_VENDOR
+        default "siemens"
+
+config SYS_SOC
+        default "am33xx"
+
+config SYS_CONFIG_NAME
+        default "etamin"
+
+endif

diff --git a/board/siemens/draco/MAINTAINERS b/board/siemens/draco/MAINTAINERS
index 484dd739c1fe017709e2ea1e593f71480bbe5e85..e9107f08bfa9f1b2ae60ff38f354139c4220edb3 100644 (file)
--- a/board/siemens/draco/MAINTAINERS
+++ b/board/siemens/draco/MAINTAINERS
@@ -4,6 +4,7 @@ S:      Maintained
 F:     board/siemens/draco/
 F:     include/configs/draco.h
 F:     configs/draco_defconfig
+F:     configs/etamin_defconfig
 F:     include/configs/thuban.h
 F:     configs/thuban_defconfig
 F:     include/configs/rastaban.h

diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index 988c12ac7c88317bd1328721f12c8c911ab01a91..d8869a09dd007072d9eff554caa20f3acf69529c 100644 (file)
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -24,6 +24,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
 #include <asm/io.h>
 #include <asm/emif.h>
 #include <asm/gpio.h>
@@ -33,6 +34,7 @@
 #include <watchdog.h>
 #include "board.h"
 #include "../common/factoryset.h"
+#include <nand.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,6 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 static struct draco_baseboard_id __attribute__((section(".data"))) settings;
 
 #if DDR_PLL_FREQ == 303
+#if !defined(CONFIG_TARGET_ETAMIN)
 /* Default@303MHz-i0 */
 const struct ddr3_data ddr3_default = {
        0x33524444, 0x56312e35, 0x0080, 0x0000, 0x003A, 0x003F, 0x009F,
@@ -48,6 +51,16 @@ const struct ddr3_data ddr3_default = {
        "default name @303MHz           \0",
        "default marking                \0",
 };
+#else
+/* etamin board */
+const struct ddr3_data ddr3_default = {
+       0x33524444, 0x56312e36, 0x0080, 0x0000, 0x003A, 0x0010, 0x009F,
+       0x0050, 0x0888A39B, 0x266D7FDA, 0x501F86AF, 0x00100206, 0x61A44BB2,
+       0x0000093B, 0x0000018A,
+       "test-etamin                    \0",
+       "generic-8Gbit                  \0",
+};
+#endif
 #elif DDR_PLL_FREQ == 400
 /* Default@400MHz-i0 */
 const struct ddr3_data ddr3_default = {
@@ -105,6 +118,40 @@ static void print_chip_data(void)
 }
 #endif /* CONFIG_SPL_BUILD */
 
+#define AM335X_NAND_ECC_MASK 0x0f
+#define AM335X_NAND_ECC_TYPE_16 0x02
+
+static int ecc_type;
+
+struct am335x_nand_geometry {
+       u32 magic;
+       u8 nand_geo_addr;
+       u8 nand_geo_page;
+       u8 nand_bus;
+};
+
+static int draco_read_nand_geometry(void)
+{
+       struct am335x_nand_geometry geo;
+
+       /* Read NAND geometry */
+       if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x80, 2,
+                    (uchar *)&geo, sizeof(struct am335x_nand_geometry))) {
+               printf("Could not read the NAND geomtery; something fundamentally wrong on the I2C bus.\n");
+               return -EIO;
+       }
+       if (geo.magic != 0xa657b310) {
+               printf("%s: bad magic: %x\n", __func__, geo.magic);
+               return -EFAULT;
+       }
+       if ((geo.nand_bus & AM335X_NAND_ECC_MASK) == AM335X_NAND_ECC_TYPE_16)
+               ecc_type = 16;
+       else
+               ecc_type = 8;
+
+       return 0;
+}
+
 /*
  * Read header information from EEPROM into global structure.
  */
@@ -147,6 +194,8 @@ static int read_eeprom(void)
                printf("Warning: No chip data in eeprom\n");
 
        print_ddr3_timings();
+
+       return draco_read_nand_geometry();
 #endif
        return 0;
 }
@@ -174,6 +223,7 @@ struct ctrl_ioregs draco_ddr3_ioregs = {
        draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 =
                settings.ddr3.emif_ddr_phy_ctlr_1;
        draco_ddr3_emif_reg_data.sdram_config = settings.ddr3.sdram_config;
+       draco_ddr3_emif_reg_data.sdram_config2 = 0x08000000;
        draco_ddr3_emif_reg_data.ref_ctrl = settings.ddr3.ref_ctrl;
 
        draco_ddr3_data.datardsratio0 = settings.ddr3.dt0rdsratio0;
@@ -207,7 +257,18 @@ static void spl_siemens_board_init(void)
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
-       omap_nand_switch_ecc(1, 8);
+       int ret;
+
+       ret = draco_read_nand_geometry();
+       if (ret != 0)
+               return ret;
+
+       nand_curr_device = 0;
+       omap_nand_switch_ecc(1, ecc_type);
+#ifdef CONFIG_TARGET_ETAMIN
+       nand_curr_device = 1;
+       omap_nand_switch_ecc(1, ecc_type);
+#endif
 #ifdef CONFIG_FACTORYSET
        /* Set ASN in environment*/
        if (factory_dat.asn[0] != 0) {
@@ -283,7 +344,7 @@ int board_eth_init(bd_t *bis)
 }
 
 static int do_switch_reset(cmd_tbl_t *cmdtp, int flag, int argc,
-                          char *const argv[])
+                         char *const argv[])
 {
        /* Reset SMSC LAN9303 switch for default configuration */
        gpio_request(GPIO_LAN9303_NRST, "nRST");
@@ -303,4 +364,23 @@ U_BOOT_CMD(
 #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */
 #endif /* #if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) */
 
+#ifdef CONFIG_NAND_CS_INIT
+/* GPMC definitions for second nand cs1 */
+static const u32 gpmc_nand_config[] = {
+       ETAMIN_NAND_GPMC_CONFIG1,
+       ETAMIN_NAND_GPMC_CONFIG2,
+       ETAMIN_NAND_GPMC_CONFIG3,
+       ETAMIN_NAND_GPMC_CONFIG4,
+       ETAMIN_NAND_GPMC_CONFIG5,
+       ETAMIN_NAND_GPMC_CONFIG6,
+       /*CONFIG7- computed as params */
+};
+
+static void board_nand_cs_init(void)
+{
+       enable_gpmc_cs_config(gpmc_nand_config, &gpmc_cfg->cs[1],
+                             0x18000000, GPMC_SIZE_16M);
+}
+#endif
+
 #include "../common/board.c"

diff --git a/board/siemens/draco/mux.c b/board/siemens/draco/mux.c
index dbcc80b61fffdca0d840c87187295a70501dc822..38a484eb4329ed0cc5e1d636770be4564c6703f1 100644 (file)
--- a/board/siemens/draco/mux.c
+++ b/board/siemens/draco/mux.c
@@ -51,6 +51,7 @@ static struct module_pin_mux nand_pin_mux[] = {
        {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
        {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},   /* NAND_WPN */
        {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},      /* NAND_CS0 */
+       {OFFSET(gpmc_csn1), MODE(0) | PULLUDEN | PULLUP_EN},    /* NAND_CS1 */
        {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
        {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},   /* NAND_OE */
        {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},       /* NAND_WEN */
@@ -68,7 +69,6 @@ static struct module_pin_mux gpios_pin_mux[] = {
        {OFFSET(mmc0_dat1), MODE(7) | PULLUDDIS | RXACTIVE},    /* Y3 GPIO2_28*/
        {OFFSET(mmc0_dat2), MODE(7) | PULLUDDIS | RXACTIVE},    /* Y7 GPIO2_27*/
        /* Triacs initial HW Rev */
-       {OFFSET(gpmc_csn1), MODE(7) | RXACTIVE | PULLUDDIS},    /* 1_30 Y0 */
        {OFFSET(gpmc_be1n), MODE(7) | RXACTIVE | PULLUDDIS},    /* 1_28 Y1 */
        {OFFSET(gpmc_csn2), MODE(7) | RXACTIVE | PULLUDDIS},    /* 1_31 Y2 */
        {OFFSET(lcd_data15), MODE(7) | RXACTIVE | PULLUDDIS},   /* 0_11 Y3 */

diff --git a/board/synopsys/axs101/axs101.c b/board/synopsys/axs101/axs101.c
index 84ee2bf43de911d1ee4441443ff7f650f18585c8..a5e774b2cf7b26e8d12b801e3e545b6e94666991 100644 (file)
--- a/board/synopsys/axs101/axs101.c
+++ b/board/synopsys/axs101/axs101.c
@@ -54,7 +54,7 @@ void smp_set_core_boot_addr(unsigned long addr, int corenr)
        writel(addr, (void __iomem *)RESET_VECTOR_ADDR);
 
        /* Make sure other cores see written value in memory */
-       flush_dcache_range(RESET_VECTOR_ADDR, RESET_VECTOR_ADDR + sizeof(int));
+       flush_dcache_all();
 }
 
 void smp_kick_all_cpus(void)

diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index bde5ac7c992aebafee04f64ce5737d26c0c68b9e..f005762edadea944ce1840bc7430086912131c76 100644 (file)
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -850,7 +850,7 @@ int board_eth_init(bd_t *bis)
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
-       if (board_is_gpevm() && !strcmp(name, "am437x-gp-evm"))
+       if (board_is_evm() && !strcmp(name, "am437x-gp-evm"))
                return 0;
        else if (board_is_sk() && !strcmp(name, "am437x-sk-evm"))
                return 0;

diff --git a/board/ti/am57xx/Kconfig b/board/ti/am57xx/Kconfig
index 87654f9799565ebd4aaf11901f7642441bbab95f..cead0f4f042e2233c2cae6d2ef7ccfb17ac7b452 100644 (file)
--- a/board/ti/am57xx/Kconfig
+++ b/board/ti/am57xx/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_BEAGLE_X15
+if TARGET_AM57XX_EVM
 
 config SYS_BOARD
        default "am57xx"

diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index ccf97b2b13bb4ab11002a6490d9210c125b0011d..08cf14d5e73f629bf4a47d880aca7888d432d928 100644 (file)
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -736,3 +736,17 @@ int ft_board_setup(void *blob, bd_t *bd)
        return 0;
 }
 #endif
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+       if (board_is_x15() && !strcmp(name, "am57xx-beagle-x15"))
+               return 0;
+       else if (board_is_am572x_evm() && !strcmp(name, "am57xx-beagle-x15"))
+               return 0;
+       else if (board_is_am572x_idk() && !strcmp(name, "am572x-idk"))
+               return 0;
+       else
+               return -1;
+}
+#endif

diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 3fbbc9b23b0433bfc55e0384d8cc31be94c2522f..0394e4ee57adc2e79ccc377b4b3af059500f27c0 100644 (file)
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -305,6 +305,82 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
        }
 }
 
+struct vcores_data dra752_volts = {
+       .mpu.value      = VDD_MPU_DRA7,
+       .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
+       .mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
+       .mpu.addr       = TPS659038_REG_ADDR_SMPS12,
+       .mpu.pmic       = &tps659038,
+       .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
+
+       .eve.value      = VDD_EVE_DRA7,
+       .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
+       .eve.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
+       .eve.addr       = TPS659038_REG_ADDR_SMPS45,
+       .eve.pmic       = &tps659038,
+       .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
+
+       .gpu.value      = VDD_GPU_DRA7,
+       .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
+       .gpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
+       .gpu.addr       = TPS659038_REG_ADDR_SMPS6,
+       .gpu.pmic       = &tps659038,
+       .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
+
+       .core.value     = VDD_CORE_DRA7,
+       .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
+       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .core.addr      = TPS659038_REG_ADDR_SMPS7,
+       .core.pmic      = &tps659038,
+
+       .iva.value      = VDD_IVA_DRA7,
+       .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
+       .iva.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
+       .iva.addr       = TPS659038_REG_ADDR_SMPS8,
+       .iva.pmic       = &tps659038,
+       .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
+};
+
+struct vcores_data dra722_volts = {
+       .mpu.value      = VDD_MPU_DRA7,
+       .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
+       .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .mpu.addr       = TPS65917_REG_ADDR_SMPS1,
+       .mpu.pmic       = &tps659038,
+       .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
+
+       .core.value     = VDD_CORE_DRA7,
+       .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
+       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .core.addr      = TPS65917_REG_ADDR_SMPS2,
+       .core.pmic      = &tps659038,
+
+       /*
+        * The DSPEVE, GPU and IVA rails are usually grouped on DRA72x
+        * designs and powered by TPS65917 SMPS3, as on the J6Eco EVM.
+        */
+       .gpu.value      = VDD_GPU_DRA7,
+       .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
+       .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .gpu.addr       = TPS65917_REG_ADDR_SMPS3,
+       .gpu.pmic       = &tps659038,
+       .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
+
+       .eve.value      = VDD_EVE_DRA7,
+       .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
+       .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .eve.addr       = TPS65917_REG_ADDR_SMPS3,
+       .eve.pmic       = &tps659038,
+       .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
+
+       .iva.value      = VDD_IVA_DRA7,
+       .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
+       .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .iva.addr       = TPS65917_REG_ADDR_SMPS3,
+       .iva.pmic       = &tps659038,
+       .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
+};
+
 /**
  * @brief board_init
  *
@@ -390,6 +466,21 @@ void do_board_detect(void)
 }
 #endif /* CONFIG_SPL_BUILD */
 
+void vcores_init(void)
+{
+       if (board_is_dra74x_evm()) {
+               *omap_vcores = &dra752_volts;
+       } else if (board_is_dra72x_evm()) {
+               *omap_vcores = &dra722_volts;
+       } else {
+               /* If EEPROM is not populated */
+               if (is_dra72x())
+                       *omap_vcores = &dra722_volts;
+               else
+                       *omap_vcores = &dra752_volts;
+       }
+}
+
 void set_muxconf_regs(void)
 {
        do_set_mux32((*ctrl)->control_padconf_core_base,

diff --git a/board/warp7/README b/board/warp7/README
new file mode 100644 (file)
index 0000000..60339da
--- /dev/null
+++ b/board/warp7/README
@@ -0,0 +1,63 @@
+How to Update U-Boot on Warp7 board
+----------------------------------
+
+Required software on the host PC:
+
+- imx_usb_loader: https://github.com/boundarydevices/imx_usb_loader
+
+- dfu-util: http://dfu-util.sourceforge.net/releases/ (if you are in a
+Debian distribution then you can get it via libdfu-dev package)
+
+- libusb: http://libusb.org/ (if you are in a Debian distribution
+then you can get it via libusb-dev and libusb-1.0-0-dev)
+
+In U-Boot folder, build U-Boot for Warp7:
+
+$ make mrproper
+$ make warp7_config
+$ make
+
+This will generate the U-Boot binary called u-boot.imx.
+
+Put warp7 board in USB download mode: 
+
+Remove the CPU board from the base board then put switch 2 in the upper
+position
+
+Connect a USB to serial adapter between the host PC and warp7
+
+Connect a USB cable between the OTG warp7 port and the host PC
+
+Copy u-boot.imx to the imx_usb_loader folder.
+
+Load u-boot.imx via USB:
+
+$ sudo ./imx_usb u-boot.imx
+
+Then U-Boot should start and its messages will appear in the console program.
+
+Open a terminal program such as minicom
+
+Use the default environment variables:
+
+=> env default -f -a
+=> saveenv
+
+Run the DFU command:
+=> dfu 0 mmc 0
+
+Transfer u-boot.imx that will be flashed into the eMMC:
+
+$ sudo dfu-util -D u-boot.imx -a boot
+
+Then on the U-Boot prompt the following message should be seen after a
+successful upgrade:
+
+#DOWNLOAD ... OK
+Ctrl+C to exit ...
+
+Remove power from the warp7 board.
+
+Put warp7 board into normal boot mode (put the switch 2 in the lower position)
+
+Power up the board and the new updated U-Boot should boot from eMMC

diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index 8c5bf9a5242d9a52f8e7f416ba01d5d758fe3d84..27e31f35d55e170bc8bfdb07866d4c6fe44c7fdb 100644 (file)
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -32,6 +32,10 @@ int dram_init(void)
        return 0;
 }
 
+static iomux_v3_cfg_t const wdog_pads[] = {
+       MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
 static iomux_v3_cfg_t const uart1_pads[] = {
        MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
        MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
@@ -100,3 +104,20 @@ int board_usb_phy_mode(int port)
 {
        return USB_INIT_DEVICE;
 }
+
+int board_late_init(void)
+{
+       struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+
+       imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+
+       set_wdog_reset(wdog);
+
+       /*
+        * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
+        * since we use PMIC_PWRON to reset the board.
+        */
+       clrsetbits_le16(&wdog->wcr, 0, 0x10);
+
+       return 0;
+}

diff --git a/cmd/gpt.c b/cmd/gpt.c
index 8ffaef30f568bd807669b93090eb8b3a802aa891..3d9706b679c5c2ff8f6a2b2ce2fd0546c08b6470 100644 (file)
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -181,6 +181,7 @@ static int set_gpt_info(struct blk_desc *dev_desc,
        disk_partition_t *parts;
        int errno = 0;
        uint64_t size_ll, start_ll;
+       lbaint_t offset = 0;
 
        debug("%s:  lba num: 0x%x %d\n", __func__,
              (unsigned int)dev_desc->lba, (unsigned int)dev_desc->lba);
@@ -296,8 +297,14 @@ static int set_gpt_info(struct blk_desc *dev_desc,
                }
                if (extract_env(val, &p))
                        p = val;
-               size_ll = ustrtoull(p, &p, 0);
-               parts[i].size = lldiv(size_ll, dev_desc->blksz);
+               if ((strcmp(p, "-") == 0)) {
+                       /* remove first usable lba and last block */
+                       parts[i].size = dev_desc->lba - 34  - 1 - offset;
+               } else {
+                       size_ll = ustrtoull(p, &p, 0);
+                       parts[i].size = lldiv(size_ll, dev_desc->blksz);
+               }
+
                free(val);
 
                /* start address */
@@ -310,6 +317,8 @@ static int set_gpt_info(struct blk_desc *dev_desc,
                        free(val);
                }
 
+               offset += parts[i].size + parts[i].start;
+
                /* bootable */
                if (found_key(tok, "bootable"))
                        parts[i].bootable = 1;

diff --git a/cmd/ubi.c b/cmd/ubi.c
index 753a4dba3d782965dedb421cfbdab0d62b1a128a..4a92d840b6ccd9e2239838fe180b8381a697f765 100644 (file)
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -443,14 +443,8 @@ static int ubi_dev_scan(struct mtd_info *info, char *ubidev,
        return 0;
 }
 
-int ubi_part(char *part_name, const char *vid_header_offset)
+int ubi_detach(void)
 {
-       int err = 0;
-       char mtd_dev[16];
-       struct mtd_device *dev;
-       struct part_info *part;
-       u8 pnum;
-
        if (mtdparts_init() != 0) {
                printf("Error initializing mtdparts!\n");
                return 1;
@@ -466,17 +460,28 @@ int ubi_part(char *part_name, const char *vid_header_offset)
                cmd_ubifs_umount();
 #endif
 
-       /* todo: get dev number for NAND... */
-       ubi_dev.nr = 0;
-
        /*
         * Call ubi_exit() before re-initializing the UBI subsystem
         */
        if (ubi_initialized) {
                ubi_exit();
                del_mtd_partitions(ubi_dev.mtd_info);
+               ubi_initialized = 0;
        }
 
+       ubi_dev.selected = 0;
+       return 0;
+}
+
+int ubi_part(char *part_name, const char *vid_header_offset)
+{
+       int err = 0;
+       char mtd_dev[16];
+       struct mtd_device *dev;
+       struct part_info *part;
+       u8 pnum;
+
+       ubi_detach();
        /*
         * Search the mtd device number where this partition
         * is located
@@ -517,6 +522,15 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        if (argc < 2)
                return CMD_RET_USAGE;
 
+
+       if (strcmp(argv[1], "detach") == 0) {
+               if (argc < 2)
+                       return CMD_RET_USAGE;
+
+               return ubi_detach();
+       }
+
+
        if (strcmp(argv[1], "part") == 0) {
                const char *vid_header_offset = NULL;
 
@@ -661,7 +675,9 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 U_BOOT_CMD(
        ubi, 6, 1, do_ubi,
        "ubi commands",
-       "part [part] [offset]\n"
+       "detach"
+               " - detach ubi from a mtd partition\n"
+       "ubi part [part] [offset]\n"
                " - Show or set current partition (with optional VID"
                " header offset)\n"
        "ubi info [l[ayout]]"

diff --git a/cmd/usb.c b/cmd/usb.c
index b83d3233b789fffb49599ce2c9cf63abcc21112e..58d9db29d73ab151e85c37915bedabea59f10fba 100644 (file)
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -800,7 +800,8 @@ static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
                        int dev = (int)simple_strtoul(argv[2], NULL, 10);
                        printf("\nUSB device %d: ", dev);
                        stor_dev = blk_get_devnum_by_type(IF_TYPE_USB, dev);
-                       if (stor_dev == NULL) {
+                       if ((stor_dev == NULL) ||
+                           (stor_dev->if_type == IF_TYPE_UNKNOWN)) {
                                printf("unknown device\n");
                                return 1;
                        }

diff --git a/common/Kconfig b/common/Kconfig
index 067545d8a3ea24ae8cea6763d7243ae0ebddc21b..e6911451999e4199d493ba3855c11f980c5d6c8a 100644 (file)
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -97,6 +97,15 @@ config BOOTSTAGE_STASH_SIZE
 
 endmenu
 
+config BOOTDELAY
+       int "delay in seconds before automatically booting"
+       default 2
+       help
+         Delay before automatically running bootcmd;
+         set to -1 to disable autoboot.
+         set to -2 to autoboot with no delay and not check for abort
+         (even when CONFIG_ZERO_BOOTDELAY_CHECK is defined).
+
 config CONSOLE_RECORD
        bool "Console recording"
        help

diff --git a/common/Makefile b/common/Makefile
index 1557a044de5710b69c8e03768ec5e29899653ca5..97c59fe499a26beb8f51ec40435de385023597c1 100644 (file)
--- a/common/Makefile
+++ b/common/Makefile
@@ -93,6 +93,7 @@ obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
 endif # !CONFIG_SPL_BUILD
 
 ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
 obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
 obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
 obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o

diff --git a/common/bootm.c b/common/bootm.c
index 49414142dcd207902b96a7e93a64923c121e71ba..2431019b3f407d8eff683fa1cd8c5ce46a468cc4 100644 (file)
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -445,7 +445,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
                bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE);
                return err;
        }
-       flush_cache(load, *load_end - load);
+       flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN));
 
        debug("   kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
        bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);

diff --git a/common/env_ubi.c b/common/env_ubi.c
index e611199a58d6d30a69e72dc5c95fa39e9577dff8..0ac2f65f0b24be57a7b2c123d3ef7a1faa8f0c6e 100644 (file)
--- a/common/env_ubi.c
+++ b/common/env_ubi.c
@@ -115,6 +115,17 @@ void env_relocate_spec(void)
        int crc1_ok = 0, crc2_ok = 0;
        env_t *ep, *tmp_env1, *tmp_env2;
 
+       /*
+        * In case we have restarted u-boot there is a chance that buffer
+        * contains old environment (from the previous boot).
+        * If UBI volume is zero size, ubi_volume_read() doesn't modify the
+        * buffer.
+        * We need to clear buffer manually here, so the invalid CRC will
+        * cause setting default environment as expected.
+        */
+       memset(env1_buf, 0x0, CONFIG_ENV_SIZE);
+       memset(env2_buf, 0x0, CONFIG_ENV_SIZE);
+
        tmp_env1 = (env_t *)env1_buf;
        tmp_env2 = (env_t *)env2_buf;
 
@@ -174,6 +185,16 @@ void env_relocate_spec(void)
 {
        ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
 
+       /*
+        * In case we have restarted u-boot there is a chance that buffer
+        * contains old environment (from the previous boot).
+        * If UBI volume is zero size, ubi_volume_read() doesn't modify the
+        * buffer.
+        * We need to clear buffer manually here, so the invalid CRC will
+        * cause setting default environment as expected.
+        */
+       memset(buf, 0x0, CONFIG_ENV_SIZE);
+
        if (ubi_part(CONFIG_ENV_UBI_PART, NULL)) {
                printf("\n** Cannot find mtd partition \"%s\"\n",
                       CONFIG_ENV_UBI_PART);

diff --git a/common/image-fit.c b/common/image-fit.c
index 98739572a1bdc9a585432d46acc7ad304fe5ef01..6f920da2204348ce321f5d7def54a355b516727f 100644 (file)
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -147,7 +147,7 @@ int fit_get_subimage_count(const void *fit, int images_noffset)
  * @p: pointer to prefix string
  *
  * fit_print_contents() formats a multi line FIT image contents description.
- * The routine prints out FIT image properties (root node level) follwed by
+ * The routine prints out FIT image properties (root node level) followed by
  * the details of each component image.
  *
  * returns:
@@ -249,7 +249,7 @@ void fit_print_contents(const void *fit)
  * @p: pointer to prefix string
  * @type: Type of information to print ("hash" or "sign")
  *
- * fit_image_print_data() lists properies for the processed hash node
+ * fit_image_print_data() lists properties for the processed hash node
  *
  * This function avoid using puts() since it prints a newline on the host
  * but does not in U-Boot.
@@ -314,7 +314,7 @@ static void fit_image_print_data(const void *fit, int noffset, const char *p,
  * @noffset: offset of the hash or signature node
  * @p: pointer to prefix string
  *
- * This lists properies for the processed hash node
+ * This lists properties for the processed hash node
  *
  * returns:
  *     no returned results
@@ -344,7 +344,7 @@ static void fit_image_print_verification_data(const void *fit, int noffset,
  * @image_noffset: offset of the component image node
  * @p: pointer to prefix string
  *
- * fit_image_print() lists all mandatory properies for the processed component
+ * fit_image_print() lists all mandatory properties for the processed component
  * image. If present, hash nodes are printed out as well. Load
  * address for images of type firmware is also printed out. Since the load
  * address is not mandatory for firmware images, it will be output as
@@ -459,10 +459,10 @@ void fit_image_print(const void *fit, int image_noffset, const char *p)
  * fit_get_desc - get node description property
  * @fit: pointer to the FIT format image header
  * @noffset: node offset
- * @desc: double pointer to the char, will hold pointer to the descrption
+ * @desc: double pointer to the char, will hold pointer to the description
  *
  * fit_get_desc() reads description property from a given node, if
- * description is found pointer to it is returened in third call argument.
+ * description is found pointer to it is returned in third call argument.
  *
  * returns:
  *     0, on success
@@ -487,8 +487,8 @@ int fit_get_desc(const void *fit, int noffset, char **desc)
  * @noffset: node offset
  * @timestamp: pointer to the time_t, will hold read timestamp
  *
- * fit_get_timestamp() reads timestamp poperty from given node, if timestamp
- * is found and has a correct size its value is retured in third call
+ * fit_get_timestamp() reads timestamp property from given node, if timestamp
+ * is found and has a correct size its value is returned in third call
  * argument.
  *
  * returns:
@@ -520,7 +520,7 @@ int fit_get_timestamp(const void *fit, int noffset, time_t *timestamp)
  * @fit: pointer to the FIT format image header
  * @image_uname: component image node unit name
  *
- * fit_image_get_node() finds a component image (withing the '/images'
+ * fit_image_get_node() finds a component image (within the '/images'
  * node) of a provided unit name. If image is found its node offset is
  * returned to the caller.
  *
@@ -989,7 +989,7 @@ static int fit_image_check_hash(const void *fit, int noffset, const void *data,
 }
 
 /**
- * fit_image_verify - verify data intergity
+ * fit_image_verify - verify data integrity
  * @fit: pointer to the FIT format image header
  * @image_noffset: component image node offset
  *
@@ -1073,7 +1073,7 @@ error:
 }
 
 /**
- * fit_all_image_verify - verify data intergity for all images
+ * fit_all_image_verify - verify data integrity for all images
  * @fit: pointer to the FIT format image header
  *
  * fit_all_image_verify() goes over all images in the FIT and
@@ -1380,8 +1380,8 @@ int fit_conf_find_compat(const void *fit, const void *fdt)
  * @fit: pointer to the FIT format image header
  * @conf_uname: configuration node unit name
  *
- * fit_conf_get_node() finds a configuration (withing the '/configurations'
- * parant node) of a provided unit name. If configuration is found its node
+ * fit_conf_get_node() finds a configuration (within the '/configurations'
+ * parent node) of a provided unit name. If configuration is found its node
  * offset is returned to the caller.
  *
  * When NULL is provided in second argument fit_conf_get_node() will search
@@ -1447,7 +1447,7 @@ int fit_conf_get_prop_node(const void *fit, int noffset,
  * @noffset: offset of the configuration node
  * @p: pointer to prefix string
  *
- * fit_conf_print() lists all mandatory properies for the processed
+ * fit_conf_print() lists all mandatory properties for the processed
  * configuration node.
  *
  * returns:
@@ -1558,7 +1558,7 @@ static const char *fit_get_image_type_property(int type)
 {
        /*
         * This is sort-of available in the uimage_type[] table in image.c
-        * but we don't have access to the sohrt name, and "fdt" is different
+        * but we don't have access to the short name, and "fdt" is different
         * anyway. So let's just keep it here.
         */
        switch (type) {

diff --git a/common/init/board_init.c b/common/init/board_init.c
index d17bb298d72edc13cec4fd40083fd66f89fe943a..ef01a9aeaad901978ac9a436021a5921127fd397 100644 (file)
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -146,3 +146,8 @@ void board_init_f_init_reserve(ulong base)
        base += CONFIG_SYS_MALLOC_F_LEN;
 #endif
 }
+
+/*
+ * Board-specific Platform code can reimplement show_boot_progress () if needed
+ */
+__weak void show_boot_progress(int val) {}

diff --git a/common/spl/spl.c b/common/spl/spl.c
index c8dfc14508f0bc08fb6d6f6ec157b0d13a8082f8..840910a6844425f04bcda3b4b280374369ae17d0 100644 (file)
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -35,6 +35,11 @@ struct spl_image_info spl_image;
 /* Define board data structure */
 static bd_t bdata __attribute__ ((section(".data")));
 
+/*
+ * Board-specific Platform code can reimplement show_boot_progress () if needed
+ */
+__weak void show_boot_progress(int val) {}
+
 /*
  * Default function to determine if u-boot or the OS should
  * be started. This implementation always returns 1.

diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index ade5496600930c4f2a84ac76d1a9467576dcb3fa..89ac4f42976733bda979423ac716068dddbcf25a 100644 (file)
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -88,8 +88,7 @@ int spl_load_image_ext_os(struct blk_desc *block_dev, int partition)
 #endif
                return -1;
        }
-
-#if defined(CONFIG_SPL_ENV_SUPPORT) && defined(CONFIG_SPL_OS_BOOT)
+#if defined(CONFIG_SPL_ENV_SUPPORT)
        file = getenv("falcon_args_file");
        if (file) {
                err = ext4fs_open(file, &filelen);

diff --git a/common/splash_source.c b/common/splash_source.c
index f86a78a4363121e58a7a5e81bc3a2ce18dc653c5..914f12f4cb554ca0cb4bade313232c4c625a6099 100644 (file)
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -120,6 +120,12 @@ static int splash_select_fs_dev(struct splash_location *location)
        case SPLASH_STORAGE_SATA:
                res = fs_set_blk_dev("sata", location->devpart, FS_TYPE_ANY);
                break;
+       case SPLASH_STORAGE_NAND:
+               if (location->ubivol != NULL)
+                       res = fs_set_blk_dev("ubi", NULL, FS_TYPE_UBIFS);
+               else
+                       res = -ENODEV;
+               break;
        default:
                printf("Error: unsupported location storage.\n");
                return -ENODEV;
@@ -163,6 +169,41 @@ static inline int splash_init_sata(void)
 }
 #endif
 
+#ifdef CONFIG_CMD_UBIFS
+static int splash_mount_ubifs(struct splash_location *location)
+{
+       int res;
+       char cmd[32];
+
+       sprintf(cmd, "ubi part %s", location->mtdpart);
+       res = run_command(cmd, 0);
+       if (res)
+               return res;
+
+       sprintf(cmd, "ubifsmount %s", location->ubivol);
+       res = run_command(cmd, 0);
+
+       return res;
+}
+
+static inline int splash_umount_ubifs(void)
+{
+       return run_command("ubifsumount", 0);
+}
+#else
+static inline int splash_mount_ubifs(struct splash_location *location)
+{
+       printf("Cannot load splash image: no UBIFS support\n");
+       return -ENOSYS;
+}
+
+static inline int splash_umount_ubifs(void)
+{
+       printf("Cannot unmount UBIFS: no UBIFS support\n");
+       return -ENOSYS;
+}
+#endif
+
 #define SPLASH_SOURCE_DEFAULT_FILE_NAME                "splash.bmp"
 
 static int splash_load_fs(struct splash_location *location, u32 bmp_load_addr)
@@ -181,26 +222,36 @@ static int splash_load_fs(struct splash_location *location, u32 bmp_load_addr)
        if (location->storage == SPLASH_STORAGE_SATA)
                res = splash_init_sata();
 
+       if (location->ubivol != NULL)
+               res = splash_mount_ubifs(location);
+
        if (res)
                return res;
 
        res = splash_select_fs_dev(location);
        if (res)
-               return res;
+               goto out;
 
        res = fs_size(splash_file, &bmp_size);
        if (res) {
                printf("Error (%d): cannot determine file size\n", res);
-               return res;
+               goto out;
        }
 
        if (bmp_load_addr + bmp_size >= gd->start_addr_sp) {
                printf("Error: splashimage address too high. Data overwrites U-Boot and/or placed beyond DRAM boundaries.\n");
-               return -EFAULT;
+               res = -EFAULT;
+               goto out;
        }
 
        splash_select_fs_dev(location);
-       return fs_read(splash_file, bmp_load_addr, 0, 0, NULL);
+       res = fs_read(splash_file, bmp_load_addr, 0, 0, NULL);
+
+out:
+       if (location->ubivol != NULL)
+               splash_umount_ubifs();
+
+       return res;
 }
 
 /**

diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index 369afbb22a7d6a462a2ed8ba52a4ae1648cd1b75..06d89af4b0bc362aa70baaf629622baea43e9a3c 100644 (file)
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index 408e84e58f4782c07547428c8a3f784aa43dac62..0e2d3f9908bf18f2a3838b94819780d3c8f01806 100644 (file)
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index bab96cac606f87c2c65853c91867c62b6fbafac6..36986b5fd8fbc58906feac99c0ac9b6fc16ff421 100644 (file)
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index 10fe1d03616d0a4bf443b3fb687ea0a98e01284f..6aea615f57c0b4e422c995429d4b2b113ec8429d 100644 (file)
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index 5e754ebee1250d340ad79a21a7e4e207ab23a286..505e0148543e2e44559391094b3c2a946872ed02 100644 (file)
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index fca6f5aeb01a2a047de9fbb49802972acee0a082..4696d6d37e33940c720826755c0ae9394d34a361 100644 (file)
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index e833e0c3915d8e989c1d252254ca3318e4228653..dfbf2cb4d82caa04bf7fbc892953992340094fe9 100644 (file)
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index cd2763835983cbb2c03da8dff7366fb82bcd8464..b6c45ea3365e526ffe7dd359353e8293a4128dd0 100644 (file)
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index cdfccbed43240635796c19bfed663e9c3b6344a6..85d4a85bdb1020077f91da338d293536ec68a58a 100644 (file)
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index 555e446a3bcfa942c2975df3678582ddf2c80cbc..2937dc3cbbddc893d9cff22b23cca68b37b2e986 100644 (file)
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index 014916c0d47d9236ea3b820b7b14d16200eb3762..fd33d1429108db0edfab4aeefc58cd625a4011f8 100644 (file)
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index 941fe75f3748944a69fe319a2ca660087d47f7ea..572de826dd4ee25663fd81829573b45b770c54c1 100644 (file)
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index ae8271be584bf29c81fb196961d9ac323076ca43..523b7ada86bf5ec4e54d9e7a61714918343e875e 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index 502ba3c7ca165994d83325d729abea6ccb5c4b26..f15c4a16db858eb52a86f1ab82b45bc9f81b22ec 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index d60c0c1bf844bbe76d8fea027568dbb0c4e12080..6d685b6d48f214ed87f899e4a71f27df8f505a73 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index 43fa804e3b76d3bdcc541e198799e5ae6bef50d1..7cdc2b2a782b78cfdc737ca8d6c7b0d6b42da7be 100644 (file)
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index adc42c515a3d68e94b16bee024f2b40a940959db..8fdc698aa3fe30efab9c64bf835f48718e403ebd 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index d591a373fc1e321330c4bc421eea50bdc6379795..c40b6fe31d4e15443c12e2fdbcddbc049ebc4163 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 034109eba4ae312db32a4ec34c5b88c54220563e..b5fc43376ac715ba4a2f810fe5c712205a0edee7 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index c804b4f1cd3b56966b973fe1ff82432dbf5622e4..c4bbb5140b3e08472b81a4797ac95464c0afb396 100644 (file)
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 49609b7f5cafff1c7d1bec0e64e5c4336fad03de..456fb8dc626e33318a6125240ff064d55cd1305e 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index a64db9bb98d8f4fe085bdf5c6237eff09ee28bcf..867e433465fa465bd1525cbad1d4ba9763cae1db 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 0850d84da91409ae5d9cd2ec1060da9c3568ead8..effdd33ef18840ea484852190fda517bf1cd9030 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index 7d7ecd277db3a598640e90ef2f28957835a32e72..3d863315440aa0fa2abc73edc2004e91f3872911 100644 (file)
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index a46d8d77f0871c720a6abc27b8e05d5c86f1dde3..0ac319cf2493c1b534f70832a84572f8cf75f78a 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index 3ef15fcef7e3dcc944723d2514b1919033f45228..25e5afa96fc19dcc3d3d0f9c5806e5d8eff559bb 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index 307813cc8f742f7f7e5db2e3f27b1c75db3a81be..00fe70b9171aa11886d421e35046b610ea51d2ac 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index aef5e7bdd9162764a8f26ce171f988fa850cdb9e..f20f23102e89d033bf36a7b3861982c1415b07a2 100644 (file)
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index 726e08ee3f55507fc9afcb03c8c95ff001b4249b..bc2ddca4a4652d7003a0295a104aa30f592c8e66 100644 (file)
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND"
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y

diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index 032be47e26253862c43adb056905e1e5e701534d..99b437a40afc85c27b5169c0d0ef28413e1ad6c4 100644 (file)
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y

diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index a450c60c2c95faafc1cb4a3363cf7943607d4d43..491fba2c99b72398442fd56db32784b44117cfa6 100644 (file)
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y

diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig
index c50234c876d53b9821a4aaaf7300d20d12d9dce7..f2d9772c2ad9e3b687848d004f96b6d2a2bad3d7 100644 (file)
--- a/configs/C29XPCIE_SPIFLASH_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y

diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig
index c16559d286812bd33f49a3f8be6ef7ccd6eacf8d..9ccf0e8119d6337e6d195f07e0a367f95af9cfee 100644 (file)
--- a/configs/C29XPCIE_defconfig
+++ b/configs/C29XPCIE_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT"
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y

diff --git a/configs/CPCI2DP_defconfig b/configs/CPCI2DP_defconfig
index ea0775d5858ea77a928be74e5338d76be6d5820d..99e4ad007d1a271a753bdbb11bbfc8867f7587e2 100644 (file)
--- a/configs/CPCI2DP_defconfig
+++ b/configs/CPCI2DP_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_CPCI2DP=y
+CONFIG_BOOTDELAY=3
 CONFIG_LOOPW=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/CPCI4052_defconfig b/configs/CPCI4052_defconfig
index 25818bd3b4411b06bff0e0e16b75074ac9009f74..d7c71c1a9900ce448a0136bb058777c085db4271 100644 (file)
--- a/configs/CPCI4052_defconfig
+++ b/configs/CPCI4052_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_CPCI4052=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/Cyrus_P5020_defconfig b/configs/Cyrus_P5020_defconfig
index 78e94ab7fa90950fee3e1d6cec23856e01ffdbcf..d53c62948318d02d8e8384fc0ced060d5cfe247f 100644 (file)
--- a/configs/Cyrus_P5020_defconfig
+++ b/configs/Cyrus_P5020_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5020"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/Cyrus_P5040_defconfig b/configs/Cyrus_P5040_defconfig
index f03d738b5270c3f22ae90afa3cdc692a4069dc62..a7c6307a83b9f427a03eabc350098a4d8a74030e 100644 (file)
--- a/configs/Cyrus_P5040_defconfig
+++ b/configs/Cyrus_P5040_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5040"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 8cee863f9a1d187019874a9cd4d47023c2ba84d3..5b0c65a9d2bb5f32080b4a9c4deb8790f41fedcb 100644 (file)
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5208EVBE=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_MII=y

diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig
index 93e39b494302efe5710c072878591ccee88270d8..36067000ef661e865a4b8934c6d769d0d2250dca 100644 (file)
--- a/configs/M52277EVB_defconfig
+++ b/configs/M52277EVB_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M52277EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_SPANSION_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index b63386d59a0253d48f57ddd91e671a17880d2d0f..af463c3c7c2809fea8f80c66868e598b8972ec1f 100644 (file)
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M52277EVB=y
 CONFIG_SYS_TEXT_BASE=0x43E00000
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index ffb709c98b076b603b71fc80e2629b1cbd1c3fdf..eff91eca58c44370c7f15562b774e056c4ae242d 100644 (file)
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5235EVB=y
 CONFIG_SYS_TEXT_BASE=0xFFC00000
 CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_I2C=y

diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 0885727a4fbfc9476abf6550c4075e914ea78051..28c7f201b2bfe3f838ea08518f9d655e5a93b232 100644 (file)
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5235EVB=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig
index fc29e306acb35905640423747d8fcc56f80f0325..e758873c4d23330ea78ab785189ff5fab617f7b6 100644 (file)
--- a/configs/M5253DEMO_defconfig
+++ b/configs/M5253DEMO_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5253DEMO=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y

diff --git a/configs/M5253EVBE_defconfig b/configs/M5253EVBE_defconfig
index 15c22df7a569a91476fc153d8578da9501349d23..17ded5888764f96ca1933faac11085a7966fe1cb 100644 (file)
--- a/configs/M5253EVBE_defconfig
+++ b/configs/M5253EVBE_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5253EVBE=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NET is not set
 CONFIG_CMD_CACHE=y

diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index 585ea17d5d40287e016cfd6e338f98fc6ad66eb0..7638b18991b0080fe6e49aebb0ecc110ac57b9ed 100644 (file)
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5272C3=y
 CONFIG_SYS_TEXT_BASE=0xffe00000
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index cd751181d1c4581e2f96539929c0f4eab02c4518..a7af3564baf45d6804cc424fecd7ca3d2a248637 100644 (file)
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5275EVB=y
 CONFIG_SYS_TEXT_BASE=0xffe00000
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index df12b3a83233141050506a6b7beb9acc8066decc..f415f7b5f4b3da08a6453331c104e27204c4c7e9 100644 (file)
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M5282EVB=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index b9a4fdee76b954bd78b0553f8210bc5fffe26066..9a5d36a2b4be063d2abfc4b3f6a02d53053749d0 100644 (file)
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_M53017EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_MII=y

diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index dc90334595ee18730ae3ad63bf00f1e2ecfaf8c7..f09af5ecd78d8a32a996eeec820fe32c1a78595e 100644 (file)
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5329EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index 2850e3aaed73c30874512a8d0cfc475f9388394e..9954afa2ba6d4bbf2fb605feaf9aeb0c6d58fc84 100644 (file)
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5329EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index 9b63e546d3706cc1d38e2d77f28a1e76ae849577..6f89dd28b8c6e5e4c9f4240099f639ddf962af27 100644 (file)
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5373EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig
index 5f354a8fb285bb01e69898f1c2948897e920a5a3..25ee121a9434f5e8275fac79046915bb9f689407 100644 (file)
--- a/configs/M54451EVB_defconfig
+++ b/configs/M54451EVB_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54451EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_INPUT_CLKSRC=24000000"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index c43c49d81d4098e5257e278e90417a8d5131ee99..af0de256f3c37ee3dab47a19908b6cc7f9487017 100644 (file)
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54451EVB=y
 CONFIG_SYS_TEXT_BASE=0x47e00000
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y

diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig
index 8e1bcbfee93435d40536ac83fb67ea0b3b62708f..a59421f3e8dcc81cdad3a460eb7517292e28dbf4 100644 (file)
--- a/configs/M54455EVB_a66_defconfig
+++ b/configs/M54455EVB_a66_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_TEXT_BASE=0x04000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y

diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig
index 705b5ae9399a0293bca2c7fc4d13f5cd7daed657..89150a71947b48a35555429ab35dc3230810dc47 100644 (file)
--- a/configs/M54455EVB_defconfig
+++ b/configs/M54455EVB_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_TEXT_BASE=0x04000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig
index a1dd018324911100ae70256593e54aa6a12e77e7..862003d1673211f481b7a5a63a37ab382f6f47ff 100644 (file)
--- a/configs/M54455EVB_i66_defconfig
+++ b/configs/M54455EVB_i66_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y

diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig
index 3a173030d505f2549a49ad6b1400d3afcc7d08c6..b568e2a892a98c46bce5543f2d641186b39cf02d 100644 (file)
--- a/configs/M54455EVB_intel_defconfig
+++ b/configs/M54455EVB_intel_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y

diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index 52441d4e951a42df549e2e268b12d4834d2a6829..a1ce1b26dde81e3ea94c40bc6bb32845a5fc26d1 100644 (file)
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_TEXT_BASE=0x4FE00000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333"
+CONFIG_BOOTDELAY=1
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y

diff --git a/configs/M5475AFE_defconfig b/configs/M5475AFE_defconfig
index 3bad5d0d49c67ae0a438ca89797369d922797384..0e3e1806d41b5add0d3ca5b153a5b8b1293b4865 100644 (file)
--- a/configs/M5475AFE_defconfig
+++ b/configs/M5475AFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475BFE_defconfig b/configs/M5475BFE_defconfig
index d3ff58b660617e4dff41892e8d80f831dc6c9ebb..5c2d31bcd6829488fe7a05c2a9cc7d275cf31661 100644 (file)
--- a/configs/M5475BFE_defconfig
+++ b/configs/M5475BFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475CFE_defconfig b/configs/M5475CFE_defconfig
index 670bda5c14c8553122607c2c4198ab06cb70e6b4..58d354bcd2eecf73b26ec56e5659fbd5f8deb573 100644 (file)
--- a/configs/M5475CFE_defconfig
+++ b/configs/M5475CFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475DFE_defconfig b/configs/M5475DFE_defconfig
index 4a49e90796b257b7a6cae7076f023ed7ef5145ef..13cbd247e50897a19c8694d788d8faf65965bf5a 100644 (file)
--- a/configs/M5475DFE_defconfig
+++ b/configs/M5475DFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475EFE_defconfig b/configs/M5475EFE_defconfig
index 8e90823a94d8865983b258bd5988a51bd0d33650..f82ef5c2152aed21cf1e16954437b62244d7fbb9 100644 (file)
--- a/configs/M5475EFE_defconfig
+++ b/configs/M5475EFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475FFE_defconfig b/configs/M5475FFE_defconfig
index e26b1fe7fa9813c51252e9e57102a87bade67aa7..08d5ff335a99d24a1f5d894efae16bd6850da484 100644 (file)
--- a/configs/M5475FFE_defconfig
+++ b/configs/M5475FFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5475GFE_defconfig b/configs/M5475GFE_defconfig
index e79d991ae5718486096c308597bd9b4c08749c95..6fb7f630baef3945a0d742250712aea9e583c1bb 100644 (file)
--- a/configs/M5475GFE_defconfig
+++ b/configs/M5475GFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5475EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=133333333,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485AFE_defconfig b/configs/M5485AFE_defconfig
index abdf5043fecd2a2e308e43011c63dbca818e4cad..36e95e81535442daee1f052e294f01a93811f78e 100644 (file)
--- a/configs/M5485AFE_defconfig
+++ b/configs/M5485AFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485BFE_defconfig b/configs/M5485BFE_defconfig
index 0708f184d627134364f3203c82b9663043aa5b86..2dccf22d4a12f1b588347edab037052219e1719a 100644 (file)
--- a/configs/M5485BFE_defconfig
+++ b/configs/M5485BFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485CFE_defconfig b/configs/M5485CFE_defconfig
index de2c9f11248954d6a809a704816f57d1b6bedb8e..e40efb0f22ef0f622c46b64e02e4fafc7995263b 100644 (file)
--- a/configs/M5485CFE_defconfig
+++ b/configs/M5485CFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485DFE_defconfig b/configs/M5485DFE_defconfig
index cc93f814a9be89740b6ccf93a4aff8bfa475facf..692cd40ff5c48ccd19e05d7af44b36799506e95c 100644 (file)
--- a/configs/M5485DFE_defconfig
+++ b/configs/M5485DFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485EFE_defconfig b/configs/M5485EFE_defconfig
index d084d58d71a7376a62b29f3e78a3e496c3becd7b..ebd1a556b455e9e5d166d4f33f8ec7cf94f9080b 100644 (file)
--- a/configs/M5485EFE_defconfig
+++ b/configs/M5485EFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_VIDEO,SYS_USBCTRL"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485FFE_defconfig b/configs/M5485FFE_defconfig
index 0e1b285ffaadad5772da795c0f4a439a59214ec9..18f26f1df836328614176e4cb4e1e29522a0778a 100644 (file)
--- a/configs/M5485FFE_defconfig
+++ b/configs/M5485FFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=32,SYS_VIDEO,SYS_USBCTRL,SYS_DRAMSZ1=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485GFE_defconfig b/configs/M5485GFE_defconfig
index 66e5316f186eaa7f0869839c1815e02fe658182e..87fe150d4a4ae33d57ac105599d0484fe9e066fc 100644 (file)
--- a/configs/M5485GFE_defconfig
+++ b/configs/M5485GFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=4,SYS_DRAMSZ=64"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/M5485HFE_defconfig b/configs/M5485HFE_defconfig
index 9ec6c459a562c041a10add6bee16228870a14c1d..d67c01f533d5f73c7f4696d7f64a99c4dcc746dc 100644 (file)
--- a/configs/M5485HFE_defconfig
+++ b/configs/M5485HFE_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_M5485EVB=y
 CONFIG_SYS_TEXT_BASE=0xFF800000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BUSCLK=100000000,SYS_BOOTSZ=2,SYS_DRAMSZ=64,SYS_NOR1SZ=16,SYS_VIDEO"
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="-> "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig
index 0d0c029d666d2d388de28f796789d14ec31d39a9..c9913ae3afa03666bde86800fc617c0085aa9a61 100644 (file)
--- a/configs/MIP405T_defconfig
+++ b/configs/MIP405T_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_MIP405=y
 CONFIG_SYS_EXTRA_OPTIONS="MIP405T"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig
index aa23499326046e48ce8dc3c3eb019b69db74c732..1d8e38ebc5e43a7c406fe5176971c5a690a1feb0 100644 (file)
--- a/configs/MIP405_defconfig
+++ b/configs/MIP405_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_MIP405=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 9e6f50b7199340fc382f3f00cc6ab322046f0ecb..4e25193cf64d95d88023a6c46473133d9113618e 100644 (file)
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index 978e23164bcde9f19318ef249f681e8515b7c6d8..2fdffa9b43990a0996db09a951309b96b77d9147 100644 (file)
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8313ERDB=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index 35db54169c4bd4e446c26939d7b9ff2984a4644a..56538ccb942b80ca876c3c88eb465e30421ddee4 100644 (file)
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8313ERDB=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 63c6d7b2645ecc70a3158703d38399c3ac7b4b05..efabb9a1eb59b7c39c300690a3e4ccfeac2ba6d0 100644 (file)
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ,NAND"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index a3d529405742e8b8330eef11a30f5479a6648140..be0e2748673f9ccc1a42d5afadaf886476ef7bc7 100644 (file)
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ,NAND"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index dfb41f0cee51faff8b224d77342a264c8df966d1..f2aef3332e1a4df6c7ec62e2f3ab461db51f62bd 100644 (file)
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC8315ERDB=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index cf2f6557e821f9f6bdecfa487b22bdb18b2456c7..5e5a2d0f98814a4ccd34b3b03522acc807ca8354 100644 (file)
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC8323ERDB=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig
index 0c85f409e41238970454c2edb0310caa7d202fbd..72aacf3178711df30b39e9804574c6b9553855a9 100644 (file)
--- a/configs/MPC832XEMDS_ATM_defconfig
+++ b/configs/MPC832XEMDS_ATM_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC832XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig
index e9cf0c8d9768e84e2633714289bad577c77d7182..3e7390f84e4a6789ab518ff9f61e3d1be1023c51 100644 (file)
--- a/configs/MPC832XEMDS_HOST_33_defconfig
+++ b/configs/MPC832XEMDS_HOST_33_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC832XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M,PQ_MDS_PIB=1"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig
index 92724311a6f2d70136c134c8f350db6c2d058ccb..c65d3c94022d8193fe25843514d2f038e45a0811 100644 (file)
--- a/configs/MPC832XEMDS_HOST_66_defconfig
+++ b/configs/MPC832XEMDS_HOST_66_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC832XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M,PQ_MDS_PIB=1"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig
index d8078847f541642f608f184cb5f0c3f49488da2d..5c95787e2a3068303ed3e47b49727d48d5521bb6 100644 (file)
--- a/configs/MPC832XEMDS_SLAVE_defconfig
+++ b/configs/MPC832XEMDS_SLAVE_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC832XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,PCISLAVE"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig
index 8900665b5bfe3d02222705e0adfcc33ea6df858e..4d7c52f054af7e1c9e78f10e4938dc17b72d4a00 100644 (file)
--- a/configs/MPC832XEMDS_defconfig
+++ b/configs/MPC832XEMDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC832XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 60561cfdd553a57e589cad5d0aeb4b1ae18de295..7ed79233b1dc8efe4ac0df8010b14ac4012c2709 100644 (file)
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC8349EMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index fb7485cd90e757fb10faea5792e1e990fff0f8bf..f1afcf853cf57169e496b1439c8c65d1930c4d3a 100644 (file)
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8349ITX=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="MPC8349E-mITX-GP> "
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index 65edb6392560ecb5e5aba1b1d44d910887fcac1d..5c9f7fc0766f3143e3968f954fb376574c6999a8 100644 (file)
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8349ITX=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX,SYS_TEXT_BASE=0xFE000000"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="MPC8349E-mITX> "
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index 358656e8e097fb231d953c0100cfb24caa3e3af8..df08fe38df91c217e7b316eded4466614508f2db 100644 (file)
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8349ITX=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="MPC8349ITX"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="MPC8349E-mITX> "
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 0e09e77afe657c9acc7fc8f67daf2eee870bdfdd..d8b5607093b4195f7af841602643527791e64993 100644 (file)
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC837XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index f7ad159f0a5526e233ebfc401ae11ed1eaccb13b..c04c2560a80cd5eec483b4a063b64b158e871dc9 100644 (file)
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC837XEMDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 1b2c7870e8a3b6f38c9375619c43027025793c74..0d6e4b67911bc1b48604c60b2943e55464a58822 100644 (file)
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC837XERDB=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index 40d1a3a2355676fa280e37b0e43718b9796c957e..2ffc6474cf88fc94d7e12ed384e4852bffe08e98 100644 (file)
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8536DS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index c6afe45adf1aa1c97d94f20625889e53848b8b84..5f4d51a6c70805482567b818ff995ecac1b5586b 100644 (file)
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8536DS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index eafa11c44ec4b23235061a178890bf94b728c4af..0fdc9de5e6c7fb418a02d81c79e3af2223f028eb 100644 (file)
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8536DS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index 0ae81ef61823a8d657a8e27a246e5b1992f28d09..13e06d655aa1b034c7343487515b64caa47661e3 100644 (file)
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8536DS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/MPC8540ADS_defconfig b/configs/MPC8540ADS_defconfig
index 401a86dbdfc1f798462c292716d6fbe75b6286a4..e3cb0d5e9ae51bebe745278520933674d992a2fa 100644 (file)
--- a/configs/MPC8540ADS_defconfig
+++ b/configs/MPC8540ADS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8540ADS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PING=y

diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig
index ddc3b5b8d336086b45464839658c92f784c5b8d2..1ea8800441b12941eb160dc93e5128c17949c656 100644 (file)
--- a/configs/MPC8541CDS_defconfig
+++ b/configs/MPC8541CDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8541CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig
index a340c8bb554e3742cd8f80edce46220b784fc863..ae529d17255bbf9cdd8675b00256f8f251776389 100644 (file)
--- a/configs/MPC8541CDS_legacy_defconfig
+++ b/configs/MPC8541CDS_legacy_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8541CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig
index 06569e288b7c5b92f0a7c1402e39f6f50398d776..ecb05acbb6254cb190853e6196c90895050b34c6 100644 (file)
--- a/configs/MPC8544DS_defconfig
+++ b/configs/MPC8544DS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8544DS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index d038267d909a3c46da96f5764eccf82c03c048a1..066eaf229b91089e8a1c63cb36468f6c1812d9dd 100644 (file)
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8548CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index a42d991dbb87e174b68de98874fd6982ccc6fe5a..ee400a38fdd5ff415dfd72c5c97bc807f99abb58 100644 (file)
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 3a730f9af8c6ea8ff2ebe00a337957651e3dce57..b7334615f983f6b5f6781ec896b824bdc7326079 100644 (file)
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8548CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig
index 86db71c70a7f0127213a83e76cf4d7d0dd474e2d..da42112fab4e32892d00d8d14bbe7849238e7bef 100644 (file)
--- a/configs/MPC8555CDS_defconfig
+++ b/configs/MPC8555CDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8555CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig
index 485e9870a026f087578e1e7793af00166f647538..fb148912b9a4c24893146c3352c398e76ed5df9a 100644 (file)
--- a/configs/MPC8555CDS_legacy_defconfig
+++ b/configs/MPC8555CDS_legacy_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8555CDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8560ADS_defconfig b/configs/MPC8560ADS_defconfig
index 19407b347ca13b5ed38a2af78908590d96edbc94..67063c81da3208890ba3621e42ce82037e2b750e 100644 (file)
--- a/configs/MPC8560ADS_defconfig
+++ b/configs/MPC8560ADS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8560ADS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PING=y

diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig
index 5ec3712467649bf5a535b25c57a6772e42acfbeb..2e7dcebd07d822bca7dac9a81d469110d1489213 100644 (file)
--- a/configs/MPC8568MDS_defconfig
+++ b/configs/MPC8568MDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8568MDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MII=y

diff --git a/configs/MPC8569MDS_ATM_defconfig b/configs/MPC8569MDS_ATM_defconfig
index daacef757623d67eff37191db31854cafb2d8bb1..505a8536aa9c506c42bd5795ab95fcb05f234310 100644 (file)
--- a/configs/MPC8569MDS_ATM_defconfig
+++ b/configs/MPC8569MDS_ATM_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8569MDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="ATM"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8569MDS_defconfig b/configs/MPC8569MDS_defconfig
index 26ab184b459fef7891cfbc5cbf10a601c7ce154b..0f9cc2fb925e5b56ff348366ae71d76733b3d42e 100644 (file)
--- a/configs/MPC8569MDS_defconfig
+++ b/configs/MPC8569MDS_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_MPC8569MDS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig
index 1720d9e6fc1ce1d4a200ba11eb74d6c4ba693e2b..8218ef688ff9547f3427995b449b126234e124af 100644 (file)
--- a/configs/MPC8572DS_36BIT_defconfig
+++ b/configs/MPC8572DS_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig
index 63cf745ce7accbf03f0e7a7379da8d517f77166f..6c65fbe7deb07d6783371dc02d857ff01dc9542a 100644 (file)
--- a/configs/MPC8572DS_defconfig
+++ b/configs/MPC8572DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8610HPCD_defconfig b/configs/MPC8610HPCD_defconfig
index 6883249cb7e01d5d6c1d14879f7b273effc183c8..10607e80dc87202f0006eadb352b58a5e948e9e0 100644 (file)
--- a/configs/MPC8610HPCD_defconfig
+++ b/configs/MPC8610HPCD_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC86xx=y
 CONFIG_TARGET_MPC8610HPCD=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index c85ddfe1c9c5588c7062489a8b7d335cc32482fb..b90e6ea359e4f9fa77b3740d733f1e4264d5f20c 100644 (file)
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MPC8641HPCN=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PHYS_64BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index d71369ece250b96a35b41cb43f196005b1724423..d8f74b31dcbc61774966b429b1efb18a2e8d8749 100644 (file)
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC86xx=y
 CONFIG_TARGET_MPC8641HPCN=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
index b3f825e33f28ae581ac08f3a7c8a37b303db35a1..2ac2596dce36acbfe6dfb5c59bbda171c9727ca5 100644 (file)
--- a/configs/Mele_A1000G_quad_defconfig
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
 CONFIG_MACH_SUN6I=y
 CONFIG_DRAM_ZQ=120
+CONFIG_INITIAL_USB_SCAN_DELAY=2000
 CONFIG_USB1_VBUS_PIN="PC27"
 CONFIG_USB2_VBUS_PIN=""
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"

diff --git a/configs/MigoR_defconfig b/configs/MigoR_defconfig
index 57b7db4d3b540e2388ec928d7c11b6296d0be544..129403c34abb575c752fd1e3f80f514008b40f32 100644 (file)
--- a/configs/MigoR_defconfig
+++ b/configs/MigoR_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_MIGOR=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/MiniFAP_defconfig b/configs/MiniFAP_defconfig
index bad6a39003b9f927f2d85f5ac6a1019555cc7b5a..39fdf6a93da1f8cb477ac7910e31d18df595473e 100644 (file)
--- a/configs/MiniFAP_defconfig
+++ b/configs/MiniFAP_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="MINIFAP"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/O2D300_defconfig b/configs/O2D300_defconfig
index f7d7f00bf76299b2920f2858da6cd39dc94afdca..3b36d8fa34b27e5fae7363b013bbde4eb5eb36ed 100644 (file)
--- a/configs/O2D300_defconfig
+++ b/configs/O2D300_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2D300=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2DNT2_RAMBOOT_defconfig b/configs/O2DNT2_RAMBOOT_defconfig
index 31e309fedbb0885836c5344073a302b6f1be0b24..977da33c682ae672721a1dd4ca8a7e6ee9a38262 100644 (file)
--- a/configs/O2DNT2_RAMBOOT_defconfig
+++ b/configs/O2DNT2_RAMBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2DNT2=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"

diff --git a/configs/O2DNT2_defconfig b/configs/O2DNT2_defconfig
index eb65c22aeadd1e325fb45ffb8b29565f2ac0e6f2..32e475d5316a234fc29d54b18c0e8ff89488f097 100644 (file)
--- a/configs/O2DNT2_defconfig
+++ b/configs/O2DNT2_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2DNT2=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press password to stop\n"

diff --git a/configs/O2D_defconfig b/configs/O2D_defconfig
index 67a7757e7dc2ed93030192dab27f6af1b32f0fb8..22e83577bd7db450683e061a01bdcacdea7b2f52 100644 (file)
--- a/configs/O2D_defconfig
+++ b/configs/O2D_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2D=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2I_defconfig b/configs/O2I_defconfig
index 7a29872fa9707fd6249710053f91d156be21416f..a1c2794c0d1c7466b4bef3a9726823ca7fcdfb8b 100644 (file)
--- a/configs/O2I_defconfig
+++ b/configs/O2I_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2I=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2MNT_O2M110_defconfig b/configs/O2MNT_O2M110_defconfig
index 4f35c2e8fce203561828613e0e79a1967ca5158a..f33496cfd1cebc9dd7e2378a4597e8dc64e2eb8c 100644 (file)
--- a/configs/O2MNT_O2M110_defconfig
+++ b/configs/O2MNT_O2M110_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2MNT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M110\""
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2MNT_O2M112_defconfig b/configs/O2MNT_O2M112_defconfig
index 77d18798dd90f9cd861cd27fb93552c1ff49e885..04a8fdda4b69d9d6183536b105caac417225607f 100644 (file)
--- a/configs/O2MNT_O2M112_defconfig
+++ b/configs/O2MNT_O2M112_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2MNT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M112\""
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2MNT_O2M113_defconfig b/configs/O2MNT_O2M113_defconfig
index 6d91a1153b880df0e3711e5eaf33a39b7ce26aea..2e4b8abe95d38a89db68046f105850ca5ab214df 100644 (file)
--- a/configs/O2MNT_O2M113_defconfig
+++ b/configs/O2MNT_O2M113_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2MNT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IFM_SENSOR_TYPE=\"O2M113\""
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O2MNT_defconfig b/configs/O2MNT_defconfig
index e135f93b2d40be176d9a996c50203d358fbae30f..9176431e017431818dedf4853862204b698c463b 100644 (file)
--- a/configs/O2MNT_defconfig
+++ b/configs/O2MNT_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O2MNT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/O3DNT_defconfig b/configs/O3DNT_defconfig
index b6bc88e638e98fb0feeb1aa6eb54e2f1319c001a..55054ac757f46feb31bbc0115fdbbba041677935 100644 (file)
--- a/configs/O3DNT_defconfig
+++ b/configs/O3DNT_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_O3DNT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index af6a4be901d41ebdcb66e1d775654a8a974d73a1..5e05795cbb7e2958de1a64de701910c8e9acac2b 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 5ed93a169ac01d1831817c72873df947775f3fb2..5e12add6ceb10bca442594eef73b192d5fbe6252 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index 2c05f6e1812da9312f36eaca3de6599436a8e76d..b63475c634a2921e4a03455e017ba9395cfd2038 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 4dbff83c045082ab7bc6b9059fb1763efdb10fb1..74168dabbd8225efe8c425a79673bc54ac6a16d6 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index f421b224e8c3b1d2f49767024f0b116f163d7d65..2e34a10a0a38630e739dc87652cb874e6d02e567 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index f0a74fdba6e7cfacc40ca89a0b5a4b2b3aed4aa4..d5bf9467c7342a3bd4ba3a5f9acef06c7fed0653 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 6bd7dcb655515173d487ecadb39f0c005fb112de..aa08a595c6df2f1681db39236008dc4df1882204 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index b8968a8457389c73135dc37c4c605c78eb06acfb..a745bb94108249bdbcd9d55e3474449cdbc6aa34 100644 (file)
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 551b9db1ea68d0d0e5d6bcf2bc808a07fc9c066e..8ac7c115514da21852a6cd6baa68c2f7f94309b0 100644 (file)
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index 7d8ebfece158b7223089345031fd671ed017edcd..808851a826b1939a89d779da2887e93532c964aa 100644 (file)
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 6fd23ac04b9fb32654d3610769493b0bcb3dcf8f..ca3ba080d3a7aecbd9b3974abbb2dba325a1c8a8 100644 (file)
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 1f29b11e9ee28fd30da8de5329160a0b2f70cc43..dff79c60c6d24da0754e2a6c75ae3d5e1c52cb14 100644 (file)
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index 6da92e415e309f401920ceb246d628815a2670e3..800e7b9c2304fb5c8350df5617394129ce3ae98b 100644 (file)
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index fa7cab84df5bf36292cb8bd249607e0b3dd3bda1..e1be2ebba06c06256617e7ae74de5ec71569b4ff 100644 (file)
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index 860bc6a6393d17de4075d3fde433815976d0539b..e8564f9f580d00c3322863d4608da8b81e1b55c3 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 23d938bd30aea4962a3d81c2abc2fd8ad71071ce..425344b5bbdf074c47cdbf687549042d054dddcb 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index 5bc446b585af9d469feec7990c63279169e013fd..dce2a1a92eb1a698223f18cdbacafc2ec2a6a6b3 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 7b83294b1bbef83a13ee9a15adb5a3230acc7a05..883de6f423fd7428c6bea708ddc9fbcc574815c1 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 234645eef4794ad081f68d5c308968f473cfc3ad..381caad7b4e9ffb83eaa4282c1c09de071f48940 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 7adcca84e343546b3f72b33fcbed6cd1fa034bbc..293a9455699092d69f7b324caf4463855cb252b8 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index c455059c9aa90f5f4634486533c360900d822797..0c8ae441c9f2331a58ae4e5d15940fcdd19ed20f 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 45f54f7a0da80e7e6265ee9c23fac965342adeac..880be23ad9b85f2aa980639eb11cd2bb75c741d8 100644 (file)
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 7d6de18ebe02e89fb32914847f94e5a5f86309d8..d6f4f58f1fff5f5d7dc7ba368a1212ae4091a2c6 100644 (file)
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 629fbbb7da773067d246b9e8fad7549cfd5a63d2..a87555339008ee5be1c0e436f1ff899e899583b8 100644 (file)
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 8f44aee4799dade7eea16ce0a11317e6e8680101..3e966315f25a2746fb21cd039e17b8497e6e30f5 100644 (file)
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 37ebca376311fc1e2c5de0207131b8528d69c341..5adfa4940d7a28fb976030c4e384ee3a282fdb8e 100644 (file)
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 6d6edd1f4c445e752e7d049dbd2cc4c29b861bfd..be7f0e28f47f891a7c1e9f307a2b462219ead0de 100644 (file)
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index d21afae47e9cfcdbd13a250466a17eb043ffaf9f..f82850c8634391da5d864427efa67753dd25d5ac 100644 (file)
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index a0e44718f875f34e728d8e40ffc553dbd248505e..bb2783177625175a5ad67656ab567eb75205d437 100644 (file)
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index d2095819f45f43551304c48de8bef7ec57356008..79a4282e04be13ab6b8d6d722a0aae4bb7b2af2f 100644 (file)
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index d07ed43aee64e4d2733da46ee71abf4edaabcf28..9b6370d79439dd5566ff0635529cbb7af70d519f 100644 (file)
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020MBG,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index 0fe87d1c428dcb6c34477ca71ec93399fa86e069..5c5eb5ed5a7153e9becf3648ac8dd356d2ad045b 100644 (file)
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020MBG"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 735c53f8cf59eef16d05c3a1b32b25df365396e1..1c98b5503f22e8a668664da915e21535fdcf868c 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index 953552d68aeb9783c03ed1171e55f55dd466c5b0..e5bff617f3005ac6e1ed71c0b6614d316959a5b0 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index ec94e061e5eb2c0de0c95c1268fa6ebc78bb2147..dda50fb590c116c13d917f039608c38a3b691286 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 044e7393e16b92f6ede353bb602c647eadaa0eae..b69370506a88c6387bc82f8136b66e1cda239fd0 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 3bd72f074935fa504ffae76b730f0cae6608f4ff..3d4a746e073b7c7f58721dae23d26928cc5dcd18 100644 (file)
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index a9a659c66056b9624d16955a118820e8b9d6f3d6..121ff7925aa2e310b9917fe589b98267b1067833 100644 (file)
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index f01dbc3bb4a816cd29fc58244975380960cf1023..9dde9c7d05347b28d425cd6778059244fea34f9f 100644 (file)
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 37e14da144c43e19935e91e83d69e123b2f7b9c7..8ee1fa46bf9f1e1946eec46386125fd74434c2ec 100644 (file)
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 63faa06a4602495e32c84e407d48aeb7555fd9fb..a296fee4c6f9110dbeb0456fd2957a3eea442ee6 100644 (file)
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 255b8e221a5dac087eec7762e3a43521fed3c8bb..045216c9157d02510e67f079730160681b5d2f1e 100644 (file)
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 61a635ab77c18babd9afe190621013ea40e7e98b..7ff3b741b17e85e86be8d3e84f1197b7bfb529f0 100644 (file)
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index f8e633aba84421221741d115b6a6b8063d388e0a..32c504708aab06b1838300c895783e4ed61f4865 100644 (file)
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index d6775d913bc8aabdca9b10697f8a53393a964d65..6dfe19519765384f4a5d47c794bbea4561520676 100644 (file)
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index 054e9fc76d92e3fcc73ec1d451c0e8ca811655e4..98f928524a22cbfcd8a6855bef095fef1570950b 100644 (file)
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index b0553ef34293ee344f334068394fbe6eb8a74ce4..136e5ac820e004bab16c455ee5cec87236644710 100644 (file)
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020UTM,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index 36f7366c5efdfba6a6262f669605b5bc1cef29e8..42f28cdfb3a688f513778265e601163062ccd16f 100644 (file)
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1020UTM"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index b24f8ec995c03bb45475492c81f64aba19aebe8c..eeb232d7a25749753101a0fc37dc60a0237300bf 100644 (file)
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index 8f618ae38e7684e92da5c9a5fc7e396848c1c0df..d2f83fa2b4e10811b58fe45ca339f5ac19c8e95c 100644 (file)
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 70e4d4441923a2ed8c56c14a0ab3e955d9d2fbb3..09ba6eaecd02aa79c2b0d89fad9dab26afe9e11f 100644 (file)
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index e119befc39d5bc403660a983a9cf980aa8ddaa11..7652d29ad844d1d147532d2d4bf7e2c20395f4c6 100644 (file)
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 772a3133b947eb9df553fe5e6f97fe1522e52ce5..a49dfca4e0d9b9394837cd926b1f2ca76cdc41c6 100644 (file)
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 9206cc7b4a4ee7e1564f3ea3628f7934b98e5598..c2d23b825459058bd48633e9e07a79196f24d698 100644 (file)
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index 85c03aa92eb0cd726db91027f6441a58f7d290b0..facbf9efc70cd4bbc284c0080fa1bf46d082ffe7 100644 (file)
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index ae78a8e91dc9d694b2f45a92f63f4413b334b356..eebc69b7f6390a57b31753b66176c1bf938c36be 100644 (file)
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1021RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index af98b8e57c7aa685b36456e162722ac4dee95fa6..352305d8df2a5734049b64057d2a1cb6e0c9fbca 100644 (file)
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index 0ea0201a117ad144978ac1b627d43c7e3718cb7b..68a6c118389a8c6714753ae6a35c02b7732a3a7b 100644 (file)
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index 409344941289a10970fbf062334d9b3e9f998452..21300da4572a4fbbaf889d4d1eb0f620b8d3ba4f 100644 (file)
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index 24e867830954136f4b29b0ebabdcad1cd0f0e507..c63abc3d6a05d43a7f5c49edb08560c8091d07df 100644 (file)
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index cbc3d763910ec37caf4bdcfadf22cf0a323f560a..6d90082236dcbfaf3980949f7b7fd6f18ae68f4b 100644 (file)
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 8c36f58b7f74658ff39ae8cbfd1a95503b2b2f03..7643544694dc46d0c307287dd602b2219241e718 100644 (file)
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index 1c7b323229ef97954b42e7f88c578deec6488fdc..2e96cb2806a82ef155f86631bd56f8000214ce44 100644 (file)
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index b5dee335e9eb53ad7af16108fb30c114dc317f6a..679353e952af3d28593f2ca799a46c317152ddd1 100644 (file)
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig
index bdf91d2f8da5a461a2916e10cb72ed3183e95760..3505e7d9ab84ffbbb06ab8126ee549aa9d25fccd 100644 (file)
--- a/configs/P1023RDB_defconfig
+++ b/configs/P1023RDB_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index bcc0aede640dfb18c528294aa04a2b1e4cea059f..d3731a87d2ae3593aa84b012ecd848b0e8583375 100644 (file)
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index dc747089a5cf470ebfbeb8dd058caad3315521ed..2a53c57c12196f76a4aee7cc8845c0196f41f62e 100644 (file)
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index a59ddde3515b31e3927b5a6fc9b9112dbddddb99..dc93a19d299581748575048e9b9d0825af9ba07e 100644 (file)
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index 999359339139b6996efc62d23fafe877a0a1c67a..b41e590b1cfe3f436ebfcae7f6ffee26a09c7014 100644 (file)
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index 8f723c6ff27db3f6827fe25f62d1e8eb1346b79d..5541bf98e18c5f9b8f8d92972ab375331891fe6c 100644 (file)
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1024RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index 5285f79adfef55cd1add935fa8adf94c5c80509a..98644861b5bf8efa3151cba38360bab38f7331f7 100644 (file)
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index ec6038c5209b643a58160f43812b0c4d7bc43651..8a3b80497ac17770029543ce59965df5b5a8d619 100644 (file)
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index 6ba76fa69f034100ac3678f9a8feb1ab8c1b97a8..eed18337cfbd405be0c1fa927b206df87bd854b5 100644 (file)
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index 86b9cd7d58d13e1c497ac6a77cc3e201a3db7f5c..89daf1cc8840e60f6fa05926d8948a20f02f0568 100644 (file)
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index f7ce9b69de28b78fd449e0737dedaee6557f8cc2..746e150b66acde4808b9c6ccf3c87c006dde7e0f 100644 (file)
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 21d98e3afab294cb94d32d286dde296ed0174531..2421a7371d5a202ca63146e22efb15d65e806d03 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index ce42c822c702b408e31b6411b27b2c53dfd79b7f..fce023ba5bbe17a43341df15acef13ff1eb02d32 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index c8f86e2b5870e2b532975a5f0d34a1939de3e748..a3162649cc9e0a09475a4e73289bb29e57f54800 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index a6a01e8fc8e82dd0584b11eea5c366b4952f3ca8..0bc2d1a2b5cfeb5a5449549c5a2960846b67bb8f 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 0f10e08bbccf4e9f4cbb3f7863490ba478e5efa9..cf1ccbfe5e8294a30536c21b9ebf90907d4a8fa7 100644 (file)
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -8,6 +8,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 8649e52008944962b0c61138a0562b39cb9211dc..e8b6e2a3925b6a36d8ecd80f4816e3d2537ef50f 100644 (file)
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 1764f2c01a05c39400af9eb818c5f5786778431c..bfbaea1b812db9e2c55b17508cc8cc116ee44907 100644 (file)
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index b9610e43899acbe555fcda077429f87188926a42..82e7b4b2c2cc34b4e8dc02ff32f29221b5c9e43b 100644 (file)
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="P2020RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index d4b1c557f0b7335ff68556309883e9f0fa952b88..66f6ec4e3efbb612eb5370768ca0f5ea7c91aad6 100644 (file)
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index a36e73193ebbf0c450290d8750889fe316e05d1c..590145809464f72ad0407e2db9835649ee17c27e 100644 (file)
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 4d4051176d94ffefd3c83cd5d34a0842bb32a31f..b7f3a0d42973c1488faa020c426fdf32325ad724 100644 (file)
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index c2dbd98886c7e0da8d3598849bbf852dc9436d00..7f07d2d9c693a1e9f91616fdc85b3df975324cbd 100644 (file)
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
index 3dbf5a31074b705690494c7fa08ec6f4fbf9dddc..a767520644ceeb6c5e7e208ab2b989c3e0368234 100644 (file)
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index aea98c63a4b19a6b6a18cb7d8d17a81ca40a8457..17e2ad5ee82c4f9e29421a0435e822543a002f50 100644 (file)
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index d5b1c12add1fa9e57549f54a14adf9af91176de7..c2790b22d5698de446c705caff012d4437b52957 100644 (file)
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index dfe0e1754eaf6ebc46e77d17ea9e432aed40f104..1c863dee7c59900b5f6cf79d1da9b4310e4941fd 100644 (file)
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index a8e21319a3e9362604820dd06814b1ce4e95a248..028b9f077a8896db00a3cd7bf635d2c1cd006bc2 100644 (file)
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index 13e2fed459c5b94f0f5131391b1e2e1b3730c5eb..d1b3f7001d203ef70adef1d2110fd9634d369077 100644 (file)
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 901c373d4033209eb6cdb573c92a02582c00ec7f..acce0840a40ad17e68165eed660081b3d92d9c87 100644 (file)
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index f9285a8a693d81950575e9a34fcb4a4cf53ee0e4..d20defab5eebcb7dc52fbbd8931ad7f77e3dac04 100644 (file)
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index d648d975aa432f1a6b8a18c6f8fc904eef5b50ba..641f2635ab8ddca7d9903cc33ccb00850234c479 100644 (file)
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index aaa97f74cc01e615c7a1679af17e872dca310a67..deba469617547ad95d1b3ce3d1f0e73b2f1dca3d 100644 (file)
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index 437e05a810a15cdf055886a74a4d9e8651c3399e..68c910ee0fbfd627b2cda41976e34579ab74f8c8 100644 (file)
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index a3f0d853167dfdb9aae8f01d9ac016ed6f960a45..130e2f4848204bcfae7bda38208af30e467cf7da 100644 (file)
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
index 7059c81aa4112b96fbf748d175fb12b59bffafdd..b47fc08a4ae2b62f36e864eed38ed00cb48df8e7 100644 (file)
--- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index 752a6c638981957a94c3af40e9fc55a92e2f7d5f..f9a7ed301567a8e22e6e7e37b5f3dfb5e765e3fc 100644 (file)
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 2ecb0b864b418213dc6fe2f36ba44c14f5a9c18f..ae9843c66e537dd40eed5ac16d2fa31d317926c2 100644 (file)
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig
index c26e72987fc47ddb4c8d25f892a23d92e03960e9..3edbee003d708b3774051df18f1af34dec652fa1 100644 (file)
--- a/configs/P5020DS_NAND_defconfig
+++ b/configs/P5020DS_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig
index acc617ece65e8fbcdeacaae7849cdf490e44d496..b7a2f1d5470fc016db4ba2219e68d04b53e0d520 100644 (file)
--- a/configs/P5020DS_SDCARD_defconfig
+++ b/configs/P5020DS_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 24d4f1736612f76102e18918976a0b24cbdea30e..9523a07ddc9695fb4249845e8cf28a44cc562520 100644 (file)
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig
index 3e97ee0084dc9f11e41aa5be4df1228b08855ffa..93d92d312dbd88ffe8d9077202a4e756b4a51f49 100644 (file)
--- a/configs/P5020DS_SPIFLASH_defconfig
+++ b/configs/P5020DS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
index f381326a582e8d2a87ae945731674237a09057b2..b5906514f250b13c0ce5637a1aac28523779214a 100644 (file)
--- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig
index d7145aee5ace70d720a1335ad5d96d6ef9638c59..8b8e55782145ff7608e0af337afdf444ca43162c 100644 (file)
--- a/configs/P5020DS_defconfig
+++ b/configs/P5020DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index 0495c4de0779547848bf1d3b727d0eca4cb8507f..e45ed753f3e403f45a3ca033329669d7cdbefdd6 100644 (file)
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 9be5ff1748652f72ced59499258eb79bfbb3c3ad..73b2216c82eab9d32bd24de5127f8ea0cad9842a 100644 (file)
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 66751641fba2fdec248974d41e2425c9afadc226..72923ca4e27feab9544c9c1dd188c63521eab5f3 100644 (file)
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 552d93a64515f4662742743f955338949ef78960..21a7ba542f4b1df45f291f20a0364cde00575e16 100644 (file)
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 2caec57f1267df604858a25d2dfacada6e2d411e..0722667d00f7229f79f20862dfaf95e43016dbcf 100644 (file)
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 07e67c893e2aef3fc0d45e1289a28924ccf11740..9c3a2ce9d7d24193987a708b306a2b943bd3c193 100644 (file)
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/PATI_defconfig b/configs/PATI_defconfig
index ae957320e51f9f89d89215b4cee8b05e3aa93457..53fdfad6feb72b5561ff843400e09e1cad1772d2 100644 (file)
--- a/configs/PATI_defconfig
+++ b/configs/PATI_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_5xx=y
 CONFIG_TARGET_PATI=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="pati=> "
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig
index fe887396da3cfffed06ccfc808f66f5ad2b9a1f1..dee793b3e6c07158d71d94d5a7b3b4fa6e199bf8 100644 (file)
--- a/configs/PIP405_defconfig
+++ b/configs/PIP405_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_PIP405=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/PLU405_defconfig b/configs/PLU405_defconfig
index c1795a4ae5b4db9be6d3040911c37823c52b759a..a0e84117051042fd935e47dfb792ab081a139039 100644 (file)
--- a/configs/PLU405_defconfig
+++ b/configs/PLU405_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_PLU405=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/PMC405DE_defconfig b/configs/PMC405DE_defconfig
index 8f60d87311bee0137b10d5ad281c0ccce17db508..cdb82d644863cc7a49972c30ea4af5a52c30bae9 100644 (file)
--- a/configs/PMC405DE_defconfig
+++ b/configs/PMC405DE_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_PMC405DE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/PMC440_defconfig b/configs/PMC440_defconfig
index 4d060ab69618d2405227f8350d37721e6165188f..704cd36bce9f50e498c151b9b89a22f062203227 100644 (file)
--- a/configs/PMC440_defconfig
+++ b/configs/PMC440_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_PMC440=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index 9a916c96fadac88ee267392051f2604cf1f10b8d..32df4e587541fdbe60c4584cf51d6e307b450e7e 100644 (file)
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index 2c41d03d79ecb215c2b8945310720caa8bbf378e..069f5d36bcfe2ee6c694597271fd368020f040b3 100644 (file)
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index e3cf48d835f6da93d8aa6a9b87a7a1f35a9c8d1e..984e60b63af299fb7633d4bfa01f4b3c39d6f686 100644 (file)
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 5ce9ed991ede4053df141ca62919189d15607a5c..109cade718ff41bbb38af791df6b6c35db03852a 100644 (file)
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index 44c9584655f34cbf838902a36e13e80575566264..de0d50c241b900e3d96345059332963688c414aa 100644 (file)
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index 6c4505fcf7c9629edcf4c90c22004c0290780cfb..6253b0522900d0ebf1276d18f88a3e09ed042083 100644 (file)
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index 0af7eab817b9bb9283b9b02493196df48536f0f4..71ff16606d13ffb8f06286ef4396d0b0f13ef397 100644 (file)
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index efdcbeb48c4e31608bc7961ab0d93d18caef0ecc..04204fb2b4e30fef5fa78c85d6b8c87066913781 100644 (file)
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 12a03766fc94aa8b7cad38e06feeba88cf9648d8..80dd6df6e6b7c1cfcb809b056c9929ed27199bff 100644 (file)
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index 84da5830ac468a825b60c71e39bde2a37de7b770..21f7ed40a93772f147b26bb03f34128f12ea9161 100644 (file)
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 03d009f40609c48c259abf6d17fca00013f95f63..a8698537458e4333a4ca107160ecae7a2d8f50c1 100644 (file)
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index a70963fbd333b18572532307b7b88937d1ba368e..c824674afa6bb0806dd2050c40af107de638cbdf 100644 (file)
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index a012f3d80b7f23db8f1158627a378489124ba24d..ce0ba29f6cb3360543a0a4f7b7f5c07ee212af8e 100644 (file)
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index d7cce8b8a6f280e7ce9ef974411386fec9e92355..21707f64a77c3fd1c421944a3430189fa7bc74ca 100644 (file)
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index ceae6cf1715b56199d84d9dbc5ac39efe72e52f5..557897605db10fcd7cb4f60141a5b78b134e44d3 100644 (file)
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 1359aad17c803c9f4c30be223647d02c2fbc6d49..6a9df4804de4eac2aea5bb7ebf9d7e63feeb84b1 100644 (file)
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 7ffacd420c1d185bad2df57c3c79686535231d4e..d54b83543de8d44e9c083e9720d15293771e6ddd 100644 (file)
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index a07a59aed32edb5f4160a42d9be19ebf10ffc45e..9295c61ca2575bfa74ebb2f26d18c66021b064e9 100644 (file)
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index e4c095e8d2d5000758e203e24703657972af7daf..de3aef0ea169d8c57a13f78a647c8f26e3a198d1 100644 (file)
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index a2c1495316107f21baf759aaf4bceaafee6370f5..fe7b9d18e900fc0c64e20d8494503fa746c3f1d3 100644 (file)
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 9a78aa9d77e13bd2b363a3b5d7ccf75dc5432521..b762e1914c37e282497563317aa8b0d73cd2370b 100644 (file)
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index f2415d9e35256821b381886a64011794a9f9f9e4..4147f385aa849863d63a55d1aef2991237d4617f 100644 (file)
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index df9e295127dcad0f17bf89764ecc0b1c5e93fdd4..11ff5f085ed1d13317af126ca06e315a0f5babf2 100644 (file)
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index 7f889c7ac0aaa7bef9a386f5a0d6676e078d3228..33c6772c8ce501e9bfd19119f4a4875d1d68c3ef 100644 (file)
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index f93f0b9a1efe9d878b32c9d3904c587b8556a316..fd512dbf9f217a598cd3f00407174fcc6e7cf07a 100644 (file)
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 023dc37d3d9959e1574ea8f683890636a3ccc6cf..8f99f8fda85797495976f7681720381d32e10ad9 100644 (file)
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index bacb060c20a0939a27ce201b9b8ecaf1f4a71404..899339a70f6f4c2eed9c7c14cfa5e72d2fdc75f2 100644 (file)
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index 9d6d9fb41efe74fa08310381a9d42026eeaa2614..4e5682c5dc42c32845bf5dc20e93a18d3216cbdf 100644 (file)
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index b5a050cae1a3743cbc21edc150ddff41365a293c..a20259556c0ac734ccc11a59d2e25305aad23d06 100644 (file)
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index a50f1774870020578ec5c9ab90e28a207d76cf47..e2a8321b5f727f59c6d76a9b68a9f436efb43e1e 100644 (file)
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index f70d5ce27fb6f73c4d74fe7fb217649390b75718..17b6b83a96b16380f97442f340666bbce8f8bbb1 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 4f2181305157706793649cebc4ea2ae99deede46..097bb8a9e02c315735ba658cb32e77939cac6788 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 07bdcf68009ca1f30e776c25bfe0cfb2a7c9cf77..fa0e2a6329708f1446755bb9f0e668a410d5db7d 100644 (file)
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index a49d32d987be6d390adb95207999a73130fae0bb..6dd0cdbb43e63c83c3cc9f07046e42a0bf3e4360 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 23f83e67203a800ab303f1f1fbb0263b15904f60..60fc267d2e5cabe30fde476c4f99df8924126967 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 1935dad2b587e8e6c65c1c21b3d97709a269d485..106b2f05fd5d3e15192b20352647f779850c750b 100644 (file)
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index f093e92b6165cf5a1c95586dd70d08c8cb1af628..3dd11a5d288e646fc266f46a2ecf0ed192b673df 100644 (file)
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index f7126e5856a9f5e4386261ad1bb362759e789cff..5af19870b3c5a70e83c5ea1a6e6488866bac1e9c 100644 (file)
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index f0aed08eb7318fe0adf81fbd51b323b0c6a578f6..2c72833ee8112adf30b6dbbfb2e99437d2ef1657 100644 (file)
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index 0057e22d7e4e6e9c9d6d13b35a3b4b3bfe52c28f..c7777140a156437ad48ea3c91227bc8dbae9e0d0 100644 (file)
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index 8905b6c00c92926b93e55814c7359500469caaf8..bb1bee7504fe71d9f6f9e2296cdafaab74dd4875 100644 (file)
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 2459eba3f7bd22a1bde99e1f96451d8b58619de8..e4aec61e9dde570a284518f4a6518451ad733da5 100644 (file)
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index b937af4a83fb75507aa7bf6f3d94720fbfc6ee87..d314307bcfe5afba3754f9d3712ca75202e9ea83 100644 (file)
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 049819e4b7785152b49eb4dfc0879600d65ae84c..5e5635807d08155908a50285b1679474db02db48 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 8634477609848ad35a05c0d883f35947ff5b8095..cf15e001d5997ac42dadae146e38fe445b243b14 100644 (file)
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 40c871e7c4435bb48d3c249590a5b441ea25f6b8..db6e7fb2a2069fb4a4dd8832b1321417b74af521 100644 (file)
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 795a3f00282bf9e58629f93f757583d3c7845e3a..d5f1de54a26378d0d6f51c4018c71abbfcb384d8 100644 (file)
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index c6e07104d616eb1a1fcdc35993c37517b817f768..673655c1318e5785f463aa6db9f367138ac29efc 100644 (file)
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 51caeeb60d9e9447bb559f78ec84d3d64610a779..32c0a571f853dc79fdba714dd5705f8e85555e78 100644 (file)
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index f4190af51b36563b0a12c87884e4e003c9dc0caa..af64f230aa26877afd4a0d6db6118610475092e9 100644 (file)
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 9d4821dafbaae3a6384fc08b8f96326ffe29c1de..75a56d564a3c80e9b81f3ceeb945a467e2d0f6ae 100644 (file)
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
index 0a15e05f81d089db8828e972388990eb2de48c88..b1cacf763d4d8ee6725c7386cf0f1153251877e6 100644 (file)
--- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 955b394f9e19fef9a2346244c74671c961a7e95d..1161f0820b11a6f171465e27a9866eb7d7b89993 100644 (file)
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index 0b0e1204e18b646ddfd569fe2394fac12845cd31..1e196a03b095c8f7c76b1e1b87459590b3f64978 100644 (file)
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index bffca4001c43272e574a39665baf23bce4ecff64..85029cf4acfc12014a5bc1f9f54f1c69e0d5a57d 100644 (file)
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index fc8f1f5035db617ac577c852a81da3171b006d39..66350d0af79c50319f68a1879bdd3929d7d0a988 100644 (file)
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
index ed075eb390d5791dc0113de0b87d6bb5983389f7..88702bccfec7ead806d1bc6a051874539b28d4f0 100644 (file)
--- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index 844fe1065370544e75aec411643ede297bd3528a..d8fadec534adbf3ab000d0adbd237ea0967b77f9 100644 (file)
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 92b039135758c96b43aaf2ba5a4ae323799238da..4e7dbe55fa40f50dab9d325d624f2f101a5aa267 100644 (file)
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index 2a30e11c2d604d2c433452f60eb478963ddffea8..d70417999f9f89fa224a624563168e17ae848cd2 100644 (file)
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index 37aac2a79216fb9d57b8c0f013e15f14615bf43b..560fce8c851a3ac159599ea205c8251eb4e7ea3e 100644 (file)
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig
index 3b13a343683cb396bb23e0aa5e754cda57c94981..a9cd51cd64b8fda8efecd06ef124f3bbd72c54a9 100644 (file)
--- a/configs/T4160QDS_defconfig
+++ b/configs/T4160QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig
index 3523fe16db2db0d0e374216e269b403df5e01380..9adcc2118387d68ba9086b273d4ed905f97d31c2 100644 (file)
--- a/configs/T4160RDB_defconfig
+++ b/configs/T4160RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index c2a16fd1f378a163dc8e9cab53eb5bf08fbb314d..7ce7ff0da9b6dba791fb97eabacfd61bbbd273d0 100644 (file)
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index 3ec6c75c0114183aa08c975165a75ad5608723cb..9fd17a9149bb9fc2ce4213cc7f55f329225a49b7 100644 (file)
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 18c8e67624982a184a09e1243ceb030d1d8e11fe..2d6b47f771cea437873a5fdfcf915a612a586004 100644 (file)
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
index c590410997c2f405035c55dc10f5a46ded52e2cc..193d54c24d4263ac58c4ab0bc48f33e993bf61ab 100644 (file)
--- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GREPENV=y

diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig
index afb665dac818088ecd6ba16b63b4b0b48e3f5752..4a241849d6c00b143ffd1c52f770b4fd7e72b9d4 100644 (file)
--- a/configs/T4240QDS_defconfig
+++ b/configs/T4240QDS_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 85fd13b4e9e2ace34aa19c0d8bfa1d960a34b8c2..27093ec3566a3738b564b6356e8f21d7785a06f4 100644 (file)
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 21e22be06ef0fdb39801bf95c49d80714ed79072..c14f9b8e6cee0fcf6f93ef56973cdb50482d83b0 100644 (file)
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/TQM5200S_HIGHBOOT_defconfig b/configs/TQM5200S_HIGHBOOT_defconfig
index 7adc71cc2bdee51321ae08def60a419a3d404616..6a147034656b9275f170230026a21c1cc733a6d9 100644 (file)
--- a/configs/TQM5200S_HIGHBOOT_defconfig
+++ b/configs/TQM5200S_HIGHBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM5200S_defconfig b/configs/TQM5200S_defconfig
index f09895417ea055b2898f9ef92ce58b415f4ebf0e..0d8f0969388b6e511638aaa21b8afae5e2936307 100644 (file)
--- a/configs/TQM5200S_defconfig
+++ b/configs/TQM5200S_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,TQM5200S"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM5200_B_HIGHBOOT_defconfig b/configs/TQM5200_B_HIGHBOOT_defconfig
index 70eb3834f3a66190e2d7c5a8057d5eea6dd4dc13..9c310aa464f4f3a9686170f8817202cd4a4658b8 100644 (file)
--- a/configs/TQM5200_B_HIGHBOOT_defconfig
+++ b/configs/TQM5200_B_HIGHBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B,SYS_TEXT_BASE=0xFFF00000"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM5200_B_defconfig b/configs/TQM5200_B_defconfig
index 6734495f02593675067b6cb758c3783c8bf0e297..da88fcc8c340da86e682ed30d0f6c0a7c15227d9 100644 (file)
--- a/configs/TQM5200_B_defconfig
+++ b/configs/TQM5200_B_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="TQM5200_B"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM5200_STK100_defconfig b/configs/TQM5200_STK100_defconfig
index d0adb77b9d12965e2a2cac8610995b2fd9692e97..9926fd7a907e416b300859576e81b09609fb1752 100644 (file)
--- a/configs/TQM5200_STK100_defconfig
+++ b/configs/TQM5200_STK100_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="STK52XX_REV100"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM5200_defconfig b/configs/TQM5200_defconfig
index 445636102ca5918d1fd9f22134478e528203b610..fe68631018f8582b46cadec7eaefab3a456d6043 100644 (file)
--- a/configs/TQM5200_defconfig
+++ b/configs/TQM5200_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TQM823L_LCD_defconfig b/configs/TQM823L_LCD_defconfig
index 9bf21f57424ddcb469c4c3b27aa6d4809563ca37..38f511967c65a124e00aaffe010d16814873bc40 100644 (file)
--- a/configs/TQM823L_LCD_defconfig
+++ b/configs/TQM823L_LCD_defconfig
@@ -3,6 +3,7 @@ CONFIG_8xx=y
 CONFIG_TARGET_TQM823L=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="LCD,NEC_NL6448BC20"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM823L_defconfig b/configs/TQM823L_defconfig
index 9f3218b7836c99765e422b7b1ceff0ed6c8eaf2e..3bc293410acba2374f6f700b53293f787e9e77da 100644 (file)
--- a/configs/TQM823L_defconfig
+++ b/configs/TQM823L_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM823L=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM823M_defconfig b/configs/TQM823M_defconfig
index 9a0ba9d0df9d4c0c489187f6724b01cc01e825aa..9d40a1ff6bfdf9c08bf2c1d2b71da9d9f13277de 100644 (file)
--- a/configs/TQM823M_defconfig
+++ b/configs/TQM823M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM823M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index 00dd80d7461142faf42a6dedf20352134dddf6b8..b56d780bb46542431b0435fef8a8f3b3c1fa83cd 100644 (file)
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_TQM834X=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/TQM850L_defconfig b/configs/TQM850L_defconfig
index 088ed6d22e9b93dec772db3832da8d6f5f448ffd..8427f5872b67cf96a206b8b3db3e1644a64255f3 100644 (file)
--- a/configs/TQM850L_defconfig
+++ b/configs/TQM850L_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM850L=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM850M_defconfig b/configs/TQM850M_defconfig
index ab3c44b3b01892d4b603ecdad00f57ca581cd85a..1c3f4240a82b03ebd7a414612ca8c38b96e80f04 100644 (file)
--- a/configs/TQM850M_defconfig
+++ b/configs/TQM850M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM850M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM855L_defconfig b/configs/TQM855L_defconfig
index 6ece0683bc90d15b46d93ab4ca82ef885f9f03d2..0234813995f3d440ffe2ba596bd98d70c8740363 100644 (file)
--- a/configs/TQM855L_defconfig
+++ b/configs/TQM855L_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM855L=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM855M_defconfig b/configs/TQM855M_defconfig
index 9940f96e5bd0e69eb0373a4aaff6e5111c2c6a4d..15541e5cfade24e3458e89ab6f7cb3d23e59e02c 100644 (file)
--- a/configs/TQM855M_defconfig
+++ b/configs/TQM855M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM855M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM860L_defconfig b/configs/TQM860L_defconfig
index 4aec4ff284f569686c4aa76efad3e0228db62bfa..becd4e1e2f834d64de9f905d880c5de4233f1eb3 100644 (file)
--- a/configs/TQM860L_defconfig
+++ b/configs/TQM860L_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM860L=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM860M_defconfig b/configs/TQM860M_defconfig
index 12b090aef9f91d0bb1eb3c4e56c06145240822b2..3b27e7f89b821f9b1c39e2f899039b0baf1106dd 100644 (file)
--- a/configs/TQM860M_defconfig
+++ b/configs/TQM860M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM860M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM862L_defconfig b/configs/TQM862L_defconfig
index 41737a39f82c9de719c1cb0de806dacbc4311f27..36e2433713f3ed78f26c9cde6f792f1af940a91b 100644 (file)
--- a/configs/TQM862L_defconfig
+++ b/configs/TQM862L_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM862L=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM862M_defconfig b/configs/TQM862M_defconfig
index 642dd023cba29ac81439fb06a4cc30f43136dde7..84d2cb2b963e8ff6aef4b48410aa1201c353879d 100644 (file)
--- a/configs/TQM862M_defconfig
+++ b/configs/TQM862M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM862M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM866M_defconfig b/configs/TQM866M_defconfig
index 3d0bf8c9e7d694d550848cac086e310f63633bc4..ddde240b4c0014e67c42adaa521982f742209a6a 100644 (file)
--- a/configs/TQM866M_defconfig
+++ b/configs/TQM866M_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM866M=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TQM885D_defconfig b/configs/TQM885D_defconfig
index 2238cdd752adfd7b2a2a8d2d295984e7a54a5c86..92b34f646b4247cb90265a8660c1cb56562f28ca 100644 (file)
--- a/configs/TQM885D_defconfig
+++ b/configs/TQM885D_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_8xx=y
 CONFIG_TARGET_TQM885D=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/TTTech_defconfig b/configs/TTTech_defconfig
index df4efa40c41e3be52bd09d91861e132cdb2eb462..e5458480d0c3475535ce0c5b4a4272471ab47ecd 100644 (file)
--- a/configs/TTTech_defconfig
+++ b/configs/TTTech_defconfig
@@ -3,6 +3,7 @@ CONFIG_8xx=y
 CONFIG_TARGET_TQM823L=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ104V7DS01"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index 8d2f2e6ef3b482f79e9353c9294b987f7ba7c1e2..ae8feda7010d013769ddb668a7f398553176940c 100644 (file)
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="TWR_P1025"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig
index 4c2df57eeae9cab26f7781fbfca31f95fc7c93ba..550e6b8431b750ec1583c84b996051bc73f01527 100644 (file)
--- a/configs/VCMA9_defconfig
+++ b/configs/VCMA9_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_VCMA9=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="VCMA9 # "
 CONFIG_CMD_I2C=y

diff --git a/configs/VOM405_defconfig b/configs/VOM405_defconfig
index 8fb023a863f723667400e45cfc4f542952d82e3d..800731b18e055d94e0bb5c261948d4f60bb25c24 100644 (file)
--- a/configs/VOM405_defconfig
+++ b/configs/VOM405_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_VOM405=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig
index fc43cc5fb1ebbc09641ee6f60a0e5ecad5a8023b..17ed9685970c2848cf690210f0517d3e3fd76427 100644 (file)
--- a/configs/Wobo_i5_defconfig
+++ b/configs/Wobo_i5_defconfig
@@ -11,3 +11,5 @@ CONFIG_SPL=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_FPGA is not set
 CONFIG_USB_EHCI_HCD=y
+CONFIG_AXP_ALDO3_VOLT=3300
+CONFIG_AXP_ALDO4_VOLT=3300

diff --git a/configs/a3m071_defconfig b/configs/a3m071_defconfig
index 97e4fc5e227f7e3df551121711f6ccfc688662cb..c62018369f524190257ab36db5166db66072b950 100644 (file)
--- a/configs/a3m071_defconfig
+++ b/configs/a3m071_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_A3M071=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_LOOPW=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/a4m2k_defconfig b/configs/a4m2k_defconfig
index fc344c5caaf99a926309eedf4b3e1539945fd60a..61f7da7e7fc200a64720e2547bbcc5e160c65f2c 100644 (file)
--- a/configs/a4m2k_defconfig
+++ b/configs/a4m2k_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="A4M2K"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_LOOPW=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/acadia_defconfig b/configs/acadia_defconfig
index 31889fa7594f0553662d5b9a02bcdc9616d18cf5..24d802eb2780d19da29b0b3cd8254fb7ae5db25b 100644 (file)
--- a/configs/acadia_defconfig
+++ b/configs/acadia_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_ACADIA=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
index 6daefcc5477989b1adb458bdcab858c4fb9490ed..0def407446ba06afe8b4940a163d0ffb1d7db3ca 100644 (file)
--- a/configs/adp-ag101p_defconfig
+++ b/configs/adp-ag101p_defconfig
@@ -1,5 +1,6 @@
 CONFIG_NDS32=y
 CONFIG_TARGET_ADP_AG101P=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="NDS32 # "
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index bfa243fb24272c39613faa275717e275db3852f8..661d5445456ffc0a5fd866c0ccfbe539f4baf0fc 100644 (file)
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_ALT=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
new file mode 100644 (file)
index 0000000..c83311f
--- /dev/null
+++ b/configs/am335x_shc_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
new file mode 100644 (file)
index 0000000..bfb56b2
--- /dev/null
+++ b/configs/am335x_shc_ict_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SHC_ICT=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
new file mode 100644 (file)
index 0000000..d16c5f0
--- /dev/null
+++ b/configs/am335x_shc_netboot_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SHC_NETBOOT=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig
new file mode 100644 (file)
index 0000000..b9bc355
--- /dev/null
+++ b/configs/am335x_shc_prompt_defconfig
@@ -0,0 +1,18 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
new file mode 100644 (file)
index 0000000..b0e8eff
--- /dev/null
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SHC_SDBOOT=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig
new file mode 100644 (file)
index 0000000..b0e8eff
--- /dev/null
+++ b/configs/am335x_shc_sdboot_prompt_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_TARGET_AM335X_SHC=y
+CONFIG_SHC_SDBOOT=y
+CONFIG_SERIES=y
+CONFIG_SPL_STACK_R_ADDR=0x82000000
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_FIT=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n"
+CONFIG_AUTOBOOT_DELAY_STR="shc"
+CONFIG_AUTOBOOT_STOP_STR="noautoboot"
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 3cd40e9d84025b50c1894e3830b08ced499e21d2..c227ef4725befcebe915d5e56267f3206b02a974 100644 (file)
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -25,4 +25,3 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
-CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"

diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig
index a8b846553670bfdeede01aa7186421461cc5cddc..6d1dcde1bec178b0bfca161f5487135943f482d5 100644 (file)
--- a/configs/am3517_crane_defconfig
+++ b/configs/am3517_crane_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_AM3517_CRANE=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AM3517_CRANE # "
 # CONFIG_CMD_IMI is not set

diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index d400c35c722f4838eb93d766296ab19ef5527e64..b4aa3c63cd026c40dfc2b5c51b091edebd0865a4 100644 (file)
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_AM3517_EVM=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AM3517_EVM # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/am437x_hs_evm_defconfig b/configs/am437x_hs_evm_defconfig
index 3cd39eb65d4bb41e32b626779a762dd494655369..4856a19f0b0bb284cda090e210348ade41618f33 100644 (file)
--- a/configs/am437x_hs_evm_defconfig
+++ b/configs/am437x_hs_evm_defconfig
@@ -10,7 +10,9 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
 CONFIG_SPL=y
 CONFIG_ISW_ENTRY_ADDR=0x40302ae0
 CONFIG_SPL_STACK_R=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1"
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -33,6 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am437x-gp-evm"
 CONFIG_DM=y
 CONFIG_DM_MMC=y
 CONFIG_SPI_FLASH=y
@@ -53,3 +56,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0403
 CONFIG_G_DNL_PRODUCT_NUM=0xbd00
+CONFIG_SPL_OF_LIBFDT=y

diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index 6743b846772006f038d0f91706e5b65210e60f2a..c29a05a229bd2f97f432406ffc061ce3eef63856 100644 (file)
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_OMAP54XX=y
-CONFIG_TARGET_BEAGLE_X15=y
+CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
@@ -36,3 +36,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_FIT=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_LIST="am57xx-beagle-x15 am572x-idk"

diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig
index 1cf82d293ed36434e779fab2f87d2cf412bc6a21..4c5a0de36917624a9f77c32f2ca6166f1a32080c 100644 (file)
--- a/configs/am57xx_evm_nodt_defconfig
+++ b/configs/am57xx_evm_nodt_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_OMAP54XX=y
-CONFIG_TARGET_BEAGLE_X15=y
+CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_SPL=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index c109939fdacc5edd1da76087dc1e8bfd27e34daf..e01e50482a6142b3989c94cc14b4d10d46b15fe3 100644 (file)
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_OMAP54XX=y
 CONFIG_TI_SECURE_DEVICE=y
-CONFIG_TARGET_BEAGLE_X15=y
+CONFIG_TARGET_AM57XX_EVM=y
 CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
@@ -37,3 +37,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
+CONFIG_FIT=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_LIST="am57xx-beagle-x15"

diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index f169fd38b0157845f859fea40798b713002fa8d3..0361418d904d5a8545fe952dafe73d5c550457a3 100644 (file)
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_AMCORE=y
 CONFIG_SYS_TEXT_BASE=0xffc00000
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="amcore $ "
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_XIMG is not set

diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 91fa7346915f1da20af457b1240272a856c01e6c..fbd63e97a891225bd42dbfdb587694997c0d92e8 100644 (file)
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -5,6 +5,7 @@ CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_ARCH_ATH79=y
 CONFIG_DEFAULT_DEVICE_TREE="ap121"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="ap121 # "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -19,13 +20,9 @@ CONFIG_SYS_PROMPT="ap121 # "
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_FPGA is not set
-CONFIG_CMD_NET=y
-CONFIG_CMD_NFS=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM_ETH=y
-CONFIG_AG7XXX=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_ATMEL=y
@@ -38,6 +35,8 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_AG7XXX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_AR933X_PINCTRL=y
@@ -48,5 +47,3 @@ CONFIG_DEBUG_UART_CLOCK=25000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_AR933X_UART=y
 CONFIG_ATH79_SPI=y
-CONFIG_USE_PRIVATE_LIBGCC=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index 1aa6e5d7abdac2e0fb372c8b5940268ed597c779..15fe36fca45cc4ce228cb5a94e7d9b90080a4d70 100644 (file)
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -6,6 +6,7 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_ARCH_ATH79=y
 CONFIG_TARGET_AP143=y
 CONFIG_DEFAULT_DEVICE_TREE="ap143"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="ap143 # "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -43,5 +44,3 @@ CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYS_NS16550=y
 CONFIG_ATH79_SPI=y
-CONFIG_USE_PRIVATE_LIBGCC=y
-CONFIG_OF_LIBFDT=y

diff --git a/configs/ap325rxa_defconfig b/configs/ap325rxa_defconfig
index 51920329c3755ce4b3f38ad0aa0cccbbc83f2e54..51a48de877d22eec0f9a12961873108be30da66c 100644 (file)
--- a/configs/ap325rxa_defconfig
+++ b/configs/ap325rxa_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_AP325RXA=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/ap_sh4a_4a_defconfig b/configs/ap_sh4a_4a_defconfig
index 77a0aa5120b711c153f361743dbe14621a1d5e3c..73e6f04a315fa8179833ec493a50e7af2ace7779 100644 (file)
--- a/configs/ap_sh4a_4a_defconfig
+++ b/configs/ap_sh4a_4a_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_AP_SH4A_4A=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig
index 88912e50af12a8c5509aabc7709909172655be61..a175274b24dce11fdb6e59cf415ae0b9a4fbaa91 100644 (file)
--- a/configs/apf27_defconfig
+++ b/configs/apf27_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_APF27=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="BIOS> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig
index 0df8ac0d547372c31f4f0d0a82916cda59275e4e..a6bac0ee59911767486133cb4a36206a30d8b00a 100644 (file)
--- a/configs/apx4devkit_defconfig
+++ b/configs/apx4devkit_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_APX4DEVKIT=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/arcangel4-be_defconfig b/configs/arcangel4-be_defconfig
index 4c6fcb02e218c278995eff474ee54a47e6e48f16..c0c2e4be90b24b6ce6981330231ddfeb4d1ed2e4 100644 (file)
--- a/configs/arcangel4-be_defconfig
+++ b/configs/arcangel4-be_defconfig
@@ -5,6 +5,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_CLK_FREQ=70000000
 CONFIG_SYS_TEXT_BASE=0x81000000
 CONFIG_DEFAULT_DEVICE_TREE="arcangel4"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/arcangel4_defconfig b/configs/arcangel4_defconfig
index 2157e0cc33419da960d76e344a82d4cb54f3b407..efa55d0e99c3a137e5fab250b94072ac9e76a882 100644 (file)
--- a/configs/arcangel4_defconfig
+++ b/configs/arcangel4_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_CLK_FREQ=70000000
 CONFIG_SYS_TEXT_BASE=0x81000000
 CONFIG_DEFAULT_DEVICE_TREE="arcangel4"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="arcangel4# "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/arches_defconfig b/configs/arches_defconfig
index e05a64c01e64c62fc5b1cd3555a21eec6fabb9ea..d97715b4b5d3f2c16b439eafc919ed7fa7d0122e 100644 (file)
--- a/configs/arches_defconfig
+++ b/configs/arches_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_CANYONLANDS=y
 CONFIG_ARCHES=y
 CONFIG_DEFAULT_DEVICE_TREE="arches"
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/aria_defconfig b/configs/aria_defconfig
index fb3257b3ae7f6d018a2ca4d33dfb8ba8701343f2..14919e59fe8dca19367a0f3c463dfc2ccc5585de 100644 (file)
--- a/configs/aria_defconfig
+++ b/configs/aria_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC512X=y
 CONFIG_TARGET_ARIA=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 0f68eba5201579ef8a4f401a5ff762854395ba89..18d6a2536c96606155fc1e39c6c63dbc23813163 100644 (file)
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_ARISTAINETOS2=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index 24575138dfa179b601623c872dc57a23c89afd9f..aeea87f6007a0f69fbc7d05dea0f9912de2197e2 100644 (file)
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_ARISTAINETOS2B=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig
index ad2bf08c6320e3b05186b496b80c72814bec65a1..a55ce6a058950c855b5aec28c2392110c226675f 100644 (file)
--- a/configs/aristainetos_defconfig
+++ b/configs/aristainetos_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_ARISTAINETOS=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig
index 1224da490a121eac932e187e11c2e52ba9b0d1df..9bae3c3efac6d162cd24d538437e954062860367 100644 (file)
--- a/configs/armadillo-800eva_defconfig
+++ b/configs/armadillo-800eva_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_ARMADILLO_800EVA=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig
index 4f5df351fcc42368fca2f3993ed1640cdb8d3365..9ac66570cd3cd1d36aad486f38ec235b457a7b15 100644 (file)
--- a/configs/aspenite_defconfig
+++ b/configs/aspenite_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_ASPENITE=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y

diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index 9888c7ec8a3f4f2a0e739adc2d7590c078581b92..1e41628169ac04306275bcddd954dbeb9e62bf21 100644 (file)
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -1,5 +1,6 @@
 CONFIG_M68K=y
 CONFIG_TARGET_ASTRO_MCF5373L=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="URMEL > "
 CONFIG_CMD_I2C=y

diff --git a/configs/at91rm9200ek_defconfig b/configs/at91rm9200ek_defconfig
index bea73a5a45372f8a842789e6fcc15e46b51b5dac..f1303b3ae0aac489ebe4b2d8b3cd44d45e581d38 100644 (file)
--- a/configs/at91rm9200ek_defconfig
+++ b/configs/at91rm9200ek_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91RM9200EK=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91rm9200ek_ram_defconfig b/configs/at91rm9200ek_ram_defconfig
index 80125311754c6753d4ddf5ea45784f31aba457bd..8b00ee266ece03f691f2a5f878f73306a123be91 100644 (file)
--- a/configs/at91rm9200ek_ram_defconfig
+++ b/configs/at91rm9200ek_ram_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91RM9200EK=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index d8ec7f1c994029431e09e369a212b48a379e64e3..5a369bb0c1a4c5ebd8a63af315cc7a6617d0e728 100644 (file)
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index eb17f9133287dbec18c809b11b3e4023f3b38d4e..b465395914f913fcc3ee3650d0b97e4ce321414a 100644 (file)
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig
index 26ffd97e64a7192a4847904c8983a2e6b1c70f4c..a30c40bfe1a3bee2ee1fff39cf95a5504231a576 100644 (file)
--- a/configs/at91sam9260ek_nandflash_defconfig
+++ b/configs/at91sam9260ek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 4e8dfa1943acc5553e40f98cd7d31f6894f5ed06..4406e58bb5a9cfc03d24e22fdad7e5ed895edad5 100644 (file)
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index c5684f2e34fbb3da741405870924175a93f6f5c7..2d599156e11a1db81feb275e935b2fb10b7acbf1 100644 (file)
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig
index 0fba31434b3d8aa8df439619a0c49823cfca72d6..45bc42769d486f36977133c30c022eb7e49526b2 100644 (file)
--- a/configs/at91sam9261ek_nandflash_defconfig
+++ b/configs/at91sam9261ek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index b09395f6ff753c2c7b197d0741737f2593a156f5..c94e7a43123e00dc03b61991ff6acd2a7e3a352e 100644 (file)
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index b09395f6ff753c2c7b197d0741737f2593a156f5..c94e7a43123e00dc03b61991ff6acd2a7e3a352e 100644 (file)
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig
index dd46a686c6a5989d6d30510d01ee1f420fe902e0..05c3f3dd9e7bcba9ab9ceba4692256e6a4f5964d 100644 (file)
--- a/configs/at91sam9263ek_nandflash_defconfig
+++ b/configs/at91sam9263ek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 25b9a1710cf759fb32e1203a777f9a103bcd4d55..eb20eba841b4352bd8e8b5a6fad5a27343ab4bb6 100644 (file)
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 3cdce9b80fbfbec9f8cb81e8f709157a3c94a676..aed72da76bd58c20003d85b50c35b87dbefdfc51 100644 (file)
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 9ff65b514d93114e5442772faa0977bf35bc59af..f829a18306a7dad009ee3eb5662a5dbdd86aa499 100644 (file)
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index 76c3b15361774d393dd2b0a768cbf414916f25fc..a4b9719d9c2e523a595c8be8c784f8dce3dcd5ed 100644 (file)
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig
index 7438b86d1f5fbef00206c64cdf5d00a814a4a90d..199b5bbb1bd7534ad73ef4cfc9d46056e5cd9ddf 100644 (file)
--- a/configs/at91sam9g10ek_nandflash_defconfig
+++ b/configs/at91sam9g10ek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig
index 0cded82d60b8f304c7e1a11d6f5e210d6d1b8a07..bb176a095d7bf0a320804f8e5962865bffcb3029 100644 (file)
--- a/configs/at91sam9g20ek_2mmc_defconfig
+++ b/configs/at91sam9g20ek_2mmc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
index ddfce140aaff1856045ef289843ab4206ded727d..7287860c635ddc76e4e0d62fa3201a7021efeb7b 100644 (file)
--- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig
+++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 8ce99ee1101499ff3d57cb49a0598f28b7c6d4cc..ffc3a95312d2c6ee9a716e05f5f87d26d8adf8dd 100644 (file)
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 9ed2b84a706adef2a12fb87e692232345ac279af..9069f309699bfc3f5fe0dfb57d70bd000bddbae2 100644 (file)
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig
index f8f6afba2fe96cadeb5adeb990a21b963ff65d01..eaaa6ae13be4c349c0bb4f1e3a8e9359a60fc4f8 100644 (file)
--- a/configs/at91sam9g20ek_nandflash_defconfig
+++ b/configs/at91sam9g20ek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig
index c931af2b5b859adfd6d487ef90ffe0f95d800a18..5452afd85c6733f48586ee4c10c3e14f7feafccd 100644 (file)
--- a/configs/at91sam9m10g45ek_mmc_defconfig
+++ b/configs/at91sam9m10g45ek_mmc_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9M10G45EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig
index 4aeca480d0c31722c16b17c21941dea8efaee789..011fdadc86a05a8e88f1c34846d91ec42e6cf1fb 100644 (file)
--- a/configs/at91sam9m10g45ek_nandflash_defconfig
+++ b/configs/at91sam9m10g45ek_nandflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9M10G45EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 2c4a81ab8e868ebca0314057f9b1096de850e2b2..e61f3b907690c259fa47d6306ceb9b26aa3cac1d 100644 (file)
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9N12EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index 726d8114f975f961eebf661d85dbfa5c063284ce..62efd6ea913db975577f2bd2808a84b9dd9b3158 100644 (file)
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9N12EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index d0cff221986a4c6f6119ced9b726873429379fe7..6a54f033e67dd83ff6bbda4bc12ba9b0b03c5454 100644 (file)
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9N12EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9N12,SYS_USE_SPIFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index dda3edfbee778b58468cac5cd70f43435e38f7c7..69be1d20d6b8168c0ff8933a462e8c30c619c85e 100644 (file)
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9RLEK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig
index c300438920b5aa957a1d71a4f8e8fcc10a9369f2..c49bf18192a960487e74aca173c6d0f79139deea 100644 (file)
--- a/configs/at91sam9rlek_mmc_defconfig
+++ b/configs/at91sam9rlek_mmc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9RLEK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig
index 6b033fb96e12268730093602efc6b058455e4ba3..142122ed09460cc0eea252b287e6fb3942e702a1 100644 (file)
--- a/configs/at91sam9rlek_nandflash_defconfig
+++ b/configs/at91sam9rlek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9RLEK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 56aa2a00802c3682e61ce9ee41e953a9dc3c4d69..85ed41c863672ffdba11cca57b780a182f920c7a 100644 (file)
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig
index db501c5879a1d68daeae2b71699ff87bae4cd091..cecd41651b8ef50dec0f7a5b2ed9e74a95eca045 100644 (file)
--- a/configs/at91sam9x5ek_mmc_defconfig
+++ b/configs/at91sam9x5ek_mmc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig
index 7f0b1a42bc931039de60a0655cc9472ba8de015d..002c833cecb0ec0c366f1b115beb4332f932dd13 100644 (file)
--- a/configs/at91sam9x5ek_nandflash_defconfig
+++ b/configs/at91sam9x5ek_nandflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index f7a4d16b6b8656068f70759117e7bed7b1c58270..cefe859cfaa0b5ead5ef680e14c044622d73a2bc 100644 (file)
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_SPIFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index 0ded2ab414b4836f27e5b81db976e64f3dda2815..77c65b25507f357b6e2694726c2711f318c8740c 100644 (file)
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 7995419ef6649252f95877fbe117a978aa708840..9eaf146d8e4f77359d104fa731bc0c7627c5045d 100644 (file)
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig
index c859cb6e7fe514dfce98b08d869cd0f14a1e2985..b17b9a5a0167befd43d1be1d199762942c2d84cd 100644 (file)
--- a/configs/at91sam9xeek_nandflash_defconfig
+++ b/configs/at91sam9xeek_nandflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/atngw100_defconfig b/configs/atngw100_defconfig
index 685d5acfa9a4f4d586f48a804cc9729dd4906161..52dbefdbce051d5c8a936e8500670bfa34653944 100644 (file)
--- a/configs/atngw100_defconfig
+++ b/configs/atngw100_defconfig
@@ -1,5 +1,6 @@
 CONFIG_AVR32=y
 CONFIG_TARGET_ATNGW100=y
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/atngw100mkii_defconfig b/configs/atngw100mkii_defconfig
index c392df78224f30db6fbe1ce9d41be8157fa4e35d..bfceedb426822e4f419cd481d6f3b7ae09810629 100644 (file)
--- a/configs/atngw100mkii_defconfig
+++ b/configs/atngw100mkii_defconfig
@@ -1,5 +1,6 @@
 CONFIG_AVR32=y
 CONFIG_TARGET_ATNGW100MKII=y
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/atstk1002_defconfig b/configs/atstk1002_defconfig
index bd37d2e8bd23fb506e5cb880dcd32b169e20a6c4..df5756873a5bfcbeca0450448a3effd1cf123da0 100644 (file)
--- a/configs/atstk1002_defconfig
+++ b/configs/atstk1002_defconfig
@@ -1,5 +1,6 @@
 CONFIG_AVR32=y
 CONFIG_TARGET_ATSTK1002=y
+CONFIG_BOOTDELAY=1
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index ba43e3501b6b62a633ad98947d8999a2de674412..0e0eadf6849740c34f2b3a2776bcf089d863ff51 100644 (file)
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_TAURUS=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set

diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 07a6a1855e7cecab985f94abf93212aa02054ca1..10e802d65530a9be02ce44c4ce0a3e08f1685382 100644 (file)
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_CLK_FREQ=750000000
 CONFIG_SYS_TEXT_BASE=0x81000000
 CONFIG_DEFAULT_DEVICE_TREE="axs10x"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index 01a51432ace6d45e1ee60b1f62b85c8621958ce1..c8474de3c462226a34ad386d6760cd358b38b94b 100644 (file)
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARC=y
 CONFIG_ISA_ARCV2=y
 CONFIG_DM_SERIAL=y
-CONFIG_SYS_CLK_FREQ=50000000
+CONFIG_SYS_CLK_FREQ=100000000
 CONFIG_SYS_TEXT_BASE=0x81000000
 CONFIG_DEFAULT_DEVICE_TREE="axs10x"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/bamboo_defconfig b/configs/bamboo_defconfig
index b0f6bb34e24bfe1d9f1752aa0747ed533b0489af..e1f1f3d582e76e90bc4cc254d9ab0baf861fe500 100644 (file)
--- a/configs/bamboo_defconfig
+++ b/configs/bamboo_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_BAMBOO=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/bcm11130_defconfig b/configs/bcm11130_defconfig
index b8ec8acefc25f423da1927d127115445099b67c3..2716868a31231b54fc121f61b6d123fd7f4ac6d6 100644 (file)
--- a/configs/bcm11130_defconfig
+++ b/configs/bcm11130_defconfig
@@ -18,6 +18,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1

diff --git a/configs/bcm11130_nand_defconfig b/configs/bcm11130_nand_defconfig
index 6021fd271af5c043a85945a3b2e7247fcace514a..8e01c521ee3139634886ff0617296de7842d063c 100644 (file)
--- a/configs/bcm11130_nand_defconfig
+++ b/configs/bcm11130_nand_defconfig
@@ -18,6 +18,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1

diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig
new file mode 100644 (file)
index 0000000..3328e51
--- /dev/null
+++ b/configs/bcm23550_w1d_defconfig
@@ -0,0 +1,24 @@
+CONFIG_ARM=y
+CONFIG_TARGET_BCM23550_W1D=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_FAT=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
+CONFIG_G_DNL_VENDOR_NUM=0x18d1
+CONFIG_G_DNL_PRODUCT_NUM=0x0d02
+CONFIG_OF_LIBFDT=y

diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig
index 4404f321536e61df9e2cc3803988a75b785f822b..4c0f3b30ba4b68e99ec886dad680f4184d09cc89 100644 (file)
--- a/configs/bcm28155_ap_defconfig
+++ b/configs/bcm28155_ap_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
 CONFIG_TARGET_BCM28155_AP=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -17,9 +18,9 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0x0d02
 CONFIG_OF_LIBFDT=y
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y

diff --git a/configs/bcm28155_w1d_defconfig b/configs/bcm28155_w1d_defconfig
index 60eb3281b65ccb010bfe12c250f457d64bb7e9af..e9d13b9c86350ee9cdb23f70ae356ac636574c47 100644 (file)
--- a/configs/bcm28155_w1d_defconfig
+++ b/configs/bcm28155_w1d_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
 CONFIG_TARGET_BCM28155_AP=y
 CONFIG_SYS_EXTRA_OPTIONS="BCM_SF2_ETH,BCM_SF2_ETH_GMAC"
 CONFIG_HUSH_PARSER=y
@@ -18,8 +19,8 @@ CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Broadcom Corporation"
 CONFIG_G_DNL_VENDOR_NUM=0x18d1
 CONFIG_G_DNL_PRODUCT_NUM=0x0d02
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y

diff --git a/configs/bct-brettl2_defconfig b/configs/bct-brettl2_defconfig
index 3e61a3f400bc5d3f78ab1be32f667b119d504bb7..ad894a228ee4a4b5093123f6ae5e19be81f25c97 100644 (file)
--- a/configs/bct-brettl2_defconfig
+++ b/configs/bct-brettl2_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BCT_BRETTL2=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig
index 0b6f517c7859dd7b8d6fece7ba0531157c84f63c..e17c9691d0319d7209cf9fa8a5cb8f9128fe5d9c 100644 (file)
--- a/configs/bf518f-ezbrd_defconfig
+++ b/configs/bf518f-ezbrd_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF518F_EZBRD=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

diff --git a/configs/bf525-ucr2_defconfig b/configs/bf525-ucr2_defconfig
index 84f229fc141473e72660be509e21b7424e175b48..68d2f48b451be6b6efcac838bef8d480cc690317 100644 (file)
--- a/configs/bf525-ucr2_defconfig
+++ b/configs/bf525-ucr2_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF525_UCR2=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig
index ea4f8e4bafd81b65f4bf4a05dad4c9c77b4d001e..8e9fc1ab7609836f4ed2574bf0b490e09f5a2972 100644 (file)
--- a/configs/bf526-ezbrd_defconfig
+++ b/configs/bf526-ezbrd_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF526_EZBRD=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/bf527-ad7160-eval_defconfig b/configs/bf527-ad7160-eval_defconfig
index b5f5f5de8ab352a5a19b4da2243f4f9628a189df..45f4149ceaea00f9aef01e324acebeeff785c8dd 100644 (file)
--- a/configs/bf527-ad7160-eval_defconfig
+++ b/configs/bf527-ad7160-eval_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF527_AD7160_EVAL=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig
index faac28d39cdbeb2ca82168d5f34d21eabc4c67b0..d980392f6757a2638e9deaef6b2d9da2c166d045 100644 (file)
--- a/configs/bf527-ezkit-v2_defconfig
+++ b/configs/bf527-ezkit-v2_defconfig
@@ -1,6 +1,7 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF527_EZKIT=y
 CONFIG_SYS_EXTRA_OPTIONS="BF527_EZKIT_REV_2_1"
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig
index d69b14622e0051b20c9e29052c1f6402a6cf2700..4be8ed7758c9447fb8eac13fc42a5df75d454d32 100644 (file)
--- a/configs/bf527-ezkit_defconfig
+++ b/configs/bf527-ezkit_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF527_EZKIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig
index 5137293d7ad8cd0f8b330695d505dcae295528ec..fec1307726a51a62b1a36503e3937ada006261a1 100644 (file)
--- a/configs/bf527-sdp_defconfig
+++ b/configs/bf527-sdp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF527_SDP=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

diff --git a/configs/bf533-ezkit_defconfig b/configs/bf533-ezkit_defconfig
index 6b2395af5ee8741aaa86bb57ab4c303e14e97988..853a5d4f4f83cadb72a1a2ac6866b32cb2d375aa 100644 (file)
--- a/configs/bf533-ezkit_defconfig
+++ b/configs/bf533-ezkit_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF533_EZKIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/bf533-stamp_defconfig b/configs/bf533-stamp_defconfig
index ef23ea764aa489779c744fbdc7c771cb7f660a78..e0f5de9ae91cf15a459e49b4b83241fd626769b2 100644 (file)
--- a/configs/bf533-stamp_defconfig
+++ b/configs/bf533-stamp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF533_STAMP=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/bf537-minotaur_defconfig b/configs/bf537-minotaur_defconfig
index 7c17cbb2ac9096f8c4847fb1fb7a51cd7af82812..fea8c3240f223d47035338559d1f16a42ab480f9 100644 (file)
--- a/configs/bf537-minotaur_defconfig
+++ b/configs/bf537-minotaur_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF537_MINOTAUR=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="minotaur> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/bf537-pnav_defconfig b/configs/bf537-pnav_defconfig
index cb01bc10d2e267ca7207677aa1163669f37f5c94..bbc171d7170694187913e834c8f97d7c3b50f11c 100644 (file)
--- a/configs/bf537-pnav_defconfig
+++ b/configs/bf537-pnav_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF537_PNAV=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/bf537-srv1_defconfig b/configs/bf537-srv1_defconfig
index f8288d9d19973320ba97df412ef0da7af09c38e7..dc88c44fa56d8e92b040d9ff435ac2aecea6cb9f 100644 (file)
--- a/configs/bf537-srv1_defconfig
+++ b/configs/bf537-srv1_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF537_SRV1=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="srv1> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig
index 15e52546400404346191d77bcc75428ac3539a71..d189ad4d350a77018802a222a43c408acada0b6d 100644 (file)
--- a/configs/bf537-stamp_defconfig
+++ b/configs/bf537-stamp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF537_STAMP=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

diff --git a/configs/bf538f-ezkit_defconfig b/configs/bf538f-ezkit_defconfig
index 2c71498df2b198d03f5014b0ff4b98e8ef8efe1f..8507b40554e6ff8909fcd8f75175d7e245151dc7 100644 (file)
--- a/configs/bf538f-ezkit_defconfig
+++ b/configs/bf538f-ezkit_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF538F_EZKIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig
index e4fa136451836b918f505c8a995c9c74025fc43d..42f1211f4fa4d1ceb28ce8331ad7639161d81759 100644 (file)
--- a/configs/bf548-ezkit_defconfig
+++ b/configs/bf548-ezkit_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF548_EZKIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y

diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig
index 3ecdd9f28ac6d44a1d8da980187a0df24396952a..6428d1839eab7ace0526f8807f1b08b8d2caf68a 100644 (file)
--- a/configs/bf561-acvilon_defconfig
+++ b/configs/bf561-acvilon_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF561_ACVILON=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="Acvilon> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/bf561-ezkit_defconfig b/configs/bf561-ezkit_defconfig
index 1e99b4b8fa8c9bbfb1c2aa9ced2892a88545067d..f8206b886c83fac0b92345f472e2cf544f4ecab7 100644 (file)
--- a/configs/bf561-ezkit_defconfig
+++ b/configs/bf561-ezkit_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BF561_EZKIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
index 709dfab99975aa2865efe58bfd14bc55b91ad141..b3a13c63e6da0caf7ee8fce9329498ad109859a7 100644 (file)
--- a/configs/bg0900_defconfig
+++ b/configs/bg0900_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_BG0900=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/blackstamp_defconfig b/configs/blackstamp_defconfig
index 679aee167c35a9dd45174554c29d59cd97c75988..7aa5a52f9b405ab56aefd93a9428ffbce0d0fd23 100644 (file)
--- a/configs/blackstamp_defconfig
+++ b/configs/blackstamp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BLACKSTAMP=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/blackvme_defconfig b/configs/blackvme_defconfig
index 808cc3de0f74474f811e0f4a36b6062319c9052f..7c3eb9dc6b1ae8bed3e99b3465293b9c795f3304 100644 (file)
--- a/configs/blackvme_defconfig
+++ b/configs/blackvme_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_BLACKVME=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/bubinga_defconfig b/configs/bubinga_defconfig
index d570d41e23793ff373db0fad55543aeec92f2f18..9bfe8285937868d52a838b8d1d46477ebfaf4835 100644 (file)
--- a/configs/bubinga_defconfig
+++ b/configs/bubinga_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_BUBINGA=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig
index 2eefd15ca6d92af7f0a39eca91bfe2661b6e71e7..c2e454a6580a81c4389d82cd2158d8e8b46df9ba 100644 (file)
--- a/configs/caddy2_defconfig
+++ b/configs/caddy2_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_VME8349=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="CADDY2"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig
index a8775f3f53200de9d3b126a1983140506cfff841..5257312bfd0d52000566b80e3df86e18bcedabfb 100644 (file)
--- a/configs/cairo_defconfig
+++ b/configs/cairo_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_OMAP3_CAIRO=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Cairo # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig
index 5f6bc5c88d2bf0f006e845b638ba10c3c0058e32..505ab3734a0aac5955d35caa20e078f7e7bafd85 100644 (file)
--- a/configs/calimain_defconfig
+++ b/configs/calimain_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_CALIMAIN=y
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Calimain > "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/cam5200_defconfig b/configs/cam5200_defconfig
index 722458883c27a5831ac549003fac3288bd762c68..f2da039223a1ee591ce1e08ae987b549bf1dfe5d 100644 (file)
--- a/configs/cam5200_defconfig
+++ b/configs/cam5200_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/cam5200_niosflash_defconfig b/configs/cam5200_niosflash_defconfig
index 00d80454851be93ca41246714d7d5dfece0be056..d04ac552a41242ff02b253d47a95ec200c2e872d 100644 (file)
--- a/configs/cam5200_niosflash_defconfig
+++ b/configs/cam5200_niosflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/canmb_defconfig b/configs/canmb_defconfig
index 8d3b4764de1b54ee65cde8e28e965179243bfab4..f1e3265ec58cb90ea9d60acaeb6e6f47d37c96ca 100644 (file)
--- a/configs/canmb_defconfig
+++ b/configs/canmb_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_CANMB=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/canyonlands_defconfig b/configs/canyonlands_defconfig
index aac031b6f4db130bf8df8a3c060a42d825d7e580..fe9fbd041f9b192cfdbb7f26b1ba46cbd24c396a 100644 (file)
--- a/configs/canyonlands_defconfig
+++ b/configs/canyonlands_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_CANYONLANDS=y
 CONFIG_CANYONLANDS=y
 CONFIG_DEFAULT_DEVICE_TREE="canyonlands"
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index 68cf2ac9a3e9dfec572968d0e45abd4995745aee..f2631657b186bfc19a4816af83f5e05906b7cf03 100644 (file)
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_CGTQMX6EVAL=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/charon_defconfig b/configs/charon_defconfig
index ea50729efd608ec498b50c3ae64c68319e6f917e..ae9b62a711fe8f8275471488b351f1d68beb72c1 100644 (file)
--- a/configs/charon_defconfig
+++ b/configs/charon_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_CHARON=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 75ea200b2794249dd052c06186822ac95ea93ce9..3bf538891b2b0d65291c72567bb2e9d82fd11c9e 100644 (file)
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -3,8 +3,9 @@ CONFIG_ARCH_MVEBU=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_CLEARFOG=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
-CONFIG_HUSH_PARSER=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
+CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/cm-bf527_defconfig b/configs/cm-bf527_defconfig
index 072483a8abfeb8f4e00e615b0acb9a68dbb9376e..773edfb3faa7d0718310406500b63f06ef385740 100644 (file)
--- a/configs/cm-bf527_defconfig
+++ b/configs/cm-bf527_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF527=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/cm-bf533_defconfig b/configs/cm-bf533_defconfig
index 1fb91b222540e15b3daab8fd10eb94a003287ad7..6fa231d671e5e536f47c9d260d62cc5e4e4c0dba 100644 (file)
--- a/configs/cm-bf533_defconfig
+++ b/configs/cm-bf533_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF533=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/cm-bf537e_defconfig b/configs/cm-bf537e_defconfig
index c65a703668fa65f1d957e6816c5d8af6cb7c281b..16f129b8c21e0c5bd6471852852d0ad0b5af1d82 100644 (file)
--- a/configs/cm-bf537e_defconfig
+++ b/configs/cm-bf537e_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF537E=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/cm-bf537u_defconfig b/configs/cm-bf537u_defconfig
index b030a27bbf4d3a2f56d57c98b8c1ae9cdbd5be9a..68e8659546883daa17042768aeed8df53cce7529 100644 (file)
--- a/configs/cm-bf537u_defconfig
+++ b/configs/cm-bf537u_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF537U=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/cm-bf548_defconfig b/configs/cm-bf548_defconfig
index 1355dd4f2e02b82e1fb4d379d942b8de2d4d211e..0589803c0682ffb3d89118fadd19c1617588f2cc 100644 (file)
--- a/configs/cm-bf548_defconfig
+++ b/configs/cm-bf548_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF548=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/cm-bf561_defconfig b/configs/cm-bf561_defconfig
index b6e711e526d2907041bc377ca307ae1278f04f52..5a32f56d3bc04f160075101475d8fadeba96b424 100644 (file)
--- a/configs/cm-bf561_defconfig
+++ b/configs/cm-bf561_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_CM_BF561=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/cm5200_defconfig b/configs/cm5200_defconfig
index c7df40022af9d91d4873efdd82978442ff2426fc..2a67b43ce8792daf0141c718e2c2319387574d55 100644 (file)
--- a/configs/cm5200_defconfig
+++ b/configs/cm5200_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_CM5200=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y
 CONFIG_CMD_I2C=y

diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 41937645f4cef4fcadfd58932dd06148010b8197..f01a6dd509b51fe5b524e99ce0e392ac3d524ff3 100644 (file)
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_CM_FX6=y
 CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CM-FX6 # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig
index 72283a61d400bcbef04c14c87d9de36c9e61300e..bbb76a5c610f8fd65ce05c6f9a97824648320d23 100644 (file)
--- a/configs/cm_t3517_defconfig
+++ b/configs/cm_t3517_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_CM_T3517=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CM-T3517 # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig
index 9a7b2057ccd0ee0669d442da12804c6c599910f3..110e002d9592da64a0f73343c84aa54454b53946 100644 (file)
--- a/configs/cm_t35_defconfig
+++ b/configs/cm_t35_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_CM_T35=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CM-T3x # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig
index bcab16bb0587579a474abb3b3ad52201aa119807..4f2425b194e870bde32ac1a3817c0bf3cd2f0253 100644 (file)
--- a/configs/cm_t54_defconfig
+++ b/configs/cm_t54_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP54XX=y
 CONFIG_TARGET_CM_T54=y
 CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CM-T54 # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig
index 3cb69ac20554b3367382c56a0d4896b60047358f..400fca0f21cd0ca4329438252fce5e83a7809a1f 100644 (file)
--- a/configs/cobra5272_defconfig
+++ b/configs/cobra5272_defconfig
@@ -1,6 +1,7 @@
 CONFIG_M68K=y
 CONFIG_TARGET_COBRA5272=y
 CONFIG_SYS_TEXT_BASE=0xffe00000
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="COBRA > "
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index df17f2eda743e13f2de2f24ea70fc035af499c8c..986cec4fe218ad7a6c7e185fa9d414b762dfa698 100644 (file)
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -5,6 +5,7 @@ CONFIG_DM_SPI=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/colibri_vf/imximage.cfg,ENV_IS_IN_NAND,IMX_NAND"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Colibri VFxx # "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index 7cc9a6ed68b247f76c24c928ba61c22d4cb58370..aff63280ca99759384c6039ea049ae9e42b27dc0 100644 (file)
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD,DEVELOP"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index ee7739a57e4e2a70488b22c9e86ab7aba92c8a9c..74b67f71797965ed01ebbed8efc70a87dd666863 100644 (file)
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
index be8174bba54a7949795f616deeb58ad19eeece93..b6f14dbc6e82899dce3442788f458d2657e539b1 100644 (file)
--- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_CONTROLCENTERD=y
 CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP"
+CONFIG_BOOTDELAY=0
 # CONFIG_CMD_BOOTM is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig
index 74b52666be766ffbe81ea9ba15018be7ee1e7c07..2c45aff904ae7bf5acb4fca186ffa33111d01ceb 100644 (file)
--- a/configs/controlcenterd_TRAILBLAZER_defconfig
+++ b/configs/controlcenterd_TRAILBLAZER_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_CONTROLCENTERD=y
 CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH"
+CONFIG_BOOTDELAY=0
 # CONFIG_CMD_BOOTM is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig
index 2fa11fd442cc9fa30d06a6c427fab7144fbb1e2e..b18d80dea6008fe43151391a973ebb0b54c952a3 100644 (file)
--- a/configs/coreboot-x86_defconfig
+++ b/configs/coreboot-x86_defconfig
@@ -24,6 +24,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y

diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index 37488dd45685781d0a9863aa60dbb0f98280ba1e..2efffb59851056fe57ac00d3b57e9c31ee3836f8 100644 (file)
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_CORVUS=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index 0b77b1bdc0a553082395eb63d04be9c3c7597137..8282e25d9a4d6f44977358c28a2f52fcceec2053 100644 (file)
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NET2BIG_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="d2v2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig
index 8fd51ad546654cba7e809d3db088d115234f2af2..69839df7d212e2281b1fd65f4c16291e0089e8d2 100644 (file)
--- a/configs/da850_am18xxevm_defconfig
+++ b/configs/da850_am18xxevm_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_DA850EVM=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y

diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index 866d1877265f144996e2220512be15877122a754..0e281a5e672c4ad10beeb005e8685c52da57158d 100644 (file)
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_DA850EVM=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 0bb2d37ac9aa231288650de59a6669b34ec1717b..9c5428db6ab17c03669273d83f8ae83d4b355d69 100644 (file)
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_DA850EVM=y
 CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_CMD_ASKENV=y

diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index e9ba1ef70ff928878d5dd85b3a3de699008e01e4..f06f27f9c53c10b039d0789d21f88e19893dfff8 100644 (file)
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_DB_88F6720=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index 7ad3bb66b1c7c9b04514cdf1616dbdf8a8103e00..123e7fccd7905dedb8d90a73e44ad854928ac930 100644 (file)
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_GP=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 44f64fda640adc78ea807f11f4ff2069610e0ec1..f2c4a9ee6ad92f2e259c0cff76012ed5fd2ff87c 100644 (file)
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -5,6 +5,7 @@ CONFIG_TARGET_DB_MV784MP_GP=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig
index 5449cff7101402f35dfc288aa7e431e34142ea75..bf7f545079a8faf07cdee23472ceb0c5b3bb5bcb 100644 (file)
--- a/configs/devconcenter_defconfig
+++ b/configs/devconcenter_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_INTIP=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="DEVCONCENTER"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index eca6e86d813ebf2e9cfb2aee23cffdfd63608899..07954589e4c6e517fc7fc96368332e3a800059b2 100644 (file)
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_DM=y
 CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/digsy_mtc_RAMBOOT_defconfig b/configs/digsy_mtc_RAMBOOT_defconfig
index 67fda760525078716111cf6124d6909a805199ef..0e708cda9a5134d03b0a6d0d5ad7922bb0824cb8 100644 (file)
--- a/configs/digsy_mtc_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_RAMBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_DIGSY_MTC=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/digsy_mtc_defconfig b/configs/digsy_mtc_defconfig
index e05583f9defc5dfd279dba49533134ace16698ea..977d3b2d433144e02fbcb9b9096b989845f457c6 100644 (file)
--- a/configs/digsy_mtc_defconfig
+++ b/configs/digsy_mtc_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_DIGSY_MTC=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="autoboot in %d seconds\n"

diff --git a/configs/digsy_mtc_rev5_RAMBOOT_defconfig b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
index 424c2146d3565e608d25091be30eeff9f397be9b..9c8470dd57d27b8f68caa1b768954625e647fd09 100644 (file)
--- a/configs/digsy_mtc_rev5_RAMBOOT_defconfig
+++ b/configs/digsy_mtc_rev5_RAMBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_DIGSY_MTC=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x00100000,DIGSY_REV5"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/digsy_mtc_rev5_defconfig b/configs/digsy_mtc_rev5_defconfig
index 4579ab6830d9039e502b8bcbf5407771e7360f8c..c1dca2e0be82642a9df6cd7c6d9daa626de2f5a5 100644 (file)
--- a/configs/digsy_mtc_rev5_defconfig
+++ b/configs/digsy_mtc_rev5_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_DIGSY_MTC=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="DIGSY_REV5"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"

diff --git a/configs/dlvision-10g_defconfig b/configs/dlvision-10g_defconfig
index 1ebfd23e4d436e20b4459fca24afd3c43441979c..e22461d480dd7f21bdb1e45fe89a197d1d603a14 100644 (file)
--- a/configs/dlvision-10g_defconfig
+++ b/configs/dlvision-10g_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_DLVISION_10G=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/dlvision_defconfig b/configs/dlvision_defconfig
index 7b28d1d0bc2dc57785754d96005f1df651eff222..fba36119037d10fe56a74e5ebef2a0f18df45838 100644 (file)
--- a/configs/dlvision_defconfig
+++ b/configs/dlvision_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_DLVISION=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_ASKENV=y

diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index a3d053d3f082d5f8626dbee87457a9ba115e28b4..e997f6d0fb6da1b641f9edfeb65283e7923fc7bb 100644 (file)
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_DNS325=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 6ae447c96282f31b10bc902183d0812c9cccbbb4..2d997960856e20b53ce36a59dc8c36758cdf99d5 100644 (file)
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_DOCKSTAR=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="DockStar> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 0a437ed16bb94b67df0cad91287a382b8d100f8d..6347b4c44129945dd84e81f388105dcb41bb06c2 100644 (file)
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -1,6 +1,10 @@
 CONFIG_ARM=y
 CONFIG_TARGET_DRACO=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y
@@ -22,6 +26,9 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index d293e3034b7399eb7b991461b6e31c28799e1ac7..8f745f8b3b02c48a9bd9d25261239dd081186928 100644 (file)
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_DREAMPLUG=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 4d3cb344051dac9c9e0cfb520ca34a262706e263..a21473255cfe4c2b0e479cc311ad00f86575695e 100644 (file)
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DS414=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig
index d6e51f80b09ae1933afe89598dd0c8abebfa023c..57df04fb41244294ccecf562a95406ec6d6eb69b 100644 (file)
--- a/configs/ea20_defconfig
+++ b/configs/ea20_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_EA20=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ea20 > "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 55d5552354d66295e2844110f4206b5aa51ce59b..bf9177b35149e9db35a2611f16ad39e4d1694422 100644 (file)
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_EB_CPU5282=y
 CONFIG_SYS_TEXT_BASE=0xFF000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400"
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="\nEB+CPU5282> "
 # CONFIG_CMD_LOADB is not set
 CONFIG_CMD_I2C=y

diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index e204ba266e1a171662339737720faba47c7d2c27..4f6de89214ce5565531186bb3b2c455438a809dc 100644 (file)
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -2,6 +2,7 @@ CONFIG_M68K=y
 CONFIG_TARGET_EB_CPU5282=y
 CONFIG_SYS_TEXT_BASE=0xF0000000
 CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418"
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_LOADB is not set
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig
index 467a0a14f31b01c11666d5a5f5df63741f97c83d..b81ad58a15efa9e919aded25bbe212fe9053d4f1 100644 (file)
--- a/configs/eco5pk_defconfig
+++ b/configs/eco5pk_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_ECO5PK=y
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ECO5-PK # "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ecovec_defconfig b/configs/ecovec_defconfig
index 0066c7d9f498b82859c24f73f338bbf17c5dc452..a23f52a36eeddc94a9153b9756b965dca46cc125 100644 (file)
--- a/configs/ecovec_defconfig
+++ b/configs/ecovec_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_ECOVEC=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index fa7c1b5113ed782eb47f7519cebe13d82eee1208..e57dfdaa74b68f18400cfe01e10a0d2fdd678445 100644 (file)
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ORION5X=y
 CONFIG_TARGET_EDMINIV2=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="EDMiniV2> "
 CONFIG_CMD_I2C=y

diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig
index 0fe2759607bc36fc2483890d03995603b49c0b68..8d0bacef522447629143ac4e161a56418878d0f3 100644 (file)
--- a/configs/espresso7420_defconfig
+++ b/configs/espresso7420_defconfig
@@ -1,9 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
 CONFIG_ARCH_EXYNOS7=y
-CONFIG_TARGET_ESPRESSO7420=y
-CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
 CONFIG_SYS_PROMPT="ESPRESSO7420 # "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/espt_defconfig b/configs/espt_defconfig
index 78e319c9a77fb1026d96ec03bc982698ac9e1bee..81425bddd965120f48cdc5a774d12fa172a0ee7d 100644 (file)
--- a/configs/espt_defconfig
+++ b/configs/espt_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_ESPT=y
+CONFIG_BOOTDELAY=-1
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
new file mode 100644 (file)
index 0000000..326df8f
--- /dev/null
+++ b/configs/etamin_defconfig
@@ -0,0 +1,43 @@
+CONFIG_ARM=y
+CONFIG_TARGET_ETAMIN=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
+CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot# "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n"
+CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b"
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT2=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Siemens AG"
+CONFIG_G_DNL_VENDOR_NUM=0x0908
+CONFIG_G_DNL_PRODUCT_NUM=0x02d2
+CONFIG_OF_LIBFDT=y

diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 579efd3f98a29b2f019687bf13bc62c3f365247b..a88d37b6207a98648a537ff0a709dd92f3214e37 100644 (file)
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_ETHERNUT5=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/flea3_defconfig b/configs/flea3_defconfig
index 298888c24bfc2622ba07e2540cf1f57a11d34f5a..f6e01c1a36d2a5ef4647c82cb9e91d18c1b49bb1 100644 (file)
--- a/configs/flea3_defconfig
+++ b/configs/flea3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_FLEA3=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="flea3 U-Boot > "
 CONFIG_CMD_SPI=y

diff --git a/configs/fo300_defconfig b/configs/fo300_defconfig
index babfaf467582150c7fd9e46dfd5cb6437dfa1e37..aad6eaa8d480ad6dc60a69e15033fc7c543170cd 100644 (file)
--- a/configs/fo300_defconfig
+++ b/configs/fo300_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_TQM5200=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="FO300"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/gdppc440etx_defconfig b/configs/gdppc440etx_defconfig
index eacd4bb1eb65722c181c2cb511a2beece147885b..ef4c4ed5d4bba82ce8f4c201a55b84ff5df5fba6 100644 (file)
--- a/configs/gdppc440etx_defconfig
+++ b/configs/gdppc440etx_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_GDPPC440ETX=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/ge_b450v3_defconfig b/configs/ge_b450v3_defconfig
index ffa04408a53a92f31ba9653548c269c9d83325b9..857716784f5cfac8e4fef22a5437f5512088c4e5 100644 (file)
--- a/configs/ge_b450v3_defconfig
+++ b/configs/ge_b450v3_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B450V3=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -8,18 +10,16 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set

diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig
index b039c248d586cab2128b67c5dd8c7324f15ca5f9..c5f391edb5b1078a7c06e24e29d5b6a7f2923d0b 100644 (file)
--- a/configs/ge_b650v3_defconfig
+++ b/configs/ge_b650v3_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B650V3=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -8,18 +10,16 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set

diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig
index d9c8acd651663532361e9d9e330da0413639d084..2c5aa05748d3ebc8297aff1466bd3fd7d9106161 100644 (file)
--- a/configs/ge_b850v3_defconfig
+++ b/configs/ge_b850v3_defconfig
@@ -1,6 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_GE_B850V3=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -8,18 +10,16 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_OF_LIBFDT=y
+# CONFIG_EFI_LOADER is not set

diff --git a/configs/glacier_defconfig b/configs/glacier_defconfig
index 6d0dabe119e77fccae559fc1fcf1f584ae3a026c..d8b42274d3e8b5dc86f9a53da83af717047db1aa 100644 (file)
--- a/configs/glacier_defconfig
+++ b/configs/glacier_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_CANYONLANDS=y
 CONFIG_GLACIER=y
 CONFIG_DEFAULT_DEVICE_TREE="glacier"
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/glacier_ramboot_defconfig b/configs/glacier_ramboot_defconfig
index e7e1287511fcac20dd2f7d9c6ee7f45cf0479e39..2875492c3dc0a972bceb45c7dc651088b3844eba 100644 (file)
--- a/configs/glacier_ramboot_defconfig
+++ b/configs/glacier_ramboot_defconfig
@@ -5,6 +5,7 @@ CONFIG_GLACIER=y
 CONFIG_DEFAULT_DEVICE_TREE="glacier"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/canyonlands/u-boot-ram.lds"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index ee024694d6811a0b433e01afd657e346d807f254..cf251162a7f8ea1456f8aa5437fd9272d932f94e 100644 (file)
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_GOFLEXHOME=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="GoFlexHome> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 9f6589a1e98763f9e329c775cf9ccc5585792bd0..f2075fe27db553101c6f1b8ec6da2a1078e5b3aa 100644 (file)
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_GOSE=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig
index 2bdd0e7bed3b5cfd7a9f74258d2c1f2620b14a18..9fee96aee0232b858e1359e913d9995574a09e33 100644 (file)
--- a/configs/gplugd_defconfig
+++ b/configs/gplugd_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_GPLUGD=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/gr_cpci_ax2000_defconfig b/configs/gr_cpci_ax2000_defconfig
index d3f9c0285eae0df7dfaa4633870c2e6254b437f6..b30590ea2bafbb190e77836344ff7e04669444ba 100644 (file)
--- a/configs/gr_cpci_ax2000_defconfig
+++ b/configs/gr_cpci_ax2000_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPARC=y
-CONFIG_TARGET_GR_CPCI_AX2000=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TARGET_GR_CPCI_AX2000=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y

diff --git a/configs/gr_ep2s60_defconfig b/configs/gr_ep2s60_defconfig
index 29c7f29beea10667213ed4e043693b74a14befd7..302d936e273fbf67d7cfb956a3e0c16b7c2c7903 100644 (file)
--- a/configs/gr_ep2s60_defconfig
+++ b/configs/gr_ep2s60_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPARC=y
-CONFIG_TARGET_GR_EP2S60=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TARGET_GR_EP2S60=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y

diff --git a/configs/gr_xc3s_1500_defconfig b/configs/gr_xc3s_1500_defconfig
index e4877f23f56284df31c0fded5d913b85341ba926..d6ed30581c939c7f82f9b2b1a4f27bb6830bab16 100644 (file)
--- a/configs/gr_xc3s_1500_defconfig
+++ b/configs/gr_xc3s_1500_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPARC=y
-CONFIG_TARGET_GR_XC3S_1500=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TARGET_GR_XC3S_1500=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y

diff --git a/configs/grasshopper_defconfig b/configs/grasshopper_defconfig
index 25b9c4e983f29c21407fac4a4627afe2717c8d11..26b8a1f58366f2ac27f24c6b0ffe4ec18463d9e3 100644 (file)
--- a/configs/grasshopper_defconfig
+++ b/configs/grasshopper_defconfig
@@ -1,5 +1,6 @@
 CONFIG_AVR32=y
 CONFIG_TARGET_GRASSHOPPER=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/grsim_defconfig b/configs/grsim_defconfig
index d2f709f834efffd6f88f64e17b8d63f0ca337853..f827113ab5338a69778d089bbe2f50c38598a141 100644 (file)
--- a/configs/grsim_defconfig
+++ b/configs/grsim_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPARC=y
-CONFIG_TARGET_GRSIM=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TARGET_GRSIM=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/grsim_leon2_defconfig b/configs/grsim_leon2_defconfig
index 9c9c96858245af8049a283d7a3c55700d5aa7ea6..f5e7c433fa56c33410d08bf57f1968da3c26a39b 100644 (file)
--- a/configs/grsim_leon2_defconfig
+++ b/configs/grsim_leon2_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SPARC=y
-CONFIG_TARGET_GRSIM_LEON2=y
 CONFIG_SYS_TEXT_BASE=0x00000000
+CONFIG_TARGET_GRSIM_LEON2=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
new file mode 100644 (file)
index 0000000..80f0013
--- /dev/null
+++ b/configs/gurnard_defconfig
@@ -0,0 +1,20 @@
+CONFIG_ARM=y
+CONFIG_ARCH_AT91=y
+CONFIG_TARGET_GURNARD=y
+CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard"
+CONFIG_FIT=y
+CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
+CONFIG_BOOTDELAY=3
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DM_VIDEO=y
+CONFIG_CMD_DHRYSTONE=y
+# CONFIG_EFI_LOADER is not set

diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 0baf3a30af784c522a68b115d87ad8b52c4b12e0..31794b9ea28e88af0236be2e5e2425f60e35af01 100644 (file)
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_GURUPLUG=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig
index 9959ef443b286aaef22bca36c600589fd9e421e0..e9449fa25350f873e0c7c635a0a074481b7c791e 100644 (file)
--- a/configs/gwventana_defconfig
+++ b/configs/gwventana_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Ventana > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/haleakala_defconfig b/configs/haleakala_defconfig
index c90eff41418b73603e0a47c03f221348e5362c01..4130e27602c8cfbd2441ccdb362817a8ee21e5a9 100644 (file)
--- a/configs/haleakala_defconfig
+++ b/configs/haleakala_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_KILAUEA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="HALEAKALA"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 32d04869558dddd39c3a37f7180379acb16730d8..f67eda701ca707af8cfacf4d8f9b260b71247833 100644 (file)
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 657826a7a69bc35d72f70c9d2e85a4b81ff7eb20..5eff4ac164c910605071df8fc7b816c7255a5c8c 100644 (file)
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="HRCON_DH"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y

diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 265114f2114cac468868a5494ab6d84a51641947..3b24256dd26ce24eae15b6d727c2805da0efb1b5 100644 (file)
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_IB62X0=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ib62x0 => "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/ibf-dsp561_defconfig b/configs/ibf-dsp561_defconfig
index 5ce6abca99a5f05f0a8b113b9c0b6d99b1c79eed..036a92f3e98f8acbe2a605f06092a70621232797 100644 (file)
--- a/configs/ibf-dsp561_defconfig
+++ b/configs/ibf-dsp561_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_IBF_DSP561=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/icon_defconfig b/configs/icon_defconfig
index d32bbc4ce206b1f4972ea08315286feee28173a2..a2a70731da18a9c34b107a7043003be0ff4003eb 100644 (file)
--- a/configs/icon_defconfig
+++ b/configs/icon_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_ICON=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 44a474e634d489f5586c21fe523ac293c201d251..516b2393f25c2d94a668f5bba01830cdd1e7bbda 100644 (file)
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_ICONNECT=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="iconnect => "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 794b85edbcf9e0a0e93a268f2739851a25a621ca..b0487ef1653199e9fb25df203c33fb45b66515bc 100644 (file)
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFFF00000"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n"

diff --git a/configs/imx31_phycore_defconfig b/configs/imx31_phycore_defconfig
index e824616c0f30e4c7b1f33c9b4ccaca1f5b781d2f..136b9d14ad0ff55eaf50ee124fff44e0d662a575 100644 (file)
--- a/configs/imx31_phycore_defconfig
+++ b/configs/imx31_phycore_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_IMX31_PHYCORE=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="uboot> "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/imx31_phycore_eet_defconfig b/configs/imx31_phycore_eet_defconfig
index afe3c3c1b13a9e40c98265db82573b5f779f3b96..96252c3eacdb451ffd2c6894864c26e75c8f9cfe 100644 (file)
--- a/configs/imx31_phycore_eet_defconfig
+++ b/configs/imx31_phycore_eet_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_IMX31_PHYCORE=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX31_PHYCORE_EET"
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 483703ac3620bcef3d8102d2316d481da9573be6..3cbff46aa4d8c126cfaa0ba4015fa69df6137f97 100644 (file)
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ns2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/inka4x0_defconfig b/configs/inka4x0_defconfig
index 506a8f8e4629dc0d19d317436d0c9586f9ae2cc9..d8586a453022a4b1dd0234629fd3de733f4938dd 100644 (file)
--- a/configs/inka4x0_defconfig
+++ b/configs/inka4x0_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_INKA4X0=y
+CONFIG_BOOTDELAY=1
 CONFIG_LOOPW=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/intip_defconfig b/configs/intip_defconfig
index 512d4a817fd050b7354aad10e12de03c31a81356..cd0f234e0c779a605a9fd9d478b2660b6b3d5234 100644 (file)
--- a/configs/intip_defconfig
+++ b/configs/intip_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_INTIP=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="INTIB"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/io64_defconfig b/configs/io64_defconfig
index afc5a83db7ed64ddf3912443ed8a5621e555d44c..27ffaeae104625da3c43b2b6a004bde8b570f23f 100644 (file)
--- a/configs/io64_defconfig
+++ b/configs/io64_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_IO64=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/io_defconfig b/configs/io_defconfig
index 1bb9248c57060afc06818976b0e7ffb15e407b19..2392d9bcb9da59884bfd348f151cbc2833c97a8c 100644 (file)
--- a/configs/io_defconfig
+++ b/configs/io_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_IO=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
index 2e66b9497e2ebbd82b1446784f3d9fbde88e89ea..c7b3b277c405da907dbd57bd2c4d0e99981ecf2d 100644 (file)
--- a/configs/iocon_defconfig
+++ b/configs/iocon_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_IOCON=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig
index b944b0793924fd29cc9b775a3a0bec714091fdb8..277988cbeea2f610da1f39d31016e5d78b304e85 100644 (file)
--- a/configs/ip04_defconfig
+++ b/configs/ip04_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_IP04=y
+CONFIG_BOOTDELAY=5
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/ipek01_defconfig b/configs/ipek01_defconfig
index e0b4390c7d86206bb4b7980ebbd211ed58b2b732..19f53dfb5cf02923d52bb15f03927bd2639ece77 100644 (file)
--- a/configs/ipek01_defconfig
+++ b/configs/ipek01_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_IPEK01=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_LOOPW=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/jupiter_defconfig b/configs/jupiter_defconfig
index 21c448b8050f010f762d9b3b65a5e9f4ccc54709..48249b0bd8170df057f3d53b71b54a90738a0173 100644 (file)
--- a/configs/jupiter_defconfig
+++ b/configs/jupiter_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_JUPITER=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_SNTP=y

diff --git a/configs/katmai_defconfig b/configs/katmai_defconfig
index b3e61f8a7d3747a87db40be7597588785073644d..30c8bf02bf68b1ddb56892e51e187935cd2e5708 100644 (file)
--- a/configs/katmai_defconfig
+++ b/configs/katmai_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_KATMAI=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/kilauea_defconfig b/configs/kilauea_defconfig
index f85cfbb4b14e6df31c76bb153ab91a9ab64b3075..698de8c3866e46d73c0bf097f06d50ff5b66e1ad 100644 (file)
--- a/configs/kilauea_defconfig
+++ b/configs/kilauea_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_KILAUEA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="KILAUEA"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index 5c45f7be60b1f97ba7f230bb9ff5a24dac6bf43d..217a868230b5c263cf334d60d3fd35c13bb7fb7f 100644 (file)
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_KOELSCH=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/kwb_defconfig b/configs/kwb_defconfig
index 30558e7a3cfd5be4eee9fde1685b78d4f2b6c71a..790292e7381b6f8fec09d0cf140199113a447cc9 100644 (file)
--- a/configs/kwb_defconfig
+++ b/configs/kwb_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_KWB=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_BOOTM is not set

diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig
index e3902ce01eb69e0f140456121a30401a4ffe6081..00a54416b57ebb9241eb449854387da10f112550 100644 (file)
--- a/configs/kzm9g_defconfig
+++ b/configs/kzm9g_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_KZM9G=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="KZM-A9-GT# "
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_I2C=y

diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index c26211706a2e02352bc1698cfb922c321fe73abe..19dd1fe27ee3d180ec093623ad793ebd347ba752 100644 (file)
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_LAGER=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig
index d080f05e41a2cf2d45a6d688046151713d6fe498..8161f730dd5adb79c513676b0893981943143f95 100644 (file)
--- a/configs/legoev3_defconfig
+++ b/configs/legoev3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_LEGOEV3=y
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n"

diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig
index 04189debcf191beb1e13dafb020a9f49c2fbed68..1aed0c45a83efdb78041c7f37f043fab2316ad87 100644 (file)
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRDM=y
 # CONFIG_SYS_MALLOC_F is not set
-CONFIG_SPI_FLASH=y
 CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm"
@@ -10,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_SF=y
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_SPI_FLASH=y
 CONFIG_NETDEVICES=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y

diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 935f2fdaa50e53df333d99facf3ab20edb2ab773..86ddf719d45c3b2b4678e65a6df082bc35b68068 100644 (file)
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AQDS=y
 # CONFIG_SYS_MALLOC_F is not set
-CONFIG_SPI_FLASH=y
 CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
@@ -10,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y
@@ -26,6 +26,7 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_SPI_FLASH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig
index 5c28bd10715c3854fad70ba77145981d77fe254a..38064129192902a556e910f8853a261c5dd7250a 100644 (file)
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -1,7 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012ARDB=y
 # CONFIG_SYS_MALLOC_F is not set
-CONFIG_SPI_FLASH=y
 CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
@@ -10,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y
@@ -26,6 +26,7 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_SPI_FLASH=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index efaa7a9fd1c35ffd785339e9181788f6cf29846a..6012d49595dd819a8996568fcfa43e61321edd84 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 9fa5cb9526235f3de488655f6d66d9cea73ff15e..685f1da1b3a753fdb80b338402b3740c25bd88e3 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 24b7a15bfd568beea6e0e00fa0bdc60a78c027bd..eca1cca1138fdf228cf6024545472bb25104177c 100644 (file)
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -1,9 +1,12 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
@@ -25,5 +28,3 @@ CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 5d2b57d489da62501270429ad0b3a7f8fdb6f10f..a39a4037aefb7bd5d8af6cf238b3aa6c9efd110e 100644 (file)
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -1,9 +1,12 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 # CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
@@ -27,5 +30,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 426a4bec0392cb514dab3084a3cadcef43186b79..67485465c1678b3a4cc2699921482384dc1fd522 100644 (file)
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -2,11 +2,11 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 4f5c1e8200b59562fa5ef84b2c3da1feb09ab4e1..81035c9a1afb55f95368bbcfd8cea180d825c463 100644 (file)
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LPUART"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 6a791c0a9c550d5a8282366636a3ae8bdba6aea5..a1504c3a15b927cc0e4839a4c10fd051afdeaf75 100644 (file)
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 33e5c0cec3cf277cb8326ba878a0c7add97f7b7f..f8bdfe8ec41a686e4f510a0f008bdbe2825f7a8a 100644 (file)
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -1,11 +1,11 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_OF_LIBFDT=y
+CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 45f0f734c5c8782cc4988ed061536ef336bb42bf..a1ee5b95c4164f37766efd700fc11bcf7a3d8045 100644 (file)
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -2,11 +2,11 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart"
-CONFIG_OF_LIBFDT=y
+CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
-CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 16243ee4ff3b82c7bca64d3a40081e9d09164a51..0d406ac24f2792f582ef5e9e2ac8c1cee92ad1c5 100644 (file)
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -1,9 +1,12 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 # CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
@@ -27,5 +30,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 315834032befb25cf767888eb9c0b99f4f25c2d0..a6be6c63e689b216302109b8a3c8051dada003e8 100644 (file)
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -2,11 +2,11 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index bbeb4bf1d5020cc3bdcffca75c81225b7a249e24..3b6c5cf9610e9fc60fdb93618399a8e0257c9185 100644 (file)
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="LPUART"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 6910c4e8501ead87644cc88e9b36196d9d4747b8..0a6cbcd498a5fdaba677caed2a1e3b07e1c8e34d 100644 (file)
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index f59ad74f16b377c6c3108e15aef5ae358ef8a7de..2128c464cc567028c376985ab86aa044b6b5ec6b 100644 (file)
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -1,9 +1,12 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
@@ -24,5 +27,3 @@ CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y

diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 90f810adfae2f0189d3d22560260246938ea0f06..8d1f8edef0761823ff6054f94fc1da3a8f93f8f4 100644 (file)
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -3,12 +3,12 @@ CONFIG_TARGET_LS1021ATWR=y
 CONFIG_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
 CONFIG_SPL=y
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_OF_LIBFDT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 1fbfd38d3f9943387f33d6872956b669ec4c40fe..8dfad69a4a6c1b8eeb6c572a06c2f79dbf727568 100644 (file)
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 6b628d3c838415f3b622b8afb20001d25c9d0038..56f5efe5c516ddd381af1b56386309985cc98bdc 100644 (file)
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 90f870afa0f25dc2a1cd27e549da92d5c7276b29..61368878e70afa289ee111391236e6bdcf9589b9 100644 (file)
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 813c269509fb8f94589d27b8825c28538d78d285..7c78b6eaa66417c27351530b8535903e8f416181 100644 (file)
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -5,6 +5,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index e665ba449527ef097037deeb4a587acf7e491861..2b2a71426db2497ce4f8060b9f9187dc22086d87 100644 (file)
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 03a263a5eed39a405b327b88af44073e7ba79dca..f90a6be38bfdf44d30a1e72e6dbf152ed6fae019 100644 (file)
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 0062f5c50acae202ff8782d1310b32622cd318e5..d85f771628747ce073cd67d9e5abb66726ef0603 100644 (file)
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index bace827cb7bb3c6be8afc005ad46e7463baf46fc..218dd76dad2d0fa3c4b309f174b70d75a1834344 100644 (file)
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 48a89ab5f781b97b622ac76582e12cbc2d6304f1..983e4c22b239e6581bbb82da0f0862ea2859fbb6 100644 (file)
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 627a90dc6e2664a4b0381f5a83dd7af90ed84f97..c420548141dae9316d32109543069fbdbf5d786e 100644 (file)
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index c676a91c0f9eebd58ea663e9cea5526fb60c40db..a5a870b18290a54d46579f1edfd24afda9155430 100644 (file)
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y

diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig
index 56922dc444aa4545db5e7fd01b73a5ba92f17a05..21a02830d6e0e3d3acf895d3f9e9b84b83116c65 100644 (file)
--- a/configs/ls2080a_emu_defconfig
+++ b/configs/ls2080a_emu_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_IMLS is not set
@@ -25,5 +26,4 @@ CONFIG_CMD_CACHE=y
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
-CONFIG_BOOTP_VCI_STRING="U-Boot.LS2080A-EMU"
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig
index f27fbb715e7deb101e0868adfe39a7bd9b5f13d1..1b670b0c05353cb982d79cfb21b1725e8c8d28ca 100644 (file)
--- a/configs/ls2080a_simu_defconfig
+++ b/configs/ls2080a_simu_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SIMU, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_IMLS is not set
@@ -28,5 +29,4 @@ CONFIG_CMD_FAT=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
-CONFIG_BOOTP_VCI_STRING="U-Boot.LS2080A-SIMU"
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 49a4a26295b9384a7a6f3c2811993054e28e5f1f..947ac3d4201e8c9041cb251b9332dce5ae44d495 100644 (file)
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A, SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index c3053452ae350cef6aa4ab22ce9db24ad0edf1dd..cd8a7bdca619ceb2fe2f789ff581ec334f698ad6 100644 (file)
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 8a6dd14b6577896ff6211446ba2b1399850625d2..ea3fd1e13bd51a188d4deb290b29b81e3b4a84e7 100644 (file)
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -1,14 +1,19 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS2080AQDS=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
@@ -18,12 +23,15 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
 CONFIG_NETDEVICES=y
 CONFIG_E1000=y
 CONFIG_SYS_NS16550=y
+CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
-CONFIG_OF_LIBFDT=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
new file mode 100644 (file)
index 0000000..0850a68
--- /dev/null
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS2080AQDS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT,LS2080A"
+CONFIG_BOOTDELAY=10
+CONFIG_HUSH_PARSER=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_SF=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_OF_LIBFDT=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y

diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index a2d88ccb905a286cad78c869724283c1b6478977..8f98720ad1137698e4b5e9f1f610e71265a316a8 100644 (file)
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A, SECURE_BOOT"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index dc2b872176adeae74db38e218ff84e96bd359abc..c0b8a98da39ea11703d84813f357472e71e52308 100644 (file)
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -9,6 +9,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index dbba8abae9a9dbb3af66fac4de0f9cb4250a4a97..26ffe9850590b6ab72583f4f3cbf8f69be6bf756 100644 (file)
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, NAND, LS2080A"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MMC=y

diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 4af7e5d7efab838c5ad0c4b6b31712676d8ba8ab..002ca44d5b084db94a0b485ae65f05fa9a283a75 100644 (file)
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_LSXL=y
 CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 5bcd367857127fc2a78b588d04a880f6956aee0a..4f63da9b6c4790de88e27ac7fdf507cd3a0096fd 100644 (file)
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_LSXL=y
 CONFIG_SYS_EXTRA_OPTIONS="LSXHL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/luan_defconfig b/configs/luan_defconfig
index e0fa8054200af533140b7c9bd04ad0fb92874f7a..90801f4a935ec237e853b865a3c06e8b7fbc7c52 100644 (file)
--- a/configs/luan_defconfig
+++ b/configs/luan_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_LUAN=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig
index 64794a1f1bad3bfa14106afdcf32582784fd9a19..eaf6c97623a26054d3c57a25acbf3634eae6c33f 100644 (file)
--- a/configs/lwmon5_defconfig
+++ b/configs/lwmon5_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_LWMON5=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_LOOPW=y

diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig
index c598c7209d4c0c985a0ff9fc581b207cfc780ff6..b505d293343b43e1d266e382275417cb01d0f671 100644 (file)
--- a/configs/m28evk_defconfig
+++ b/configs/m28evk_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_M28EVK=y
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y

diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig
index 62496c39c6070f3a58cbb83d1e44e7229cf87d7b..962e03644de5eb2c0c5fdbfc29deee3fb2802f1a 100644 (file)
--- a/configs/m53evk_defconfig
+++ b/configs/m53evk_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_M53EVK=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/denx/m53evk/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_ASKENV=y

diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig
index 81a67004ff8b41d154ea1fca64a6d03a3a9ab370..75affaa23fd537667aa1452959a50e83017db1ef 100644 (file)
--- a/configs/ma5d4evk_defconfig
+++ b/configs/ma5d4evk_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MA5D4EVK=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set

diff --git a/configs/makalu_defconfig b/configs/makalu_defconfig
index 8f7baea636997c0fd8c3d6bf881bd5c24d63f870..4967e10a105b6c8cf40b61415351ea7b33be565f 100644 (file)
--- a/configs/makalu_defconfig
+++ b/configs/makalu_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_MAKALU=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index 7bef84c9c099613dd483cc58b84aa19ea55d7336..590f9b5674beda4054574baea482cc0dc5b07993 100644 (file)
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -13,4 +13,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_OF_EMBED=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 47ded9ed8f988125ce8f8df40d9bb180540ed8ca..ff93931c0015f85aee9daf819e8f513a182af08e 100644 (file)
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -14,4 +14,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_OF_EMBED=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 3c3bb1652249128fea98533102f46da8252cd17b..3a875860e48792815754028274ae80ad14692332 100644 (file)
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -12,4 +12,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_OF_EMBED=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index b245d915ef77bfeb0fe0f1b454ead733d3747609..11ff25927ae9b54b87d65fcc5ee28d9920068f4b 100644 (file)
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -13,4 +13,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_OF_EMBED=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 7a5eeba022429fe70ec2d2d02a5d37a0eafc5d8a..b67bc51fe1b34fdd52dbedeae02c82f23fd91791 100644 (file)
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MAXBCM=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SF=y

diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig
index ab814cc2138c4c7462098bbd2e82edab21819abf..2e819e40b4fad5368594880b402ab1c5009cd4d9 100644 (file)
--- a/configs/mcx_defconfig
+++ b/configs/mcx_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_MCX=y
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="mcx # "
 # CONFIG_CMD_IMI is not set

diff --git a/configs/mecp5123_defconfig b/configs/mecp5123_defconfig
index 9597482cb4ee87a6510c0110c7c0433178d54fd9..98f006889fc8585797db77d3dc9bbba3ae36bcb8 100644 (file)
--- a/configs/mecp5123_defconfig
+++ b/configs/mecp5123_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC512X=y
 CONFIG_TARGET_MECP5123=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 3d295f574d25d43e27c5d6018b393d774ee637e7..b214a923e40fae5c733f590b54ae5119deadb1ef 100644 (file)
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_MEESC=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index aac7cc5e210c53deadcc51b4d8d54ae23ac810f2..727d1936798d8166fa56092be37601981a2fd942 100644 (file)
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_MEESC=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index 2ef713fee3e93b662533b3852f03ced01fab0916..a66cd3b0a763b9fa54a876c125cc0e68180058cd 100644 (file)
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -11,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=-1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot-mONStR> "
 CONFIG_CMD_ASKENV=y

diff --git a/configs/mpc5121ads_defconfig b/configs/mpc5121ads_defconfig
index 34935adcd2f1b41972ed502e6636a6e8a1826a40..4bc7e4378e219a426b20f9d54698f514c12fa4a4 100644 (file)
--- a/configs/mpc5121ads_defconfig
+++ b/configs/mpc5121ads_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC512X=y
 CONFIG_TARGET_MPC5121ADS=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/mpc5121ads_rev2_defconfig b/configs/mpc5121ads_rev2_defconfig
index 664d9495e1904c69ee025d85106d7ec0d060be1b..6c942fc3ecd61b7d3ed7af26839c551e19f32304 100644 (file)
--- a/configs/mpc5121ads_rev2_defconfig
+++ b/configs/mpc5121ads_rev2_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC512X=y
 CONFIG_TARGET_MPC5121ADS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="MPC5121ADS_REV2"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index 1f28c08f6362b683bef2728348f319c0b1406dcc..a1fdcf26ecaacfcf2b4ed57c209600bc3e86b985 100644 (file)
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_MPC8308_P1M=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/ms7722se_defconfig b/configs/ms7722se_defconfig
index a9bc3d4ea85bde6a8b7dadf789440253c041b754..026f5667502480119592a53520918cbdddc91511 100644 (file)
--- a/configs/ms7722se_defconfig
+++ b/configs/ms7722se_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_MS7722SE=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/ms7750se_defconfig b/configs/ms7750se_defconfig
index fb7932a60501d4853046cf4a577733ea7e6af196..6a53642f6ffe4a2989b938917a4101cbce6a0ea1 100644 (file)
--- a/configs/ms7750se_defconfig
+++ b/configs/ms7750se_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_MS7750SE=y
+CONFIG_BOOTDELAY=-1
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig
index dda0daa71b8fb964981af5f3826a1144420183c3..af583284489165e7078dded1f675ce9d40eb56cc 100644 (file)
--- a/configs/mt_ventoux_defconfig
+++ b/configs/mt_ventoux_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_MT_VENTOUX=y
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="mt_ventoux => "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/munices_defconfig b/configs/munices_defconfig
index eabfe1ec4d56a0cda87bc655124d2868fccee3a0..169fc93cba552e5d596635af0038b667dc177925 100644 (file)
--- a/configs/munices_defconfig
+++ b/configs/munices_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_MUNICES=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y

diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig
index e201abbb5ef3536b9b1557b63dde104487d2a3e6..a028482bf08ce977e32cd0dc013a5d200a98eb33 100644 (file)
--- a/configs/mx23_olinuxino_defconfig
+++ b/configs/mx23_olinuxino_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX23_OLINUXINO=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig
index b1bd634311812205c9b1ee1b4b8d6f4cdeb451eb..5638c528f51670fff8d91e2f4eb93c7efac97fc3 100644 (file)
--- a/configs/mx23evk_defconfig
+++ b/configs/mx23evk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX23EVK=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index 1c1afd896402453e69ddf6e8c7de6b07d76d4d39..b4afb052430cb783630793b52a1a2947e19e3cc2 100644 (file)
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX25PDK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig
index 8738f59701911b6fda791c9de9d5a1bbdf3b0b99..d43bb5317413980f5751684a7c0a47fa338f1c53 100644 (file)
--- a/configs/mx28evk_auart_console_defconfig
+++ b/configs/mx28evk_auart_console_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_MX28EVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_MMC"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig
index de8a297f989413a3aa22489f32a2024ca2786b8d..0a7564acd686334f828caf33bda154fafd1193a8 100644 (file)
--- a/configs/mx28evk_defconfig
+++ b/configs/mx28evk_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_MX28EVK=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig
index 83ff3a303579f1fb3357dad04159af349bfb8b1a..65d4a6b964b292c24079e24a7cb3128b8e777021 100644 (file)
--- a/configs/mx28evk_nand_defconfig
+++ b/configs/mx28evk_nand_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_MX28EVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig
index 906d3da0d2b54494688b3d6fcd521bad42425e03..d5b001cf95535a2c0c37d534794df369bf19189a 100644 (file)
--- a/configs/mx28evk_spi_defconfig
+++ b/configs/mx28evk_spi_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_MX28EVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx31ads_defconfig b/configs/mx31ads_defconfig
index 9ccf06964eb1fd28fe5646f2af148ac9906c2779..b4c2ad3135cd2dd6675bfe05878606920e47a9ce 100644 (file)
--- a/configs/mx31ads_defconfig
+++ b/configs/mx31ads_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX31ADS=y
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index e1bb561e258fd02c70680dd4131f65472513f797..901f9921fb97da616abb518e2f476e2d45d24494 100644 (file)
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX31PDK=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_SPI=y

diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig
index e6cc0653c60a0554b19e779e94553fb3838de8c9..8addf85c4a80e23223466b9a5dc235a537288fc3 100644 (file)
--- a/configs/mx35pdk_defconfig
+++ b/configs/mx35pdk_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX35PDK=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MMC=y

diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index 0b3b232faa8a4a277d2e15cecd6766c6564b526b..2b9acf5004a28935c5f0b3b6f23b41fe04120f15 100644 (file)
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX51EVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index 500b39c4daf26daa03096360f5c62c42e35979c4..7a62c2b9542335f92b75c4bf700e72c7138ff347 100644 (file)
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX53ARD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index 45f5e4570df70f92d763d98e527554754a1109b2..9a05a8bf8c91da16db7693a29a82def8a67d358b 100644 (file)
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX53EVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index da9aa4f79a20702be64f947d7e4f80920624573e..71b9ce4ae55793af632c7f43afe3914d7109011e 100644 (file)
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX53LOCO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index c24aec6d6856266ff74c4509676a1cc7014dfff7..93b20d7044f013a7435bccce439e8b461d99c0ab 100644 (file)
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_MX53SMD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig
index eb30bf64dc4e810a7022c71e24e15b67aba695e9..cd793419ab96b875d95928f8e885e813b11a9d47 100644 (file)
--- a/configs/mx6dlarm2_defconfig
+++ b/configs/mx6dlarm2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QARM2=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig
index dc52b9be2f0655208411393d1e74e2de58d05471..d4374f672c2827fc234e9477443374630eeb450e 100644 (file)
--- a/configs/mx6dlarm2_lpddr2_defconfig
+++ b/configs/mx6dlarm2_lpddr2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QARM2=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig
index de925d9ddc36eb1364c3c36151905b3daf0b0c3a..4e94603b68bfacc0a9caee8d0c43719b9ae4dc2d 100644 (file)
--- a/configs/mx6dlsabreauto_defconfig
+++ b/configs/mx6dlsabreauto_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QSABREAUTO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig
index 2fcc0885b44d6746aa3ba748e4b995856604e0cd..f7b3e13da51398871d05ec9e2f655d9f827c2696 100644 (file)
--- a/configs/mx6dlsabresd_defconfig
+++ b/configs/mx6dlsabresd_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SABRESD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig
index 391da699de365d0349b9e77037466af07dc30256..79fa4713e561d2f5a55853a52fcf72771728fdcc 100644 (file)
--- a/configs/mx6qarm2_defconfig
+++ b/configs/mx6qarm2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QARM2=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig
index af3b9b0b2c4ca95efc5eb407ea9b67e1e4e77eb2..467b006f8e35b50906dec332ccc04a8320b0f65b 100644 (file)
--- a/configs/mx6qarm2_lpddr2_defconfig
+++ b/configs/mx6qarm2_lpddr2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QARM2=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qpsabreauto_defconfig b/configs/mx6qpsabreauto_defconfig
index 6212540824018f5601a9e8a6c68acf9456cbfa58..8ef680971cb1a4f0f878b21c8e24c1393aea660c 100644 (file)
--- a/configs/mx6qpsabreauto_defconfig
+++ b/configs/mx6qpsabreauto_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QSABREAUTO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6qp.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig
index 250411db3407c3eac5401ca4961a6f82426dfba0..089025733a21f1ffb4607eebd968f526dc9c3693 100644 (file)
--- a/configs/mx6qsabreauto_defconfig
+++ b/configs/mx6qsabreauto_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6QSABREAUTO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 66575b87fc8ee69f26c22024a9fc6d971f7f9de0..fa6139a4b2369a204b0fb78e7a58f4f1047fd446 100644 (file)
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig
index 7456cf3c328592e05677d3b2f6595f7d5eb393ec..d6fa6a2f4b6bf556228e51d417c0ccf93a1213b7 100644 (file)
--- a/configs/mx6qsabresd_defconfig
+++ b/configs/mx6qsabresd_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SABRESD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig
index 8d5e2895ae68a1033d1ddf100295cb4d9ab8b679..e803069fcfba6ea02a23bc31cc3a0ca00bb1bfc5 100644 (file)
--- a/configs/mx6sabresd_spl_defconfig
+++ b/configs/mx6sabresd_spl_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SABRESD=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 9f29b15d99509711aff8ef78777a1aa612905538..2d7e2302b23b035d5c0b56814240b537ce217571 100644 (file)
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index a43de4a4004ef46627a828a6a4e6e8b68d78735d..d3c6fb0130e694e58f02d3725a9175e1e82691cf 100644 (file)
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SYS_BOOT_SPINOR"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index 2efd833467144ec6b34e94cff2483dc576ff773f..100103ef66852b8e2ea35d3b0ca91ae9235b4067 100644 (file)
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6SL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 8a4c7d5b5ddbbcb82a0b1aefc4edc89e12209adc..83a1a34b317e5f857c5c32dc074d9bd7ae809be6 100644 (file)
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABREAUTO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 55093c9f3b2ac12cb4c1fa4b633b6ee4f212daf2..54ddca88900bedacb6b7ee87010a8156ba003239 100644 (file)
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABRESD=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig
index f01fd3be516ba9c47197bc2b5c5e6ff61761f4a5..9ad038a0f30f858e0e4c6e88daa3545d4e18a808 100644 (file)
--- a/configs/mx6sxsabresd_spl_defconfig
+++ b/configs/mx6sxsabresd_spl_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SXSABRESD=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index dee1ef0fef5e9d8ea7b0782875ff94212619aa1d..c65bdbf6e1f61591fe9269376a6d1e031bc91bbc 100644 (file)
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6UL_14X14_EVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index 644fd20abfa3217ecf79537eb9d2d11e00cc25ca..caf24777435d4e1a6a8b12da2c992a77b4172777 100644 (file)
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6UL_9X9_EVK=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 3bde39f652cbc43a4573b37da5a1d5750029a5f9..09716a7f515d303b1c01170033f1e325731c7683 100644 (file)
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_MX7DSABRESD=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index f904e12b7b5c38864305a39b161d04021665e8ff..224b5b7805cbd941831ea3274cf8b353edc9dcd3 100644 (file)
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NAS220=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="nas220> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/neo_defconfig b/configs/neo_defconfig
index e306d681b3d6b5273f50a8cb4926713ea0fe46e8..b61b7190a63e3fb2cbf391f65259337dd9e56c28 100644 (file)
--- a/configs/neo_defconfig
+++ b/configs/neo_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_NEO=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_ASKENV=y

diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index f930e473e4bf8aab87cb20fcab3b9013e8257d0f..fcd4b13f2cdae644f8ae5f619f2e2e582e0122a2 100644 (file)
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NET2BIG_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="2big2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 7917336c89af638dd27c34fa216e7b176180913f..a117946f4850fdc8673c37cc22ff8bf6eef380d2 100644 (file)
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ns2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 55978f2ef9ac6f9fee5de6d72cee5b49ce557ebc..e4a1149b03ce61bc37b166ca41877e7eeff081a5 100644 (file)
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ns2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 67b142d236decacf0785299b5bf00fc0f75409a3..f46b9a1ecdf9f34a47711e702028131ca5b07f0c 100644 (file)
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ns2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 8199bbd911f03adf787a5a2445ea93353740c3ab..1b76bc274125b1a6637d63492516234ae618671a 100644 (file)
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ns2> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index cc86e3f8f4213a012cbbc7a1800fd8a3986d7404..02b2462236f6b40aa87bcf87831f3192696c520e 100644 (file)
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index 05dcea2ad70119cf9c5dc69556da120f8fd6ce15..52553f642ff705178e3e61a54912ee6ba2b88383 100644 (file)
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 2de93a43b03504fdcab81fc78f4f297a9885737a..11188b713699d820f46fc27ad8059a432f18e216 100644 (file)
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index a5f57f6b3781230e4f18922262221ee5ea18d108..05bf1406e838f2fba94d5ba42bd50a14b927151e 100644 (file)
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index fdd444e9fb95706c4d454fae1ccd7610f77247cf..bb081a249c514fae59a30e84d1e81afb0316cc5f 100644 (file)
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index daace528dd1a803946b36df55c0810fb0e1b1a61..08e91c9b75036bba58bc12f0d4adedb6d6bd63d4 100644 (file)
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_NITROGEN6X=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index 6eb01ea51114a7a3a41b4bb3c57f01b4868b06ed..da103929b73c99445cde4a0a21860c761c84ebac 100644 (file)
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_NOKIA_RX51=y
+CONFIG_BOOTDELAY=30
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Nokia RX-51 # "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 51da5ad6ad6dd1a6144c7e6d7e2e5a7bdfc37792..fdec8dc04d48b019f26329bc42728a5aa4c89180 100644 (file)
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_NSA310S=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="nsa310s => "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig
index 1a9f2076c7790c6a37b960dc0ee6eefd877f166f..adca5703270e6a378f218d47cede44055c504f73 100644 (file)
--- a/configs/omap3_evm_defconfig
+++ b/configs/omap3_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_OMAP3_EVM=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
 # CONFIG_CMD_IMI is not set

diff --git a/configs/omap3_evm_quick_mmc_defconfig b/configs/omap3_evm_quick_mmc_defconfig
index 3385d67c00ce9036b8c66e8f17eac56af7f8006c..801c9596c0750053563c6b38595df94d4f2d2233 100644 (file)
--- a/configs/omap3_evm_quick_mmc_defconfig
+++ b/configs/omap3_evm_quick_mmc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_OMAP3_EVM_QUICK_MMC=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=0
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set

diff --git a/configs/omap3_evm_quick_nand_defconfig b/configs/omap3_evm_quick_nand_defconfig
index b53a9c24d3cb55602ea265424a242a5b9d436643..8815fca5365e9dc877754a1d7c4bd5e557e4ac5a 100644 (file)
--- a/configs/omap3_evm_quick_nand_defconfig
+++ b/configs/omap3_evm_quick_nand_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_OMAP3_EVM_QUICK_NAND=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=0
 CONFIG_SYS_PROMPT="OMAP3_EVM # "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set

diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig
index 5f0dece597d1d9f0aeede8ce3c9b227adecf1cb2..e446586dcbaf37b25dfe37bf1a2b82f1aa7a077d 100644 (file)
--- a/configs/omap3_ha_defconfig
+++ b/configs/omap3_ha_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_TAO3530=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig
index 4d5e8a0c9e34041b6fb227664c09faa1baeaf012..51dc1dba355b56a159386ebd2fdcdd555e7ac4ab 100644 (file)
--- a/configs/omapl138_lcdk_defconfig
+++ b/configs/omapl138_lcdk_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_DAVINCI=y
 CONFIG_TARGET_OMAPL138_LCDK=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 700192132e06374e3f1e8f0bf005bc2fbaa58949..2f4035541ee039dc2e64dc216e229a2fe5be933c 100644 (file)
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_OPENRD=y
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index fd53c783fc7356774607c9a2cb9d9fa270b01766..336104e695dba6173e366055eff23ab528b145bf 100644 (file)
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_OPENRD=y
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 52b9a5b74a277b8a88c3dea4ddf011a03230ce28..11a49fe579caad190fe4ad9330667f7836b2fd3a 100644 (file)
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_OPENRD=y
 CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y

diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig
index c604340d079993d81b0667fb82df18ad2dc26a84..0af6a0bf2423304722aa283ed9d506b982f3fbbf 100644 (file)
--- a/configs/ot1200_defconfig
+++ b/configs/ot1200_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_OT1200=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
index b5791ad449024be9caa292ae6476b07c50430112..28bc9ba954cd3d7eeecdeb5063fe9b80dd05d69a 100644 (file)
--- a/configs/ot1200_spl_defconfig
+++ b/configs/ot1200_spl_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_OT1200=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/pcm030_LOWBOOT_defconfig b/configs/pcm030_LOWBOOT_defconfig
index dbfaea1d902bcdea3839be1a2f753ab40bad80a5..6205aa3bd2cc4c2278b36f3acdcd1e9cdf1e2593 100644 (file)
--- a/configs/pcm030_LOWBOOT_defconfig
+++ b/configs/pcm030_LOWBOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC5xxx=y
 CONFIG_TARGET_PCM030=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFF000000"
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/pcm030_defconfig b/configs/pcm030_defconfig
index 6d2588498ef06b802723908a6c2ea05fa32cb82a..994a369991f8ae84096cadcbafa0969e624cb13c 100644 (file)
--- a/configs/pcm030_defconfig
+++ b/configs/pcm030_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_PCM030=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="uboot> "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index db8ebdd620fd61edcb554082797da54dc89e0bb8..5d30f30bb8c1d6f1549a7706c8e3c69f87d09203 100644 (file)
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="pcm052"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg,ENV_IS_IN_NAND"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/pdm360ng_defconfig b/configs/pdm360ng_defconfig
index c3521955eef91530ec2fac5e95c9235bb1c468a2..f3de685392c8ecbf0aed7fdc052f3d7af52ff46d 100644 (file)
--- a/configs/pdm360ng_defconfig
+++ b/configs/pdm360ng_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_PDM360NG=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index 9547d4891b024ccaa5943eaedfbe7a466e8bfb34..d5e9408260b990837f62f63da6235e569b8d2542 100644 (file)
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -6,6 +6,7 @@ CONFIG_MACH_PIC32=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="dask # "
 # CONFIG_CMD_IMLS is not set
@@ -42,6 +43,5 @@ CONFIG_DM_USB=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_PIC32=y
 CONFIG_USB_STORAGE=y
-CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y

diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index d46cd3bfa8b6726c8d399a329c5d6d31ce62ed5c..ab9c9f1357dfce45b66fcd84fcda8e053f092714 100644 (file)
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig
index 723466f694e99c8ca42a3ca3a30a2adc2af96274..f7069e90c1c4ffe8fb42f1fa9393b73d61f7d6b3 100644 (file)
--- a/configs/picosam9g45_defconfig
+++ b/configs/picosam9g45_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_PICOSAM9G45=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index 9676a99a2732936d480781929473dafc034140ae..08efb3a56f8966606a01f6d2fda6fbd9027dfedd 100644 (file)
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_PLATINUM_PICON=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6DL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="picon > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index f3de3fcf723ebfb0067fe843adde933bedf001e5..00e227f092338093e53e889e40596b7a88a94086 100644 (file)
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_PLATINUM_TITANIUM=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="titanium > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index cb10fa37009e15224d34e3789214f372e773dc5f..2062dcd3fc337e53b90a8291b4c940ff397e3d75 100644 (file)
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_PM9261=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="pm9261> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 37629ba0f5be1a931161f6459838c3e9acb394d0..e6ebd9b7839af49e21fa44fc1cdb3bd4b953a527 100644 (file)
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_PM9263=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="u-boot-pm9263> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig
index 0949e1f6216da25b3e0bf8dbe54c9631d7e894eb..aea412ce5dfa60af00d8cc544770463e0166aa3f 100644 (file)
--- a/configs/pm9g45_defconfig
+++ b/configs/pm9g45_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_PM9G45=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index 2b3b4c84b8d7f09618474c64578cf2a30b4bfdc9..bd4db7165e98957d56bad2ea0ed5d2410dcecd36 100644 (file)
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_POGO_E02=y
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="PogoE02> "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 2f819f50354dce5458cafcef244779abc3124cef..a587ed5ab2c4ae35d3292b19d1b225eade588eb0 100644 (file)
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_PORTER=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 86556650a9b03f612be838fc853b068881708c41..f34af4321dc8f8f9366cca8df7c60cc693825772 100644 (file)
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -1,7 +1,11 @@
 CONFIG_ARM=y
 CONFIG_TARGET_PXM2=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50"
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y
@@ -24,6 +28,9 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig
index f7f3fb009e43ac60e3270b505474e4588bb8d678..038eb39100679739b55f64ce65706d25495a276d 100644 (file)
--- a/configs/qemu-ppce500_defconfig
+++ b/configs/qemu-ppce500_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 45bb3ec0e9e9f3656fbf28070caed21983abf118..a03cff8e3fa9535c554b3ccad59f11991e3e0a9b 100644 (file)
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -28,6 +28,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
 CONFIG_CPU=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y

diff --git a/configs/qemu_mips64_defconfig b/configs/qemu_mips64_defconfig
index 0826a0ca888d0b646f0a2c4eff3e9ad7488cdf5b..b013a17f9da4dd8191f15380c191f4b8a53d6763 100644 (file)
--- a/configs/qemu_mips64_defconfig
+++ b/configs/qemu_mips64_defconfig
@@ -1,6 +1,7 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_QEMU_MIPS=y
 CONFIG_CPU_MIPS64_R1=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="qemu-mips64 # "
 # CONFIG_CMD_LOADB is not set
@@ -11,4 +12,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/qemu_mips64el_defconfig b/configs/qemu_mips64el_defconfig
index f70ebc30b1881405a3f0ff6d3249438105c62c3c..bffa1a38cb18fd3e22e89e1f11990318991c7353 100644 (file)
--- a/configs/qemu_mips64el_defconfig
+++ b/configs/qemu_mips64el_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_QEMU_MIPS=y
 CONFIG_SYS_LITTLE_ENDIAN=y
 CONFIG_CPU_MIPS64_R1=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="qemu-mips64el # "
 # CONFIG_CMD_LOADB is not set
@@ -12,4 +13,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/qemu_mips_defconfig b/configs/qemu_mips_defconfig
index bb097966e8ce5e8fad8f8c9feaf5f4b2ee53ba0b..9cab7dd43ef15f845b304eec894d9aff6243f207 100644 (file)
--- a/configs/qemu_mips_defconfig
+++ b/configs/qemu_mips_defconfig
@@ -1,5 +1,6 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_QEMU_MIPS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="qemu-mips # "
 # CONFIG_CMD_LOADB is not set
@@ -9,4 +10,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/qemu_mipsel_defconfig b/configs/qemu_mipsel_defconfig
index 19e6c7d7ad52201d4819ea612997362fda557159..b9226a8d4eba6de835d4498d2360f7c10f554009 100644 (file)
--- a/configs/qemu_mipsel_defconfig
+++ b/configs/qemu_mipsel_defconfig
@@ -1,6 +1,7 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_QEMU_MIPS=y
 CONFIG_SYS_LITTLE_ENDIAN=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="qemu-mipsel # "
 # CONFIG_CMD_LOADB is not set
@@ -10,4 +11,3 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/r0p7734_defconfig b/configs/r0p7734_defconfig
index 52149239d70ac453fed4e368091e9823668d9b49..5f77e05348728fcfe030c37d848bbd66f3b4ce1d 100644 (file)
--- a/configs/r0p7734_defconfig
+++ b/configs/r0p7734_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_R0P7734=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index bd553be6a98f1b48f2cc91a78846cc800b97ac4d..1c1e3041d758fe03493244a6db838ac3d1afe88a 100644 (file)
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_R2DPLUS=y
+CONFIG_BOOTDELAY=-1
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y

diff --git a/configs/r7780mp_defconfig b/configs/r7780mp_defconfig
index ad6f2f08150d335366976b3270851e974b3dfb19..fbf2dd51cf27ccb63c8376fb57a60d6e6ab2e173 100644 (file)
--- a/configs/r7780mp_defconfig
+++ b/configs/r7780mp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_R7780MP=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/rainier_defconfig b/configs/rainier_defconfig
index 27998f38f8a891fc0d2a93d3292ca9dcce57be1d..093207ce4ce1f308b0370df537e4dd56b49aa100 100644 (file)
--- a/configs/rainier_defconfig
+++ b/configs/rainier_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_SEQUOIA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAINIER"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/rainier_ramboot_defconfig b/configs/rainier_ramboot_defconfig
index 6ebdb380ca11fc715dec7df8427e054fcc2ba633..a7879aef5d761cd23045875e5274db3e918e5d40 100644 (file)
--- a/configs/rainier_ramboot_defconfig
+++ b/configs/rainier_ramboot_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_SEQUOIA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index ec89f050c7be852b5495f3cbbbd4babe3d604e83..901547b5542dbffb01e3e4dccef2215cbf468b81 100644 (file)
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -1,6 +1,10 @@
 CONFIG_ARM=y
 CONFIG_TARGET_RASTABAN=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y
@@ -22,6 +26,9 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/redwood_defconfig b/configs/redwood_defconfig
index 89c129f8feb004989536138051c2c440bedd58f7..1cf4832c187f44c867999a93483722abcbcbe47f 100644 (file)
--- a/configs/redwood_defconfig
+++ b/configs/redwood_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_REDWOOD=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/rsk7264_defconfig b/configs/rsk7264_defconfig
index 272bd863e804bd06150b0498fa723ad637e44278..9cc5a201f267e273af77052ec459f67686cc40b6 100644 (file)
--- a/configs/rsk7264_defconfig
+++ b/configs/rsk7264_defconfig
@@ -1,4 +1,5 @@
 CONFIG_SH=y
 CONFIG_TARGET_RSK7264=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/rsk7269_defconfig b/configs/rsk7269_defconfig
index 41e70a5c58799994f7f61fa98906ba19a801e448..58a5644275401c02c64bb5d56c758fdb7ac437a1 100644 (file)
--- a/configs/rsk7269_defconfig
+++ b/configs/rsk7269_defconfig
@@ -1,4 +1,5 @@
 CONFIG_SH=y
 CONFIG_TARGET_RSK7269=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 406eaf33db6db6df49f4fedd9d89032bfecb41b1..1d04f761f553a4f3f474aea8df02cedde15fbf6d 100644 (file)
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -1,7 +1,11 @@
 CONFIG_ARM=y
 CONFIG_TARGET_RUT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-rut"
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y
@@ -24,6 +28,9 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig
new file mode 100644 (file)
index 0000000..847de63
--- /dev/null
+++ b/configs/s32v234evb_defconfig
@@ -0,0 +1,6 @@
+CONFIG_ARM=y
+CONFIG_TARGET_S32V234EVB=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/s32v234evb/s32v234evb.cfg"
+CONFIG_CMD_BOOTZ=y
+CONFIG_OF_LIBFDT=y

diff --git a/configs/sama5d2_ptc_nandflash_defconfig b/configs/sama5d2_ptc_nandflash_defconfig
index 74251840fcec6e71ad9b577202d2760f43fa79c4..fce501b32e6eb6d7caecef762521a442fb58684b 100644 (file)
--- a/configs/sama5d2_ptc_nandflash_defconfig
+++ b/configs/sama5d2_ptc_nandflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D2_PTC=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/sama5d2_ptc_spiflash_defconfig b/configs/sama5d2_ptc_spiflash_defconfig
index 27fc394d42ab93236bce42b39144af41365dfc72..c090264e752158013d34fc029b3b1b3a5c15461c 100644 (file)
--- a/configs/sama5d2_ptc_spiflash_defconfig
+++ b/configs/sama5d2_ptc_spiflash_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D2_PTC=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_LOADS is not set

diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 1880256125b4788be75a787bed1dcf6b5cb21b01..9ca2a9c5e9ff1ba8fd517b01378d0cddebd2c9f9 100644 (file)
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D2_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -21,4 +23,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index de8f4d9256b85c446e09d10704ca691ee08241fe..617d73a77ee4de6c2edbdd2093dcb93a562a33e9 100644 (file)
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D2_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -21,4 +23,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index 1dabc5f49d51a0c6e836a5816f68c745beefbfde..db6592ac067bf14d9a899227f9a8932f934ead49 100644 (file)
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D3_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -19,4 +21,3 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 458a486acde35b9555043f39350e961c752635d9..d70c3b78a94feb2ca4c12cc1bf13e86fe1af3c9e 100644 (file)
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D3_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -19,4 +21,3 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 488d950fecb74bd828114e74bd288a74a01183e6..5738d2a6a56b4cbed507384d5f2ed5af6f858758 100644 (file)
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D3XEK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -21,4 +23,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 12f28f20131e36b36289bdc16b8f2ad66bffb68a..93aef74e3f06cae9518f4e333d2e8d30cb2d8501 100644 (file)
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D3XEK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -21,4 +23,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 42fcc1ed0ae52b97c9228f49cc49e6841e27e1bb..a938fe79654db95e5ab8791ae6fd7f9326ad531f 100644 (file)
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D3XEK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -21,4 +23,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index 3110269a760b83c601b722597a590270475f3ebf..74e208769f4c7bc208c1138de5f17c89dcc90ad1 100644 (file)
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 3ea4bd7f327ffbbeb4acb3a5c9c28253a9671acc..3af7ed48d1fdc98bde33e9e7fd303b6d02b6164c 100644 (file)
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index dbec4ad3e454ad1783d3d86f49a36bb4f64dfc6a..0e037c3db3ee2a25e0af28ebf30c8665903c5259 100644 (file)
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4_XPLAINED=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index f2a5844385d65050dc9f486c4bb021c88e9da56a..981132664216307d34dc299b3cf02c0e2f49f4b3 100644 (file)
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4EK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 58186cec624e6c85e1ec22474177109b63c4144a..37b080aadea1627c1df54fe99e795c28ecb81ea6 100644 (file)
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4EK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index ab23e950f746b917728fdfe528b36c5ae705e381..ba939b103b07768d25b9d68374c5d1af41877780 100644 (file)
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -2,7 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SAMA5D4EK=y
 CONFIG_SPL=y
+CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -22,4 +24,3 @@ CONFIG_USB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
 CONFIG_OF_LIBFDT=y
-CONFIG_FIT=y

diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index 9dd60b7b0badd3585b07e1d2ad88049d33ca4316..16f61de521710eaf2ad3cd6e936fc78f77a8aa63 100644 (file)
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SANSA_FUZE_PLUS=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_MEMTEST=y

diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index 60bb817180d30bfec896fcc1720834f14ffec247..7231b60274cc4a6ed0c2288e377ab0969ef48fef 100644 (file)
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8349=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_33M"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index 6c0fd99f0773b86681f2084db4223288d4830e9a..bf125a56233fc4e197055923df0d77c54a6d0e3d 100644 (file)
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8349=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,PCI_66M"
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index e22c70ad3d1c82f37d299c10ca3f5d6dc68905e7..daa2313f394ab071a9082cc1e1604d7645e7fd8a 100644 (file)
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_SBC8349=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig
index 6d5b3f6c467ba07a2a4ad70b3a858b2a788eb5fa..c5fc4a0e04667949ea1d37d2e01b51a346701c69 100644 (file)
--- a/configs/sbc8548_PCI_33_PCIE_defconfig
+++ b/configs/sbc8548_PCI_33_PCIE_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8548=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,33,PCIE"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig
index 8ecb12661a91cecb744bc271a2d4d70beb2cb75e..1fd17cabb4931ff2b538bbd429f0ccecd3a29f22 100644 (file)
--- a/configs/sbc8548_PCI_33_defconfig
+++ b/configs/sbc8548_PCI_33_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8548=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,33"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig
index bbea0cb4c37fc4a4048d5578718a53c4d6314973..5396e5aa8e84185c08c9063fcedc057f418bad26 100644 (file)
--- a/configs/sbc8548_PCI_66_PCIE_defconfig
+++ b/configs/sbc8548_PCI_66_PCIE_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8548=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,66,PCIE"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig
index f146b2d8462f1e6a637e38b3438220ca119b2176..ffde0564b35e5a053711ce9f653cf90a1ef0ccfe 100644 (file)
--- a/configs/sbc8548_PCI_66_defconfig
+++ b/configs/sbc8548_PCI_66_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SBC8548=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCI,66"
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig
index 3dea198cb653f837c64636fb39c45bc86a03fb4c..a8a8a93ee11913e56fa2c8513074376002428d25 100644 (file)
--- a/configs/sbc8548_defconfig
+++ b/configs/sbc8548_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_SBC8548=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig
index ad384579918c86dcdb77ed0c2f7c93823d604a45..a382794dad3b82843f6d0e8e238bb584760e99f1 100644 (file)
--- a/configs/sbc8641d_defconfig
+++ b/configs/sbc8641d_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC86xx=y
 CONFIG_TARGET_SBC8641D=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig
index 4b73506c9898449a0d2b9672df1e31a386719b88..a3bf903ff187f6ef1ac74299524330e5db32b584 100644 (file)
--- a/configs/sc_sps_1_defconfig
+++ b/configs/sc_sps_1_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SC_SPS_1=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig
index 2c5771473fd219d219d83a5e20450f431b09b4b2..3e9e329e7e5a4cd473864d5a61521be6316f472d 100644 (file)
--- a/configs/secomx6quq7_defconfig
+++ b/configs/secomx6quq7_defconfig
@@ -5,6 +5,7 @@ CONFIG_SECOMX6_UQ7=y
 CONFIG_SECOMX6Q=y
 CONFIG_SECOMX6_2GB=y
 CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SECO MX6Q uQ7 U-Boot > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/sequoia_defconfig b/configs/sequoia_defconfig
index 66d6a1aba33b427e8ccd4e65c900493d6df811ad..8619c57f8f02205a8ee080e07b76b07b4b15d761 100644 (file)
--- a/configs/sequoia_defconfig
+++ b/configs/sequoia_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_SEQUOIA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/sequoia_ramboot_defconfig b/configs/sequoia_ramboot_defconfig
index 5c548ff2799df28003c1f2cfa6180fc36b96c590..81cda465a46428880ba412b3a43c985f0799d911 100644 (file)
--- a/configs/sequoia_ramboot_defconfig
+++ b/configs/sequoia_ramboot_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_SEQUOIA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index 07594d1abb2a408baaf4dea20358bdac3683f9ad..f7e055b92232abb5306433cc8654041c2430ff44 100644 (file)
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SH=y
 CONFIG_SH_32BIT=y
 CONFIG_TARGET_SH7752EVB=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 5e7a9c9e048d1cbbf28b8972c9cf5ec5b7e40ede..fc6c7b164440c3ea10bd0013720aa75129aac0f4 100644 (file)
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_SH7753EVB=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index fafba4ce82d6a862db4a63d419d08041026914eb..b0d3f28591f40c9ee387995d25fcbf42d2f14bd4 100644 (file)
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SH=y
 CONFIG_SH_32BIT=y
 CONFIG_TARGET_SH7757LCR=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig
index cc20fbdc202dbbce9c154dd6462ac266a7292298..41d2b55a108ace052b7e4b56dcaaafd20b0bf30d 100644 (file)
--- a/configs/sh7763rdp_defconfig
+++ b/configs/sh7763rdp_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_SH7763RDP=y
+CONFIG_BOOTDELAY=-1
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sh7785lcr_32bit_defconfig b/configs/sh7785lcr_32bit_defconfig
index cc31e1cb4dc119cce5f8190aa6814bbe1c4f82ab..d98e073e069e003ccb2a320a00722a5b8d043ab4 100644 (file)
--- a/configs/sh7785lcr_32bit_defconfig
+++ b/configs/sh7785lcr_32bit_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SH=y
 CONFIG_SH_32BIT=y
 CONFIG_TARGET_SH7785LCR=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sh7785lcr_defconfig b/configs/sh7785lcr_defconfig
index d7724b30d67a4ba8273274a6c9929c02aa2759c3..368cb3027b356040090c3456503755c8bea1181b 100644 (file)
--- a/configs/sh7785lcr_defconfig
+++ b/configs/sh7785lcr_defconfig
@@ -1,5 +1,6 @@
 CONFIG_SH=y
 CONFIG_TARGET_SH7785LCR=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 71ce49c568d105c29eb876c28fce3a47cc3f2f88..5cd37a430e3395472c271779c57e4d7c48012c0c 100644 (file)
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_KIRKWOOD=y
 CONFIG_TARGET_SHEEVAPLUG=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 0beef09f059ef71dbe1687deb518e1ddbc55a6a3..f5d7afde5810077735f3e8748f247ef38a112358 100644 (file)
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_SILK=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 2ec6e488681ddffe0505f995169129293950c369..1c29a290c06d967b3d855725f647d028c8e38802 100644 (file)
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SMARTWEB=y
 CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/smdk2410_defconfig b/configs/smdk2410_defconfig
index 702b36c012c92d7418e4e61dd0aa6ff10c63355c..4d40a29c14c5cdd2c5fe0e77aa52f3bf28f723ba 100644 (file)
--- a/configs/smdk2410_defconfig
+++ b/configs/smdk2410_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SMDK2410=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SMDK2410 # "
 CONFIG_CMD_USB=y

diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig
index a989e244a6de001dd1b277dea7911a5e3683e01d..0948534e89be5bfbe09e17aa1fc84765285d66c2 100644 (file)
--- a/configs/smdkc100_defconfig
+++ b/configs/smdkc100_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_S5PC1XX=y
 CONFIG_TARGET_SMDKC100=y
 CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SMDKC100 # "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index 2f8dd50ab393b5977c57c729bd2ef82117c93cf8..166fd2f0e9c60ace426b15f8bc80a4047eadb767 100644 (file)
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SNAPPER9260=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Snapper> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index f72569323ec376432c992a7ad9069e03190ad17b..3cfe694d0645ce165ed8de4d9d3f496d18e10089 100644 (file)
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_SNAPPER9260=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set

diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index ec40ec72dca2e3a9e9dd40c2b6d726fee0ca7fd4..2478ae571db84cd1c6fb472ecc82633afa67fd7f 100644 (file)
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -55,3 +55,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="altera"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 8e5c527ac2f7ecbc1193689b50a4ad44c692a60c..1619b86a9f02693a0384fb7ce88bb94a4e79f7a6 100644 (file)
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -55,3 +55,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="altera"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 034a215361005fbe233b32973d563362dcb293b5..43d939bbd18278fea62a16e7a8caa8a7816c31b2 100644 (file)
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -49,3 +49,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="terasic"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 133a6eba2afe3c0d40f7acaf3a24b3345a47a50d..c5c662b47e5e64d545278602f2d04b30e49bbd6b 100644 (file)
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -49,3 +49,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="denx"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 8b1bcfcee617105fd31147d459b94858d9938e01..1c4a40dd0eb9ae3e1a57121d5db8eb8e177814fc 100644 (file)
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -55,3 +55,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="terasic"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 56284a1c0a7d3eb0e4f939e62e127ba11fb5b3cd..e34d13e39af28061062deb17b2b1c20b694fb870 100644 (file)
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -55,3 +55,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="ebv"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index d66f7c605ed7f2fa139797c19c2496eecca9a3ff..d1cfbcd7f85a8e6b186a14a709b5f353f4d28c95 100644 (file)
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SR1500=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -44,3 +44,4 @@ CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SYS_NS16550=y
 CONFIG_CADENCE_QSPI=y
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 6ce4defca43a81adb66db8c0dc582621fb949091..80552a5be26ce0703ccf1d943bc3105ea5ba558f 100644 (file)
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_USE_TINY_PRINTF=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
@@ -11,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga"
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -55,3 +55,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="samtec"
 CONFIG_G_DNL_VENDOR_NUM=0x0525
 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
+CONFIG_USE_TINY_PRINTF=y

diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index aa4bbb62cc510614d11c4e3fedc3a554e67f68ea..aaf5873df88ab5fda957913795382de72aaa45f0 100644 (file)
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_SOCRATES=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y

diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig
index db3b6ea6c507c804fb060d650b418ca8784e2aae..2ef309cbe585a957a372feb1a6db7fd7b5347c51 100644 (file)
--- a/configs/spear300_defconfig
+++ b/configs/spear300_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR300=y
 CONFIG_SYS_EXTRA_OPTIONS="spear300"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig
index ea4e8d772a3b7c18d65b1ba283cd94095989848e..611631edd367caba880f1496cfa16a977e7181a0 100644 (file)
--- a/configs/spear300_nand_defconfig
+++ b/configs/spear300_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR300=y
 CONFIG_SYS_EXTRA_OPTIONS="spear300,nand"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig
index a2b56f384a0faafd5078293746827bbeb563311f..53384182703da67be1583831bccd8de1c16a0115 100644 (file)
--- a/configs/spear300_usbtty_defconfig
+++ b/configs/spear300_usbtty_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR300=y
 CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig
index 173848959d6b8cfad972089df9858f3babe0b5ac..d525edf687ad0ce0be6a28a8c6e873390e1b9cdc 100644 (file)
--- a/configs/spear300_usbtty_nand_defconfig
+++ b/configs/spear300_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR300=y
 CONFIG_SYS_EXTRA_OPTIONS="spear300,usbtty,nand"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig
index a6064a5d90df1261e4e1db2b9b3a82f09e8ca767..3f20387c914da9cc49d6f3d11f3fc82009289c47 100644 (file)
--- a/configs/spear310_defconfig
+++ b/configs/spear310_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig
index 85944c68f15ab053e66444cc8e2002558b138f65..2feb9ccfbf058255c2b9af53a499e8f437e0c9ce 100644 (file)
--- a/configs/spear310_nand_defconfig
+++ b/configs/spear310_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310,nand"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig
index 48efe3d948fca128c3e04f3f8ad8b0b9fb65210d..4ab49d92f5d68d43cf97fdf44c5ae9d0a838d9cb 100644 (file)
--- a/configs/spear310_pnor_defconfig
+++ b/configs/spear310_pnor_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310,FLASH_PNOR"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig
index 8edbe0c257aceb90e4b1a66151e6ae28e6b5efa4..299cf6dcda47788ce0c1842a2c37abb49a76ba79 100644 (file)
--- a/configs/spear310_usbtty_defconfig
+++ b/configs/spear310_usbtty_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig
index b622f742dbfcbcb2a46c5c51ac86801000039bc7..9ac10f26afe7bf12262af2c06bbb9326121a0cce 100644 (file)
--- a/configs/spear310_usbtty_nand_defconfig
+++ b/configs/spear310_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,nand"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig
index 241a72acf538d73745d4b774836f4c4c09c70d90..f582b4695ae129076ee3201d45ed5cf60a61534a 100644 (file)
--- a/configs/spear310_usbtty_pnor_defconfig
+++ b/configs/spear310_usbtty_pnor_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR310=y
 CONFIG_SYS_EXTRA_OPTIONS="spear310,usbtty,FLASH_PNOR"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig
index 49d7c0439577888c211c5838678585c4bd55e090..4b4f2f6f96246c9e07098a254f052bfb14cbf12e 100644 (file)
--- a/configs/spear320_defconfig
+++ b/configs/spear320_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig
index 70b3025fc52811c76b885a66d1f52337646eb0b0..7308879c92c57e6a8820492ca3767be8d00499af 100644 (file)
--- a/configs/spear320_nand_defconfig
+++ b/configs/spear320_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320,nand"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig
index 5ced0e17bd46f5b4414039493af2dd9c15844021..fdffa976976873d2cfe3fe61191347010cafb47a 100644 (file)
--- a/configs/spear320_pnor_defconfig
+++ b/configs/spear320_pnor_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320,FLASH_PNOR"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig
index de75b17df51df5dc56b9a5f0817368a705092f4a..ee873e95d0ddcd8f8ed93a781ec10d2752522583 100644 (file)
--- a/configs/spear320_usbtty_defconfig
+++ b/configs/spear320_usbtty_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig
index 2202d2eaf41b9d4faf1237f0c93ed048101c5bf6..a5874705287dbfb95d94ce5a2907bf9e2db518f1 100644 (file)
--- a/configs/spear320_usbtty_nand_defconfig
+++ b/configs/spear320_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,nand"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig
index 35bb0364af6790f3d26b3c8466047facb7ff786e..a65dc1118ec1ac6641d03d4222d070ae9d16ccb8 100644 (file)
--- a/configs/spear320_usbtty_pnor_defconfig
+++ b/configs/spear320_usbtty_pnor_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR320=y
 CONFIG_SYS_EXTRA_OPTIONS="spear320,usbtty,FLASH_PNOR"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index f54083984b28b212dc9b6d57a78a3cd69103d566..623800c1a94160afd20ac5691e0b7b53dbf759b2 100644 (file)
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR600=y
 CONFIG_SYS_EXTRA_OPTIONS="spear600"
+CONFIG_BOOTDELAY=1
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index de416d91a8f93eaa6e34c657d98bf6c398f8a19a..8da9b34c2f3fc42da9de2e573897d83d81b36a14 100644 (file)
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR600=y
 CONFIG_SYS_EXTRA_OPTIONS="spear600,nand"
+CONFIG_BOOTDELAY=1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index 8b6e0d0acd5a51740785bf95e0de60b5ca70907d..68b11ccf31969340cd809484852b2638627241b1 100644 (file)
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR600=y
 CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index e8b4b0a6590c8ff2090ed74d7827f3db0d82b6e0..776c6110621ade87ae914ffcb80844f71acad804 100644 (file)
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_SPEAR600=y
 CONFIG_SYS_EXTRA_OPTIONS="spear600,usbtty,nand"
+CONFIG_BOOTDELAY=-1
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index 86dfd0e83fa3a97bc100b38dd01bac0a64352fa9..ae9976bb6e8f615847401ae3f4a263fa1ff92b51 100644 (file)
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_STM32=y
 CONFIG_STM32F4=y
 CONFIG_TARGET_STM32F429_DISCOVERY=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 00482269c25f2fe623029c765c10f9e50be17b50..e3e6333add6e57536e00b93f53a09ea9fe6db9a5 100644 (file)
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_STM32=y
 CONFIG_STM32F7=y
 CONFIG_TARGET_STM32F746_DISCO=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index a8f59ca86c7c88a0ef2a7319b9a8a900bb584446..9073c1787555ccacc92d5115192e8e1b0c1bb76b 100644 (file)
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_RMOBILE=y
 CONFIG_TARGET_STOUT=y
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
 # CONFIG_CMD_BOOTD is not set

diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index 985aab8da23900fa5422b22a11535c7ea94c2298..6253615eb573bc687d26754a968faf3a81a6e38f 100644 (file)
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index b7a16b7a381dae32dadf7d6f8da8050aaeaf6e65..3d325f43466960241f9e093187352ac178b1477e 100644 (file)
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON_DP"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index 2766104a4c68149b5b350a7c68d71bcac090b200..160df247f1bb22f13c8f3fb0f027f999ac4ddc9f 100644 (file)
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CPU"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index db75c0d2d6185bb99c211b98eef2dab2a29705ab..2a2733dfbaa8173c0df774ac212ef671509d4119 100644 (file)
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CPU,STRIDER_CPU_DP"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_STOP_STR=" "

diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 6a3b5b83571c18b21739ce46ec2cf6f25dd9ecc0..40ca293bad3fdd5a970622969be6da9d48b123fa 100644 (file)
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_STV0991=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="stv0991"
 CONFIG_SYS_EXTRA_OPTIONS="stv0991"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="STV0991> "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"

diff --git a/configs/sycamore_defconfig b/configs/sycamore_defconfig
index 9fdb2b37225c41671edf774a859a7d392713e2c2..5f7b40d8963545a8a9e2d1ec86dc857036306e5e 100644 (file)
--- a/configs/sycamore_defconfig
+++ b/configs/sycamore_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_WALNUT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/t3corp_defconfig b/configs/t3corp_defconfig
index c5562c936d2de4cb3626a295086197ee615ff4c9..750599689f0021c4769cc35840eb406166828671 100644 (file)
--- a/configs/t3corp_defconfig
+++ b/configs/t3corp_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_T3CORP=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig
index 6d0877d165a4d008499f3c40e5c0897b2f9abf85..4ee5737ccce717e386f8f927652814dbb453edd6 100644 (file)
--- a/configs/tao3530_defconfig
+++ b/configs/tao3530_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_TAO3530=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="TAO-3530 # "
 # CONFIG_CMD_IMI is not set

diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 20f33a8528955abeb33f1ab4831e4ad84a154e95..e566f7f023a10625984a956f0e221c68f1f2cf17 100644 (file)
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_AT91=y
 CONFIG_TARGET_TAURUS=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig
index 83b1b56c5703d501229169f7e3db1809e283b794..2d157b2b3ea98505b9d429a7584416d0a5e39ae7 100644 (file)
--- a/configs/tb100_defconfig
+++ b/configs/tb100_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_SYS_CLK_FREQ=500000000
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100"
+CONFIG_BOOTDELAY=3
 CONFIG_SYS_PROMPT="[tb100]:~# "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index dc69b39fecd42fe0171e29beae0516db5c7f7c05..3fb04b70ba3f3c9237894541804ce8c580ab421d 100644 (file)
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TBS2910=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Matrix U-Boot> "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/tcm-bf518_defconfig b/configs/tcm-bf518_defconfig
index cc46a52289d2081c92594ec6f478f86fb37d9049..fd31cfc30c3756cd3ded2c58f4fa46f18ab6c90a 100644 (file)
--- a/configs/tcm-bf518_defconfig
+++ b/configs/tcm-bf518_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_TCM_BF518=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_GPIO=y

diff --git a/configs/tcm-bf537_defconfig b/configs/tcm-bf537_defconfig
index 576dc6a2108891bfc1f4473a3bcca4c9d494e57d..d66e4993a9932ed506c3f9dc3e560a141083c898 100644 (file)
--- a/configs/tcm-bf537_defconfig
+++ b/configs/tcm-bf537_defconfig
@@ -1,5 +1,6 @@
 CONFIG_BLACKFIN=y
 CONFIG_TARGET_TCM_BF537=y
+CONFIG_BOOTDELAY=5
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_I2C=y

diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 83587575c5040c905f90ca152852f44f3cf61593..05368bdfa08b98250aed1675561e06e1c70aee18 100644 (file)
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig
index 157985f34bdec047345cf95db53bd29ad76b43cb..17bf8cd78e754d992b7a32457e1fe2a0b32c8321 100644 (file)
--- a/configs/theadorable_defconfig
+++ b/configs/theadorable_defconfig
@@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index f9391f2f11bd5103a4e29a4ff7b4c32f6579fc73..5fcffa23909bbf3c9634cdab598f0971a9f5ee8e 100644 (file)
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -1,6 +1,10 @@
 CONFIG_ARM=y
 CONFIG_TARGET_THUBAN=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DM_SERIAL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-draco"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 CONFIG_AUTOBOOT_KEYED=y
@@ -22,6 +26,9 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig
index cb33f601bb6bcc715a91cc20f8fceba897a4bc9b..4a8655f9bb513d5b04c35c8682f17f9041ada37e 100644 (file)
--- a/configs/thunderx_88xx_defconfig
+++ b/configs/thunderx_88xx_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_THUNDERX_88XX=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
 CONFIG_SYS_EXTRA_OPTIONS="ARM64"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ThunderX_88XX> "
 # CONFIG_CMD_IMLS is not set
@@ -22,4 +23,3 @@ CONFIG_DEBUG_UART_BASE=0x87e024000000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_REGEX=y
-CONFIG_BOOTP_VCI_STRING="Diagnostics"

diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index e41e2a49a69be902165fbdbf3385ed87f9c26d35..ef9c0748c97023a0f664ddcf978f1e19f34f2d04 100644 (file)
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_TI814X_EVM=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot# "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig
index 4eb79237233a7823662a3b283c835acec9f228dc..c4240e900a1c825aa5fdb9b5625710f235827e53 100644 (file)
--- a/configs/ti816x_evm_defconfig
+++ b/configs/ti816x_evm_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_TI816X_EVM=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot/ti816x# "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index 4d16ef6246c278ae580d579cda56c8a9a3f8bf50..57cf6707b3aa7c1f25c9d77ee185df5a53fd7661 100644 (file)
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_TITANIUM=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Titanium > "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index 3eec4c2db9498394cae545275c781ac5a12869df..a69c0b63b1248bca3ca1a74ce54302dfec767f41 100644 (file)
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -1,35 +1,24 @@
 CONFIG_MIPS=y
-CONFIG_ARCH_ATH79=y
-CONFIG_BOARD_TPLINK_WDR4300=y
-CONFIG_USE_PRIVATE_LIBGCC=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_SYS_NS16550=y
 CONFIG_DM_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_ARCH_ATH79=y
+CONFIG_BOARD_TPLINK_WDR4300=y
 CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300"
+CONFIG_BOOTDELAY=3
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_FPGA is not set
-CONFIG_CMD_NET=y
-CONFIG_CMD_NFS=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM_ETH=y
-CONFIG_AG7XXX=y
 CONFIG_CLK=y
-CONFIG_CMD_USB=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_ATH79_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
@@ -41,4 +30,13 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_DATAFLASH=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_DM_ETH=y
+CONFIG_AG7XXX=y
 CONFIG_PINCTRL=y
+CONFIG_SYS_NS16550=y
+CONFIG_ATH79_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y

diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index 22b16a153401ce289dbac581f6d5e56a45a9384d..aa1ecd84bbbfd206cbe2081b693c43f593ca35e9 100644 (file)
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_TQMA6=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index 715db215ad686aad57a295dc588bf8dfc244aaaf..f40b1dd5729a1b2284b8b9c599f6f114b8dfb4ae 100644 (file)
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -5,6 +5,7 @@ CONFIG_TQMA6X_SPI_BOOT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index 824cd2be88e67b5f7d6919769b79ccf636ca6ab9..eaea48394248fa9859402487bb1dc064eed841d8 100644 (file)
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -5,6 +5,7 @@ CONFIG_TQMA6S=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index 058bb89a1d43351e6ea852d5af2c868611978d6b..213dada7435e696dab59aa990bd8b3753124035b 100644 (file)
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -6,6 +6,7 @@ CONFIG_TQMA6X_SPI_BOOT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig
index e3489606ce51b8cd311aa89d984c96b1c5607c56..b44522b4c6302eb30fb49172f538e975bddd1672 100644 (file)
--- a/configs/tqma6s_wru4_mmc_defconfig
+++ b/configs/tqma6s_wru4_mmc_defconfig
@@ -6,6 +6,7 @@ CONFIG_WRU4=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Enter password in %d seconds to stop autoboot\n"

diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig
index 25c499a284e8606d1a07a72527a366ee3e52e636..2482888244921054606a9d36d96966784d82e1c7 100644 (file)
--- a/configs/tricorder_defconfig
+++ b/configs/tricorder_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_OMAP34XX=y
 CONFIG_TARGET_TRICORDER=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="OMAP3 Tricorder # "
 # CONFIG_CMD_IMI is not set

diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig
index 200fbe119f1dfc899922cf3e84b8b345051278b2..b285a811423fda7411a3a941bf8cec2cf396ff4c 100644 (file)
--- a/configs/tricorder_flash_defconfig
+++ b/configs/tricorder_flash_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_TRICORDER=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="FLASHCARD"
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
index 7d8953d421f467e9bbfca8e85b641ad77dc3d391..bd0540596a7ca9004e66387c25f86e9a03b876d2 100644 (file)
--- a/configs/ts4800_defconfig
+++ b/configs/ts4800_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_TS4800=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/tseries_mmc_defconfig b/configs/tseries_mmc_defconfig
index 4b4cfd20ff4e0a99bbe6e925df14e51e244fef22..337404bece09ee142c2cf952b3fcee4de36550ec 100644 (file)
--- a/configs/tseries_mmc_defconfig
+++ b/configs/tseries_mmc_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_TSERIES=y
 CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT"
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set

diff --git a/configs/tseries_nand_defconfig b/configs/tseries_nand_defconfig
index 1485aaa4cc6636a2ff53565da44caa5dde6c2800..4dc029679146f52ed16e47e93a1d6303b537993c 100644 (file)
--- a/configs/tseries_nand_defconfig
+++ b/configs/tseries_nand_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_TSERIES=y
 CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND"
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set

diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig
index a68cfac668e5ee81975f33a63b85226fe453d1e8..5b52bf658f27228e6c8b2572126998c7ffd35754 100644 (file)
--- a/configs/tseries_spi_defconfig
+++ b/configs/tseries_spi_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_TSERIES=y
 CONFIG_SPL=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT"
+CONFIG_BOOTDELAY=0
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set

diff --git a/configs/twister_defconfig b/configs/twister_defconfig
index ffbc025124195f15430977baa32e37ddd5263991..0e57f7c85223157a9595995b30465267642a1a63 100644 (file)
--- a/configs/twister_defconfig
+++ b/configs/twister_defconfig
@@ -3,6 +3,7 @@ CONFIG_OMAP34XX=y
 CONFIG_TARGET_TWISTER=y
 CONFIG_SPL=y
 CONFIG_FIT=y
+CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="twister => "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index 81c32cdee6b16d3119c370f06a2d8e6cf5a66596..3c75706fe829f19760bec0dd9ce9bf250fcaf740 100644 (file)
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_UDOO=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig
index ffcac79762a02b482f54c6bb8b2ee011e6caddd7..e7f9b15a216b5d287816be17a879f10a17883693 100644 (file)
--- a/configs/uniphier_ld11_defconfig
+++ b/configs/uniphier_ld11_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARCH_UNIPHIER_LD11=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld11-ref"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set

diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig
index cbc65ddc8d146ca978271bc8f0a7fffde7e27a9a..d073e3d127bb62a611c58b1f8fc01caa70df2fd1 100644 (file)
--- a/configs/uniphier_ld20_defconfig
+++ b/configs/uniphier_ld20_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARCH_UNIPHIER_LD20=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld20-ref"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set

diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 22615a647cc61b56ca0d356de544538aa017e041..04d651d358b38cbe33ff6c4c9a073a1e8a9db3cf 100644 (file)
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARCH_UNIPHIER_LD4_SLD8=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set

diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index 18f4caf33b51601b7931945f613368a06a5934f5..d5fc13829f581ae50355bf167849952fb08dbe02 100644 (file)
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-pro4-ref"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set

diff --git a/configs/uniphier_pxs2_ld6b_defconfig b/configs/uniphier_pxs2_ld6b_defconfig
index cf6d3e423106113b29b4eb7487de05061a9f96de..285ea98553cdbdc6d4155963012a85d3dc8ffcb0 100644 (file)
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARCH_UNIPHIER_PRO5_PXS2_LD6B=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-proxstream2-vodka"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set

diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index 0965019318a86d81260cab6a9c5a355cc986f0c3..13f31470f0efa670e98212a5e84fd9a5a61b7433 100644 (file)
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -4,6 +4,7 @@ CONFIG_ARCH_UNIPHIER_SLD3=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set

diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index fa5561aeb3e0c68ae356df7b7235cdffc6db766c..916a9c69221fef87e46e2473d23908b7fa90cf1d 100644 (file)
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_USB_A9263=y
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 # CONFIG_CMD_BDI is not set

diff --git a/configs/v38b_defconfig b/configs/v38b_defconfig
index 4dd26123ffcb706a0ed0b8d5a32efdbc76ccedcd..a54999c7ce879fb8b6d44a19044a5966106b49c1 100644 (file)
--- a/configs/v38b_defconfig
+++ b/configs/v38b_defconfig
@@ -1,6 +1,7 @@
 CONFIG_PPC=y
 CONFIG_MPC5xxx=y
 CONFIG_TARGET_V38B=y
+CONFIG_BOOTDELAY=3
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/vct_platinum_defconfig b/configs/vct_platinum_defconfig
index ed27d853c234f1143757dc832ecf273a39321e28..c65a20014ba512209c957224a9be5f3c86c4c578 100644 (file)
--- a/configs/vct_platinum_defconfig
+++ b/configs/vct_platinum_defconfig
@@ -1,6 +1,7 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUM=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -10,4 +11,3 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinum_onenand_defconfig b/configs/vct_platinum_onenand_defconfig
index 82708f0da2d8b58e12f344828307a4c3a25f3d83..23bfe4ad66a645f19bad4481e3f25eb0daa11051 100644 (file)
--- a/configs/vct_platinum_onenand_defconfig
+++ b/configs/vct_platinum_onenand_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUM=y
 CONFIG_VCT_ONENAND=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
@@ -13,4 +14,3 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig
index 7b379be2cce234979a33a6c3af44efeae36b3cd8..3306a45e48dc53109393ff0c560394a5054a6c3f 100644 (file)
--- a/configs/vct_platinum_onenand_small_defconfig
+++ b/configs/vct_platinum_onenand_small_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUM=y
 CONFIG_VCT_ONENAND=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -19,4 +20,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig
index 78d215d54ce4724b2e170740009fc80dec014b20..06476139ca536fb462c930b092a495bf4ec04e32 100644 (file)
--- a/configs/vct_platinum_small_defconfig
+++ b/configs/vct_platinum_small_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUM=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -16,4 +17,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinumavc_defconfig b/configs/vct_platinumavc_defconfig
index c47f1026dfcfb95832a0624311ed1d7df8eead3c..1660c662e83fc76a4055420d748b694708c92422 100644 (file)
--- a/configs/vct_platinumavc_defconfig
+++ b/configs/vct_platinumavc_defconfig
@@ -1,6 +1,7 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUMAVC=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="VCT# "
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set
@@ -8,4 +9,3 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_DHCP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinumavc_onenand_defconfig b/configs/vct_platinumavc_onenand_defconfig
index e7aef319c53c187595532d957828180a4b6225cf..55dfd4cd49baf9f970eb94ee8b4e54f40d60a55e 100644 (file)
--- a/configs/vct_platinumavc_onenand_defconfig
+++ b/configs/vct_platinumavc_onenand_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUMAVC=y
 CONFIG_VCT_ONENAND=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
@@ -11,4 +12,3 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_DHCP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig
index be70588cf001a9147af84aca1df36a81a0d6ad53..98b5ea217c6cd16a8c9011ada2dac8c72d536e9a 100644 (file)
--- a/configs/vct_platinumavc_onenand_small_defconfig
+++ b/configs/vct_platinumavc_onenand_small_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUMAVC=y
 CONFIG_VCT_ONENAND=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -19,4 +20,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig
index b7e0a782fb5d1099b6a218b24f829762bdb37900..f4a95493db42d789541ce98b35a46f6d61c4756f 100644 (file)
--- a/configs/vct_platinumavc_small_defconfig
+++ b/configs/vct_platinumavc_small_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PLATINUMAVC=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -16,4 +17,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_premium_defconfig b/configs/vct_premium_defconfig
index 29d16e3aa1045bc3438f40a33befe788fef019d0..f85deb38cf45e55640c5bad6bf38dd7077cf9c28 100644 (file)
--- a/configs/vct_premium_defconfig
+++ b/configs/vct_premium_defconfig
@@ -1,6 +1,7 @@
 CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PREMIUM=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -10,4 +11,3 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_premium_onenand_defconfig b/configs/vct_premium_onenand_defconfig
index 31b89e3718fa9cf1b828cb9c1f4ecec9734c24ba..11879e5bb9c8ad19af2fae63b3dbab17358248ff 100644 (file)
--- a/configs/vct_premium_onenand_defconfig
+++ b/configs/vct_premium_onenand_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PREMIUM=y
 CONFIG_VCT_ONENAND=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set
@@ -13,4 +14,3 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_SNTP=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig
index a3a93b84cdbb46d0a4abf02937752f9fd25e961f..ff5e7a68cd60179154de0a738eca2aa109ba8b2e 100644 (file)
--- a/configs/vct_premium_onenand_small_defconfig
+++ b/configs/vct_premium_onenand_small_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_VCT=y
 CONFIG_VCT_PREMIUM=y
 CONFIG_VCT_ONENAND=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -19,4 +20,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig
index fddc04d75dda76e3a08af0fd078266fc1e573655..c601676bcba89bd1f982882cbe6180996a1c9b0e 100644 (file)
--- a/configs/vct_premium_small_defconfig
+++ b/configs/vct_premium_small_defconfig
@@ -2,6 +2,7 @@ CONFIG_MIPS=y
 CONFIG_TARGET_VCT=y
 CONFIG_VCT_PREMIUM=y
 CONFIG_VCT_SMALL_IMAGE=y
+CONFIG_BOOTDELAY=5
 CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -16,4 +17,3 @@ CONFIG_SYS_PROMPT="$ "
 # CONFIG_CMD_NFS is not set
 # CONFIG_CMD_MISC is not set
 CONFIG_SYS_NS16550=y
-CONFIG_USE_PRIVATE_LIBGCC=y

diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 4ae35505b14befba8b90110be3dfafc2a37dee74..faeb15cc169d96e80a9a110fae79c26fede1f770 100644 (file)
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_VE8313=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y

diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig
index c0708b288e2847f63ab5c8e85c652b5f536ab396..5dd6e755867462f0ef69185e96655d0e00655a24 100644 (file)
--- a/configs/vexpress_aemv8a_dram_defconfig
+++ b/configs/vexpress_aemv8a_dram_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_DM_SERIAL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="VExpress64# "
 # CONFIG_CMD_CONSOLE is not set
@@ -24,4 +25,3 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_OF_LIBFDT=y
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8.vexpress_aemv8a"

diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 5af9f5823330ec7512f586048bc9c6d9898b86d7..26cbc85812b46d18ee8c22892e463acaa60da7bc 100644 (file)
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_VEXPRESS64_JUNO=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_DM_SERIAL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="VExpress64# "
 # CONFIG_CMD_CONSOLE is not set
@@ -24,4 +25,3 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_OF_LIBFDT=y
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8.vexpress_aemv8a"

diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index 379dff2499111e0f01c2124cb6cc234011e40434..27c04bae57840faebe42103c14a535d9b755868f 100644 (file)
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_VEXPRESS64_BASE_FVP=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_DM_SERIAL=y
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="VExpress64# "
 # CONFIG_CMD_CONSOLE is not set
@@ -24,4 +25,3 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_FAT=y
 CONFIG_DM=y
 CONFIG_OF_LIBFDT=y
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8.vexpress_aemv8a"

diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index c014294ae7ed8e8e2740c5aa587b6fd4667c2a6a..63a6ab97df67a1413af220cc97f19bbb722bba1d 100644 (file)
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_MMC"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index d50ad907877d4a8887c5f85a795134c4821b4c05..f66ff4aec6b9801860041917034e592656f95a04 100644 (file)
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -4,6 +4,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="vf610-twr"
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/vf610twr/imximage.cfg,ENV_IS_IN_NAND"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index e79cc4d21b5a30cff62dc090bab757fedd18f478..0a373a399503f4f2258ad95f17739a90fa5c9987 100644 (file)
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_AT91=y
 CONFIG_TARGET_VINCO=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="vinco => "
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 887afdf9f2050164ecb921c97ee7a3c8d1b9f96b..b23f2356dca3b38398c3d624233d980059c9b87d 100644 (file)
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -3,6 +3,7 @@ CONFIG_MPC83xx=y
 CONFIG_TARGET_VME8349=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=6
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/walnut_defconfig b/configs/walnut_defconfig
index 9fdb2b37225c41671edf774a859a7d392713e2c2..5f7b40d8963545a8a9e2d1ec86dc857036306e5e 100644 (file)
--- a/configs/walnut_defconfig
+++ b/configs/walnut_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_WALNUT=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index ad4fbbf60669fa5dfcbdcd8ab52e819032fd4d91..102b5b1bb5a24f1b579007a95d7a63cf8de013bb 100644 (file)
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -4,6 +4,7 @@ CONFIG_TARGET_WARP7=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp7/imximage.cfg"
+CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
 CONFIG_CMD_BOOTZ=y

diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 3f9bb25b5580757724fe7a19f4f31e82cec8bbf4..389bb7fd8f4a9a0b650b26a7903b9ecd69f1fc89 100644 (file)
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_WARP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig
index b4660cdb9b03b53651116f83e92167ab312f6f4f..a2e5957610819d536ecd556c97fd60a265303081 100644 (file)
--- a/configs/woodburn_defconfig
+++ b/configs/woodburn_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_WOODBURN=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="woodburn U-Boot > "
 CONFIG_CMD_MMC=y

diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig
index bb1ef0aa1859d74d00b90d02184dbe2e6990e3e8..3b381302e6153535dc2ec78d90b9459bbf92979a 100644 (file)
--- a/configs/woodburn_sd_defconfig
+++ b/configs/woodburn_sd_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_TARGET_WOODBURN_SD=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="woodburn U-Boot > "
 CONFIG_CMD_MMC=y

diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 5663b2f3616fa2987e9ee2fd7ee86d440aab9288..e9fa7734e6c8d4342e6539a5f0310aadee36b204 100644 (file)
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_DM=y
 CONFIG_DM_SERIAL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/wtk_defconfig b/configs/wtk_defconfig
index 9341087de20a028a3e711f53b32e74d96461aab9..336d8e42bf64a4267e4c549a519ee7e268fae20a 100644 (file)
--- a/configs/wtk_defconfig
+++ b/configs/wtk_defconfig
@@ -3,6 +3,7 @@ CONFIG_8xx=y
 CONFIG_TARGET_TQM823L=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="LCD,SHARP_LQ065T9DR51U"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_SETEXPR is not set

diff --git a/configs/x600_defconfig b/configs/x600_defconfig
index 14977dca8a1c628b66f530e6ab342bc6040cdd7b..b91a71116953dc32fa91ffb63684589f0cf3f721 100644 (file)
--- a/configs/x600_defconfig
+++ b/configs/x600_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_X600=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="X600> "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig
index 59e1014a3abbc283770e04a321f6cd0b3904478b..31a647e2e7143aad7a560123372ea72124a3faf1 100644 (file)
--- a/configs/xfi3_defconfig
+++ b/configs/xfi3_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_TARGET_XFI3=y
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_IMLS is not set
 # CONFIG_CMD_FLASH is not set

diff --git a/configs/xilinx-ppc405-generic_defconfig b/configs/xilinx-ppc405-generic_defconfig
index 6c021d70761fadc0429533178dabae5646a467a5..8e07d4001e3e9890d5a42fcfbe9d8bc5664e0218 100644 (file)
--- a/configs/xilinx-ppc405-generic_defconfig
+++ b/configs/xilinx-ppc405-generic_defconfig
@@ -5,6 +5,7 @@ CONFIG_DEFAULT_DEVICE_TREE="xilinx-ppc405-generic"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="xlx-ppc405:/# "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx-ppc440-generic_defconfig b/configs/xilinx-ppc440-generic_defconfig
index ab0ea5a718432e36dd3d99fb6a952b298f3fed88..7f085de146dcf4c9292aca23d1b8d1a9c75bd9fd 100644 (file)
--- a/configs/xilinx-ppc440-generic_defconfig
+++ b/configs/xilinx-ppc440-generic_defconfig
@@ -5,6 +5,7 @@ CONFIG_DEFAULT_DEVICE_TREE="xilinx-ppc440-generic"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="board:/# "
 CONFIG_CMD_ASKENV=y

diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig
index fa380ef7f08f3cbeeb2cb74d5c65c89b41ff595c..7325f190f0bd16bee66511ba91c6fcb3348432eb 100644 (file)
--- a/configs/xilinx_zynqmp_ep_defconfig
+++ b/configs/xilinx_zynqmp_ep_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_CONSOLE is not set

diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 35226d6fd3c90e0c730858b8a074f510d205d797..91af8ce3267021303ed1340d6fd5b619fb625868 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
index cc13179a1e5fa77cea165490234415171478f1af..3e7331257c807deada60da03e1e26084ececd185 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
index 65703481ae317fbe56a1b024dccb08e612ea3f69..2805219f7b1a52b4eb8654e242078adaadeb9216 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
index e1fc8b0ee27172d43e39810c52cc04530760c01a..32bea4b20de286c49bdcab8c366a64089d221d3f 100644 (file)
--- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig
index 28290296853dc978497a52d6a8cf76a7399b0477..d7eb8c27304120605fea3a09cebea22f54847753 100644 (file)
--- a/configs/xilinx_zynqmp_zcu102_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig
index 92633d6fcc988fd1a6fae51e56ae5db3d80ffff5..80a59ef07dde587e9bc76d6ce193cff0ee0afe5b 100644 (file)
--- a/configs/xilinx_zynqmp_zcu102_revB_defconfig
+++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xpedite1000_defconfig b/configs/xpedite1000_defconfig
index 4c0e58ec0b06f21993e1d2a07d30f4b2cba75f3e..f023c730842603cf9d4d124773f223277ce3ba37 100644 (file)
--- a/configs/xpedite1000_defconfig
+++ b/configs/xpedite1000_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_XPEDITE1000=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index b0e92e03086e7d05ae8b6efb9059b2b766866099..2839bc6b2a7951b3d8b430dd00efc372b14eb195 100644 (file)
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index 4a328cd2284cccf1713a8521d0b763921b1c8051..c3b91f4e95e632a11703a21991c45159d7c27a4a 100644 (file)
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index e0fe947ecbfbd6ab2cb52742d13a2e2ab8702ba1..5ababef491b5bdde470dd17738d116a7a4859c9c 100644 (file)
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index e16c8c8fd11714b1a4b00bd17ed9c1749cdad0d1..f893abf5edcdbf89912dd43d5880d6ca5c2ec479 100644 (file)
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -5,6 +5,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_I2C=y

diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig
index 59a313825563eb27086aabcfc03c3e8585aa4e73..d06df393d9ccc6ffe3ec22b33cd4cef784499081 100644 (file)
--- a/configs/xpress_defconfig
+++ b/configs/xpress_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_TARGET_XPRESS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig
index ad0cddb3a9d9cd50f3872fa11a0ff51f47d2fdde..b82a5ed735e531d630d57fa4740e132d62789665 100644 (file)
--- a/configs/xpress_spl_defconfig
+++ b/configs/xpress_spl_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_XPRESS=y
 CONFIG_SPL=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/yellowstone_defconfig b/configs/yellowstone_defconfig
index 00992e0c0c74b6d8313e0914a8ab798d77337e80..059ff711752132a78c9a5194df83c2c074284a3e 100644 (file)
--- a/configs/yellowstone_defconfig
+++ b/configs/yellowstone_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_YOSEMITE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="YELLOWSTONE"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/yosemite_defconfig b/configs/yosemite_defconfig
index 3a803f61601fa6bfdc7f99730e39396c6919e5db..df37b909b97580e61ecf7033e86d2db8a8f0bc3f 100644 (file)
--- a/configs/yosemite_defconfig
+++ b/configs/yosemite_defconfig
@@ -3,6 +3,7 @@ CONFIG_4xx=y
 CONFIG_TARGET_YOSEMITE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="YOSEMITE"
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/yucca_defconfig b/configs/yucca_defconfig
index e219fd2a343899903b7b3b323d02022708da5a6a..d3ccad7d098d53b39b0a5419316d3992fd140ffe 100644 (file)
--- a/configs/yucca_defconfig
+++ b/configs/yucca_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
 CONFIG_4xx=y
 CONFIG_TARGET_YUCCA=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y

diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig
index 9368610f2ef89db7838ef1991212f9dc3a1bb23e..42e38da55cc3b7af52a1dcf767e5468ef3dd5445 100644 (file)
--- a/configs/zmx25_defconfig
+++ b/configs/zmx25_defconfig
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TARGET_ZMX25=y
+CONFIG_BOOTDELAY=5
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zmx25> "
 CONFIG_AUTOBOOT_KEYED=y

diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig
index d0b1ec9463b7aef7bc3ef60561d35df3bad12e8a..d88c61bf4e4414bfdc9e105b8d0c195d3712f1ed 100644 (file)
--- a/configs/zynq_microzed_defconfig
+++ b/configs/zynq_microzed_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig
index 36244248667d9159d1aee779f3605431089614b6..aeb127020fd6c9583c0b8d5f934a67fbc3b7fe14 100644 (file)
--- a/configs/zynq_picozed_defconfig
+++ b/configs/zynq_picozed_defconfig
@@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="zynq_picozed"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
 CONFIG_SPL=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index e1b1fc93576cd5cf8e65720789395a752991e43b..d68ed0edff7b346bae43a1fddffe6cd605a83269 100644 (file)
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig
index 63d32d90ddd0a08fe7576efdfe87a6b4e56a4be2..8bd9230580490c9ac3458867cca55b29a4ea8f1a 100644 (file)
--- a/configs/zynq_zc706_defconfig
+++ b/configs/zynq_zc706_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig
index 6ccbb8ce68dcafa0de7330004624e16cb63b3321..81f16ec1588d48ac1ea479db3eed6735e541ac0d 100644 (file)
--- a/configs/zynq_zc770_xm010_defconfig
+++ b/configs/zynq_zc770_xm010_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig
index e6c646be6e6a4991150cfa8af413bc6ea51ee532..271fcfd5383644e3104cd96b49f8f0d732619bcb 100644 (file)
--- a/configs/zynq_zc770_xm011_defconfig
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig
index a8cfeb8988b3aae75b1c0da5b1d1cd665a25c791..a9ea9711268920eef8a6f919e5935ac953ce9401 100644 (file)
--- a/configs/zynq_zc770_xm012_defconfig
+++ b/configs/zynq_zc770_xm012_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 CONFIG_CMD_GPIO=y

diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig
index f2d00cad65f379080aa3f3bacbf48502971674ce..56062b18a895d0a5fee8c154bb052fc981f7cd5e 100644 (file)
--- a/configs/zynq_zc770_xm013_defconfig
+++ b/configs/zynq_zc770_xm013_defconfig
@@ -7,6 +7,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013"
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig
index 7783eeb0f6c7626602cf030d4729422a7a435006..c70b860b622b632e36227af481a6d874c5cd4c00 100644 (file)
--- a/configs/zynq_zed_defconfig
+++ b/configs/zynq_zed_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig
index 9236c5e8274573ef6b0147edc54955681bc6b5af..624545edaa9ddc14c496c6ecbf0f2cdd5d3732db 100644 (file)
--- a/configs/zynq_zybo_defconfig
+++ b/configs/zynq_zybo_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_BOOTDELAY=3
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_IMLS is not set

diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
index 9b63791ad1e10e8aa8f0c2d47f05e4d39c53dd9a..e3cf93f8dc6f78ecb661f5d37d56350fb553ad98 100644 (file)
--- a/doc/SPL/README.am335x-network
+++ b/doc/SPL/README.am335x-network
@@ -66,6 +66,10 @@ subnet 192.168.8.0 netmask 255.255.255.0 {
   }
 }
 
+  May the ROM bootloader sends another "vendor-class-identifier"
+  on the shc board with an AM335X it is:
+  "AM335x ROM"
+
   2. Setup TFTP server.
      Install TFTP server and put image files to it's root directory
 (likely /tftpboot or /var/lib/tftpboot or /srv/tftp). You will need

diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
index 22d3becb25a5541d2fe417d2a949b7052453873f..8c3a84caf8d8ee7ba8bf60af141af8693038d748 100644 (file)
--- a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -9,7 +9,7 @@ The PINCTRL master node requires the following properties:
 Pin nodes must be children of the pinctrl master node and can
 contain the following properties:
 - pad-offset   - (required) offset in the IOBASE for the pin to configure
-- gpio-offset  - (required) 2 cells
+- gpio-offset  - (required only when 'mode-gpio' is set) 2 cells
                        - offset in the GPIOBASE for the pin to configure
                        - the bit shift in this register (4 = bit 4)
 - mode-gpio    - (optional) standalone property to force the pin into GPIO mode
@@ -18,16 +18,16 @@ contain the following properties:
 in case of 'mode-gpio' property set:
 - output-value - (optional) this set the default output value of the GPIO
 - direction    - (optional) this set the direction of the gpio
-- pull-str     - (optional) this set the pull strength of the pin
+- pull-strength        - (optional) this set the pull strength of the pin
 - pull-assign  - (optional) this set the pull assignement (up/down) of the pin
-- invert            - (optional) this input pin is inverted
+- invert       - (optional) this input pin is inverted
 
 Example:
 
 pin_usb_host_en0@0 {
-    gpio-offset = <0x80 8>;
-    pad-offset = <0x260>;
-    mode-gpio;
-    output-value = <1>;
-    direction = <PIN_OUTPUT>;
+       gpio-offset = <0x80 8>;
+       pad-offset = <0x260>;
+       mode-gpio;
+       output-value = <1>;
+       direction = <PIN_OUTPUT>;
 };

diff --git a/drivers/Makefile b/drivers/Makefile
index f6295d285ece6a41cf4ae16a8945ade1d51a57a0..db5317c9c7cb07141f7ee750fdcb62b3ec52aa45 100644 (file)
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_$(SPL_)RAM)      += ram/
 
 ifdef CONFIG_SPL_BUILD
 
+obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
 obj-$(CONFIG_SPL_I2C_SUPPORT) += i2c/
 obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += mmc/

diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c
index 6ec52a9114b468ced0fffc0f70b7aea2bf29f9b5..6056fe5dfd027385601d746d7adca5926d7515e0 100644 (file)
--- a/drivers/block/dwc_ahsata.c
+++ b/drivers/block/dwc_ahsata.c
@@ -563,7 +563,7 @@ int init_sata(int dev)
        struct ahci_probe_ent *probe_ent = NULL;
 
 #if defined(CONFIG_MX6)
-       if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
+       if (!is_mx6dq() && !is_mx6dqp())
                return 1;
 #endif
        if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {

diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
index dc6c064b4e3f030fb91fe3a684582664a066a2b5..3817fb3e47bf84664e399d6788490d69c902efab 100644 (file)
--- a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
+++ b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
@@ -32,6 +32,7 @@ U_BOOT_DRIVER(mod_exp_sw) = {
        .name   = "mod_exp_sw",
        .id     = UCLASS_MOD_EXP,
        .ops    = &mod_exp_ops_sw,
+       .flags  = DM_FLAG_PRE_RELOC,
 };
 
 U_BOOT_DEVICE(mod_exp_sw) = {

diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index ab782bead428f21720bd5a83fa49ea74e9af341b..9fb874c0bcd4f07c9ab1f6732117f4d7ed5a3c46 100644 (file)
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -139,6 +139,7 @@ static int dfu_read_medium_nand(struct dfu_entity *dfu, u64 offset, void *buf,
 static int dfu_flush_medium_nand(struct dfu_entity *dfu)
 {
        int ret = 0;
+       u64 off;
 
        /* in case of ubi partition, erase rest of the partition */
        if (dfu->data.nand.ubi) {
@@ -155,7 +156,16 @@ static int dfu_flush_medium_nand(struct dfu_entity *dfu)
                mtd = nand_info[nand_curr_device];
 
                memset(&opts, 0, sizeof(opts));
-               opts.offset = dfu->data.nand.start + dfu->offset +
+               off = dfu->offset;
+               if ((off & (mtd->erasesize - 1)) != 0) {
+                       /*
+                        * last write ended with unaligned length
+                        * sector is erased, jump to next
+                        */
+                       off = off & ~((mtd->erasesize - 1));
+                       off += mtd->erasesize;
+               }
+               opts.offset = dfu->data.nand.start + off +
                                dfu->bad_skip;
                opts.length = dfu->data.nand.start +
                                dfu->data.nand.size - opts.offset;

diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index 75a32ee8156f105f0454e24aec5ffe987e292935..8e52e3dad0af181e0df608466134ea3ba0660bef 100644 (file)
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -59,6 +59,11 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
 {
        struct at91_port *at91_port = at91_pio_get_port(port);
 
+#if defined(CPU_HAS_PIO3)
+       if (use_pullup)
+               at91_set_pio_pulldown(port, pin, 0);
+#endif
+
        if (at91_port && (pin < GPIO_PER_BANK))
                at91_set_port_pullup(at91_port, pin, use_pullup);
 
@@ -305,10 +310,10 @@ int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on)
 
        if (at91_port && (pin < GPIO_PER_BANK)) {
                mask = 1 << pin;
-               writel(mask, &at91_port->pudr);
-               if (is_on)
+               if (is_on) {
+                       at91_set_pio_pullup(port, pin, 0);
                        writel(mask, &at91_port->ppder);
-               else
+               } else
                        writel(mask, &at91_port->ppddr);
        }
 

diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c
index 81ce446e1a162d1e2c624e657623b1fc96714963..8b50900f9fc262b56cde4fd3c9843964c3abe256 100644 (file)
--- a/drivers/gpio/intel_broadwell_gpio.c
+++ b/drivers/gpio/intel_broadwell_gpio.c
@@ -9,7 +9,6 @@
 #include <fdtdec.h>
 #include <pch.h>
 #include <pci.h>
-#include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -119,12 +118,6 @@ static int broadwell_gpio_probe(struct udevice *dev)
        struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
        struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
        struct broadwell_bank_priv *priv = dev_get_priv(dev);
-       struct udevice *pinctrl;
-       int ret;
-
-       /* Set up pin control if available */
-       ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl);
-       debug("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret);
 
        uc_priv->gpio_count = GPIO_PER_BANK;
        uc_priv->bank_name = plat->bank_name;

diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index b7e379ab97984cbcffd1c4e9bb87350510f69151..fd6181fa5a733f4bc76856b621bd6d1ce1e897d7 100644 (file)
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -32,7 +32,6 @@
 #include <fdtdec.h>
 #include <pch.h>
 #include <pci.h>
-#include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -113,10 +112,6 @@ static int ich6_gpio_probe(struct udevice *dev)
        struct ich6_bank_platdata *plat = dev_get_platdata(dev);
        struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
        struct ich6_bank_priv *bank = dev_get_priv(dev);
-       struct udevice *pinctrl;
-
-       /* Set up pin control if available */
-       syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl);
 
        uc_priv->gpio_count = GPIO_PER_BANK;
        uc_priv->bank_name = plat->bank_name;

diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index 41cc3b8fa43b270de0253fe74036f013efd9125d..16b1aba32aaca5437cba1a25084dfefe3d4423d1 100644 (file)
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -233,6 +233,11 @@ __weak void i2c_init_board(void)
 {
 }
 
+/* implement possible for i2c specific early i2c init */
+__weak void i2c_early_init_f(void)
+{
+}
+
 /*
  * i2c_init_all():
  *

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 445fa2108248e0ea32f64e0ee34c9ef2fdf15104..f3402089a8ab7367f53e54c04587513bce013913 100644 (file)
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -32,6 +32,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define IMX_I2C_REGSHIFT       2
 #define VF610_I2C_REGSHIFT     0
+
+#define I2C_EARLY_INIT_INDEX           0
+#ifdef CONFIG_SYS_I2C_IFDR_DIV
+#define I2C_IFDR_DIV_CONSERVATIVE      CONFIG_SYS_I2C_IFDR_DIV
+#else
+#define I2C_IFDR_DIV_CONSERVATIVE      0x7e
+#endif
+
 /* Register index */
 #define IADR   0
 #define IFDR   1
@@ -659,6 +667,25 @@ void bus_i2c_init(int index, int speed, int unused,
        bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed);
 }
 
+/*
+ * Early init I2C for prepare read the clk through I2C.
+ */
+void i2c_early_init_f(void)
+{
+       ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base;
+       bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data
+                                       & I2C_QUIRK_FLAG ? true : false;
+       int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT;
+
+       /* Set I2C divider value */
+       writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift));
+       /* Reset module */
+       writeb(I2CR_IDIS, base + (I2CR << reg_shift));
+       writeb(0, base + (I2SR << reg_shift));
+       /* Enable I2C */
+       writeb(I2CR_IEN, base + (I2CR << reg_shift));
+}
+
 /*
  * Init I2C Bus
  */

diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 65ff8158e59b137d6592a48adcbed7dd5598aef7..38344e8090ed6f084c0d06e497ab84ef0782f295 100644 (file)
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -95,9 +95,9 @@ u32 fuse_bank_physical(int index)
 {
        u32 phy_index;
 
-       if (is_cpu_type(MXC_CPU_MX6SL)) {
+       if (is_mx6sl()) {
                phy_index = index;
-       } else if (is_cpu_type(MXC_CPU_MX6UL)) {
+       } else if (is_mx6ul()) {
                if (index >= 6)
                        phy_index = fuse_bank_physical(5) + (index - 6) + 3;
                else

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 57ad9754f56a1af12f63576f190bf8a153ac88c3..b7b4f14145ea2f06139a677aae79f277c095a4d1 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -208,7 +208,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
        int timeout;
        struct fsl_esdhc_priv *priv = mmc->priv;
        struct fsl_esdhc *regs = priv->esdhc_regs;
-#ifdef CONFIG_FSL_LAYERSCAPE
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
        dma_addr_t addr;
 #endif
        uint wml_value;
@@ -221,7 +221,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 
                esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#ifdef CONFIG_FSL_LAYERSCAPE
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
                addr = virt_to_phys((void *)(data->dest));
                if (upper_32_bits(addr))
                        printf("Error found for upper 32 bits\n");
@@ -247,7 +247,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
                esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
                                        wml_value << 16);
 #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
-#ifdef CONFIG_FSL_LAYERSCAPE
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
                addr = virt_to_phys((void *)(data->src));
                if (upper_32_bits(addr))
                        printf("Error found for upper 32 bits\n");
@@ -312,7 +312,7 @@ static void check_and_invalidate_dcache_range
        unsigned end = 0;
        unsigned size = roundup(ARCH_DMA_MINALIGN,
                                data->blocks*data->blocksize);
-#ifdef CONFIG_FSL_LAYERSCAPE
+#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234)
        dma_addr_t addr;
 
        addr = virt_to_phys((void *)(data->dest));

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 94f19ade3eda0b3d6e2157d87e66c0bed29e62f3..758655850bb10ae38266e14b57c52bc08a89dda4 100644 (file)
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -155,8 +155,6 @@ int mmc_send_status(struct mmc *mmc, int timeout)
 #endif
                return TIMEOUT;
        }
-       if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
-               return SWITCH_ERR;
 
        return 0;
 }
@@ -516,7 +514,7 @@ static int mmc_change_freq(struct mmc *mmc)
        err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
 
        if (err)
-               return err == SWITCH_ERR ? 0 : err;
+               return err;
 
        /* Now check to see that it worked */
        err = mmc_send_ext_csd(mmc, ext_csd);

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index be34057ea2cef9108cd842c7237fc70726d853a8..d007b562936bb184e25301e4edceccf65924009b 100644 (file)
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -701,6 +701,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
                priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
 #if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
        defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) || \
+       defined(CONFIG_AM33XX) || \
        defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \
                defined(CONFIG_HSMMC2_8BIT)
                /* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 75e830724c727bf11b3069d7ab2363e46db823e8..ad5ded3a5618d7fafb222eb219edf9a0cdd8e13f 100644 (file)
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -24,9 +24,9 @@
 
 /* Register access macros */
 #define ecc_readl(add, reg)                            \
-       readl(AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+       readl(add + ATMEL_ECC_##reg)
 #define ecc_writel(add, reg, value)                    \
-       writel((value), AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+       writel((value), add + ATMEL_ECC_##reg)
 
 #include "atmel_nand_ecc.h"    /* Hardware ECC registers */
 
@@ -1156,6 +1156,7 @@ int atmel_hwecc_nand_init_param(struct nand_chip *nand, struct mtd_info *mtd)
        nand->ecc.hwctl = atmel_nand_hwctl;
        nand->ecc.read_page = atmel_nand_read_page;
        nand->ecc.bytes = 4;
+       nand->ecc.strength = 4;
 
        if (nand->ecc.mode == NAND_ECC_HW) {
                /* ECC is calculated for the whole page (1 step) */

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 7be1f86bc2b3d3bc795b92bcb6ac54c9475cef17..c90a3a7bd2cb596f5bd5d7ea75a5454faa12418c 100644 (file)
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -152,7 +152,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
        int max_ecc_strength_supported;
 
        /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7))
+       if (is_mx6sx() || is_mx7())
                max_ecc_strength_supported = 62;
        else
                max_ecc_strength_supported = 40;

diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c
index f449316853924b9f91eb0dd6bfbc1e7577b55e95..05512412b9404a886f5c4457ea43527c16d909aa 100644 (file)
--- a/drivers/mtd/nand/nand.c
+++ b/drivers/mtd/nand/nand.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <nand.h>
 #include <errno.h>
+#include <linux/mtd/concat.h>
 
 #ifndef CONFIG_SYS_NAND_BASE_LIST
 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
@@ -92,6 +93,44 @@ static void nand_init_chip(int i)
 }
 #endif
 
+#ifdef CONFIG_MTD_CONCAT
+static void create_mtd_concat(void)
+{
+       struct mtd_info *nand_info_list[CONFIG_SYS_MAX_NAND_DEVICE];
+       int nand_devices_found = 0;
+       int i;
+
+       for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
+               if (nand_info[i] != NULL) {
+                       nand_info_list[nand_devices_found] = nand_info[i];
+                       nand_devices_found++;
+               }
+       }
+       if (nand_devices_found > 1) {
+               struct mtd_info *mtd;
+               char c_mtd_name[16];
+
+               /*
+                * We detected multiple devices. Concatenate them together.
+                */
+               sprintf(c_mtd_name, "nand%d", nand_devices_found);
+               mtd = mtd_concat_create(nand_info_list, nand_devices_found,
+                                       c_mtd_name);
+
+               if (mtd == NULL)
+                       return;
+
+               nand_register(nand_devices_found, mtd);
+       }
+
+       return;
+}
+#else
+static void create_mtd_concat(void)
+{
+}
+#endif
+
 void nand_init(void)
 {
 #ifdef CONFIG_SYS_NAND_SELF_INIT
@@ -112,4 +151,6 @@ void nand_init(void)
        board_nand_select_device(mtd_to_nand(nand_info[nand_curr_device]),
                                 nand_curr_device);
 #endif
+
+       create_mtd_concat();
 }

diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 37c4341763de7b45d9cc8c264ecd96b81842a516..67f293dcd0169de92b669d83cf7eeeb88b25735c 100644 (file)
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -917,6 +917,10 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
                        err = omap_select_ecc_scheme(nand,
                                        OMAP_ECC_BCH8_CODE_HW,
                                        mtd->writesize, mtd->oobsize);
+               } else if (eccstrength == 16) {
+                       err = omap_select_ecc_scheme(nand,
+                                       OMAP_ECC_BCH16_CODE_HW,
+                                       mtd->writesize, mtd->oobsize);
                } else {
                        printf("nand: error: unsupported ECC scheme\n");
                        return -EINVAL;

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 3340dd256f6ed1db06f876305092eb9447a6cf1b..360f8e44d1017d9538a25496975727a645b8f6cc 100644 (file)
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -566,7 +566,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd)
 
 
        /* Do not access reserved register for i.MX6UL */
-       if (!is_cpu_type(MXC_CPU_MX6UL)) {
+       if (!is_mx6ul()) {
                /* clear MIB RAM */
                for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
                        writel(0, i);

diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index 4bf8fa45d7a5e70b53e789f2133d39f3ebcd0b24..0835fdc306088e097e6b2509f8b0ddb83b1f76ff 100644 (file)
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -4,6 +4,7 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
+#include <dm.h>
 
 /*
  * The u-boot networking stack is a little weird.  It seems like the
@@ -28,7 +29,9 @@
  */
 
 #include <net.h>
+#ifndef CONFIG_DM_ETH
 #include <netdev.h>
+#endif
 #include <malloc.h>
 #include <miiphy.h>
 
@@ -84,6 +87,8 @@ struct macb_device {
        unsigned int            rx_tail;
        unsigned int            tx_head;
        unsigned int            tx_tail;
+       unsigned int            next_rx_tail;
+       bool                    wrapped;
 
        void                    *rx_buffer;
        void                    *tx_buffer;
@@ -98,11 +103,15 @@ struct macb_device {
        unsigned long           dummy_desc_dma;
 
        const struct device     *dev;
+#ifndef CONFIG_DM_ETH
        struct eth_device       netdev;
+#endif
        unsigned short          phy_addr;
        struct mii_dev          *bus;
 };
+#ifndef CONFIG_DM_ETH
 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
+#endif
 
 static int macb_is_gem(struct macb_device *macb)
 {
@@ -192,8 +201,13 @@ void __weak arch_get_mdio_control(const char *name)
 
 int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
 {
+#ifdef CONFIG_DM_ETH
+       struct udevice *dev = eth_get_dev_by_name(devname);
+       struct macb_device *macb = dev_get_priv(dev);
+#else
        struct eth_device *dev = eth_get_dev_by_name(devname);
        struct macb_device *macb = to_macb(dev);
+#endif
 
        if (macb->phy_addr != phy_adr)
                return -1;
@@ -206,8 +220,13 @@ int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
 
 int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
 {
+#ifdef CONFIG_DM_ETH
+       struct udevice *dev = eth_get_dev_by_name(devname);
+       struct macb_device *macb = dev_get_priv(dev);
+#else
        struct eth_device *dev = eth_get_dev_by_name(devname);
        struct macb_device *macb = to_macb(dev);
+#endif
 
        if (macb->phy_addr != phy_adr)
                return -1;
@@ -255,9 +274,9 @@ static inline void macb_invalidate_rx_buffer(struct macb_device *macb)
 
 #if defined(CONFIG_CMD_NET)
 
-static int macb_send(struct eth_device *netdev, void *packet, int length)
+static int _macb_send(struct macb_device *macb, const char *name, void *packet,
+                     int length)
 {
-       struct macb_device *macb = to_macb(netdev);
        unsigned long paddr, ctrl;
        unsigned int tx_head = macb->tx_head;
        int i;
@@ -278,7 +297,7 @@ static int macb_send(struct eth_device *netdev, void *packet, int length)
        barrier();
        macb_flush_ring_desc(macb, TX);
        /* Do we need check paddr and length is dcache line aligned? */
-       flush_dcache_range(paddr, paddr + length);
+       flush_dcache_range(paddr, paddr + ALIGN(length, ARCH_DMA_MINALIGN));
        macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
 
        /*
@@ -298,12 +317,11 @@ static int macb_send(struct eth_device *netdev, void *packet, int length)
 
        if (i <= MACB_TX_TIMEOUT) {
                if (ctrl & TXBUF_UNDERRUN)
-                       printf("%s: TX underrun\n", netdev->name);
+                       printf("%s: TX underrun\n", name);
                if (ctrl & TXBUF_EXHAUSTED)
-                       printf("%s: TX buffers exhausted in mid frame\n",
-                              netdev->name);
+                       printf("%s: TX buffers exhausted in mid frame\n", name);
        } else {
-               printf("%s: TX timeout\n", netdev->name);
+               printf("%s: TX timeout\n", name);
        }
 
        /* No one cares anyway */
@@ -335,26 +353,25 @@ static void reclaim_rx_buffers(struct macb_device *macb,
        macb->rx_tail = new_tail;
 }
 
-static int macb_recv(struct eth_device *netdev)
+static int _macb_recv(struct macb_device *macb, uchar **packetp)
 {
-       struct macb_device *macb = to_macb(netdev);
-       unsigned int rx_tail = macb->rx_tail;
+       unsigned int next_rx_tail = macb->next_rx_tail;
        void *buffer;
        int length;
-       int wrapped = 0;
        u32 status;
 
+       macb->wrapped = false;
        for (;;) {
                macb_invalidate_ring_desc(macb, RX);
 
-               if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
-                       return -1;
+               if (!(macb->rx_ring[next_rx_tail].addr & RXADDR_USED))
+                       return -EAGAIN;
 
-               status = macb->rx_ring[rx_tail].ctrl;
+               status = macb->rx_ring[next_rx_tail].ctrl;
                if (status & RXBUF_FRAME_START) {
-                       if (rx_tail != macb->rx_tail)
-                               reclaim_rx_buffers(macb, rx_tail);
-                       wrapped = 0;
+                       if (next_rx_tail != macb->rx_tail)
+                               reclaim_rx_buffers(macb, next_rx_tail);
+                       macb->wrapped = false;
                }
 
                if (status & RXBUF_FRAME_END) {
@@ -362,7 +379,7 @@ static int macb_recv(struct eth_device *netdev)
                        length = status & RXBUF_FRMLEN_MASK;
 
                        macb_invalidate_rx_buffer(macb);
-                       if (wrapped) {
+                       if (macb->wrapped) {
                                unsigned int headlen, taillen;
 
                                headlen = 128 * (MACB_RX_RING_SIZE
@@ -372,34 +389,33 @@ static int macb_recv(struct eth_device *netdev)
                                       buffer, headlen);
                                memcpy((void *)net_rx_packets[0] + headlen,
                                       macb->rx_buffer, taillen);
-                               buffer = (void *)net_rx_packets[0];
+                               *packetp = (void *)net_rx_packets[0];
+                       } else {
+                               *packetp = buffer;
                        }
 
-                       net_process_received_packet(buffer, length);
-                       if (++rx_tail >= MACB_RX_RING_SIZE)
-                               rx_tail = 0;
-                       reclaim_rx_buffers(macb, rx_tail);
+                       if (++next_rx_tail >= MACB_RX_RING_SIZE)
+                               next_rx_tail = 0;
+                       macb->next_rx_tail = next_rx_tail;
+                       return length;
                } else {
-                       if (++rx_tail >= MACB_RX_RING_SIZE) {
-                               wrapped = 1;
-                               rx_tail = 0;
+                       if (++next_rx_tail >= MACB_RX_RING_SIZE) {
+                               macb->wrapped = true;
+                               next_rx_tail = 0;
                        }
                }
                barrier();
        }
-
-       return 0;
 }
 
-static void macb_phy_reset(struct macb_device *macb)
+static void macb_phy_reset(struct macb_device *macb, const char *name)
 {
-       struct eth_device *netdev = &macb->netdev;
        int i;
        u16 status, adv;
 
        adv = ADVERTISE_CSMA | ADVERTISE_ALL;
        macb_mdio_write(macb, MII_ADVERTISE, adv);
-       printf("%s: Starting autonegotiation...\n", netdev->name);
+       printf("%s: Starting autonegotiation...\n", name);
        macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
                                         | BMCR_ANRESTART));
 
@@ -411,10 +427,10 @@ static void macb_phy_reset(struct macb_device *macb)
        }
 
        if (status & BMSR_ANEGCOMPLETE)
-               printf("%s: Autonegotiation complete\n", netdev->name);
+               printf("%s: Autonegotiation complete\n", name);
        else
                printf("%s: Autonegotiation timed out (status=0x%04x)\n",
-                      netdev->name, status);
+                      name, status);
 }
 
 #ifdef CONFIG_MACB_SEARCH_PHY
@@ -441,9 +457,8 @@ static int macb_phy_find(struct macb_device *macb)
 #endif /* CONFIG_MACB_SEARCH_PHY */
 
 
-static int macb_phy_init(struct macb_device *macb)
+static int macb_phy_init(struct macb_device *macb, const char *name)
 {
-       struct eth_device *netdev = &macb->netdev;
 #ifdef CONFIG_PHYLIB
        struct phy_device *phydev;
 #endif
@@ -452,7 +467,7 @@ static int macb_phy_init(struct macb_device *macb)
        int media, speed, duplex;
        int i;
 
-       arch_get_mdio_control(netdev->name);
+       arch_get_mdio_control(name);
 #ifdef CONFIG_MACB_SEARCH_PHY
        /* Auto-detect phy_addr */
        if (!macb_phy_find(macb))
@@ -462,13 +477,13 @@ static int macb_phy_init(struct macb_device *macb)
        /* Check if the PHY is up to snuff... */
        phy_id = macb_mdio_read(macb, MII_PHYSID1);
        if (phy_id == 0xffff) {
-               printf("%s: No PHY present\n", netdev->name);
+               printf("%s: No PHY present\n", name);
                return 0;
        }
 
 #ifdef CONFIG_PHYLIB
        /* need to consider other phy interface mode */
-       phydev = phy_connect(macb->bus, macb->phy_addr, netdev,
+       phydev = phy_connect(macb->bus, macb->phy_addr, &macb->netdev,
                             PHY_INTERFACE_MODE_RGMII);
        if (!phydev) {
                printf("phy_connect failed\n");
@@ -481,7 +496,7 @@ static int macb_phy_init(struct macb_device *macb)
        status = macb_mdio_read(macb, MII_BMSR);
        if (!(status & BMSR_LSTATUS)) {
                /* Try to re-negotiate if we don't have link already. */
-               macb_phy_reset(macb);
+               macb_phy_reset(macb, name);
 
                for (i = 0; i < MACB_AUTONEG_TIMEOUT / 100; i++) {
                        status = macb_mdio_read(macb, MII_BMSR);
@@ -493,7 +508,7 @@ static int macb_phy_init(struct macb_device *macb)
 
        if (!(status & BMSR_LSTATUS)) {
                printf("%s: link down (status: 0x%04x)\n",
-                      netdev->name, status);
+                      name, status);
                return 0;
        }
 
@@ -505,7 +520,7 @@ static int macb_phy_init(struct macb_device *macb)
                        duplex = ((lpa & LPA_1000FULL) ? 1 : 0);
 
                        printf("%s: link up, 1000Mbps %s-duplex (lpa: 0x%04x)\n",
-                              netdev->name,
+                              name,
                               duplex ? "full" : "half",
                               lpa);
 
@@ -530,7 +545,7 @@ static int macb_phy_init(struct macb_device *macb)
                 ? 1 : 0);
        duplex = (media & ADVERTISE_FULL) ? 1 : 0;
        printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
-              netdev->name,
+              name,
               speed ? "100" : "10",
               duplex ? "full" : "half",
               lpa);
@@ -570,9 +585,8 @@ static int gmac_init_multi_queues(struct macb_device *macb)
        return 0;
 }
 
-static int macb_init(struct eth_device *netdev, bd_t *bd)
+static int _macb_init(struct macb_device *macb, const char *name)
 {
-       struct macb_device *macb = to_macb(netdev);
        unsigned long paddr;
        int i;
 
@@ -605,6 +619,7 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
        macb->rx_tail = 0;
        macb->tx_head = 0;
        macb->tx_tail = 0;
+       macb->next_rx_tail = 0;
 
        macb_writel(macb, RBQP, macb->rx_ring_dma);
        macb_writel(macb, TBQP, macb->tx_ring_dma);
@@ -641,7 +656,7 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
 #endif /* CONFIG_RMII */
        }
 
-       if (!macb_phy_init(macb))
+       if (!macb_phy_init(macb, name))
                return -1;
 
        /* Enable TX and RX */
@@ -650,9 +665,8 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
        return 0;
 }
 
-static void macb_halt(struct eth_device *netdev)
+static void _macb_halt(struct macb_device *macb)
 {
-       struct macb_device *macb = to_macb(netdev);
        u32 ncr, tsr;
 
        /* Halt the controller and wait for any ongoing transmission to end. */
@@ -668,17 +682,16 @@ static void macb_halt(struct eth_device *netdev)
        macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
 }
 
-static int macb_write_hwaddr(struct eth_device *dev)
+static int _macb_write_hwaddr(struct macb_device *macb, unsigned char *enetaddr)
 {
-       struct macb_device *macb = to_macb(dev);
        u32 hwaddr_bottom;
        u16 hwaddr_top;
 
        /* set hardware address */
-       hwaddr_bottom = dev->enetaddr[0] | dev->enetaddr[1] << 8 |
-                       dev->enetaddr[2] << 16 | dev->enetaddr[3] << 24;
+       hwaddr_bottom = enetaddr[0] | enetaddr[1] << 8 |
+                       enetaddr[2] << 16 | enetaddr[3] << 24;
        macb_writel(macb, SA1B, hwaddr_bottom);
-       hwaddr_top = dev->enetaddr[4] | dev->enetaddr[5] << 8;
+       hwaddr_top = enetaddr[4] | enetaddr[5] << 8;
        macb_writel(macb, SA1T, hwaddr_top);
        return 0;
 }
@@ -739,11 +752,87 @@ static u32 macb_dbw(struct macb_device *macb)
        }
 }
 
+static void _macb_eth_initialize(struct macb_device *macb)
+{
+       int id = 0;     /* This is not used by functions we call */
+       u32 ncfgr;
+
+       /* TODO: we need check the rx/tx_ring_dma is dcache line aligned */
+       macb->rx_buffer = dma_alloc_coherent(MACB_RX_BUFFER_SIZE,
+                                            &macb->rx_buffer_dma);
+       macb->rx_ring = dma_alloc_coherent(MACB_RX_DMA_DESC_SIZE,
+                                          &macb->rx_ring_dma);
+       macb->tx_ring = dma_alloc_coherent(MACB_TX_DMA_DESC_SIZE,
+                                          &macb->tx_ring_dma);
+       macb->dummy_desc = dma_alloc_coherent(MACB_TX_DUMMY_DMA_DESC_SIZE,
+                                          &macb->dummy_desc_dma);
+
+       /*
+        * Do some basic initialization so that we at least can talk
+        * to the PHY
+        */
+       if (macb_is_gem(macb)) {
+               ncfgr = gem_mdc_clk_div(id, macb);
+               ncfgr |= macb_dbw(macb);
+       } else {
+               ncfgr = macb_mdc_clk_div(id, macb);
+       }
+
+       macb_writel(macb, NCFGR, ncfgr);
+}
+
+#ifndef CONFIG_DM_ETH
+static int macb_send(struct eth_device *netdev, void *packet, int length)
+{
+       struct macb_device *macb = to_macb(netdev);
+
+       return _macb_send(macb, netdev->name, packet, length);
+}
+
+static int macb_recv(struct eth_device *netdev)
+{
+       struct macb_device *macb = to_macb(netdev);
+       uchar *packet;
+       int length;
+
+       macb->wrapped = false;
+       for (;;) {
+               macb->next_rx_tail = macb->rx_tail;
+               length = _macb_recv(macb, &packet);
+               if (length >= 0) {
+                       net_process_received_packet(packet, length);
+                       reclaim_rx_buffers(macb, macb->next_rx_tail);
+               } else if (length < 0) {
+                       return length;
+               }
+       }
+}
+
+static int macb_init(struct eth_device *netdev, bd_t *bd)
+{
+       struct macb_device *macb = to_macb(netdev);
+
+       return _macb_init(macb, netdev->name);
+}
+
+static void macb_halt(struct eth_device *netdev)
+{
+       struct macb_device *macb = to_macb(netdev);
+
+       return _macb_halt(macb);
+}
+
+static int macb_write_hwaddr(struct eth_device *netdev)
+{
+       struct macb_device *macb = to_macb(netdev);
+
+       return _macb_write_hwaddr(macb, netdev->enetaddr);
+}
+
 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
 {
        struct macb_device *macb;
        struct eth_device *netdev;
-       u32 ncfgr;
 
        macb = malloc(sizeof(struct macb_device));
        if (!macb) {
@@ -754,17 +843,6 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
 
        netdev = &macb->netdev;
 
-       macb->rx_buffer = dma_alloc_coherent(MACB_RX_BUFFER_SIZE,
-                                            &macb->rx_buffer_dma);
-       macb->rx_ring = dma_alloc_coherent(MACB_RX_DMA_DESC_SIZE,
-                                          &macb->rx_ring_dma);
-       macb->tx_ring = dma_alloc_coherent(MACB_TX_DMA_DESC_SIZE,
-                                          &macb->tx_ring_dma);
-       macb->dummy_desc = dma_alloc_coherent(MACB_TX_DUMMY_DMA_DESC_SIZE,
-                                          &macb->dummy_desc_dma);
-
-       /* TODO: we need check the rx/tx_ring_dma is dcache line aligned */
-
        macb->regs = regs;
        macb->phy_addr = phy_addr;
 
@@ -779,18 +857,7 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
        netdev->recv = macb_recv;
        netdev->write_hwaddr = macb_write_hwaddr;
 
-       /*
-        * Do some basic initialization so that we at least can talk
-        * to the PHY
-        */
-       if (macb_is_gem(macb)) {
-               ncfgr = gem_mdc_clk_div(id, macb);
-               ncfgr |= macb_dbw(macb);
-       } else {
-               ncfgr = macb_mdc_clk_div(id, macb);
-       }
-
-       macb_writel(macb, NCFGR, ncfgr);
+       _macb_eth_initialize(macb);
 
        eth_register(netdev);
 
@@ -800,5 +867,106 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
 #endif
        return 0;
 }
+#endif /* !CONFIG_DM_ETH */
+
+#ifdef CONFIG_DM_ETH
+
+static int macb_start(struct udevice *dev)
+{
+       struct macb_device *macb = dev_get_priv(dev);
+
+       return _macb_init(macb, dev->name);
+}
+
+static int macb_send(struct udevice *dev, void *packet, int length)
+{
+       struct macb_device *macb = dev_get_priv(dev);
+
+       return _macb_send(macb, dev->name, packet, length);
+}
+
+static int macb_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+       struct macb_device *macb = dev_get_priv(dev);
+
+       macb->next_rx_tail = macb->rx_tail;
+       macb->wrapped = false;
+
+       return _macb_recv(macb, packetp);
+}
+
+static int macb_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+       struct macb_device *macb = dev_get_priv(dev);
+
+       reclaim_rx_buffers(macb, macb->next_rx_tail);
+
+       return 0;
+}
+
+static void macb_stop(struct udevice *dev)
+{
+       struct macb_device *macb = dev_get_priv(dev);
+
+       _macb_halt(macb);
+}
+
+static int macb_write_hwaddr(struct udevice *dev)
+{
+       struct eth_pdata *plat = dev_get_platdata(dev);
+       struct macb_device *macb = dev_get_priv(dev);
+
+       return _macb_write_hwaddr(macb, plat->enetaddr);
+}
+
+static const struct eth_ops macb_eth_ops = {
+       .start  = macb_start,
+       .send   = macb_send,
+       .recv   = macb_recv,
+       .stop   = macb_stop,
+       .free_pkt       = macb_free_pkt,
+       .write_hwaddr   = macb_write_hwaddr,
+};
+
+static int macb_eth_probe(struct udevice *dev)
+{
+       struct eth_pdata *pdata = dev_get_platdata(dev);
+       struct macb_device *macb = dev_get_priv(dev);
+
+       macb->regs = (void *)pdata->iobase;
+
+       _macb_eth_initialize(macb);
+#if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
+       miiphy_register(dev->name, macb_miiphy_read, macb_miiphy_write);
+       macb->bus = miiphy_get_dev_by_name(dev->name);
+#endif
+
+       return 0;
+}
+
+static int macb_eth_ofdata_to_platdata(struct udevice *dev)
+{
+       struct eth_pdata *pdata = dev_get_platdata(dev);
+
+       pdata->iobase = dev_get_addr(dev);
+       return 0;
+}
+
+static const struct udevice_id macb_eth_ids[] = {
+       { .compatible = "cdns,macb" },
+       { }
+};
+
+U_BOOT_DRIVER(eth_macb) = {
+       .name   = "eth_macb",
+       .id     = UCLASS_ETH,
+       .of_match = macb_eth_ids,
+       .ofdata_to_platdata = macb_eth_ofdata_to_platdata,
+       .probe  = macb_eth_probe,
+       .ops    = &macb_eth_ops,
+       .priv_auto_alloc_size = sizeof(struct macb_device),
+       .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+#endif
 
 #endif

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index e1e28ded30aa905dea995c799e9a8faa22739257..92cbea59135abeabee0e7133f1bba417a9aae8cc 100644 (file)
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o
 obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
 obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
+obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o

diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 4fe992bf2bf38dc9d53359dac9212efdf1246e0d..e450135c75745e7231fd83bf5f35bd4d98bb7591 100644 (file)
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -191,16 +191,35 @@ static int atmel_serial_probe(struct udevice *dev)
 {
        struct atmel_serial_platdata *plat = dev->platdata;
        struct atmel_serial_priv *priv = dev_get_priv(dev);
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+       fdt_addr_t addr_base;
 
+       addr_base = dev_get_addr(dev);
+       if (addr_base == FDT_ADDR_T_NONE)
+               return -ENODEV;
+
+       plat->base_addr = (uint32_t)addr_base;
+#endif
        priv->usart = (atmel_usart3_t *)plat->base_addr;
        atmel_serial_init_internal(priv->usart);
 
        return 0;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+static const struct udevice_id atmel_serial_ids[] = {
+       { .compatible = "atmel,at91sam9260-usart" },
+       { }
+};
+#endif
+
 U_BOOT_DRIVER(serial_atmel) = {
        .name   = "serial_atmel",
        .id     = UCLASS_SERIAL,
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+       .of_match = atmel_serial_ids,
+       .platdata_auto_alloc_size = sizeof(struct atmel_serial_platdata),
+#endif
        .probe = atmel_serial_probe,
        .ops    = &atmel_serial_ops,
        .flags = DM_FLAG_PRE_RELOC,

diff --git a/drivers/serial/serial_linflexuart.c b/drivers/serial/serial_linflexuart.c
new file mode 100644 (file)
index 0000000..fbb3959
--- /dev/null
+++ b/drivers/serial/serial_linflexuart.c
@@ -0,0 +1,223 @@
+/*
+ * (C) Copyright 2013-2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <watchdog.h>
+#include <asm/io.h>
+#include <serial.h>
+#include <linux/compiler.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
+
+#define US1_TDRE            (1 << 7)
+#define US1_RDRF            (1 << 5)
+#define UC2_TE              (1 << 3)
+#define LINCR1_INIT         (1 << 0)
+#define LINCR1_MME          (1 << 4)
+#define LINCR1_BF           (1 << 7)
+#define LINSR_LINS_INITMODE (0x00001000)
+#define LINSR_LINS_MASK     (0x0000F000)
+#define UARTCR_UART         (1 << 0)
+#define UARTCR_WL0          (1 << 1)
+#define UARTCR_PCE          (1 << 2)
+#define UARTCR_PC0          (1 << 3)
+#define UARTCR_TXEN         (1 << 4)
+#define UARTCR_RXEN         (1 << 5)
+#define UARTCR_PC1          (1 << 6)
+#define UARTSR_DTF          (1 << 1)
+#define UARTSR_DRF          (1 << 2)
+#define UARTSR_RMB          (1 << 9)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CONFIG_DM_SERIAL
+#error "The linflex serial driver does not have non-DM support."
+#endif
+
+static void _linflex_serial_setbrg(struct linflex_fsl *base, int baudrate)
+{
+       u32 clk = mxc_get_clock(MXC_UART_CLK);
+       u32 ibr, fbr;
+
+       if (!baudrate)
+               baudrate = CONFIG_BAUDRATE;
+
+       ibr = (u32) (clk / (16 * gd->baudrate));
+       fbr = (u32) (clk % (16 * gd->baudrate)) * 16;
+
+       __raw_writel(ibr, &base->linibrr);
+       __raw_writel(fbr, &base->linfbrr);
+}
+
+static int _linflex_serial_getc(struct linflex_fsl *base)
+{
+       char c;
+
+       if (!(__raw_readb(&base->uartsr) & UARTSR_DRF))
+               return -EAGAIN;
+
+       if (!(__raw_readl(&base->uartsr) & UARTSR_RMB))
+               return -EAGAIN;
+
+       c = __raw_readl(&base->bdrm);
+       __raw_writeb((__raw_readb(&base->uartsr) | (UARTSR_DRF | UARTSR_RMB)),
+                    &base->uartsr);
+       return c;
+}
+
+static int _linflex_serial_putc(struct linflex_fsl *base, const char c)
+{
+       __raw_writeb(c, &base->bdrl);
+
+
+       if (!(__raw_readb(&base->uartsr) & UARTSR_DTF))
+               return -EAGAIN;
+
+       __raw_writeb((__raw_readb(&base->uartsr) | UARTSR_DTF), &base->uartsr);
+
+       return 0;
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+static int _linflex_serial_init(struct linflex_fsl *base)
+{
+       volatile u32 ctrl;
+
+       /* set the Linflex in master mode amd activate by-pass filter */
+       ctrl = LINCR1_BF | LINCR1_MME;
+       __raw_writel(ctrl, &base->lincr1);
+
+       /* init mode */
+       ctrl |= LINCR1_INIT;
+       __raw_writel(ctrl, &base->lincr1);
+
+       /* waiting for init mode entry - TODO: add a timeout */
+       while ((__raw_readl(&base->linsr) & LINSR_LINS_MASK) !=
+              LINSR_LINS_INITMODE);
+
+       /* set UART bit to allow writing other bits */
+       __raw_writel(UARTCR_UART, &base->uartcr);
+
+       /* provide data bits, parity, stop bit, etc */
+       serial_setbrg();
+
+       /* 8 bit data, no parity, Tx and Rx enabled, UART mode */
+       __raw_writel(UARTCR_PC1 | UARTCR_RXEN | UARTCR_TXEN | UARTCR_PC0
+                    | UARTCR_WL0 | UARTCR_UART, &base->uartcr);
+
+       ctrl = __raw_readl(&base->lincr1);
+       ctrl &= ~LINCR1_INIT;
+       __raw_writel(ctrl, &base->lincr1);      /* end init mode */
+
+       return 0;
+}
+
+struct linflex_serial_platdata {
+       struct linflex_fsl *base_addr;
+       u8 port_id; /* do we need this? */
+};
+
+struct linflex_serial_priv {
+       struct linflex_fsl *lfuart;
+};
+
+int linflex_serial_setbrg(struct udevice *dev, int baudrate)
+{
+       struct linflex_serial_priv *priv = dev_get_priv(dev);
+
+       _linflex_serial_setbrg(priv->lfuart, baudrate);
+
+       return 0;
+}
+
+static int linflex_serial_getc(struct udevice *dev)
+{
+       struct linflex_serial_priv *priv = dev_get_priv(dev);
+
+       return _linflex_serial_getc(priv->lfuart);
+}
+
+static int linflex_serial_putc(struct udevice *dev, const char ch)
+{
+
+       struct linflex_serial_priv *priv = dev_get_priv(dev);
+
+       return _linflex_serial_putc(priv->lfuart, ch);
+}
+
+static int linflex_serial_pending(struct udevice *dev, bool input)
+{
+       struct linflex_serial_priv *priv = dev_get_priv(dev);
+       uint32_t uartsr = __raw_readl(&priv->lfuart->uartsr);
+
+       if (input)
+               return ((uartsr & UARTSR_DRF) && (uartsr & UARTSR_RMB)) ? 1 : 0;
+       else
+               return uartsr & UARTSR_DTF ? 0 : 1;
+}
+
+static void linflex_serial_init_internal(struct linflex_fsl *lfuart)
+{
+       _linflex_serial_init(lfuart);
+       _linflex_serial_setbrg(lfuart, CONFIG_BAUDRATE);
+       return;
+}
+
+static int linflex_serial_probe(struct udevice *dev)
+{
+       struct linflex_serial_platdata *plat = dev->platdata;
+       struct linflex_serial_priv *priv = dev_get_priv(dev);
+
+       priv->lfuart = (struct linflex_fsl *)plat->base_addr;
+       linflex_serial_init_internal(priv->lfuart);
+
+       return 0;
+}
+
+static const struct dm_serial_ops linflex_serial_ops = {
+       .putc = linflex_serial_putc,
+       .pending = linflex_serial_pending,
+       .getc = linflex_serial_getc,
+       .setbrg = linflex_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_linflex) = {
+       .name   = "serial_linflex",
+       .id     = UCLASS_SERIAL,
+       .probe = linflex_serial_probe,
+       .ops    = &linflex_serial_ops,
+       .flags = DM_FLAG_PRE_RELOC,
+       .priv_auto_alloc_size   = sizeof(struct linflex_serial_priv),
+};
+
+#ifdef CONFIG_DEBUG_UART_LINFLEXUART
+
+#include <debug_uart.h>
+
+
+static inline void _debug_uart_init(void)
+{
+       struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE;
+
+       linflex_serial_init_internal(base);
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+       struct linflex_fsl *base = (struct linflex_fsl *)CONFIG_DEBUG_UART_BASE;
+
+       /* XXX: Is this OK? Should this use the non-DM version? */
+       _linflex_serial_putc(base, ch);
+}
+
+DEBUG_UART_FUNCS
+
+#endif /* CONFIG_DEBUG_UART_LINFLEXUART */

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index b7fd8e53a2f62d6cd1f7aefa91f82e89c7fe5aea..aca385d5e59f69367fb62e5fca00e708a436b6bc 100644 (file)
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -75,6 +75,14 @@ config ICH_SPI
          access the SPI NOR flash on platforms embedding this Intel
          ICH IP core.
 
+config PIC32_SPI
+       bool "Microchip PIC32 SPI driver"
+       depends on MACH_PIC32
+       help
+         Enable the Microchip PIC32 SPI driver. This driver can be used
+         to access the SPI NOR flash, MMC-over-SPI on platforms based on
+         Microchip PIC32 family devices.
+
 config ROCKCHIP_SPI
        bool "Rockchip SPI driver"
        help

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 7fb2926e78135129939dbad3e789a8d8a0d67ed9..b1d9e2075eb2d1937a464db3b0137642c444a010 100644 (file)
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
 obj-$(CONFIG_MXC_SPI) += mxc_spi.o
 obj-$(CONFIG_MXS_SPI) += mxs_spi.o
 obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
 obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
 obj-$(CONFIG_SH_SPI) += sh_spi.o

diff --git a/drivers/spi/pic32_spi.c b/drivers/spi/pic32_spi.c
new file mode 100644 (file)
index 0000000..25ca1f3
--- /dev/null
+++ b/drivers/spi/pic32_spi.c
@@ -0,0 +1,448 @@
+/*
+ * Microchip PIC32 SPI controller driver.
+ *
+ * Copyright (c) 2015, Microchip Technology Inc.
+ *      Purna Chandra Mandal <purna.mandal@microchip.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <linux/compat.h>
+#include <malloc.h>
+#include <spi.h>
+
+#include <asm/types.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <dt-bindings/clock/microchip,clock.h>
+#include <mach/pic32.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* PIC32 SPI controller registers */
+struct pic32_reg_spi {
+       struct pic32_reg_atomic ctrl;
+       struct pic32_reg_atomic status;
+       struct pic32_reg_atomic buf;
+       struct pic32_reg_atomic baud;
+       struct pic32_reg_atomic ctrl2;
+};
+
+/* Bit fields in SPI Control Register */
+#define PIC32_SPI_CTRL_MSTEN   BIT(5) /* Enable SPI Master */
+#define PIC32_SPI_CTRL_CKP     BIT(6) /* active low */
+#define PIC32_SPI_CTRL_CKE     BIT(8) /* Tx on falling edge */
+#define PIC32_SPI_CTRL_SMP     BIT(9) /* Rx at middle or end of tx */
+#define PIC32_SPI_CTRL_BPW_MASK        0x03   /* Bits per word */
+#define  PIC32_SPI_CTRL_BPW_8          0x0
+#define  PIC32_SPI_CTRL_BPW_16         0x1
+#define  PIC32_SPI_CTRL_BPW_32         0x2
+#define PIC32_SPI_CTRL_BPW_SHIFT       10
+#define PIC32_SPI_CTRL_ON      BIT(15) /* Macro enable */
+#define PIC32_SPI_CTRL_ENHBUF  BIT(16) /* Enable enhanced buffering */
+#define PIC32_SPI_CTRL_MCLKSEL BIT(23) /* Select SPI Clock src */
+#define PIC32_SPI_CTRL_MSSEN   BIT(28) /* SPI macro will drive SS */
+#define PIC32_SPI_CTRL_FRMEN   BIT(31) /* Enable framing mode */
+
+/* Bit fields in SPI Status Register */
+#define PIC32_SPI_STAT_RX_OV           BIT(6) /* err, s/w needs to clear */
+#define PIC32_SPI_STAT_TF_LVL_MASK     0x1f
+#define PIC32_SPI_STAT_TF_LVL_SHIFT    16
+#define PIC32_SPI_STAT_RF_LVL_MASK     0x1f
+#define PIC32_SPI_STAT_RF_LVL_SHIFT    24
+
+/* Bit fields in SPI Baud Register */
+#define PIC32_SPI_BAUD_MASK    0x1ff
+
+struct pic32_spi_priv {
+       struct pic32_reg_spi    *regs;
+       u32                     fifo_depth; /* FIFO depth in bytes */
+       u32                     fifo_n_word; /* FIFO depth in words */
+       struct gpio_desc        cs_gpio;
+
+       /* Current SPI slave specific */
+       ulong                   clk_rate;
+       u32                     speed_hz; /* spi-clk rate */
+       int                     mode;
+
+       /* Current message/transfer state */
+       const void              *tx;
+       const void              *tx_end;
+       const void              *rx;
+       const void              *rx_end;
+       u32                     len;
+
+       /* SPI FiFo accessor */
+       void (*rx_fifo)(struct pic32_spi_priv *);
+       void (*tx_fifo)(struct pic32_spi_priv *);
+};
+
+static inline void pic32_spi_enable(struct pic32_spi_priv *priv)
+{
+       writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.set);
+}
+
+static inline void pic32_spi_disable(struct pic32_spi_priv *priv)
+{
+       writel(PIC32_SPI_CTRL_ON, &priv->regs->ctrl.clr);
+}
+
+static inline u32 pic32_spi_rx_fifo_level(struct pic32_spi_priv *priv)
+{
+       u32 sr = readl(&priv->regs->status.raw);
+
+       return (sr >> PIC32_SPI_STAT_RF_LVL_SHIFT) & PIC32_SPI_STAT_RF_LVL_MASK;
+}
+
+static inline u32 pic32_spi_tx_fifo_level(struct pic32_spi_priv *priv)
+{
+       u32 sr = readl(&priv->regs->status.raw);
+
+       return (sr >> PIC32_SPI_STAT_TF_LVL_SHIFT) & PIC32_SPI_STAT_TF_LVL_MASK;
+}
+
+/* Return the max entries we can fill into tx fifo */
+static u32 pic32_tx_max(struct pic32_spi_priv *priv, int n_bytes)
+{
+       u32 tx_left, tx_room, rxtx_gap;
+
+       tx_left = (priv->tx_end - priv->tx) / n_bytes;
+       tx_room = priv->fifo_n_word - pic32_spi_tx_fifo_level(priv);
+
+       rxtx_gap = (priv->rx_end - priv->rx) - (priv->tx_end - priv->tx);
+       rxtx_gap /= n_bytes;
+       return min3(tx_left, tx_room, (u32)(priv->fifo_n_word - rxtx_gap));
+}
+
+/* Return the max entries we should read out of rx fifo */
+static u32 pic32_rx_max(struct pic32_spi_priv *priv, int n_bytes)
+{
+       u32 rx_left = (priv->rx_end - priv->rx) / n_bytes;
+
+       return min_t(u32, rx_left, pic32_spi_rx_fifo_level(priv));
+}
+
+#define BUILD_SPI_FIFO_RW(__name, __type, __bwl)               \
+static void pic32_spi_rx_##__name(struct pic32_spi_priv *priv) \
+{                                                              \
+       __type val;                                             \
+       u32 mx = pic32_rx_max(priv, sizeof(__type));            \
+                                                               \
+       for (; mx; mx--) {                                      \
+               val = read##__bwl(&priv->regs->buf.raw);        \
+               if (priv->rx_end - priv->len)                   \
+                       *(__type *)(priv->rx) = val;            \
+               priv->rx += sizeof(__type);                     \
+       }                                                       \
+}                                                              \
+                                                               \
+static void pic32_spi_tx_##__name(struct pic32_spi_priv *priv) \
+{                                                              \
+       __type val;                                             \
+       u32 mx = pic32_tx_max(priv, sizeof(__type));            \
+                                                               \
+       for (; mx ; mx--) {                                     \
+               val = (__type) ~0U;                             \
+               if (priv->tx_end - priv->len)                   \
+                       val =  *(__type *)(priv->tx);           \
+               write##__bwl(val, &priv->regs->buf.raw);        \
+               priv->tx += sizeof(__type);                     \
+       }                                                       \
+}
+BUILD_SPI_FIFO_RW(byte, u8, b);
+BUILD_SPI_FIFO_RW(word, u16, w);
+BUILD_SPI_FIFO_RW(dword, u32, l);
+
+static int pic32_spi_set_word_size(struct pic32_spi_priv *priv,
+                                  unsigned int wordlen)
+{
+       u32 bits_per_word;
+       u32 val;
+
+       switch (wordlen) {
+       case 8:
+               priv->rx_fifo = pic32_spi_rx_byte;
+               priv->tx_fifo = pic32_spi_tx_byte;
+               bits_per_word = PIC32_SPI_CTRL_BPW_8;
+               break;
+       case 16:
+               priv->rx_fifo = pic32_spi_rx_word;
+               priv->tx_fifo = pic32_spi_tx_word;
+               bits_per_word = PIC32_SPI_CTRL_BPW_16;
+               break;
+       case 32:
+               priv->rx_fifo = pic32_spi_rx_dword;
+               priv->tx_fifo = pic32_spi_tx_dword;
+               bits_per_word = PIC32_SPI_CTRL_BPW_32;
+               break;
+       default:
+               printf("pic32-spi: unsupported wordlen\n");
+               return -EINVAL;
+       }
+
+       /* set bits-per-word */
+       val = readl(&priv->regs->ctrl.raw);
+       val &= ~(PIC32_SPI_CTRL_BPW_MASK << PIC32_SPI_CTRL_BPW_SHIFT);
+       val |= bits_per_word << PIC32_SPI_CTRL_BPW_SHIFT;
+       writel(val, &priv->regs->ctrl.raw);
+
+       /* calculate maximum number of words fifo can hold */
+       priv->fifo_n_word = DIV_ROUND_UP(priv->fifo_depth, wordlen / 8);
+
+       return 0;
+}
+
+static int pic32_spi_claim_bus(struct udevice *slave)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(slave->parent);
+
+       /* enable chip */
+       pic32_spi_enable(priv);
+
+       return 0;
+}
+
+static int pic32_spi_release_bus(struct udevice *slave)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(slave->parent);
+
+       /* disable chip */
+       pic32_spi_disable(priv);
+
+       return 0;
+}
+
+static void spi_cs_activate(struct pic32_spi_priv *priv)
+{
+       if (!dm_gpio_is_valid(&priv->cs_gpio))
+               return;
+
+       dm_gpio_set_value(&priv->cs_gpio, 1);
+}
+
+static void spi_cs_deactivate(struct pic32_spi_priv *priv)
+{
+       if (!dm_gpio_is_valid(&priv->cs_gpio))
+               return;
+
+       dm_gpio_set_value(&priv->cs_gpio, 0);
+}
+
+static int pic32_spi_xfer(struct udevice *slave, unsigned int bitlen,
+                         const void *tx_buf, void *rx_buf,
+                         unsigned long flags)
+{
+       struct dm_spi_slave_platdata *slave_plat;
+       struct udevice *bus = slave->parent;
+       struct pic32_spi_priv *priv;
+       int len = bitlen / 8;
+       int ret = 0;
+       ulong tbase;
+
+       priv = dev_get_priv(bus);
+       slave_plat = dev_get_parent_platdata(slave);
+
+       debug("spi_xfer: bus:%i cs:%i flags:%lx\n",
+             bus->seq, slave_plat->cs, flags);
+       debug("msg tx %p, rx %p submitted of %d byte(s)\n",
+             tx_buf, rx_buf, len);
+
+       /* assert cs */
+       if (flags & SPI_XFER_BEGIN)
+               spi_cs_activate(priv);
+
+       /* set current transfer information */
+       priv->tx = tx_buf;
+       priv->rx = rx_buf;
+       priv->tx_end = priv->tx + len;
+       priv->rx_end = priv->rx + len;
+       priv->len = len;
+
+       /* transact by polling */
+       tbase = get_timer(0);
+       for (;;) {
+               priv->tx_fifo(priv);
+               priv->rx_fifo(priv);
+
+               /* received sufficient data */
+               if (priv->rx >= priv->rx_end) {
+                       ret = 0;
+                       break;
+               }
+
+               if (get_timer(tbase) > 5 * CONFIG_SYS_HZ) {
+                       printf("pic32_spi: error, xfer timedout.\n");
+                       flags |= SPI_XFER_END;
+                       ret = -ETIMEDOUT;
+                       break;
+               }
+       }
+
+       /* deassert cs */
+       if (flags & SPI_XFER_END)
+               spi_cs_deactivate(priv);
+
+       return ret;
+}
+
+static int pic32_spi_set_speed(struct udevice *bus, uint speed)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(bus);
+       u32 div;
+
+       debug("%s: %s, speed %u\n", __func__, bus->name, speed);
+
+       /* div = [clk_in / (2 * spi_clk)] - 1 */
+       div = (priv->clk_rate / 2 / speed) - 1;
+       div &= PIC32_SPI_BAUD_MASK;
+       writel(div, &priv->regs->baud.raw);
+
+       priv->speed_hz = speed;
+
+       return 0;
+}
+
+static int pic32_spi_set_mode(struct udevice *bus, uint mode)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(bus);
+       u32 val;
+
+       debug("%s: %s, mode %d\n", __func__, bus->name, mode);
+
+       /* set spi-clk mode */
+       val = readl(&priv->regs->ctrl.raw);
+       /* HIGH when idle */
+       if (mode & SPI_CPOL)
+               val |= PIC32_SPI_CTRL_CKP;
+       else
+               val &= ~PIC32_SPI_CTRL_CKP;
+
+       /* TX at idle-to-active clk transition */
+       if (mode & SPI_CPHA)
+               val &= ~PIC32_SPI_CTRL_CKE;
+       else
+               val |= PIC32_SPI_CTRL_CKE;
+
+       /* RX at end of tx */
+       val |= PIC32_SPI_CTRL_SMP;
+       writel(val, &priv->regs->ctrl.raw);
+
+       priv->mode = mode;
+
+       return 0;
+}
+
+static int pic32_spi_set_wordlen(struct udevice *slave, unsigned int wordlen)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(slave->parent);
+
+       return pic32_spi_set_word_size(priv, wordlen);
+}
+
+static void pic32_spi_hw_init(struct pic32_spi_priv *priv)
+{
+       u32 val;
+
+       /* disable module */
+       pic32_spi_disable(priv);
+
+       val = readl(&priv->regs->ctrl);
+
+       /* enable enhanced fifo of 128bit deep */
+       val |= PIC32_SPI_CTRL_ENHBUF;
+       priv->fifo_depth = 16;
+
+       /* disable framing mode */
+       val &= ~PIC32_SPI_CTRL_FRMEN;
+
+       /* enable master mode */
+       val |= PIC32_SPI_CTRL_MSTEN;
+
+       /* select clk source */
+       val &= ~PIC32_SPI_CTRL_MCLKSEL;
+
+       /* set manual /CS mode */
+       val &= ~PIC32_SPI_CTRL_MSSEN;
+
+       writel(val, &priv->regs->ctrl);
+
+       /* clear rx overflow indicator */
+       writel(PIC32_SPI_STAT_RX_OV, &priv->regs->status.clr);
+}
+
+static int pic32_spi_probe(struct udevice *bus)
+{
+       struct pic32_spi_priv *priv = dev_get_priv(bus);
+       struct dm_spi_bus *dm_spi = dev_get_uclass_priv(bus);
+       struct udevice *clkdev;
+       fdt_addr_t addr;
+       fdt_size_t size;
+       int ret;
+
+       debug("%s: %d, bus: %i\n", __func__, __LINE__, bus->seq);
+       addr = fdtdec_get_addr_size(gd->fdt_blob, bus->of_offset, "reg", &size);
+       if (addr == FDT_ADDR_T_NONE)
+               return -EINVAL;
+
+       priv->regs = ioremap(addr, size);
+       if (!priv->regs)
+               return -EINVAL;
+
+       dm_spi->max_hz = fdtdec_get_int(gd->fdt_blob, bus->of_offset,
+                                       "spi-max-frequency", 250000000);
+       /* get clock rate */
+       ret = clk_get_by_index(bus, 0, &clkdev);
+       if (ret < 0) {
+               printf("pic32-spi: error, clk not found\n");
+               return ret;
+       }
+       priv->clk_rate = clk_get_periph_rate(clkdev, ret);
+
+       /* initialize HW */
+       pic32_spi_hw_init(priv);
+
+       /* set word len */
+       pic32_spi_set_word_size(priv, SPI_DEFAULT_WORDLEN);
+
+       /* PIC32 SPI controller can automatically drive /CS during transfer
+        * depending on fifo fill-level. /CS will stay asserted as long as
+        * TX fifo is non-empty, else will be deasserted confirming completion
+        * of the ongoing transfer. To avoid this sort of error we will drive
+        * /CS manually by toggling cs-gpio pins.
+        */
+       ret = gpio_request_by_name_nodev(gd->fdt_blob, bus->of_offset,
+                                        "cs-gpios", 0,
+                                        &priv->cs_gpio, GPIOD_IS_OUT);
+       if (ret) {
+               printf("pic32-spi: error, cs-gpios not found\n");
+               return ret;
+       }
+
+       return 0;
+}
+
+static const struct dm_spi_ops pic32_spi_ops = {
+       .claim_bus      = pic32_spi_claim_bus,
+       .release_bus    = pic32_spi_release_bus,
+       .xfer           = pic32_spi_xfer,
+       .set_speed      = pic32_spi_set_speed,
+       .set_mode       = pic32_spi_set_mode,
+       .set_wordlen    = pic32_spi_set_wordlen,
+};
+
+static const struct udevice_id pic32_spi_ids[] = {
+       { .compatible = "microchip,pic32mzda-spi" },
+       { }
+};
+
+U_BOOT_DRIVER(pic32_spi) = {
+       .name           = "pic32_spi",
+       .id             = UCLASS_SPI,
+       .of_match       = pic32_spi_ids,
+       .ops            = &pic32_spi_ops,
+       .priv_auto_alloc_size = sizeof(struct pic32_spi_priv),
+       .probe          = pic32_spi_probe,
+};

diff --git a/drivers/usb/common/Makefile b/drivers/usb/common/Makefile
index 2f46d38d2b31ec9c82ca371954f45155923d7264..aee7e32e59a3773d59d7484a012a483b8fd1a489 100644 (file)
--- a/drivers/usb/common/Makefile
+++ b/drivers/usb/common/Makefile
@@ -4,5 +4,5 @@
 #
 
 obj-$(CONFIG_DM_USB) += common.o
-obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o
-obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o
+obj-$(CONFIG_USB_EHCI_FSL) += fsl-dt-fixup.o fsl-errata.o
+obj-$(CONFIG_USB_XHCI_FSL) += fsl-dt-fixup.o fsl-errata.o

diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c
index 6f31932c37c10139e7cb189107163b48a4103227..9c48852ea08bf8a5d51e0c2aac740ff42dadb802 100644 (file)
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -12,6 +12,7 @@
 #include <usb.h>
 #include <asm/io.h>
 #include <hwconfig.h>
+#include <fsl_errata.h>
 #include <fsl_usb.h>
 #include <fdt_support.h>
 
@@ -19,10 +20,16 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 #endif
 
+/* USB Controllers */
+#define FSL_USB2_MPH   "fsl-usb2-mph"
+#define FSL_USB2_DR    "fsl-usb2-dr"
+#define CHIPIDEA_USB2  "chipidea,usb2"
+#define SNPS_DWC3      "snps,dwc3"
+
 static const char * const compat_usb_fsl[] = {
-       "fsl-usb2-mph",
-       "fsl-usb2-dr",
-       "snps,dwc3",
+       FSL_USB2_MPH,
+       FSL_USB2_DR,
+       SNPS_DWC3,
        NULL
 };
 
@@ -80,16 +87,24 @@ static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
 }
 
 static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
-                                int start_offset)
+                                const char *controller_type, int start_offset)
 {
        int node_offset, err;
        const char *node_type = NULL;
+       const char *node_name = NULL;
 
        err = fdt_usb_get_node_type(blob, start_offset,
                                    &node_offset, &node_type);
        if (err < 0)
                return err;
 
+       if (!strcmp(node_type, FSL_USB2_MPH) || !strcmp(node_type, FSL_USB2_DR))
+               node_name = CHIPIDEA_USB2;
+       else
+               node_name = node_type;
+       if (strcmp(node_name, controller_type))
+               return err;
+
        err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
        if (err < 0) {
                printf("ERROR: could not set %s for %s: %s.\n",
@@ -99,6 +114,23 @@ static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
        return node_offset;
 }
 
+static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+                            const char *controller_type, char *str,
+                            bool (*has_erratum)(void))
+{
+       char buf[32] = {0};
+
+       snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
+       if (!has_erratum())
+               return -EINVAL;
+       *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
+                                                *usb_erratum_off);
+       if (*usb_erratum_off < 0)
+               return -ENOSPC;
+       debug("Adding USB erratum %s\n", str);
+       return 0;
+}
+
 void fdt_fixup_dr_usb(void *blob, bd_t *bd)
 {
        static const char * const modes[] = { "host", "peripheral", "otg" };
@@ -107,10 +139,12 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
        int usb_erratum_a007075_off = -1;
        int usb_erratum_a007792_off = -1;
        int usb_erratum_a005697_off = -1;
+       int usb_erratum_a008751_off = -1;
        int usb_mode_off = -1;
        int usb_phy_off = -1;
        char str[5];
        int i, j;
+       int ret;
 
        for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
                const char *dr_mode_type = NULL;
@@ -164,39 +198,31 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd)
                if (usb_phy_off < 0)
                        return;
 
-               if (has_erratum_a006261()) {
-                       usb_erratum_a006261_off =  fdt_fixup_usb_erratum
-                                                  (blob,
-                                                   "fsl,usb-erratum-a006261",
-                                                   usb_erratum_a006261_off);
-                       if (usb_erratum_a006261_off < 0)
-                               return;
-               }
-
-               if (has_erratum_a007075()) {
-                       usb_erratum_a007075_off =  fdt_fixup_usb_erratum
-                                                  (blob,
-                                                   "fsl,usb-erratum-a007075",
-                                                   usb_erratum_a007075_off);
-                       if (usb_erratum_a007075_off < 0)
-                               return;
-               }
+               ret = fdt_fixup_erratum(&usb_erratum_a006261_off, blob,
+                                       CHIPIDEA_USB2, "a006261",
+                                       has_erratum_a006261);
+               if (ret == -ENOSPC)
+                       return;
+               ret = fdt_fixup_erratum(&usb_erratum_a007075_off, blob,
+                                       CHIPIDEA_USB2, "a007075",
+                                       has_erratum_a007075);
+               if (ret == -ENOSPC)
+                       return;
+               ret = fdt_fixup_erratum(&usb_erratum_a007792_off, blob,
+                                       CHIPIDEA_USB2, "a007792",
+                                       has_erratum_a007792);
+               if (ret == -ENOSPC)
+                       return;
+               ret = fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
+                                       CHIPIDEA_USB2, "a005697",
+                                       has_erratum_a005697);
+               if (ret == -ENOSPC)
+                       return;
+               ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
+                                       SNPS_DWC3, "a008751",
+                                       has_erratum_a008751);
+               if (ret == -ENOSPC)
+                       return;
 
-               if (has_erratum_a007792()) {
-                       usb_erratum_a007792_off =  fdt_fixup_usb_erratum
-                                                  (blob,
-                                                   "fsl,usb-erratum-a007792",
-                                                   usb_erratum_a007792_off);
-                       if (usb_erratum_a007792_off < 0)
-                               return;
-               }
-               if (has_erratum_a005697()) {
-                       usb_erratum_a005697_off =  fdt_fixup_usb_erratum
-                                                  (blob,
-                                                   "fsl,usb-erratum-a005697",
-                                                   usb_erratum_a005697_off);
-                       if (usb_erratum_a005697_off < 0)
-                               return;
-               }
        }
 }

diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
new file mode 100644 (file)
index 0000000..ebe60a8
--- /dev/null
+++ b/drivers/usb/common/fsl-errata.c
@@ -0,0 +1,193 @@
+/*
+ * Freescale USB Controller
+ *
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <fsl_errata.h>
+#include<fsl_usb.h>
+
+/* USB Erratum Checking code */
+#if defined(CONFIG_PPC) || defined(CONFIG_ARM)
+bool has_dual_phy(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_T1023:
+       case SVR_T1024:
+       case SVR_T1013:
+       case SVR_T1014:
+               return IS_SVR_REV(svr, 1, 0);
+       case SVR_T1040:
+       case SVR_T1042:
+       case SVR_T1020:
+       case SVR_T1022:
+       case SVR_T2080:
+       case SVR_T2081:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+       case SVR_T4240:
+       case SVR_T4160:
+       case SVR_T4080:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+#endif
+       }
+
+       return false;
+}
+
+bool has_erratum_a006261(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_P1010:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P2041:
+       case SVR_P2040:
+               return IS_SVR_REV(svr, 1, 0) ||
+                       IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
+       case SVR_P3041:
+               return IS_SVR_REV(svr, 1, 0) ||
+                       IS_SVR_REV(svr, 1, 1) ||
+                       IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
+       case SVR_P5010:
+       case SVR_P5020:
+       case SVR_P5021:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_T4240:
+       case SVR_T4160:
+       case SVR_T4080:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_T1040:
+               return IS_SVR_REV(svr, 1, 0);
+       case SVR_T2080:
+       case SVR_T2081:
+               return IS_SVR_REV(svr, 1, 0);
+       case SVR_P5040:
+               return IS_SVR_REV(svr, 1, 0);
+#endif
+       }
+
+       return false;
+}
+
+bool has_erratum_a007075(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_B4860:
+       case SVR_B4420:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P1010:
+               return IS_SVR_REV(svr, 1, 0);
+       case SVR_P4080:
+               return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+#endif
+       }
+       return false;
+}
+
+bool has_erratum_a007798(void)
+{
+#ifdef CONFIG_PPC
+       return SVR_SOC_VER(get_svr()) == SVR_T4240 &&
+               IS_SVR_REV(get_svr(), 2, 0);
+#endif
+       return false;
+}
+
+bool has_erratum_a007792(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_T4240:
+       case SVR_T4160:
+       case SVR_T4080:
+               return IS_SVR_REV(svr, 2, 0);
+       case SVR_T1024:
+       case SVR_T1023:
+               return IS_SVR_REV(svr, 1, 0);
+       case SVR_T1040:
+       case SVR_T1042:
+       case SVR_T1020:
+       case SVR_T1022:
+       case SVR_T2080:
+       case SVR_T2081:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+       }
+       return false;
+}
+
+bool has_erratum_a005697(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_9131:
+       case SVR_9132:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+       }
+       return false;
+}
+
+bool has_erratum_a004477(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_PPC
+       case SVR_P1010:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P1022:
+       case SVR_9131:
+       case SVR_9132:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+       case SVR_P2020:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) ||
+                       IS_SVR_REV(svr, 2, 1);
+       case SVR_B4860:
+       case SVR_B4420:
+               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
+       case SVR_P4080:
+               return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
+#endif
+       }
+
+       return false;
+}
+
+bool has_erratum_a008751(void)
+{
+       u32 svr = get_svr();
+       u32 soc = SVR_SOC_VER(svr);
+
+       switch (soc) {
+#ifdef CONFIG_ARM64
+       case SVR_LS2080:
+       case SVR_LS2085:
+               return IS_SVR_REV(svr, 1, 0);
+#endif
+       }
+       return false;
+}
+
+#endif

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index a35a1c7760a5d22e07427fcc7d5c3d8ea99c92d0..ae624766c10cbb2720e7853b01931ba62ac1f5df 100644 (file)
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -52,6 +52,16 @@ config USB_GADGET_DWC2_OTG
          driver to operate in Peripheral mode. This option requires
          USB_GADGET to be enabled.
 
+if USB_GADGET_DWC2_OTG
+
+config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
+       bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width"
+       help
+         Set the Designware USB2.0 high-speed OTG controller
+         PHY interface width to 8 bits, rather than the default (16 bits).
+
+endif # USB_GADGET_DWC2_OTG
+
 config CI_UDC
        bool "ChipIdea device controller"
        select USB_GADGET_DUALSPEED

diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index cb20b00a56ba70716ceb1d1c0f50d193ea2d2bec..a23278d957a6a184e4d04b184c860afa0a401c66 100644 (file)
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev)
                |0<<7           /* Ulpi DDR sel*/
                |0<<6           /* 0: high speed utmi+, 1: full speed serial*/
                |0<<4           /* 0: utmi+, 1:ulpi*/
+#ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
+               |0<<3           /* phy i/f  0:8bit, 1:16bit*/
+#else
                |1<<3           /* phy i/f  0:8bit, 1:16bit*/
+#endif
                |0x7<<0;        /* HS/FS Timeout**/
 
        if (dev->pdata->usb_gusbcfg)

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index fa5d584b82e4a4c7f61168436049fa1d267a58a0..13aa70d606614a61eb0db6fd04a4651786958671 100644 (file)
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -210,6 +210,9 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl)
                return -EINVAL;
 
        cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
+       /* If not run, directly return */
+       if (!(cmd & CMD_RUN))
+               return 0;
        cmd &= ~(CMD_PSE | CMD_ASE);
        ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
        ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,

diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 05f09d7600b803a183709121eeed33d1d21bb840..c12a1894857802e6b8c98c485e7b3db1909cf5e2 100644 (file)
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -15,6 +15,8 @@
 #include <linux/usb/xhci-fsl.h>
 #include <linux/usb/dwc3.h>
 #include "xhci.h"
+#include <fsl_errata.h>
+#include <fsl_usb.h>
 
 /* Declare global data pointer */
 DECLARE_GLOBAL_DATA_PTR;
@@ -27,6 +29,26 @@ __weak int __board_usb_init(int index, enum usb_init_type init)
        return 0;
 }
 
+static int erratum_a008751(void)
+{
+#if defined(CONFIG_TARGET_LS2080AQDS) || defined(CONFIG_TARGET_LS2080ARDB)
+       u32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;
+       writel(SCFG_USB3PRM1CR_INIT, scfg + SCFG_USB3PRM1CR / 4);
+       return 0;
+#endif
+       return 1;
+}
+
+static void fsl_apply_xhci_errata(void)
+{
+       int ret;
+       if (has_erratum_a008751()) {
+               ret = erratum_a008751();
+               if (ret != 0)
+                       puts("Failed to apply erratum a008751\n");
+       }
+}
+
 static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
 {
        int ret = 0;
@@ -69,6 +91,8 @@ int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
                return ret;
        }
 
+       fsl_apply_xhci_errata();
+
        ret = fsl_xhci_core_init(ctx);
        if (ret < 0) {
                puts("Failed to initialize xhci\n");

diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 3081afca0e28befb2ccb50ee41dfc238de18a8ab..c016a0bb544dd82a86a6a6dfe780d58c5bcc426f 100644 (file)
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -340,9 +340,16 @@ int musb_usb_probe(struct udevice *dev)
 int musb_usb_remove(struct udevice *dev)
 {
        struct musb_host_data *host = dev_get_priv(dev);
+       struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
        musb_stop(host->host);
 
+       sunxi_usb_phy_exit(0);
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+       clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+#endif
+       clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+
        return 0;
 }
 

diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index d43d8a59d3b78606ea242b0334dac690d511e0b4..39cd7caff16dbf25c3ff9e1f89bb95b032a71bf8 100644 (file)
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -7,6 +7,10 @@
  */
 
 #include <common.h>
+#include <atmel_lcd.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <video.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
@@ -14,6 +18,21 @@
 #include <bmp_layout.h>
 #include <atmel_lcdc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_DM_VIDEO
+enum {
+       /* Maximum LCD size we support */
+       LCD_MAX_WIDTH           = 1366,
+       LCD_MAX_HEIGHT          = 768,
+       LCD_MAX_LOG2_BPP        = VIDEO_BPP16,
+};
+#endif
+
+struct atmel_fb_priv {
+       struct display_timing timing;
+};
+
 /* configurable parameters */
 #define ATMEL_LCDC_CVAL_DEFAULT                0xc8
 #define ATMEL_LCDC_DMA_BURST_LEN       8
@@ -30,6 +49,7 @@
 #define lcdc_readl(mmio, reg)          __raw_readl((mmio)+(reg))
 #define lcdc_writel(mmio, reg, val)    __raw_writel((val), (mmio)+(reg))
 
+#ifndef CONFIG_DM_VIDEO
 ushort *configuration_get_cmap(void)
 {
        return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0));
@@ -90,40 +110,43 @@ void lcd_set_cmap(struct bmp_image *bmp, unsigned colors)
                lcd_setcolreg(i, cte.red, cte.green, cte.blue);
        }
 }
+#endif
 
-void lcd_ctrl_init(void *lcdbase)
+static void atmel_fb_init(ulong addr, struct display_timing *timing, int bpix,
+                         bool tft, bool cont_pol_low, ulong lcdbase)
 {
        unsigned long value;
+       void *reg = (void *)addr;
 
        /* Turn off the LCD controller and the DMA controller */
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
+       lcdc_writel(reg, ATMEL_LCDC_PWRCON,
                    ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET);
 
        /* Wait for the LCDC core to become idle */
-       while (lcdc_readl(panel_info.mmio, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
+       while (lcdc_readl(reg, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
                udelay(10);
 
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, 0);
+       lcdc_writel(reg, ATMEL_LCDC_DMACON, 0);
 
        /* Reset LCDC DMA */
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
+       lcdc_writel(reg, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
 
        /* ...set frame size and burst length = 8 words (?) */
-       value = (panel_info.vl_col * panel_info.vl_row *
-                NBITS(panel_info.vl_bpix)) / 32;
+       value = (timing->hactive.typ * timing->vactive.typ *
+                (1 << bpix)) / 32;
        value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMAFRMCFG, value);
+       lcdc_writel(reg, ATMEL_LCDC_DMAFRMCFG, value);
 
        /* Set pixel clock */
-       value = get_lcdc_clk_rate(0) / panel_info.vl_clk;
-       if (get_lcdc_clk_rate(0) % panel_info.vl_clk)
+       value = get_lcdc_clk_rate(0) / timing->pixelclock.typ;
+       if (get_lcdc_clk_rate(0) % timing->pixelclock.typ)
                value++;
        value = (value / 2) - 1;
 
        if (!value) {
-               lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
+               lcdc_writel(reg, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
        } else
-               lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON1,
+               lcdc_writel(reg, ATMEL_LCDC_LCDCON1,
                            value << ATMEL_LCDC_CLKVAL_OFFSET);
 
        /* Initialize control register 2 */
@@ -132,58 +155,160 @@ void lcd_ctrl_init(void *lcdbase)
 #else
        value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
 #endif
-       if (panel_info.vl_tft)
+       if (tft)
                value |= ATMEL_LCDC_DISTYPE_TFT;
 
-       value |= panel_info.vl_sync;
-       value |= (panel_info.vl_bpix << 5);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDCON2, value);
+       if (!(timing->flags & DISPLAY_FLAGS_HSYNC_HIGH))
+               value |= ATMEL_LCDC_INVLINE_INVERTED;
+       if (!(timing->flags & DISPLAY_FLAGS_VSYNC_HIGH))
+               value |= ATMEL_LCDC_INVFRAME_INVERTED;
+       value |= bpix << 5;
+       lcdc_writel(reg, ATMEL_LCDC_LCDCON2, value);
 
        /* Vertical timing */
-       value = (panel_info.vl_vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
-       value |= panel_info.vl_upper_margin << ATMEL_LCDC_VBP_OFFSET;
-       value |= panel_info.vl_lower_margin;
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM1, value);
+       value = (timing->vsync_len.typ - 1) << ATMEL_LCDC_VPW_OFFSET;
+       value |= timing->vback_porch.typ << ATMEL_LCDC_VBP_OFFSET;
+       value |= timing->vfront_porch.typ;
+       /* Magic! (Datasheet says "Bit 31 must be written to 1") */
+       value |= 1U << 31;
+       lcdc_writel(reg, ATMEL_LCDC_TIM1, value);
 
        /* Horizontal timing */
-       value = (panel_info.vl_right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
-       value |= (panel_info.vl_hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
-       value |= (panel_info.vl_left_margin - 1);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_TIM2, value);
+       value = (timing->hfront_porch.typ - 1) << ATMEL_LCDC_HFP_OFFSET;
+       value |= (timing->hsync_len.typ - 1) << ATMEL_LCDC_HPW_OFFSET;
+       value |= (timing->hback_porch.typ - 1);
+       lcdc_writel(reg, ATMEL_LCDC_TIM2, value);
 
        /* Display size */
-       value = (panel_info.vl_col - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
-       value |= panel_info.vl_row - 1;
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_LCDFRMCFG, value);
+       value = (timing->hactive.typ - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
+       value |= timing->vactive.typ - 1;
+       lcdc_writel(reg, ATMEL_LCDC_LCDFRMCFG, value);
 
        /* FIFO Threshold: Use formula from data sheet */
        value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_FIFO, value);
+       lcdc_writel(reg, ATMEL_LCDC_FIFO, value);
 
        /* Toggle LCD_MODE every frame */
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_MVAL, 0);
+       lcdc_writel(reg, ATMEL_LCDC_MVAL, 0);
 
        /* Disable all interrupts */
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_IDR, ~0UL);
+       lcdc_writel(reg, ATMEL_LCDC_IDR, ~0UL);
 
        /* Set contrast */
        value = ATMEL_LCDC_PS_DIV8 |
                ATMEL_LCDC_ENA_PWMENABLE;
-       if (!panel_info.vl_cont_pol_low)
+       if (!cont_pol_low)
                value |= ATMEL_LCDC_POL_POSITIVE;
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_CTR, value);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
+       lcdc_writel(reg, ATMEL_LCDC_CONTRAST_CTR, value);
+       lcdc_writel(reg, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
 
        /* Set framebuffer DMA base address and pixel offset */
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMABADDR1, (u_long)lcdbase);
+       lcdc_writel(reg, ATMEL_LCDC_DMABADDR1, lcdbase);
 
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMAEN);
-       lcdc_writel(panel_info.mmio, ATMEL_LCDC_PWRCON,
+       lcdc_writel(reg, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMAEN);
+       lcdc_writel(reg, ATMEL_LCDC_PWRCON,
                    (ATMEL_LCDC_GUARD_TIME << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
 }
 
+#ifndef CONFIG_DM_VIDEO
+void lcd_ctrl_init(void *lcdbase)
+{
+       struct display_timing timing;
+
+       timing.flags = 0;
+       if (!(panel_info.vl_sync & ATMEL_LCDC_INVLINE_INVERTED))
+               timing.flags |= DISPLAY_FLAGS_HSYNC_HIGH;
+       if (!(panel_info.vl_sync & ATMEL_LCDC_INVFRAME_INVERTED))
+               timing.flags |= DISPLAY_FLAGS_VSYNC_LOW;
+       timing.pixelclock.typ = panel_info.vl_clk;
+
+       timing.hactive.typ = panel_info.vl_col;
+       timing.hfront_porch.typ = panel_info.vl_right_margin;
+       timing.hback_porch.typ = panel_info.vl_left_margin;
+       timing.hsync_len.typ = panel_info.vl_hsync_len;
+
+       timing.vactive.typ = panel_info.vl_row;
+       timing.vfront_porch.typ = panel_info.vl_clk;
+       timing.vback_porch.typ = panel_info.vl_clk;
+       timing.vsync_len.typ = panel_info.vl_clk;
+
+       atmel_fb_init(panel_info.mmio, &timing, panel_info.vl_bpix,
+                     panel_info.vl_tft, panel_info.vl_cont_pol_low,
+                     (ulong)lcdbase);
+}
+
 ulong calc_fbsize(void)
 {
        return ((panel_info.vl_col * panel_info.vl_row *
                NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
 }
+#endif
+
+#ifdef CONFIG_DM_VIDEO
+static int atmel_fb_lcd_probe(struct udevice *dev)
+{
+       struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
+       struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+       struct atmel_fb_priv *priv = dev_get_priv(dev);
+       struct display_timing *timing = &priv->timing;
+
+       /*
+        * For now some values are hard-coded. We could use the device tree
+        * bindings in simple-framebuffer.txt to specify the format/bpp and
+        * some Atmel-specific binding for tft and cont_pol_low.
+        */
+       atmel_fb_init(ATMEL_BASE_LCDC, timing, VIDEO_BPP16, true, false,
+                     uc_plat->base);
+       uc_priv->xsize = timing->hactive.typ;
+       uc_priv->ysize = timing->vactive.typ;
+       uc_priv->bpix = VIDEO_BPP16;
+       video_set_flush_dcache(dev, true);
+       debug("LCD frame buffer at %lx, size %x, %dx%d pixels\n", uc_plat->base,
+             uc_plat->size, uc_priv->xsize, uc_priv->ysize);
+
+       return 0;
+}
+
+static int atmel_fb_ofdata_to_platdata(struct udevice *dev)
+{
+       struct atmel_lcd_platdata *plat = dev_get_platdata(dev);
+       struct atmel_fb_priv *priv = dev_get_priv(dev);
+       struct display_timing *timing = &priv->timing;
+       const void *blob = gd->fdt_blob;
+
+       if (fdtdec_decode_display_timing(blob, dev->of_offset,
+                                        plat->timing_index, timing)) {
+               debug("%s: Failed to decode display timing\n", __func__);
+               return -EINVAL;
+       }
+
+       return 0;
+}
+
+static int atmel_fb_lcd_bind(struct udevice *dev)
+{
+       struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
+
+       uc_plat->size = LCD_MAX_WIDTH * LCD_MAX_HEIGHT *
+                       (1 << VIDEO_BPP16) / 8;
+       debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
+
+       return 0;
+}
+
+static const struct udevice_id atmel_fb_lcd_ids[] = {
+       { .compatible = "atmel,at91sam9g45-lcdc" },
+       { }
+};
+
+U_BOOT_DRIVER(atmel_fb) = {
+       .name   = "atmel_fb",
+       .id     = UCLASS_VIDEO,
+       .of_match = atmel_fb_lcd_ids,
+       .bind   = atmel_fb_lcd_bind,
+       .ofdata_to_platdata     = atmel_fb_ofdata_to_platdata,
+       .probe  = atmel_fb_lcd_probe,
+       .platdata_auto_alloc_size = sizeof(struct atmel_lcd_platdata),
+       .priv_auto_alloc_size   = sizeof(struct atmel_fb_priv),
+};
+#endif

diff --git a/include/atmel_lcd.h b/include/atmel_lcd.h
index 6993128b1b4c37df8d6c544cb2e06e0f220269c0..8a2f46f6c7bca9abdf9fdb76538496d06ca2a90d 100644 (file)
--- a/include/atmel_lcd.h
+++ b/include/atmel_lcd.h
@@ -10,6 +10,15 @@
 #ifndef _ATMEL_LCD_H_
 #define _ATMEL_LCD_H_
 
+/**
+ * struct atmel_lcd_platdata - platform data for Atmel LCDs with driver model
+ *
+ * @timing_index:      Index of LCD timing to use in device tree node
+ */
+struct atmel_lcd_platdata {
+       int timing_index;
+};
+
 typedef struct vidinfo {
        ushort vl_col;          /* Number of columns (i.e. 640) */
        ushort vl_row;          /* Number of rows (i.e. 480) */

diff --git a/include/bootstage.h b/include/bootstage.h
index 0880a680b9ea3e4472528df3542f55d592afc0b1..a589be6316ee45ff73e7102143523599f5a5c6eb 100644 (file)
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -213,7 +213,9 @@ enum bootstage_id {
  */
 ulong timer_get_boot_us(void);
 
-#if !defined(CONFIG_SPL_BUILD) && !defined(USE_HOSTCC)
+#if defined(USE_HOSTCC)
+#define show_boot_progress(val) do {} while (0)
+#else
 /*
  * Board code can implement show_boot_progress() if needed.
  *
@@ -221,8 +223,6 @@ ulong timer_get_boot_us(void);
  *             has occurred.
  */
 void show_boot_progress(int val);
-#else
-#define show_boot_progress(val) do {} while (0)
 #endif
 
 #if defined(CONFIG_BOOTSTAGE) && !defined(CONFIG_SPL_BUILD) && \

diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h
index dfc2cbc02238397acb3bafe4b626440bbcb82793..92446804526267116185e026ad7aec19ea33783c 100644 (file)
--- a/include/config_distro_defaults.h
+++ b/include/config_distro_defaults.h
@@ -27,7 +27,6 @@
 
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_AUTO_COMPLETE
-#define CONFIG_BOOTDELAY     2
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_MENU
 #define CONFIG_DOS_PARTITION

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 524975183043c84ffa9295c83f589054761b8141..2c3c4ac093305e85bec57fa4716e5a21fe6c9677 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -802,7 +802,6 @@ unsigned long get_board_ddr_clk(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index b092933757ed5a37e6e52ef99385122c668fb7b0..0a9d8a64aff8ace7105bb402ebdcf683c9f2297b 100644 (file)
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -394,7 +394,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_UBOOTPATH       "u-boot.bin" /* U-Boot image on TFTP server */
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       10 /* -1 disable auto-boot */
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
        "netdev=eth0\0"                                         \

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index aaddfca2cd74534aea10292b27e97c8c3ddf03cd..756beec61b775d79085a5e2bff8e5793d56afa0e 100644 (file)
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -632,7 +632,6 @@ combinations. this should be removed later
 #define CONFIG_UBOOTPATH       "u-boot.bin"
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       10 /* -1 disable auto-boot */
 
 #ifdef CONFIG_SDCARD
 #define CONFIG_DEF_HWCONFIG    "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 1e5b501ab1abe8a5d055f4ec8379738499daeb81..69a9798540efe1c33fd8674abcd71587f7327194 100644 (file)
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -517,7 +517,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE                115200
 

diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index b60da5e166f0fcf80f846efb1601f4e912aa1e9b..c5c3a845e417e8ffc466e6fc5a051fb4736aa363 100644 (file)
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -27,7 +27,6 @@
 #define CONFIG_SYS_CLK_FREQ    33330000 /* external frequency to pll   */
 
 #define CONFIG_BAUDRATE                9600
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #undef CONFIG_BOOTARGS
 #undef CONFIG_BOOTCOMMAND

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index b66b3ff7efd412c8632e1448928e00e06022f280..db953b9b4aea0a1a0fc13625705d5b068411419d 100644 (file)
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_CLK_FREQ    33330000 /* external frequency to pll   */
 
 #define CONFIG_BAUDRATE                9600
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #undef CONFIG_BOOTARGS
 #undef CONFIG_BOOTCOMMAND

diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 2b2e4e7a5adfb92a0e24c090581f66d46688aaf3..b426c18b3bf784faa0d10287e95de2c1304caae6 100644 (file)
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -59,7 +59,6 @@
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x58000
 #define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
-#define CONFIG_BOOTDELAY               1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC

diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 85b1c1544e8e382f3d16c9866cecd0b2662eca85..1e052b1b4baaf8f508071192127054acae29e413 100644 (file)
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -82,7 +82,6 @@
        ""
 #endif
 
-#define CONFIG_BOOTDELAY               3       /* autoboot after 3 seconds */
 /* LCD */
 #ifdef CONFIG_CMD_BMP
 #define CONFIG_LCD

diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index bacd8e0f32d50177c71bbe989988f5ead6d74b4c..006222881ab4f828e32132fc9e3b93677bc7ea1b 100644 (file)
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -76,7 +76,6 @@
 #define CONFIG_SYS_I2C_PINMUX_SET      (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
 
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#define CONFIG_BOOTDELAY       1       /* autoboot after 5 seconds */
 #define CONFIG_BOOTFILE                "u-boot.bin"
 #ifdef CONFIG_MCFFEC
 #      define CONFIG_IPADDR    192.162.1.2

diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 7c06fcea39bf2ff56e8c5dc0dc03bebed5291c4a..6c90700ccf826081b34f6e768639177433c6c4c3 100644 (file)
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -17,7 +17,6 @@
 
 #undef CONFIG_WATCHDOG         /* disable watchdog */
 
-#define CONFIG_BOOTDELAY       5
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash

diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
index d14f979cdde8d50137b145b4bc14b2cd2b4d001a..faad9703b7cef04d60e78936850199c6386dd2a2 100644 (file)
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -18,7 +18,6 @@
 
 #undef CONFIG_WATCHDOG         /* disable watchdog */
 
-#define CONFIG_BOOTDELAY       5
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash

diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 0753dc3afad529c49fdb0a161caa92cb513439bc..a8589049fdfef5397643bc06c0e3df7e9d7fa8e7 100644 (file)
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -57,7 +57,6 @@
  * Command line configuration.
  */
 
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #      define CONFIG_MII               1

diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 1709cccf8962194dd37e75401d0564eb00d96400..1bdacbcdf865acd18aa3866b54771603f9765f90 100644 (file)
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -104,7 +104,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x800000
 
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOTCOMMAND     "bootm ffe40000"
 #define CONFIG_SYS_MEMTEST_START       0x400
 #define CONFIG_SYS_MEMTEST_END         0x380000

diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 8131ea0ee1f0b4b83b3a58742d8ca3253dbe2cc9..62f25e90236c83552ee4893e161e3d2324577eb3 100644 (file)
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -70,7 +70,6 @@
 #      endif                   /* CONFIG_SYS_DISCOVER_PHY */
 #endif
 
-#define CONFIG_BOOTDELAY       5
 #ifdef CONFIG_MCFFEC
 #      define CONFIG_IPADDR    192.162.1.2
 #      define CONFIG_NETMASK   255.255.255.0

diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 81e28f0924113d77acee5255c7ff02b1b14c05a3..03c18da52e215bf71374cbb9b817ce5536af837d 100644 (file)
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -79,7 +79,6 @@
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x58000
 #define CONFIG_SYS_IMMR                        CONFIG_SYS_MBAR
 
-#define CONFIG_BOOTDELAY               1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC

diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 661063ce5d9b102c74c1b43872a573a29f9d619e..fabbaf084d5d4f31f9f4ddcef3f09ef7e0605ba9 100644 (file)
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x58000
 #define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 
-#define CONFIG_BOOTDELAY       1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC

diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index f0cf715ee26a2fda8ef6df7d2f56f80d88496e70..8fb16bc294b5117052cee6d70dbaee5015448621 100644 (file)
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_FSL_I2C_OFFSET      0x58000
 #define CONFIG_SYS_IMMR                CONFIG_SYS_MBAR
 
-#define CONFIG_BOOTDELAY       1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC

diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index e10c3e19294c7d3c8dee9766af826f7da4464d02..63b0a1e0ed50a7c0c4ff6adde07f7c8d893c94a4 100644 (file)
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -75,7 +75,6 @@
 #define CONFIG_SYS_FEC0_PHYADDR        0
 #define CONFIG_SYS_FEC1_PHYADDR        1
 
-#define CONFIG_BOOTDELAY               2       /* autoboot after 5 seconds */
 
 #ifdef CONFIG_SYS_NAND_BOOT
 #define CONFIG_BOOTARGS        "root=/dev/mtdblock2 rw rootfstype=jffs2 " \

diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 00bdbd182420d74e182c040a0aad183f6053a75e..599ffc79908466e8437fe3a07d0939061c66844c 100644 (file)
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -56,7 +56,6 @@
 #      define CONFIG_SYS_FEC0_MIIBASE  CONFIG_SYS_FEC0_IOBASE
 #      define MCFFEC_TOUT_LOOP 50000
 
-#      define CONFIG_BOOTDELAY 1       /* autoboot after 5 seconds */
 #      define CONFIG_BOOTARGS          "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:2M(kernel)ro,-(jffs2)"
 #      define CONFIG_ETHPRIME          "FEC0"
 #      define CONFIG_IPADDR            192.162.1.2

diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index f32dd3660a2967da22e7be2beed2b39c47114fc5..8301c4670fb41b296a64657f5699940f8f6170de 100644 (file)
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -61,7 +61,6 @@
 #      define MCFFEC_TOUT_LOOP 50000
 #      define CONFIG_HAS_ETH1
 
-#      define CONFIG_BOOTDELAY 1       /* autoboot after 5 seconds */
 #      define CONFIG_BOOTARGS          "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
 #      define CONFIG_ETHPRIME          "FEC0"
 #      define CONFIG_IPADDR            192.162.1.2

diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index 5fa9683e2c893cf83affa610af86d41bbc960d2e..ccebc30e16932fc7d4b15d6d66f8afc26837c442 100644 (file)
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -116,7 +116,6 @@
 #define CONFIG_SYS_PCI_CFG_SIZE        0x01000000
 #endif
 
-#define CONFIG_BOOTDELAY       1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #ifdef CONFIG_MCFFEC

diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index 9a23e22bfafc9343d4f75f554f02e9763857f0af..7e9f978f6b92925772d604f1bb42deb431765b2c 100644 (file)
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -111,7 +111,6 @@
 #define CONFIG_SYS_PCI_CFG_SIZE        0x01000000
 #endif
 
-#define CONFIG_BOOTDELAY       1       /* autoboot after 5 seconds */
 #define CONFIG_UDP_CHECKSUM
 
 #define CONFIG_HOSTNAME                M548xEVB

diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 75a26edb25bad54510fcef88462303cf5ab2ff04..79027e214cec098cc4fc9b104f42c20c509f4be0 100644 (file)
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -97,7 +97,6 @@
  * Environment definitions
  **************************************************************/
 #define CONFIG_BAUDRATE                9600    /* STD Baudrate */
-#define CONFIG_BOOTDELAY       5
 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 /* #define CONFIG_BOOT_RETRY_TIME      -10     /XXX* feature is available but not enabled */
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check console even if bootdelay = 0 */

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index e3e3b4414d8a7d5312d8dd2608bba0f67a89d8a9..578325cd05ebf3a31e28893bf66a03d932aefdd1 100644 (file)
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -514,7 +514,6 @@
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "netdev=eth0\0"                                                 \

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index fda894e119814d58c24c4c2eecb4b5b94dcd7785..5613a4a0cd28f3dc47f4d0e7b7146c861aeaa672 100644 (file)
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -649,7 +649,6 @@
 
                                /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                800000
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 41b40cb2d18da822ec808dc715ec9003c14886ed..7ce5f599373635c8dd2f5dfcd6b8ad6f749a7afd 100644 (file)
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -602,7 +602,6 @@
 
 #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY 6     /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs */
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 5c40e5b3eacb5eea300f7142da98915d85dec22d..13f954d00edd2fede1c5e6ab7f762b9063fbb254 100644 (file)
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -492,7 +492,6 @@
 
                                /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                800000
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 4a1cebb5d60f721faba2208f7c7ef5aee0530ea7..fd482606adab4ec883ea6b80d70c6b8f2fb4b02f 100644 (file)
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -569,7 +569,6 @@
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY 6     /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 3518b3fd3b0e4735802b0124e38d0150a9a6996b..288b126d02ef56cb677293d8c1db2198e7a26999 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -734,7 +734,6 @@
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE         115200

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 8161903f805c2f08e9c41b2377f978821cc8384e..2721255254fbf520a82e1c42ab4c1aba2d0d8267 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -731,7 +731,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CONFIG_FDTFILE         "mpc8349emitxgp.dtb"
 #endif
 
-#define CONFIG_BOOTDELAY       6
 
 #define CONFIG_BOOTARGS \
        "root=/dev/nfs rw" \

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 28ed9c03b944698f46477408de431271da1d2a4e..921d5f399d25eb93440c347ea9f6d38c1dc9fed0 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -659,7 +659,6 @@ extern int board_pci_host_broken(void);
 
 #define CONFIG_LOADADDR 800000 /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY 6     /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs */
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index fa131e23fbd5155b652ecd2ca050bdd83f2af097..bb06e89b4ea00e9d13acbe5967c43a492b097f6a 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -679,7 +679,6 @@
 
                                /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                800000
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 03f17f9c35ab90c1417ab04e979a1b48e491844e..7c19ff84bccaab3fe1b237a08396841e5380cc67 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -706,7 +706,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 38bd38c8f9ec1c59b8e2f88b8cbefaf56d394777..fae4b0c5c538de72f390c7c5243b479658bd8bd7 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -392,7 +392,6 @@
 
 #define CONFIG_LOADADDR  200000        /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index d827d2ab0b9065cbac1cc2e9194ead4bb643c422..0c2afb506597c2e8c4835b56e6fcbd209cedb5d4 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -414,7 +414,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR  200000   /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS           /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index f3036c1dc2638a4ed3006d0b3f42b0fe7f2e022c..b9d97c10069d50097022d37cac0cfabed943c344 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -441,7 +441,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_LOADADDR        1000000 /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 5de8b198288c87e5d6d0f6329798f55d5f8b1947..e73be48d5189402127be4e2b618d1963a0db4657 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -540,7 +540,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR        1000000 /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index c68e1d83d1dcd53fddf3b53621854ab4acfc62fc..fcd55c7743ad62244599b7f5632fc9eaa65892a3 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -409,7 +409,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR  200000   /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS           /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index fb76dd1aead008975bf7b46552664b7025b75093..4ed06c9ad41b324d1dc572e8e4b0a30706283923 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -434,7 +434,6 @@
 
 #define CONFIG_LOADADDR  200000        /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 09e32ebcd70b9a8ba40b689fa7699aeee0a17a5d..39459ded28fc28ddb92b3dd310c2668f0539ff15 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -433,7 +433,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR  200000   /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS           /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 923159b9043e2ed1bab2ce6b6989e22c746feffc..192cc2ccf1a1906c19ecfbb21ec17c55cd26905d 100644 (file)
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -528,7 +528,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_LOADADDR  200000   /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS           /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index bb7f38e34a530e27b8eba9fb6d6421fde39dc88c..2e6989f81602403f53e5137f2dfa1270a1d2dacf 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -646,7 +646,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index f6d45a9e40a8ff8183e37f40e8ff0460e90dc242..81594932d768713f4cfa0a167314174019192490 100644 (file)
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -500,7 +500,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 9b2623c72620a54ec23b585286f5fc4b477a6bd9..f90f7f24a470bdee5d1e91eb5b1b7f654198de39 100644 (file)
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -666,7 +666,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index f4c931284363d09dbc023b2f56cde54fbefa7da2..80d8fcdd98f54d2a7e40bdadca666aa376fba437 100644 (file)
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -16,7 +16,6 @@
 #define CONFIG_CMD_SDRAM
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC0,115200 root=1f01"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 4d0855567a060fa6dac13b67b76e6c6b56172a23..5384584c184749e975165240db5d2a9b194bdea0 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -850,7 +850,6 @@ extern unsigned long get_sdram_size(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE                115200

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 7457dfcd489df2e3719a8fc0bbab4f743d0067ab..bdf0323bfc764959be60a8c7518f077d9c520b34 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -715,7 +715,6 @@
 
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index a10310ec273e814a6dc21665f14cb79385b9e4af..07a594d15dbe3b66deea228fc9cc8acf4d6cc7b9 100644 (file)
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -308,7 +308,6 @@ extern unsigned long get_clock_freq(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY -1    /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index b3fb38c63a47c5041226921bcda86770090c9c83..24e54318452d5426ec9a1cc01492e0ef32edb2aa 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -676,7 +676,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/PATI.h b/include/configs/PATI.h
index 9f3c0372378ee132b0d409a4fce96713536fff46..e96fbc5aac9ad65747fb794bec902ea042208f33 100644 (file)
--- a/include/configs/PATI.h
+++ b/include/configs/PATI.h
@@ -44,11 +44,6 @@
 #define CONFIG_CMD_EEPROM
 #define CONFIG_CMD_IRQ
 
-#if 0
-#define CONFIG_BOOTDELAY       -1              /* autoboot disabled                    */
-#else
-#define CONFIG_BOOTDELAY       5               /* autoboot after 5 seconds             */
-#endif
 #define CONFIG_BOOTCOMMAND     ""      /* autoboot command                     */
 
 #define CONFIG_BOOTARGS                ""              /* */

diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 4506d86eee7671a3d2c91f6cc0a8f1a07333f06c..e7c7a990f4c6da6dc0fdfbc02d7ee6e47a32f094 100644 (file)
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -89,7 +89,6 @@
  **************************************************************/
 #define CONFIG_BAUDRATE                9600    /* STD Baudrate */
 
-#define CONFIG_BOOTDELAY       5
 /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
 /* #define CONFIG_BOOT_RETRY_TIME      -10     /XXX* feature is available but not enabled */
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check console even if bootdelay = 0 */

diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index 71a03756d4f126c3dcaef84de2356b883168cf46..558f3e2ba6c26a24622f3c7b09c929041d446562 100644 (file)
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -118,7 +118,6 @@
 
 #define CONFIG_CMDLINE_EDITING 1       /* add command line history     */
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #define CONFIG_VERSION_VARIABLE 1      /* include version env variable */
 

diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h
index a622578bd2b2df6004a5b7c9747d6b3d4348a705..5f17d7674437d073b5e5c09f1f66933df48345a8 100644 (file)
--- a/include/configs/PMC405DE.h
+++ b/include/configs/PMC405DE.h
@@ -21,7 +21,6 @@
 #define CONFIG_SYS_CLK_FREQ    33330000 /* external frequency to pll   */
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #undef  CONFIG_BOOTARGS
 #undef  CONFIG_BOOTCOMMAND

diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h
index 005fa2a5c1a7585b798b9242ccc617b6c3cc3f4b..868ca84f9933cb0db56a047a5dd1cb95f0a1add8 100644 (file)
--- a/include/configs/PMC440.h
+++ b/include/configs/PMC440.h
@@ -229,7 +229,6 @@
                "cp.b 200000 fff90000 70000\0"                          \
        ""
 
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */

diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index ef2ede49b9f8178c35d2d2ecf08195030f70be9e..b1519635028dad2715f4d844b2df78638ebe7a81 100644 (file)
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -867,7 +867,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       "u-boot.bin" /* U-Boot image on TFTP server */
 #define CONFIG_LOADADDR                1000000 /* default location for tftp, bootm */
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 #define __USB_PHY_TYPE         utmi
 

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 778c64b3f0892ecee678846314c614de53062eea..06d1d0fc497148112347e585f7ee32a0f8c23096 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -867,7 +867,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       u-boot.bin /* U-Boot image on TFTP server */
 #define CONFIG_LOADADDR                1000000 /* default location for tftp, bootm */
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 #define __USB_PHY_TYPE         utmi
 

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index be4ae712b5eec4743d4619bce30e8d858879e63a..9f5063c33378438b607ff6be1349e2178beaf1d7 100644 (file)
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -749,7 +749,6 @@ unsigned long get_board_ddr_clk(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index ed3493b68493b4b83668a2f329bf7620d5126986..a8f4f742e621c3914bcd6c877c07d131b8dafd3c 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -832,7 +832,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /*-1 disables auto-boot*/
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f48697c03399df0894d690793610c3d85ad48b16..1f07a83a1a742800b9c2882142b67dd4a0355fb8 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -821,7 +821,6 @@ unsigned long get_board_ddr_clk(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #define __USB_PHY_TYPE         utmi
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index b6be46e004f46ec7d7717e206922c1fe50b28d73..0ded41e0dd5229810d6dc6de755c8d08972fdcb5 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -773,7 +773,6 @@ unsigned long get_board_ddr_clk(void);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 #define __USB_PHY_TYPE         utmi
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \

diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 276428f4df3a942c38b31a286414b521db8b0180..f075dfb5f05859f21c223dbc3f217930134f6a08 100644 (file)
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -545,7 +545,6 @@ unsigned long get_board_ddr_clk(void);
        (!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8))
 #endif
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define __USB_PHY_TYPE utmi
 

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index ab838a8036c6623d9071c52a95c34e9fa0fa9c82..9ba69a1d1237c1b92470bc77d291e3cdb4a70fdc 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -738,7 +738,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SHA_HW_ACCEL
 #endif
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define __USB_PHY_TYPE utmi
 

diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 42ebcf04d1c5fe622ccccdffd11bec0922b4cab9..0e4067a3a922d36455b5c93599360a77efed913c 100644 (file)
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -199,7 +199,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h
index 395805ca04e831c73de9127c06076744a2e083de..c557ba177872483c039c275068d021dda25a691b 100644 (file)
--- a/include/configs/TQM823L.h
+++ b/include/configs/TQM823L.h
@@ -37,7 +37,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h
index ec366370ee4949d0ac82f6582ccb59d7c2d0c29a..814740b71d381abfdefcea007c0d03ce7c7c7442 100644 (file)
--- a/include/configs/TQM823M.h
+++ b/include/configs/TQM823M.h
@@ -35,7 +35,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 2aac682a2c8c44cff25372f54d9c58048db12f54..90e8dd9dd9efa9dd27558c0f3bcfd3a896836328 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -481,7 +481,6 @@
                                /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                400000
 
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE                115200

diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h
index 00c0cc3291b0dc7caf5ea4992231d36e1df11912..58fd8a4d71ad18cfc8304d537d929d8f022110f5 100644 (file)
--- a/include/configs/TQM850L.h
+++ b/include/configs/TQM850L.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h
index ca2602492ec63576dcbb81ac855e8040fdfec3f7..3a4f94c83a65376d6f29c1476c11e5ce502aacb0 100644 (file)
--- a/include/configs/TQM850M.h
+++ b/include/configs/TQM850M.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h
index 39cf02e4c4b9f677844b44239bf7c77d98852fbf..134076c73a1e7e6dae7f244549c38926e503a718 100644 (file)
--- a/include/configs/TQM855L.h
+++ b/include/configs/TQM855L.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h
index 30bfb8afdd04c662a161c682c0aafe95cdc80211..ad6f8f4bb33cb8159cd69d4b62e0ce44220a09d8 100644 (file)
--- a/include/configs/TQM855M.h
+++ b/include/configs/TQM855M.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h
index abe49b9c92995a85d27aca0bd8a20256da354445..b935f31100f7b43e08e3a4ae198eaa00d609b75c 100644 (file)
--- a/include/configs/TQM860L.h
+++ b/include/configs/TQM860L.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h
index 48252c4f981f74544e0bc34f8012e045458bb6ba..79248de0157bc66c7d8e4a9c4c586620ad482227 100644 (file)
--- a/include/configs/TQM860M.h
+++ b/include/configs/TQM860M.h
@@ -30,7 +30,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h
index a73395a270960a0bf6c6a34b2dbc609055592024..d360644c02ed70586bbdba54828ecea84eebd7d0 100644 (file)
--- a/include/configs/TQM862L.h
+++ b/include/configs/TQM862L.h
@@ -33,7 +33,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h
index 3db6fa17404176a55f922a47610681f40a8e4af5..5c6013b41f86482df65d2a8d32d5f626e1f6a8b3 100644 (file)
--- a/include/configs/TQM862M.h
+++ b/include/configs/TQM862M.h
@@ -33,7 +33,6 @@
 
 #define        CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index 76c8f7a499ba099e425289001a062dadeb29d184..c098f72c6750002923c5d981ea1be937c0df6536 100644 (file)
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -44,7 +44,6 @@
 
 #define CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h
index 88b97ab31931b026541d44829d4624a40c739e36..9d8a607b6fe8ebb85a26a4f0d5c31301a8d6e3dd 100644 (file)
--- a/include/configs/TQM885D.h
+++ b/include/configs/TQM885D.h
@@ -40,7 +40,6 @@
 
 #define CONFIG_BOOTCOUNT_LIMIT
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_BOARD_TYPES     1       /* support board types          */
 

diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 4ae61ca9cde2ae791d3c7b3fc99778694a28d74b..0c9e79f4a51ae14e13fe1b30d2a8d9eebac24d08 100644 (file)
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -590,7 +590,6 @@
 
 #if defined(CONFIG_DONGLE)
 
-#define CONFIG_BOOTDELAY 1     /* autoboot after 1 seconds */
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
 "bootcmd=run prog_spi_mbrbootcramfs\0"                                 \
 "bootfile=uImage\0"                                                    \
@@ -720,7 +719,6 @@
 
 #if defined(CONFIG_UCP1020T1)
 
-#define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0" \
 "bootfile=uImage\0"                                                    \
@@ -810,7 +808,6 @@
 
 #else /* For Arcturus Modules */
 
-#define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
 "bootcmd=run norkernel\0"                                              \
 "bootfile=uImage\0"                                                    \

diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 4e349d5caa588434b05fcf36c7dafee1468d0de8..968e1dfd64bb87711e5e8b46d0d0c469e1aa2341 100644 (file)
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -115,7 +115,6 @@
 
 #define CONFIG_BAUDRATE                        9600
 
-#define CONFIG_BOOTDELAY               5
 #define CONFIG_BOOT_RETRY_TIME         -1
 #define CONFIG_RESET_TO_RETRY
 #define CONFIG_ZERO_BOOTDELAY_CHECK

diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index d401d3eedb76d32820e211d5fb634de5329dc02b..dde98f6e759cc9334325f77e1cc7e4040ab4d7ee 100644 (file)
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -27,7 +27,6 @@
 #define CONFIG_SYS_CLK_FREQ    33330000 /* external frequency to pll   */
 
 #define CONFIG_BAUDRATE                9600
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
 
 #undef CONFIG_BOOTARGS
 #undef  CONFIG_BOOTCOMMAND

diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h
index e0c92d0497b3443e866af1adbc433ea65c95da47..7ec404d54840fb7d0165d647e4764487b60aa1c0 100644 (file)
--- a/include/configs/a3m071.h
+++ b/include/configs/a3m071.h
@@ -321,7 +321,6 @@
  * Environment Configuration
  */
 
-#define CONFIG_BOOTDELAY       3       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 

diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h
index ee1bff858f700ae09678f2c40da43b77890d4702..4e240c6b89d91c004bfb4483cd91d18c547c63ac 100644 (file)
--- a/include/configs/a4m072.h
+++ b/include/configs/a4m072.h
@@ -107,7 +107,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       2       /* autoboot after 2 seconds */
 
 #define CONFIG_SYS_AUTOLOAD    "n"
 

diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h
index f0b5b3e188365c80910fc48734e4d20debbbabd1..699ac41d778101ea9811dd8a3927c6f3f9d06833 100644 (file)
--- a/include/configs/ac14xx.h
+++ b/include/configs/ac14xx.h
@@ -462,7 +462,6 @@
 /* default load addr for tftp and bootm */
 #define CONFIG_LOADADDR                400000
 
-#define CONFIG_BOOTDELAY       2       /* -1 disables auto-boot */
 
 /* the builtin environment and standard greeting */
 #define CONFIG_PREBOOT "echo;" \

diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index 7b9470c801d9c6636a4ee776ff8813deeea156fa..c4e0a21b8d8b40e0f14e6a0284ed88527933aaef 100644 (file)
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -97,7 +97,6 @@
  */
 #define CONFIG_FTMAC100
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * SD (MMC) controller

diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h
new file mode 100644 (file)
index 0000000..f2484cb
--- /dev/null
+++ b/include/configs/am335x_shc.h
@@ -0,0 +1,340 @@
+/*
+ * (C) Copyright 2016
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Based on:
+ * am335x_evm.h
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __CONFIG_AM335X_SHC_H
+#define __CONFIG_AM335X_SHC_H
+
+#include <configs/ti_am335x_common.h>
+
+/* settings we don;t want on this board */
+#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+#undef CONFIG_CMD_EXT4
+#undef CONFIG_CMD_EXT4_WRITE
+#undef CONFIG_CMD_MMC_SPI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_PXE
+
+#define CONFIG_CMD_CACHE
+
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_TIMESTAMP
+# define CONFIG_LZO
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN           (16 << 20)
+
+#define MACH_TYPE_BOSCH_SHC_B          9001
+#define MACH_TYPE_BOSCH_SHC_B2         9002
+#define MACH_TYPE_BOSCH_SHC_C          9003
+#define MACH_TYPE_BOSCH_SHC_C2         9004
+#define MACH_TYPE_BOSCH_SHC_C3         9005
+#define MACH_TYPE_BOSCH_SHC            9006
+#ifdef CONFIG_B_SAMPLE
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC_B
+#elif defined CONFIG_B2_SAMPLE
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC_B2
+#elif defined CONFIG_C_SAMPLE
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC_C
+#elif defined CONFIG_C2_SAMPLE
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC_C2
+#elif defined CONFIG_C3_SAMPLE
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC_C3
+#elif defined CONFIG_SERIES
+# define CONFIG_MACH_TYPE              MACH_TYPE_BOSCH_SHC
+#endif /* #ifdef CONFIG_B_SAMPLE */
+
+#define CONFIG_BOARD_LATE_INIT
+
+/* Clock Defines */
+#define V_OSCK                         24000000  /* Clock output from T2 */
+#define V_SCLK                         (V_OSCK)
+
+#define CONFIG_VERSION_VARIABLE
+
+#define CONFIG_ENV_IS_IN_MMC           1
+
+/*
+ * in case of SD Card or Network boot we want to have a possibility to
+ * debrick the shc, therefore do not read environment from eMMC
+ */
+#if defined(CONFIG_SHC_SDBOOT) || defined(CONFIG_SHC_NETBOOT)
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#else
+#define CONFIG_SYS_MMC_ENV_DEV         1
+#endif
+
+/*
+ * Info when using boot partitions: As environment resides within first
+ * 128 kB, MLO must start at 128 kB == 0x20000
+ * ENV at MMC Boot0 Partition - 0/Undefined=user, 1=boot0, 2=boot1,
+ * 4..7=general0..3
+ */
+#define CONFIG_ENV_SIZE                                0x1000 /* 4 KB */
+#define CONFIG_ENV_OFFSET                      0x7000 /* 28 kB */
+
+#define CONFIG_HSMMC2_8BIT
+
+#define CONFIG_ENV_OFFSET_REDUND    0x9000 /* 36 kB */
+#define CONFIG_ENV_SIZE_REDUND      CONFIG_ENV_SIZE
+
+/* Enhance our eMMC support / experience. */
+#define CONFIG_CMD_GPT
+#define CONFIG_EFI_PARTITION
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_ISO_PARTITION
+#endif
+#ifndef CONFIG_SHC_ICT
+/*
+ * In builds other than ICT, reset to retry after timeout
+ * Define a timeout after which a stopped bootloader continues autoboot
+ * (only works with CONFIG_RESET_TO_RETRY)
+ */
+# define CONFIG_BOOT_RETRY_TIME 30
+# define CONFIG_RESET_TO_RETRY
+#endif
+
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       "loadaddr=0x80200000\0" \
+       "kloadaddr=0x84000000\0" \
+       "fdtaddr=0x85000000\0" \
+       "fdt_high=0xffffffff\0" \
+       "rdaddr=0x81000000\0" \
+       "bootfile=uImage\0" \
+       "fdtfile=am335x-shc.dtb\0" \
+       "verify=no\0" \
+       "serverip=10.55.152.184\0" \
+       "rootpath=/srv/nfs/shc-rootfs\0" \
+       "console=ttyO0,115200n8\0" \
+       "optargs=quiet\0" \
+       "mmcdev=1\0" \
+       "harakiri=0\0" \
+       "mmcpart=2\0" \
+       "active_root=root1\0" \
+       "inactive_root=root2\0" \
+       "mmcrootfstype=ext4 rootwait\0" \
+       "nfsopts=nolock\0" \
+       "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
+               "::off\0" \
+       "ip_method=none\0" \
+       "bootargs_defaults=setenv bootargs " \
+               "console=${console} " \
+               "${optargs}\0" \
+       "mmcargs=run bootargs_defaults;" \
+               "setenv bootargs ${bootargs} " \
+               "root=${mmcroot} " \
+               "rootfstype=${mmcrootfstype} ip=${ip_method}\0" \
+       "netargs=setenv bootargs console=${console} " \
+               "${optargs} " \
+               "root=/dev/nfs " \
+               "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
+               "ip=dhcp\0" \
+       "bootenv=uEnv.txt\0" \
+       "loadbootenv=if fatload mmc ${mmcdev} ${loadaddr} ${bootenv}; then " \
+                       "echo Loaded environment from ${bootenv}; " \
+                       "run importbootenv; " \
+               "fi;\0" \
+       "importbootenv=echo Importing environment variables from uEnv.txt ...; " \
+               "env import -t $loadaddr $filesize\0" \
+       "loaduimagefat=fatload mmc ${mmcdev} ${kloadaddr} ${bootfile}\0" \
+       "loaduimage=ext2load mmc ${mmcdev}:${mmcpart} ${kloadaddr} /boot/${bootfile}\0" \
+       "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdtaddr} /boot/${fdtfile}\0" \
+       "netloaduimage=tftp ${loadaddr} ${bootfile}\0" \
+       "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
+       "mmcboot=echo Booting Linux from ${mmcdevice} ...; " \
+               "run mmcargs; " \
+               "if run loadfdt; then " \
+                       "echo device tree detected; " \
+                       "bootm ${kloadaddr} - ${fdtaddr}; " \
+               "else " \
+                       "bootm ${kloadaddr}; " \
+               "fi; \0" \
+       "netboot=echo Booting from network ...; " \
+               "setenv autoload no; " \
+               "dhcp; " \
+               "run netloaduimage; " \
+               "run netargs; " \
+               "echo NFS path: ${serverip}:${rootpath};" \
+               "if run netloadfdt; then " \
+                       "echo device tree detected; " \
+                       "bootm ${loadaddr} - ${fdtaddr}; " \
+               "else " \
+                       "bootm ${loadaddr}; " \
+               "fi; \0" \
+       "emmc_erase=if test ${harakiri} = 1 ; then echo erase emmc ...; setenv mmcdev 1; mmc erase 0 200; reset; fi; \0" \
+       "mmcpart_gp=mmcpart gp 1 40; \0" \
+       "mmcpart_enhance=mmcpart enhance 0 64; \0" \
+       "mmcpart_rel_write=mmcpart rel_write 1f; \0" \
+       "mmcpart_commit=mmcpart commit 1; \0" \
+       "mmc_hw_part=run mmcpart_gp; run mmcpart_enhance; run mmcpart_rel_write; run mmcpart_commit; \0" \
+       "led_success=gpio set 22; \0" \
+       "fusecmd=mmc dev 1; if mmcpart iscommitted; then echo HW Partitioning already committed; mmcpart list; else run mmc_hw_part; fi; run led_success; \0" \
+       "uenv_exec=if test -n $uenvcmd; then " \
+                       "echo Running uenvcmd ...; " \
+                       "run uenvcmd; " \
+               "fi;\0" \
+       "sd_setup=echo SD/MMC-Card detected on device 0; " \
+               "setenv mmcdevice SD; " \
+               "setenv mmcdev 0; " \
+               "setenv mmcpart 2; " \
+               "setenv mmcroot /dev/mmcblk${mmcdev}p${mmcpart};\0" \
+       "emmc_setup=echo eMMC detected on device 1; " \
+               "setenv mmcdevice eMMC; " \
+               "setenv mmcdev 1; " \
+               "run emmc_erase; " \
+               "if test ${active_root} = root2; then " \
+                       "echo Active root is partition 6 (root2); " \
+                       "setenv mmcpart 6; " \
+               "else " \
+                       "echo Active root is partition 5 (root1); " \
+                       "setenv mmcpart 5; " \
+               "fi; " \
+               "setenv mmcroot /dev/mmcblk${mmcdev}p${mmcpart};\0"
+#endif /* #ifndef CONFIG_SPL_BUILD */
+
+#if defined CONFIG_SHC_NETBOOT
+/* Network Boot */
+# define CONFIG_BOOTCOMMAND \
+       "run fusecmd; " \
+       "if run netboot; then " \
+               "echo Booting from network; " \
+       "else " \
+               "echo ERROR: Cannot boot from network!; " \
+               "panic; " \
+       "fi; "
+
+#elif defined CONFIG_SHC_SDBOOT /* !defined CONFIG_SHC_NETBOOT */
+/* SD-Card Boot */
+# define CONFIG_BOOTCOMMAND \
+       "if mmc dev 0; mmc rescan; then " \
+               "run sd_setup; " \
+       "else " \
+               "echo ERROR: SD/MMC-Card not detected!; " \
+               "panic; " \
+       "fi; " \
+       "if run loaduimage; then " \
+               "echo Bootable SD/MMC-Card inserted, booting from it!; " \
+               "run mmcboot; " \
+       "else " \
+               "echo ERROR: Unable to load uImage from SD/MMC-Card!; " \
+               "panic; " \
+       "fi; "
+
+#elif defined CONFIG_SHC_ICT
+/* ICT adapter boots only u-boot and does HW partitioning */
+# define CONFIG_BOOTCOMMAND \
+       "if mmc dev 0; mmc rescan; then " \
+               "run sd_setup; " \
+       "else " \
+               "echo ERROR: SD/MMC-Card not detected!; " \
+               "panic; " \
+       "fi; " \
+       "run fusecmd; "
+
+#else /* !defined CONFIG_SHC_NETBOOT, !defined CONFIG_SHC_SDBOOT */
+/* Regular Boot from internal eMMC */
+# define CONFIG_BOOTCOMMAND \
+       "if mmc dev 1; mmc rescan; then " \
+               "run emmc_setup; " \
+       "else " \
+               "echo ERROR: eMMC device not detected!; " \
+               "panic; " \
+       "fi; " \
+       "if run loaduimage; then " \
+               "run mmcboot; " \
+       "else " \
+               "echo ERROR Unable to load uImage from eMMC!; " \
+               "echo Performing Rollback!; " \
+               "setenv _active_ ${active_root}; " \
+               "setenv _inactive_ ${inactive_root}; " \
+               "setenv active_root ${_inactive_}; " \
+               "setenv inactive_root ${_active_}; " \
+               "saveenv; " \
+               "reset; " \
+       "fi; "
+
+#endif /* Regular Boot */
+
+/* NS16550 Configuration */
+#define CONFIG_SYS_NS16550_COM1                0x44e09000      /* UART0 */
+#define CONFIG_SYS_NS16550_COM2                0x48022000      /* UART1 */
+#define CONFIG_SYS_NS16550_COM3                0x48024000      /* UART2 */
+#define CONFIG_SYS_NS16550_COM4                0x481a6000      /* UART3 */
+#define CONFIG_SYS_NS16550_COM5                0x481a8000      /* UART4 */
+#define CONFIG_SYS_NS16550_COM6                0x481aa000      /* UART5 */
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_CONS_INDEX               1
+
+/* PMIC support */
+#define CONFIG_POWER_TPS65217
+
+/* SPL */
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_YMODEM_SUPPORT
+
+#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+#ifndef CONFIG_SPL_USBETH_SUPPORT
+/* To support eMMC booting */
+#define CONFIG_STORAGE_EMMC
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
+#endif
+
+/*
+ * Disable MMC DM for SPL build and can be re-enabled after adding
+ * DM support in SPL
+ */
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_DM_MMC
+#undef CONFIG_TIMER
+#endif
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT         10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ADDR                        0
+#define CONFIG_PHY_SMSC
+
+/* I2C configuration */
+#define CONFIG_SYS_I2C_EEPROM_ADDR     0x50    /* Main EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_I2C_SPEED           400000
+#define CONFIG_SYS_I2C_SLAVE           1
+
+#define CONFIG_SHOW_BOOT_PROGRESS
+
+#if defined CONFIG_SHC_NETBOOT
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_NET_SUPPORT
+#define CONFIG_SPL_ETH_SUPPORT
+#define CONFIG_SPL_NET_VCI_STRING      "AM335x U-Boot SPL"
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_ENV_IS_NOWHERE
+#undef CONFIG_ENV_IS_IN_MMC
+#endif
+#endif
+#endif /* ! __CONFIG_AM335X_SHC_H */

diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h
index e9e971e511654dee9bbd33c7de4e8f6fa81f071a..845487255421fd2c2dbba2048696e7b34ee4960c 100644 (file)
--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -10,7 +10,6 @@
 #define __CONFIG_AM335X_EVM_H
 
 #include <configs/ti_am335x_common.h>
-#undef CONFIG_BOOTDELAY
 
 #ifndef CONFIG_SPL_BUILD
 # define CONFIG_TIMESTAMP

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 822e1c8edc7b2b88843c6a6f822acd1340661917..a65d1a884b0150c6b6bc3fec43c630985a7e56c5 100644 (file)
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -156,7 +156,6 @@
 #define CONFIG_JFFS2_PART_SIZE         0xf980000       /* sz of jffs2 part */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY       10
 
 #define CONFIG_BOOTFILE                "uImage"
 

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 6f838708682f5df9aadf8cac888949a93b8770ce..4d88aac63750d1e86188aaf7b92699e8bf450951 100644 (file)
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -200,7 +200,6 @@
 #endif /* CONFIG_NAND */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY       10
 
 #define CONFIG_BOOTFILE                "uImage"
 

diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 9fa4d162439944fc1ed28c2e4bad6d4903844494..2666ca6f691b92f61756b4d435a1d6ba97da9319 100644 (file)
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -60,7 +60,6 @@
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE              1024    /* Console I/O Buffer Size      */
 #else

diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index e819185f77b92aaaa066931ab4bf8c092c070bd4..5667680230aa088581967d43e03fd0c17715be1e 100644 (file)
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -18,7 +18,6 @@
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
 
-#define CONFIG_BOOTDELAY               1
 #define CONFIG_BOOTCOMMAND             "bootm ffc20000"
 
 #undef CONFIG_CMD_AES

diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index b01031c8bbe7dfd00c2b152e0b3fc4e1c1c086c4..bf5746fcb8ba35c8849d0cb5fc48ec7f7d89fa96 100644 (file)
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -34,7 +34,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE \
        {9600, 19200, 38400, 57600, 115200}
 
-#define CONFIG_BOOTDELAY                3
 #define CONFIG_BOOTARGS                 "console=ttyS0,115200 " \
                                        "root=/dev/mtdblock2 " \
                                        "rootfstype=squashfs"

diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index 0fa73a79a595b0a8a5cd3362989868f9c96ca222..5d7e49e4a14dce710ee3b790bdb27191baa90eff 100644 (file)
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -38,7 +38,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE \
        {9600, 19200, 38400, 57600, 115200}
 
-#define CONFIG_BOOTDELAY                3
 #define CONFIG_BOOTARGS                 "console=ttyS0,115200 " \
                                        "root=/dev/mtdblock2 " \
                                        "rootfstype=squashfs"

diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index ae58ec8d2ae3539ecc9ea3ac878fce660542522b..7dd24612f1a29a004c5eb902a34dd64b1355592c 100644 (file)
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -19,7 +19,6 @@
 #define CONFIG_DOS_PARTITION
 
 #define CONFIG_BAUDRATE                38400
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC2,38400"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h
index be8feed124e8acfba5f2b5c424f21ba6d815e0be..37f2d3093a7f3682a6153a889c9acf2832e5192b 100644 (file)
--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@@ -22,7 +22,6 @@
 #define CONFIG_CMD_ENV
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC4,115200"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 2291647c64ffcae17dee7c7e5462b84e2d22cfd9..f44f71cebeccfe2f9d8b563ba4136092041b6d6e 100644 (file)
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -148,7 +148,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS       /* send memory definition to kernel */
 #define CONFIG_INITRD_TAG              /* send initrd params   */
 
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 #define        CONFIG_BOOTFILE         __stringify(CONFIG_BOARD_NAME) "-linux.bin"
 #define CONFIG_BOOTARGS                "console=" __stringify(ACFG_CONSOLE_DEV) "," \

diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index bb29f3f5bca0924dc381f223f6d1cc509afdeb67..50eaf609b5363c863910bda327516a69adf039b0 100644 (file)
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -93,7 +93,6 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_BOOTDELAY               1
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTCOMMAND             "run bootcmd_nand"
 #define CONFIG_LOADADDR                        0x41000000

diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h
index 8a860eef6ad096207f375aa9d8056a1db70c9b77..d6081048feeb8307fc2a14fcc38d72173ccbb72c 100644 (file)
--- a/include/configs/arcangel4.h
+++ b/include/configs/arcangel4.h
@@ -54,7 +54,6 @@
 /*
  * Environment configuration
  */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTARGS                        "console=ttyARC0,115200n8"
 #define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR

diff --git a/include/configs/aria.h b/include/configs/aria.h
index 2d32da1f94900f7a5dd5c193fc329df51e2e376e..cb506589d9690e1db20b0d965665c125148f7820 100644 (file)
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -510,7 +510,6 @@
 
 #define CONFIG_LOADADDR                        400000  /* default load addr */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                        /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE                115200

diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 681b4e743e68a9ddfc26288c7dbaf19fc562ec1b..522b28710440e7974cfddc660622cab5102b4d5f 100644 (file)
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -22,7 +22,6 @@
 #define BOARD_LATE_INIT
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                ""
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index b08276f32da36ab6c44f792a58c76cb80949fbcd..e8dca0b2ccdca731d2022e472a564a65b315b9ee 100644 (file)
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -148,19 +148,6 @@
 
 /* AUTOBOOT settings - booting images automatically by u-boot after power on */
 
-/*
- * used for autoboot, delay in seconds u-boot will wait before starting
- * defined (auto-)boot command, setting to -1 disables delay, setting to
- * 0 will too prevent access to u-boot command interface: u-boot then has
- * to be reflashed
- * beware - watchdog is not serviced during autoboot delay time!
- */
-#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_BOOTDELAY       1
-#else
-#define CONFIG_BOOTDELAY       1
-#endif
-
 /*
  * The following settings will be contained in the environment block ; if you
  * want to use a neutral environment all those settings can be manually set in

diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index dc955b2452477128447070840b7cc4ce4dd9ed6f..9257c5f029230cee80e184b2a3b9aab0066e3bcd 100644 (file)
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -34,7 +34,6 @@
 /* general purpose I/O */
 #define CONFIG_AT91_GPIO
 
-#define CONFIG_BOOTDELAY               3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h
index 2979b25abcc20772d52da7799e8dce4ed4f77b0f..c92ad8523807de09af41373c4f4720873069e69e 100644 (file)
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@@ -171,7 +171,6 @@
 /*
  * Boot option
  */
-#define CONFIG_BOOTDELAY               3
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_SYS_SDRAM_BASE + SZ_16M

diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 9db8d1286880cd57721ea71fabf05bb57a698b44..c6d3295f34f6e3c96fa3428872bec6cc248eedfd 100644 (file)
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -61,7 +61,6 @@
 #define        CONFIG_RED_LED          AT91_PIN_PA9    /* this is the power led */
 #define        CONFIG_GREEN_LED        AT91_PIN_PA6    /* this is the user led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index b369624a2c79f4a5d23202a79f92e758daf642dc..9c9461bc98fc161e726cbd5469d0a273e8779329 100644 (file)
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -69,7 +69,6 @@
 #define        CONFIG_GREEN_LED        AT91_PIN_PA13   /* this is the user1 led */
 #define        CONFIG_YELLOW_LED       AT91_PIN_PA14   /* this is the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index f248049e544702038629e73032a88f3518d1faaa..e7bfd49450495c4b5b21b4011c107b988c2125f6 100644 (file)
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -76,7 +76,6 @@
 #define        CONFIG_GREEN_LED        AT91_PIN_PB8    /* the user1 led */
 #define        CONFIG_YELLOW_LED       AT91_PIN_PC29   /* the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 18eb01dc8c6f07f4dda0c63842e4fe762bd64cd7..290b039e11ec87d025f1b4a1b46ef8d9eeb9ed98 100644 (file)
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -59,7 +59,6 @@
 #define        CONFIG_RED_LED          AT91_PIN_PD31   /* this is the user1 led */
 #define        CONFIG_GREEN_LED        AT91_PIN_PD0    /* this is the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 2f8c3774139f42c980b5b7b5b9738092b453e992..297938b93e71c8a536c6f6d028d20a716b055265 100644 (file)
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -51,7 +51,6 @@
 #define CONFIG_ATMEL_LCD_RGB565
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
-#define CONFIG_BOOTDELAY               3
 
 /*
  * BOOTP options

diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index d178d9d44b46ce063af94970d0513ee3193b3481..a383de64bc3024a197fd8f99d8d34c76e8699a87 100644 (file)
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -65,7 +65,6 @@
 #define        CONFIG_GREEN_LED        AT91_PIN_PD15   /* this is the user1 led */
 #define        CONFIG_YELLOW_LED       AT91_PIN_PD16   /* this is the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * Command line configuration.

diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 251094e60b85a6a94536966fde81e35a93547bc8..743fc397d140ebc26a934eec46a21d8d6d56ee99 100644 (file)
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -47,7 +47,6 @@
 #define CONFIG_ATMEL_LCD_RGB565
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index e6f6125dd2ca755737c92b8506719524bee5f02a..a0f451b1a057c5e6536e7ac6b6e6495ee7b8f1a4 100644 (file)
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -62,7 +62,6 @@
 #define CONFIG_BOOTCOMMAND                                             \
        "fsload; bootm"
 
-#define CONFIG_BOOTDELAY               1
 
 /*
  * After booting the board for the first time, new ethernet addresses

diff --git a/include/configs/atngw100mkii.h b/include/configs/atngw100mkii.h
index dfa2d93a90dab9bad0debddc770d441bf76ba040..4d9282a7bf86ecf414833b326b94074713d1bd29 100644 (file)
--- a/include/configs/atngw100mkii.h
+++ b/include/configs/atngw100mkii.h
@@ -81,7 +81,6 @@
 #define CONFIG_BOOTCOMMAND                                             \
        "fsload 0x10400000 /uImage; bootm"
 
-#define CONFIG_BOOTDELAY               1
 
 /*
  * After booting the board for the first time, new ethernet addresses

diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 9a647d8446f9d305e177dc4974e6dbe3ecdab99f..9ddfff2b2c4be64ee69c3e3f32f9197616f9f4bb 100644 (file)
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -79,7 +79,6 @@
 #define CONFIG_BOOTCOMMAND                                             \
        "fsload; bootm $(fileaddr)"
 
-#define CONFIG_BOOTDELAY               1
 
 /*
  * After booting the board for the first time, new ethernet addresses

diff --git a/include/configs/axs101.h b/include/configs/axs101.h
index 05d2d45b251ac5f48915deb6d0365d1a56e061a3..c0b68e227753f4db6d80f03881605d56e1333883 100644 (file)
--- a/include/configs/axs101.h
+++ b/include/configs/axs101.h
@@ -119,7 +119,6 @@
 /*
  * Environment configuration
  */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTARGS                        "console=ttyS3,115200n8"
 #define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR

diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h
new file mode 100644 (file)
index 0000000..bd3c711
--- /dev/null
+++ b/include/configs/bcm23550_w1d.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __BCM23550_W1D_H
+#define __BCM23550_W1D_H
+
+#include <linux/sizes.h>
+#include <asm/arch/sysmap.h>
+
+/* CPU, chip, mach, etc */
+#define CONFIG_KONA
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_KONA_RESET_S
+
+/*
+ * Memory configuration
+ */
+#define CONFIG_SYS_TEXT_BASE           0x9f000000
+
+#define CONFIG_SYS_SDRAM_BASE          0x80000000
+#define CONFIG_SYS_SDRAM_SIZE          0x20000000
+#define CONFIG_NR_DRAM_BANKS           1
+
+#define CONFIG_SYS_MALLOC_LEN          SZ_4M   /* see armv7/start.S. */
+#define CONFIG_STACKSIZE               SZ_256K
+
+/* GPIO Driver */
+#define CONFIG_KONA_GPIO
+
+/* MMC/SD Driver */
+#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
+#define CONFIG_KONA_SDHCI
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+
+#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
+#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
+#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
+#define CONFIG_SYS_SDIO0 "sdio1"
+#define CONFIG_SYS_SDIO1 "sdio2"
+#define CONFIG_SYS_SDIO2 "sdio3"
+#define CONFIG_SYS_SDIO3 "sdio4"
+
+/* I2C Driver */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_KONA
+#define CONFIG_SYS_SPD_BUS_NUM 3       /* Start with PMU bus */
+#define CONFIG_SYS_MAX_I2C_BUS 4
+#define CONFIG_SYS_I2C_BASE0   BSC1_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE1   BSC2_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE2   BSC3_BASE_ADDR
+#define CONFIG_SYS_I2C_BASE3   PMU_BSC_BASE_ADDR
+
+/* Timer Driver */
+#define CONFIG_SYS_TIMER_RATE          32000
+#define CONFIG_SYS_TIMER_COUNTER       (TIMER_BASE_ADDR + 4) /* STCLO offset */
+
+/* Init functions */
+#define CONFIG_MISC_INIT_R     /* board's misc_init_r function */
+
+/* Some commands use this as the default load address */
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_SYS_SDRAM_BASE
+
+/* No mtest functions as recommended */
+
+/*
+ * This is the initial SP which is used only briefly for relocating the u-boot
+ * image to the top of SDRAM. After relocation u-boot moves the stack to the
+ * proper place.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
+
+/* Serial Info */
+#define CONFIG_SYS_NS16550_SERIAL
+/* Post pad 3 bytes after each reg addr */
+#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
+#define CONFIG_SYS_NS16550_CLK         13000000
+#define CONFIG_CONS_INDEX              1
+#define CONFIG_SYS_NS16550_COM1                0x3e000000
+
+#define CONFIG_BAUDRATE                        115200
+
+/* must fit into GPT:u-boot-env partition */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#define CONFIG_ENV_OFFSET              (0x00011a00 * 512)
+#define CONFIG_ENV_SIZE                        (8 * 512)
+
+#define CONFIG_SYS_NO_FLASH    /* Not using NAND/NOR unmanaged flash */
+
+/* console configuration */
+#define CONFIG_SYS_CBSIZE              1024    /* Console buffer size */
+#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
+                       sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */
+#define CONFIG_SYS_MAXARGS             64
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
+
+/*
+ * One partition type must be defined for part.c
+ * This is necessary for the fatls command to work on an SD card
+ * for example.
+ */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+
+/* version string, parser, etc */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/* Initial upstream - boot to cmd prompt only */
+#define CONFIG_BOOTCOMMAND             ""
+
+/* Commands */
+#define CONFIG_FAT_WRITE
+
+/* Fastboot and USB OTG */
+#define CONFIG_USB_FUNCTION_FASTBOOT
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV  0
+#define CONFIG_SYS_CACHELINE_SIZE      64
+#define CONFIG_FASTBOOT_BUF_SIZE       0x1d000000
+#define CONFIG_FASTBOOT_BUF_ADDR       CONFIG_SYS_SDRAM_BASE
+#undef CONFIG_USB_GADGET_VBUS_DRAW
+#define CONFIG_USB_GADGET_VBUS_DRAW    0
+#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT
+#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY
+#define CONFIG_USBID_ADDR              0x34052c46
+
+#define CONFIG_SYS_ICACHE_OFF
+#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_L2CACHE_OFF
+
+#endif /* __BCM23550_W1D_H */

diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h
index e95deac737878728cdb5945dbd4e669f4980dfe5..de60bb10358a48a51767656554abf776d455bf1d 100644 (file)
--- a/include/configs/bct-brettl2.h
+++ b/include/configs/bct-brettl2.h
@@ -117,7 +117,6 @@
 /*
  * Misc Settings
  */
-#define CONFIG_BOOTDELAY       1
 #define CONFIG_LOADADDR                0x800000
 #define CONFIG_MISC_INIT_R
 #define CONFIG_UART_CONSOLE    0

diff --git a/include/configs/bf525-ucr2.h b/include/configs/bf525-ucr2.h
index 66339ca9718b0358e8579df9ef358503a981be1d..f7a45e9fdd290f5cf54bdb57793387411e448a95 100644 (file)
--- a/include/configs/bf525-ucr2.h
+++ b/include/configs/bf525-ucr2.h
@@ -85,7 +85,6 @@
 #define CONFIG_BFIN_SERIAL
 #define CONFIG_BOOTARGS                "root=/dev/mtdblock0 rw"
 #define CONFIG_BOOTCOMMAND     "run sfboot"
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "sfboot=sf probe 1;" \
                "sf read 0x1000000 0x20000 0x300000;" \

diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h
index 43a90328fed5a4bed3010a1d4124556744499cbe..2c7972043a60e7779338c185eeff357c74bae3b7 100644 (file)
--- a/include/configs/bf537-minotaur.h
+++ b/include/configs/bf537-minotaur.h
@@ -129,12 +129,6 @@
 #define CONFIG_BOOT_RETRY_TIME -1
 #define CONFIG_LOADS_ECHO              1
 
-#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
-# define CONFIG_BOOTDELAY      -1
-#else
-# define CONFIG_BOOTDELAY      5
-#endif
-
 #define CONFIG_CMD_BOOTLDR
 #define CONFIG_CMD_DATE
 

diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h
index 70553662e7fd001b81d88445fb7c35f3f0058c1b..6ad5682a19e76ea34c7f3a571c51aa1594d2f4ef 100644 (file)
--- a/include/configs/bf537-srv1.h
+++ b/include/configs/bf537-srv1.h
@@ -129,15 +129,6 @@
 #define CONFIG_BOOT_RETRY_TIME -1
 #define CONFIG_LOADS_ECHO              1
 
-#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
-# define CONFIG_BOOTDELAY      -1
-#else
-# define CONFIG_BOOTDELAY      5
-#endif
-
-#ifdef CONFIG_BFIN_MAC
-#endif
-
 #define CONFIG_CMD_BOOTLDR
 #define CONFIG_CMD_DATE
 

diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 88d2ae997eacd3ee68b6b62eebfc16667d080da7..502ddad96b82813ea35bf75f14bcb78841634509 100644 (file)
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -97,13 +97,6 @@
 /*
  * Env Settings
  */
-#ifndef CONFIG_BOOTDELAY
-# if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART)
-#  define CONFIG_BOOTDELAY     -1
-# else
-#  define CONFIG_BOOTDELAY     5
-# endif
-#endif
 #ifndef CONFIG_BOOTCOMMAND
 # define CONFIG_BOOTCOMMAND    "run ramboot"
 #endif

diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h
index 6a5bc126b07f1174fec87678d43371e3f278d340..e13f736a8f4c50f7e75b5983fd2733c999106747 100644 (file)
--- a/include/configs/bg0900.h
+++ b/include/configs/bg0900.h
@@ -55,7 +55,6 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200"
 #define CONFIG_BOOTCOMMAND     "bootm"

diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h
index 6eb83a05a7e3e737fc929f7a3fcf46003afbdf0a..dc596fae3ec3b91068cc941e694e145fb38bd3be 100644 (file)
--- a/include/configs/blackstamp.h
+++ b/include/configs/blackstamp.h
@@ -106,7 +106,6 @@
 #define CONFIG_CMD_CPLBINFO
 #define CONFIG_CMD_DATE
 
-#define CONFIG_BOOTDELAY     5
 #define CONFIG_BOOTCOMMAND   "run ramboot"
 #define CONFIG_BOOTARGS \
        "root=/dev/mtdblock0 rw " \

diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h
index ba90830a1e60f7bb182a4463a4423bb2c49eda45..d3dc216c5f052245a3aca1a3fc525b55d5b9626a 100644 (file)
--- a/include/configs/blackvme.h
+++ b/include/configs/blackvme.h
@@ -155,7 +155,6 @@
  * Default: boot from SPI flash.
  * "sfboot" is a composite command defined in extra settings
  */
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOTCOMMAND     "run sfboot"
 
 /*

diff --git a/include/configs/br4.h b/include/configs/br4.h
index 402f352fc56b2af4b2af93582b49edf3afa8a792..16e4a1d4e2cb4b1a96cd898b57283eee7fe33af2 100644 (file)
--- a/include/configs/br4.h
+++ b/include/configs/br4.h
@@ -119,7 +119,6 @@
 #define CONFIG_RTC_BFIN
 #define CONFIG_UART_CONSOLE    0
 #define CONFIG_BOOTCOMMAND     "run nandboot"
-#define CONFIG_BOOTDELAY       2
 #define CONFIG_LOADADDR                0x2000000
 
 /*

diff --git a/include/configs/calimain.h b/include/configs/calimain.h
index 506ad882c8e7f224f94e1831d597c4ecbe04f850..3b10360b5e3ee5da3203ded0643f0ba2d66cc432 100644 (file)
--- a/include/configs/calimain.h
+++ b/include/configs/calimain.h
@@ -214,7 +214,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTARGS           ""
 #define CONFIG_BOOTCOMMAND        "run checkupdate; run checkbutton;"
-#define CONFIG_BOOTDELAY          0
 #define CONFIG_ZERO_BOOTDELAY_CHECK   /* check for keypress on bootdelay==0 */
 #define CONFIG_BOOT_RETRY_TIME    60  /* continue boot after 60 s inactivity */
 #define CONFIG_RESET_TO_RETRY

diff --git a/include/configs/canmb.h b/include/configs/canmb.h
index 31fe5f6b814e7771ec8f60f38750fa428dfd131d..b41666064cf898d97f049cf4f3ae384e485bd680 100644 (file)
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@@ -65,7 +65,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
index 99182f4de3999c4de26f170e348a0a417ea73d2a..0dd5e996b66cf281a54b8192ac645adee66e5296 100644 (file)
--- a/include/configs/cm5200.h
+++ b/include/configs/cm5200.h
@@ -64,7 +64,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
        "echo"

diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 0fb853002c08abe3efd200bc476bde12f9a1441c..de1999d431e4e256e4ac1a381a4f4d9f4ec5e016 100644 (file)
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -145,7 +145,6 @@
                                                        /* devices */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 7c087c6f5d1ba46cb9780ec5ef29a0739f4bb41d..87e41bfababb093deed598df082b304362ed0bf2 100644 (file)
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -152,7 +152,6 @@
                                                        /* devices */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index ff63d7a7756830fb5695945eda3a13a122630e3f..68851ee90fd1397aa0705e78d7256af2e1540e62 100644 (file)
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -108,9 +108,7 @@
 #undef CONFIG_SYS_AUTOLOAD
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #undef CONFIG_BOOTCOMMAND
-#undef CONFIG_BOOTDELAY
 
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_SYS_AUTOLOAD            "no"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index 509c8b42fba1342e6e23e87a0d1ce87700cf48b5..0e8d4ac38bb371cf96cf77cad534ba52b9eb369c 100644 (file)
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -149,11 +149,6 @@
 
 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
 
-#define CONFIG_BOOTDELAY       5               /* used for autoboot, delay in
-seconds u-boot will wait before starting defined (auto-)boot command, setting
-to -1 disables delay, setting to 0 will too prevent access to u-boot command
-interface: u-boot then has to reflashed */
-
 /* The following settings will be contained in the environment block ; if you
 want to use a neutral environment all those settings can be manually set in
 u-boot: 'set' command */

diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 5dffc9e186ef4538bdc361d8fe5d666bdaa1d2f1..ba8d93ce1ffdf0feb33c834a95cc1b8909c47bd8 100644 (file)
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -37,7 +37,6 @@
        "bootm 0xc0000;"
 #define        CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
 #define        CONFIG_TIMESTAMP
-#define        CONFIG_BOOTDELAY                2       /* Autoboot delay */
 #define        CONFIG_CMDLINE_TAG
 #define        CONFIG_SETUP_MEMORY_TAGS
 #define        CONFIG_LZMA                     /* LZMA compression support */

diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 50f7c21ac2b5d12f0620b9bf86026119589ec0b6..58925952dddfba956b4bf0b47e82f9ba1194486d 100644 (file)
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -89,7 +89,6 @@
 #define CONFIG_NETMASK         255.255.255.0
 #define CONFIG_SERVERIP                192.168.10.1
 
-#define CONFIG_BOOTDELAY               1
 #define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_LOADADDR                        0x80008000

diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index c60c64439365c90e72629aea176e0694bc8af326..30c283185bcba7be66e7f4c841d69bc2d2aedbc7 100644 (file)
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -417,7 +417,6 @@
 
 #ifdef CONFIG_TRAILBLAZER
 
-#define CONFIG_BOOTDELAY       0       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE        115200
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
@@ -432,7 +431,6 @@
 
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a06bfe05adbf35c0892f502ab57d1884e4719a1e..4a770b05460a14c8a84cb924ea6731bef79fb75a 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -682,7 +682,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 8b3c7153f02fc3fa4928eaac3648a641dc83a40b..686760d0a532d7af3db8c2da2d9624c64bd29561 100644 (file)
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -54,7 +54,6 @@
 #define CONFIG_RED_LED         AT91_PIN_PD31   /* this is the user1 led */
 #define CONFIG_GREEN_LED       AT91_PIN_PD0    /* this is the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 660646eb91887ce4f117179b6f438b6db235e187..708d5f730ddc867361d8d59b1809d2c3bf7d9e08 100644 (file)
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -505,7 +505,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY       10      /* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE        115200
 

diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index af220febf49a3160680447b274bf2fa85ee94e00..3e4bba558726058396e4124eaba059f839ea7300 100644 (file)
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -278,7 +278,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTARGS                \
        "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp"
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_EXTRA_ENV_SETTINGS      "hwconfig=dsp:wake=yes"
 
 /*

diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 68ff02509b5e039eccd6c6aaa2002f771f6723e6..dbd2bb3b094a42a517ce8d9805962ce60dd43a64 100644 (file)
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -37,7 +37,6 @@
 #endif
 #endif
 
-#define CONFIG_BOOTDELAY       2       /* autoboot after 2 seconds     */
 
 #define CONFIG_BAUDRATE                115200
 

diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 913b9481f231ed6490913ebf27d292608c2befa2..73f53d4a2b80bc3f141c136d993489733d0fd62a 100644 (file)
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -179,7 +179,6 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTDELAY               1
 
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTARGS                        "console=ttyS0,115200n8"

diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h
index 18804d43fd8abffb9365bfbb3f680c821563ce9c..1145e376397aa27ae93e5f30602858f7cc3d10d6 100644 (file)
--- a/include/configs/digsy_mtc.h
+++ b/include/configs/digsy_mtc.h
@@ -117,7 +117,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       1
 
 #undef CONFIG_BOOTARGS
 

diff --git a/include/configs/draco.h b/include/configs/draco.h
index 8aee25b96a2fbad2b101faa0ba8e0fe8354d8801..889178c2834bf77cbec258b23ce439f290fadab5 100644 (file)
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -73,6 +73,7 @@
 /* Default env settings */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "hostname=draco\0" \
+       "ubi_off=2048\0"\
        "nand_img_size=0x400000\0" \
        "optargs=\0" \
        "preboot=draco_led 0\0" \
@@ -82,7 +83,6 @@
 
 #ifndef CONFIG_RESTORE_FLASH
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTCOMMAND \
 "if dfubutton; then " \
@@ -94,7 +94,6 @@
 "reset;"
 
 #else
-#define CONFIG_BOOTDELAY               0
 
 #define CONFIG_BOOTCOMMAND                     \
        "setenv autoload no; "                  \

diff --git a/include/configs/ea20.h b/include/configs/ea20.h
index d4f3cfa8e9f3d060127ff4ddbffa8ebfd34aabd4..3f8578fd58e6f056a9899c4e70a42ee3df550c7d 100644 (file)
--- a/include/configs/ea20.h
+++ b/include/configs/ea20.h
@@ -137,7 +137,6 @@
 #define LINUX_BOOT_PARAM_ADDR  (PHYS_SDRAM_1 + 0x100)
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTDELAY       3
 
 /*
  * U-Boot commands

diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 521e3cf335c43058f1ffb86482563b2c552def71..6d469a383c6ca61e3cfac781cc71a7097ce9adee 100644 (file)
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -69,7 +69,6 @@
 
 #define CONFIG_MCFTMR
 
-#define CONFIG_BOOTDELAY       5
 #define        CONFIG_SYS_LONGHELP     1
 
 #define        CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size      */

diff --git a/include/configs/eco5pk.h b/include/configs/eco5pk.h
index bb5d7e581ed1d4f8e7b0eded4f52449a6465a69c..c7b0a389c912ff7ff3b0408939b2ca5e2d16f2dd 100644 (file)
--- a/include/configs/eco5pk.h
+++ b/include/configs/eco5pk.h
@@ -31,7 +31,6 @@
 #define MACH_TYPE_ECO5_PK      4017
 #define CONFIG_MACH_TYPE       MACH_TYPE_ECO5_PK
 
-#define CONFIG_BOOTDELAY       10
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_AUTO_COMPLETE
 

diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
index 2ac7757b0cf776e04c05af4f42ae8f7bc91283b1..706ad1d2a3a4d93ea6dcc7e6f63751a395eab789 100644 (file)
--- a/include/configs/ecovec.h
+++ b/include/configs/ecovec.h
@@ -37,7 +37,6 @@
 #define CONFIG_DOS_PARTITION
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC0,115200"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index 174cdf330240a1b85692aa7ef27a4284495e123d..f3f7549688947de517d7ac1065a66f3b6ca02633 100644 (file)
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -26,7 +26,6 @@
 #endif
 
 /* Initial environment and monitor configuration options. */
-#define CONFIG_BOOTDELAY               2
 #define CONFIG_CMDLINE_TAG             1
 #define CONFIG_INITRD_TAG              1
 #define CONFIG_SETUP_MEMORY_TAGS       1

diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 99d16b06c094675bd619ea0b7ff470956e179c98..f9d4683fcbee5a2f5dc971e90d7a4d40a30d2952 100644 (file)
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -115,7 +115,6 @@
 #define CONFIG_SYS_FLASH_BASE          0xfff80000
 
 /* auto boot */
-#define CONFIG_BOOTDELAY       3       /* default enable autoboot */
 
 /*
  * For booting Linux, the board info and command line data

diff --git a/include/configs/espt.h b/include/configs/espt.h
index 3d6737649802aabff838aa136d1beda0d826c498..86e726c63c566562ec3c8753e00b62cec39148bb 100644 (file)
--- a/include/configs/espt.h
+++ b/include/configs/espt.h
@@ -20,7 +20,6 @@
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_ENV
 
-#define CONFIG_BOOTDELAY        -1
 #define CONFIG_BOOTARGS         "console=ttySC0,115200 root=1f01"
 #define CONFIG_ENV_OVERWRITE    1
 

diff --git a/include/configs/etamin.h b/include/configs/etamin.h
new file mode 100644 (file)
index 0000000..4919cfe
--- /dev/null
+++ b/include/configs/etamin.h
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2013 Siemens Schweiz AG
+ * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Based on:
+ * U-Boot file:/include/configs/am335x_evm.h
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __CONFIG_ETAMIN_H
+#define __CONFIG_ETAMIN_H
+
+#include "siemens-am33x-common.h"
+/* NAND specific changes for etamin due to different page size */
+#undef CONFIG_SYS_NAND_PAGE_SIZE
+#undef CONFIG_SYS_NAND_OOBSIZE
+#undef CONFIG_SYS_NAND_BLOCK_SIZE
+#undef CONFIG_SYS_NAND_ECCPOS
+#undef CONFIG_SYS_NAND_U_BOOT_OFFS
+#undef CONFIG_SYS_ENV_SECT_SIZE
+#undef CONFIG_ENV_OFFSET
+#undef CONFIG_NAND_OMAP_ECCSCHEME
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH16_CODE_HW
+
+#define CONFIG_ENV_OFFSET       0x980000
+#define CONFIG_SYS_ENV_SECT_SIZE       (512 << 10)     /* 512 KiB */
+#define CONFIG_SYS_NAND_PAGE_SIZE       4096
+#define CONFIG_SYS_NAND_OOBSIZE         224
+#define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * CONFIG_SYS_NAND_PAGE_SIZE)
+#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
+                               10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
+                               20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
+                               30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
+                               40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
+                               50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
+                               60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
+                               70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
+                               80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
+                               90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
+                       100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
+                       110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
+                       120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
+                       130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
+                       140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
+                       150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
+                       160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
+                       170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
+                       180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
+                       190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
+                       200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
+                       }
+
+#undef CONFIG_SYS_NAND_ECCSIZE
+#undef CONFIG_SYS_NAND_ECCBYTES
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 26
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x200000
+
+#define CONFIG_SYS_NAND_MAX_CHIPS       1
+
+#undef CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_MAX_NAND_DEVICE      3
+#define CONFIG_SYS_NAND_BASE2           (0x18000000)    /* physical address */
+#define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
+                                       CONFIG_SYS_NAND_BASE2}
+
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_SYS_MPUCLK      300
+#define DDR_PLL_FREQ   303
+#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
+
+/* FWD Button = 27
+ * SRV Button = 87 */
+#define BOARD_DFU_BUTTON_GPIO  27
+#define GPIO_LAN9303_NRST      88      /* GPIO2_24 = gpio88 */
+/* In dfu mode keep led1 on */
+#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \
+       "button_dfu0=27\0" \
+       "button_dfu1=87\0" \
+       "led0=3,0,1\0" \
+       "led1=4,0,0\0" \
+       "led2=5,0,1\0" \
+       "led3=87,0,1\0" \
+       "led4=60,0,1\0" \
+       "led5=63,0,1\0"
+
+#undef CONFIG_DOS_PARTITION
+#undef CONFIG_CMD_FAT
+
+#define CONFIG_BOARD_LATE_INIT
+
+/* Physical Memory Map */
+#define CONFIG_MAX_RAM_BANK_SIZE       (1024 << 20)    /* 1GB */
+
+/* I2C Configuration */
+#define CONFIG_SYS_I2C_SPEED           100000
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR              0x50
+#define EEPROM_ADDR_DDR3 0x90
+#define EEPROM_ADDR_CHIP 0x120
+
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS     0x300
+
+#undef CONFIG_SPL_NET_SUPPORT
+#undef CONFIG_SPL_NET_VCI_STRING
+#undef CONFIG_SPL_ETH_SUPPORT
+
+#undef CONFIG_MII
+#undef CONFIG_PHY_GIGE
+#define CONFIG_PHY_SMSC
+
+#define CONFIG_FACTORYSET
+
+/* use both define to compile a SPL compliance test  */
+/*
+#define CONFIG_SPL_CMT
+#define CONFIG_SPL_CMT_DEBUG
+*/
+
+/* nedded by compliance test in read mode */
+#if defined(CONFIG_SPL_CMT)
+#define CONFIG_SYS_DCACHE_OFF
+#endif
+
+/* Watchdog */
+#define CONFIG_OMAP_WATCHDOG
+
+/* Define own nand partitions */
+#define CONFIG_ENV_OFFSET_REDUND       0xB80000
+#define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
+#define CONFIG_ENV_RANGE               (4 * CONFIG_SYS_ENV_SECT_SIZE)
+
+
+
+#define CONFIG_DFU_MTD
+#undef COMMON_ENV_DFU_ARGS
+#define COMMON_ENV_DFU_ARGS    "dfu_args=run bootargs_defaults;" \
+                               "setenv bootargs ${bootargs};" \
+                               "mtdparts default;" \
+                               "draco_led 1;" \
+                               "dfu 0 mtd 0;" \
+                               "draco_led 0;\0" \
+
+#undef DFU_ALT_INFO_NAND_V2
+#define DFU_ALT_INFO_NAND_V2 \
+       "spl mtddev;" \
+       "spl.backup1 mtddev;" \
+       "spl.backup2 mtddev;" \
+       "spl.backup3 mtddev;" \
+       "u-boot mtddev;" \
+       "u-boot.env0 mtddev;" \
+       "u-boot.env1 mtddev;" \
+       "rootfs mtddevubi" \
+
+#undef MTDIDS_NAME_STR
+#define MTDIDS_NAME_STR                "omap2-nand_concat"
+#undef MTDIDS_DEFAULT
+#define MTDIDS_DEFAULT         "nand2=" MTDIDS_NAME_STR
+
+#undef MTDPARTS_DEFAULT_V2
+#define MTDPARTS_DEFAULT_V2     "mtdparts=" MTDIDS_NAME_STR ":" \
+                               "512k(spl)," \
+                               "512k(spl.backup1)," \
+                               "512k(spl.backup2)," \
+                               "512k(spl.backup3)," \
+                               "7680k(u-boot)," \
+                               "2048k(u-boot.env0)," \
+                               "2048k(u-boot.env1)," \
+                               "2048k(mtdoops)," \
+                               "-(rootfs)"
+
+#undef MTDPARTS_DEFAULT
+#define MTDPARTS_DEFAULT       MTDPARTS_DEFAULT_V2
+
+#undef CONFIG_ENV_SETTINGS_NAND_V2
+#define CONFIG_ENV_SETTINGS_NAND_V2 \
+       "nand_active_ubi_vol=rootfs_a\0" \
+       "rootfs_name=rootfs\0" \
+       "kernel_name=uImage\0"\
+       "nand_root_fs_type=ubifs rootwait=1\0" \
+       "nand_args=run bootargs_defaults;" \
+               "mtdparts default;" \
+               "setenv ${partitionset_active} true;" \
+               "if test -n ${A}; then " \
+                       "setenv nand_active_ubi_vol ${rootfs_name}_a;" \
+               "fi;" \
+               "if test -n ${B}; then " \
+                       "setenv nand_active_ubi_vol ${rootfs_name}_b;" \
+               "fi;" \
+               "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \
+               "ubi.mtd=rootfs,${ubi_off};" \
+               "setenv bootargs ${bootargs} " \
+               "root=${nand_root} noinitrd ${mtdparts} " \
+               "rootfstype=${nand_root_fs_type} ip=${ip_method} " \
+               "console=ttyMTD,mtdoops console=ttyO0,115200n8 mtdoops.mtddev" \
+               "=mtdoops\0" \
+       COMMON_ENV_DFU_ARGS \
+               "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \
+       COMMON_ENV_NAND_BOOT \
+               "ubi part rootfs ${ubi_off};" \
+               "ubifsmount ubi0:${nand_active_ubi_vol};" \
+               "ubifsload ${kloadaddr} boot/${kernel_name};" \
+               "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \
+               "bootm ${kloadaddr} - ${loadaddr}\0" \
+       "nand_boot_backup=ubifsload ${loadaddr} boot/am335x-draco.dtb;" \
+               "bootm ${kloadaddr} - ${loadaddr}\0" \
+       COMMON_ENV_NAND_CMDS
+
+#ifndef CONFIG_SPL_BUILD
+
+#define CONFIG_NAND_CS_INIT
+#define ETAMIN_NAND_GPMC_CONFIG1       0x00000800
+#define ETAMIN_NAND_GPMC_CONFIG2       0x001e1e00
+#define ETAMIN_NAND_GPMC_CONFIG3       0x001e1e00
+#define ETAMIN_NAND_GPMC_CONFIG4       0x16051807
+#define ETAMIN_NAND_GPMC_CONFIG5       0x00151e1e
+#define ETAMIN_NAND_GPMC_CONFIG6       0x16000f80
+#define CONFIG_MTD_CONCAT
+
+/* Default env settings */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       "hostname=etamin\0" \
+       "ubi_off=4096\0"\
+       "nand_img_size=0x400000\0" \
+       "optargs=\0" \
+       "preboot=draco_led 0\0" \
+       CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \
+       CONFIG_ENV_SETTINGS_V2 \
+       CONFIG_ENV_SETTINGS_NAND_V2
+
+#ifndef CONFIG_RESTORE_FLASH
+
+#define CONFIG_BOOTCOMMAND \
+"if dfubutton; then " \
+       "run dfu_start; " \
+       "reset; " \
+"fi;" \
+"run nand_boot;" \
+"run nand_boot_backup;" \
+"reset;"
+
+
+#else
+#define CONFIG_BOOTCOMMAND                     \
+       "setenv autoload no; "                  \
+       "dhcp; "                                \
+       "if tftp 80000000 debrick.scr; then "   \
+               "source 80000000; "             \
+       "fi"
+#endif
+#endif /* CONFIG_SPL_BUILD */
+#endif /* ! __CONFIG_ETAMIN_H */

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 94fee54ccd140b921a78390f114fde6baf90169b..bd32cdbf735d42b8888ff9eabe5be0bcb16f3c7e 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -205,7 +205,6 @@
 #define CONFIG_RBTREE
 
 /* Boot command */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG

diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index 7400870b214b4478c404736ed98d2827f6d664e9..824aca45b647d7331643d49cf13e3f71ec2247ea 100644 (file)
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -81,7 +81,6 @@
 
 #define CONFIG_NET_RETRY_COUNT 100
 
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_LOADADDR                0x80800000      /* loadaddr env var */
 

diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 130487987656086b3f9a620e352d11167f589264..4de2460bc0ee641bf9ddb38d8aa78bed85bda984 100644 (file)
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -36,7 +36,6 @@
 
 #define CONFIG_SUPPORT_EMMC_BOOT
 
-#define CONFIG_BOOTDELAY               1
 
 #include "mx6_common.h"
 #include <linux/sizes.h>
@@ -60,13 +59,14 @@
 #define CONFIG_MXC_OCOTP
 
 /* SATA Configs */
-#define CONFIG_CMD_SATA
+#ifdef CONFIG_CMD_SATA
 #define CONFIG_DWC_AHSATA
 #define CONFIG_SYS_SATA_MAX_DEVICE     1
 #define CONFIG_DWC_AHSATA_PORT_ID      0
 #define CONFIG_DWC_AHSATA_BASE_ADDR    SATA_ARB_BASE_ADDR
 #define CONFIG_LBA48
 #define CONFIG_LIBATA
+#endif
 
 /* MMC Configs */
 #define CONFIG_FSL_ESDHC
@@ -78,6 +78,7 @@
 #define CONFIG_DOS_PARTITION
 
 /* USB Configs */
+#ifdef CONFIG_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MX6
 #define CONFIG_USB_STORAGE
@@ -99,8 +100,10 @@
 #define CONFIG_G_DNL_VENDOR_NUM   0x0525
 #define CONFIG_G_DNL_PRODUCT_NUM  0xa4a5
 #define CONFIG_G_DNL_MANUFACTURER "Advantech"
+#endif
 
 /* Networking Configs */
+#ifdef CONFIG_NET
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
@@ -109,6 +112,7 @@
 #define CONFIG_FEC_MXC_PHYADDR         4
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
+#endif
 
 /* Serial Flash */
 #ifdef CONFIG_CMD_SF
@@ -221,29 +225,37 @@
                        "bootm; " \
                "fi;\0" \
 
-#define CONFIG_BOOTCOMMAND \
-       "usb start; " \
-       "setenv dev usb; " \
-       "setenv devnum 0; " \
-       "setenv rootdev sda1; " \
-       "run tryboot; " \
-       \
+#define CONFIG_MMCBOOTCOMMAND \
        "setenv dev mmc; " \
-       "setenv rootdev mmcblk0p1; " \
+       "setenv rootdev mmcblk0p${partnum}; " \
        \
        "setenv devnum ${sddev}; " \
        "if mmc dev ${devnum}; then " \
                "run tryboot; " \
-               "setenv rootdev mmcblk1p1; " \
+               "setenv rootdev mmcblk1p${partnum}; " \
        "fi; " \
        \
        "setenv devnum ${emmcdev}; " \
        "if mmc dev ${devnum}; then " \
                "run tryboot; " \
        "fi; " \
+
+#define CONFIG_USBBOOTCOMMAND \
+       "usb start; " \
+       "setenv dev usb; " \
+       "setenv devnum 0; " \
+       "setenv rootdev sda${partnum}; " \
+       "run tryboot; " \
        \
+       CONFIG_MMCBOOTCOMMAND \
        "bmode usb; " \
 
+#ifdef CONFIG_CMD_USB
+#define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
+#else
+#define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
+#endif
+
 #define CONFIG_ARP_TIMEOUT     200UL
 
 /* Miscellaneous configurable options */
@@ -293,13 +305,14 @@
 
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+
 /* Framebuffer */
-#define CONFIG_VIDEO
+#ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_IPUV3
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_SPLASH_SCREEN_ALIGN
@@ -309,6 +322,7 @@
 #define CONFIG_IPUV3_CLK 260000000
 #define CONFIG_IMX_HDMI
 #define CONFIG_IMX_VIDEO_SKIP
+#endif
 
 #define CONFIG_PWM_IMX
 #define CONFIG_IMX6_PWM_PER_CLK        66000000

diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h
index e6b7953c929f6c1e876c0e176310552e7d59492f..8b573545cd8dced80aeb22c65960f7ac6b317f27 100644 (file)
--- a/include/configs/gr_cpci_ax2000.h
+++ b/include/configs/gr_cpci_ax2000.h
@@ -65,7 +65,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \

diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h
index 956c0e27bda70e02f179b5a4618ec361dc9a179d..4e7819912d72d6464e1e7f28427d5c49dfff1823 100644 (file)
--- a/include/configs/gr_ep2s60.h
+++ b/include/configs/gr_ep2s60.h
@@ -67,7 +67,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \

diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h
index 908d545070fd11d394fb222df92cb6922ca6daa7..36acf016319d9859134890dafac2097fd6ffa615 100644 (file)
--- a/include/configs/gr_xc3s_1500.h
+++ b/include/configs/gr_xc3s_1500.h
@@ -46,7 +46,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \

diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h
index 83f1d73087ac10d921617085052b991a16e4d88d..f1afdedb3c0ed2c72125401d7038af7e547169f4 100644 (file)
--- a/include/configs/grasshopper.h
+++ b/include/configs/grasshopper.h
@@ -74,7 +74,6 @@
 
 #define CONFIG_BAUDRATE                        115200
 
-#define CONFIG_BOOTDELAY               1
 
 /*
  * After booting the board for the first time, new ethernet addresses

diff --git a/include/configs/grsim.h b/include/configs/grsim.h
index 6a889015a360c511c3b3c71ad9962e7ab1c288b3..c2656fbeb28dfd3d0c9758b00a2fbc530eb04fad 100644 (file)
--- a/include/configs/grsim.h
+++ b/include/configs/grsim.h
@@ -58,7 +58,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \

diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h
index 0ebded6bd2824cc13bffb8c025e5cc67a10f83e9..59adbdc1028356a118ebd3b054606f7111ea734e 100644 (file)
--- a/include/configs/grsim_leon2.h
+++ b/include/configs/grsim_leon2.h
@@ -53,7 +53,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \

diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index e11629cc5545651d4aac4acd64cfc30e4d9b880b..982ddba39cf9bab0d23686a6a095e42cd9e877c4 100644 (file)
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -18,7 +18,6 @@
 /* Falcon Mode */
 #define CONFIG_CMD_SPL
 #define CONFIG_SPL_OS_BOOT
-#define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SYS_SPL_ARGS_ADDR       0x18000000
 #define CONFIG_CMD_SPL_WRITE_SIZE      (128 * SZ_1K)
 
@@ -33,6 +32,7 @@
 
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
 #include "mx6_common.h"
+#undef CONFIG_SPL_EXT_SUPPORT
 
 #define CONFIG_MACH_TYPE       4520   /* Gateworks Ventana Platform */
 
@@ -52,9 +52,6 @@
 #define CONFIG_DM_THERMAL
 #endif
 
-/* GPIO */
-#define CONFIG_MXC_GPIO
-
 /* Thermal */
 #define CONFIG_IMX_THERMAL
 
@@ -204,6 +201,7 @@
 
 /* Miscellaneous configurable options */
 #define CONFIG_HWCONFIG
+#define CONFIG_PREBOOT
 
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
@@ -284,37 +282,45 @@
        \
        "mtdparts=" MTDPARTS_DEFAULT "\0" \
        "mtdids=" MTDIDS_DEFAULT "\0" \
+       "disk=0\0" \
+       "part=1\0" \
        \
        "fdt_high=0xffffffff\0" \
        "fdt_addr=0x18000000\0" \
        "initrd_high=0xffffffff\0" \
+       "fixfdt=" \
+               "fdt addr ${fdt_addr}\0" \
        "bootdir=boot\0" \
        "loadfdt=" \
                "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
                        "echo Loaded DTB from ${bootdir}/${fdt_file}; " \
+                       "run fixfdt; " \
                "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
                        "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
+                       "run fixfdt; " \
                "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
                        "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
+                       "run fixfdt; " \
                "fi\0" \
        \
+       "fs=ext4\0" \
        "script=6x_bootscript-ventana\0" \
        "loadscript=" \
                "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
-                       "source; " \
+                       "source ${loadaddr}; " \
                "fi\0" \
        \
        "uimage=uImage\0" \
-       "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
+       "mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
        "mmc_boot=" \
-               "setenv fsload 'ext2load mmc 0:1'; " \
-               "mmc dev 0 && mmc rescan && " \
+               "setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
+               "mmc dev ${disk} && mmc rescan && " \
                "setenv dtype mmc; run loadscript; " \
                "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
                        "setenv bootargs console=${console},${baudrate} " \
-                               "root=/dev/mmcblk0p1 rootfstype=ext4 " \
+                               "root=/dev/mmcblk0p1 rootfstype=${fs} " \
                                "rootwait rw ${video} ${extra}; " \
-                       "if run loadfdt && fdt addr ${fdt_addr}; then " \
+                       "if run loadfdt; then " \
                                "bootm ${loadaddr} - ${fdt_addr}; " \
                        "else " \
                                "bootm; " \
@@ -322,26 +328,28 @@
                "fi\0" \
        \
        "sata_boot=" \
-               "setenv fsload 'ext2load sata 0:1'; sata init && " \
+               "setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
+               "sata init && " \
                "setenv dtype sata; run loadscript; " \
                "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
                        "setenv bootargs console=${console},${baudrate} " \
-                               "root=/dev/sda1 rootfstype=ext4 " \
+                               "root=/dev/sda1 rootfstype=${fs} " \
                                "rootwait rw ${video} ${extra}; " \
-                       "if run loadfdt && fdt addr ${fdt_addr}; then " \
+                       "if run loadfdt; then " \
                                "bootm ${loadaddr} - ${fdt_addr}; " \
                        "else " \
                                "bootm; " \
                        "fi; " \
                "fi\0" \
        "usb_boot=" \
-               "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
+               "setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
+               "usb start && usb dev ${disk} && " \
                "setenv dtype usb; run loadscript; " \
                "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
                        "setenv bootargs console=${console},${baudrate} " \
-                               "root=/dev/sda1 rootfstype=ext4 " \
+                               "root=/dev/sda1 rootfstype=${fs} " \
                                "rootwait rw ${video} ${extra}; " \
-                       "if run loadfdt && fdt addr ${fdt_addr}; then " \
+                       "if run loadfdt; then " \
                                "bootm ${loadaddr} - ${fdt_addr}; " \
                        "else " \
                                "bootm; " \
@@ -404,7 +412,7 @@
                "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
                        "setenv bootargs console=${console},${baudrate} " \
                                "root=${root} ${video} ${extra}; " \
-                       "if run loadfdt && fdt addr ${fdt_addr}; then " \
+                       "if run loadfdt; then " \
                                "ubifsumount; " \
                                "bootm ${loadaddr} - ${fdt_addr}; " \
                        "else " \

diff --git a/include/configs/h2200.h b/include/configs/h2200.h
index 3d510d6d88771432fd05dcdcf573673f8a882a67..3e419c644590f71127f7024c52b593facc1f50ed 100644 (file)
--- a/include/configs/h2200.h
+++ b/include/configs/h2200.h
@@ -135,7 +135,6 @@
 #define CONFIG_USB_DEV_PULLUP_GPIO     33
 /* USB VBUS GPIO 3 */
 
-#define CONFIG_BOOTDELAY               2
 #define CONFIG_BOOTCOMMAND             \
        "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
        "if bootp ; then setenv downloaded 1 ; fi ; done ; " \

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 9f02a654c3b4a910ba05da170ce5f381ddc6baaa..6a8660b088063399cec056931758d3249f809fc8 100644 (file)
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -621,7 +621,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define CONFIG_HOSTNAME                hrcon
 #define CONFIG_ROOTPATH                "/opt/nfsroot"

diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 04515ba80a694a691811d5cba20b17109ee62964..b750d72d35bcc4be4a970375f301d847227901b6 100644 (file)
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -25,7 +25,6 @@
 
 #define CONFIG_BOOT_RETRY_TIME         900
 #define CONFIG_BOOT_RETRY_MIN          30
-#define CONFIG_BOOTDELAY               1
 #define CONFIG_RESET_TO_RETRY
 
 #define CONFIG_83XX_CLKIN              66000000        /* in Hz */

diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index b8ee44d8681e564c68d8dfc5f22475c7f5a8a772..80628ddaf3c1de802c6aeadd98331fa4b3095efa 100644 (file)
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -175,7 +175,6 @@
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_NAND
 
-#define CONFIG_BOOTDELAY       5
 
 #define CONFIG_LOADADDR                0xa0800000      /* loadaddr env var */
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR

diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 94fc07753981f0a8179f862f23bfb2b4133af69d..50dfc115235143d9c6a4516d330734d8b780bf8b 100644 (file)
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -54,7 +54,6 @@
  ***********************************************************/
 #define CONFIG_CMD_EEPROM
 
-#define CONFIG_BOOTDELAY       3
 
 #define MTDPARTS_DEFAULT       "mtdparts=physmap-flash.0:128k(uboot)ro," \
                                        "1536k(kernel),-(root)"

diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index 0d4f2925cd4ae10791342016c62de68815d81943..3420a39adeef6afb2c3739bc4f269cb08b86ddcf 100644 (file)
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -92,7 +92,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       1       /* autoboot after 1 second */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index a5a881972729c90948871a2ca34f1ad413d012ae..e7d058f7a84cec57d2c123210ac9d2149a38fa7d 100644 (file)
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -31,7 +31,6 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_BOOTDELAY       2
 #define CONFIG_BOOTARGS                "root=/dev/mtdblock0 console=ttyAM0 console=tty"
 #define CONFIG_BOOTCOMMAND     ""
 

diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index af69ad99c4cda87fcad3cebd07036d9b6811687b..d0b6af8cadc7da2d54c089d0df382b65f6be0a22 100644 (file)
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -31,7 +31,6 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_BOOTDELAY       2
 #define CONFIG_BOOTARGS        "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
 #define CONFIG_BOOTCOMMAND "tftpboot ; bootm"
 #define CONFIG_SERVERIP 192.168.1.100

diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index b2a6e7fb0565e90e4ad734eb617cde9f95db5efc..b36b75dfb6830eb78a792a4a0a22be818d79d8e0 100644 (file)
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -223,7 +223,6 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTDELAY       2
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \
                "root=/dev/mtdblock5 rw noinitrd " \

diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h
index 55ed6569ef88fb4ef8f2627f1d272b2092ee8b5a..eb4e3aea3865daa87299980898d35f45d42c995c 100644 (file)
--- a/include/configs/ipek01.h
+++ b/include/configs/ipek01.h
@@ -115,7 +115,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h
index 062820305dd36cf6aa74c5a4a31ab1a40da27244..65f53b76125283542f8d9775dd7e99e4efe9a8ef 100644 (file)
--- a/include/configs/jupiter.h
+++ b/include/configs/jupiter.h
@@ -92,7 +92,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index 9f76034e61a7c573f5dd850c76b0b6c1b1cc0c2e..6f2773b88c1ccc5bb2e1e1dae215b9dae7581e51 100644 (file)
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -21,7 +21,6 @@
 
 #undef CONFIG_WATCHDOG         /* disable platform specific watchdog */
 
-#define CONFIG_BOOTDELAY       2 /* autoboot after 2 seconds */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs */
 
 /*

diff --git a/include/configs/kwb.h b/include/configs/kwb.h
index bcb9e7e8be0949221cb87262a653460141a7f121..2bddc6b7df812a7354ce5b8effb767990c91704b 100644 (file)
--- a/include/configs/kwb.h
+++ b/include/configs/kwb.h
@@ -103,7 +103,6 @@ BUR_COMMON_ENV \
 
 #define CONFIG_BOOTCOMMAND \
        "run usbscript;"
-#define CONFIG_BOOTDELAY               0
 
 /* undefine command which we not need here */
 #undef CONFIG_BOOTM_NETBSD

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 710629b6bd924d04b4f6e966f358b7a503a29dcf..1b4c7d438897f0b2ea095c2c58af6d9d5c14ebd2 100644 (file)
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -31,7 +31,6 @@
 
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_BOOTARGS                "root=/dev/null console=ttySC4,115200"
-#define CONFIG_BOOTDELAY 3
 
 #define CONFIG_VERSION_VARIABLE
 #undef  CONFIG_SHOW_BOOT_PROGRESS

diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 1aad97d970bf1bc9e127259edceea3ffce7e1135..f52750e591bc6a230b502ffa31d955ef2688abc5 100644 (file)
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -168,7 +168,6 @@
 #define CONFIG_SERIAL_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_SETUP_INITRD_TAG
-#define CONFIG_BOOTDELAY       0
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 #define CONFIG_BOOTCOMMAND \
        "if mmc rescan; then " \

diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index ccd94ec952c239d998aaf65c5f443d4e11642a99..fba2facfbde14a14b0b26fbd0b2d594ca7fdffea 100644 (file)
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -125,7 +125,6 @@
 #define CONFIG_BOOTCOMMAND             "sf probe 0:0; sf read $kernel_load "\
                                        "$kernel_start $kernel_size && "\
                                        "bootm $kernel_load"
-#define CONFIG_BOOTDELAY               10
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 1edf798e32d45ce3fe3d2d7fe74e24610f1318f2..db684d25582cc9790c6ae2fabb6ed3bbddd2fee9 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -567,7 +567,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_FSL_DEVICE_DISABLE
 
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_SYS_QE_FW_ADDR     0x600c0000
 

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 30f5655dcb87c1f4aafe585176a5f3941ba190df..0fb28eff557434265edcaa1f756a60cb7998713a 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -416,7 +416,6 @@
 
 #define CONFIG_FSL_DEVICE_DISABLE
 
-#define CONFIG_BOOTDELAY               3
 
 #ifdef CONFIG_LPUART
 #define CONFIG_EXTRA_ENV_SETTINGS       \

diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index a7d49ed6e8430c0d9e42b6e3970a66b30a20f136..b0d4a8d10acf6e4e234a488b4d66adb50883ae63 100644 (file)
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -264,7 +264,6 @@
 #define CONFIG_BOOTCOMMAND             "cp.b $kernel_start $kernel_load "     \
                                        "$kernel_size && bootm $kernel_load"
 #endif
-#define CONFIG_BOOTDELAY               10
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index c78aeb57ed435f4ee869d74d6ee1a54b5b30bc79..ebe14154213c1b413968f07403b6be2a059545f4 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -29,11 +29,13 @@
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 
 /* Link Definitions */
+#ifndef CONFIG_QSPI_BOOT
 #ifdef CONFIG_SPL
 #define CONFIG_SYS_TEXT_BASE           0x80400000
 #else
 #define CONFIG_SYS_TEXT_BASE           0x30100000
 #endif
+#endif
 
 #ifdef CONFIG_EMU
 #define CONFIG_SYS_NO_FLASH
@@ -138,13 +140,6 @@
 #define CONFIG_SYS_FLASH1_BASE_PHYS            0xC0000000
 #define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY      0x8000000
 
-#ifndef CONFIG_SYS_NO_FLASH
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
-#define CONFIG_SYS_FLASH_QUIET_TEST
-#endif
-
 #ifndef __ASSEMBLY__
 unsigned long long get_qixis_addr(void);
 #endif
@@ -255,7 +250,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_BOOTCOMMAND     "fsl_mc apply dpl 0x580700000 &&" \
                                " cp.b $kernel_start $kernel_load" \
                                " $kernel_size && bootm $kernel_load"
-#define CONFIG_BOOTDELAY               10
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              512     /* Console I/O Buffer Size */
@@ -290,7 +284,7 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x00100000
 #define CONFIG_SYS_SPL_MALLOC_START    0x80200000
-#define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN         (640 * 1024)
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 

diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h
index 7563aafbc62c3844a597af44265b6623fcd97c39..7f245b5fad7526c548b287167a465fec043984ee 100644 (file)
--- a/include/configs/ls2080a_simu.h
+++ b/include/configs/ls2080a_simu.h
@@ -30,6 +30,13 @@
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
 #define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
 
+#ifndef CONFIG_SYS_NO_FLASH
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_QUIET_TEST
+#endif
+
 /*
  * NOR Flash Timing Params
  */

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b44066c4073de376640cf3a5056828e91ae700d8..df1455bef34297585968095cc2317d1af3bd764b 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #define CONFIG_SYS_FSL_CLK
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_QIXIS_I2C_ACCESS
+#define CONFIG_SYS_I2C_EARLY_INIT
+#define CONFIG_SYS_I2C_IFDR_DIV                0x7e
+#endif
+
+#define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
 #define COUNTER_FREQUENCY_REAL         (CONFIG_SYS_CLK_FREQ/4)
@@ -162,11 +172,13 @@ unsigned long get_board_ddr_clk(void);
 #define QIXIS_LBMAP_DFLTBANK           0x00
 #define QIXIS_LBMAP_ALTBANK            0x04
 #define QIXIS_LBMAP_NAND               0x09
+#define QIXIS_LBMAP_QSPI               0x0f
 #define QIXIS_RST_CTL_RESET            0x31
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START  0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE  0x08
 #define QIXIS_RCW_SRC_NAND             0x107
+#define QIXIS_RCW_SRC_QSPI             0x62
 #define        QIXIS_RST_FORCE_MEM             0x01
 
 #define CONFIG_SYS_CSPR3_EXT   (0x0)
@@ -227,7 +239,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_SPL_PAD_TO              0x20000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 * 1024)
-#define CONFIG_SYS_NAND_U_BOOT_SIZE    (512 * 1024)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE    (640 * 1024)
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
@@ -257,11 +269,19 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NAND_FTIM3
 
+#if defined(CONFIG_QSPI_BOOT)
+#define CONFIG_SYS_TEXT_BASE           0x20010000
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
+#define CONFIG_ENV_OFFSET              0x100000        /* 1MB */
+#define CONFIG_ENV_SECT_SIZE           0x10000
+#else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x200000)
 #define CONFIG_ENV_SECT_SIZE           0x20000
 #define CONFIG_ENV_SIZE                        0x2000
 #endif
+#endif
 
 /* Debug Server firmware */
 #define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
@@ -279,8 +299,27 @@ unsigned long get_board_ddr_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
 #define CONFIG_SPI_FLASH
+
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_EON
+#endif
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_SPI_FLASH_SPANSION
+#define FSL_QSPI_FLASH_SIZE            (1 << 26) /* 64MB */
+#define FSL_QSPI_FLASH_NUM             4
+#endif
+/*
+ * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
+ * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
+ * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
+ */
+#define FSL_QIXIS_BRDCFG9_QSPI         0x1
+
 #endif
 
 /*

diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
index d5082fa4ccfbdfa87f1967939933d91b2f494bee..0abfb00ef0b167629d22cb8063401fb268e9d289 100644 (file)
--- a/include/configs/lwmon5.h
+++ b/include/configs/lwmon5.h
@@ -340,7 +340,6 @@
        ""
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */

diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 428128d29773de40120e3da54112197d0d2e9eb6..e7fd6395e09b932320e5f60990f1f88557d78c3d 100644 (file)
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -130,7 +130,6 @@
 #endif
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 "
 #define CONFIG_BOOTCOMMAND     "run mmc_mmc"

diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 4349357b5407dcd49e44ca849b7967991b11d44a..781a1623ddebd95a556e0cb171e94a7e10d335eb 100644 (file)
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -226,7 +226,6 @@
 #define CONFIG_INITRD_TAG
 #define CONFIG_REVISION_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttymxc1,115200"
 #define CONFIG_LOADADDR                0x70800000

diff --git a/include/configs/ma5d4evk.h b/include/configs/ma5d4evk.h
index fb144637d585c9ffa9caa8536cfa92c1af275c13..b4bd6b0e1ec1e05b9ea1237ae7b064f394d27b35 100644 (file)
--- a/include/configs/ma5d4evk.h
+++ b/include/configs/ma5d4evk.h
@@ -128,7 +128,6 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_INITRD_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttyS3,115200"
 #define CONFIG_LOADADDR                0x20800000

diff --git a/include/configs/manroland/common.h b/include/configs/manroland/common.h
index 8d4a8cd0c2db38d29d3fe2dfc29bcc9d38c1c158..937febea214473e000687876e45affe78517ff2b 100644 (file)
--- a/include/configs/manroland/common.h
+++ b/include/configs/manroland/common.h
@@ -37,7 +37,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index 3dbd9204af69d427da60a05717494b6eb04b640c..0c6e1117d4fda50b38489894efaca7041980d658 100644 (file)
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -149,7 +149,6 @@
 #define CONFIG_JFFS2_PART_SIZE         0xf980000       /* sz of jffs2 part */
 
 /* Environment information */
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_BOOTFILE                "uImage"
 

diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index 9262f72085334b1d5d9878873497904db4f73dc6..4211e72dbaf5da27361b00c6e543ecc2c8ff9a86 100644 (file)
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -362,7 +362,6 @@
 
 #define CONFIG_LOADADDR                400000  /* def. location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                        /* the boot command will set bootargs*/
 
 #define CONFIG_PREBOOT "echo;" \

diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index f71b66245faeadd963ee959024f85df55d1864e8..fbcad4ac80887cdef8a55c3427ed94936607ae8b 100644 (file)
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -69,7 +69,6 @@
 #define CONFIG_USART_ID                        ATMEL_ID_SYS
 #define CONFIG_BAUDRATE                        115200
 
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 /*

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 801d674610003a4f40feaa1bcd197c7db353ab68..93fb166665ee94a1cea9e13adec3c8367e964104 100644 (file)
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -239,7 +239,6 @@
 /* default load address */
 #define        CONFIG_SYS_LOAD_ADDR    0
 
-#define        CONFIG_BOOTDELAY        -1      /* -1 disables auto-boot */
 #define        CONFIG_BOOTARGS         "root=romfs"
 #define        CONFIG_HOSTNAME         XILINX_BOARD_NAME
 #define        CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"

diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index 62919e9cf921854e1f89e109849191ea35dc4f37..2a83c608b1c19f864af2df35f471ca97adfdbed2 100644 (file)
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -63,7 +63,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       2       /* autoboot after 2 seconds */
 #undef CONFIG_BOOTARGS
 
 #define CONFIG_CMDLINE_EDITING         1       /* add command line history     */

diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index e0c9a98de75d44b8d5b12c3373983256fdfdb5b6..3cdd0dcf62dea5be47c00f52bac24314b33f5479 100644 (file)
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -516,7 +516,6 @@
 
 #define CONFIG_LOADADDR                400000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                        /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE                115200

diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index 66e1a45e16602c0b9bc7aeee16f9c0bf1a0f2857..57cb7956a469162d09fcb1e2745a5e803fab3349 100644 (file)
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -474,7 +474,6 @@
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "netdev=eth0\0"                                                 \

diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h
index f983f2d1b50bd4c599ad67eb98c17a4ca1e77b5f..27e9c0a8f3fae0495ad5144a1e0f1a5c00848664 100644 (file)
--- a/include/configs/ms7722se.h
+++ b/include/configs/ms7722se.h
@@ -16,7 +16,6 @@
 #define CONFIG_CMD_SDRAM
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC0,115200 root=1f01"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h
index 025a4a669850d8230ab99aa9e28c6f59eb965a10..c0fb16d0952b9c212de7a5262bfff369dbe00100 100644 (file)
--- a/include/configs/ms7750se.h
+++ b/include/configs/ms7750se.h
@@ -23,7 +23,6 @@
 #define CONFIG_CONS_SCIF1      1
 #define CONFIG_BOARD_LATE_INIT
 
-#define CONFIG_BOOTDELAY       -1
 #define CONFIG_BOOTARGS                "console=ttySC0,38400"
 #define CONFIG_ENV_OVERWRITE   1
 

diff --git a/include/configs/mt_ventoux.h b/include/configs/mt_ventoux.h
index 3073db9ff8fffe673eb9eb8af14ec91c1f36daae..29564d758b0b65739653a0b157c413b81970bc81 100644 (file)
--- a/include/configs/mt_ventoux.h
+++ b/include/configs/mt_ventoux.h
@@ -22,7 +22,6 @@
 #define MACH_TYPE_AM3517_MT_VENTOUX    3832
 #define CONFIG_MACH_TYPE       MACH_TYPE_AM3517_MT_VENTOUX
 
-#define CONFIG_BOOTDELAY       10
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_AUTO_COMPLETE
 

diff --git a/include/configs/munices.h b/include/configs/munices.h
index efbd44779eb330fed8d8e71ca559dba30744f8f6..3e4c062dbfcdef191ced5ea8ee6de7a7cc3e3971 100644 (file)
--- a/include/configs/munices.h
+++ b/include/configs/munices.h
@@ -41,7 +41,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200, 230400 }
 
 #define        CONFIG_TIMESTAMP        1       /* Print image info with timestamp */
-#define CONFIG_BOOTDELAY       5   /* autoboot after 5 seconds */
 #undef CONFIG_BOOTARGS
 
 #define CONFIG_PREBOOT "echo;" \

diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index 6d4bbd1f9a788b6b84572c964d251b250c047b4d..62f4937c662c183924c94bc41ca0ff835f2eb242 100644 (file)
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -57,7 +57,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, \
                                          115200,230400, 460800, 921600 }
 /* auto boot */
-#define CONFIG_BOOTDELAY       3       /* default enable autoboot */
 #define CONFIG_PREBOOT
 
 /*

diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index 1bdbe4bba98d3d359630a00d7c111122a43c16f4..774725871ac8e22d2d8a9606635ad5b805e35ff2 100644 (file)
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -57,7 +57,6 @@
 #endif
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_LOADADDR                0x42000000
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR

diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index 542f1f42b88cf8cc07e2aad2785b962a2b494e20..3f9bb0ab466614c5ab1a477bc362f805a067015f 100644 (file)
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -56,7 +56,6 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_BOOTDELAY       1
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_LOADADDR                0x42000000
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR

diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index c63887bb8c7f704a157316eb8cfe5e4afe34a6c5..ea0d605fe358a0a6fb895117ee439208088dafe6 100644 (file)
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -117,7 +117,6 @@
 
 /* Ethernet Configs */
 
-#define CONFIG_BOOTDELAY       1
 
 #define CONFIG_LOADADDR                0x81000000      /* loadaddr env var */
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR

diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index b3c03b3bb3d386e291d1e7088ce4d2a72de5c121..068596f397f177dc7496ad8519be80a63412f8ef 100644 (file)
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -137,7 +137,6 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_BOOTDELAY       1
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_LOADADDR                0x42000000
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR

diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index b9992deaab71eddea03544cc5dd74fc27be55313..8de9dec66f89790b1ec0c9d2ca541c9d710cd157 100644 (file)
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -64,7 +64,6 @@
  ***********************************************************/
 #define CONFIG_CMD_DATE
 
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_LOADADDR                0x80800000      /* loadaddr env var */
 

diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 3f63007819a6464bd06f5eecf38b58901d319063..a81dd784c9984dd1a211c86a6b4ff5035aeb9a6f 100644 (file)
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -84,7 +84,6 @@
 
 #define CONFIG_BOARD_LATE_INIT
 
-#define CONFIG_BOOTDELAY       1
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        "bootargs_base=setenv bootargs console=ttymxc0,115200\0"        \

diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index aed0939ce609fef93bb410e0125a468bb51eed7d..1d1178798ef8f0f5037254fa2ae071b0ff16e51c 100644 (file)
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -91,7 +91,6 @@
 #define CONFIG_DOS_PARTITION
 #define CONFIG_EFI_PARTITION
 
-#define CONFIG_BOOTDELAY       1
 
 #define CONFIG_LOADADDR                0x80800000      /* loadaddr env var */
 

diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 23b8b46d8c659b0c3216ef6d4b3bd35de3b4aaf4..93ad048b118f5ea11e8d1428fde21d6b8ea2e46f 100644 (file)
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -120,7 +120,6 @@
 
 #define CONFIG_CMD_DATE
 
-#define CONFIG_BOOTDELAY       1
 
 #define CONFIG_ETHPRIME                "FEC0"
 

diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index e6972612482f191a7fb2355aa0cb4e30b2edfe09..0419050354a5341aa2acecb4dae7e88bf568fc6a 100644 (file)
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -70,7 +70,6 @@
 #define CONFIG_BAUDRATE                        115200
 
 /* Command definition */
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_ETHPRIME                "smc911x"
 

diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index feb558023989b6fa0b975c838abe312fb8d528d8..5e1c5977eafae5528c4e86e0de445dccc1e30cfd 100644 (file)
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -77,7 +77,6 @@
 #define CONFIG_BAUDRATE                        115200
 
 /* Command definition */
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_ETHPRIME                "FEC0"
 

diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 8743ddce683c1b35ce33e9795630961c6fcc8ea4..1b580f04c7185e8d3d7e45e536b7bfb9aa62fe85 100644 (file)
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -87,7 +87,6 @@
 /* Command definition */
 #define CONFIG_SUPPORT_RAW_INITRD
 
-#define CONFIG_BOOTDELAY       1
 
 #define CONFIG_ETHPRIME                "FEC0"
 

diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index 9c76678b1c4f8d02eee2cafd2bfd7620543c5ee1..632ebba35c009049cc76a1a3e61d0396d30579e4 100644 (file)
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -64,7 +64,6 @@
 #define CONFIG_BAUDRATE                        115200
 
 /* Command definition */
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_ETHPRIME                "FEC0"
 

diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 17b6c48c1c65d0bc13dd9255540573f92a55b081..fb49322f3be35664c68367219a3fbe2321e23400 100644 (file)
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -59,10 +59,6 @@
 #endif
 #define CONFIG_SYS_LOAD_ADDR   CONFIG_LOADADDR
 
-#ifndef CONFIG_BOOTDELAY
-#define CONFIG_BOOTDELAY       3
-#endif
-
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX       1

diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 3c9a794f81fe3f4b394fa8eb1ef5a965091e6208..fbc6de62837038d16a2c335b486771286afc5457 100644 (file)
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -34,10 +34,6 @@
 #define CONFIG_LOADADDR                 0x80800000
 #define CONFIG_SYS_TEXT_BASE            0x87800000
 
-#ifndef CONFIG_BOOTDELAY
-#define CONFIG_BOOTDELAY                3
-#endif
-
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX               1

diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 0fbbce6d02958e087f5ad207998dd58c6175f427..cd154a4bbb3083e57d2a4fdbc719964098e0ad84 100644 (file)
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -379,7 +379,6 @@ int rx51_kp_getc(struct stdio_dev *sdev);
        "run attachboot;" \
        "echo"
 
-#define CONFIG_BOOTDELAY 30
 #define CONFIG_MENU
 #define CONFIG_MENU_SHOW
 

diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h
index 16fa046687ae9f806ecdea2ae7ee69d147475374..891378420e0cd3269644f20c3870f9ee254c6d69 100644 (file)
--- a/include/configs/o2dnt-common.h
+++ b/include/configs/o2dnt-common.h
@@ -90,7 +90,6 @@
 #error "CONFIG_SYS_TEXT_BASE value is invalid"
 #endif
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds */
 
 #define CONFIG_PREBOOT "run master"
 

diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h
index 3f777b6aebc445166df3dd525f99f0a4d65d84bf..82e0d5000ca93bd7d5c5cde61cd877699979de90 100644 (file)
--- a/include/configs/omap3_cairo.h
+++ b/include/configs/omap3_cairo.h
@@ -73,10 +73,6 @@
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
-/* override default CONFIG_BOOTDELAY */
-#undef CONFIG_BOOTDELAY
-#define CONFIG_BOOTDELAY       0
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "machid=ffffffff\0" \
        "fdt_high=0x87000000\0" \

diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 9dbca1c6f4d62141307e87407b54867bc8661661..1726a3ed1984535ced603d53f7a3fa6340f96962 100644 (file)
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -106,7 +106,6 @@
  * Default environment
  * -----------------------------------------------------------------------------
  */
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x82000000\0" \

diff --git a/include/configs/omap3_evm_quick_mmc.h b/include/configs/omap3_evm_quick_mmc.h
index a93a2fa0d6b90ffc815a2836f3205b78a38b69ff..b7d8765db5c8f7e1b83dc92bf92731084209c8c4 100644 (file)
--- a/include/configs/omap3_evm_quick_mmc.h
+++ b/include/configs/omap3_evm_quick_mmc.h
@@ -55,7 +55,6 @@
  * Default environment
  * -----------------------------------------------------------------------------
  */
-#define CONFIG_BOOTDELAY       0
 
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        "verify=no\0"                   \

diff --git a/include/configs/omap3_evm_quick_nand.h b/include/configs/omap3_evm_quick_nand.h
index bb908fad3eaf3047a6cff6d6b002ff49724fb466..da5d32517d2872a2a0201f6bf1403c9f31efd456 100644 (file)
--- a/include/configs/omap3_evm_quick_nand.h
+++ b/include/configs/omap3_evm_quick_nand.h
@@ -45,7 +45,6 @@
  * Default environment
  * -----------------------------------------------------------------------------
  */
-#define CONFIG_BOOTDELAY       0
 
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        "verify=no\0"                   \

diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index f3287e3ad3ce4ffd095ca2a60009514d360b6fad..1f36d36f45c83fae2f1e9f6f5e8ba515257a5059 100644 (file)
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -204,7 +204,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTARGS                "console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw rootwait ip=off"
 #define CONFIG_BOOTCOMMAND     "if mmc rescan 0; then if fatload mmc 0 0xc0600000 boot.scr; then source 0xc0600000; else fatload mmc 0 0xc0700000 uImage; bootm c0700000; fi; else sf probe 0; sf read 0xc0700000 0x80000 0x220000; bootm 0xc0700000; fi"
-#define CONFIG_BOOTDELAY       3
 
 /*
  * U-Boot commands

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 71b2fa9c074fe631282c8f0280edfda50345270c..4f22d12a3f2bbb3c676e41d9390ff97d3f2dfe9b 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -944,7 +944,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR        1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #define CONFIG_BOOTARGS        /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 9b75afe92a54431562f5de2d31e6d07e2581ab32..30bfbf44f5c3354632e3d8680cd8cc0427ce5fea 100644 (file)
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -468,7 +468,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR        1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #define CONFIG_BOOTARGS        /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index b907419a5987fcbb1fa834aa98f13e6878c3a181..a649991d1a6a4d2094e7d276d2a61e174b6a3c97 100644 (file)
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -31,7 +31,6 @@
 #endif
 #endif
 
-#define CONFIG_BOOTDELAY       2       /* autoboot after 2 seconds     */
 
 #define CONFIG_BAUDRATE                115200
 

diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h
index 0007c50ad99fc174c70ce898d30357627117b470..80d5d6c858eb99c98d42dc1003b0714719dcff26 100644 (file)
--- a/include/configs/pcm030.h
+++ b/include/configs/pcm030.h
@@ -70,7 +70,6 @@ Serial console configuration
 /*-----------------------------------------------------------------------------
 Autobooting
 -----------------------------------------------------------------------------*/
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds */
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* allow stopping of boot process */
                                        /* even with bootdelay=0 */
 #undef CONFIG_BOOTARGS

diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 494524d0650bce830a3915ad6649df0f9f1ce91e..74e22db15121d22879a64012ebb6c53fe643f78e 100644 (file)
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -113,7 +113,6 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 #define CONFIG_SYS_I2C_EEPROM_BUS 2
 
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_LOADADDR                        0x82000000
 

diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
index 3b6c7dc111c0bd77b2a5303d535857dffabd3471..6d03d6908ef426e9976d72d98489f718e6dcc8a2 100644 (file)
--- a/include/configs/pdm360ng.h
+++ b/include/configs/pdm360ng.h
@@ -448,7 +448,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                400000
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo PDM360NG SAMPLE;" \

diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 319e3b5111e8b7c1fd3d338ab48a4a15f8aaeb5e..49c98d81c46f0ea718a1112d8c83dd109f0f78e8 100644 (file)
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -125,7 +125,6 @@
  * Board boot configuration
  */
 #define CONFIG_TIMESTAMP       /* Print image info with timestamp */
-#define CONFIG_BOOTDELAY       5
 
 #define MEM_LAYOUT_ENV_SETTINGS                                        \
        "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0"   \

diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index 44ffd6d2044a213ab796748aa588f88f0f244077..7d7315ea1c81d41e171d01891dbb6e2f54139b64 100644 (file)
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -61,7 +61,6 @@
 #define CONFIG_AT91_LED
 #define CONFIG_GREEN_LED       AT91_PIN_PD31   /* this is the user1 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 39af5c02400efeeefe51b4586bd93f168a8cd05f..0abd84a147098efb93d66cfa41e0b9dbf1305ba5 100644 (file)
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -168,7 +168,6 @@
 #define CONFIG_GREEN_LED       GPIO_PIN_PC(13)
 #define CONFIG_YELLOW_LED      GPIO_PIN_PC(15)
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 111e0f50cd508aa08b87f8db9dc5715401b7fa2a..b8ce17e807d5ba20b8e58a698f5ea7dff4d49e19 100644 (file)
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -182,7 +182,6 @@
 #define CONFIG_RED_LED         GPIO_PIN_PB(7) /* this is the power led */
 #define CONFIG_GREEN_LED       GPIO_PIN_PB(8) /* this is the user1 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index facba3864daff0d719a9b18c546cd3ca5ff6756e..0e944d871ff42cdf02b7b21b5fdda3fdc150b100 100644 (file)
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -57,7 +57,6 @@
 #define CONFIG_RED_LED         GPIO_PIN_PD(31) /* this is the user1 led */
 #define CONFIG_GREEN_LED       GPIO_PIN_PD(0)  /* this is the user2 led */
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * BOOTP options

diff --git a/include/configs/pr1.h b/include/configs/pr1.h
index 9b394ddb13839a3d183527ebe833d6c88f528257..6804acb0cdfbf57d57219d01efa7b7bc081a6ee3 100644 (file)
--- a/include/configs/pr1.h
+++ b/include/configs/pr1.h
@@ -119,7 +119,6 @@
 #define CONFIG_RTC_BFIN
 #define CONFIG_UART_CONSOLE    0
 #define CONFIG_BOOTCOMMAND     "run nandboot"
-#define CONFIG_BOOTDELAY       2
 #define CONFIG_LOADADDR                0x2000000
 
 /*

diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 7450a1a42ac3ac9de29f13628362c52708d6532f..990fd84b32af263d9084f48604c56b3960356621 100644 (file)
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -61,6 +61,7 @@
 /* Default env settings */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "hostname=pxm2\0" \
+       "ubi_off=2048\0"\
        "nand_img_size=0x500000\0" \
        "optargs=\0" \
        "preboot=draco_led 0\0" \
@@ -92,7 +93,6 @@
 
 #ifndef CONFIG_RESTORE_FLASH
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTCOMMAND \
        "if dfubutton; then " \
@@ -118,7 +118,6 @@
        "reset;"
 
 #else
-#define CONFIG_BOOTDELAY               0
 
 #define CONFIG_BOOTCOMMAND                     \
        "setenv autoload no; "                  \

diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index f58fc4c377956cbbf70a47a622988f3337302ba9..546c508d2702f1a19aa13f6489ba8e8600324766 100644 (file)
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -17,7 +17,6 @@
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_BOOTDELAY       10      /* autoboot after 10 seconds */
 
 #define CONFIG_BAUDRATE                115200
 

diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index 2190d162007e99e3cc9a60a77fef3dedfd751e07..6cab7192037e4ed316a692fa5da2518ed0bcf652 100644 (file)
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -17,7 +17,6 @@
 #define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_MISC_INIT_R
 
-#define CONFIG_BOOTDELAY       10      /* autoboot after 10 seconds */
 
 #define CONFIG_BAUDRATE                115200
 

diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 73b377155cff8d717f6c3b6bb41c664ca3148728..0b8640223f4b07b06ea38e5699b57fcfd3bafeda 100644 (file)
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -179,7 +179,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 
 #define CONFIG_BAUDRATE        115200
 
-#define CONFIG_BOOTDELAY        1
 #define CONFIG_BOOTCOMMAND             \
        "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
 

diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h
index 437ea92a98146409fc4218b8a35bcb88d95e2084..c5e57244ab8d628b4c327c46d4b99240b0bdfb92 100644 (file)
--- a/include/configs/r0p7734.h
+++ b/include/configs/r0p7734.h
@@ -22,7 +22,6 @@
 #define CONFIG_CMD_ENV
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC3,115200"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index bf81d2b0ee49e5909f5ee1c7607739d2ece00179..1fc919b6eb425e54feb1200f5bcada3d4c3d6ab9 100644 (file)
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -22,7 +22,6 @@
 #define CONFIG_CONS_SCIF1      1
 #define CONFIG_BOARD_LATE_INIT
 
-#define CONFIG_BOOTDELAY       -1
 #define CONFIG_BOOTARGS                "console=ttySC0,115200"
 #define CONFIG_ENV_OVERWRITE   1
 

diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 6097dc2ca860ccd365bd1b99a08c7905dc99009a..c15580c582b02027787244a1672b053d852f20d5 100644 (file)
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -28,7 +28,6 @@
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_CONS_SCIF0      1
 
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC0,115200"
 #define CONFIG_ENV_OVERWRITE   1
 

diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h
index 47d23791c018a749d6f331720cf84510deca3563..55be46bcf2caf1a8e7e0ab5ee282fdad166ee1e0 100644 (file)
--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -76,6 +76,7 @@
 /* Default env settings */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "hostname=rastaban\0" \
+       "ubi_off=2048\0"\
        "nand_img_size=0x400000\0" \
        "optargs=\0" \
        "preboot=draco_led 0\0" \
@@ -85,7 +86,6 @@
 
 #ifndef CONFIG_RESTORE_FLASH
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTCOMMAND \
 "if dfubutton; then " \
@@ -97,7 +97,6 @@
 "reset;"
 
 #else
-#define CONFIG_BOOTDELAY               0
 
 #define CONFIG_BOOTCOMMAND                     \
        "setenv autoload no; "                  \

diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 337ba02a63f168901f2a11654d2f617c3b36e49c..80313fc8c57120f29f46b1f5477fd92a4696a060 100644 (file)
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -31,7 +31,6 @@
 #define CONFIG_CMDLINE_EDITING
 
 #define CONFIG_BAUDRATE                38400
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                ""
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/redwood.h b/include/configs/redwood.h
index 622b7c79e646aee6b72de00f6a414080d670fd25..72fbf108fa41a074e53bae9f5aa68a0eb5b5585e 100644 (file)
--- a/include/configs/redwood.h
+++ b/include/configs/redwood.h
@@ -132,7 +132,6 @@
 
 #define CONFIG_BOOTCOMMAND     "run flash_self"
 
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #define        CONFIG_IBM_EMAC4_V4     1
 #define CONFIG_PHY_RESET       1       /* reset phy upon startup       */

diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index 9ef5eae304e11b490155ef57307a8c1873c50936..dbbb81efa99f527b2617e0f5c33a2c8ecee5ac38 100644 (file)
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -214,6 +214,5 @@
        ENV_MEM_LAYOUT_SETTINGS \
        BOOTENV
 
-#define CONFIG_BOOTDELAY 2
 
 #endif

diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h
index c60e233e9f7f81f2fb0b6e4ac527daffd48f00e3..3f9fb7bc0280b3a1af432534626cd0b56f5c953b 100644 (file)
--- a/include/configs/rsk7264.h
+++ b/include/configs/rsk7264.h
@@ -17,7 +17,6 @@
 
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_BOOTARGS                "console=ttySC3,115200"
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
 
 #define CONFIG_SYS_LONGHELP    1       /* undef to save memory */

diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h
index b4fbc9c17db5660728dff84f59c17c5d25e1387c..b7f361be2548167413bfb8b6222436ad6f5865b8 100644 (file)
--- a/include/configs/rsk7269.h
+++ b/include/configs/rsk7269.h
@@ -16,7 +16,6 @@
 
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_BOOTARGS                "console=ttySC7,115200"
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
 
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */

diff --git a/include/configs/rut.h b/include/configs/rut.h
index bf2cc2f2bbfa8e8a6a73a1d64ce0041a32ad6b2e..aea8e217d019eafc0b3e174451f0e917f43ee36a 100644 (file)
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -56,6 +56,7 @@
 /* Default env settings */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "hostname=rut\0" \
+       "ubi_off=2048\0"\
        "nand_img_size=0x500000\0" \
        "splashpos=m,m\0" \
        "optargs=fixrtc --no-log consoleblank=0 \0" \
@@ -85,7 +86,6 @@
 
 #ifndef CONFIG_RESTORE_FLASH
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTCOMMAND \
        "if mmc rescan; then " \
@@ -107,7 +107,6 @@
        "reset;"
 
 #else
-#define CONFIG_BOOTDELAY               0
 
 #define CONFIG_BOOTCOMMAND                     \
        "setenv autoload no; "                  \

diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h
new file mode 100644 (file)
index 0000000..9723bab
--- /dev/null
+++ b/include/configs/s32v234evb.h
@@ -0,0 +1,260 @@
+/*
+ * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ *
+ * Configuration settings for the Freescale S32V234 EVB board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#ifndef CONFIG_SPL_BUILD
+#include <config_distro_defaults.h>
+#endif
+
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_S32V234
+#define CONFIG_DM
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Config GIC */
+#define CONFIG_GICV2
+#define GICD_BASE 0x7D001000
+#define GICC_BASE 0x7D002000
+
+#define CONFIG_REMAKE_ELF
+#undef CONFIG_RUN_FROM_IRAM_ONLY
+
+#define CONFIG_RUN_FROM_DDR1
+#undef CONFIG_RUN_FROM_DDR0
+
+/* Run by default from DDR1  */
+#ifdef CONFIG_RUN_FROM_DDR0
+#define DDR_BASE_ADDR          0x80000000
+#else
+#define DDR_BASE_ADDR          0xC0000000
+#endif
+
+#define CONFIG_MACH_TYPE               4146
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* Config CACHE */
+#define CONFIG_CMD_CACHE
+
+#define CONFIG_SYS_FULL_VA
+
+/* Enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
+
+/* SMP Spin Table Definitions */
+#define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+
+/* Generic Timer Definitions */
+#define COUNTER_FREQUENCY               (1000000000)   /* 1000MHz */
+#define CONFIG_SYS_FSL_ERRATUM_A008585
+
+/* Size of malloc() pool */
+#ifdef CONFIG_RUN_FROM_IRAM_ONLY
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
+#else
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+#endif
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_DM_SERIAL
+#define CONFIG_FSL_LINFLEXUART
+#define LINFLEXUART_BASE               LINFLEXD0_BASE_ADDR
+
+#define CONFIG_DEBUG_UART_LINFLEXUART
+#define CONFIG_DEBUG_UART_BASE         LINFLEXUART_BASE
+
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_UART_PORT           (1)
+#define CONFIG_BAUDRATE                                115200
+
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC_BASE_ADDR
+#define CONFIG_SYS_FSL_ESDHC_NUM       1
+
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+/* #define CONFIG_CMD_EXT2 EXT2 Support */
+#define CONFIG_CMD_FAT         /* FAT support */
+#define CONFIG_DOS_PARTITION
+
+#if 0
+
+/* Ethernet config */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE            ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE     RMII
+#define CONFIG_FEC_MXC_PHYADDR  0
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+#endif
+
+#if 0                          /* Disable until the I2C driver will be updated */
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_BASE            I2C0_BASE_ADDR
+#define CONFIG_SYS_I2C_SPEED           100000
+#endif
+
+#if 0                          /* Disable until the FLASH will be implemented */
+#define CONFIG_SYS_USE_NAND
+#endif
+
+#ifdef CONFIG_SYS_USE_NAND
+/* Nand Flash Configs */
+#define        CONFIG_CMD_NAND
+#define CONFIG_JFFS2_NAND
+#define MTD_NAND_FSL_NFC_SWECC 1
+#define CONFIG_NAND_FSL_NFC
+#define CONFIG_SYS_NAND_BASE           0x400E0000
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define NAND_MAX_CHIPS                 CONFIG_SYS_MAX_NAND_DEVICE
+#define CONFIG_SYS_NAND_SELECT_DEVICE
+#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
+#endif
+
+#define CONFIG_CMD_DHCP
+
+#define CONFIG_LOADADDR                        0xC307FFC0
+#define CONFIG_BOOTARGS                        "console=ttyLF0 root=/dev/ram rw"
+
+#define CONFIG_CMD_ENV
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       "boot_scripts=boot.scr.uimg boot.scr\0" \
+       "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
+       "console=ttyLF0,115200\0" \
+       "fdt_file=s32v234-evb.dtb\0" \
+       "fdt_high=0xffffffff\0" \
+       "initrd_high=0xffffffff\0" \
+       "fdt_addr_r=0xC2000000\0" \
+       "kernel_addr_r=0xC307FFC0\0" \
+       "ramdisk_addr_r=0xC4000000\0" \
+       "ramdisk=rootfs.uimg\0"\
+       "ip_dyn=yes\0" \
+       "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
+       "update_sd_firmware_filename=u-boot.imx\0" \
+       "update_sd_firmware=" \
+               "if test ${ip_dyn} = yes; then " \
+                       "setenv get_cmd dhcp; " \
+               "else " \
+                       "setenv get_cmd tftp; " \
+               "fi; " \
+               "if mmc dev ${mmcdev}; then "   \
+                       "if ${get_cmd} ${update_sd_firmware_filename}; then " \
+                               "setexpr fw_sz ${filesize} / 0x200; " \
+                               "setexpr fw_sz ${fw_sz} + 1; "  \
+                               "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
+                       "fi; "  \
+               "fi\0" \
+       "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
+       "jtagboot=echo Booting using jtag...; " \
+               "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+       "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
+               "run loaduimage; run loadramdisk; run loadfdt;"\
+               "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+       "boot_net_usb_start=true\0" \
+       BOOTENV
+
+#define BOOT_TARGET_DEVICES(func) \
+       func(MMC, mmc, 1) \
+       func(MMC, mmc, 0) \
+       func(DHCP, dhcp, na)
+
+#define CONFIG_BOOTCOMMAND \
+       "run distro_bootcmd"
+
+#include <config_distro_bootcmd.h>
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP    /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
+#define CONFIG_SYS_PROMPT              "=> "
+#undef CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE              \
+                       (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS             16      /* max number of command args */
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
+#define CONFIG_CMDLINE_EDITING
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START       (DDR_BASE_ADDR)
+#define CONFIG_SYS_MEMTEST_END         (DDR_BASE_ADDR + 0x7C00000)
+
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+#define CONFIG_SYS_HZ                          1000
+
+#define CONFIG_SYS_TEXT_BASE           0x3E800000      /* SDRAM */
+
+#ifdef CONFIG_RUN_FROM_IRAM_ONLY
+#define CONFIG_SYS_MALLOC_BASE         (DDR_BASE_ADDR)
+#endif
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE               (128 * 1024)    /* regular stack */
+
+#if 0
+/* Configure PXE */
+#define CONFIG_CMD_PXE
+#define CONFIG_BOOTP_PXE
+#define CONFIG_BOOTP_PXE_CLIENTARCH    0x100
+#endif
+
+/* Physical memory map */
+/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
+#define CONFIG_NR_DRAM_BANKS           1
+#define PHYS_SDRAM                     (DDR_BASE_ADDR)
+#define PHYS_SDRAM_SIZE                        (256 * 1024 * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_SIZE                        (8 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+
+#define CONFIG_ENV_OFFSET              (12 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV         0
+
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+#endif

diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h
index 0c8ecc181bc3fc21d5a1ff697e4f8d301767c2ad..d58b9637f172e330c73a6679c970d9d517fc3c91 100644 (file)
--- a/include/configs/sansa_fuze_plus.h
+++ b/include/configs/sansa_fuze_plus.h
@@ -28,7 +28,6 @@
 #define CONFIG_ENV_OVERWRITE
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 "
 #define CONFIG_LOADADDR                0x42000000

diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 6c0932a8dfd482d1ab42841901b4dcb5455bbb31..567c4d588b43c1bfcaa3a661b484e139dc51f1ad 100644 (file)
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -641,7 +641,6 @@
                                /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                800000
 
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE         115200

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index bbd1a6334400b0cfe9bdb0db075464f51e378be0..46766a6779752bbc40beff4c7ad9b974178fc185 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -579,7 +579,6 @@
 
 #define CONFIG_LOADADDR        1000000 /*default location for tftp and bootm*/
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef CONFIG_BOOTARGS         /* the boot command will set bootargs*/
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index c9970f1f3e2a103f9450c79ba775b8e456310224..248785db381ab7b46702376510c3d91a8fb1f522 100644 (file)
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -527,7 +527,6 @@
 /* default location for tftp and bootm */
 #define CONFIG_LOADADDR                1000000
 
-#define CONFIG_BOOTDELAY 10    /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                /* the boot command will set bootargs */
 
 #define CONFIG_BAUDRATE        115200

diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index 42237d373e96523fb9cb560899007abda0774550..b490b62c2dcc962a8e622cc420d1281839234e9d 100644 (file)
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -52,7 +52,6 @@
 #endif
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200"
 #define CONFIG_BOOTCOMMAND     "bootm"

diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 80997a49bd951c2994d362aeb0e8b485e4837b4a..fb6e05fafc646bdf114540c3171de09ffea66aea 100644 (file)
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -24,7 +24,6 @@
 #define CONFIG_MAC_PARTITION
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index 248435b9d177d239c2502ed9c45463a9f26b97cd..64e9e52e701c18a162533bea24181cf4cb912216 100644 (file)
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -24,7 +24,6 @@
 #define CONFIG_MAC_PARTITION
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 547b500308380f8e6dd69f6301f0f1394b6c7295..f9a9a03ef48e61598d019709ac6709a0080ae016 100644 (file)
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -24,7 +24,6 @@
 #define CONFIG_MAC_PARTITION
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
 
 #define CONFIG_VERSION_VARIABLE

diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index 9f1e6d7fee787f13dc6eb7fb76575a42390cab4e..538ba98ae5de2bf3092b299269f4060650ab964c 100644 (file)
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -20,7 +20,6 @@
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_JFFS2
 
-#define CONFIG_BOOTDELAY        -1
 #define CONFIG_BOOTARGS         "console=ttySC2,115200 root=1f01"
 #define CONFIG_ENV_OVERWRITE    1
 

diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index bd4c6bd13a992f3196ef9667d9fee53fc4885340..794c48c49a24756ecde518dc1d8eccee553e97f7 100644 (file)
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -22,7 +22,6 @@
 #define CONFIG_MAC_PARTITION
 
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "console=ttySC1,115200 root=/dev/nfs ip=dhcp"
 
 #define CONFIG_EXTRA_ENV_SETTINGS                                      \

diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index dfc928d33b8b564aed3ae0803d4190efe719c610..eab665c2866b66702593bd0feed04f85cdbe872a 100644 (file)
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -102,8 +102,10 @@
 #define CONFIG_SYS_PTV                 2       /* Divisor: 2^(PTV+1) => 8 */
 
 /* NS16550 Configuration */
+#ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    (-4)
+#endif
 #define CONFIG_SYS_NS16550_CLK         (48000000)
 #define CONFIG_SYS_NS16550_COM1                0x44e09000
 #define CONFIG_SYS_NS16550_COM4                0x481a6000
@@ -159,6 +161,7 @@
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
@@ -288,6 +291,8 @@
 #define CONFIG_LZO
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
+#define CONFIG_MTD_UBI_FASTMAP
+#define CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT      1
 #endif
 
 /* Commen environment */
@@ -419,7 +424,7 @@
                        "setenv nand_src_addr ${nand_src_addr_B};" \
                "fi;" \
                "setenv nand_root ubi0:${nand_active_ubi_vol} rw " \
-               "ubi.mtd=9,2048;" \
+               "ubi.mtd=9,${ubi_off};" \
                "setenv bootargs ${bootargs} " \
                "root=${nand_root} noinitrd ${mtdparts} " \
                "rootfstype=${nand_root_fs_type} ip=${ip_method} " \
@@ -511,7 +516,7 @@
        COMMON_ENV_DFU_ARGS \
                "dfu_alt_info=" DFU_ALT_INFO_NAND_V2 "\0" \
        COMMON_ENV_NAND_BOOT \
-               "ubi part rootfs 2048;" \
+               "ubi part rootfs ${ubi_off};" \
                "ubifsmount ubi0:${nand_active_ubi_vol};" \
                "ubifsload ${kloadaddr} boot/${kernel_name};" \
                "ubifsload ${loadaddr} boot/${dtb_name}.dtb;" \

diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 40b0cd2132c3e7eddd314841a7668d51ce58662a..fc4153aba84195b88280c78de9874eacc9fbc91f 100644 (file)
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -178,7 +178,6 @@
 #endif
 
 /* General Boot Parameter */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_BOOTCOMMAND             "run flashboot"
 #define CONFIG_SYS_CBSIZE              512
 #define CONFIG_SYS_PBSIZE \

diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index c5c0c2cb9628f7836c334f0081d3622254ac6950..f733c350243aafdcf03bad5d254ecc5358cbfee0 100644 (file)
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -80,7 +80,6 @@
 #define CONFIG_CMDLINE_EDITING
 
 /* autoboot */
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOT_RETRY_TIME -1
 #define CONFIG_RESET_TO_RETRY
 #define CONFIG_ZERO_BOOTDELAY_CHECK

diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 0f1a1ecc294aaab27e751211b0fb91f91eafa0fe..fe41d17149d2fa43f5aab998a906fbd28d925c3e 100644 (file)
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -71,7 +71,6 @@
 #define CONFIG_CMD_ONENAND
 #define CONFIG_CMD_MTDPARTS
 
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 

diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 16aefc25b4627aa9fa686e8de7e445af16ae57d1..7981a8d80ba1596bb9a1800ba2e667d55b3cbf02 100644 (file)
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -117,7 +117,6 @@
 
 /* Boot options */
 #define CONFIG_SYS_LOAD_ADDR           0x23000000
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_ZERO_BOOTDELAY_CHECK
 
 #define CONFIG_BOOTP_BOOTFILESIZE

diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
new file mode 100644 (file)
index 0000000..ddfbcec
--- /dev/null
+++ b/include/configs/snapper9g45.h
@@ -0,0 +1,155 @@
+/*
+ * Bluewater Systems Snapper 9G45 module
+ *
+ * (C) Copyright 2011 Bluewater Systems
+ *   Author: Andre Renaud <andre@bluewatersys.com>
+ *   Author: Ryan Mallon <ryan@bluewatersys.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* SoC type is defined in boards.cfg */
+#include <asm/hardware.h>
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_TEXT_BASE           0x73f00000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
+#define CONFIG_SYS_AT91_SLOW_CLOCK     32768
+
+/* CPU */
+#define CONFIG_CMDLINE_TAG             /* enable passing of ATAGs      */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
+/* SDRAM */
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_SYS_SDRAM_BASE          ATMEL_BASE_CS6
+#define CONFIG_SYS_SDRAM_SIZE          (128 * 1024 * 1024) /* 64MB */
+#define CONFIG_SYS_INIT_SP_ADDR                (ATMEL_BASE_SRAM + 0x1000 - \
+                                        GENERATED_GBL_DATA_SIZE)
+
+/* Mem test settings */
+#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
+
+/* NAND Flash */
+#define CONFIG_NAND_ATMEL
+#define CONFIG_ATMEL_NAND_HWECC
+#define CONFIG_SYS_NAND_ECC_BASE       ATMEL_BASE_ECC
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_SYS_MAX_NAND_DEVICE     1
+#define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
+#define CONFIG_SYS_NAND_MASK_ALE       (1 << 21) /* AD21 */
+#define CONFIG_SYS_NAND_MASK_CLE       (1 << 22) /* AD22 */
+#define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14
+#define CONFIG_SYS_NAND_READY_PIN      AT91_PIN_PC8
+
+/* Ethernet */
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_RETRY_COUNT         20
+#define CONFIG_RESET_PHY_R
+#define CONFIG_AT91_WANTS_COMMON_PHY
+#define CONFIG_TFTP_PORT
+#define CONFIG_TFTP_TSIZE
+
+/* USB */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_ATMEL
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_USB_STORAGE
+#define CONFIG_PARTITION_UUIDS
+
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_GENERIC_ATMEL_MCI
+
+/* LCD */
+#define CONFIG_ATMEL_LCD
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_GURNARD_SPLASH
+
+#define CONFIG_ATMEL_SPI
+
+/* GPIOs and IO expander */
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_AT91_GPIO
+#define CONFIG_AT91_GPIO_PULLUP                1
+
+/* UARTs/Serial console */
+#define CONFIG_ATMEL_USART
+#define CONFIG_BAUDRATE                        115200
+
+/* Boot options */
+#define CONFIG_SYS_LOAD_ADDR           0x23000000
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Environment settings */
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET              (512 << 10)
+#define CONFIG_ENV_SIZE                        (256 << 10)
+#define CONFIG_ENV_OVERWRITE
+
+#define        CONFIG_EXTRA_ENV_SETTINGS       \
+       "ethaddr=00:00:00:00:00:00\0" \
+       "serial=0\0" \
+       "stdout=serial_atmel\0" \
+       "stderr=serial_atmel\0" \
+       "stdin=serial_atmel\0" \
+       "bootlimit=3\0" \
+       "loadaddr=0x71000000\0" \
+       "board_rev=2\0" \
+       "bootfile=/tftpboot/uImage\0" \
+       "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \
+       "nfsroot=/export/root\0" \
+       "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \
+       "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \
+       "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \
+       "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \
+       "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \
+       "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \
+       "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0"
+
+/* Console settings */
+#define CONFIG_SYS_CBSIZE              256
+#define CONFIG_SYS_MAXARGS             16
+#define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE +            \
+                                        sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+
+/* U-Boot memory settings */
+#define CONFIG_SYS_MALLOC_LEN          (1 << 20)
+
+/* Command line configuration */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PART
+
+#endif /* __CONFIG_H */

diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h
index ca7f8a28b279550372a2ecda5c63b7a6c3efc6e6..3b0b41612da2924b148c8e2576296ad8cc0fa67c 100644 (file)
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on SoCDK */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "zImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET

diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h
index a2da7d47c52cbd03226e6d222d570351b9b24303..7ced6a68a6c28509c3c69bbd4d048f87c9a90c28 100644 (file)
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on SoCDK */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "zImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET

diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h
index fdddfa3cd24f43bef3232c4346ed22fa2dbd9789..6b9546e8f751d64afd42afb1bf1b6a08876dd2a8 100644 (file)
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_BOOTCOMMAND     "run mmcload; run mmcboot"

diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h
index f0fb43a82f3a5bf8ef62eb8fecdae4cb5b958f36..d1b31c4cfa3550760f4400bf241de2cd3ac30d1c 100644 (file)
--- a/include/configs/socfpga_mcvevk.h
+++ b/include/configs/socfpga_mcvevk.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on MCV */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_PREBOOT         "run try_bootscript"

diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h
index 675f5d16e93eb86f9e8ff37cfd3616b3fb8b5cd2..3fceb31df98fba878111a48e54b4b861afaaf4b6 100644 (file)
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on SoCDK */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "fitImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_BOOTCOMMAND     "run mmcload; run mmcboot"

diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h
index 79c16ce91d09e51be8e8593e68770a2f032d9b81..c9473df91232d2734e74e4f16e21d5c97c90c1b7 100644 (file)
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -18,7 +18,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on SoCrates */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "zImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_BOOTCOMMAND     "run mmcload; run mmcboot"

diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index c097f47edd4a8ab76db38f7d9616d89a278d7e34..286e746a1496a2903390734d73feef9347811c1f 100644 (file)
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -20,7 +20,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on SR1500 */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_BOOTCOMMAND     "run mmcload; run mmcboot"

diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 1ccde1a76fee11630b9397661937fdd92e64e814..1c7d45e4a8fac187f88db329ed7cc1745a1a4eac 100644 (file)
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -21,7 +21,6 @@
 #define PHYS_SDRAM_1_SIZE              0x40000000      /* 1GiB on VINING_FPGA */
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       5
 #define CONFIG_BOOTFILE                "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
 #define CONFIG_BOOTARGS                "console=ttyS0," __stringify(CONFIG_BAUDRATE)
 #define CONFIG_BOOTCOMMAND     "run selboot"

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 4ed524b02367ddde84d9188fab76b09480543480..624cef712df9f5626e9e087e74121cfb9e5d224b 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -346,7 +346,6 @@
 
 #define CONFIG_LOADADDR         200000         /* default addr for tftp & bootm*/
 
-#define CONFIG_BOOTDELAY 1             /* -1 disables auto-boot        */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Welcome on the ABB Socrates Board;" \

diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 7b2d262b4bb71f83ea52a6dabfc78ef8ffdaccba..43ba84ab588ba30a1ef0a0da8bf787c685b72409 100644 (file)
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -104,12 +104,6 @@
 /*
  * Default Environment Varible definitions
  */
-#if defined(CONFIG_SPEAR_USBTTY)
-#define CONFIG_BOOTDELAY                       -1
-#else
-#define CONFIG_BOOTDELAY                       1
-#endif
-
 #define CONFIG_ENV_OVERWRITE
 
 /*

diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index d53f8c18a2220443e7eabc1f753498d0cd1e32fa..f05c1aacaf99ea892896f5cc7c87f1931eb42d82 100644 (file)
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -82,9 +82,6 @@
        "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
        "bootm 0x08044000 - 0x08042000\0"
 
-#define CONFIG_BOOTDELAY               3
-#define CONFIG_AUTOBOOT
-
 /*
  * Command line configuration.
  */

diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 9d1f02ea15d77e78ef03c7dc60f37b5b1798d0b6..e544a218dd75b23e551bcddfaebbf2317fdc36d6 100644 (file)
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -69,7 +69,6 @@
        "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
        "bootm 0x08044000 - 0x08042000\0"
 
-#define CONFIG_BOOTDELAY               3
 
 /*
  * Command line configuration.

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 90492f4fdb6c1b903f4b11d39abe1270de690e43..36561e0346e83985bc022fcffa8f9d5163fa9a89 100644 (file)
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -659,7 +659,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 
 #define CONFIG_LOADADDR        800000  /* default location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       5       /* -1 disables auto-boot */
 
 #define CONFIG_HOSTNAME                hrcon
 #define CONFIG_ROOTPATH                "/opt/nfsroot"

diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index d3704a4e2cc30e946aa2b677c84329ee1a03dbdc..bfd1bd719285a2c7442967bac302e719274bb2d4 100644 (file)
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -66,7 +66,6 @@
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CMDLINE_EDITING
 
-#define CONFIG_BOOTDELAY                       3
 #define CONFIG_BOOTCOMMAND                     "go 0x40040000"
 
 /*

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index b33cfb86f82e0831f5d19b1e473205f65efb5a96..94275a7183ffc35547893dedcc933bb6b8d61c7a 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -100,7 +100,7 @@
  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x10000
-#define CONFIG_SYS_INIT_RAM_SIZE       0x08000 /* FIXME: 40 KiB ? */
+#define CONFIG_SYS_INIT_RAM_SIZE       0xA000  /* 40 KiB */
 #else
 #define CONFIG_SYS_INIT_RAM_ADDR       0x0
 #define CONFIG_SYS_INIT_RAM_SIZE       0x8000  /* 32 KiB */
@@ -213,8 +213,7 @@
 #define CONFIG_SPL_PAD_TO              32768           /* decimal for 'dd' */
 
 #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-/* FIXME: 40 KiB instead of 32 KiB ? */
-#define LOW_LEVEL_SRAM_STACK           0x00018000
+#define LOW_LEVEL_SRAM_STACK           0x0001A000
 #define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 #else
 /* end of 32 KiB in sram */

diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index efdc70622f3d8bc6207a2df9fa1310b54e85d97b..73ff416aed2a2837ac83ea502cf85ed0e9f32b93 100644 (file)
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -207,6 +207,8 @@
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBDISK_SUPPORT
 #define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_GPIO_SUPPORT
@@ -219,12 +221,26 @@
 
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
 #define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
+#define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 
 #define CONFIG_SYS_SPL_MALLOC_START    0x8f000000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x80000
 #define CONFIG_SPL_BSS_START_ADDR      0x8f080000 /* end of RAM */
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR        0x300 /* address 0x60000 */
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
+#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME                "u-boot.img"
+
+/* FAT */
+#define CONFIG_SPL_FS_LOAD_KERNEL_NAME         "uImage"
+#define CONFIG_SPL_FS_LOAD_ARGS_NAME           "args"
+
+/* RAW SD card / eMMC */
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x900   /* address 0x120000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x80    /* address 0x10000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80    /* 64KiB */
+
 /* NAND boot config */
 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 #define CONFIG_SYS_NAND_PAGE_COUNT     64

diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 4d66dd2407b4f1724057823221092762f289f4b0..6616d7396e74dcc26df9b4c7199a6ddf7471729d 100644 (file)
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -128,7 +128,6 @@
                                                        /* devices */
 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 /* Environment information */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x82000000\0" \

diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 321fb4756d1dc649b6d98474fbb3a763db135ccc..0b05289d07e6ffbbc218a402c8813475f87f38a4 100644 (file)
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -60,7 +60,6 @@
 #define CONFIG_USART_ID                        ATMEL_ID_SYS
 #define CONFIG_BAUDRATE                        115200
 
-#define CONFIG_BOOTDELAY       3
 
 /*
  * Command line configuration.

diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index 870406b208efe041af4a00cd2181f1bbcc855930..39bb5b35dad8bfd7ff51b6b58bca52fb8c19eaa1 100644 (file)
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -79,7 +79,6 @@
 /*
  * Environment configuration
  */
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTARGS                        "console=ttyS0,115200n8"
 #define CONFIG_LOADADDR                        CONFIG_SYS_LOAD_ADDR

diff --git a/include/configs/thuban.h b/include/configs/thuban.h
index 5fed55da1c8412eb296535c80287781515100286..25ac2cba4b56b58a201d5989345e78e8b9069c66 100644 (file)
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -69,6 +69,7 @@
 /* Default env settings */
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "hostname=thuban\0" \
+       "ubi_off=2048\0"\
        "nand_img_size=0x400000\0" \
        "optargs=\0" \
        "preboot=draco_led 0\0" \
@@ -78,7 +79,6 @@
 
 #ifndef CONFIG_RESTORE_FLASH
 /* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTCOMMAND \
 "if dfubutton; then " \
@@ -90,7 +90,6 @@
 "reset;"
 
 #else
-#define CONFIG_BOOTDELAY               0
 
 #define CONFIG_BOOTCOMMAND                     \
        "setenv autoload no; "                  \

diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index e43a7fdf3cfd3fad1600d08c23850bbd95323205..5c3b3da73c00b7d176e5220bba39f69bf94d78c9 100644 (file)
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -84,7 +84,6 @@
                                        "earlycon=pl011,0x87e024000000 " \
                                        "debug maxcpus=48 rootwait rw "\
                                        "root=/dev/sda2 coherent_pool=16M"
-#define CONFIG_BOOTDELAY               5
 
 /* Do not preserve environment */
 #define CONFIG_ENV_IS_NOWHERE          1

diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 09f8e8fe5ccfcd0da460553f2336fb972956c357..3c058832e17658fff660cebfd2305093e74ac8b6 100644 (file)
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -39,7 +39,6 @@
 /* commands to include */
 #define CONFIG_VERSION_VARIABLE
 
-#define CONFIG_BOOTDELAY               1       /* negative for no autoboot */
 #define CONFIG_ENV_VARS_UBOOT_CONFIG
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 2e84dd27e4f7c7fbf50689d52c8c85ed64a98af5..05fd00fd5d270d7a3d904e29262d44262eda2e72 100644 (file)
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -34,7 +34,6 @@
 #define CONFIG_VERSION_VARIABLE
 #define CONFIG_DISPLAY_CPUINFO
 
-#define CONFIG_BOOTDELAY               3 /* set negative for no autoboot */
 #define CONFIG_EXTRA_ENV_SETTINGS      \
        "loadaddr=0x81000000\0"         \
 

diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 707106ffab8d3c8afb33793b1fb0964b2353381e..2ee26c40367077d67d88d717ea6b232358c48f9a 100644 (file)
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -245,7 +245,6 @@
        "tftp_root=/\0"                                                 \
        "nfs_root=/export\0"                                            \
        "mem_lpae=1\0"                                                  \
-       "mem_reserve=512M\0"                                            \
        "addr_ubi=0x82000000\0"                                         \
        "addr_secdb_key=0xc000000\0"                                    \
        "name_kern=zImage\0"                                            \

diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h
index 5c5a12d493c3597590b84eef2e44fef4dc28effa..2e4c8e9646787eff88539a8f4873b524b6568caa 100644 (file)
--- a/include/configs/ti_omap5_common.h
+++ b/include/configs/ti_omap5_common.h
@@ -104,6 +104,8 @@
                        "setenv fdtfile dra72-evm.dtb; fi;" \
                "if test $board_name = beagle_x15; then " \
                        "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
+               "if test $board_name = am572x_idk; then " \
+                       "setenv fdtfile am572x-idk.dtb; fi;" \
                "if test $board_name = am57xx_evm; then " \
                        "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
                "if test $fdtfile = undefined; then " \

diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index abe1da2bd6832e0fd8d421f05d636f1e21feaf91..74a9a098a0b128cf45178c049f801aeffe4e7788 100644 (file)
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -39,7 +39,6 @@
 #define CONFIG_SYS_BAUDRATE_TABLE \
        {9600, 19200, 38400, 57600, 115200}
 
-#define CONFIG_BOOTDELAY               3
 #define CONFIG_BOOTARGS                        \
        "console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs"
 #define CONFIG_BOOTCOMMAND             \

diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 855d789c18eaabb3e2a2cdc97662aa5f79fedb46..aed3931515e3f7c5639c1b2ca42dce1ea0560d3f 100644 (file)
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -162,7 +162,6 @@
 
 /* Environment information (this is the common part) */
 
-#define CONFIG_BOOTDELAY               0
 
 /* hang() the board on panic() */
 #define CONFIG_PANIC_HANG

diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index aa0605f28d7760b4794160fd9d0abc91afc14eed..252b3fc70656daa5dcc634e3425439923e9f74b4 100644 (file)
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -62,6 +62,8 @@
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      MMC_SDHC1_BASE_ADDR
 
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
+
 #define CONFIG_MMC
 
 #define CONFIG_GENERIC_MMC
@@ -90,25 +92,33 @@
 
 /* Environment variables */
 
-#define CONFIG_BOOTDELAY       1
 
 #define CONFIG_LOADADDR                0x91000000      /* loadaddr env var */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "script=boot.scr\0" \
-       "image=uImage\0" \
+       "image=zImage\0" \
+       "fdt_file=imx51-ts4800.dtb\0" \
+       "fdt_addr=0x90fe0000\0" \
        "mmcdev=0\0" \
-       "mmcpart=1\0" \
-       "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \
+       "mmcpart=2\0" \
+       "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+       "mmcargs=setenv bootargs root=${mmcroot}\0" \
        "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
        "loadbootscript=" \
                "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
        "bootscript=echo Running bootscript from mmc ...; " \
                "source\0" \
        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
+       "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
        "mmcboot=echo Booting from mmc ...; " \
                "run mmcargs addtty; " \
-                "bootm; "
+               "if run loadfdt; then " \
+                       "bootz ${loadaddr} - ${fdt_addr}; " \
+               "else " \
+                       "echo ERR: cannot load FDT; " \
+               "fi; "
+
 
 #define CONFIG_BOOTCOMMAND \
        "mmc dev ${mmcdev}; if mmc rescan; then " \

diff --git a/include/configs/tseries.h b/include/configs/tseries.h
index b6a1ae0554a5f820063fbcdfec1494733836e3ff..8ed9eb080d6624772d01f2975c9138a1d92e384c 100644 (file)
--- a/include/configs/tseries.h
+++ b/include/configs/tseries.h
@@ -195,7 +195,6 @@ MMCARGS
 
 #define CONFIG_BOOTCOMMAND \
        "run defboot;"
-#define CONFIG_BOOTDELAY               0
 
 #ifdef CONFIG_NAND
 /*

diff --git a/include/configs/twister.h b/include/configs/twister.h
index 4f5560fec3ba603d53153815fa7e134db3ea92da..66f4680b7e129740c3946d1e147ac4d5ddeba3ad 100644 (file)
--- a/include/configs/twister.h
+++ b/include/configs/twister.h
@@ -20,7 +20,6 @@
 #define CONFIG_TAM3517_SW3_SETTINGS
 #define CONFIG_XR16L2751
 
-#define CONFIG_BOOTDELAY       10
 
 #define CONFIG_BOOTFILE                "uImage"
 

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 10fd8c21ea53b3d910437d96eb4d833efbe0c04d..9d14c2d59c965a7c7556a4f8f2de1fc914a59b43 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -148,7 +148,6 @@
 #define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + 0x01000000)
 
-#define CONFIG_BOOTDELAY                       3
 #define CONFIG_ZERO_BOOTDELAY_CHECK    /* check for keypress on bootdelay==0 */
 
 /*
@@ -245,7 +244,6 @@
                "tftpboot $tmp_addr u-boot.bin\0"               \
        "emmcupdate=mmcsetn &&"                                 \
                "mmc partconf $mmc_first_dev 0 1 1 &&"          \
-               "mmc erase 0 800 &&"                            \
                "tftpboot u-boot-spl.bin &&"                    \
                "mmc write $loadaddr 0 80 &&"                   \
                "tftpboot u-boot.bin &&"                        \
@@ -288,7 +286,9 @@
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NOR_SUPPORT
-#ifndef CONFIG_ARM64
+#ifdef CONFIG_ARM64
+#define CONFIG_SPL_BOARD_LOAD_IMAGE
+#else
 #define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
 #endif

diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index d118928ebddd2358b1021fcae117a7694d2f31f1..ad541921942ad6ae4d038baec11c954deba2ef27 100644 (file)
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -46,7 +46,6 @@
 #define CONFIG_USART_ID                        ATMEL_ID_SYS
 #define CONFIG_BAUDRATE                        115200
 
-#define CONFIG_BOOTDELAY 3
 
 /*
  * BOOTP options

diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index 9a113f4e32d510d7ab1b2451297fb968694a643d..28c748d074c7e4b930a665f8fbcf020214edec22 100644 (file)
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -102,7 +102,6 @@
 /*
  * Autobooting
  */
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds */
 
 #define CONFIG_PREBOOT "echo;" \
        "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \

diff --git a/include/configs/vct.h b/include/configs/vct.h
index cc5e3546b08cc330abc1d5c2e75dd3a8cebf466a..2bc98a8e8a356838301acec278c2ae602491ba3d 100644 (file)
--- a/include/configs/vct.h
+++ b/include/configs/vct.h
@@ -240,7 +240,6 @@ int vct_gpio_get(int pin);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10   /* and takes up to 10 msec */
 
 #define CONFIG_BOOTCOMMAND     "run test3"
-#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 /*
  * UBI configuration

diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 2425ebf66933aeb10aa3a7e3f15086a72260a4ab..83d0004f537e1108d3bded62d6a60dd6ac9bc7a5 100644 (file)
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -465,7 +465,6 @@
 #define CONFIG_HOSTNAME                ve8313
 #define CONFIG_UBOOTPATH       ve8313/u-boot.bin
 
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 6a3758216fd39937ec03829eca4ce43a65b46faf..46cf83be02e0418b4c156dd6d5ef92a1463e7a85 100644 (file)
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -216,7 +216,6 @@
                                "fi ; " \
                                "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
 
-#define CONFIG_BOOTDELAY               1
 
 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
 #define CONFIG_EXTRA_ENV_SETTINGS      \
@@ -241,7 +240,6 @@
                                "fdt chosen ${initrd_addr} ${initrd_end}; " \
                                "booti $kernel_addr - $fdt_addr"
 
-#define CONFIG_BOOTDELAY               1
 
 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
 #define CONFIG_EXTRA_ENV_SETTINGS      \
@@ -260,7 +258,6 @@
 
 #define CONFIG_BOOTCOMMAND     "booti $kernel_addr $initrd_addr $fdt_addr"
 
-#define CONFIG_BOOTDELAY               1
 
 #endif
 

diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 6dc8f25b9095a029838b62fc2921e6608d4376e8..51898e623cbf19e7605132fb0e0719ed2338f8cd 100644 (file)
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -168,7 +168,6 @@
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR           (V2M_BASE + 0x8000)
 #define LINUX_BOOT_PARAM_ADDR          (V2M_BASE + 0x2000)
-#define CONFIG_BOOTDELAY               2
 
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS           2

diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index b240613bb55b2f205379d85709a50679fe443478..c4a1fd091ab671332fc97a9e0587f64a960b075b 100644 (file)
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -103,7 +103,6 @@
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_SPD_BUS_NUM         0
 
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 

diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 732d09158324345293b54abc1346c518f403957a..60513df03279731ce4422999b36b53169e8549a0 100644 (file)
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -542,7 +542,6 @@
 
 #define CONFIG_LOADADDR                800000  /* def location for tftp and bootm */
 
-#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS                        /* boot command will set bootargs */
 
 #define CONFIG_BAUDRATE         9600

diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 4dfcd28eaf650affa90d2d2676250d33005c36cd..fc0e51a9ae8614b98fa9d2bc69f1a26aa301504c 100644 (file)
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -9,7 +9,6 @@
 #ifndef __WARP7_CONFIG_H
 #define __WARP7_CONFIG_H
 
-#define CONFIG_BOOTDELAY                1
 #include "mx7_common.h"
 
 #define PHYS_SDRAM_SIZE                        SZ_512M
@@ -17,9 +16,10 @@
 #define CONFIG_MXC_UART_BASE           UART1_IPS_BASE_ADDR
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (32 * SZ_1M)
+#define CONFIG_SYS_MALLOC_LEN          (35 * SZ_1M)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 
 /* MMC Config*/
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
@@ -28,10 +28,7 @@
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
 
 #define CONFIG_DFU_ENV_SETTINGS \
-       "dfu_alt_info=image raw 0 0x800000;"\
-               "u-boot raw 0 0x4000;"\
-               "bootimg part 0 1;"\
-               "rootfs part 0 2\0" \
+       "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        CONFIG_DFU_ENV_SETTINGS \

diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index a4ae304ade4586e46edd9f73cc7f9b3645ce9ecd..153466a623ffef1817be49168209899680ca9522 100644 (file)
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -97,7 +97,6 @@
 
 #define CONFIG_NET_RETRY_COUNT 100
 
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_LOADADDR                0x80800000      /* loadaddr env var */
 

diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index b81b6ff1faf487249a0729e48d37431188653567..ba222f936f8e572b66174c6ea190f74d07118ed6 100644 (file)
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -175,7 +175,6 @@
 #define CONFIG_INITRD_TAG
 
 #define CONFIG_ZERO_BOOTDELAY_CHECK
-#define CONFIG_BOOTDELAY               3
 
 #define CONFIG_BOOTFILE                        "uImage"
 #define CONFIG_BOOTARGS                        "console=ttyS2,115200n8"

diff --git a/include/configs/x600.h b/include/configs/x600.h
index 07c8abe2a79bd197ad92165f2bdfc45ba1340cee..71c0b458423d3fed2672d0865c8b508d57b2d227 100644 (file)
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -124,7 +124,6 @@
 #define CONFIG_SUPPORT_VFAT
 #define CONFIG_DOS_PARTITION
 
-#define CONFIG_BOOTDELAY                       3
 
 /*
  * U-Boot Environment placing definitions.

diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index b4aad6cd24ff5b3bf70c6352c1a3c91eaf2e64a9..fdefeaf24cf5e5c1db6666157ae53e679c1b8757 100644 (file)
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -225,6 +225,5 @@
        "tftpboot $loadaddr $bootfile;"                 \
        "zboot $loadaddr"
 
-#define CONFIG_BOOTDELAY       2
 
 #endif /* __CONFIG_H */

diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h
index 4d68c21ae058778e80a5f0cadfc208621cb51d4e..69558fdfd20b8962b0477ec8fed7862d3be3fb65 100644 (file)
--- a/include/configs/xfi3.h
+++ b/include/configs/xfi3.h
@@ -28,7 +28,6 @@
 #define CONFIG_ENV_OVERWRITE
 
 /* Booting Linux */
-#define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_BOOTARGS                "console=ttyAMA0,115200n8 "
 #define CONFIG_LOADADDR                0x42000000

diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h
index 067cfa69f2f6db788f1e66fd1644529ca40fac01..e97e9d08163674445c7dd7326d07548e3b5afc6e 100644 (file)
--- a/include/configs/xilinx-ppc.h
+++ b/include/configs/xilinx-ppc.h
@@ -33,7 +33,6 @@
 #undef CONFIG_CMD_EEPROM
 
 /*Misc*/
-#define CONFIG_BOOTDELAY               5/* autoboot after 5 seconds     */
 #define CONFIG_SYS_LONGHELP            /* undef to save memory         */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE              1024/* Console I/O Buffer Size      */

diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index b848150182eb7505334b7627544a58693ca3817f..e776e324120e48610160829103c26e5da742e4e1 100644 (file)
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -144,7 +144,6 @@
 # define DFU_ALT_INFO
 #endif
 
-#define CONFIG_BOOTDELAY       3
 
 #define CONFIG_BOARD_LATE_INIT
 

diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h
index 9838fbfa2e03566ce7757d3a41605c0caaa82da3..73c8d5b6fd4d230fcaf160166546d1cd9d9d5add 100644 (file)
--- a/include/configs/xpedite1000.h
+++ b/include/configs/xpedite1000.h
@@ -196,7 +196,6 @@ extern void out32(unsigned int, unsigned long);
 #define CONFIG_SYS_MAXARGS     16              /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 #define CONFIG_CMDLINE_EDITING 1               /* Command-line editing */
-#define CONFIG_BOOTDELAY       3               /* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG                      /* do not reset board on panic */
 #define CONFIG_PREBOOT                         /* enable preboot variable */
 #define CONFIG_INTEGRITY                       /* support booting INTEGRITY OS */

diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 86c9b4c41f62396d6d92e6bdfb7727da9dd5dbae..9f3158d056bb36be5c3cf9c24336d1ca01a76068 100644 (file)
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -536,7 +536,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 #define CONFIG_CMDLINE_EDITING 1               /* Command-line editing */
 #define CONFIG_LOADADDR                0x1000000       /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       3               /* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG                      /* do not reset board on panic */
 #define CONFIG_PREBOOT                         /* enable preboot variable */
 #define CONFIG_INTEGRITY                       /* support booting INTEGRITY OS */

diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index d1847ac2e8c4d4d554834cb2968a77f754222d19..a418fc5c9e267071e7622f0aa5a0f23f5e693504 100644 (file)
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -319,7 +319,6 @@
 #define CONFIG_CMDLINE_EDITING 1               /* add command line history     */
 #define CONFIG_AUTO_COMPLETE   1               /* add autocompletion support */
 #define CONFIG_LOADADDR                0x1000000       /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       3               /* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG                      /* do not reset board on panic */
 #define CONFIG_PREBOOT                         /* enable preboot variable */
 #define CONFIG_INTEGRITY                       /* support booting INTEGRITY OS */

diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 6a06b0ab1c984f1f0a845771fde034c8154d053f..36df6682b280492f2708dad07fa8636c197870e3 100644 (file)
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -391,7 +391,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING 1               /* add command line history     */
 #define CONFIG_AUTO_COMPLETE   1               /* add autocompletion support */
 #define CONFIG_LOADADDR                0x1000000       /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       3               /* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG                      /* do not reset board on panic */
 #define CONFIG_PREBOOT                         /* enable preboot variable */
 #define CONFIG_INTEGRITY                       /* support booting INTEGRITY OS */

diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 5b377e35eed0096180dfcd754eab42a88e8c87ea..1794ba10a37bf4f3b59cbf0adf94ac822ddb141c 100644 (file)
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -375,7 +375,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING 1               /* add command line history     */
 #define CONFIG_AUTO_COMPLETE   1               /* add autocompletion support */
 #define CONFIG_LOADADDR                0x1000000       /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       3               /* -1 disables auto-boot */
 #define CONFIG_PANIC_HANG                      /* do not reset board on panic */
 #define CONFIG_PREBOOT                         /* enable preboot variable */
 #define CONFIG_INTEGRITY                       /* support booting INTEGRITY OS */

diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index fcd777264296df824aacf9d763d90482137181e2..6e83cc9180ded763157d032946149ddbd7286689 100644 (file)
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -40,7 +40,6 @@
 #define        CONFIG_BOOTARGS                                                 \
        "console=tty0 console=ttyS2,115200 fbcon=rotate:3"
 #define        CONFIG_TIMESTAMP
-#define        CONFIG_BOOTDELAY                2       /* Autoboot delay */
 #define        CONFIG_CMDLINE_TAG
 #define        CONFIG_SETUP_MEMORY_TAGS
 #define        CONFIG_SYS_TEXT_BASE            0x0

diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index 264bb63c06997ccfa072039a8e9e72497aeaaafe..ea1ead23b72f5edf53f80bf3ba51040448d190b4 100644 (file)
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -137,7 +137,6 @@
 
 #define CONFIG_PREBOOT  ""
 
-#define CONFIG_BOOTDELAY       5
 
 /*
  * Size of malloc() pool

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 82ece0df2d6a2684520391390702a179b2ee7121..8dbac8728f050dda7e9329e5a0ca753705c80e19 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -236,7 +236,6 @@
 #endif
 
 #define CONFIG_BOOTCOMMAND             "run $modeboot"
-#define CONFIG_BOOTDELAY               3 /* -1 to Disable autoboot */
 #define CONFIG_SYS_LOAD_ADDR           0 /* default? */
 
 /* Miscellaneous configurable options */

diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
new file mode 100644 (file)
index 0000000..ab3ee24
--- /dev/null
+++ b/include/dt-bindings/clock/at91.h
@@ -0,0 +1,23 @@
+/*
+ * This header provides constants for AT91 pmc status.
+ *
+ * The constants defined in this header are being used in dts.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AT91_H
+#define _DT_BINDINGS_CLK_AT91_H
+
+#define AT91_PMC_MOSCS         0               /* MOSCS Flag */
+#define AT91_PMC_LOCKA         1               /* PLLA Lock */
+#define AT91_PMC_LOCKB         2               /* PLLB Lock */
+#define AT91_PMC_MCKRDY                3               /* Master Clock */
+#define AT91_PMC_LOCKU         6               /* UPLL Lock */
+#define AT91_PMC_PCKRDY(id)    (8 + (id))      /* Programmable Clock */
+#define AT91_PMC_MOSCSELS      16              /* Main Oscillator Selection */
+#define AT91_PMC_MOSCRCS       17              /* Main On-Chip RC */
+#define AT91_PMC_CFDEV         18              /* Clock Failure Detector Event */
+#define AT91_PMC_GCKRDY                24              /* Generated Clocks */
+
+#endif

diff --git a/include/dt-bindings/dma/at91.h b/include/dt-bindings/dma/at91.h
new file mode 100644 (file)
index 0000000..ab6cbba
--- /dev/null
+++ b/include/dt-bindings/dma/at91.h
@@ -0,0 +1,52 @@
+/*
+ * This header provides macros for at91 dma bindings.
+ *
+ * Copyright (C) 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_DMA_H__
+#define __DT_BINDINGS_AT91_DMA_H__
+
+/* ---------- HDMAC ---------- */
+
+/*
+ * Source and/or destination peripheral ID
+ */
+#define AT91_DMA_CFG_PER_ID_MASK       (0xff)
+#define AT91_DMA_CFG_PER_ID(id)                (id & AT91_DMA_CFG_PER_ID_MASK)
+
+/*
+ * FIFO configuration: it defines when a request is serviced.
+ */
+#define AT91_DMA_CFG_FIFOCFG_OFFSET    (8)
+#define AT91_DMA_CFG_FIFOCFG_MASK      (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
+#define AT91_DMA_CFG_FIFOCFG_HALF      (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET)    /* half FIFO (default behavior) */
+#define AT91_DMA_CFG_FIFOCFG_ALAP      (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET)    /* largest defined AHB burst */
+#define AT91_DMA_CFG_FIFOCFG_ASAP      (0x2 << AT91_DMA_CFG_FIFOCFG_OFFSET)    /* single AHB access */
+
+
+/* ---------- XDMAC ---------- */
+#define AT91_XDMAC_DT_MEM_IF_MASK      (0x1)
+#define AT91_XDMAC_DT_MEM_IF_OFFSET    (13)
+#define AT91_XDMAC_DT_MEM_IF(mem_if)   (((mem_if) & AT91_XDMAC_DT_MEM_IF_MASK) \
+                                       << AT91_XDMAC_DT_MEM_IF_OFFSET)
+#define AT91_XDMAC_DT_GET_MEM_IF(cfg)  (((cfg) >> AT91_XDMAC_DT_MEM_IF_OFFSET) \
+                                       & AT91_XDMAC_DT_MEM_IF_MASK)
+
+#define AT91_XDMAC_DT_PER_IF_MASK      (0x1)
+#define AT91_XDMAC_DT_PER_IF_OFFSET    (14)
+#define AT91_XDMAC_DT_PER_IF(per_if)   (((per_if) & AT91_XDMAC_DT_PER_IF_MASK) \
+                                       << AT91_XDMAC_DT_PER_IF_OFFSET)
+#define AT91_XDMAC_DT_GET_PER_IF(cfg)  (((cfg) >> AT91_XDMAC_DT_PER_IF_OFFSET) \
+                                       & AT91_XDMAC_DT_PER_IF_MASK)
+
+#define AT91_XDMAC_DT_PERID_MASK       (0x7f)
+#define AT91_XDMAC_DT_PERID_OFFSET     (24)
+#define AT91_XDMAC_DT_PERID(perid)     (((perid) & AT91_XDMAC_DT_PERID_MASK) \
+                                       << AT91_XDMAC_DT_PERID_OFFSET)
+#define AT91_XDMAC_DT_GET_PERID(cfg)   (((cfg) >> AT91_XDMAC_DT_PERID_OFFSET) \
+                                       & AT91_XDMAC_DT_PERID_MASK)
+
+#endif /* __DT_BINDINGS_AT91_DMA_H__ */

diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
new file mode 100644 (file)
index 0000000..bbca3d0
--- /dev/null
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -0,0 +1,40 @@
+/*
+ * This header provides constants for most at91 pinctrl bindings.
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
+#define __DT_BINDINGS_AT91_PINCTRL_H__
+
+#define AT91_PINCTRL_NONE              (0 << 0)
+#define AT91_PINCTRL_PULL_UP           (1 << 0)
+#define AT91_PINCTRL_MULTI_DRIVE       (1 << 1)
+#define AT91_PINCTRL_DEGLITCH          (1 << 2)
+#define AT91_PINCTRL_PULL_DOWN         (1 << 3)
+#define AT91_PINCTRL_DIS_SCHMIT                (1 << 4)
+#define AT91_PINCTRL_DEBOUNCE          (1 << 16)
+#define AT91_PINCTRL_DEBOUNCE_VAL(x)   (x << 17)
+
+#define AT91_PINCTRL_PULL_UP_DEGLITCH  (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
+
+#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT            (0x0 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_LOW                        (0x1 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_MED                        (0x2 << 5)
+#define AT91_PINCTRL_DRIVE_STRENGTH_HI                 (0x3 << 5)
+
+#define AT91_PIOA      0
+#define AT91_PIOB      1
+#define AT91_PIOC      2
+#define AT91_PIOD      3
+#define AT91_PIOE      4
+
+#define AT91_PERIPH_GPIO       0
+#define AT91_PERIPH_A          1
+#define AT91_PERIPH_B          2
+#define AT91_PERIPH_C          3
+#define AT91_PERIPH_D          4
+
+#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */

diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index 187e384305e78625568bd08c9314be70e0206302..fc72fb9384579fc19b6001320c735c6f4f002087 100644 (file)
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -86,188 +86,14 @@ struct ccsr_usb_phy {
 #endif
 
 /* USB Erratum Checking code */
-#ifdef CONFIG_PPC
-static inline bool has_dual_phy(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_T1023:
-       case SVR_T1024:
-       case SVR_T1013:
-       case SVR_T1014:
-               return IS_SVR_REV(svr, 1, 0);
-       case SVR_T1040:
-       case SVR_T1042:
-       case SVR_T1020:
-       case SVR_T1022:
-       case SVR_T2080:
-       case SVR_T2081:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
-       case SVR_T4240:
-       case SVR_T4160:
-       case SVR_T4080:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       }
-
-       return false;
-}
-
-static inline bool has_erratum_a006261(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_P1010:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_P2041:
-       case SVR_P2040:
-               return IS_SVR_REV(svr, 1, 0) ||
-                       IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
-       case SVR_P3041:
-               return IS_SVR_REV(svr, 1, 0) ||
-                       IS_SVR_REV(svr, 1, 1) ||
-                       IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
-       case SVR_P5010:
-       case SVR_P5020:
-       case SVR_P5021:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_T4240:
-       case SVR_T4160:
-       case SVR_T4080:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_T1040:
-               return IS_SVR_REV(svr, 1, 0);
-       case SVR_T2080:
-       case SVR_T2081:
-               return IS_SVR_REV(svr, 1, 0);
-       case SVR_P5040:
-               return IS_SVR_REV(svr, 1, 0);
-       }
-
-       return false;
-}
-
-static inline bool has_erratum_a007075(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_B4860:
-       case SVR_B4420:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_P1010:
-               return IS_SVR_REV(svr, 1, 0);
-       case SVR_P4080:
-               return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
-       }
-       return false;
-}
-
-static inline bool has_erratum_a007798(void)
-{
-       return SVR_SOC_VER(get_svr()) == SVR_T4240 &&
-               IS_SVR_REV(get_svr(), 2, 0);
-}
-
-static inline bool has_erratum_a007792(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_T4240:
-       case SVR_T4160:
-       case SVR_T4080:
-               return IS_SVR_REV(svr, 2, 0);
-       case SVR_T1024:
-       case SVR_T1023:
-               return IS_SVR_REV(svr, 1, 0);
-       case SVR_T1040:
-       case SVR_T1042:
-       case SVR_T1020:
-       case SVR_T1022:
-       case SVR_T2080:
-       case SVR_T2081:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
-       }
-       return false;
-}
-
-static inline bool has_erratum_a005697(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_9131:
-       case SVR_9132:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
-       }
-       return false;
-}
-
-static inline bool has_erratum_a004477(void)
-{
-       u32 svr = get_svr();
-       u32 soc = SVR_SOC_VER(svr);
-
-       switch (soc) {
-       case SVR_P1010:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_P1022:
-       case SVR_9131:
-       case SVR_9132:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
-       case SVR_P2020:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) ||
-                       IS_SVR_REV(svr, 2, 1);
-       case SVR_B4860:
-       case SVR_B4420:
-               return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
-       case SVR_P4080:
-               return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
-       }
-
-       return false;
-}
-#else
-static inline bool has_dual_phy(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a006261(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a007075(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a007798(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a007792(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a005697(void)
-{
-       return false;
-}
-
-static inline bool has_erratum_a004477(void)
-{
-       return false;
-}
+#if defined(CONFIG_PPC) || defined(CONFIG_ARM)
+bool has_dual_phy(void);
+bool has_erratum_a006261(void);
+bool has_erratum_a007075(void);
+bool has_erratum_a007798(void);
+bool has_erratum_a007792(void);
+bool has_erratum_a005697(void);
+bool has_erratum_a004477(void);
+bool has_erratum_a008751(void);
 #endif
 #endif /*_ASM_FSL_USB_H_ */

diff --git a/include/i2c.h b/include/i2c.h
index 1f5ae4538a70e00ce846ee9fa3262a11aaaebc15..d500445aaf193b517f7df3ec457105d85ef9fa71 100644 (file)
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -701,6 +701,9 @@ extern struct i2c_bus_hose  i2c_bus[];
  * Initialization, must be called once on start up, may be called
  * repeatedly to change the speed and slave addresses.
  */
+#ifdef CONFIG_SYS_I2C_EARLY_INIT
+void i2c_early_init_f(void);
+#endif
 void i2c_init(int speed, int slaveaddr);
 void i2c_init_board(void);
 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT

diff --git a/include/linux/compat.h b/include/linux/compat.h
index e561ee311a09cd546794524bd91896eb47688084..7236b8d0c302b7c42bb4128d3ea75de27ae822fe 100644 (file)
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -25,6 +25,8 @@ extern struct p_current *current;
        printf(fmt, ##args)
 #define dev_err(dev, fmt, args...)             \
        printf(fmt, ##args)
+#define dev_warn(dev, fmt, args...)            \
+       printf(fmt, ##args)
 #define printk printf
 #define printk_once    printf
 

diff --git a/include/power/tps65217.h b/include/power/tps65217.h
index 93cbe36c4724942b76565fe256de9937db8af2e3..69a49f76fefb372b7e6b15c2eed33d4875118292 100644 (file)
--- a/include/power/tps65217.h
+++ b/include/power/tps65217.h
@@ -65,7 +65,10 @@ enum {
 #define TPS65217_USB_INPUT_CUR_LIMIT_1300MA    0x02
 #define TPS65217_USB_INPUT_CUR_LIMIT_1800MA    0x03
 
+#define TPS65217_DCDC_VOLT_SEL_950MV           0x02
+#define TPS65217_DCDC_VOLT_SEL_1100MV          0x08
 #define TPS65217_DCDC_VOLT_SEL_1125MV          0x09
+#define TPS65217_DCDC_VOLT_SEL_1200MV          0x0c
 #define TPS65217_DCDC_VOLT_SEL_1275MV          0x0F
 #define TPS65217_DCDC_VOLT_SEL_1325MV          0x11
 

diff --git a/include/splash.h b/include/splash.h
index f0755ca695f83f643e9aa06b3619096fd4159544..25df1cf5ad80395a1074c0c192dcf4b72f9db877 100644 (file)
--- a/include/splash.h
+++ b/include/splash.h
@@ -43,6 +43,8 @@ struct splash_location {
        enum splash_flags flags;
        u32 offset;     /* offset from start of storage */
        char *devpart;  /* Use the load command dev:part conventions */
+       char *mtdpart;  /* MTD partition for ubi part */
+       char *ubivol;   /* UBI volume-name for ubifsmount */
 };
 
 int splash_source_load(struct splash_location *locations, uint size);

diff --git a/lib/Makefile b/lib/Makefile
index f77befe03c24fe35e6509cb9b17636a8c7b3cd2f..f48d90103d2134f841912ff9c82450d6b8707087 100644 (file)
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -9,7 +9,6 @@ ifndef CONFIG_SPL_BUILD
 
 obj-$(CONFIG_EFI) += efi/
 obj-$(CONFIG_EFI_LOADER) += efi_loader/
-obj-$(CONFIG_RSA) += rsa/
 obj-$(CONFIG_LZMA) += lzma/
 obj-$(CONFIG_LZO) += lzo/
 obj-$(CONFIG_ZLIB) += zlib/
@@ -25,8 +24,6 @@ obj-y += crc8.o
 obj-y += crc16.o
 obj-$(CONFIG_ERRNO_STR) += errno_str.o
 obj-$(CONFIG_FIT) += fdtdec_common.o
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
 obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
 obj-$(CONFIG_GZIP) += gunzip.o
 obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
@@ -39,15 +36,17 @@ obj-y += net_utils.o
 obj-$(CONFIG_PHYSMEM) += physmem.o
 obj-y += qsort.o
 obj-y += rc4.o
-obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SUPPORT_EMMC_RPMB) += sha256.o
-obj-$(CONFIG_SHA256) += sha256.o
 obj-$(CONFIG_TPM) += tpm.o
 obj-$(CONFIG_RBTREE)   += rbtree.o
 obj-$(CONFIG_BITREVERSE) += bitrev.o
 obj-y += list_sort.o
 endif
 
+obj-$(CONFIG_$(SPL_)RSA) += rsa/
+obj-$(CONFIG_$(SPL_)SHA1) += sha1.o
+obj-$(CONFIG_$(SPL_)SHA256) += sha256.o
+
 obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
 ifdef CONFIG_SPL_OF_CONTROL
 obj-$(CONFIG_OF_LIBFDT) += libfdt/

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index ab002e9fa3e5ceb33edcca7a08fcfb2f1d42e595..686b89da38549883c8cdaa5511c8a15d1921706d 100644 (file)
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1170,7 +1170,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index,
        if (fdtdec_get_bool(blob, node, "doubleclk"))
                dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
 
-       return 0;
+       return ret;
 }
 
 int fdtdec_setup(void)

diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig
index 86df0a0dd83b8c60f4995f801d186d58318cc3e9..09ec3582423bc0fc30c37531ade495e06f65fa01 100644 (file)
--- a/lib/rsa/Kconfig
+++ b/lib/rsa/Kconfig
@@ -13,6 +13,10 @@ config RSA
          option. The software based modular exponentiation is built into
          mkimage irrespective of this option.
 
+config SPL_RSA
+       bool "Use RSA Library within SPL"
+       depends on RSA
+
 if RSA
 config RSA_SOFTWARE_EXP
        bool "Enable driver for RSA Modular Exponentiation in software"

diff --git a/lib/rsa/Makefile b/lib/rsa/Makefile
index 6867e5054c098c20a64b18cecb128cae9b548079..4b2c1bae79bcc543ad1f27a3eaa2d702a77dfeca 100644 (file)
--- a/lib/rsa/Makefile
+++ b/lib/rsa/Makefile
@@ -7,5 +7,5 @@
 # SPDX-License-Identifier:     GPL-2.0+
 #
 
-obj-$(CONFIG_FIT_SIGNATURE) += rsa-verify.o rsa-checksum.o
+obj-$(CONFIG_$(SPL_)FIT_SIGNATURE) += rsa-verify.o rsa-checksum.o
 obj-$(CONFIG_RSA_SOFTWARE_EXP) += rsa-mod-exp.o

diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index 5ea2555280b1561da6e072d6d8092b9e2b2325f3..3c65fc90bf233bdfe0d5ffd1b77e8a4842a5de4d 100644 (file)
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -168,8 +168,10 @@ int snprintf(char *buf, size_t size, const char *fmt, ...)
        int ret;
 
        va_start(va, fmt);
-       ret = sprintf(buf, fmt, va);
+       outstr = buf;
+       ret = _vprintf(fmt, va, putc_outstr);
        va_end(va);
+       *outstr = '\0';
 
        return ret;
 }

diff --git a/net/bootp.c b/net/bootp.c
index aa6cdf0a47a5c17a36a711c62e72043890ce2465..42e14eda417436b0b6ef133055185e2ecb895029 100644 (file)
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -673,6 +673,15 @@ static int bootp_extended(u8 *e)
 
        *e++ = 255;             /* End of the list */
 
+       /*
+        * If nothing in list, remove it altogether. Some DHCP servers get
+        * upset by this minor faux pas and do not respond at all.
+        */
+       if (e == start + 3) {
+               printf("*** Warning: no DHCP options requested\n");
+               e -= 3;
+       }
+
        return e - start;
 }
 #endif

diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index c41aa5a9d9c7a40d958eef2fedaab0c015b9baba..22a22d1d538b4f0715a025e9ed224f8f3870ce00 100644 (file)
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -39,7 +39,11 @@ class StateTestEnv(object):
             Nothing.
         """
 
-        response = self.u_boot_console.run_command('printenv')
+        if self.u_boot_console.config.buildconfig['config_version_variable'] == 'y':
+            with self.u_boot_console.disable_check('main_signon'):
+                response = self.u_boot_console.run_command('printenv')
+        else:
+            response = self.u_boot_console.run_command('printenv')
         self.env = {}
         for l in response.splitlines():
             if not '=' in l:

diff --git a/tools/moveconfig.py b/tools/moveconfig.py
index 68631b7faed8267e786da0c7c687369f22f189ea..5e5ca06d8f9542537abcfffd352e971605963ae3 100755 (executable)
--- a/tools/moveconfig.py
+++ b/tools/moveconfig.py
@@ -17,72 +17,57 @@ This tool intends to help this tremendous work.
 Usage
 -----
 
-This tool takes one input file.  (let's say 'recipe' file here.)
-The recipe describes the list of config options you want to move.
-Each line takes the form:
-<config_name> <type> <default>
-(the fields must be separated with whitespaces.)
-
-<config_name> is the name of config option.
-
-<type> is the type of the option.  It must be one of bool, tristate,
-string, int, and hex.
-
-<default> is the default value of the option.  It must be appropriate
-value corresponding to the option type.  It must be either y or n for
-the bool type.  Tristate options can also take m (although U-Boot has
-not supported the module feature).
-
-You can add two or more lines in the recipe file, so you can move
-multiple options at once.
-
-Let's say, for example, you want to move CONFIG_CMD_USB and
-CONFIG_SYS_TEXT_BASE.
-
-The type should be bool, hex, respectively.  So, the recipe file
-should look like this:
-
-  $ cat recipe
-  CONFIG_CMD_USB bool n
-  CONFIG_SYS_TEXT_BASE hex 0x00000000
-
-Next you must edit the Kconfig to add the menu entries for the configs
+First, you must edit the Kconfig to add the menu entries for the configs
 you are moving.
 
-And then run this tool giving the file name of the recipe
+And then run this tool giving CONFIG names you want to move.
+For example, if you want to move CONFIG_CMD_USB and CONFIG_SYS_TEXT_BASE,
+simply type as follows:
 
-  $ tools/moveconfig.py recipe
+  $ tools/moveconfig.py CONFIG_CMD_USB CONFIG_SYS_TEXT_BASE
 
-The tool walks through all the defconfig files to move the config
-options specified by the recipe file.
+The tool walks through all the defconfig files and move the given CONFIGs.
 
 The log is also displayed on the terminal.
 
-Each line is printed in the format
-<defconfig_name>   :  <action>
+The log is printed for each defconfig as follows:
 
-<defconfig_name> is the name of the defconfig
-(without the suffix _defconfig).
+<defconfig_name>
+    <action1>
+    <action2>
+    <action3>
+    ...
 
-<action> shows what the tool did for that defconfig.
+<defconfig_name> is the name of the defconfig.
+
+<action*> shows what the tool did for that defconfig.
 It looks like one of the followings:
 
  - Move 'CONFIG_... '
    This config option was moved to the defconfig
 
- - Default value 'CONFIG_...'.  Do nothing.
-   The value of this option is the same as default.
-   We do not have to add it to the defconfig.
+ - CONFIG_... is not defined in Kconfig.  Do nothing.
+   The entry for this CONFIG was not found in Kconfig.
+   There are two common cases:
+     - You forgot to create an entry for the CONFIG before running
+       this tool, or made a typo in a CONFIG passed to this tool.
+     - The entry was hidden due to unmet 'depends on'.
+       This is correct behavior.
 
- - 'CONFIG_...' already exists in Kconfig.  Do nothing.
-   This config option is already defined in Kconfig.
-   We do not need/want to touch it.
+ - 'CONFIG_...' is the same as the define in Kconfig.  Do nothing.
+   The define in the config header matched the one in Kconfig.
+   We do not need to touch it.
 
  - Undefined.  Do nothing.
    This config option was not found in the config header.
    Nothing to do.
 
- - Failed to process.  Skip.
+ - Compiler is missing.  Do nothing.
+   The compiler specified for this architecture was not found
+   in your PATH environment.
+   (If -e option is passed, the tool exits immediately.)
+
+ - Failed to process.
    An error occurred during processing this defconfig.  Skipped.
    (If -e option is passed, the tool exits immediately on error.)
 
@@ -94,19 +79,19 @@ It just uses the regex method, so you should not rely on it.
 Just in case, please do 'git diff' to see what happened.
 
 
-How does it works?
-------------------
+How does it work?
+-----------------
 
 This tool runs configuration and builds include/autoconf.mk for every
 defconfig.  The config options defined in Kconfig appear in the .config
 file (unless they are hidden because of unmet dependency.)
 On the other hand, the config options defined by board headers are seen
 in include/autoconf.mk.  The tool looks for the specified options in both
-of them to decide the appropriate action for the options.  If the option
-is found in the .config or the value is the same as the specified default,
-the option does not need to be touched.  If the option is found in
-include/autoconf.mk, but not in the .config, and the value is different
-from the default, the tools adds the option to the defconfig.
+of them to decide the appropriate action for the options.  If the given
+config option is found in the .config, but its value does not match the
+one from the board header, the config option in the .config is replaced
+with the define in the board header.  Then, the .config is synced by
+"make savedefconfig" and the defconfig is updated with it.
 
 For faster processing, this tool handles multi-threading.  It creates
 separate build directories where the out-of-tree build is run.  The
@@ -139,13 +124,18 @@ Available options
   Specify a file containing a list of defconfigs to move
 
  -n, --dry-run
-   Peform a trial run that does not make any changes.  It is useful to
+   Perform a trial run that does not make any changes.  It is useful to
    see what is going to happen before one actually runs it.
 
  -e, --exit-on-error
    Exit immediately if Make exits with a non-zero status while processing
    a defconfig file.
 
+ -s, --force-sync
+   Do "make savedefconfig" forcibly for all the defconfig files.
+   If not specified, "make savedefconfig" only occurs for cases
+   where at least one CONFIG was moved.
+
  -H, --headers-only
    Only cleanup the headers; skip the defconfig processing
 
@@ -153,6 +143,14 @@ Available options
    Specify the number of threads to run simultaneously.  If not specified,
    the number of threads is the same as the number of CPU cores.
 
+ -r, --git-ref
+   Specify the git ref to clone for building the autoconf.mk. If unspecified
+   use the CWD. This is useful for when changes to the Kconfig affect the
+   default values and you want to capture the state of the defconfig from
+   before that change was in effect. If in doubt, specify a ref pre-Kconfig
+   changes (use HEAD if Kconfig changes are not committed). Worst case it will
+   take a bit longer to run, but will always do the right thing.
+
  -v, --verbose
    Show any build errors as boards are built
 
@@ -162,6 +160,7 @@ To see the complete list of supported options, run
 
 """
 
+import filecmp
 import fnmatch
 import multiprocessing
 import optparse
@@ -211,9 +210,8 @@ STATE_AUTOCONF = 2
 STATE_SAVEDEFCONFIG = 3
 
 ACTION_MOVE = 0
-ACTION_DEFAULT_VALUE = 1
-ACTION_ALREADY_EXIST = 2
-ACTION_UNDEFINED = 3
+ACTION_NO_ENTRY = 1
+ACTION_NO_CHANGE = 2
 
 COLOR_BLACK        = '0;30'
 COLOR_RED          = '0;31'
@@ -247,6 +245,12 @@ def check_top_directory():
         if not os.path.exists(f):
             sys.exit('Please run at the top of source directory.')
 
+def check_clean_directory():
+    """Exit if the source tree is not clean."""
+    for f in ('.config', 'include/config'):
+        if os.path.exists(f):
+            sys.exit("source tree is not clean, please run 'make mrproper'")
+
 def get_make_cmd():
     """Get the command name of GNU Make.
 
@@ -263,16 +267,14 @@ def get_make_cmd():
 def color_text(color_enabled, color, string):
     """Return colored string."""
     if color_enabled:
-        return '\033[' + color + 'm' + string + '\033[0m'
+        # LF should not be surrounded by the escape sequence.
+        # Otherwise, additional whitespace or line-feed might be printed.
+        return '\n'.join([ '\033[' + color + 'm' + s + '\033[0m' if s else ''
+                           for s in string.split('\n') ])
     else:
         return string
 
-def log_msg(color_enabled, color, defconfig, msg):
-    """Return the formated line for the log."""
-    return defconfig[:-len('_defconfig')].ljust(37) + ': ' + \
-        color_text(color_enabled, color, msg) + '\n'
-
-def update_cross_compile():
+def update_cross_compile(color_enabled):
     """Update per-arch CROSS_COMPILE via environment variables
 
     The default CROSS_COMPILE values are available
@@ -286,6 +288,9 @@ def update_cross_compile():
 
     export CROSS_COMPILE_ARM=...
     export CROSS_COMPILE_POWERPC=...
+
+    Then, this function checks if specified compilers really exist in your
+    PATH environment.
     """
     archs = []
 
@@ -299,8 +304,20 @@ def update_cross_compile():
     for arch in archs:
         env = 'CROSS_COMPILE_' + arch.upper()
         cross_compile = os.environ.get(env)
-        if cross_compile:
-            CROSS_COMPILE[arch] = cross_compile
+        if not cross_compile:
+            cross_compile = CROSS_COMPILE.get(arch, '')
+
+        for path in os.environ["PATH"].split(os.pathsep):
+            gcc_path = os.path.join(path, cross_compile + 'gcc')
+            if os.path.isfile(gcc_path) and os.access(gcc_path, os.X_OK):
+                break
+        else:
+            print >> sys.stderr, color_text(color_enabled, COLOR_YELLOW,
+                 'warning: %sgcc: not found in PATH.  %s architecture boards will be skipped'
+                                            % (cross_compile, arch))
+            cross_compile = None
+
+        CROSS_COMPILE[arch] = cross_compile
 
 def cleanup_one_header(header_path, patterns, dry_run):
     """Clean regex-matched lines away from a file.
@@ -331,12 +348,11 @@ def cleanup_one_header(header_path, patterns, dry_run):
             if not i in matched:
                 f.write(line)
 
-def cleanup_headers(config_attrs, dry_run):
+def cleanup_headers(configs, dry_run):
     """Delete config defines from board headers.
 
     Arguments:
-      config_attrs: A list of dictionaris, each of them includes the name,
-                    the type, and the default value of the target config.
+      configs: A list of CONFIGs to remove.
       dry_run: make no changes, but still display log.
     """
     while True:
@@ -349,8 +365,7 @@ def cleanup_headers(config_attrs, dry_run):
         return
 
     patterns = []
-    for config_attr in config_attrs:
-        config = config_attr['config']
+    for config in configs:
         patterns.append(re.compile(r'#\s*define\s+%s\W' % config))
         patterns.append(re.compile(r'#\s*undef\s+%s\W' % config))
 
@@ -362,6 +377,29 @@ def cleanup_headers(config_attrs, dry_run):
                                        patterns, dry_run)
 
 ### classes ###
+class Progress:
+
+    """Progress Indicator"""
+
+    def __init__(self, total):
+        """Create a new progress indicator.
+
+        Arguments:
+          total: A number of defconfig files to process.
+        """
+        self.current = 0
+        self.total = total
+
+    def inc(self):
+        """Increment the number of processed defconfig files."""
+
+        self.current += 1
+
+    def show(self):
+        """Display the progress."""
+        print ' %d defconfigs out of %d\r' % (self.current, self.total),
+        sys.stdout.flush()
+
 class KconfigParser:
 
     """A parser of .config and include/autoconf.mk."""
@@ -369,29 +407,35 @@ class KconfigParser:
     re_arch = re.compile(r'CONFIG_SYS_ARCH="(.*)"')
     re_cpu = re.compile(r'CONFIG_SYS_CPU="(.*)"')
 
-    def __init__(self, config_attrs, options, build_dir):
+    def __init__(self, configs, options, build_dir):
         """Create a new parser.
 
         Arguments:
-          config_attrs: A list of dictionaris, each of them includes the name,
-                        the type, and the default value of the target config.
+          configs: A list of CONFIGs to move.
           options: option flags.
           build_dir: Build directory.
         """
-        self.config_attrs = config_attrs
+        self.configs = configs
         self.options = options
-        self.build_dir = build_dir
+        self.dotconfig = os.path.join(build_dir, '.config')
+        self.autoconf = os.path.join(build_dir, 'include', 'autoconf.mk')
+        self.config_autoconf = os.path.join(build_dir, 'include', 'config',
+                                            'auto.conf')
+        self.defconfig = os.path.join(build_dir, 'defconfig')
 
     def get_cross_compile(self):
         """Parse .config file and return CROSS_COMPILE.
 
         Returns:
           A string storing the compiler prefix for the architecture.
+          Return a NULL string for architectures that do not require
+          compiler prefix (Sandbox and native build is the case).
+          Return None if the specified compiler is missing in your PATH.
+          Caller should distinguish '' and None.
         """
         arch = ''
         cpu = ''
-        dotconfig = os.path.join(self.build_dir, '.config')
-        for line in open(dotconfig):
+        for line in open(self.dotconfig):
             m = self.re_arch.match(line)
             if m:
                 arch = m.group(1)
@@ -400,15 +444,16 @@ class KconfigParser:
             if m:
                 cpu = m.group(1)
 
-        assert arch, 'Error: arch is not defined in %s' % defconfig
+        if not arch:
+            return None
 
         # fix-up for aarch64
         if arch == 'arm' and cpu == 'armv8':
             arch = 'aarch64'
 
-        return CROSS_COMPILE.get(arch, '')
+        return CROSS_COMPILE.get(arch, None)
 
-    def parse_one_config(self, config_attr, defconfig_lines, autoconf_lines):
+    def parse_one_config(self, config, dotconfig_lines, autoconf_lines):
         """Parse .config, defconfig, include/autoconf.mk for one config.
 
         This function looks for the config options in the lines from
@@ -416,74 +461,72 @@ class KconfigParser:
         which action should be taken for this defconfig.
 
         Arguments:
-          config_attr: A dictionary including the name, the type,
-                       and the default value of the target config.
-          defconfig_lines: lines from the original defconfig file.
+          config: CONFIG name to parse.
+          dotconfig_lines: lines from the .config file.
           autoconf_lines: lines from the include/autoconf.mk file.
 
         Returns:
           A tupple of the action for this defconfig and the line
           matched for the config.
         """
-        config = config_attr['config']
         not_set = '# %s is not set' % config
 
-        if config_attr['type'] in ('bool', 'tristate') and \
-           config_attr['default'] == 'n':
-            default = not_set
-        else:
-            default = config + '=' + config_attr['default']
-
-        for line in defconfig_lines:
+        for line in dotconfig_lines:
             line = line.rstrip()
             if line.startswith(config + '=') or line == not_set:
-                return (ACTION_ALREADY_EXIST, line)
-
-        if config_attr['type'] in ('bool', 'tristate'):
-            value = not_set
+                old_val = line
+                break
         else:
-            value = '(undefined)'
+            return (ACTION_NO_ENTRY, config)
 
         for line in autoconf_lines:
             line = line.rstrip()
             if line.startswith(config + '='):
-                value = line
+                new_val = line
                 break
-
-        if value == default:
-            action = ACTION_DEFAULT_VALUE
-        elif value == '(undefined)':
-            action = ACTION_UNDEFINED
         else:
-            action = ACTION_MOVE
+            new_val = not_set
 
-        return (action, value)
+        if old_val == new_val:
+            return (ACTION_NO_CHANGE, new_val)
 
-    def update_defconfig(self, defconfig):
-        """Parse files for the config options and update the defconfig.
+        # If this CONFIG is neither bool nor trisate
+        if old_val[-2:] != '=y' and old_val[-2:] != '=m' and old_val != not_set:
+            # tools/scripts/define2mk.sed changes '1' to 'y'.
+            # This is a problem if the CONFIG is int type.
+            # Check the type in Kconfig and handle it correctly.
+            if new_val[-2:] == '=y':
+                new_val = new_val[:-1] + '1'
 
-        This function parses the given defconfig, the generated .config
-        and include/autoconf.mk searching the target options.
-        Move the config option(s) to the defconfig or do nothing if unneeded.
-        Also, display the log to show what happened to this defconfig.
+        return (ACTION_MOVE, new_val)
+
+    def update_dotconfig(self):
+        """Parse files for the config options and update the .config.
+
+        This function parses the generated .config and include/autoconf.mk
+        searching the target options.
+        Move the config option(s) to the .config as needed.
 
         Arguments:
           defconfig: defconfig name.
+
+        Returns:
+          Return a tuple of (updated flag, log string).
+          The "updated flag" is True if the .config was updated, False
+          otherwise.  The "log string" shows what happend to the .config.
         """
 
-        defconfig_path = os.path.join('configs', defconfig)
-        dotconfig_path = os.path.join(self.build_dir, '.config')
-        autoconf_path = os.path.join(self.build_dir, 'include', 'autoconf.mk')
         results = []
+        updated = False
 
-        with open(defconfig_path) as f:
-            defconfig_lines = f.readlines()
+        with open(self.dotconfig) as f:
+            dotconfig_lines = f.readlines()
 
-        with open(autoconf_path) as f:
+        with open(self.autoconf) as f:
             autoconf_lines = f.readlines()
 
-        for config_attr in self.config_attrs:
-            result = self.parse_one_config(config_attr, defconfig_lines,
+        for config in self.configs:
+            result = self.parse_one_config(config, dotconfig_lines,
                                            autoconf_lines)
             results.append(result)
 
@@ -493,32 +536,52 @@ class KconfigParser:
             if action == ACTION_MOVE:
                 actlog = "Move '%s'" % value
                 log_color = COLOR_LIGHT_GREEN
-            elif action == ACTION_DEFAULT_VALUE:
-                actlog = "Default value '%s'.  Do nothing." % value
+            elif action == ACTION_NO_ENTRY:
+                actlog = "%s is not defined in Kconfig.  Do nothing." % value
                 log_color = COLOR_LIGHT_BLUE
-            elif action == ACTION_ALREADY_EXIST:
-                actlog = "'%s' already defined in Kconfig.  Do nothing." % value
+            elif action == ACTION_NO_CHANGE:
+                actlog = "'%s' is the same as the define in Kconfig.  Do nothing." \
+                         % value
                 log_color = COLOR_LIGHT_PURPLE
-            elif action == ACTION_UNDEFINED:
-                actlog = "Undefined.  Do nothing."
-                log_color = COLOR_DARK_GRAY
             else:
                 sys.exit("Internal Error. This should not happen.")
 
-            log += log_msg(self.options.color, log_color, defconfig, actlog)
+            log += color_text(self.options.color, log_color, actlog) + '\n'
 
-        # Some threads are running in parallel.
-        # Print log in one shot to not mix up logs from different threads.
-        print log,
+        with open(self.dotconfig, 'a') as f:
+            for (action, value) in results:
+                if action == ACTION_MOVE:
+                    f.write(value + '\n')
+                    updated = True
+
+        self.results = results
+        os.remove(self.config_autoconf)
+        os.remove(self.autoconf)
+
+        return (updated, log)
+
+    def check_defconfig(self):
+        """Check the defconfig after savedefconfig
+
+        Returns:
+          Return additional log if moved CONFIGs were removed again by
+          'make savedefconfig'.
+        """
+
+        log = ''
+
+        with open(self.defconfig) as f:
+            defconfig_lines = f.readlines()
 
-        if not self.options.dry_run:
-            with open(dotconfig_path, 'a') as f:
-                for (action, value) in results:
-                    if action == ACTION_MOVE:
-                        f.write(value + '\n')
+        for (action, value) in self.results:
+            if action != ACTION_MOVE:
+                continue
+            if not value + '\n' in defconfig_lines:
+                log += color_text(self.options.color, COLOR_YELLOW,
+                                  "'%s' was removed by savedefconfig.\n" %
+                                  value)
 
-        os.remove(os.path.join(self.build_dir, 'include', 'config', 'auto.conf'))
-        os.remove(autoconf_path)
+        return log
 
 class Slot:
 
@@ -529,21 +592,25 @@ class Slot:
     for faster processing.
     """
 
-    def __init__(self, config_attrs, options, devnull, make_cmd):
+    def __init__(self, configs, options, progress, devnull, make_cmd, reference_src_dir):
         """Create a new process slot.
 
         Arguments:
-          config_attrs: A list of dictionaris, each of them includes the name,
-                        the type, and the default value of the target config.
+          configs: A list of CONFIGs to move.
           options: option flags.
+          progress: A progress indicator.
           devnull: A file object of '/dev/null'.
           make_cmd: command name of GNU Make.
+          reference_src_dir: Determine the true starting config state from this
+                             source tree.
         """
         self.options = options
+        self.progress = progress
         self.build_dir = tempfile.mkdtemp()
         self.devnull = devnull
         self.make_cmd = (make_cmd, 'O=' + self.build_dir)
-        self.parser = KconfigParser(config_attrs, options, self.build_dir)
+        self.reference_src_dir = reference_src_dir
+        self.parser = KconfigParser(configs, options, self.build_dir)
         self.state = STATE_IDLE
         self.failed_boards = []
 
@@ -552,7 +619,7 @@ class Slot:
 
         This function makes sure the temporary directory is cleaned away
         even if Python suddenly dies due to error.  It should be done in here
-        because it is guranteed the destructor is always invoked when the
+        because it is guaranteed the destructor is always invoked when the
         instance of the class gets unreferenced.
 
         If the subprocess is still running, wait until it finishes.
@@ -562,7 +629,7 @@ class Slot:
                 pass
         shutil.rmtree(self.build_dir)
 
-    def add(self, defconfig, num, total):
+    def add(self, defconfig):
         """Assign a new subprocess for defconfig and add it to the slot.
 
         If the slot is vacant, create a new subprocess for processing the
@@ -577,14 +644,11 @@ class Slot:
         """
         if self.state != STATE_IDLE:
             return False
-        cmd = list(self.make_cmd)
-        cmd.append(defconfig)
-        self.ps = subprocess.Popen(cmd, stdout=self.devnull,
-                                   stderr=subprocess.PIPE)
+
         self.defconfig = defconfig
-        self.state = STATE_DEFCONFIG
-        self.num = num
-        self.total = total
+        self.log = ''
+        self.use_git_ref = True if self.options.git_ref else False
+        self.do_defconfig()
         return True
 
     def poll(self):
@@ -594,8 +658,11 @@ class Slot:
         If the configuration is successfully finished, assign a new
         subprocess to build include/autoconf.mk.
         If include/autoconf.mk is generated, invoke the parser to
-        parse the .config and the include/autoconf.mk, and then set the
-        slot back to the idle state.
+        parse the .config and the include/autoconf.mk, moving
+        config options to the .config as needed.
+        If the .config was updated, run "make savedefconfig" to sync
+        it, update the original defconfig, and then set the slot back
+        to the idle state.
 
         Returns:
           Return True if the subprocess is terminated, False otherwise
@@ -607,65 +674,131 @@ class Slot:
             return False
 
         if self.ps.poll() != 0:
-            errmsg = 'Failed to process.'
-            errout = self.ps.stderr.read()
-            if errout.find('gcc: command not found') != -1:
-                errmsg = 'Compiler not found ('
-                errmsg += color_text(self.options.color, COLOR_YELLOW,
-                                     self.cross_compile)
-                errmsg += color_text(self.options.color, COLOR_LIGHT_RED,
-                                     ')')
-            print >> sys.stderr, log_msg(self.options.color,
-                                         COLOR_LIGHT_RED,
-                                         self.defconfig,
-                                         errmsg),
-            if self.options.verbose:
-                print >> sys.stderr, color_text(self.options.color,
-                                                COLOR_LIGHT_CYAN, errout)
-            if self.options.exit_on_error:
-                sys.exit("Exit on error.")
+            self.handle_error()
+        elif self.state == STATE_DEFCONFIG:
+            if self.options.git_ref and not self.use_git_ref:
+                self.do_savedefconfig()
             else:
-                # If --exit-on-error flag is not set,
-                # skip this board and continue.
-                # Record the failed board.
-                self.failed_boards.append(self.defconfig)
-                self.state = STATE_IDLE
-                return True
+                self.do_autoconf()
+        elif self.state == STATE_AUTOCONF:
+            if self.use_git_ref:
+                self.use_git_ref = False
+                self.do_defconfig()
+            else:
+                self.do_savedefconfig()
+        elif self.state == STATE_SAVEDEFCONFIG:
+            self.update_defconfig()
+        else:
+            sys.exit("Internal Error. This should not happen.")
 
-        if self.state == STATE_AUTOCONF:
-            self.parser.update_defconfig(self.defconfig)
+        return True if self.state == STATE_IDLE else False
 
-            print ' %d defconfigs out of %d\r' % (self.num + 1, self.total),
-            sys.stdout.flush()
+    def handle_error(self):
+        """Handle error cases."""
 
-            """Save off the defconfig in a consistent way"""
-            cmd = list(self.make_cmd)
-            cmd.append('savedefconfig')
-            self.ps = subprocess.Popen(cmd, stdout=self.devnull,
-                                       stderr=subprocess.PIPE)
-            self.state = STATE_SAVEDEFCONFIG
-            return False
+        self.log += color_text(self.options.color, COLOR_LIGHT_RED,
+                               "Failed to process.\n")
+        if self.options.verbose:
+            self.log += color_text(self.options.color, COLOR_LIGHT_CYAN,
+                                   self.ps.stderr.read())
+        self.finish(False)
 
-        if self.state == STATE_SAVEDEFCONFIG:
-            defconfig_path = os.path.join(self.build_dir, 'defconfig')
-            shutil.move(defconfig_path,
-                        os.path.join('configs', self.defconfig))
-            self.state = STATE_IDLE
-            return True
+    def do_defconfig(self):
+        """Run 'make <board>_defconfig' to create the .config file."""
+
+        cmd = list(self.make_cmd)
+        cmd.append(self.defconfig)
+        if self.use_git_ref:
+            cmd.append('-C')
+            cmd.append(self.reference_src_dir)
+        self.ps = subprocess.Popen(cmd, stdout=self.devnull,
+                                   stderr=subprocess.PIPE)
+        self.state = STATE_DEFCONFIG
+
+    def do_autoconf(self):
+        """Run 'make include/config/auto.conf'."""
 
         self.cross_compile = self.parser.get_cross_compile()
+        if self.cross_compile is None:
+            self.log += color_text(self.options.color, COLOR_YELLOW,
+                                   "Compiler is missing.  Do nothing.\n")
+            self.finish(False)
+            return
+
         cmd = list(self.make_cmd)
         if self.cross_compile:
             cmd.append('CROSS_COMPILE=%s' % self.cross_compile)
         cmd.append('KCONFIG_IGNORE_DUPLICATES=1')
         cmd.append('include/config/auto.conf')
-        """This will be screen-scraped, so be sure the expected text will be
-        returned consistently on every machine by setting LANG=C"""
+        if self.use_git_ref:
+            cmd.append('-C')
+            cmd.append(self.reference_src_dir)
         self.ps = subprocess.Popen(cmd, stdout=self.devnull,
-                                   env=dict(os.environ, LANG='C'),
                                    stderr=subprocess.PIPE)
         self.state = STATE_AUTOCONF
-        return False
+
+    def do_savedefconfig(self):
+        """Update the .config and run 'make savedefconfig'."""
+
+        (updated, log) = self.parser.update_dotconfig()
+        self.log += log
+
+        if not self.options.force_sync and not updated:
+            self.finish(True)
+            return
+        if updated:
+            self.log += color_text(self.options.color, COLOR_LIGHT_GREEN,
+                                   "Syncing by savedefconfig...\n")
+        else:
+            self.log += "Syncing by savedefconfig (forced by option)...\n"
+
+        cmd = list(self.make_cmd)
+        cmd.append('savedefconfig')
+        self.ps = subprocess.Popen(cmd, stdout=self.devnull,
+                                   stderr=subprocess.PIPE)
+        self.state = STATE_SAVEDEFCONFIG
+
+    def update_defconfig(self):
+        """Update the input defconfig and go back to the idle state."""
+
+        self.log += self.parser.check_defconfig()
+        orig_defconfig = os.path.join('configs', self.defconfig)
+        new_defconfig = os.path.join(self.build_dir, 'defconfig')
+        updated = not filecmp.cmp(orig_defconfig, new_defconfig)
+
+        if updated:
+            self.log += color_text(self.options.color, COLOR_LIGHT_BLUE,
+                                   "defconfig was updated.\n")
+
+        if not self.options.dry_run and updated:
+            shutil.move(new_defconfig, orig_defconfig)
+        self.finish(True)
+
+    def finish(self, success):
+        """Display log along with progress and go to the idle state.
+
+        Arguments:
+          success: Should be True when the defconfig was processed
+                   successfully, or False when it fails.
+        """
+        # output at least 30 characters to hide the "* defconfigs out of *".
+        log = self.defconfig.ljust(30) + '\n'
+
+        log += '\n'.join([ '    ' + s for s in self.log.split('\n') ])
+        # Some threads are running in parallel.
+        # Print log atomically to not mix up logs from different threads.
+        print >> (sys.stdout if success else sys.stderr), log
+
+        if not success:
+            if self.options.exit_on_error:
+                sys.exit("Exit on error.")
+            # If --exit-on-error flag is not set, skip this board and continue.
+            # Record the failed board.
+            self.failed_boards.append(self.defconfig)
+
+        self.progress.inc()
+        self.progress.show()
+        self.state = STATE_IDLE
 
     def get_failed_boards(self):
         """Returns a list of failed boards (defconfigs) in this slot.
@@ -676,22 +809,25 @@ class Slots:
 
     """Controller of the array of subprocess slots."""
 
-    def __init__(self, config_attrs, options):
+    def __init__(self, configs, options, progress, reference_src_dir):
         """Create a new slots controller.
 
         Arguments:
-          config_attrs: A list of dictionaris containing the name, the type,
-                        and the default value of the target CONFIG.
+          configs: A list of CONFIGs to move.
           options: option flags.
+          progress: A progress indicator.
+          reference_src_dir: Determine the true starting config state from this
+                             source tree.
         """
         self.options = options
         self.slots = []
         devnull = get_devnull()
         make_cmd = get_make_cmd()
         for i in range(options.jobs):
-            self.slots.append(Slot(config_attrs, options, devnull, make_cmd))
+            self.slots.append(Slot(configs, options, progress, devnull,
+                                   make_cmd, reference_src_dir))
 
-    def add(self, defconfig, num, total):
+    def add(self, defconfig):
         """Add a new subprocess if a vacant slot is found.
 
         Arguments:
@@ -701,7 +837,7 @@ class Slots:
           Return True on success or False on failure
         """
         for slot in self.slots:
-            if slot.add(defconfig, num, total):
+            if slot.add(defconfig):
                 return True
         return False
 
@@ -746,23 +882,54 @@ class Slots:
                 for board in failed_boards:
                     f.write(board + '\n')
 
-def move_config(config_attrs, options):
+class WorkDir:
+    def __init__(self):
+        """Create a new working directory."""
+        self.work_dir = tempfile.mkdtemp()
+
+    def __del__(self):
+        """Delete the working directory
+
+        This function makes sure the temporary directory is cleaned away
+        even if Python suddenly dies due to error.  It should be done in here
+        because it is guaranteed the destructor is always invoked when the
+        instance of the class gets unreferenced.
+        """
+        shutil.rmtree(self.work_dir)
+
+    def get(self):
+        return self.work_dir
+
+def move_config(configs, options):
     """Move config options to defconfig files.
 
     Arguments:
-      config_attrs: A list of dictionaris, each of them includes the name,
-                    the type, and the default value of the target config.
+      configs: A list of CONFIGs to move.
       options: option flags
     """
-    if len(config_attrs) == 0:
-        print 'Nothing to do. exit.'
-        sys.exit(0)
-
-    print 'Move the following CONFIG options (jobs: %d)' % options.jobs
-    for config_attr in config_attrs:
-        print '  %s (type: %s, default: %s)' % (config_attr['config'],
-                                                config_attr['type'],
-                                                config_attr['default'])
+    if len(configs) == 0:
+        if options.force_sync:
+            print 'No CONFIG is specified. You are probably syncing defconfigs.',
+        else:
+            print 'Neither CONFIG nor --force-sync is specified. Nothing will happen.',
+    else:
+        print 'Move ' + ', '.join(configs),
+    print '(jobs: %d)\n' % options.jobs
+
+    reference_src_dir = ''
+
+    if options.git_ref:
+        work_dir = WorkDir()
+        reference_src_dir = work_dir.get()
+        print "Cloning git repo to a separate work directory..."
+        subprocess.check_output(['git', 'clone', os.getcwd(), '.'],
+                                cwd=reference_src_dir)
+        print "Checkout '%s' to build the original autoconf.mk." % \
+            subprocess.check_output(['git', 'rev-parse', '--short',
+                                    options.git_ref]).strip()
+        subprocess.check_output(['git', 'checkout', options.git_ref],
+                                stderr=subprocess.STDOUT,
+                                cwd=reference_src_dir)
 
     if options.defconfigs:
         defconfigs = [line.strip() for line in open(options.defconfigs)]
@@ -780,13 +947,14 @@ def move_config(config_attrs, options):
             for filename in fnmatch.filter(filenames, '*_defconfig'):
                 defconfigs.append(os.path.join(dirpath, filename))
 
-    slots = Slots(config_attrs, options)
+    progress = Progress(len(defconfigs))
+    slots = Slots(configs, options, progress, reference_src_dir)
 
     # Main loop to process defconfig files:
     #  Add a new subprocess into a vacant slot.
     #  Sleep if there is no available slot.
-    for i, defconfig in enumerate(defconfigs):
-        while not slots.add(defconfig, i, len(defconfigs)):
+    for defconfig in defconfigs:
+        while not slots.add(defconfig):
             while not slots.available():
                 # No available slot: sleep for a while
                 time.sleep(SLEEP_TIME)
@@ -798,76 +966,6 @@ def move_config(config_attrs, options):
     print ''
     slots.show_failed_boards()
 
-def bad_recipe(filename, linenum, msg):
-    """Print error message with the file name and the line number and exit."""
-    sys.exit("%s: line %d: error : " % (filename, linenum) + msg)
-
-def parse_recipe(filename):
-    """Parse the recipe file and retrieve the config attributes.
-
-    This function parses the given recipe file and gets the name,
-    the type, and the default value of the target config options.
-
-    Arguments:
-      filename: path to file to be parsed.
-    Returns:
-      A list of dictionaris, each of them includes the name,
-      the type, and the default value of the target config.
-    """
-    config_attrs = []
-    linenum = 1
-
-    for line in open(filename):
-        tokens = line.split()
-        if len(tokens) != 3:
-            bad_recipe(filename, linenum,
-                       "%d fields in this line.  Each line must contain 3 fields"
-                       % len(tokens))
-
-        (config, type, default) = tokens
-
-        # prefix the option name with CONFIG_ if missing
-        if not config.startswith('CONFIG_'):
-            config = 'CONFIG_' + config
-
-        # sanity check of default values
-        if type == 'bool':
-            if not default in ('y', 'n'):
-                bad_recipe(filename, linenum,
-                           "default for bool type must be either y or n")
-        elif type == 'tristate':
-            if not default in ('y', 'm', 'n'):
-                bad_recipe(filename, linenum,
-                           "default for tristate type must be y, m, or n")
-        elif type == 'string':
-            if default[0] != '"' or default[-1] != '"':
-                bad_recipe(filename, linenum,
-                           "default for string type must be surrounded by double-quotations")
-        elif type == 'int':
-            try:
-                int(default)
-            except:
-                bad_recipe(filename, linenum,
-                           "type is int, but default value is not decimal")
-        elif type == 'hex':
-            if len(default) < 2 or default[:2] != '0x':
-                bad_recipe(filename, linenum,
-                           "default for hex type must be prefixed with 0x")
-            try:
-                int(default, 16)
-            except:
-                bad_recipe(filename, linenum,
-                           "type is hex, but default value is not hexadecimal")
-        else:
-            bad_recipe(filename, linenum,
-                       "unsupported type '%s'. type must be one of bool, tristate, string, int, hex"
-                       % type)
-
-        config_attrs.append({'config': config, 'type': type, 'default': default})
-        linenum += 1
-
-    return config_attrs
-
 def main():
     try:
         cpu_count = multiprocessing.cpu_count()
@@ -885,37 +983,40 @@ def main():
     parser.add_option('-e', '--exit-on-error', action='store_true',
                       default=False,
                       help='exit immediately on any error')
+    parser.add_option('-s', '--force-sync', action='store_true', default=False,
+                      help='force sync by savedefconfig')
     parser.add_option('-H', '--headers-only', dest='cleanup_headers_only',
                       action='store_true', default=False,
                       help='only cleanup the headers')
     parser.add_option('-j', '--jobs', type='int', default=cpu_count,
                       help='the number of jobs to run simultaneously')
+    parser.add_option('-r', '--git-ref', type='string',
+                      help='the git ref to clone for building the autoconf.mk')
     parser.add_option('-v', '--verbose', action='store_true', default=False,
                       help='show any build errors as boards are built')
-    parser.usage += ' recipe_file\n\n' + \
-                    'The recipe_file should describe config options you want to move.\n' + \
-                    'Each line should contain config_name, type, default_value\n\n' + \
-                    'Example:\n' + \
-                    'CONFIG_FOO bool n\n' + \
-                    'CONFIG_BAR int 100\n' + \
-                    'CONFIG_BAZ string "hello"\n'
+    parser.usage += ' CONFIG ...'
 
-    (options, args) = parser.parse_args()
+    (options, configs) = parser.parse_args()
 
-    if len(args) != 1:
+    if len(configs) == 0 and not options.force_sync:
         parser.print_usage()
         sys.exit(1)
 
-    config_attrs = parse_recipe(args[0])
-
-    update_cross_compile()
+    # prefix the option name with CONFIG_ if missing
+    configs = [ config if config.startswith('CONFIG_') else 'CONFIG_' + config
+                for config in configs ]
 
     check_top_directory()
 
+    check_clean_directory()
+
+    update_cross_compile(options.color)
+
     if not options.cleanup_headers_only:
-        move_config(config_attrs, options)
+        move_config(configs, options)
 
-    cleanup_headers(config_attrs, options.dry_run)
+    if configs:
+        cleanup_headers(configs, options.dry_run)
 
 if __name__ == '__main__':
     main()

diff --git a/tools/scripts/define2mk.sed b/tools/scripts/define2mk.sed
index c641edfb0194ba81195e930b668c6250c90072d8..0f00285f367e4c1d429aee1f8e8b069a054c2280 100644 (file)
--- a/tools/scripts/define2mk.sed
+++ b/tools/scripts/define2mk.sed
@@ -22,6 +22,8 @@
        s/=\(..*\)/="\1"/;
        # but remove again from decimal numbers
        s/="\([0-9][0-9]*\)"/=\1/;
+       # ... and from negative decimal numbers
+       s/="\(-[1-9][0-9]*\)"/=\1/;
        # ... and from hex numbers
        s/="\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)"/=\1/;
        # ... and from configs defined from other configs