]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
authorTom Rini <trini@konsulko.com>
Thu, 26 Oct 2017 15:50:33 +0000 (11:50 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 26 Oct 2017 15:50:33 +0000 (11:50 -0400)
arch/arm/Kconfig
arch/arm/dts/Makefile
arch/arm/dts/sun8i-r16-bananapi-m2m.dts [new file with mode: 0644]
arch/arm/dts/sunxi-u-boot.dtsi
arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h
cmd/fastboot/Kconfig
configs/Bananapi_m2m_defconfig [new file with mode: 0644]
configs/orangepi_pc2_defconfig
configs/orangepi_zero_defconfig
drivers/mtd/spi/Kconfig

index 64e0ee43f1126cecde6e713d50f887b889a2564b..83b7aa51dc2c22b5c365cd8091daed9ae1e1186a 100644 (file)
@@ -698,6 +698,7 @@ config ARCH_SUNXI
        select SPL_SYS_MALLOC_SIMPLE if SPL
        select SYS_NS16550
        select SPL_SYS_THUMB_BUILD if !ARM64
+       select SYS_THUMB_BUILD if !ARM64
        select USB if DISTRO_DEFAULTS
        select USB_STORAGE if DISTRO_DEFAULTS
        select USB_KEYBOARD if DISTRO_DEFAULTS
index 5b90280468c260b16fa40f0e244da516b5f9bff0..6db64f91016ccd1d86c6989ff6a376abd3752b17 100644 (file)
@@ -309,6 +309,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
        sun8i-a33-olinuxino.dtb \
        sun8i-a33-q8-tablet.dtb \
        sun8i-a33-sinlinx-sina33.dtb \
+       sun8i-r16-bananapi-m2m.dtb \
        sun8i-r16-nintendo-nes-classic-edition.dtb \
        sun8i-r16-parrot.dtb
 dtb-$(CONFIG_MACH_SUN8I_A83T) += \
diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
new file mode 100644 (file)
index 0000000..eaf0966
--- /dev/null
@@ -0,0 +1,321 @@
+/*
+ * Copyright (c) 2017 Free Electrons <maxime.ripard@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "BananaPi M2 Magic";
+       compatible = "sinovoip,bananapi-m2m", "allwinner,sun8i-a33";
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               serial0 = &uart0;
+               serial1 = &uart1;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               blue {
+                       label = "bpi-m2m:blue:usr";
+                       gpios = <&pio 2 7 GPIO_ACTIVE_LOW>;
+               };
+
+               green {
+                       label = "bpi-m2m:green:usr";
+                       gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>;
+               };
+
+               red {
+                       label = "bpi-m2m:red:power";
+                       gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+                       default-state = "on";
+               };
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
+       };
+};
+
+&codec {
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc3>;
+};
+
+&cpu0_opp_table {
+       opp@1104000000 {
+               opp-hz = /bits/ 64 <1104000000>;
+               opp-microvolt = <1320000>;
+               clock-latency-ns = <244144>; /* 8 32k periods */
+       };
+
+       opp@1200000000 {
+               opp-hz = /bits/ 64 <1200000000>;
+               opp-microvolt = <1320000>;
+               clock-latency-ns = <244144>; /* 8 32k periods */
+       };
+};
+
+&dai {
+       status = "okay";
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+/* This is the i2c bus exposed on the DSI connector for the touch panel */
+&i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c0_pins_a>;
+       status = "disabled";
+};
+
+/* This is the i2c bus exposed on the GPIO header */
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins_a>;
+       status = "disabled";
+};
+
+/* This is the i2c bus exposed on the CSI connector to control the sensor */
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c2_pins_a>;
+       status = "disabled";
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins_a>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+       cd-inverted;
+       status = "okay";
+};
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins_a>;
+       vmmc-supply = <&reg_aldo1>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&r_rsb {
+       status = "okay";
+
+       axp22x: pmic@3a3 {
+               compatible = "x-powers,axp223";
+               reg = <0x3a3>;
+               interrupt-parent = <&nmi_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               eldoin-supply = <&reg_dcdc1>;
+               x-powers,drive-vbus-en;
+       };
+};
+
+#include "axp223.dtsi"
+
+&ac_power_supply {
+       status = "okay";
+};
+
+&reg_aldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-io";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "vdd-dll";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "avcc";
+};
+
+&reg_dc1sw {
+       regulator-name = "vcc-lcd";
+};
+
+&reg_dc5ldo {
+       regulator-always-on;
+       regulator-min-microvolt = <900000>;
+       regulator-max-microvolt = <1400000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <900000>;
+       regulator-max-microvolt = <1400000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dcdc3 {
+       regulator-always-on;
+       regulator-min-microvolt = <900000>;
+       regulator-max-microvolt = <1400000>;
+       regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+/*
+ * Our WiFi chip needs both DLDO1 and DLDO2 to be powered at the same
+ * time, with the two being in sync. Since this is not really
+ * supported right now, just use the two as always on, and we will fix
+ * it later.
+ */
+&reg_dldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi0";
+};
+
+&reg_dldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi1";
+};
+
+&reg_drivevbus {
+       regulator-name = "usb0-vbus";
+       status = "okay";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};
+
+&sound {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_b>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins_a>, <&uart1_pins_cts_rts_a>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usb_power_supply {
+       status = "okay";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
+       usb0_vbus_power-supply = <&usb_power_supply>;
+       usb0_vbus-supply = <&reg_drivevbus>;
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};
index 5adfd9bca2ec1ffa8ff8360f02d51071948009a3..72e95afd780e936e511e92557a7f4c5b51893fa9 100644 (file)
@@ -1,5 +1,14 @@
 #include <config.h>
 
+/*
+ * This is the maximum size the U-Boot binary can be, which is basically
+ * the start of the environment, minus the start of the U-Boot binary in
+ * the MMC. This makes the assumption that the MMC is using 512-bytes
+ * blocks, but devices using something other than that remains to be
+ * seen.
+ */
+#define UBOOT_MMC_MAX_SIZE     (CONFIG_ENV_OFFSET - (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512))
+
 / {
        binman {
                filename = "u-boot-sunxi-with-spl.bin";
@@ -8,6 +17,9 @@
                        filename = "spl/sunxi-spl.bin";
                };
                u-boot-img {
+#ifdef CONFIG_MMC
+                       size = <UBOOT_MMC_MAX_SIZE>;
+#endif
                        pos = <CONFIG_SPL_PAD_TO>;
                };
        };
index 5dfcbf3b017bec52a80f97eab0121302c27de46b..b4ea2f8cfbd509dece962d40044709f585fc5322 100644 (file)
@@ -158,7 +158,7 @@ struct sunxi_ccm_reg {
 #define CPU_CLK_SRC_OSC24M             0
 #define CPU_CLK_SRC_PLL1               1
 
-#define CCM_PLL1_CTRL_N(n)             ((((n) - 1) & 0xff) << 8)
+#define CCM_PLL1_CTRL_N(n)             (((n) & 0xff) << 8)
 #define CCM_PLL1_CTRL_P(n)             (((n) & 0x1) << 16)
 #define CCM_PLL1_CTRL_EN               (0x1 << 31)
 #define CMM_PLL1_CLOCK_TIME_2          (0x2 << 24)
index 214bbc23fc5217a8ab2099bdbc722a91bcd404f9..4ce7a775e28ebd136eb70a8e696ca2bcd9fd2ee8 100644 (file)
@@ -81,6 +81,16 @@ config FASTBOOT_FLASH_MMC_DEV
          regarding the non-volatile storage device. Define this to
          the eMMC device that fastboot should use to store the image.
 
+config FASTBOOT_FLASH_NAND_DEV
+       int "Define FASTBOOT NAND FLASH default device"
+       depends on FASTBOOT_FLASH && NAND
+       depends on CMD_MTDPARTS
+       default 0 if ARCH_SUNXI && NAND_SUNXI
+       help
+         The fastboot "flash" command requires additional information
+         regarding the non-volatile storage device. Define this to
+         the NAND device that fastboot should use to store the image.
+
 config FASTBOOT_GPT_NAME
        string "Target name for updating GPT"
        depends on FASTBOOT_FLASH
diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig
new file mode 100644 (file)
index 0000000..82cd2c4
--- /dev/null
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_CONS_INDEX=1
+CONFIG_MACH_SUN8I_A33=y
+CONFIG_DRAM_CLK=600
+CONFIG_DRAM_ZQ=15291
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PB4"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_USB0_ID_DET="PH8"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_MUSB_GADGET=y
index 5918e729d126a1d16e6a26753834fd90f829e639..e5fea42fa649a846e7177011d687941c6d21800e 100644 (file)
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN50I_H5=y
 CONFIG_DRAM_CLK=672
 CONFIG_DRAM_ZQ=3881977
index 1a16ed1ad6e0a59124b846e2ded49c2c4a5f90e7..5792e7a4a381b8bb324547aa818286f42b779ad5 100644 (file)
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_MACH_SUN8I_H3=y
 CONFIG_DRAM_CLK=624
 CONFIG_DRAM_ZQ=3881979
index 5700859ff27149cc1ba5d6ea99738b52200a98b3..6ba255d676bf4d62514fd82d9f3e9ab48551dd4f 100644 (file)
@@ -140,6 +140,7 @@ if SPL
 config SPL_SPI_SUNXI
        bool "Support for SPI Flash on Allwinner SoCs in SPL"
        depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I
+       select SPL_SPI_FLASH_SUPPORT
        ---help---
        Enable support for SPI Flash. This option allows SPL to read from
        sunxi SPI Flash. It uses the same method as the boot ROM, so does