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Various fixes for capability IFUNCs
[thirdparty/binutils-gdb.git] / ld / testsuite / ld-aarch64 / morello-ifunc4a.d
CommitLineData
36b60023
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1# Checking that the IRELATIVE relocations which are added by CAPINIT
2# static relocations end up between the __rela_iplt_start and __rela_iplt_end
3# symbols and that RELATIVE relocations added by CAPINIT static relocations end
4# up between __rela_dyn_start and __rela_dyn_end.
5#as: -march=morello+c64
6#ld:
7#objdump: -Dzr --section-headers --syms
8
9.*: file format .*
10
11Sections:
12Idx Name Size VMA LMA File off Algn
13#record: PCC_START
14 0 \.[^ ]+ +[0-9a-f]+ ([0-9a-f]+) [0-9a-f]+ [0-9a-f]+ 2\*\*.
15 CONTENTS, ALLOC, LOAD, READONLY, DATA
16#record: PCC_LAST_SIZE PCC_LAST_START
17#...
18 *[0-9]+ \.got\.plt +([0-9a-f]+) ([0-9a-f]+) [0-9a-f]+ [0-9a-f]+ 2\*\*.
19 CONTENTS, ALLOC, LOAD, DATA
20#...
21SYMBOL TABLE:
22#record: RELA_IPLT_END
23#...
24([0-9a-f]+) l \.rela\.plt 0000000000000000 __rela_iplt_end
25#record: RELA_IPLT_START
26([0-9a-f]+) l \.rela\.plt 0000000000000000 __rela_iplt_start
27#record: RELA_DYN_END
28([0-9a-f]+) l O \.rela\.dyn 0000000000000000 __rela_dyn_end
29#record: RELA_DYN_START
30([0-9a-f]+) l O \.rela\.dyn 0000000000000000 __rela_dyn_start
31#...
32
33Disassembly of section \.rela\.dyn:
34
35#check: RELA_START format %016x 0x$RELA_DYN_START
36RELA_START <__rela_dyn_start>:
37# __rela_iplt_end and __rela_iplt_start relocations.
38# These were just added in order to get the symbols in the output binary.
39# There is nothing we want to check around them.
40 *[0-9a-f]+: ........ .*
41 *[0-9a-f]+: ........ .*
42 *[0-9a-f]+: ........ .*
43 *[0-9a-f]+: ........ .*
44 *[0-9a-f]+: ........ .*
45 *[0-9a-f]+: ........ .*
46 *[0-9a-f]+: ........ .*
47 *[0-9a-f]+: ........ .*
48 *[0-9a-f]+: ........ .*
49 *[0-9a-f]+: ........ .*
50 *[0-9a-f]+: ........ .*
51#check: RELA_DYN_LAST format %x [expr "0x$RELA_DYN_END - 0x4"]
52 *RELA_DYN_LAST: 00000000 .*
53
54Disassembly of section \.rela\.plt:
55
56[0-9a-f]+ <__rela_iplt_start>:
57#record: PLTGOT_LOC
58 +[0-9a-f]+: ([0-9a-f]+) .*
59 +[0-9a-f]+: 00000000 .*
60 +[0-9a-f]+: 0000e804 .*
61 +[0-9a-f]+: 00000000 .*
62#record: IREL_ADDEND
63 +[0-9a-f]+: ([0-9a-f]+) .*
64 +[0-9a-f]+: 00000000 .*
65#record: CHERICAP_A_LOC
66 *[0-9a-f]+: ([0-9a-f]+) .*
67 *[0-9a-f]+: 00000000 .*
68 *[0-9a-f]+: 0000e804 .*
69 *[0-9a-f]+: 00000000 .*
70#check: CCAP_ADDEND string tolower $IREL_ADDEND
71 *[0-9a-f]+: CCAP_ADDEND .*
72 *[0-9a-f]+: 00000000 .*
73#record: CHERICAP_B_LOC
74 *[0-9a-f]+: ([0-9a-f]+) .*
75 *[0-9a-f]+: 00000000 .*
76 *[0-9a-f]+: 0000e804 .*
77 *[0-9a-f]+: 00000000 .*
78 *[0-9a-f]+: CCAP_ADDEND .*
79 *[0-9a-f]+: 00000000 .*
80#record: CHERICAP_C_LOC
81 *[0-9a-f]+: ([0-9a-f]+) .*
82 *[0-9a-f]+: 00000000 .*
83 *[0-9a-f]+: 0000e804 .*
84 *[0-9a-f]+: 00000000 .*
85 *[0-9a-f]+: CCAP_ADDEND .*
86#check: RELA_IPLT_LAST format %x [expr "0x$RELA_IPLT_END - 0x4"]
87 *RELA_IPLT_LAST: 00000000 .*
88
89Disassembly of section \.plt:
90
91#check: PLTGOT_PAGE format %x [expr "0x$PLTGOT_LOC & (~0xfff)"]
92#check: PLTGOT_DEC_OFF expr "0x$PLTGOT_LOC & 0xfff"
93[0-9a-f]+ <\.plt>:
94#record: PLTADDR
95 *([0-9a-f]+): .* adrp c16, PLTGOT_PAGE .*
96 *[0-9a-f]+: .* ldr c17, \[c16, #PLTGOT_DEC_OFF\]
97 *[0-9a-f]+: .* add c16, c16, #0x.*
98 *[0-9a-f]+: .* br c17
99
100Disassembly of section \.text:
101
102[0-9a-f]+ <foo_1>:
103#...
104
105[0-9a-f]+ <foo_2>:
106#...
107
108#check: FOO_ADDR format %016x [expr "0x$PCC_START + (0x$IREL_ADDEND & ~1)"]
109FOO_ADDR <foo>:
110 *[0-9a-f]+: .* mov x1, #0x2a // #42
111 *[0-9a-f]+: .* tst x0, x1
112 *[0-9a-f]+: .* b\.ne .* <foo\+0x18> // b\.any
113 *[0-9a-f]+: .* adrp c0, .*
114 *[0-9a-f]+: .* add c0, c0, .*
115 *[0-9a-f]+: .* ret c30
116 *[0-9a-f]+: .* adrp c0, .*
117 *[0-9a-f]+: .* add c0, .*
118 *[0-9a-f]+: .* b .* <foo\+0x14>
119
120#check: GOT_PAGE format %x [expr "0x$PLTGOT_LOC & (~0xfff)"]
121#check: GOT_DEC_OFF expr "0x$PLTGOT_LOC & 0xfff"
122#check: PLT_LOC string tolower $PLTADDR
123[0-9a-f]+ <_start>:
124 *[0-9a-f]+: .* bl PLT_LOC .*
125 *[0-9a-f]+: .* adrp c0, GOT_PAGE .*
126 *[0-9a-f]+: .* ldr c0, \[c0, #GOT_DEC_OFF\]
127 *[0-9a-f]+: .* ret c30
128
129Disassembly of section \.got:
130
131[0-9a-f]+ <.*>:
132 *[0-9a-f]+: 00000000 .*
133 *[0-9a-f]+: 00000000 .*
134 *[0-9a-f]+: 00000000 .*
135 *[0-9a-f]+: 00000000 .*
136
137Disassembly of section \.got\.plt:
138
139#check: FRAGBASE format %08x 0x$PCC_START
140#check: FRAGSIZE format %08x [expr "0x$PCC_LAST_SIZE + 0x$PCC_LAST_START - 0x$PCC_START"]
141#check: PLTGOT_ADDR format %x 0x$PLTGOT_LOC
142[0-9a-f]+ <.*>:
143 *[0-9a-f]+: 00000000 .*
144 *[0-9a-f]+: 00000000 .*
145 *[0-9a-f]+: 00000000 .*
146 *[0-9a-f]+: 00000000 .*
147 *[0-9a-f]+: 00000000 .*
148 *[0-9a-f]+: 00000000 .*
149 *[0-9a-f]+: 00000000 .*
150 *[0-9a-f]+: 00000000 .*
151 *[0-9a-f]+: 00000000 .*
152 *[0-9a-f]+: 00000000 .*
153 *[0-9a-f]+: 00000000 .*
154 *[0-9a-f]+: 00000000 .*
155 *PLTGOT_ADDR: FRAGBASE .*
156 *[0-9a-f]+: 00000000 .*
157 *[0-9a-f]+: FRAGSIZE .*
158 *[0-9a-f]+: 04000000 .*
159#...
160Disassembly of section \.data:
161#pass