[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  Christian Biesinger  <cbiesinger@google.com>

	* opintl.h: Fix spelling error (seperate).

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add {vex} pseudo prefix.
	* i386-tbl.h: Regenerated.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	(neon_opcodes): Likewise.
	(select_arm_features): Make sure we enable MVE bits when selecting
	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
	any architecture.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl: Drop stale comment from XOP section.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	(extractps): Add VexWIG to SSE2AVX forms.
	* i386-tbl.h: Re-generate.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	Size64 from and use VexW1 on SSE2AVX forms.
	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	* i386-tbl.h: Re-generate.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_version): Make unsigned long.
	(optab, optab_special, registernames): New file scope vars.
	(tic4x_print_register): Set up registernames rather than
	malloc'd registertable.
	(tic4x_disassemble): Delete optable and optable_special.  Use
	optab and optab_special instead.  Throw away old optab,
	optab_special and registernames when info->mach changes.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* z80-dis.c (suffix): Use .db instruction to generate double
	prefix.

2020-01-14  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
	values to unsigned before shifting.

2020-01-13  Thomas Troeger  <tstroege@gmx.de>

	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	flow instructions.
	(print_insn_thumb16, print_insn_thumb32): Likewise.
	(print_insn): Initialize the insn info.
	* i386-dis.c (print_insn): Initialize the insn info fields, and
	detect jumps.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

	* arc-opc.c (C_NE): Make it required.

2012-01-13  Claudiu Zissulescu <claziss@gmail.com>

        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	reserved register name.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
	result of wasm_read_leb128 in a uint64_t and check that bits
	are not lost when copying to other locals.  Use uint32_t for
	most locals.  Use PRId64 when printing int64_t.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c: Formatting.
	* score7-dis.c: Formatting.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* score-dis.c (print_insn_score48): Use unsigned variables for
	unsigned values.  Don't left shift negative values.
	(print_insn_score32): Likewise.
	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* tic4x-dis.c (tic4x_print_register): Remove dead code.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* fr30-ibld.c: Regenerate.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* xgate-dis.c (print_insn): Don't left shift signed value.
	(ripBits): Formatting, use 1u.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	and XRREG value earlier to avoid a shift with negative exponent.
	* m10200-dis.c (disassemble): Similarly.

2020-01-09  Nick Clifton  <nickc@redhat.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use correct cast.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* z80-dis.c (ld_ii_ii): Use character constant when checking
	opcode byte value.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* i386-dis.c (SEP_Fixup): New.
	(SEP): Define.
	(dis386_twobyte): Use it for sysenter/sysexit.
	(enum x86_64_isa): Change amd64 enumerator to value 1.
	(OP_J): Compare isa64 against intel64 instead of amd64.
	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	forms.
	* i386-tbl.h: Re-generate.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* z8k-dis.c: Include libiberty.h
	(instr_data_s): Make max_fetched unsigned.
	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	Don't exceed byte_info bounds.
	(output_instr): Make num_bytes unsigned.
	(unpack_instr): Likewise for nibl_count and loop.
	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	idx unsigned.
	* z8k-opc.h: Regenerate.

2020-01-07  Shahab Vahedi  <shahab@synopsys.com>

	* arc-tbl.h (llock): Use 'LLOCK' as class.
	(llockd): Likewise.
	(scond): Use 'SCOND' as class.
	(scondd): Likewise.
	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	(scondd): Likewise.

2020-01-06  Alan Modra  <amodra@gmail.com>

	* m32c-ibld.c: Regenerate.

2020-01-06  Alan Modra  <amodra@gmail.com>

	PR 25344
	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	Peek at next byte to prevent recursion on repeated prefix bytes.
	Ensure uninitialised "mybuf" is not accessed.
	(print_insn_z80): Don't zero n_fetch and n_used here,..
	(print_insn_z80_buf): ..do it here instead.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* m32r-ibld.c: Regenerate.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* crx-dis.c (match_opcode): Avoid shift left of signed value.

2020-01-04  Alan Modra  <amodra@gmail.com>

	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Use
	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
	forms of SUDOT and USDOT.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
	uzip{1,2}.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
	FMMLA encoding.
	* opcodes/aarch64-dis-2.c: Re-generate.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* z80-dis.c: Add support for eZ80 and Z80 instructions.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019
\f
Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.

Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
ae774686 NC	1	2020-01-18 Nick Clifton <nickc@redhat.com>
	2
	3	Binutils 2.34 branch created.
	4
07f1f3aa CB	5	2020-01-17 Christian Biesinger <cbiesinger@google.com>
	6
	7	* opintl.h: Fix spelling error (seperate).
	8
42e04b36 L	9	2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
	10
	11	* i386-opc.tbl: Add {vex} pseudo prefix.
	12	* i386-tbl.h: Regenerated.
	13
2da2eaf4 AV	14	2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
	15
	16	PR 25376
	17	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
	18	(neon_opcodes): Likewise.
	19	(select_arm_features): Make sure we enable MVE bits when selecting
	20	armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
	21	any architecture.
	22
d0849eed JB	23	2020-01-16 Jan Beulich <jbeulich@suse.com>
	24
	25	* i386-opc.tbl: Drop stale comment from XOP section.
	26
9cf70a44 JB	27	2020-01-16 Jan Beulich <jbeulich@suse.com>
	28
	29	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
	30	(extractps): Add VexWIG to SSE2AVX forms.
	31	* i386-tbl.h: Re-generate.
	32
4814632e JB	33	2020-01-16 Jan Beulich <jbeulich@suse.com>
	34
	35	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
	36	Size64 from and use VexW1 on SSE2AVX forms.
	37	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
	38	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
	39	* i386-tbl.h: Re-generate.
	40
aad09917 AM	41	2020-01-15 Alan Modra <amodra@gmail.com>
	42
	43	* tic4x-dis.c (tic4x_version): Make unsigned long.
	44	(optab, optab_special, registernames): New file scope vars.
	45	(tic4x_print_register): Set up registernames rather than
	46	malloc'd registertable.
	47	(tic4x_disassemble): Delete optable and optable_special. Use
	48	optab and optab_special instead. Throw away old optab,
	49	optab_special and registernames when info->mach changes.
	50
7a6bf3be SB	51	2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
	52
	53	PR 25377
	54	* z80-dis.c (suffix): Use .db instruction to generate double
	55	prefix.
	56
ca1eaac0 AM	57	2020-01-14 Alan Modra <amodra@gmail.com>
	58
	59	* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
	60	values to unsigned before shifting.
	61
1d67fe3b TT	62	2020-01-13 Thomas Troeger <tstroege@gmx.de>
	63
	64	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
	65	flow instructions.
	66	(print_insn_thumb16, print_insn_thumb32): Likewise.
	67	(print_insn): Initialize the insn info.
	68	* i386-dis.c (print_insn): Initialize the insn info fields, and
	69	detect jumps.
	70
5e4f7e05 CZ	71	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	72
	73	* arc-opc.c (C_NE): Make it required.
	74
b9fe6b8a CZ	75	2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
	76
	77	* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
	78	reserved register name.
	79
90dee485 AM	80	2020-01-13 Alan Modra <amodra@gmail.com>
	81
	82	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
	83	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
	84
febda64f AM	85	2020-01-13 Alan Modra <amodra@gmail.com>
	86
	87	* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
	88	result of wasm_read_leb128 in a uint64_t and check that bits
	89	are not lost when copying to other locals. Use uint32_t for
	90	most locals. Use PRId64 when printing int64_t.
	91
df08b588 AM	92	2020-01-13 Alan Modra <amodra@gmail.com>
	93
	94	* score-dis.c: Formatting.
	95	* score7-dis.c: Formatting.
	96
b2c759ce AM	97	2020-01-13 Alan Modra <amodra@gmail.com>
	98
	99	* score-dis.c (print_insn_score48): Use unsigned variables for
	100	unsigned values. Don't left shift negative values.
	101	(print_insn_score32): Likewise.
	102	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
	103
5496abe1 AM	104	2020-01-13 Alan Modra <amodra@gmail.com>
	105
	106	* tic4x-dis.c (tic4x_print_register): Remove dead code.
	107
202e762b AM	108	2020-01-13 Alan Modra <amodra@gmail.com>
	109
	110	* fr30-ibld.c: Regenerate.
	111
7ef412cf AM	112	2020-01-13 Alan Modra <amodra@gmail.com>
	113
	114	* xgate-dis.c (print_insn): Don't left shift signed value.
	115	(ripBits): Formatting, use 1u.
	116
7f578b95 AM	117	2020-01-10 Alan Modra <amodra@gmail.com>
	118
	119	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
	120	* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
	121
441af85b AM	122	2020-01-10 Alan Modra <amodra@gmail.com>
	123
	124	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
	125	and XRREG value earlier to avoid a shift with negative exponent.
	126	* m10200-dis.c (disassemble): Similarly.
	127
bce58db4 NC	128	2020-01-09 Nick Clifton <nickc@redhat.com>
	129
	130	PR 25224
	131	* z80-dis.c (ld_ii_ii): Use correct cast.
	132
40c75bc8 SB	133	2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
	134
	135	PR 25224
	136	* z80-dis.c (ld_ii_ii): Use character constant when checking
	137	opcode byte value.
	138
d835a58b JB	139	2020-01-09 Jan Beulich <jbeulich@suse.com>
	140
	141	* i386-dis.c (SEP_Fixup): New.
	142	(SEP): Define.
	143	(dis386_twobyte): Use it for sysenter/sysexit.
	144	(enum x86_64_isa): Change amd64 enumerator to value 1.
	145	(OP_J): Compare isa64 against intel64 instead of amd64.
	146	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
	147	forms.
	148	* i386-tbl.h: Re-generate.
	149
030a2e78 AM	150	2020-01-08 Alan Modra <amodra@gmail.com>
	151
	152	* z8k-dis.c: Include libiberty.h
	153	(instr_data_s): Make max_fetched unsigned.
	154	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
	155	Don't exceed byte_info bounds.
	156	(output_instr): Make num_bytes unsigned.
	157	(unpack_instr): Likewise for nibl_count and loop.
	158	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
	159	idx unsigned.
	160	* z8k-opc.h: Regenerate.
	161
bb82aefe SV	162	2020-01-07 Shahab Vahedi <shahab@synopsys.com>
	163
	164	* arc-tbl.h (llock): Use 'LLOCK' as class.
	165	(llockd): Likewise.
	166	(scond): Use 'SCOND' as class.
	167	(scondd): Likewise.
	168	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
	169	(scondd): Likewise.
	170
cc6aa1a6 AM	171	2020-01-06 Alan Modra <amodra@gmail.com>
	172
	173	* m32c-ibld.c: Regenerate.
	174
660e62b1 AM	175	2020-01-06 Alan Modra <amodra@gmail.com>
	176
	177	PR 25344
	178	* z80-dis.c (suffix): Don't use a local struct buffer copy.
	179	Peek at next byte to prevent recursion on repeated prefix bytes.
	180	Ensure uninitialised "mybuf" is not accessed.
	181	(print_insn_z80): Don't zero n_fetch and n_used here,..
	182	(print_insn_z80_buf): ..do it here instead.
	183
c9ae58fe AM	184	2020-01-04 Alan Modra <amodra@gmail.com>
	185
	186	* m32r-ibld.c: Regenerate.
	187
5f57d4ec AM	188	2020-01-04 Alan Modra <amodra@gmail.com>
	189
	190	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
	191
2c5c1196 AM	192	2020-01-04 Alan Modra <amodra@gmail.com>
	193
	194	* crx-dis.c (match_opcode): Avoid shift left of signed value.
	195
2e98c6c5 AM	196	2020-01-04 Alan Modra <amodra@gmail.com>
	197
	198	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
	199
567dfba2 JB	200	2020-01-03 Jan Beulich <jbeulich@suse.com>
567dfba2 JB	201
5437a02a JB	202	* aarch64-tbl.h (aarch64_opcode_table): Use
	203	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
	204
	205	2020-01-03 Jan Beulich <jbeulich@suse.com>
	206
	207	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
567dfba2 JB	208	forms of SUDOT and USDOT.
567dfba2 JB	209
8c45011a JB	210	2020-01-03 Jan Beulich <jbeulich@suse.com>
8c45011a JB	211
5437a02a	212	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
8c45011a JB	213	uzip{1,2}.
	214	* opcodes/aarch64-dis-2.c: Re-generate.
	215
f4950f76 JB	216	2020-01-03 Jan Beulich <jbeulich@suse.com>
f4950f76 JB	217
5437a02a	218	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
f4950f76 JB	219	FMMLA encoding.
	220	* opcodes/aarch64-dis-2.c: Re-generate.
	221
6655dba2 SB	222	2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
	223
	224	* z80-dis.c: Add support for eZ80 and Z80 instructions.
	225
b14ce8bf AM	226	2020-01-01 Alan Modra <amodra@gmail.com>
	227
	228	Update year range in copyright notice of all files.
	229
0b114740	230	For older changes see ChangeLog-2019
3499769a	231	\f
0b114740	232	Copyright (C) 2020 Free Software Foundation, Inc.
3499769a AM	233
	234	Copying and distribution of this file, with or without modification,
	235	are permitted in any medium without royalty provided the copyright
	236	notice and this notice are preserved.
	237
	238	Local Variables:
	239	mode: change-log
	240	left-margin: 8
	241	fill-column: 74
	242	version-control: never
	243	End: