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sim: bfin: push down mmr address/size checks
[thirdparty/binutils-gdb.git] / sim / bfin / dv-bfin_eppi.c
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1/* Blackfin Enhanced Parallel Port Interface (EPPI) model
2 For "new style" PPIs on BF54x/etc... parts.
3
32d0add0 4 Copyright (C) 2010-2015 Free Software Foundation, Inc.
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5 Contributed by Analog Devices, Inc.
6
7 This file is part of simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "config.h"
23
24#include "sim-main.h"
25#include "devices.h"
26#include "dv-bfin_eppi.h"
27#include "gui.h"
28
29/* XXX: TX is merely a stub. */
30
31struct bfin_eppi
32{
33 /* This top portion matches common dv_bfin struct. */
34 bu32 base;
35 struct hw *dma_master;
36 bool acked;
37
38 struct hw_event *handler;
39 char saved_byte;
40 int saved_count;
41
42 /* GUI state. */
43 void *gui_state;
44 int color;
45
46 /* Order after here is important -- matches hardware MMR layout. */
47 bu16 BFIN_MMR_16(status);
48 bu16 BFIN_MMR_16(hcount);
49 bu16 BFIN_MMR_16(hdelay);
50 bu16 BFIN_MMR_16(vcount);
51 bu16 BFIN_MMR_16(vdelay);
52 bu16 BFIN_MMR_16(frame);
53 bu16 BFIN_MMR_16(line);
54 bu16 BFIN_MMR_16(clkdiv);
55 bu32 control, fs1w_hbl, fs1p_avpl, fsw2_lvb, fs2p_lavf, clip, err;
56};
57#define mmr_base() offsetof(struct bfin_eppi, status)
58#define mmr_offset(mmr) (offsetof(struct bfin_eppi, mmr) - mmr_base())
59
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60static const char * const mmr_names[] =
61{
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62 "EPPI_STATUS", "EPPI_HCOUNT", "EPPI_HDELAY", "EPPI_VCOUNT", "EPPI_VDELAY",
63 "EPPI_FRAME", "EPPI_LINE", "EPPI_CLKDIV", "EPPI_CONTROL", "EPPI_FS1W_HBL",
64 "EPPI_FS1P_AVPL", "EPPI_FS2W_LVB", "EPPI_FS2P_LAVF", "EPPI_CLIP", "EPPI_ERR",
65};
66#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
67
68static void
69bfin_eppi_gui_setup (struct bfin_eppi *eppi)
70{
71 /* If we are in RX mode, nothing to do. */
72 if (!(eppi->control & PORT_DIR))
73 return;
74
75 eppi->gui_state = bfin_gui_setup (eppi->gui_state,
76 eppi->control & PORT_EN,
77 eppi->hcount,
78 eppi->vcount,
79 eppi->color);
80}
81
82static unsigned
83bfin_eppi_io_write_buffer (struct hw *me, const void *source,
84 int space, address_word addr, unsigned nr_bytes)
85{
86 struct bfin_eppi *eppi = hw_data (me);
87 bu32 mmr_off;
88 bu32 value;
89 bu16 *value16p;
90 bu32 *value32p;
91 void *valuep;
92
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93 /* Invalid access mode is higher priority than missing register. */
94 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
95 return 0;
96
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97 if (nr_bytes == 4)
98 value = dv_load_4 (source);
99 else
100 value = dv_load_2 (source);
101
102 mmr_off = addr - eppi->base;
103 valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off);
104 value16p = valuep;
105 value32p = valuep;
106
107 HW_TRACE_WRITE ();
108
109 switch (mmr_off)
110 {
111 case mmr_offset(status):
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112 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
113 return 0;
9922f803 114 dv_w1c_2 (value16p, value, 0x1ff);
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115 break;
116 case mmr_offset(hcount):
117 case mmr_offset(hdelay):
118 case mmr_offset(vcount):
119 case mmr_offset(vdelay):
120 case mmr_offset(frame):
121 case mmr_offset(line):
122 case mmr_offset(clkdiv):
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123 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true))
124 return 0;
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125 *value16p = value;
126 break;
127 case mmr_offset(control):
128 *value32p = value;
129 bfin_eppi_gui_setup (eppi);
130 break;
131 case mmr_offset(fs1w_hbl):
132 case mmr_offset(fs1p_avpl):
133 case mmr_offset(fsw2_lvb):
134 case mmr_offset(fs2p_lavf):
135 case mmr_offset(clip):
136 case mmr_offset(err):
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137 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true))
138 return 0;
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139 *value32p = value;
140 break;
141 default:
142 dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
466b619e 143 return 0;
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144 }
145
146 return nr_bytes;
147}
148
149static unsigned
150bfin_eppi_io_read_buffer (struct hw *me, void *dest,
151 int space, address_word addr, unsigned nr_bytes)
152{
153 struct bfin_eppi *eppi = hw_data (me);
154 bu32 mmr_off;
155 bu16 *value16p;
156 bu32 *value32p;
157 void *valuep;
158
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159 /* Invalid access mode is higher priority than missing register. */
160 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true))
161 return 0;
162
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163 mmr_off = addr - eppi->base;
164 valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off);
165 value16p = valuep;
166 value32p = valuep;
167
168 HW_TRACE_READ ();
169
170 switch (mmr_off)
171 {
172 case mmr_offset(status):
173 case mmr_offset(hcount):
174 case mmr_offset(hdelay):
175 case mmr_offset(vcount):
176 case mmr_offset(vdelay):
177 case mmr_offset(frame):
178 case mmr_offset(line):
179 case mmr_offset(clkdiv):
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180 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false))
181 return 0;
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182 dv_store_2 (dest, *value16p);
183 break;
184 case mmr_offset(control):
185 case mmr_offset(fs1w_hbl):
186 case mmr_offset(fs1p_avpl):
187 case mmr_offset(fsw2_lvb):
188 case mmr_offset(fs2p_lavf):
189 case mmr_offset(clip):
190 case mmr_offset(err):
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191 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false))
192 return 0;
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193 dv_store_4 (dest, *value32p);
194 break;
195 default:
196 dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
466b619e 197 return 0;
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198 }
199
200 return nr_bytes;
201}
202
203static unsigned
204bfin_eppi_dma_read_buffer (struct hw *me, void *dest, int space,
205 unsigned_word addr, unsigned nr_bytes)
206{
207 HW_TRACE_DMA_READ ();
208 return 0;
209}
210
211static unsigned
212bfin_eppi_dma_write_buffer (struct hw *me, const void *source,
213 int space, unsigned_word addr,
214 unsigned nr_bytes,
215 int violate_read_only_section)
216{
217 struct bfin_eppi *eppi = hw_data (me);
218
219 HW_TRACE_DMA_WRITE ();
220
221 return bfin_gui_update (eppi->gui_state, source, nr_bytes);
222}
223
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224static const struct hw_port_descriptor bfin_eppi_ports[] =
225{
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226 { "stat", 0, 0, output_port, },
227 { NULL, 0, 0, 0, },
228};
229
230static void
231attach_bfin_eppi_regs (struct hw *me, struct bfin_eppi *eppi)
232{
233 address_word attach_address;
234 int attach_space;
235 unsigned attach_size;
236 reg_property_spec reg;
237
238 if (hw_find_property (me, "reg") == NULL)
239 hw_abort (me, "Missing \"reg\" property");
240
241 if (!hw_find_reg_array_property (me, "reg", 0, &reg))
242 hw_abort (me, "\"reg\" property must contain three addr/size entries");
243
244 hw_unit_address_to_attach_address (hw_parent (me),
245 &reg.address,
246 &attach_space, &attach_address, me);
247 hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
248
249 if (attach_size != BFIN_MMR_EPPI_SIZE)
250 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EPPI_SIZE);
251
252 hw_attach_address (hw_parent (me),
253 0, attach_space, attach_address, attach_size, me);
254
255 eppi->base = attach_address;
256}
257
258static void
259bfin_eppi_finish (struct hw *me)
260{
261 struct bfin_eppi *eppi;
262 const char *color;
263
264 eppi = HW_ZALLOC (me, struct bfin_eppi);
265
266 set_hw_data (me, eppi);
267 set_hw_io_read_buffer (me, bfin_eppi_io_read_buffer);
268 set_hw_io_write_buffer (me, bfin_eppi_io_write_buffer);
269 set_hw_dma_read_buffer (me, bfin_eppi_dma_read_buffer);
270 set_hw_dma_write_buffer (me, bfin_eppi_dma_write_buffer);
271 set_hw_ports (me, bfin_eppi_ports);
272
273 attach_bfin_eppi_regs (me, eppi);
274
275 /* Initialize the EPPI. */
276 if (hw_find_property (me, "color"))
277 color = hw_find_string_property (me, "color");
278 else
279 color = NULL;
280 eppi->color = bfin_gui_color (color);
281}
282
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283const struct hw_descriptor dv_bfin_eppi_descriptor[] =
284{
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285 {"bfin_eppi", bfin_eppi_finish,},
286 {NULL, NULL},
287};