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1 | # Makefile template for Configure for the frv simulator |
2 | # Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc. | |
3 | # Contributed by Red Hat. | |
4 | # | |
5 | # This program is free software; you can redistribute it and/or modify | |
6 | # it under the terms of the GNU General Public License as published by | |
7 | # the Free Software Foundation; either version 2 of the License, or | |
8 | # (at your option) any later version. | |
9 | # | |
10 | # This program is distributed in the hope that it will be useful, | |
11 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | # GNU General Public License for more details. | |
14 | # | |
15 | # You should have received a copy of the GNU General Public License along | |
16 | # with this program; if not, write to the Free Software Foundation, Inc., | |
17 | # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | ## COMMON_PRE_CONFIG_FRAG | |
20 | ||
21 | FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o | |
22 | ||
23 | CONFIG_DEVICES = dv-sockser.o | |
24 | CONFIG_DEVICES = | |
25 | ||
26 | SIM_OBJS = \ | |
27 | $(SIM_NEW_COMMON_OBJS) \ | |
28 | sim-cpu.o \ | |
29 | sim-hload.o \ | |
30 | sim-hrw.o \ | |
31 | sim-model.o \ | |
32 | sim-reg.o \ | |
33 | cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \ | |
34 | cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ | |
35 | sim-if.o arch.o \ | |
36 | $(FRV_OBJS) \ | |
37 | traps.o interrupts.o memory.o cache.o pipeline.o \ | |
38 | profile.o profile-fr400.o profile-fr500.o options.o \ | |
39 | devices.o reset.o registers.o \ | |
40 | $(CONFIG_DEVICES) | |
41 | ||
42 | # Extra headers included by sim-main.h. | |
43 | SIM_EXTRA_DEPS = \ | |
44 | $(CGEN_INCLUDE_DEPS) \ | |
45 | arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \ | |
46 | registers.h profile.h \ | |
47 | $(sim-options_h) | |
48 | ||
49 | SIM_EXTRA_CFLAGS = @sim_trapdump@ | |
50 | ||
51 | SIM_RUN_OBJS = nrun.o | |
52 | SIM_EXTRA_CLEAN = frv-clean | |
53 | ||
54 | # This selects the frv newlib/libgloss syscall definitions. | |
55 | NL_TARGET = -DNL_TARGET_frv | |
56 | ||
57 | ## COMMON_POST_CONFIG_FRAG | |
58 | ||
59 | arch = frv | |
60 | ||
61 | arch.o: arch.c $(SIM_MAIN_DEPS) | |
62 | ||
63 | devices.o: devices.c $(SIM_MAIN_DEPS) | |
64 | ||
65 | # FRV objs | |
66 | ||
67 | FRVBF_INCLUDE_DEPS = \ | |
68 | $(CGEN_MAIN_CPU_DEPS) \ | |
69 | $(SIM_EXTRA_DEPS) \ | |
70 | cpu.h decode.h eng.h | |
71 | ||
72 | frv.o: frv.c $(FRVBF_INCLUDE_DEPS) | |
73 | traps.o: traps.c $(FRVBF_INCLUDE_DEPS) | |
74 | pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS) | |
75 | interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS) | |
76 | memory.o: memory.c $(FRVBF_INCLUDE_DEPS) | |
77 | cache.o: cache.c $(FRVBF_INCLUDE_DEPS) | |
78 | options.o: options.c $(FRVBF_INCLUDE_DEPS) | |
79 | reset.o: reset.c $(FRVBF_INCLUDE_DEPS) | |
80 | registers.o: registers.c $(FRVBF_INCLUDE_DEPS) | |
81 | profile.o: profile.c profile-fr400.h profile-fr500.h $(FRVBF_INCLUDE_DEPS) | |
82 | profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS) | |
83 | profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS) | |
84 | sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h | |
85 | ||
86 | ||
87 | # FIXME: Use of `mono' is wip. | |
88 | mloop.c eng.h: stamp-mloop | |
89 | stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile | |
90 | $(SHELL) $(srccom)/genmloop.sh \ | |
91 | -mono -scache -parallel-generic-write -parallel-only \ | |
92 | -cpu frvbf -infile $(srcdir)/mloop.in | |
93 | $(SHELL) $(srcroot)/move-if-change eng.hin eng.h | |
94 | $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c | |
95 | touch stamp-mloop | |
96 | mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS) | |
97 | ||
98 | cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS) | |
99 | decode.o: decode.c $(FRVBF_INCLUDE_DEPS) | |
100 | sem.o: sem.c $(FRVBF_INCLUDE_DEPS) | |
101 | model.o: model.c $(FRVBF_INCLUDE_DEPS) | |
102 | ||
103 | frv-clean: | |
104 | rm -f mloop.c eng.h stamp-mloop | |
105 | rm -f tmp-* | |
106 | rm -f stamp-arch stamp-cpu | |
107 | ||
108 | # cgen support, enable with --enable-cgen-maint | |
109 | CGEN_MAINT = ; @true | |
110 | # The following line is commented in or out depending upon --enable-cgen-maint. | |
111 | @CGEN_MAINT@CGEN_MAINT = | |
112 | ||
113 | stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu | |
114 | cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu | |
115 | $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ | |
116 | FLAGS="with-scache" | |
117 | rm -f $(CGEN_CPU_DIR)/frv.cpu | |
118 | touch stamp-arch | |
119 | arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch | |
120 | # @true | |
121 | ||
122 | # .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so | |
123 | # copy those file to the regular place. | |
124 | stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu | |
125 | cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu | |
126 | $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ | |
127 | cpu=frvbf mach=frv,fr500,fr400,tomcat,simple SUFFIX= \ | |
128 | FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \ | |
129 | EXTRAFILES="$(CGEN_CPU_SEM)" | |
130 | rm -f $(CGEN_CPU_DIR)/frv.cpu | |
131 | touch stamp-cpu | |
132 | cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu | |
133 | # @true |