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Commit | Line | Data |
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c906108c | 1 | dnl Process this file with autoconf to produce a configure script. |
c906108c | 2 | AC_INIT(Makefile.in) |
760b3e8b | 3 | AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config]) |
c906108c | 4 | |
6ffe910a | 5 | SIM_AC_COMMON |
35695fd6 | 6 | |
c906108c | 7 | dnl Options available in this module |
bf470982 | 8 | SIM_AC_OPTION_WARNINGS(no) |
e6c674b8 | 9 | SIM_AC_OPTION_RESERVED_BITS(1) |
c906108c SS |
10 | |
11 | # DEPRECATED | |
12 | # | |
13 | # Instead of defining a `subtarget' macro, code should be checking | |
14 | # the value of {STATE,CPU}_ARCHITECTURE to identify the architecture | |
15 | # in question. | |
16 | # | |
17 | case "${target}" in | |
4c54fc26 | 18 | mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;; |
c906108c | 19 | mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; |
109ad085 | 20 | mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
cc220243 | 21 | mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
1e799e28 CD |
22 | mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; |
23 | mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; | |
c906108c SS |
24 | *) SIM_SUBTARGET="";; |
25 | esac | |
26 | AC_SUBST(SIM_SUBTARGET) | |
27 | ||
28 | ||
29 | ||
c906108c SS |
30 | # |
31 | # Select the bitsize of the target | |
32 | # | |
33 | mips_addr_bitsize= | |
34 | case "${target}" in | |
4b5d35ee | 35 | mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
cc220243 | 36 | mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;; |
c906108c SS |
37 | mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; |
38 | mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
1e799e28 CD |
39 | mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
40 | mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; | |
c906108c SS |
41 | mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; |
42 | *) mips_bitsize=64 ; mips_msb=63 ;; | |
43 | esac | |
44 | SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) | |
45 | ||
46 | ||
47 | ||
48 | # | |
49 | # Select the floating hardware support of the target | |
50 | # | |
51 | mips_fpu=HARDWARE_FLOATING_POINT | |
52 | mips_fpu_bitsize= | |
53 | case "${target}" in | |
4b5d35ee TS |
54 | mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
55 | mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
cc220243 | 56 | mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
c906108c SS |
57 | mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; |
58 | mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; | |
1e799e28 CD |
59 | mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; |
60 | mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; | |
c906108c SS |
61 | mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; |
62 | *) mips_fpu=HARD_FLOATING_POINT ;; | |
63 | esac | |
64 | SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) | |
65 | ||
66 | ||
67 | ||
c906108c SS |
68 | # |
69 | # Select the IGEN architecture | |
70 | # | |
71 | sim_gen=IGEN | |
72 | sim_igen_machine="-M mipsIV" | |
139181c8 | 73 | sim_m16_machine="-M mips16,mipsIII" |
c906108c SS |
74 | sim_igen_filter="32,64,f" |
75 | sim_m16_filter="16" | |
4c54fc26 CD |
76 | sim_mach_default="mips8000" |
77 | ||
c906108c SS |
78 | case "${target}" in |
79 | mips*tx39*) sim_gen=IGEN | |
80 | sim_igen_filter="32,f" | |
81 | sim_igen_machine="-M r3900" | |
82 | ;; | |
83 | mips64vr43*-*-*) sim_gen=IGEN | |
84 | sim_igen_machine="-M mipsIV" | |
4c54fc26 | 85 | sim_mach_default="mips8000" |
c906108c SS |
86 | ;; |
87 | mips64vr5*-*-*) sim_gen=IGEN | |
88 | sim_igen_machine="-M vr5000" | |
4c54fc26 | 89 | sim_mach_default="mips5000" |
c906108c SS |
90 | ;; |
91 | mips64vr41*) sim_gen=M16 | |
92 | sim_igen_machine="-M vr4100" | |
93 | sim_m16_machine="-M vr4100" | |
94 | sim_igen_filter="32,64,f" | |
95 | sim_m16_filter="16" | |
4c54fc26 | 96 | sim_mach_default="mips4100" |
c906108c | 97 | ;; |
4c54fc26 CD |
98 | mips64vr-*-* | mips64vrel-*-*) |
99 | sim_gen=MULTI | |
100 | sim_multi_configs="\ | |
101 | vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\ | |
102 | vr4120:mipsIII,mips16,vr4120:32,64:mips4120\ | |
103 | vr5000:mipsIV:32,64,f:mips4300,mips5000\ | |
104 | vr5400:mipsIV,vr5400:32,64,f:mips5400\ | |
105 | vr5500:mipsIV,vr5500:32,64,f:mips5500" | |
106 | sim_multi_default=mips5000 | |
107 | ;; | |
cc220243 | 108 | mips*-sde-elf* | mips*-mti-elf*) |
8e394ffc AB |
109 | sim_gen=MULTI |
110 | sim_multi_configs="\ | |
111 | micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\ | |
112 | mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2" | |
113 | sim_multi_default=mipsisa64r2 | |
3669427c | 114 | ;; |
c906108c SS |
115 | mips64*-*-*) sim_igen_filter="32,64,f" |
116 | sim_gen=IGEN | |
117 | ;; | |
118 | mips16*-*-*) sim_gen=M16 | |
119 | sim_igen_filter="32,64,f" | |
120 | sim_m16_filter="16" | |
121 | ;; | |
8e394ffc AB |
122 | mipsisa32r2*-*-*) sim_gen=MULTI |
123 | sim_multi_configs="\ | |
124 | micromips:micromips32,micromipsdsp:32,f:mips_micromips\ | |
125 | mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2" | |
126 | sim_multi_default=mipsisa32r2 | |
e70cb6cd | 127 | ;; |
d5fb0879 RS |
128 | mipsisa32*-*-*) sim_gen=M16 |
129 | sim_igen_machine="-M mips32,mips16,mips16e,smartmips" | |
130 | sim_m16_machine="-M mips16,mips16e,mips32" | |
131 | sim_igen_filter="32,f" | |
132 | sim_mach_default="mipsisa32" | |
1e799e28 | 133 | ;; |
d5fb0879 RS |
134 | mipsisa64r2*-*-*) sim_gen=M16 |
135 | sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2" | |
136 | sim_m16_machine="-M mips16,mips16e,mips64r2" | |
137 | sim_igen_filter="32,64,f" | |
138 | sim_mach_default="mipsisa64r2" | |
e70cb6cd | 139 | ;; |
7cbea089 | 140 | mipsisa64sb1*-*-*) sim_gen=IGEN |
109ad085 | 141 | sim_igen_machine="-M mips64,mips3d,sb1" |
7cbea089 | 142 | sim_igen_filter="32,64,f" |
4c54fc26 | 143 | sim_mach_default="mips_sb1" |
7cbea089 | 144 | ;; |
d5fb0879 RS |
145 | mipsisa64*-*-*) sim_gen=M16 |
146 | sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx" | |
147 | sim_m16_machine="-M mips16,mips16e,mips64" | |
148 | sim_igen_filter="32,64,f" | |
149 | sim_mach_default="mipsisa64" | |
1e799e28 | 150 | ;; |
109ad085 | 151 | mips*lsi*) sim_gen=M16 |
c906108c SS |
152 | sim_igen_machine="-M mipsIII,mips16" |
153 | sim_m16_machine="-M mips16,mipsIII" | |
154 | sim_igen_filter="32,f" | |
155 | sim_m16_filter="16" | |
4c54fc26 | 156 | sim_mach_default="mips4000" |
109ad085 | 157 | ;; |
c906108c SS |
158 | mips*-*-*) sim_gen=IGEN |
159 | sim_igen_filter="32,f" | |
160 | ;; | |
161 | esac | |
4c54fc26 CD |
162 | |
163 | # The MULTI generator can combine several simulation engines into one. | |
164 | # executable. A configuration which uses the MULTI should set two | |
165 | # variables: ${sim_multi_configs} and ${sim_multi_default}. | |
166 | # | |
167 | # ${sim_multi_configs} is the list of engines to build. Each | |
168 | # space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS, | |
169 | # where: | |
170 | # | |
171 | # - NAME is a C-compatible prefix for the engine, | |
172 | # - MACHINE is a -M argument, | |
173 | # - FILTER is a -F argument, and | |
174 | # - BFDMACHS is a comma-separated list of bfd machines that the | |
175 | # simulator can run. | |
176 | # | |
177 | # Each entry will have a separate simulation engine whose prefix is | |
178 | # m32<NAME>. If the machine list includes "mips16", there will also | |
179 | # be a mips16 engine, prefix m16<NAME>. The mips16 engine will be | |
180 | # generated using the same machine list as the 32-bit version, | |
181 | # but the filter will be "16" instead of FILTER. | |
182 | # | |
183 | # The simulator compares the bfd mach against BFDMACHS to decide | |
184 | # which engine to use. Entries in BFDMACHS should be bfd_mach | |
185 | # values with "bfd_mach_" removed. ${sim_multi_default} says | |
186 | # which entry should be the default. | |
187 | if test ${sim_gen} = MULTI; then | |
188 | ||
189 | # Simple sanity check. | |
190 | if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then | |
306f4178 | 191 | AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly) |
4c54fc26 CD |
192 | fi |
193 | ||
194 | # Start in a known state. | |
195 | rm -f multi-include.h multi-run.c | |
196 | sim_multi_flags= | |
197 | sim_multi_src= | |
8e394ffc | 198 | sim_multi_obj= |
4c54fc26 CD |
199 | sim_multi_igen_configs= |
200 | sim_seen_default=no | |
201 | ||
202 | cat << __EOF__ > multi-run.c | |
203 | /* Main entry point for MULTI simulators. | |
3666a048 | 204 | Copyright (C) 2003-2021 Free Software Foundation, Inc. |
4c54fc26 CD |
205 | |
206 | This program is free software; you can redistribute it and/or modify | |
207 | it under the terms of the GNU General Public License as published by | |
35ee6e1e | 208 | the Free Software Foundation; either version 3 of the License, or |
4c54fc26 CD |
209 | (at your option) any later version. |
210 | ||
211 | This program is distributed in the hope that it will be useful, | |
212 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
213 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
214 | GNU General Public License for more details. | |
215 | ||
216 | You should have received a copy of the GNU General Public License | |
35ee6e1e | 217 | along with this program. If not, see <http://www.gnu.org/licenses/>. |
4c54fc26 CD |
218 | |
219 | -- | |
220 | ||
221 | This file was generated by sim/mips/configure. */ | |
222 | ||
223 | #include "sim-main.h" | |
224 | #include "multi-include.h" | |
8e394ffc AB |
225 | #include "elf-bfd.h" |
226 | #include "elf/mips.h" | |
4c54fc26 CD |
227 | |
228 | #define SD sd | |
229 | #define CPU cpu | |
230 | ||
231 | void | |
232 | sim_engine_run (SIM_DESC sd, | |
233 | int next_cpu_nr, | |
234 | int nr_cpus, | |
235 | int signal) /* ignore */ | |
236 | { | |
237 | int mach; | |
238 | ||
239 | if (STATE_ARCHITECTURE (sd) == NULL) | |
240 | mach = bfd_mach_${sim_multi_default}; | |
1554f758 | 241 | else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags |
8e394ffc AB |
242 | & EF_MIPS_ARCH_ASE_MICROMIPS) |
243 | mach = bfd_mach_mips_micromips; | |
4c54fc26 CD |
244 | else |
245 | mach = STATE_ARCHITECTURE (SD)->mach; | |
246 | ||
247 | switch (mach) | |
248 | { | |
249 | __EOF__ | |
250 | ||
251 | for fc in ${sim_multi_configs}; do | |
252 | ||
253 | # Split up the entry. ${c} contains the first three elements. | |
254 | # Note: outer sqaure brackets are m4 quotes. | |
255 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
256 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
257 | name=`echo ${c} | sed 's/:.*//'` | |
258 | machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'` | |
259 | filter=`echo ${c} | sed 's/.*://'` | |
260 | ||
261 | # Build the following lists: | |
262 | # | |
263 | # sim_multi_flags: all -M and -F flags used by the simulator | |
264 | # sim_multi_src: all makefile-generated source files | |
265 | # sim_multi_obj: the objects for ${sim_multi_src} | |
266 | # sim_multi_igen_configs: igen configuration strings. | |
267 | # | |
268 | # Each entry in ${sim_multi_igen_configs} is a prefix (m32 | |
269 | # or m16) followed by the NAME, MACHINE and FILTER part of | |
270 | # the ${sim_multi_configs} entry. | |
271 | sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}" | |
272 | ||
8e394ffc | 273 | # Check whether special handling is needed. |
4c54fc26 CD |
274 | case ${c} in |
275 | *:*mips16*:*) | |
276 | # Run igen twice, once for normal mode and once for mips16. | |
277 | ws="m32 m16" | |
278 | ||
279 | # The top-level function for the mips16 simulator is | |
280 | # in a file m16${name}_run.c, generated by the | |
281 | # tmp-run-multi Makefile rule. | |
282 | sim_multi_src="${sim_multi_src} m16${name}_run.c" | |
283 | sim_multi_obj="${sim_multi_obj} m16${name}_run.o" | |
284 | sim_multi_flags="${sim_multi_flags} -F 16" | |
285 | ;; | |
8e394ffc AB |
286 | *:*micromips32*:*) |
287 | # Run igen thrice, once for micromips32, once for micromips16, | |
288 | # and once for m32. | |
289 | ws="micromips_m32 micromips16 micromips32" | |
290 | ||
291 | # The top-level function for the micromips simulator is | |
292 | # in a file micromips${name}_run.c, generated by the | |
293 | # tmp-run-multi Makefile rule. | |
294 | sim_multi_src="${sim_multi_src} micromips${name}_run.c" | |
295 | sim_multi_obj="${sim_multi_obj} micromips${name}_run.o" | |
296 | sim_multi_flags="${sim_multi_flags} -F 16,32" | |
297 | ;; | |
298 | *:*micromips64*:*) | |
299 | # Run igen thrice, once for micromips64, once for micromips16, | |
300 | # and once for m64. | |
301 | ws="micromips_m64 micromips16 micromips64" | |
302 | ||
303 | # The top-level function for the micromips simulator is | |
304 | # in a file micromips${name}_run.c, generated by the | |
305 | # tmp-run-multi Makefile rule. | |
306 | sim_multi_src="${sim_multi_src} micromips${name}_run.c" | |
307 | sim_multi_obj="${sim_multi_obj} micromips${name}_run.o" | |
308 | sim_multi_flags="${sim_multi_flags} -F 16,32,64" | |
309 | ;; | |
4c54fc26 CD |
310 | *) |
311 | ws=m32 | |
312 | ;; | |
313 | esac | |
314 | ||
315 | # Now add the list of igen-generated files to ${sim_multi_src} | |
316 | # and ${sim_multi_obj}. | |
317 | for w in ${ws}; do | |
318 | for base in engine icache idecode model semantics support; do | |
319 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c" | |
320 | sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h" | |
321 | sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o" | |
322 | done | |
323 | sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}" | |
324 | done | |
325 | ||
326 | # Add an include for the engine.h file. This file declares the | |
327 | # top-level foo_engine_run() function. | |
328 | echo "#include \"${w}${name}_engine.h\"" >> multi-include.h | |
329 | ||
330 | # Add case statements for this engine to sim_engine_run(). | |
331 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
332 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
333 | if test ${mach} = ${sim_multi_default}; then | |
334 | echo " default:" >> multi-run.c | |
335 | sim_seen_default=yes | |
336 | fi | |
337 | done | |
338 | echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \ | |
339 | >> multi-run.c | |
340 | echo " break;" >> multi-run.c | |
341 | done | |
342 | ||
343 | # Check whether we added a 'default:' label. | |
344 | if test ${sim_seen_default} = no; then | |
306f4178 | 345 | AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default}) |
4c54fc26 CD |
346 | fi |
347 | ||
348 | cat << __EOF__ >> multi-run.c | |
349 | } | |
350 | } | |
351 | ||
352 | int | |
353 | mips_mach_multi (SIM_DESC sd) | |
354 | { | |
355 | if (STATE_ARCHITECTURE (sd) == NULL) | |
356 | return bfd_mach_${sim_multi_default}; | |
357 | ||
358 | switch (STATE_ARCHITECTURE (SD)->mach) | |
359 | { | |
360 | __EOF__ | |
361 | ||
362 | # Add case statements for this engine to mips_mach_multi(). | |
363 | for fc in ${sim_multi_configs}; do | |
364 | ||
365 | # Split up the entry. ${c} contains the first three elements. | |
366 | # Note: outer sqaure brackets are m4 quotes. | |
367 | c=`echo ${fc} | sed ['s/:[^:]*$//']` | |
368 | bfdmachs=`echo ${fc} | sed 's/.*://'` | |
369 | ||
370 | for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do | |
371 | echo " case bfd_mach_${mach}:" >> multi-run.c | |
372 | done | |
373 | done | |
374 | ||
375 | cat << __EOF__ >> multi-run.c | |
376 | return (STATE_ARCHITECTURE (SD)->mach); | |
377 | default: | |
378 | return bfd_mach_${sim_multi_default}; | |
379 | } | |
380 | } | |
381 | __EOF__ | |
382 | ||
383 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI" | |
384 | else | |
385 | # For clean-extra | |
386 | sim_multi_src=doesnt-exist.c | |
387 | ||
388 | if test x"${sim_mach_default}" = x""; then | |
306f4178 | 389 | AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined) |
4c54fc26 CD |
390 | fi |
391 | SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}" | |
392 | fi | |
c906108c SS |
393 | sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" |
394 | sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" | |
8e394ffc AB |
395 | sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}" |
396 | sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}" | |
c906108c SS |
397 | AC_SUBST(sim_igen_flags) |
398 | AC_SUBST(sim_m16_flags) | |
8e394ffc AB |
399 | AC_SUBST(sim_micromips_flags) |
400 | AC_SUBST(sim_micromips16_flags) | |
c906108c | 401 | AC_SUBST(sim_gen) |
4c54fc26 CD |
402 | AC_SUBST(sim_multi_flags) |
403 | AC_SUBST(sim_multi_igen_configs) | |
404 | AC_SUBST(sim_multi_src) | |
405 | AC_SUBST(sim_multi_obj) | |
c906108c SS |
406 | # |
407 | # Add simulated hardware devices | |
408 | # | |
9b1af85c | 409 | SIM_AC_OPTION_HARDWARE(tx3904cpu tx3904irc tx3904tmr tx3904sio) |
c906108c SS |
410 | |
411 | ||
c906108c | 412 | AC_PATH_X |
c906108c | 413 | |
c906108c | 414 | AC_CHECK_LIB(m, fabs) |
c906108c SS |
415 | |
416 | SIM_AC_OUTPUT |