]>
Commit | Line | Data |
---|---|---|
9c9e1b26 AG |
1 | 2013-01-17 Anthony Green <green@moxielogic.com> |
2 | ||
3 | * interp.c (sim_open): Remove from debug output. | |
4 | ||
78ca4e81 AG |
5 | 2012-09-07 Anthony Green <green@moxielogic.com> |
6 | ||
7 | * interp.c (sim_resume): Branches are now relative to the | |
8 | address of the instruction following the branch. | |
9 | ||
a6c2b87e MF |
10 | 2012-06-17 Mike Frysinger <vapier@gentoo.org> |
11 | ||
12 | * interp.c: Include config.h first. Also include fcntl.h directly. | |
13 | ||
5f3ef9d0 JB |
14 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
15 | ||
16 | * config.in, configure: Regenerate. | |
17 | ||
2232061b MF |
18 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
19 | ||
20 | * aclocal.m4, config.in, configure: Regenerate. | |
21 | ||
db2e4d67 MF |
22 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
23 | ||
24 | * aclocal.m4: New file. | |
25 | * configure: Regenerate. | |
26 | ||
9c082ca8 MF |
27 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
28 | ||
29 | * configure.ac: Change include to common/acinclude.m4. | |
30 | ||
6ffe910a MF |
31 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
32 | ||
33 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
34 | call. Replace common.m4 include with SIM_AC_COMMON. | |
35 | * configure: Regenerate. | |
36 | ||
5558e7e6 MF |
37 | 2010-04-14 Mike Frysinger <vapier@gentoo.org> |
38 | ||
39 | * interp.c (sim_write): Add const to buffer arg. | |
40 | ||
bc56c8fa JK |
41 | 2010-02-27 Jan Kratochvil <jan.kratochvil@redhat.com> |
42 | ||
43 | * interp.c (sim_create_inferior): Fix crashes on zero PROG_BFD or ARGV. | |
44 | ||
32d49b7b AG |
45 | 2010-02-03 Anthony Green <green@moxielogic.com> |
46 | ||
47 | * interp.c (sim_resume): nop is 0x0f, and 0x00 is an illegal | |
48 | instruction. | |
49 | ||
11db68fd AG |
50 | 2010-01-13 Anthony Green <green@moxielogic.com> |
51 | ||
52 | * interp.c (sim_open): Add period to end of sentence in comment. | |
53 | ||
b8dcd182 AG |
54 | 2010-01-13 Anthony Green <green@moxielogic.com> |
55 | ||
56 | * interp.c (sim_open): Initialize the SIM_DESC object properly | |
57 | with sim_config() and sim_post_argv_init(). | |
58 | ||
3725885a RW |
59 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
60 | ||
61 | * configure: Regenerate. | |
62 | ||
5c27d164 AG |
63 | 2009-09-10 Anthony Green <green@moxielogic.com> |
64 | ||
65 | * Makefile.in (install-dtb): New target. | |
66 | (moxie-gdb.dtb): New target. | |
67 | (SIM_CFLAGS): Define DTB macro on command line. | |
68 | (SIM_OBJS): Use common infrastructire. | |
69 | (dtbdir): Define install location for dtb file. | |
70 | ||
71 | * sim-main.h: New file. | |
72 | * moxie-gdb.dts: New file. | |
73 | * configure.ac: Check for dtc. Install dtb file. Remove some old | |
74 | cruft. | |
75 | * configure: Regenerate. | |
76 | * interp.c: Many changes to use common memory infrastructure. | |
77 | (load_dtb): New function. | |
78 | (sim_create_inferior): Call it. | |
79 | ||
d6416cdc RW |
80 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
81 | ||
81ecdfbb RW |
82 | * config.in: Regenerate. |
83 | * configure: Likewise. | |
84 | ||
d6416cdc RW |
85 | * configure: Regenerate. |
86 | ||
7a321525 AG |
87 | 2009-07-31 Anthony Green <green@moxielogic.com> |
88 | ||
89 | * interp.c: Increase simulated memory to 16MB. | |
90 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
91 | args in regs). Also simluate proper exception processing for | |
92 | Linux system calls. | |
93 | ||
94 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
95 | ||
96 | * interp.c (sim_resume): Add system call software interrupt support. | |
97 | ||
86566200 AG |
98 | 2009-06-11 Anthony Green <green@moxielogic.com> |
99 | ||
100 | * interp.c (INST2OFFSET): Define. | |
101 | (sim_resume): Support new PC relative branch instructions. | |
102 | ||
77176dfc AG |
103 | 2009-05-09 Anthony Green <green@moxielogic.com> |
104 | ||
105 | * interp.c (sim_resume): Add missing breaks in switch. | |
106 | ||
fdd6fa61 AG |
107 | 2008-10-03 Anthony Green <green@moxielogic.com> |
108 | ||
109 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
110 | ||
111 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
112 | ||
113 | * interp.c (NUM_SPRO_SREGS): New. | |
114 | (struct moxie_regset): Add sregs. | |
115 | (set_initial_gprs): Initialize sregs. | |
116 | (sim_resume): Add gsr and ssr support. | |
117 | ||
118 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
119 | ||
120 | * interp.c (sim_resume): Add inc and dec instructions. | |
121 | ||
122 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
123 | ||
124 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
125 | track of instruction trace counts. | |
126 | * interp.c (sim_resume): Ditto. | |
127 | (sim_info): Ditto. | |
128 | ||
129 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
130 | ||
131 | * interp.c (sim_resume): Remove debugging code. | |
132 | ||
133 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
134 | ||
135 | * interp.c (TRACE): Add new tracing infrastructure. | |
136 | (sim_resume): Use it. | |
137 | (reg_names): Add new registers. | |
138 | (NUM_MOXIE_REGS): New registers. | |
139 | (PC_REGNO): New registers. | |
140 | (sim_resume): New instruction encodings. | |
141 | ||
142 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
143 | ||
144 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
145 | (convert_target_flags): New function. | |
146 | ||
147 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
148 | ||
149 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
150 | ||
151 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
152 | ||
153 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
154 | ||
155 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
156 | ||
157 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
158 | ||
159 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
160 | ||
161 | * interp.c (sim_resume): Add brk. | |
162 | ||
163 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
164 | ||
165 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
166 | ||
167 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
168 | ||
169 | * interp.c (sim_resume): Add missing breaks. | |
170 | (sim_resume): Fix neg implementation. | |
171 | ||
172 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
173 | ||
174 | * interp.c (sim_load): Don't require a .bss section. | |
175 | ||
176 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
177 | ||
178 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
179 | not, ashr, xor. | |
180 | ||
181 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
182 | ||
183 | * interp.c (struct moxie_regset): Add condition code, cc. | |
184 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
185 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
186 | bge, ble, bgeu, and bleu. | |
187 | (rbat, rsat, wbat, wsat): New functions. | |
188 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
189 | sta.b, st.s, sta.s, jmp. | |
190 | ||
191 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
192 | ||
193 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
194 | jsra should set $fp == $sp. | |
195 | Fix jsra and ret semantics. | |
196 | ||
197 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
198 | ||
199 | * interp.c (sim_resume): Add push, pop and add.l. | |
200 | ||
201 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
202 | ||
203 | * interp.c (EXTRACT_WORD): Define. | |
204 | (rlat): Use EXTRACT_WORD. | |
205 | (sim_resume): Add jsra and ret. | |
206 | ||
207 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
208 | ||
209 | * interp.c (reg_names): Define. | |
210 | (sim_resume): Use reg_names. | |
211 | ||
212 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
213 | ||
214 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
215 | sysdep.h: Created. |