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-Wimplicit-fallthrough warning fixes
[thirdparty/binutils-gdb.git] / bfd / elf32-arm.c
1 /* 32-bit ELF support for ARM
2 Copyright (C) 1998-2016 Free Software Foundation, Inc.
3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include <limits.h>
23
24 #include "bfd.h"
25 #include "bfd_stdint.h"
26 #include "libiberty.h"
27 #include "libbfd.h"
28 #include "elf-bfd.h"
29 #include "elf-nacl.h"
30 #include "elf-vxworks.h"
31 #include "elf/arm.h"
32
33 /* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35 #define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38 /* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40 #define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45 /* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47 #define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52 /* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54 #define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
59 #define elf_info_to_howto 0
60 #define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62 #define ARM_ELF_ABI_VERSION 0
63 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
65 /* The Adjusted Place, as defined by AAELF. */
66 #define Pa(X) ((X) & 0xfffffffc)
67
68 static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
73 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
77 static reloc_howto_type elf32_arm_howto_table_1[] =
78 {
79 /* No relocation. */
80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 3, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
139 HOWTO (R_ARM_LDR_PC_G0, /* type */
140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
142 32, /* bitsize */
143 TRUE, /* pc_relative */
144 0, /* bitpos */
145 complain_overflow_dont,/* complain_on_overflow */
146 bfd_elf_generic_reloc, /* special_function */
147 "R_ARM_LDR_PC_G0", /* name */
148 FALSE, /* partial_inplace */
149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
226 HOWTO (R_ARM_THM_CALL, /* type */
227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
229 24, /* bitsize */
230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
234 "R_ARM_THM_CALL", /* name */
235 FALSE, /* partial_inplace */
236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
254 HOWTO (R_ARM_BREL_ADJ, /* type */
255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
257 32, /* bitsize */
258 FALSE, /* pc_relative */
259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
262 "R_ARM_BREL_ADJ", /* name */
263 FALSE, /* partial_inplace */
264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
267
268 HOWTO (R_ARM_TLS_DESC, /* type */
269 0, /* rightshift */
270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
272 FALSE, /* pc_relative */
273 0, /* bitpos */
274 complain_overflow_bitfield,/* complain_on_overflow */
275 bfd_elf_generic_reloc, /* special_function */
276 "R_ARM_TLS_DESC", /* name */
277 FALSE, /* partial_inplace */
278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
300 24, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 24, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* Dynamic TLS relocations. */
327
328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
341
342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
355
356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
413
414 HOWTO (R_ARM_RELATIVE, /* type */
415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
427
428 HOWTO (R_ARM_GOTOFF32, /* type */
429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
441
442 HOWTO (R_ARM_GOTPC, /* type */
443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
455
456 HOWTO (R_ARM_GOT32, /* type */
457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
469
470 HOWTO (R_ARM_PLT32, /* type */
471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
517 0, /* bitpos */
518 complain_overflow_signed,/* complain_on_overflow */
519 bfd_elf_generic_reloc, /* special_function */
520 "R_ARM_THM_JUMP24", /* name */
521 FALSE, /* partial_inplace */
522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
525
526 HOWTO (R_ARM_BASE_ABS, /* type */
527 0, /* rightshift */
528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_ARM_BASE_ABS", /* name */
535 FALSE, /* partial_inplace */
536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
843 complain_overflow_dont,/* complain_on_overflow */
844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
857 complain_overflow_dont,/* complain_on_overflow */
858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
892
893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
1274
1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
1544
1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
1559
1560 HOWTO (R_ARM_TLS_LDM32, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
1573
1574 HOWTO (R_ARM_TLS_LDO32, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
1587
1588 HOWTO (R_ARM_TLS_IE32, /* type */
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601
1602 HOWTO (R_ARM_TLS_LE32, /* type */
1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 NULL, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
1615
1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
1621 0, /* bitpos */
1622 complain_overflow_bitfield,/* complain_on_overflow */
1623 bfd_elf_generic_reloc, /* special_function */
1624 "R_ARM_TLS_LDO12", /* name */
1625 FALSE, /* partial_inplace */
1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
1629
1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
1635 0, /* bitpos */
1636 complain_overflow_bitfield,/* complain_on_overflow */
1637 bfd_elf_generic_reloc, /* special_function */
1638 "R_ARM_TLS_LE12", /* name */
1639 FALSE, /* partial_inplace */
1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
1643
1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
1649 0, /* bitpos */
1650 complain_overflow_bitfield,/* complain_on_overflow */
1651 bfd_elf_generic_reloc, /* special_function */
1652 "R_ARM_TLS_IE12GP", /* name */
1653 FALSE, /* partial_inplace */
1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
1657
1658 /* 112-127 private relocations. */
1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
1675
1676 /* R_ARM_ME_TOO, obsolete. */
1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
1692 EMPTY_HOWTO (130),
1693 EMPTY_HOWTO (131),
1694 HOWTO (R_ARM_THM_ALU_ABS_G0_NC,/* type. */
1695 0, /* rightshift. */
1696 1, /* size (0 = byte, 1 = short, 2 = long). */
1697 16, /* bitsize. */
1698 FALSE, /* pc_relative. */
1699 0, /* bitpos. */
1700 complain_overflow_bitfield,/* complain_on_overflow. */
1701 bfd_elf_generic_reloc, /* special_function. */
1702 "R_ARM_THM_ALU_ABS_G0_NC",/* name. */
1703 FALSE, /* partial_inplace. */
1704 0x00000000, /* src_mask. */
1705 0x00000000, /* dst_mask. */
1706 FALSE), /* pcrel_offset. */
1707 HOWTO (R_ARM_THM_ALU_ABS_G1_NC,/* type. */
1708 0, /* rightshift. */
1709 1, /* size (0 = byte, 1 = short, 2 = long). */
1710 16, /* bitsize. */
1711 FALSE, /* pc_relative. */
1712 0, /* bitpos. */
1713 complain_overflow_bitfield,/* complain_on_overflow. */
1714 bfd_elf_generic_reloc, /* special_function. */
1715 "R_ARM_THM_ALU_ABS_G1_NC",/* name. */
1716 FALSE, /* partial_inplace. */
1717 0x00000000, /* src_mask. */
1718 0x00000000, /* dst_mask. */
1719 FALSE), /* pcrel_offset. */
1720 HOWTO (R_ARM_THM_ALU_ABS_G2_NC,/* type. */
1721 0, /* rightshift. */
1722 1, /* size (0 = byte, 1 = short, 2 = long). */
1723 16, /* bitsize. */
1724 FALSE, /* pc_relative. */
1725 0, /* bitpos. */
1726 complain_overflow_bitfield,/* complain_on_overflow. */
1727 bfd_elf_generic_reloc, /* special_function. */
1728 "R_ARM_THM_ALU_ABS_G2_NC",/* name. */
1729 FALSE, /* partial_inplace. */
1730 0x00000000, /* src_mask. */
1731 0x00000000, /* dst_mask. */
1732 FALSE), /* pcrel_offset. */
1733 HOWTO (R_ARM_THM_ALU_ABS_G3_NC,/* type. */
1734 0, /* rightshift. */
1735 1, /* size (0 = byte, 1 = short, 2 = long). */
1736 16, /* bitsize. */
1737 FALSE, /* pc_relative. */
1738 0, /* bitpos. */
1739 complain_overflow_bitfield,/* complain_on_overflow. */
1740 bfd_elf_generic_reloc, /* special_function. */
1741 "R_ARM_THM_ALU_ABS_G3_NC",/* name. */
1742 FALSE, /* partial_inplace. */
1743 0x00000000, /* src_mask. */
1744 0x00000000, /* dst_mask. */
1745 FALSE), /* pcrel_offset. */
1746 };
1747
1748 /* 160 onwards: */
1749 static reloc_howto_type elf32_arm_howto_table_2[1] =
1750 {
1751 HOWTO (R_ARM_IRELATIVE, /* type */
1752 0, /* rightshift */
1753 2, /* size (0 = byte, 1 = short, 2 = long) */
1754 32, /* bitsize */
1755 FALSE, /* pc_relative */
1756 0, /* bitpos */
1757 complain_overflow_bitfield,/* complain_on_overflow */
1758 bfd_elf_generic_reloc, /* special_function */
1759 "R_ARM_IRELATIVE", /* name */
1760 TRUE, /* partial_inplace */
1761 0xffffffff, /* src_mask */
1762 0xffffffff, /* dst_mask */
1763 FALSE) /* pcrel_offset */
1764 };
1765
1766 /* 249-255 extended, currently unused, relocations: */
1767 static reloc_howto_type elf32_arm_howto_table_3[4] =
1768 {
1769 HOWTO (R_ARM_RREL32, /* type */
1770 0, /* rightshift */
1771 0, /* size (0 = byte, 1 = short, 2 = long) */
1772 0, /* bitsize */
1773 FALSE, /* pc_relative */
1774 0, /* bitpos */
1775 complain_overflow_dont,/* complain_on_overflow */
1776 bfd_elf_generic_reloc, /* special_function */
1777 "R_ARM_RREL32", /* name */
1778 FALSE, /* partial_inplace */
1779 0, /* src_mask */
1780 0, /* dst_mask */
1781 FALSE), /* pcrel_offset */
1782
1783 HOWTO (R_ARM_RABS32, /* type */
1784 0, /* rightshift */
1785 0, /* size (0 = byte, 1 = short, 2 = long) */
1786 0, /* bitsize */
1787 FALSE, /* pc_relative */
1788 0, /* bitpos */
1789 complain_overflow_dont,/* complain_on_overflow */
1790 bfd_elf_generic_reloc, /* special_function */
1791 "R_ARM_RABS32", /* name */
1792 FALSE, /* partial_inplace */
1793 0, /* src_mask */
1794 0, /* dst_mask */
1795 FALSE), /* pcrel_offset */
1796
1797 HOWTO (R_ARM_RPC24, /* type */
1798 0, /* rightshift */
1799 0, /* size (0 = byte, 1 = short, 2 = long) */
1800 0, /* bitsize */
1801 FALSE, /* pc_relative */
1802 0, /* bitpos */
1803 complain_overflow_dont,/* complain_on_overflow */
1804 bfd_elf_generic_reloc, /* special_function */
1805 "R_ARM_RPC24", /* name */
1806 FALSE, /* partial_inplace */
1807 0, /* src_mask */
1808 0, /* dst_mask */
1809 FALSE), /* pcrel_offset */
1810
1811 HOWTO (R_ARM_RBASE, /* type */
1812 0, /* rightshift */
1813 0, /* size (0 = byte, 1 = short, 2 = long) */
1814 0, /* bitsize */
1815 FALSE, /* pc_relative */
1816 0, /* bitpos */
1817 complain_overflow_dont,/* complain_on_overflow */
1818 bfd_elf_generic_reloc, /* special_function */
1819 "R_ARM_RBASE", /* name */
1820 FALSE, /* partial_inplace */
1821 0, /* src_mask */
1822 0, /* dst_mask */
1823 FALSE) /* pcrel_offset */
1824 };
1825
1826 static reloc_howto_type *
1827 elf32_arm_howto_from_type (unsigned int r_type)
1828 {
1829 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
1830 return &elf32_arm_howto_table_1[r_type];
1831
1832 if (r_type == R_ARM_IRELATIVE)
1833 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1834
1835 if (r_type >= R_ARM_RREL32
1836 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1837 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
1838
1839 return NULL;
1840 }
1841
1842 static void
1843 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1844 Elf_Internal_Rela * elf_reloc)
1845 {
1846 unsigned int r_type;
1847
1848 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1849 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1850 }
1851
1852 struct elf32_arm_reloc_map
1853 {
1854 bfd_reloc_code_real_type bfd_reloc_val;
1855 unsigned char elf_reloc_val;
1856 };
1857
1858 /* All entries in this list must also be present in elf32_arm_howto_table. */
1859 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1860 {
1861 {BFD_RELOC_NONE, R_ARM_NONE},
1862 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
1863 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1864 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
1865 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1866 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1867 {BFD_RELOC_32, R_ARM_ABS32},
1868 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1869 {BFD_RELOC_8, R_ARM_ABS8},
1870 {BFD_RELOC_16, R_ARM_ABS16},
1871 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1872 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
1873 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1874 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1875 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1876 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1877 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1878 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
1879 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1880 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1881 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
1882 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
1883 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1884 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
1885 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1886 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1887 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1888 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1889 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1890 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
1891 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1892 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1893 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1894 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1895 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1896 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1897 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1898 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
1899 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1900 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1901 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1902 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1903 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1904 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1905 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1906 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
1907 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
1908 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1909 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
1910 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1911 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1912 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1913 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1914 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1915 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1916 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1917 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
1918 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1919 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1920 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1921 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1922 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1923 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1924 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1925 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1926 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1927 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1928 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1929 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1930 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1931 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1932 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1933 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1934 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1935 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1936 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1937 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1938 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1939 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1940 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1941 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1942 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1943 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1944 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1945 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1946 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX},
1947 {BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC, R_ARM_THM_ALU_ABS_G3_NC},
1948 {BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC, R_ARM_THM_ALU_ABS_G2_NC},
1949 {BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC, R_ARM_THM_ALU_ABS_G1_NC},
1950 {BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G0_NC}
1951 };
1952
1953 static reloc_howto_type *
1954 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1955 bfd_reloc_code_real_type code)
1956 {
1957 unsigned int i;
1958
1959 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
1960 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1961 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
1962
1963 return NULL;
1964 }
1965
1966 static reloc_howto_type *
1967 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1968 const char *r_name)
1969 {
1970 unsigned int i;
1971
1972 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
1973 if (elf32_arm_howto_table_1[i].name != NULL
1974 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1975 return &elf32_arm_howto_table_1[i];
1976
1977 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
1978 if (elf32_arm_howto_table_2[i].name != NULL
1979 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1980 return &elf32_arm_howto_table_2[i];
1981
1982 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1983 if (elf32_arm_howto_table_3[i].name != NULL
1984 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1985 return &elf32_arm_howto_table_3[i];
1986
1987 return NULL;
1988 }
1989
1990 /* Support for core dump NOTE sections. */
1991
1992 static bfd_boolean
1993 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
1994 {
1995 int offset;
1996 size_t size;
1997
1998 switch (note->descsz)
1999 {
2000 default:
2001 return FALSE;
2002
2003 case 148: /* Linux/ARM 32-bit. */
2004 /* pr_cursig */
2005 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2006
2007 /* pr_pid */
2008 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
2009
2010 /* pr_reg */
2011 offset = 72;
2012 size = 72;
2013
2014 break;
2015 }
2016
2017 /* Make a ".reg/999" section. */
2018 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2019 size, note->descpos + offset);
2020 }
2021
2022 static bfd_boolean
2023 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2024 {
2025 switch (note->descsz)
2026 {
2027 default:
2028 return FALSE;
2029
2030 case 124: /* Linux/ARM elf_prpsinfo. */
2031 elf_tdata (abfd)->core->pid
2032 = bfd_get_32 (abfd, note->descdata + 12);
2033 elf_tdata (abfd)->core->program
2034 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2035 elf_tdata (abfd)->core->command
2036 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2037 }
2038
2039 /* Note that for some reason, a spurious space is tacked
2040 onto the end of the args in some (at least one anyway)
2041 implementations, so strip it off if it exists. */
2042 {
2043 char *command = elf_tdata (abfd)->core->command;
2044 int n = strlen (command);
2045
2046 if (0 < n && command[n - 1] == ' ')
2047 command[n - 1] = '\0';
2048 }
2049
2050 return TRUE;
2051 }
2052
2053 static char *
2054 elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
2055 int note_type, ...)
2056 {
2057 switch (note_type)
2058 {
2059 default:
2060 return NULL;
2061
2062 case NT_PRPSINFO:
2063 {
2064 char data[124];
2065 va_list ap;
2066
2067 va_start (ap, note_type);
2068 memset (data, 0, sizeof (data));
2069 strncpy (data + 28, va_arg (ap, const char *), 16);
2070 strncpy (data + 44, va_arg (ap, const char *), 80);
2071 va_end (ap);
2072
2073 return elfcore_write_note (abfd, buf, bufsiz,
2074 "CORE", note_type, data, sizeof (data));
2075 }
2076
2077 case NT_PRSTATUS:
2078 {
2079 char data[148];
2080 va_list ap;
2081 long pid;
2082 int cursig;
2083 const void *greg;
2084
2085 va_start (ap, note_type);
2086 memset (data, 0, sizeof (data));
2087 pid = va_arg (ap, long);
2088 bfd_put_32 (abfd, pid, data + 24);
2089 cursig = va_arg (ap, int);
2090 bfd_put_16 (abfd, cursig, data + 12);
2091 greg = va_arg (ap, const void *);
2092 memcpy (data + 72, greg, 72);
2093 va_end (ap);
2094
2095 return elfcore_write_note (abfd, buf, bufsiz,
2096 "CORE", note_type, data, sizeof (data));
2097 }
2098 }
2099 }
2100
2101 #define TARGET_LITTLE_SYM arm_elf32_le_vec
2102 #define TARGET_LITTLE_NAME "elf32-littlearm"
2103 #define TARGET_BIG_SYM arm_elf32_be_vec
2104 #define TARGET_BIG_NAME "elf32-bigarm"
2105
2106 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2107 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
2108 #define elf_backend_write_core_note elf32_arm_nabi_write_core_note
2109
2110 typedef unsigned long int insn32;
2111 typedef unsigned short int insn16;
2112
2113 /* In lieu of proper flags, assume all EABIv4 or later objects are
2114 interworkable. */
2115 #define INTERWORK_FLAG(abfd) \
2116 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
2117 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2118 || ((abfd)->flags & BFD_LINKER_CREATED))
2119
2120 /* The linker script knows the section names for placement.
2121 The entry_names are used to do simple name mangling on the stubs.
2122 Given a function name, and its type, the stub can be found. The
2123 name can be changed. The only requirement is the %s be present. */
2124 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2125 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2126
2127 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2128 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2129
2130 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2131 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2132
2133 #define STM32L4XX_ERRATUM_VENEER_SECTION_NAME ".text.stm32l4xx_veneer"
2134 #define STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "__stm32l4xx_veneer_%x"
2135
2136 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2137 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2138
2139 #define STUB_ENTRY_NAME "__%s_veneer"
2140
2141 #define CMSE_PREFIX "__acle_se_"
2142
2143 /* The name of the dynamic interpreter. This is put in the .interp
2144 section. */
2145 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2146
2147 static const unsigned long tls_trampoline [] =
2148 {
2149 0xe08e0000, /* add r0, lr, r0 */
2150 0xe5901004, /* ldr r1, [r0,#4] */
2151 0xe12fff11, /* bx r1 */
2152 };
2153
2154 static const unsigned long dl_tlsdesc_lazy_trampoline [] =
2155 {
2156 0xe52d2004, /* push {r2} */
2157 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2158 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2159 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2160 0xe081100f, /* 2: add r1, pc */
2161 0xe12fff12, /* bx r2 */
2162 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
2163 + dl_tlsdesc_lazy_resolver(GOT) */
2164 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2165 };
2166
2167 #ifdef FOUR_WORD_PLT
2168
2169 /* The first entry in a procedure linkage table looks like
2170 this. It is set up so that any shared library function that is
2171 called before the relocation has been set up calls the dynamic
2172 linker first. */
2173 static const bfd_vma elf32_arm_plt0_entry [] =
2174 {
2175 0xe52de004, /* str lr, [sp, #-4]! */
2176 0xe59fe010, /* ldr lr, [pc, #16] */
2177 0xe08fe00e, /* add lr, pc, lr */
2178 0xe5bef008, /* ldr pc, [lr, #8]! */
2179 };
2180
2181 /* Subsequent entries in a procedure linkage table look like
2182 this. */
2183 static const bfd_vma elf32_arm_plt_entry [] =
2184 {
2185 0xe28fc600, /* add ip, pc, #NN */
2186 0xe28cca00, /* add ip, ip, #NN */
2187 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2188 0x00000000, /* unused */
2189 };
2190
2191 #else /* not FOUR_WORD_PLT */
2192
2193 /* The first entry in a procedure linkage table looks like
2194 this. It is set up so that any shared library function that is
2195 called before the relocation has been set up calls the dynamic
2196 linker first. */
2197 static const bfd_vma elf32_arm_plt0_entry [] =
2198 {
2199 0xe52de004, /* str lr, [sp, #-4]! */
2200 0xe59fe004, /* ldr lr, [pc, #4] */
2201 0xe08fe00e, /* add lr, pc, lr */
2202 0xe5bef008, /* ldr pc, [lr, #8]! */
2203 0x00000000, /* &GOT[0] - . */
2204 };
2205
2206 /* By default subsequent entries in a procedure linkage table look like
2207 this. Offsets that don't fit into 28 bits will cause link error. */
2208 static const bfd_vma elf32_arm_plt_entry_short [] =
2209 {
2210 0xe28fc600, /* add ip, pc, #0xNN00000 */
2211 0xe28cca00, /* add ip, ip, #0xNN000 */
2212 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2213 };
2214
2215 /* When explicitly asked, we'll use this "long" entry format
2216 which can cope with arbitrary displacements. */
2217 static const bfd_vma elf32_arm_plt_entry_long [] =
2218 {
2219 0xe28fc200, /* add ip, pc, #0xN0000000 */
2220 0xe28cc600, /* add ip, ip, #0xNN00000 */
2221 0xe28cca00, /* add ip, ip, #0xNN000 */
2222 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2223 };
2224
2225 static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2226
2227 #endif /* not FOUR_WORD_PLT */
2228
2229 /* The first entry in a procedure linkage table looks like this.
2230 It is set up so that any shared library function that is called before the
2231 relocation has been set up calls the dynamic linker first. */
2232 static const bfd_vma elf32_thumb2_plt0_entry [] =
2233 {
2234 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2235 an instruction maybe encoded to one or two array elements. */
2236 0xf8dfb500, /* push {lr} */
2237 0x44fee008, /* ldr.w lr, [pc, #8] */
2238 /* add lr, pc */
2239 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2240 0x00000000, /* &GOT[0] - . */
2241 };
2242
2243 /* Subsequent entries in a procedure linkage table for thumb only target
2244 look like this. */
2245 static const bfd_vma elf32_thumb2_plt_entry [] =
2246 {
2247 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2248 an instruction maybe encoded to one or two array elements. */
2249 0x0c00f240, /* movw ip, #0xNNNN */
2250 0x0c00f2c0, /* movt ip, #0xNNNN */
2251 0xf8dc44fc, /* add ip, pc */
2252 0xbf00f000 /* ldr.w pc, [ip] */
2253 /* nop */
2254 };
2255
2256 /* The format of the first entry in the procedure linkage table
2257 for a VxWorks executable. */
2258 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
2259 {
2260 0xe52dc008, /* str ip,[sp,#-8]! */
2261 0xe59fc000, /* ldr ip,[pc] */
2262 0xe59cf008, /* ldr pc,[ip,#8] */
2263 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2264 };
2265
2266 /* The format of subsequent entries in a VxWorks executable. */
2267 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
2268 {
2269 0xe59fc000, /* ldr ip,[pc] */
2270 0xe59cf000, /* ldr pc,[ip] */
2271 0x00000000, /* .long @got */
2272 0xe59fc000, /* ldr ip,[pc] */
2273 0xea000000, /* b _PLT */
2274 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2275 };
2276
2277 /* The format of entries in a VxWorks shared library. */
2278 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
2279 {
2280 0xe59fc000, /* ldr ip,[pc] */
2281 0xe79cf009, /* ldr pc,[ip,r9] */
2282 0x00000000, /* .long @got */
2283 0xe59fc000, /* ldr ip,[pc] */
2284 0xe599f008, /* ldr pc,[r9,#8] */
2285 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2286 };
2287
2288 /* An initial stub used if the PLT entry is referenced from Thumb code. */
2289 #define PLT_THUMB_STUB_SIZE 4
2290 static const bfd_vma elf32_arm_plt_thumb_stub [] =
2291 {
2292 0x4778, /* bx pc */
2293 0x46c0 /* nop */
2294 };
2295
2296 /* The entries in a PLT when using a DLL-based target with multiple
2297 address spaces. */
2298 static const bfd_vma elf32_arm_symbian_plt_entry [] =
2299 {
2300 0xe51ff004, /* ldr pc, [pc, #-4] */
2301 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2302 };
2303
2304 /* The first entry in a procedure linkage table looks like
2305 this. It is set up so that any shared library function that is
2306 called before the relocation has been set up calls the dynamic
2307 linker first. */
2308 static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2309 {
2310 /* First bundle: */
2311 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2312 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2313 0xe08cc00f, /* add ip, ip, pc */
2314 0xe52dc008, /* str ip, [sp, #-8]! */
2315 /* Second bundle: */
2316 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2317 0xe59cc000, /* ldr ip, [ip] */
2318 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2319 0xe12fff1c, /* bx ip */
2320 /* Third bundle: */
2321 0xe320f000, /* nop */
2322 0xe320f000, /* nop */
2323 0xe320f000, /* nop */
2324 /* .Lplt_tail: */
2325 0xe50dc004, /* str ip, [sp, #-4] */
2326 /* Fourth bundle: */
2327 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2328 0xe59cc000, /* ldr ip, [ip] */
2329 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
2330 0xe12fff1c, /* bx ip */
2331 };
2332 #define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2333
2334 /* Subsequent entries in a procedure linkage table look like this. */
2335 static const bfd_vma elf32_arm_nacl_plt_entry [] =
2336 {
2337 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2338 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2339 0xe08cc00f, /* add ip, ip, pc */
2340 0xea000000, /* b .Lplt_tail */
2341 };
2342
2343 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2344 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2345 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2346 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2347 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2348 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2349 #define THM2_MAX_FWD_COND_BRANCH_OFFSET (((1 << 20) -2) + 4)
2350 #define THM2_MAX_BWD_COND_BRANCH_OFFSET (-(1 << 20) + 4)
2351
2352 enum stub_insn_type
2353 {
2354 THUMB16_TYPE = 1,
2355 THUMB32_TYPE,
2356 ARM_TYPE,
2357 DATA_TYPE
2358 };
2359
2360 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2361 /* A bit of a hack. A Thumb conditional branch, in which the proper condition
2362 is inserted in arm_build_one_stub(). */
2363 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2364 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2365 #define THUMB32_MOVT(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVT_ABS, 0}
2366 #define THUMB32_MOVW(X) {(X), THUMB32_TYPE, R_ARM_THM_MOVW_ABS_NC, 0}
2367 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2368 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2369 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2370 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2371
2372 typedef struct
2373 {
2374 bfd_vma data;
2375 enum stub_insn_type type;
2376 unsigned int r_type;
2377 int reloc_addend;
2378 } insn_sequence;
2379
2380 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2381 to reach the stub if necessary. */
2382 static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
2383 {
2384 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2385 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2386 };
2387
2388 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2389 available. */
2390 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
2391 {
2392 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2393 ARM_INSN (0xe12fff1c), /* bx ip */
2394 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2395 };
2396
2397 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2398 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
2399 {
2400 THUMB16_INSN (0xb401), /* push {r0} */
2401 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2402 THUMB16_INSN (0x4684), /* mov ip, r0 */
2403 THUMB16_INSN (0xbc01), /* pop {r0} */
2404 THUMB16_INSN (0x4760), /* bx ip */
2405 THUMB16_INSN (0xbf00), /* nop */
2406 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2407 };
2408
2409 /* Thumb -> Thumb long branch stub in thumb2 encoding. Used on armv7. */
2410 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only[] =
2411 {
2412 THUMB32_INSN (0xf85ff000), /* ldr.w pc, [pc, #-0] */
2413 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(x) */
2414 };
2415
2416 /* Thumb -> Thumb long branch stub. Used for PureCode sections on Thumb2
2417 M-profile architectures. */
2418 static const insn_sequence elf32_arm_stub_long_branch_thumb2_only_pure[] =
2419 {
2420 THUMB32_MOVW (0xf2400c00), /* mov.w ip, R_ARM_MOVW_ABS_NC */
2421 THUMB32_MOVT (0xf2c00c00), /* movt ip, R_ARM_MOVT_ABS << 16 */
2422 THUMB16_INSN (0x4760), /* bx ip */
2423 };
2424
2425 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2426 allowed. */
2427 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
2428 {
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2432 ARM_INSN (0xe12fff1c), /* bx ip */
2433 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2434 };
2435
2436 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2437 available. */
2438 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
2439 {
2440 THUMB16_INSN (0x4778), /* bx pc */
2441 THUMB16_INSN (0x46c0), /* nop */
2442 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2443 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2444 };
2445
2446 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2447 one, when the destination is close enough. */
2448 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
2449 {
2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2453 };
2454
2455 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2456 blx to reach the stub if necessary. */
2457 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
2458 {
2459 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2460 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2461 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2462 };
2463
2464 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2465 blx to reach the stub if necessary. We can not add into pc;
2466 it is not guaranteed to mode switch (different in ARMv6 and
2467 ARMv7). */
2468 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
2469 {
2470 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2471 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2472 ARM_INSN (0xe12fff1c), /* bx ip */
2473 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2474 };
2475
2476 /* V4T ARM -> ARM long branch stub, PIC. */
2477 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
2478 {
2479 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2480 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2481 ARM_INSN (0xe12fff1c), /* bx ip */
2482 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2483 };
2484
2485 /* V4T Thumb -> ARM long branch stub, PIC. */
2486 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
2487 {
2488 THUMB16_INSN (0x4778), /* bx pc */
2489 THUMB16_INSN (0x46c0), /* nop */
2490 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2491 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2492 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2493 };
2494
2495 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2496 architectures. */
2497 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
2498 {
2499 THUMB16_INSN (0xb401), /* push {r0} */
2500 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2501 THUMB16_INSN (0x46fc), /* mov ip, pc */
2502 THUMB16_INSN (0x4484), /* add ip, r0 */
2503 THUMB16_INSN (0xbc01), /* pop {r0} */
2504 THUMB16_INSN (0x4760), /* bx ip */
2505 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2506 };
2507
2508 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2509 allowed. */
2510 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
2511 {
2512 THUMB16_INSN (0x4778), /* bx pc */
2513 THUMB16_INSN (0x46c0), /* nop */
2514 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2515 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2516 ARM_INSN (0xe12fff1c), /* bx ip */
2517 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2518 };
2519
2520 /* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2521 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2522 static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2523 {
2524 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2525 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2526 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2527 };
2528
2529 /* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2530 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2531 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2532 {
2533 THUMB16_INSN (0x4778), /* bx pc */
2534 THUMB16_INSN (0x46c0), /* nop */
2535 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2536 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2537 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2538 };
2539
2540 /* NaCl ARM -> ARM long branch stub. */
2541 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2542 {
2543 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2544 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2545 ARM_INSN (0xe12fff1c), /* bx ip */
2546 ARM_INSN (0xe320f000), /* nop */
2547 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2548 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2549 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2550 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2551 };
2552
2553 /* NaCl ARM -> ARM long branch stub, PIC. */
2554 static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2555 {
2556 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2557 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2558 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2559 ARM_INSN (0xe12fff1c), /* bx ip */
2560 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2561 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2562 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2563 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2564 };
2565
2566 /* Stub used for transition to secure state (aka SG veneer). */
2567 static const insn_sequence elf32_arm_stub_cmse_branch_thumb_only[] =
2568 {
2569 THUMB32_INSN (0xe97fe97f), /* sg. */
2570 THUMB32_B_INSN (0xf000b800, -4), /* b.w original_branch_dest. */
2571 };
2572
2573
2574 /* Cortex-A8 erratum-workaround stubs. */
2575
2576 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2577 can't use a conditional branch to reach this stub). */
2578
2579 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
2580 {
2581 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2582 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2583 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2584 };
2585
2586 /* Stub used for b.w and bl.w instructions. */
2587
2588 static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
2589 {
2590 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2591 };
2592
2593 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
2594 {
2595 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2596 };
2597
2598 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2599 instruction (which switches to ARM mode) to point to this stub. Jump to the
2600 real destination using an ARM-mode branch. */
2601
2602 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
2603 {
2604 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2605 };
2606
2607 /* For each section group there can be a specially created linker section
2608 to hold the stubs for that group. The name of the stub section is based
2609 upon the name of another section within that group with the suffix below
2610 applied.
2611
2612 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2613 create what appeared to be a linker stub section when it actually
2614 contained user code/data. For example, consider this fragment:
2615
2616 const char * stubborn_problems[] = { "np" };
2617
2618 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2619 section called:
2620
2621 .data.rel.local.stubborn_problems
2622
2623 This then causes problems in arm32_arm_build_stubs() as it triggers:
2624
2625 // Ignore non-stub sections.
2626 if (!strstr (stub_sec->name, STUB_SUFFIX))
2627 continue;
2628
2629 And so the section would be ignored instead of being processed. Hence
2630 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2631 C identifier. */
2632 #define STUB_SUFFIX ".__stub"
2633
2634 /* One entry per long/short branch stub defined above. */
2635 #define DEF_STUBS \
2636 DEF_STUB(long_branch_any_any) \
2637 DEF_STUB(long_branch_v4t_arm_thumb) \
2638 DEF_STUB(long_branch_thumb_only) \
2639 DEF_STUB(long_branch_v4t_thumb_thumb) \
2640 DEF_STUB(long_branch_v4t_thumb_arm) \
2641 DEF_STUB(short_branch_v4t_thumb_arm) \
2642 DEF_STUB(long_branch_any_arm_pic) \
2643 DEF_STUB(long_branch_any_thumb_pic) \
2644 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2645 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2646 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
2647 DEF_STUB(long_branch_thumb_only_pic) \
2648 DEF_STUB(long_branch_any_tls_pic) \
2649 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
2650 DEF_STUB(long_branch_arm_nacl) \
2651 DEF_STUB(long_branch_arm_nacl_pic) \
2652 DEF_STUB(cmse_branch_thumb_only) \
2653 DEF_STUB(a8_veneer_b_cond) \
2654 DEF_STUB(a8_veneer_b) \
2655 DEF_STUB(a8_veneer_bl) \
2656 DEF_STUB(a8_veneer_blx) \
2657 DEF_STUB(long_branch_thumb2_only) \
2658 DEF_STUB(long_branch_thumb2_only_pure)
2659
2660 #define DEF_STUB(x) arm_stub_##x,
2661 enum elf32_arm_stub_type
2662 {
2663 arm_stub_none,
2664 DEF_STUBS
2665 max_stub_type
2666 };
2667 #undef DEF_STUB
2668
2669 /* Note the first a8_veneer type. */
2670 const unsigned arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond;
2671
2672 typedef struct
2673 {
2674 const insn_sequence* template_sequence;
2675 int template_size;
2676 } stub_def;
2677
2678 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
2679 static const stub_def stub_definitions[] =
2680 {
2681 {NULL, 0},
2682 DEF_STUBS
2683 };
2684
2685 struct elf32_arm_stub_hash_entry
2686 {
2687 /* Base hash table entry structure. */
2688 struct bfd_hash_entry root;
2689
2690 /* The stub section. */
2691 asection *stub_sec;
2692
2693 /* Offset within stub_sec of the beginning of this stub. */
2694 bfd_vma stub_offset;
2695
2696 /* Given the symbol's value and its section we can determine its final
2697 value when building the stubs (so the stub knows where to jump). */
2698 bfd_vma target_value;
2699 asection *target_section;
2700
2701 /* Same as above but for the source of the branch to the stub. Used for
2702 Cortex-A8 erratum workaround to patch it to branch to the stub. As
2703 such, source section does not need to be recorded since Cortex-A8 erratum
2704 workaround stubs are only generated when both source and target are in the
2705 same section. */
2706 bfd_vma source_value;
2707
2708 /* The instruction which caused this stub to be generated (only valid for
2709 Cortex-A8 erratum workaround stubs at present). */
2710 unsigned long orig_insn;
2711
2712 /* The stub type. */
2713 enum elf32_arm_stub_type stub_type;
2714 /* Its encoding size in bytes. */
2715 int stub_size;
2716 /* Its template. */
2717 const insn_sequence *stub_template;
2718 /* The size of the template (number of entries). */
2719 int stub_template_size;
2720
2721 /* The symbol table entry, if any, that this was derived from. */
2722 struct elf32_arm_link_hash_entry *h;
2723
2724 /* Type of branch. */
2725 enum arm_st_branch_type branch_type;
2726
2727 /* Where this stub is being called from, or, in the case of combined
2728 stub sections, the first input section in the group. */
2729 asection *id_sec;
2730
2731 /* The name for the local symbol at the start of this stub. The
2732 stub name in the hash table has to be unique; this does not, so
2733 it can be friendlier. */
2734 char *output_name;
2735 };
2736
2737 /* Used to build a map of a section. This is required for mixed-endian
2738 code/data. */
2739
2740 typedef struct elf32_elf_section_map
2741 {
2742 bfd_vma vma;
2743 char type;
2744 }
2745 elf32_arm_section_map;
2746
2747 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2748
2749 typedef enum
2750 {
2751 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2752 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2753 VFP11_ERRATUM_ARM_VENEER,
2754 VFP11_ERRATUM_THUMB_VENEER
2755 }
2756 elf32_vfp11_erratum_type;
2757
2758 typedef struct elf32_vfp11_erratum_list
2759 {
2760 struct elf32_vfp11_erratum_list *next;
2761 bfd_vma vma;
2762 union
2763 {
2764 struct
2765 {
2766 struct elf32_vfp11_erratum_list *veneer;
2767 unsigned int vfp_insn;
2768 } b;
2769 struct
2770 {
2771 struct elf32_vfp11_erratum_list *branch;
2772 unsigned int id;
2773 } v;
2774 } u;
2775 elf32_vfp11_erratum_type type;
2776 }
2777 elf32_vfp11_erratum_list;
2778
2779 /* Information about a STM32L4XX erratum veneer, or a branch to such a
2780 veneer. */
2781 typedef enum
2782 {
2783 STM32L4XX_ERRATUM_BRANCH_TO_VENEER,
2784 STM32L4XX_ERRATUM_VENEER
2785 }
2786 elf32_stm32l4xx_erratum_type;
2787
2788 typedef struct elf32_stm32l4xx_erratum_list
2789 {
2790 struct elf32_stm32l4xx_erratum_list *next;
2791 bfd_vma vma;
2792 union
2793 {
2794 struct
2795 {
2796 struct elf32_stm32l4xx_erratum_list *veneer;
2797 unsigned int insn;
2798 } b;
2799 struct
2800 {
2801 struct elf32_stm32l4xx_erratum_list *branch;
2802 unsigned int id;
2803 } v;
2804 } u;
2805 elf32_stm32l4xx_erratum_type type;
2806 }
2807 elf32_stm32l4xx_erratum_list;
2808
2809 typedef enum
2810 {
2811 DELETE_EXIDX_ENTRY,
2812 INSERT_EXIDX_CANTUNWIND_AT_END
2813 }
2814 arm_unwind_edit_type;
2815
2816 /* A (sorted) list of edits to apply to an unwind table. */
2817 typedef struct arm_unwind_table_edit
2818 {
2819 arm_unwind_edit_type type;
2820 /* Note: we sometimes want to insert an unwind entry corresponding to a
2821 section different from the one we're currently writing out, so record the
2822 (text) section this edit relates to here. */
2823 asection *linked_section;
2824 unsigned int index;
2825 struct arm_unwind_table_edit *next;
2826 }
2827 arm_unwind_table_edit;
2828
2829 typedef struct _arm_elf_section_data
2830 {
2831 /* Information about mapping symbols. */
2832 struct bfd_elf_section_data elf;
2833 unsigned int mapcount;
2834 unsigned int mapsize;
2835 elf32_arm_section_map *map;
2836 /* Information about CPU errata. */
2837 unsigned int erratumcount;
2838 elf32_vfp11_erratum_list *erratumlist;
2839 unsigned int stm32l4xx_erratumcount;
2840 elf32_stm32l4xx_erratum_list *stm32l4xx_erratumlist;
2841 unsigned int additional_reloc_count;
2842 /* Information about unwind tables. */
2843 union
2844 {
2845 /* Unwind info attached to a text section. */
2846 struct
2847 {
2848 asection *arm_exidx_sec;
2849 } text;
2850
2851 /* Unwind info attached to an .ARM.exidx section. */
2852 struct
2853 {
2854 arm_unwind_table_edit *unwind_edit_list;
2855 arm_unwind_table_edit *unwind_edit_tail;
2856 } exidx;
2857 } u;
2858 }
2859 _arm_elf_section_data;
2860
2861 #define elf32_arm_section_data(sec) \
2862 ((_arm_elf_section_data *) elf_section_data (sec))
2863
2864 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2865 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2866 so may be created multiple times: we use an array of these entries whilst
2867 relaxing which we can refresh easily, then create stubs for each potentially
2868 erratum-triggering instruction once we've settled on a solution. */
2869
2870 struct a8_erratum_fix
2871 {
2872 bfd *input_bfd;
2873 asection *section;
2874 bfd_vma offset;
2875 bfd_vma target_offset;
2876 unsigned long orig_insn;
2877 char *stub_name;
2878 enum elf32_arm_stub_type stub_type;
2879 enum arm_st_branch_type branch_type;
2880 };
2881
2882 /* A table of relocs applied to branches which might trigger Cortex-A8
2883 erratum. */
2884
2885 struct a8_erratum_reloc
2886 {
2887 bfd_vma from;
2888 bfd_vma destination;
2889 struct elf32_arm_link_hash_entry *hash;
2890 const char *sym_name;
2891 unsigned int r_type;
2892 enum arm_st_branch_type branch_type;
2893 bfd_boolean non_a8_stub;
2894 };
2895
2896 /* The size of the thread control block. */
2897 #define TCB_SIZE 8
2898
2899 /* ARM-specific information about a PLT entry, over and above the usual
2900 gotplt_union. */
2901 struct arm_plt_info
2902 {
2903 /* We reference count Thumb references to a PLT entry separately,
2904 so that we can emit the Thumb trampoline only if needed. */
2905 bfd_signed_vma thumb_refcount;
2906
2907 /* Some references from Thumb code may be eliminated by BL->BLX
2908 conversion, so record them separately. */
2909 bfd_signed_vma maybe_thumb_refcount;
2910
2911 /* How many of the recorded PLT accesses were from non-call relocations.
2912 This information is useful when deciding whether anything takes the
2913 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2914 non-call references to the function should resolve directly to the
2915 real runtime target. */
2916 unsigned int noncall_refcount;
2917
2918 /* Since PLT entries have variable size if the Thumb prologue is
2919 used, we need to record the index into .got.plt instead of
2920 recomputing it from the PLT offset. */
2921 bfd_signed_vma got_offset;
2922 };
2923
2924 /* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
2925 struct arm_local_iplt_info
2926 {
2927 /* The information that is usually found in the generic ELF part of
2928 the hash table entry. */
2929 union gotplt_union root;
2930
2931 /* The information that is usually found in the ARM-specific part of
2932 the hash table entry. */
2933 struct arm_plt_info arm;
2934
2935 /* A list of all potential dynamic relocations against this symbol. */
2936 struct elf_dyn_relocs *dyn_relocs;
2937 };
2938
2939 struct elf_arm_obj_tdata
2940 {
2941 struct elf_obj_tdata root;
2942
2943 /* tls_type for each local got entry. */
2944 char *local_got_tls_type;
2945
2946 /* GOTPLT entries for TLS descriptors. */
2947 bfd_vma *local_tlsdesc_gotent;
2948
2949 /* Information for local symbols that need entries in .iplt. */
2950 struct arm_local_iplt_info **local_iplt;
2951
2952 /* Zero to warn when linking objects with incompatible enum sizes. */
2953 int no_enum_size_warning;
2954
2955 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2956 int no_wchar_size_warning;
2957 };
2958
2959 #define elf_arm_tdata(bfd) \
2960 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2961
2962 #define elf32_arm_local_got_tls_type(bfd) \
2963 (elf_arm_tdata (bfd)->local_got_tls_type)
2964
2965 #define elf32_arm_local_tlsdesc_gotent(bfd) \
2966 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2967
2968 #define elf32_arm_local_iplt(bfd) \
2969 (elf_arm_tdata (bfd)->local_iplt)
2970
2971 #define is_arm_elf(bfd) \
2972 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2973 && elf_tdata (bfd) != NULL \
2974 && elf_object_id (bfd) == ARM_ELF_DATA)
2975
2976 static bfd_boolean
2977 elf32_arm_mkobject (bfd *abfd)
2978 {
2979 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2980 ARM_ELF_DATA);
2981 }
2982
2983 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2984
2985 /* Arm ELF linker hash entry. */
2986 struct elf32_arm_link_hash_entry
2987 {
2988 struct elf_link_hash_entry root;
2989
2990 /* Track dynamic relocs copied for this symbol. */
2991 struct elf_dyn_relocs *dyn_relocs;
2992
2993 /* ARM-specific PLT information. */
2994 struct arm_plt_info plt;
2995
2996 #define GOT_UNKNOWN 0
2997 #define GOT_NORMAL 1
2998 #define GOT_TLS_GD 2
2999 #define GOT_TLS_IE 4
3000 #define GOT_TLS_GDESC 8
3001 #define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
3002 unsigned int tls_type : 8;
3003
3004 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
3005 unsigned int is_iplt : 1;
3006
3007 unsigned int unused : 23;
3008
3009 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
3010 starting at the end of the jump table. */
3011 bfd_vma tlsdesc_got;
3012
3013 /* The symbol marking the real symbol location for exported thumb
3014 symbols with Arm stubs. */
3015 struct elf_link_hash_entry *export_glue;
3016
3017 /* A pointer to the most recently used stub hash entry against this
3018 symbol. */
3019 struct elf32_arm_stub_hash_entry *stub_cache;
3020 };
3021
3022 /* Traverse an arm ELF linker hash table. */
3023 #define elf32_arm_link_hash_traverse(table, func, info) \
3024 (elf_link_hash_traverse \
3025 (&(table)->root, \
3026 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
3027 (info)))
3028
3029 /* Get the ARM elf linker hash table from a link_info structure. */
3030 #define elf32_arm_hash_table(info) \
3031 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
3032 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
3033
3034 #define arm_stub_hash_lookup(table, string, create, copy) \
3035 ((struct elf32_arm_stub_hash_entry *) \
3036 bfd_hash_lookup ((table), (string), (create), (copy)))
3037
3038 /* Array to keep track of which stub sections have been created, and
3039 information on stub grouping. */
3040 struct map_stub
3041 {
3042 /* This is the section to which stubs in the group will be
3043 attached. */
3044 asection *link_sec;
3045 /* The stub section. */
3046 asection *stub_sec;
3047 };
3048
3049 #define elf32_arm_compute_jump_table_size(htab) \
3050 ((htab)->next_tls_desc_index * 4)
3051
3052 /* ARM ELF linker hash table. */
3053 struct elf32_arm_link_hash_table
3054 {
3055 /* The main hash table. */
3056 struct elf_link_hash_table root;
3057
3058 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
3059 bfd_size_type thumb_glue_size;
3060
3061 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
3062 bfd_size_type arm_glue_size;
3063
3064 /* The size in bytes of section containing the ARMv4 BX veneers. */
3065 bfd_size_type bx_glue_size;
3066
3067 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
3068 veneer has been populated. */
3069 bfd_vma bx_glue_offset[15];
3070
3071 /* The size in bytes of the section containing glue for VFP11 erratum
3072 veneers. */
3073 bfd_size_type vfp11_erratum_glue_size;
3074
3075 /* The size in bytes of the section containing glue for STM32L4XX erratum
3076 veneers. */
3077 bfd_size_type stm32l4xx_erratum_glue_size;
3078
3079 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
3080 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
3081 elf32_arm_write_section(). */
3082 struct a8_erratum_fix *a8_erratum_fixes;
3083 unsigned int num_a8_erratum_fixes;
3084
3085 /* An arbitrary input BFD chosen to hold the glue sections. */
3086 bfd * bfd_of_glue_owner;
3087
3088 /* Nonzero to output a BE8 image. */
3089 int byteswap_code;
3090
3091 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
3092 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
3093 int target1_is_rel;
3094
3095 /* The relocation to use for R_ARM_TARGET2 relocations. */
3096 int target2_reloc;
3097
3098 /* 0 = Ignore R_ARM_V4BX.
3099 1 = Convert BX to MOV PC.
3100 2 = Generate v4 interworing stubs. */
3101 int fix_v4bx;
3102
3103 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
3104 int fix_cortex_a8;
3105
3106 /* Whether we should fix the ARM1176 BLX immediate issue. */
3107 int fix_arm1176;
3108
3109 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
3110 int use_blx;
3111
3112 /* What sort of code sequences we should look for which may trigger the
3113 VFP11 denorm erratum. */
3114 bfd_arm_vfp11_fix vfp11_fix;
3115
3116 /* Global counter for the number of fixes we have emitted. */
3117 int num_vfp11_fixes;
3118
3119 /* What sort of code sequences we should look for which may trigger the
3120 STM32L4XX erratum. */
3121 bfd_arm_stm32l4xx_fix stm32l4xx_fix;
3122
3123 /* Global counter for the number of fixes we have emitted. */
3124 int num_stm32l4xx_fixes;
3125
3126 /* Nonzero to force PIC branch veneers. */
3127 int pic_veneer;
3128
3129 /* The number of bytes in the initial entry in the PLT. */
3130 bfd_size_type plt_header_size;
3131
3132 /* The number of bytes in the subsequent PLT etries. */
3133 bfd_size_type plt_entry_size;
3134
3135 /* True if the target system is VxWorks. */
3136 int vxworks_p;
3137
3138 /* True if the target system is Symbian OS. */
3139 int symbian_p;
3140
3141 /* True if the target system is Native Client. */
3142 int nacl_p;
3143
3144 /* True if the target uses REL relocations. */
3145 int use_rel;
3146
3147 /* Nonzero if import library must be a secure gateway import library
3148 as per ARMv8-M Security Extensions. */
3149 int cmse_implib;
3150
3151 /* The import library whose symbols' address must remain stable in
3152 the import library generated. */
3153 bfd *in_implib_bfd;
3154
3155 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3156 bfd_vma next_tls_desc_index;
3157
3158 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3159 bfd_vma num_tls_desc;
3160
3161 /* Short-cuts to get to dynamic linker sections. */
3162 asection *sdynbss;
3163 asection *srelbss;
3164
3165 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3166 asection *srelplt2;
3167
3168 /* The offset into splt of the PLT entry for the TLS descriptor
3169 resolver. Special values are 0, if not necessary (or not found
3170 to be necessary yet), and -1 if needed but not determined
3171 yet. */
3172 bfd_vma dt_tlsdesc_plt;
3173
3174 /* The offset into sgot of the GOT entry used by the PLT entry
3175 above. */
3176 bfd_vma dt_tlsdesc_got;
3177
3178 /* Offset in .plt section of tls_arm_trampoline. */
3179 bfd_vma tls_trampoline;
3180
3181 /* Data for R_ARM_TLS_LDM32 relocations. */
3182 union
3183 {
3184 bfd_signed_vma refcount;
3185 bfd_vma offset;
3186 } tls_ldm_got;
3187
3188 /* Small local sym cache. */
3189 struct sym_cache sym_cache;
3190
3191 /* For convenience in allocate_dynrelocs. */
3192 bfd * obfd;
3193
3194 /* The amount of space used by the reserved portion of the sgotplt
3195 section, plus whatever space is used by the jump slots. */
3196 bfd_vma sgotplt_jump_table_size;
3197
3198 /* The stub hash table. */
3199 struct bfd_hash_table stub_hash_table;
3200
3201 /* Linker stub bfd. */
3202 bfd *stub_bfd;
3203
3204 /* Linker call-backs. */
3205 asection * (*add_stub_section) (const char *, asection *, asection *,
3206 unsigned int);
3207 void (*layout_sections_again) (void);
3208
3209 /* Array to keep track of which stub sections have been created, and
3210 information on stub grouping. */
3211 struct map_stub *stub_group;
3212
3213 /* Input stub section holding secure gateway veneers. */
3214 asection *cmse_stub_sec;
3215
3216 /* Offset in cmse_stub_sec where new SG veneers (not in input import library)
3217 start to be allocated. */
3218 bfd_vma new_cmse_stub_offset;
3219
3220 /* Number of elements in stub_group. */
3221 unsigned int top_id;
3222
3223 /* Assorted information used by elf32_arm_size_stubs. */
3224 unsigned int bfd_count;
3225 unsigned int top_index;
3226 asection **input_list;
3227 };
3228
3229 static inline int
3230 ctz (unsigned int mask)
3231 {
3232 #if GCC_VERSION >= 3004
3233 return __builtin_ctz (mask);
3234 #else
3235 unsigned int i;
3236
3237 for (i = 0; i < 8 * sizeof (mask); i++)
3238 {
3239 if (mask & 0x1)
3240 break;
3241 mask = (mask >> 1);
3242 }
3243 return i;
3244 #endif
3245 }
3246
3247 static inline int
3248 popcount (unsigned int mask)
3249 {
3250 #if GCC_VERSION >= 3004
3251 return __builtin_popcount (mask);
3252 #else
3253 unsigned int i, sum = 0;
3254
3255 for (i = 0; i < 8 * sizeof (mask); i++)
3256 {
3257 if (mask & 0x1)
3258 sum++;
3259 mask = (mask >> 1);
3260 }
3261 return sum;
3262 #endif
3263 }
3264
3265 /* Create an entry in an ARM ELF linker hash table. */
3266
3267 static struct bfd_hash_entry *
3268 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
3269 struct bfd_hash_table * table,
3270 const char * string)
3271 {
3272 struct elf32_arm_link_hash_entry * ret =
3273 (struct elf32_arm_link_hash_entry *) entry;
3274
3275 /* Allocate the structure if it has not already been allocated by a
3276 subclass. */
3277 if (ret == NULL)
3278 ret = (struct elf32_arm_link_hash_entry *)
3279 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
3280 if (ret == NULL)
3281 return (struct bfd_hash_entry *) ret;
3282
3283 /* Call the allocation method of the superclass. */
3284 ret = ((struct elf32_arm_link_hash_entry *)
3285 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3286 table, string));
3287 if (ret != NULL)
3288 {
3289 ret->dyn_relocs = NULL;
3290 ret->tls_type = GOT_UNKNOWN;
3291 ret->tlsdesc_got = (bfd_vma) -1;
3292 ret->plt.thumb_refcount = 0;
3293 ret->plt.maybe_thumb_refcount = 0;
3294 ret->plt.noncall_refcount = 0;
3295 ret->plt.got_offset = -1;
3296 ret->is_iplt = FALSE;
3297 ret->export_glue = NULL;
3298
3299 ret->stub_cache = NULL;
3300 }
3301
3302 return (struct bfd_hash_entry *) ret;
3303 }
3304
3305 /* Ensure that we have allocated bookkeeping structures for ABFD's local
3306 symbols. */
3307
3308 static bfd_boolean
3309 elf32_arm_allocate_local_sym_info (bfd *abfd)
3310 {
3311 if (elf_local_got_refcounts (abfd) == NULL)
3312 {
3313 bfd_size_type num_syms;
3314 bfd_size_type size;
3315 char *data;
3316
3317 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3318 size = num_syms * (sizeof (bfd_signed_vma)
3319 + sizeof (struct arm_local_iplt_info *)
3320 + sizeof (bfd_vma)
3321 + sizeof (char));
3322 data = bfd_zalloc (abfd, size);
3323 if (data == NULL)
3324 return FALSE;
3325
3326 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3327 data += num_syms * sizeof (bfd_signed_vma);
3328
3329 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3330 data += num_syms * sizeof (struct arm_local_iplt_info *);
3331
3332 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3333 data += num_syms * sizeof (bfd_vma);
3334
3335 elf32_arm_local_got_tls_type (abfd) = data;
3336 }
3337 return TRUE;
3338 }
3339
3340 /* Return the .iplt information for local symbol R_SYMNDX, which belongs
3341 to input bfd ABFD. Create the information if it doesn't already exist.
3342 Return null if an allocation fails. */
3343
3344 static struct arm_local_iplt_info *
3345 elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3346 {
3347 struct arm_local_iplt_info **ptr;
3348
3349 if (!elf32_arm_allocate_local_sym_info (abfd))
3350 return NULL;
3351
3352 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3353 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3354 if (*ptr == NULL)
3355 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3356 return *ptr;
3357 }
3358
3359 /* Try to obtain PLT information for the symbol with index R_SYMNDX
3360 in ABFD's symbol table. If the symbol is global, H points to its
3361 hash table entry, otherwise H is null.
3362
3363 Return true if the symbol does have PLT information. When returning
3364 true, point *ROOT_PLT at the target-independent reference count/offset
3365 union and *ARM_PLT at the ARM-specific information. */
3366
3367 static bfd_boolean
3368 elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_table *globals,
3369 struct elf32_arm_link_hash_entry *h,
3370 unsigned long r_symndx, union gotplt_union **root_plt,
3371 struct arm_plt_info **arm_plt)
3372 {
3373 struct arm_local_iplt_info *local_iplt;
3374
3375 if (globals->root.splt == NULL && globals->root.iplt == NULL)
3376 return FALSE;
3377
3378 if (h != NULL)
3379 {
3380 *root_plt = &h->root.plt;
3381 *arm_plt = &h->plt;
3382 return TRUE;
3383 }
3384
3385 if (elf32_arm_local_iplt (abfd) == NULL)
3386 return FALSE;
3387
3388 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3389 if (local_iplt == NULL)
3390 return FALSE;
3391
3392 *root_plt = &local_iplt->root;
3393 *arm_plt = &local_iplt->arm;
3394 return TRUE;
3395 }
3396
3397 /* Return true if the PLT described by ARM_PLT requires a Thumb stub
3398 before it. */
3399
3400 static bfd_boolean
3401 elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3402 struct arm_plt_info *arm_plt)
3403 {
3404 struct elf32_arm_link_hash_table *htab;
3405
3406 htab = elf32_arm_hash_table (info);
3407 return (arm_plt->thumb_refcount != 0
3408 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3409 }
3410
3411 /* Return a pointer to the head of the dynamic reloc list that should
3412 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3413 ABFD's symbol table. Return null if an error occurs. */
3414
3415 static struct elf_dyn_relocs **
3416 elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3417 Elf_Internal_Sym *isym)
3418 {
3419 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3420 {
3421 struct arm_local_iplt_info *local_iplt;
3422
3423 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3424 if (local_iplt == NULL)
3425 return NULL;
3426 return &local_iplt->dyn_relocs;
3427 }
3428 else
3429 {
3430 /* Track dynamic relocs needed for local syms too.
3431 We really need local syms available to do this
3432 easily. Oh well. */
3433 asection *s;
3434 void *vpp;
3435
3436 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3437 if (s == NULL)
3438 abort ();
3439
3440 vpp = &elf_section_data (s)->local_dynrel;
3441 return (struct elf_dyn_relocs **) vpp;
3442 }
3443 }
3444
3445 /* Initialize an entry in the stub hash table. */
3446
3447 static struct bfd_hash_entry *
3448 stub_hash_newfunc (struct bfd_hash_entry *entry,
3449 struct bfd_hash_table *table,
3450 const char *string)
3451 {
3452 /* Allocate the structure if it has not already been allocated by a
3453 subclass. */
3454 if (entry == NULL)
3455 {
3456 entry = (struct bfd_hash_entry *)
3457 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
3458 if (entry == NULL)
3459 return entry;
3460 }
3461
3462 /* Call the allocation method of the superclass. */
3463 entry = bfd_hash_newfunc (entry, table, string);
3464 if (entry != NULL)
3465 {
3466 struct elf32_arm_stub_hash_entry *eh;
3467
3468 /* Initialize the local fields. */
3469 eh = (struct elf32_arm_stub_hash_entry *) entry;
3470 eh->stub_sec = NULL;
3471 eh->stub_offset = (bfd_vma) -1;
3472 eh->source_value = 0;
3473 eh->target_value = 0;
3474 eh->target_section = NULL;
3475 eh->orig_insn = 0;
3476 eh->stub_type = arm_stub_none;
3477 eh->stub_size = 0;
3478 eh->stub_template = NULL;
3479 eh->stub_template_size = -1;
3480 eh->h = NULL;
3481 eh->id_sec = NULL;
3482 eh->output_name = NULL;
3483 }
3484
3485 return entry;
3486 }
3487
3488 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
3489 shortcuts to them in our hash table. */
3490
3491 static bfd_boolean
3492 create_got_section (bfd *dynobj, struct bfd_link_info *info)
3493 {
3494 struct elf32_arm_link_hash_table *htab;
3495
3496 htab = elf32_arm_hash_table (info);
3497 if (htab == NULL)
3498 return FALSE;
3499
3500 /* BPABI objects never have a GOT, or associated sections. */
3501 if (htab->symbian_p)
3502 return TRUE;
3503
3504 if (! _bfd_elf_create_got_section (dynobj, info))
3505 return FALSE;
3506
3507 return TRUE;
3508 }
3509
3510 /* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3511
3512 static bfd_boolean
3513 create_ifunc_sections (struct bfd_link_info *info)
3514 {
3515 struct elf32_arm_link_hash_table *htab;
3516 const struct elf_backend_data *bed;
3517 bfd *dynobj;
3518 asection *s;
3519 flagword flags;
3520
3521 htab = elf32_arm_hash_table (info);
3522 dynobj = htab->root.dynobj;
3523 bed = get_elf_backend_data (dynobj);
3524 flags = bed->dynamic_sec_flags;
3525
3526 if (htab->root.iplt == NULL)
3527 {
3528 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3529 flags | SEC_READONLY | SEC_CODE);
3530 if (s == NULL
3531 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
3532 return FALSE;
3533 htab->root.iplt = s;
3534 }
3535
3536 if (htab->root.irelplt == NULL)
3537 {
3538 s = bfd_make_section_anyway_with_flags (dynobj,
3539 RELOC_SECTION (htab, ".iplt"),
3540 flags | SEC_READONLY);
3541 if (s == NULL
3542 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3543 return FALSE;
3544 htab->root.irelplt = s;
3545 }
3546
3547 if (htab->root.igotplt == NULL)
3548 {
3549 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
3550 if (s == NULL
3551 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3552 return FALSE;
3553 htab->root.igotplt = s;
3554 }
3555 return TRUE;
3556 }
3557
3558 /* Determine if we're dealing with a Thumb only architecture. */
3559
3560 static bfd_boolean
3561 using_thumb_only (struct elf32_arm_link_hash_table *globals)
3562 {
3563 int arch;
3564 int profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3565 Tag_CPU_arch_profile);
3566
3567 if (profile)
3568 return profile == 'M';
3569
3570 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3571
3572 /* Force return logic to be reviewed for each new architecture. */
3573 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3574 || arch == TAG_CPU_ARCH_V8M_BASE
3575 || arch == TAG_CPU_ARCH_V8M_MAIN);
3576
3577 if (arch == TAG_CPU_ARCH_V6_M
3578 || arch == TAG_CPU_ARCH_V6S_M
3579 || arch == TAG_CPU_ARCH_V7E_M
3580 || arch == TAG_CPU_ARCH_V8M_BASE
3581 || arch == TAG_CPU_ARCH_V8M_MAIN)
3582 return TRUE;
3583
3584 return FALSE;
3585 }
3586
3587 /* Determine if we're dealing with a Thumb-2 object. */
3588
3589 static bfd_boolean
3590 using_thumb2 (struct elf32_arm_link_hash_table *globals)
3591 {
3592 int arch;
3593 int thumb_isa = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3594 Tag_THUMB_ISA_use);
3595
3596 if (thumb_isa)
3597 return thumb_isa == 2;
3598
3599 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3600
3601 /* Force return logic to be reviewed for each new architecture. */
3602 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3603 || arch == TAG_CPU_ARCH_V8M_BASE
3604 || arch == TAG_CPU_ARCH_V8M_MAIN);
3605
3606 return (arch == TAG_CPU_ARCH_V6T2
3607 || arch == TAG_CPU_ARCH_V7
3608 || arch == TAG_CPU_ARCH_V7E_M
3609 || arch == TAG_CPU_ARCH_V8
3610 || arch == TAG_CPU_ARCH_V8M_MAIN);
3611 }
3612
3613 /* Determine whether Thumb-2 BL instruction is available. */
3614
3615 static bfd_boolean
3616 using_thumb2_bl (struct elf32_arm_link_hash_table *globals)
3617 {
3618 int arch =
3619 bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3620
3621 /* Force return logic to be reviewed for each new architecture. */
3622 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3623 || arch == TAG_CPU_ARCH_V8M_BASE
3624 || arch == TAG_CPU_ARCH_V8M_MAIN);
3625
3626 /* Architecture was introduced after ARMv6T2 (eg. ARMv6-M). */
3627 return (arch == TAG_CPU_ARCH_V6T2
3628 || arch >= TAG_CPU_ARCH_V7);
3629 }
3630
3631 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3632 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
3633 hash table. */
3634
3635 static bfd_boolean
3636 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
3637 {
3638 struct elf32_arm_link_hash_table *htab;
3639
3640 htab = elf32_arm_hash_table (info);
3641 if (htab == NULL)
3642 return FALSE;
3643
3644 if (!htab->root.sgot && !create_got_section (dynobj, info))
3645 return FALSE;
3646
3647 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3648 return FALSE;
3649
3650 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
3651 if (!bfd_link_pic (info))
3652 htab->srelbss = bfd_get_linker_section (dynobj,
3653 RELOC_SECTION (htab, ".bss"));
3654
3655 if (htab->vxworks_p)
3656 {
3657 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3658 return FALSE;
3659
3660 if (bfd_link_pic (info))
3661 {
3662 htab->plt_header_size = 0;
3663 htab->plt_entry_size
3664 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3665 }
3666 else
3667 {
3668 htab->plt_header_size
3669 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3670 htab->plt_entry_size
3671 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3672 }
3673
3674 if (elf_elfheader (dynobj))
3675 elf_elfheader (dynobj)->e_ident[EI_CLASS] = ELFCLASS32;
3676 }
3677 else
3678 {
3679 /* PR ld/16017
3680 Test for thumb only architectures. Note - we cannot just call
3681 using_thumb_only() as the attributes in the output bfd have not been
3682 initialised at this point, so instead we use the input bfd. */
3683 bfd * saved_obfd = htab->obfd;
3684
3685 htab->obfd = dynobj;
3686 if (using_thumb_only (htab))
3687 {
3688 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3689 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3690 }
3691 htab->obfd = saved_obfd;
3692 }
3693
3694 if (!htab->root.splt
3695 || !htab->root.srelplt
3696 || !htab->sdynbss
3697 || (!bfd_link_pic (info) && !htab->srelbss))
3698 abort ();
3699
3700 return TRUE;
3701 }
3702
3703 /* Copy the extra info we tack onto an elf_link_hash_entry. */
3704
3705 static void
3706 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3707 struct elf_link_hash_entry *dir,
3708 struct elf_link_hash_entry *ind)
3709 {
3710 struct elf32_arm_link_hash_entry *edir, *eind;
3711
3712 edir = (struct elf32_arm_link_hash_entry *) dir;
3713 eind = (struct elf32_arm_link_hash_entry *) ind;
3714
3715 if (eind->dyn_relocs != NULL)
3716 {
3717 if (edir->dyn_relocs != NULL)
3718 {
3719 struct elf_dyn_relocs **pp;
3720 struct elf_dyn_relocs *p;
3721
3722 /* Add reloc counts against the indirect sym to the direct sym
3723 list. Merge any entries against the same section. */
3724 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
3725 {
3726 struct elf_dyn_relocs *q;
3727
3728 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3729 if (q->sec == p->sec)
3730 {
3731 q->pc_count += p->pc_count;
3732 q->count += p->count;
3733 *pp = p->next;
3734 break;
3735 }
3736 if (q == NULL)
3737 pp = &p->next;
3738 }
3739 *pp = edir->dyn_relocs;
3740 }
3741
3742 edir->dyn_relocs = eind->dyn_relocs;
3743 eind->dyn_relocs = NULL;
3744 }
3745
3746 if (ind->root.type == bfd_link_hash_indirect)
3747 {
3748 /* Copy over PLT info. */
3749 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3750 eind->plt.thumb_refcount = 0;
3751 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3752 eind->plt.maybe_thumb_refcount = 0;
3753 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3754 eind->plt.noncall_refcount = 0;
3755
3756 /* We should only allocate a function to .iplt once the final
3757 symbol information is known. */
3758 BFD_ASSERT (!eind->is_iplt);
3759
3760 if (dir->got.refcount <= 0)
3761 {
3762 edir->tls_type = eind->tls_type;
3763 eind->tls_type = GOT_UNKNOWN;
3764 }
3765 }
3766
3767 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3768 }
3769
3770 /* Destroy an ARM elf linker hash table. */
3771
3772 static void
3773 elf32_arm_link_hash_table_free (bfd *obfd)
3774 {
3775 struct elf32_arm_link_hash_table *ret
3776 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
3777
3778 bfd_hash_table_free (&ret->stub_hash_table);
3779 _bfd_elf_link_hash_table_free (obfd);
3780 }
3781
3782 /* Create an ARM elf linker hash table. */
3783
3784 static struct bfd_link_hash_table *
3785 elf32_arm_link_hash_table_create (bfd *abfd)
3786 {
3787 struct elf32_arm_link_hash_table *ret;
3788 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3789
3790 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
3791 if (ret == NULL)
3792 return NULL;
3793
3794 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3795 elf32_arm_link_hash_newfunc,
3796 sizeof (struct elf32_arm_link_hash_entry),
3797 ARM_ELF_DATA))
3798 {
3799 free (ret);
3800 return NULL;
3801 }
3802
3803 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3804 ret->stm32l4xx_fix = BFD_ARM_STM32L4XX_FIX_NONE;
3805 #ifdef FOUR_WORD_PLT
3806 ret->plt_header_size = 16;
3807 ret->plt_entry_size = 16;
3808 #else
3809 ret->plt_header_size = 20;
3810 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
3811 #endif
3812 ret->use_rel = 1;
3813 ret->obfd = abfd;
3814
3815 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3816 sizeof (struct elf32_arm_stub_hash_entry)))
3817 {
3818 _bfd_elf_link_hash_table_free (abfd);
3819 return NULL;
3820 }
3821 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
3822
3823 return &ret->root.root;
3824 }
3825
3826 /* Determine what kind of NOPs are available. */
3827
3828 static bfd_boolean
3829 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3830 {
3831 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3832 Tag_CPU_arch);
3833
3834 /* Force return logic to be reviewed for each new architecture. */
3835 BFD_ASSERT (arch <= TAG_CPU_ARCH_V8
3836 || arch == TAG_CPU_ARCH_V8M_BASE
3837 || arch == TAG_CPU_ARCH_V8M_MAIN);
3838
3839 return (arch == TAG_CPU_ARCH_V6T2
3840 || arch == TAG_CPU_ARCH_V6K
3841 || arch == TAG_CPU_ARCH_V7
3842 || arch == TAG_CPU_ARCH_V8);
3843 }
3844
3845 static bfd_boolean
3846 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3847 {
3848 switch (stub_type)
3849 {
3850 case arm_stub_long_branch_thumb_only:
3851 case arm_stub_long_branch_thumb2_only:
3852 case arm_stub_long_branch_thumb2_only_pure:
3853 case arm_stub_long_branch_v4t_thumb_arm:
3854 case arm_stub_short_branch_v4t_thumb_arm:
3855 case arm_stub_long_branch_v4t_thumb_arm_pic:
3856 case arm_stub_long_branch_v4t_thumb_tls_pic:
3857 case arm_stub_long_branch_thumb_only_pic:
3858 case arm_stub_cmse_branch_thumb_only:
3859 return TRUE;
3860 case arm_stub_none:
3861 BFD_FAIL ();
3862 return FALSE;
3863 break;
3864 default:
3865 return FALSE;
3866 }
3867 }
3868
3869 /* Determine the type of stub needed, if any, for a call. */
3870
3871 static enum elf32_arm_stub_type
3872 arm_type_of_stub (struct bfd_link_info *info,
3873 asection *input_sec,
3874 const Elf_Internal_Rela *rel,
3875 unsigned char st_type,
3876 enum arm_st_branch_type *actual_branch_type,
3877 struct elf32_arm_link_hash_entry *hash,
3878 bfd_vma destination,
3879 asection *sym_sec,
3880 bfd *input_bfd,
3881 const char *name)
3882 {
3883 bfd_vma location;
3884 bfd_signed_vma branch_offset;
3885 unsigned int r_type;
3886 struct elf32_arm_link_hash_table * globals;
3887 bfd_boolean thumb2, thumb2_bl, thumb_only;
3888 enum elf32_arm_stub_type stub_type = arm_stub_none;
3889 int use_plt = 0;
3890 enum arm_st_branch_type branch_type = *actual_branch_type;
3891 union gotplt_union *root_plt;
3892 struct arm_plt_info *arm_plt;
3893 int arch;
3894 int thumb2_movw;
3895
3896 if (branch_type == ST_BRANCH_LONG)
3897 return stub_type;
3898
3899 globals = elf32_arm_hash_table (info);
3900 if (globals == NULL)
3901 return stub_type;
3902
3903 thumb_only = using_thumb_only (globals);
3904 thumb2 = using_thumb2 (globals);
3905 thumb2_bl = using_thumb2_bl (globals);
3906
3907 arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, Tag_CPU_arch);
3908
3909 /* True for architectures that implement the thumb2 movw instruction. */
3910 thumb2_movw = thumb2 || (arch == TAG_CPU_ARCH_V8M_BASE);
3911
3912 /* Determine where the call point is. */
3913 location = (input_sec->output_offset
3914 + input_sec->output_section->vma
3915 + rel->r_offset);
3916
3917 r_type = ELF32_R_TYPE (rel->r_info);
3918
3919 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3920 are considering a function call relocation. */
3921 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3922 || r_type == R_ARM_THM_JUMP19)
3923 && branch_type == ST_BRANCH_TO_ARM)
3924 branch_type = ST_BRANCH_TO_THUMB;
3925
3926 /* For TLS call relocs, it is the caller's responsibility to provide
3927 the address of the appropriate trampoline. */
3928 if (r_type != R_ARM_TLS_CALL
3929 && r_type != R_ARM_THM_TLS_CALL
3930 && elf32_arm_get_plt_info (input_bfd, globals, hash,
3931 ELF32_R_SYM (rel->r_info), &root_plt,
3932 &arm_plt)
3933 && root_plt->offset != (bfd_vma) -1)
3934 {
3935 asection *splt;
3936
3937 if (hash == NULL || hash->is_iplt)
3938 splt = globals->root.iplt;
3939 else
3940 splt = globals->root.splt;
3941 if (splt != NULL)
3942 {
3943 use_plt = 1;
3944
3945 /* Note when dealing with PLT entries: the main PLT stub is in
3946 ARM mode, so if the branch is in Thumb mode, another
3947 Thumb->ARM stub will be inserted later just before the ARM
3948 PLT stub. If a long branch stub is needed, we'll add a
3949 Thumb->Arm one and branch directly to the ARM PLT entry.
3950 Here, we have to check if a pre-PLT Thumb->ARM stub
3951 is needed and if it will be close enough. */
3952
3953 destination = (splt->output_section->vma
3954 + splt->output_offset
3955 + root_plt->offset);
3956 st_type = STT_FUNC;
3957
3958 /* Thumb branch/call to PLT: it can become a branch to ARM
3959 or to Thumb. We must perform the same checks and
3960 corrections as in elf32_arm_final_link_relocate. */
3961 if ((r_type == R_ARM_THM_CALL)
3962 || (r_type == R_ARM_THM_JUMP24))
3963 {
3964 if (globals->use_blx
3965 && r_type == R_ARM_THM_CALL
3966 && !thumb_only)
3967 {
3968 /* If the Thumb BLX instruction is available, convert
3969 the BL to a BLX instruction to call the ARM-mode
3970 PLT entry. */
3971 branch_type = ST_BRANCH_TO_ARM;
3972 }
3973 else
3974 {
3975 if (!thumb_only)
3976 /* Target the Thumb stub before the ARM PLT entry. */
3977 destination -= PLT_THUMB_STUB_SIZE;
3978 branch_type = ST_BRANCH_TO_THUMB;
3979 }
3980 }
3981 else
3982 {
3983 branch_type = ST_BRANCH_TO_ARM;
3984 }
3985 }
3986 }
3987 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3988 BFD_ASSERT (st_type != STT_GNU_IFUNC);
3989
3990 branch_offset = (bfd_signed_vma)(destination - location);
3991
3992 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3993 || r_type == R_ARM_THM_TLS_CALL || r_type == R_ARM_THM_JUMP19)
3994 {
3995 /* Handle cases where:
3996 - this call goes too far (different Thumb/Thumb2 max
3997 distance)
3998 - it's a Thumb->Arm call and blx is not available, or it's a
3999 Thumb->Arm branch (not bl). A stub is needed in this case,
4000 but only if this call is not through a PLT entry. Indeed,
4001 PLT stubs handle mode switching already.
4002 */
4003 if ((!thumb2_bl
4004 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4005 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4006 || (thumb2_bl
4007 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4008 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4009 || (thumb2
4010 && (branch_offset > THM2_MAX_FWD_COND_BRANCH_OFFSET
4011 || (branch_offset < THM2_MAX_BWD_COND_BRANCH_OFFSET))
4012 && (r_type == R_ARM_THM_JUMP19))
4013 || (branch_type == ST_BRANCH_TO_ARM
4014 && (((r_type == R_ARM_THM_CALL
4015 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
4016 || (r_type == R_ARM_THM_JUMP24)
4017 || (r_type == R_ARM_THM_JUMP19))
4018 && !use_plt))
4019 {
4020 /* If we need to insert a Thumb-Thumb long branch stub to a
4021 PLT, use one that branches directly to the ARM PLT
4022 stub. If we pretended we'd use the pre-PLT Thumb->ARM
4023 stub, undo this now. */
4024 if ((branch_type == ST_BRANCH_TO_THUMB) && use_plt && !thumb_only) {
4025 branch_type = ST_BRANCH_TO_ARM;
4026 branch_offset += PLT_THUMB_STUB_SIZE;
4027 }
4028
4029 if (branch_type == ST_BRANCH_TO_THUMB)
4030 {
4031 /* Thumb to thumb. */
4032 if (!thumb_only)
4033 {
4034 if (input_sec->flags & SEC_ELF_PURECODE)
4035 _bfd_error_handler (_("%B(%s): warning: long branch "
4036 " veneers used in section with "
4037 "SHF_ARM_PURECODE section "
4038 "attribute is only supported"
4039 " for M-profile targets that "
4040 "implement the movw "
4041 "instruction."));
4042
4043 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4044 /* PIC stubs. */
4045 ? ((globals->use_blx
4046 && (r_type == R_ARM_THM_CALL))
4047 /* V5T and above. Stub starts with ARM code, so
4048 we must be able to switch mode before
4049 reaching it, which is only possible for 'bl'
4050 (ie R_ARM_THM_CALL relocation). */
4051 ? arm_stub_long_branch_any_thumb_pic
4052 /* On V4T, use Thumb code only. */
4053 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4054
4055 /* non-PIC stubs. */
4056 : ((globals->use_blx
4057 && (r_type == R_ARM_THM_CALL))
4058 /* V5T and above. */
4059 ? arm_stub_long_branch_any_any
4060 /* V4T. */
4061 : arm_stub_long_branch_v4t_thumb_thumb);
4062 }
4063 else
4064 {
4065 if (thumb2_movw && (input_sec->flags & SEC_ELF_PURECODE))
4066 stub_type = arm_stub_long_branch_thumb2_only_pure;
4067 else
4068 {
4069 if (input_sec->flags & SEC_ELF_PURECODE)
4070 _bfd_error_handler (_("%B(%s): warning: long branch "
4071 " veneers used in section with "
4072 "SHF_ARM_PURECODE section "
4073 "attribute is only supported"
4074 " for M-profile targets that "
4075 "implement the movw "
4076 "instruction."));
4077
4078 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4079 /* PIC stub. */
4080 ? arm_stub_long_branch_thumb_only_pic
4081 /* non-PIC stub. */
4082 : (thumb2 ? arm_stub_long_branch_thumb2_only
4083 : arm_stub_long_branch_thumb_only);
4084 }
4085 }
4086 }
4087 else
4088 {
4089 if (input_sec->flags & SEC_ELF_PURECODE)
4090 _bfd_error_handler (_("%B(%s): warning: long branch "
4091 " veneers used in section with "
4092 "SHF_ARM_PURECODE section "
4093 "attribute is only supported"
4094 " for M-profile targets that "
4095 "implement the movw "
4096 "instruction."));
4097
4098 /* Thumb to arm. */
4099 if (sym_sec != NULL
4100 && sym_sec->owner != NULL
4101 && !INTERWORK_FLAG (sym_sec->owner))
4102 {
4103 _bfd_error_handler
4104 (_("%B(%s): warning: interworking not enabled.\n"
4105 " first occurrence: %B: Thumb call to ARM"),
4106 sym_sec->owner, input_bfd, name);
4107 }
4108
4109 stub_type =
4110 (bfd_link_pic (info) | globals->pic_veneer)
4111 /* PIC stubs. */
4112 ? (r_type == R_ARM_THM_TLS_CALL
4113 /* TLS PIC stubs. */
4114 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
4115 : arm_stub_long_branch_v4t_thumb_tls_pic)
4116 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4117 /* V5T PIC and above. */
4118 ? arm_stub_long_branch_any_arm_pic
4119 /* V4T PIC stub. */
4120 : arm_stub_long_branch_v4t_thumb_arm_pic))
4121
4122 /* non-PIC stubs. */
4123 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
4124 /* V5T and above. */
4125 ? arm_stub_long_branch_any_any
4126 /* V4T. */
4127 : arm_stub_long_branch_v4t_thumb_arm);
4128
4129 /* Handle v4t short branches. */
4130 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4131 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4132 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4133 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4134 }
4135 }
4136 }
4137 else if (r_type == R_ARM_CALL
4138 || r_type == R_ARM_JUMP24
4139 || r_type == R_ARM_PLT32
4140 || r_type == R_ARM_TLS_CALL)
4141 {
4142 if (input_sec->flags & SEC_ELF_PURECODE)
4143 _bfd_error_handler (_("%B(%s): warning: long branch "
4144 " veneers used in section with "
4145 "SHF_ARM_PURECODE section "
4146 "attribute is only supported"
4147 " for M-profile targets that "
4148 "implement the movw "
4149 "instruction."));
4150 if (branch_type == ST_BRANCH_TO_THUMB)
4151 {
4152 /* Arm to thumb. */
4153
4154 if (sym_sec != NULL
4155 && sym_sec->owner != NULL
4156 && !INTERWORK_FLAG (sym_sec->owner))
4157 {
4158 _bfd_error_handler
4159 (_("%B(%s): warning: interworking not enabled.\n"
4160 " first occurrence: %B: ARM call to Thumb"),
4161 sym_sec->owner, input_bfd, name);
4162 }
4163
4164 /* We have an extra 2-bytes reach because of
4165 the mode change (bit 24 (H) of BLX encoding). */
4166 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4167 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4168 || (r_type == R_ARM_CALL && !globals->use_blx)
4169 || (r_type == R_ARM_JUMP24)
4170 || (r_type == R_ARM_PLT32))
4171 {
4172 stub_type = (bfd_link_pic (info) | globals->pic_veneer)
4173 /* PIC stubs. */
4174 ? ((globals->use_blx)
4175 /* V5T and above. */
4176 ? arm_stub_long_branch_any_thumb_pic
4177 /* V4T stub. */
4178 : arm_stub_long_branch_v4t_arm_thumb_pic)
4179
4180 /* non-PIC stubs. */
4181 : ((globals->use_blx)
4182 /* V5T and above. */
4183 ? arm_stub_long_branch_any_any
4184 /* V4T. */
4185 : arm_stub_long_branch_v4t_arm_thumb);
4186 }
4187 }
4188 else
4189 {
4190 /* Arm to arm. */
4191 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4192 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4193 {
4194 stub_type =
4195 (bfd_link_pic (info) | globals->pic_veneer)
4196 /* PIC stubs. */
4197 ? (r_type == R_ARM_TLS_CALL
4198 /* TLS PIC Stub. */
4199 ? arm_stub_long_branch_any_tls_pic
4200 : (globals->nacl_p
4201 ? arm_stub_long_branch_arm_nacl_pic
4202 : arm_stub_long_branch_any_arm_pic))
4203 /* non-PIC stubs. */
4204 : (globals->nacl_p
4205 ? arm_stub_long_branch_arm_nacl
4206 : arm_stub_long_branch_any_any);
4207 }
4208 }
4209 }
4210
4211 /* If a stub is needed, record the actual destination type. */
4212 if (stub_type != arm_stub_none)
4213 *actual_branch_type = branch_type;
4214
4215 return stub_type;
4216 }
4217
4218 /* Build a name for an entry in the stub hash table. */
4219
4220 static char *
4221 elf32_arm_stub_name (const asection *input_section,
4222 const asection *sym_sec,
4223 const struct elf32_arm_link_hash_entry *hash,
4224 const Elf_Internal_Rela *rel,
4225 enum elf32_arm_stub_type stub_type)
4226 {
4227 char *stub_name;
4228 bfd_size_type len;
4229
4230 if (hash)
4231 {
4232 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
4233 stub_name = (char *) bfd_malloc (len);
4234 if (stub_name != NULL)
4235 sprintf (stub_name, "%08x_%s+%x_%d",
4236 input_section->id & 0xffffffff,
4237 hash->root.root.root.string,
4238 (int) rel->r_addend & 0xffffffff,
4239 (int) stub_type);
4240 }
4241 else
4242 {
4243 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
4244 stub_name = (char *) bfd_malloc (len);
4245 if (stub_name != NULL)
4246 sprintf (stub_name, "%08x_%x:%x+%x_%d",
4247 input_section->id & 0xffffffff,
4248 sym_sec->id & 0xffffffff,
4249 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
4250 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
4251 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
4252 (int) rel->r_addend & 0xffffffff,
4253 (int) stub_type);
4254 }
4255
4256 return stub_name;
4257 }
4258
4259 /* Look up an entry in the stub hash. Stub entries are cached because
4260 creating the stub name takes a bit of time. */
4261
4262 static struct elf32_arm_stub_hash_entry *
4263 elf32_arm_get_stub_entry (const asection *input_section,
4264 const asection *sym_sec,
4265 struct elf_link_hash_entry *hash,
4266 const Elf_Internal_Rela *rel,
4267 struct elf32_arm_link_hash_table *htab,
4268 enum elf32_arm_stub_type stub_type)
4269 {
4270 struct elf32_arm_stub_hash_entry *stub_entry;
4271 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
4272 const asection *id_sec;
4273
4274 if ((input_section->flags & SEC_CODE) == 0)
4275 return NULL;
4276
4277 /* If this input section is part of a group of sections sharing one
4278 stub section, then use the id of the first section in the group.
4279 Stub names need to include a section id, as there may well be
4280 more than one stub used to reach say, printf, and we need to
4281 distinguish between them. */
4282 BFD_ASSERT (input_section->id <= htab->top_id);
4283 id_sec = htab->stub_group[input_section->id].link_sec;
4284
4285 if (h != NULL && h->stub_cache != NULL
4286 && h->stub_cache->h == h
4287 && h->stub_cache->id_sec == id_sec
4288 && h->stub_cache->stub_type == stub_type)
4289 {
4290 stub_entry = h->stub_cache;
4291 }
4292 else
4293 {
4294 char *stub_name;
4295
4296 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
4297 if (stub_name == NULL)
4298 return NULL;
4299
4300 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
4301 stub_name, FALSE, FALSE);
4302 if (h != NULL)
4303 h->stub_cache = stub_entry;
4304
4305 free (stub_name);
4306 }
4307
4308 return stub_entry;
4309 }
4310
4311 /* Whether veneers of type STUB_TYPE require to be in a dedicated output
4312 section. */
4313
4314 static bfd_boolean
4315 arm_dedicated_stub_output_section_required (enum elf32_arm_stub_type stub_type)
4316 {
4317 if (stub_type >= max_stub_type)
4318 abort (); /* Should be unreachable. */
4319
4320 switch (stub_type)
4321 {
4322 case arm_stub_cmse_branch_thumb_only:
4323 return TRUE;
4324
4325 default:
4326 return FALSE;
4327 }
4328
4329 abort (); /* Should be unreachable. */
4330 }
4331
4332 /* Required alignment (as a power of 2) for the dedicated section holding
4333 veneers of type STUB_TYPE, or 0 if veneers of this type are interspersed
4334 with input sections. */
4335
4336 static int
4337 arm_dedicated_stub_output_section_required_alignment
4338 (enum elf32_arm_stub_type stub_type)
4339 {
4340 if (stub_type >= max_stub_type)
4341 abort (); /* Should be unreachable. */
4342
4343 switch (stub_type)
4344 {
4345 /* Vectors of Secure Gateway veneers must be aligned on 32byte
4346 boundary. */
4347 case arm_stub_cmse_branch_thumb_only:
4348 return 5;
4349
4350 default:
4351 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4352 return 0;
4353 }
4354
4355 abort (); /* Should be unreachable. */
4356 }
4357
4358 /* Name of the dedicated output section to put veneers of type STUB_TYPE, or
4359 NULL if veneers of this type are interspersed with input sections. */
4360
4361 static const char *
4362 arm_dedicated_stub_output_section_name (enum elf32_arm_stub_type stub_type)
4363 {
4364 if (stub_type >= max_stub_type)
4365 abort (); /* Should be unreachable. */
4366
4367 switch (stub_type)
4368 {
4369 case arm_stub_cmse_branch_thumb_only:
4370 return ".gnu.sgstubs";
4371
4372 default:
4373 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4374 return NULL;
4375 }
4376
4377 abort (); /* Should be unreachable. */
4378 }
4379
4380 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4381 returns the address of the hash table field in HTAB holding a pointer to the
4382 corresponding input section. Otherwise, returns NULL. */
4383
4384 static asection **
4385 arm_dedicated_stub_input_section_ptr (struct elf32_arm_link_hash_table *htab,
4386 enum elf32_arm_stub_type stub_type)
4387 {
4388 if (stub_type >= max_stub_type)
4389 abort (); /* Should be unreachable. */
4390
4391 switch (stub_type)
4392 {
4393 case arm_stub_cmse_branch_thumb_only:
4394 return &htab->cmse_stub_sec;
4395
4396 default:
4397 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4398 return NULL;
4399 }
4400
4401 abort (); /* Should be unreachable. */
4402 }
4403
4404 /* Find or create a stub section to contain a stub of type STUB_TYPE. SECTION
4405 is the section that branch into veneer and can be NULL if stub should go in
4406 a dedicated output section. Returns a pointer to the stub section, and the
4407 section to which the stub section will be attached (in *LINK_SEC_P).
4408 LINK_SEC_P may be NULL. */
4409
4410 static asection *
4411 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
4412 struct elf32_arm_link_hash_table *htab,
4413 enum elf32_arm_stub_type stub_type)
4414 {
4415 asection *link_sec, *out_sec, **stub_sec_p;
4416 const char *stub_sec_prefix;
4417 bfd_boolean dedicated_output_section =
4418 arm_dedicated_stub_output_section_required (stub_type);
4419 int align;
4420
4421 if (dedicated_output_section)
4422 {
4423 bfd *output_bfd = htab->obfd;
4424 const char *out_sec_name =
4425 arm_dedicated_stub_output_section_name (stub_type);
4426 link_sec = NULL;
4427 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
4428 stub_sec_prefix = out_sec_name;
4429 align = arm_dedicated_stub_output_section_required_alignment (stub_type);
4430 out_sec = bfd_get_section_by_name (output_bfd, out_sec_name);
4431 if (out_sec == NULL)
4432 {
4433 _bfd_error_handler (_("No address assigned to the veneers output "
4434 "section %s"), out_sec_name);
4435 return NULL;
4436 }
4437 }
4438 else
4439 {
4440 BFD_ASSERT (section->id <= htab->top_id);
4441 link_sec = htab->stub_group[section->id].link_sec;
4442 BFD_ASSERT (link_sec != NULL);
4443 stub_sec_p = &htab->stub_group[section->id].stub_sec;
4444 if (*stub_sec_p == NULL)
4445 stub_sec_p = &htab->stub_group[link_sec->id].stub_sec;
4446 stub_sec_prefix = link_sec->name;
4447 out_sec = link_sec->output_section;
4448 align = htab->nacl_p ? 4 : 3;
4449 }
4450
4451 if (*stub_sec_p == NULL)
4452 {
4453 size_t namelen;
4454 bfd_size_type len;
4455 char *s_name;
4456
4457 namelen = strlen (stub_sec_prefix);
4458 len = namelen + sizeof (STUB_SUFFIX);
4459 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
4460 if (s_name == NULL)
4461 return NULL;
4462
4463 memcpy (s_name, stub_sec_prefix, namelen);
4464 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
4465 *stub_sec_p = (*htab->add_stub_section) (s_name, out_sec, link_sec,
4466 align);
4467 if (*stub_sec_p == NULL)
4468 return NULL;
4469
4470 out_sec->flags |= SEC_ALLOC | SEC_LOAD | SEC_READONLY | SEC_CODE
4471 | SEC_HAS_CONTENTS | SEC_RELOC | SEC_IN_MEMORY
4472 | SEC_KEEP;
4473 }
4474
4475 if (!dedicated_output_section)
4476 htab->stub_group[section->id].stub_sec = *stub_sec_p;
4477
4478 if (link_sec_p)
4479 *link_sec_p = link_sec;
4480
4481 return *stub_sec_p;
4482 }
4483
4484 /* Add a new stub entry to the stub hash. Not all fields of the new
4485 stub entry are initialised. */
4486
4487 static struct elf32_arm_stub_hash_entry *
4488 elf32_arm_add_stub (const char *stub_name, asection *section,
4489 struct elf32_arm_link_hash_table *htab,
4490 enum elf32_arm_stub_type stub_type)
4491 {
4492 asection *link_sec;
4493 asection *stub_sec;
4494 struct elf32_arm_stub_hash_entry *stub_entry;
4495
4496 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab,
4497 stub_type);
4498 if (stub_sec == NULL)
4499 return NULL;
4500
4501 /* Enter this entry into the linker stub hash table. */
4502 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4503 TRUE, FALSE);
4504 if (stub_entry == NULL)
4505 {
4506 if (section == NULL)
4507 section = stub_sec;
4508 _bfd_error_handler (_("%s: cannot create stub entry %s"),
4509 section->owner, stub_name);
4510 return NULL;
4511 }
4512
4513 stub_entry->stub_sec = stub_sec;
4514 stub_entry->stub_offset = (bfd_vma) -1;
4515 stub_entry->id_sec = link_sec;
4516
4517 return stub_entry;
4518 }
4519
4520 /* Store an Arm insn into an output section not processed by
4521 elf32_arm_write_section. */
4522
4523 static void
4524 put_arm_insn (struct elf32_arm_link_hash_table * htab,
4525 bfd * output_bfd, bfd_vma val, void * ptr)
4526 {
4527 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4528 bfd_putl32 (val, ptr);
4529 else
4530 bfd_putb32 (val, ptr);
4531 }
4532
4533 /* Store a 16-bit Thumb insn into an output section not processed by
4534 elf32_arm_write_section. */
4535
4536 static void
4537 put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4538 bfd * output_bfd, bfd_vma val, void * ptr)
4539 {
4540 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4541 bfd_putl16 (val, ptr);
4542 else
4543 bfd_putb16 (val, ptr);
4544 }
4545
4546 /* Store a Thumb2 insn into an output section not processed by
4547 elf32_arm_write_section. */
4548
4549 static void
4550 put_thumb2_insn (struct elf32_arm_link_hash_table * htab,
4551 bfd * output_bfd, bfd_vma val, bfd_byte * ptr)
4552 {
4553 /* T2 instructions are 16-bit streamed. */
4554 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4555 {
4556 bfd_putl16 ((val >> 16) & 0xffff, ptr);
4557 bfd_putl16 ((val & 0xffff), ptr + 2);
4558 }
4559 else
4560 {
4561 bfd_putb16 ((val >> 16) & 0xffff, ptr);
4562 bfd_putb16 ((val & 0xffff), ptr + 2);
4563 }
4564 }
4565
4566 /* If it's possible to change R_TYPE to a more efficient access
4567 model, return the new reloc type. */
4568
4569 static unsigned
4570 elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
4571 struct elf_link_hash_entry *h)
4572 {
4573 int is_local = (h == NULL);
4574
4575 if (bfd_link_pic (info)
4576 || (h && h->root.type == bfd_link_hash_undefweak))
4577 return r_type;
4578
4579 /* We do not support relaxations for Old TLS models. */
4580 switch (r_type)
4581 {
4582 case R_ARM_TLS_GOTDESC:
4583 case R_ARM_TLS_CALL:
4584 case R_ARM_THM_TLS_CALL:
4585 case R_ARM_TLS_DESCSEQ:
4586 case R_ARM_THM_TLS_DESCSEQ:
4587 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4588 }
4589
4590 return r_type;
4591 }
4592
4593 static bfd_reloc_status_type elf32_arm_final_link_relocate
4594 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4595 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
4596 const char *, unsigned char, enum arm_st_branch_type,
4597 struct elf_link_hash_entry *, bfd_boolean *, char **);
4598
4599 static unsigned int
4600 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4601 {
4602 switch (stub_type)
4603 {
4604 case arm_stub_a8_veneer_b_cond:
4605 case arm_stub_a8_veneer_b:
4606 case arm_stub_a8_veneer_bl:
4607 return 2;
4608
4609 case arm_stub_long_branch_any_any:
4610 case arm_stub_long_branch_v4t_arm_thumb:
4611 case arm_stub_long_branch_thumb_only:
4612 case arm_stub_long_branch_thumb2_only:
4613 case arm_stub_long_branch_thumb2_only_pure:
4614 case arm_stub_long_branch_v4t_thumb_thumb:
4615 case arm_stub_long_branch_v4t_thumb_arm:
4616 case arm_stub_short_branch_v4t_thumb_arm:
4617 case arm_stub_long_branch_any_arm_pic:
4618 case arm_stub_long_branch_any_thumb_pic:
4619 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4620 case arm_stub_long_branch_v4t_arm_thumb_pic:
4621 case arm_stub_long_branch_v4t_thumb_arm_pic:
4622 case arm_stub_long_branch_thumb_only_pic:
4623 case arm_stub_long_branch_any_tls_pic:
4624 case arm_stub_long_branch_v4t_thumb_tls_pic:
4625 case arm_stub_cmse_branch_thumb_only:
4626 case arm_stub_a8_veneer_blx:
4627 return 4;
4628
4629 case arm_stub_long_branch_arm_nacl:
4630 case arm_stub_long_branch_arm_nacl_pic:
4631 return 16;
4632
4633 default:
4634 abort (); /* Should be unreachable. */
4635 }
4636 }
4637
4638 /* Returns whether stubs of type STUB_TYPE take over the symbol they are
4639 veneering (TRUE) or have their own symbol (FALSE). */
4640
4641 static bfd_boolean
4642 arm_stub_sym_claimed (enum elf32_arm_stub_type stub_type)
4643 {
4644 if (stub_type >= max_stub_type)
4645 abort (); /* Should be unreachable. */
4646
4647 switch (stub_type)
4648 {
4649 case arm_stub_cmse_branch_thumb_only:
4650 return TRUE;
4651
4652 default:
4653 return FALSE;
4654 }
4655
4656 abort (); /* Should be unreachable. */
4657 }
4658
4659 /* Returns the padding needed for the dedicated section used stubs of type
4660 STUB_TYPE. */
4661
4662 static int
4663 arm_dedicated_stub_section_padding (enum elf32_arm_stub_type stub_type)
4664 {
4665 if (stub_type >= max_stub_type)
4666 abort (); /* Should be unreachable. */
4667
4668 switch (stub_type)
4669 {
4670 case arm_stub_cmse_branch_thumb_only:
4671 return 32;
4672
4673 default:
4674 return 0;
4675 }
4676
4677 abort (); /* Should be unreachable. */
4678 }
4679
4680 /* If veneers of type STUB_TYPE should go in a dedicated output section,
4681 returns the address of the hash table field in HTAB holding the offset at
4682 which new veneers should be layed out in the stub section. */
4683
4684 static bfd_vma*
4685 arm_new_stubs_start_offset_ptr (struct elf32_arm_link_hash_table *htab,
4686 enum elf32_arm_stub_type stub_type)
4687 {
4688 switch (stub_type)
4689 {
4690 case arm_stub_cmse_branch_thumb_only:
4691 return &htab->new_cmse_stub_offset;
4692
4693 default:
4694 BFD_ASSERT (!arm_dedicated_stub_output_section_required (stub_type));
4695 return NULL;
4696 }
4697 }
4698
4699 static bfd_boolean
4700 arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4701 void * in_arg)
4702 {
4703 #define MAXRELOCS 3
4704 bfd_boolean removed_sg_veneer;
4705 struct elf32_arm_stub_hash_entry *stub_entry;
4706 struct elf32_arm_link_hash_table *globals;
4707 struct bfd_link_info *info;
4708 asection *stub_sec;
4709 bfd *stub_bfd;
4710 bfd_byte *loc;
4711 bfd_vma sym_value;
4712 int template_size;
4713 int size;
4714 const insn_sequence *template_sequence;
4715 int i;
4716 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4717 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4718 int nrelocs = 0;
4719 int just_allocated = 0;
4720
4721 /* Massage our args to the form they really have. */
4722 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4723 info = (struct bfd_link_info *) in_arg;
4724
4725 globals = elf32_arm_hash_table (info);
4726 if (globals == NULL)
4727 return FALSE;
4728
4729 stub_sec = stub_entry->stub_sec;
4730
4731 if ((globals->fix_cortex_a8 < 0)
4732 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4733 /* We have to do less-strictly-aligned fixes last. */
4734 return TRUE;
4735
4736 /* Assign a slot at the end of section if none assigned yet. */
4737 if (stub_entry->stub_offset == (bfd_vma) -1)
4738 {
4739 stub_entry->stub_offset = stub_sec->size;
4740 just_allocated = 1;
4741 }
4742 loc = stub_sec->contents + stub_entry->stub_offset;
4743
4744 stub_bfd = stub_sec->owner;
4745
4746 /* This is the address of the stub destination. */
4747 sym_value = (stub_entry->target_value
4748 + stub_entry->target_section->output_offset
4749 + stub_entry->target_section->output_section->vma);
4750
4751 template_sequence = stub_entry->stub_template;
4752 template_size = stub_entry->stub_template_size;
4753
4754 size = 0;
4755 for (i = 0; i < template_size; i++)
4756 {
4757 switch (template_sequence[i].type)
4758 {
4759 case THUMB16_TYPE:
4760 {
4761 bfd_vma data = (bfd_vma) template_sequence[i].data;
4762 if (template_sequence[i].reloc_addend != 0)
4763 {
4764 /* We've borrowed the reloc_addend field to mean we should
4765 insert a condition code into this (Thumb-1 branch)
4766 instruction. See THUMB16_BCOND_INSN. */
4767 BFD_ASSERT ((data & 0xff00) == 0xd000);
4768 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
4769 }
4770 bfd_put_16 (stub_bfd, data, loc + size);
4771 size += 2;
4772 }
4773 break;
4774
4775 case THUMB32_TYPE:
4776 bfd_put_16 (stub_bfd,
4777 (template_sequence[i].data >> 16) & 0xffff,
4778 loc + size);
4779 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4780 loc + size + 2);
4781 if (template_sequence[i].r_type != R_ARM_NONE)
4782 {
4783 stub_reloc_idx[nrelocs] = i;
4784 stub_reloc_offset[nrelocs++] = size;
4785 }
4786 size += 4;
4787 break;
4788
4789 case ARM_TYPE:
4790 bfd_put_32 (stub_bfd, template_sequence[i].data,
4791 loc + size);
4792 /* Handle cases where the target is encoded within the
4793 instruction. */
4794 if (template_sequence[i].r_type == R_ARM_JUMP24)
4795 {
4796 stub_reloc_idx[nrelocs] = i;
4797 stub_reloc_offset[nrelocs++] = size;
4798 }
4799 size += 4;
4800 break;
4801
4802 case DATA_TYPE:
4803 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
4804 stub_reloc_idx[nrelocs] = i;
4805 stub_reloc_offset[nrelocs++] = size;
4806 size += 4;
4807 break;
4808
4809 default:
4810 BFD_FAIL ();
4811 return FALSE;
4812 }
4813 }
4814
4815 if (just_allocated)
4816 stub_sec->size += size;
4817
4818 /* Stub size has already been computed in arm_size_one_stub. Check
4819 consistency. */
4820 BFD_ASSERT (size == stub_entry->stub_size);
4821
4822 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
4823 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
4824 sym_value |= 1;
4825
4826 /* Assume non empty slots have at least one and at most MAXRELOCS entries
4827 to relocate in each stub. */
4828 removed_sg_veneer =
4829 (size == 0 && stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
4830 BFD_ASSERT (removed_sg_veneer || (nrelocs != 0 && nrelocs <= MAXRELOCS));
4831
4832 for (i = 0; i < nrelocs; i++)
4833 {
4834 Elf_Internal_Rela rel;
4835 bfd_boolean unresolved_reloc;
4836 char *error_message;
4837 bfd_vma points_to =
4838 sym_value + template_sequence[stub_reloc_idx[i]].reloc_addend;
4839
4840 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4841 rel.r_info = ELF32_R_INFO (0,
4842 template_sequence[stub_reloc_idx[i]].r_type);
4843 rel.r_addend = 0;
4844
4845 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4846 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4847 template should refer back to the instruction after the original
4848 branch. We use target_section as Cortex-A8 erratum workaround stubs
4849 are only generated when both source and target are in the same
4850 section. */
4851 points_to = stub_entry->target_section->output_section->vma
4852 + stub_entry->target_section->output_offset
4853 + stub_entry->source_value;
4854
4855 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4856 (template_sequence[stub_reloc_idx[i]].r_type),
4857 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
4858 points_to, info, stub_entry->target_section, "", STT_FUNC,
4859 stub_entry->branch_type,
4860 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4861 &error_message);
4862 }
4863
4864 return TRUE;
4865 #undef MAXRELOCS
4866 }
4867
4868 /* Calculate the template, template size and instruction size for a stub.
4869 Return value is the instruction size. */
4870
4871 static unsigned int
4872 find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4873 const insn_sequence **stub_template,
4874 int *stub_template_size)
4875 {
4876 const insn_sequence *template_sequence = NULL;
4877 int template_size = 0, i;
4878 unsigned int size;
4879
4880 template_sequence = stub_definitions[stub_type].template_sequence;
4881 if (stub_template)
4882 *stub_template = template_sequence;
4883
4884 template_size = stub_definitions[stub_type].template_size;
4885 if (stub_template_size)
4886 *stub_template_size = template_size;
4887
4888 size = 0;
4889 for (i = 0; i < template_size; i++)
4890 {
4891 switch (template_sequence[i].type)
4892 {
4893 case THUMB16_TYPE:
4894 size += 2;
4895 break;
4896
4897 case ARM_TYPE:
4898 case THUMB32_TYPE:
4899 case DATA_TYPE:
4900 size += 4;
4901 break;
4902
4903 default:
4904 BFD_FAIL ();
4905 return 0;
4906 }
4907 }
4908
4909 return size;
4910 }
4911
4912 /* As above, but don't actually build the stub. Just bump offset so
4913 we know stub section sizes. */
4914
4915 static bfd_boolean
4916 arm_size_one_stub (struct bfd_hash_entry *gen_entry,
4917 void *in_arg ATTRIBUTE_UNUSED)
4918 {
4919 struct elf32_arm_stub_hash_entry *stub_entry;
4920 const insn_sequence *template_sequence;
4921 int template_size, size;
4922
4923 /* Massage our args to the form they really have. */
4924 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4925
4926 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4927 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4928
4929 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
4930 &template_size);
4931
4932 /* Initialized to -1. Null size indicates an empty slot full of zeros. */
4933 if (stub_entry->stub_template_size)
4934 {
4935 stub_entry->stub_size = size;
4936 stub_entry->stub_template = template_sequence;
4937 stub_entry->stub_template_size = template_size;
4938 }
4939
4940 /* Already accounted for. */
4941 if (stub_entry->stub_offset != (bfd_vma) -1)
4942 return TRUE;
4943
4944 size = (size + 7) & ~7;
4945 stub_entry->stub_sec->size += size;
4946
4947 return TRUE;
4948 }
4949
4950 /* External entry points for sizing and building linker stubs. */
4951
4952 /* Set up various things so that we can make a list of input sections
4953 for each output section included in the link. Returns -1 on error,
4954 0 when no stubs will be needed, and 1 on success. */
4955
4956 int
4957 elf32_arm_setup_section_lists (bfd *output_bfd,
4958 struct bfd_link_info *info)
4959 {
4960 bfd *input_bfd;
4961 unsigned int bfd_count;
4962 unsigned int top_id, top_index;
4963 asection *section;
4964 asection **input_list, **list;
4965 bfd_size_type amt;
4966 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4967
4968 if (htab == NULL)
4969 return 0;
4970 if (! is_elf_hash_table (htab))
4971 return 0;
4972
4973 /* Count the number of input BFDs and find the top input section id. */
4974 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4975 input_bfd != NULL;
4976 input_bfd = input_bfd->link.next)
4977 {
4978 bfd_count += 1;
4979 for (section = input_bfd->sections;
4980 section != NULL;
4981 section = section->next)
4982 {
4983 if (top_id < section->id)
4984 top_id = section->id;
4985 }
4986 }
4987 htab->bfd_count = bfd_count;
4988
4989 amt = sizeof (struct map_stub) * (top_id + 1);
4990 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
4991 if (htab->stub_group == NULL)
4992 return -1;
4993 htab->top_id = top_id;
4994
4995 /* We can't use output_bfd->section_count here to find the top output
4996 section index as some sections may have been removed, and
4997 _bfd_strip_section_from_output doesn't renumber the indices. */
4998 for (section = output_bfd->sections, top_index = 0;
4999 section != NULL;
5000 section = section->next)
5001 {
5002 if (top_index < section->index)
5003 top_index = section->index;
5004 }
5005
5006 htab->top_index = top_index;
5007 amt = sizeof (asection *) * (top_index + 1);
5008 input_list = (asection **) bfd_malloc (amt);
5009 htab->input_list = input_list;
5010 if (input_list == NULL)
5011 return -1;
5012
5013 /* For sections we aren't interested in, mark their entries with a
5014 value we can check later. */
5015 list = input_list + top_index;
5016 do
5017 *list = bfd_abs_section_ptr;
5018 while (list-- != input_list);
5019
5020 for (section = output_bfd->sections;
5021 section != NULL;
5022 section = section->next)
5023 {
5024 if ((section->flags & SEC_CODE) != 0)
5025 input_list[section->index] = NULL;
5026 }
5027
5028 return 1;
5029 }
5030
5031 /* The linker repeatedly calls this function for each input section,
5032 in the order that input sections are linked into output sections.
5033 Build lists of input sections to determine groupings between which
5034 we may insert linker stubs. */
5035
5036 void
5037 elf32_arm_next_input_section (struct bfd_link_info *info,
5038 asection *isec)
5039 {
5040 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5041
5042 if (htab == NULL)
5043 return;
5044
5045 if (isec->output_section->index <= htab->top_index)
5046 {
5047 asection **list = htab->input_list + isec->output_section->index;
5048
5049 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
5050 {
5051 /* Steal the link_sec pointer for our list. */
5052 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
5053 /* This happens to make the list in reverse order,
5054 which we reverse later. */
5055 PREV_SEC (isec) = *list;
5056 *list = isec;
5057 }
5058 }
5059 }
5060
5061 /* See whether we can group stub sections together. Grouping stub
5062 sections may result in fewer stubs. More importantly, we need to
5063 put all .init* and .fini* stubs at the end of the .init or
5064 .fini output sections respectively, because glibc splits the
5065 _init and _fini functions into multiple parts. Putting a stub in
5066 the middle of a function is not a good idea. */
5067
5068 static void
5069 group_sections (struct elf32_arm_link_hash_table *htab,
5070 bfd_size_type stub_group_size,
5071 bfd_boolean stubs_always_after_branch)
5072 {
5073 asection **list = htab->input_list;
5074
5075 do
5076 {
5077 asection *tail = *list;
5078 asection *head;
5079
5080 if (tail == bfd_abs_section_ptr)
5081 continue;
5082
5083 /* Reverse the list: we must avoid placing stubs at the
5084 beginning of the section because the beginning of the text
5085 section may be required for an interrupt vector in bare metal
5086 code. */
5087 #define NEXT_SEC PREV_SEC
5088 head = NULL;
5089 while (tail != NULL)
5090 {
5091 /* Pop from tail. */
5092 asection *item = tail;
5093 tail = PREV_SEC (item);
5094
5095 /* Push on head. */
5096 NEXT_SEC (item) = head;
5097 head = item;
5098 }
5099
5100 while (head != NULL)
5101 {
5102 asection *curr;
5103 asection *next;
5104 bfd_vma stub_group_start = head->output_offset;
5105 bfd_vma end_of_next;
5106
5107 curr = head;
5108 while (NEXT_SEC (curr) != NULL)
5109 {
5110 next = NEXT_SEC (curr);
5111 end_of_next = next->output_offset + next->size;
5112 if (end_of_next - stub_group_start >= stub_group_size)
5113 /* End of NEXT is too far from start, so stop. */
5114 break;
5115 /* Add NEXT to the group. */
5116 curr = next;
5117 }
5118
5119 /* OK, the size from the start to the start of CURR is less
5120 than stub_group_size and thus can be handled by one stub
5121 section. (Or the head section is itself larger than
5122 stub_group_size, in which case we may be toast.)
5123 We should really be keeping track of the total size of
5124 stubs added here, as stubs contribute to the final output
5125 section size. */
5126 do
5127 {
5128 next = NEXT_SEC (head);
5129 /* Set up this stub group. */
5130 htab->stub_group[head->id].link_sec = curr;
5131 }
5132 while (head != curr && (head = next) != NULL);
5133
5134 /* But wait, there's more! Input sections up to stub_group_size
5135 bytes after the stub section can be handled by it too. */
5136 if (!stubs_always_after_branch)
5137 {
5138 stub_group_start = curr->output_offset + curr->size;
5139
5140 while (next != NULL)
5141 {
5142 end_of_next = next->output_offset + next->size;
5143 if (end_of_next - stub_group_start >= stub_group_size)
5144 /* End of NEXT is too far from stubs, so stop. */
5145 break;
5146 /* Add NEXT to the stub group. */
5147 head = next;
5148 next = NEXT_SEC (head);
5149 htab->stub_group[head->id].link_sec = curr;
5150 }
5151 }
5152 head = next;
5153 }
5154 }
5155 while (list++ != htab->input_list + htab->top_index);
5156
5157 free (htab->input_list);
5158 #undef PREV_SEC
5159 #undef NEXT_SEC
5160 }
5161
5162 /* Comparison function for sorting/searching relocations relating to Cortex-A8
5163 erratum fix. */
5164
5165 static int
5166 a8_reloc_compare (const void *a, const void *b)
5167 {
5168 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
5169 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
5170
5171 if (ra->from < rb->from)
5172 return -1;
5173 else if (ra->from > rb->from)
5174 return 1;
5175 else
5176 return 0;
5177 }
5178
5179 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
5180 const char *, char **);
5181
5182 /* Helper function to scan code for sequences which might trigger the Cortex-A8
5183 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
5184 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
5185 otherwise. */
5186
5187 static bfd_boolean
5188 cortex_a8_erratum_scan (bfd *input_bfd,
5189 struct bfd_link_info *info,
5190 struct a8_erratum_fix **a8_fixes_p,
5191 unsigned int *num_a8_fixes_p,
5192 unsigned int *a8_fix_table_size_p,
5193 struct a8_erratum_reloc *a8_relocs,
5194 unsigned int num_a8_relocs,
5195 unsigned prev_num_a8_fixes,
5196 bfd_boolean *stub_changed_p)
5197 {
5198 asection *section;
5199 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
5200 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
5201 unsigned int num_a8_fixes = *num_a8_fixes_p;
5202 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
5203
5204 if (htab == NULL)
5205 return FALSE;
5206
5207 for (section = input_bfd->sections;
5208 section != NULL;
5209 section = section->next)
5210 {
5211 bfd_byte *contents = NULL;
5212 struct _arm_elf_section_data *sec_data;
5213 unsigned int span;
5214 bfd_vma base_vma;
5215
5216 if (elf_section_type (section) != SHT_PROGBITS
5217 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
5218 || (section->flags & SEC_EXCLUDE) != 0
5219 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
5220 || (section->output_section == bfd_abs_section_ptr))
5221 continue;
5222
5223 base_vma = section->output_section->vma + section->output_offset;
5224
5225 if (elf_section_data (section)->this_hdr.contents != NULL)
5226 contents = elf_section_data (section)->this_hdr.contents;
5227 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
5228 return TRUE;
5229
5230 sec_data = elf32_arm_section_data (section);
5231
5232 for (span = 0; span < sec_data->mapcount; span++)
5233 {
5234 unsigned int span_start = sec_data->map[span].vma;
5235 unsigned int span_end = (span == sec_data->mapcount - 1)
5236 ? section->size : sec_data->map[span + 1].vma;
5237 unsigned int i;
5238 char span_type = sec_data->map[span].type;
5239 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
5240
5241 if (span_type != 't')
5242 continue;
5243
5244 /* Span is entirely within a single 4KB region: skip scanning. */
5245 if (((base_vma + span_start) & ~0xfff)
5246 == ((base_vma + span_end) & ~0xfff))
5247 continue;
5248
5249 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
5250
5251 * The opcode is BLX.W, BL.W, B.W, Bcc.W
5252 * The branch target is in the same 4KB region as the
5253 first half of the branch.
5254 * The instruction before the branch is a 32-bit
5255 length non-branch instruction. */
5256 for (i = span_start; i < span_end;)
5257 {
5258 unsigned int insn = bfd_getl16 (&contents[i]);
5259 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
5260 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
5261
5262 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
5263 insn_32bit = TRUE;
5264
5265 if (insn_32bit)
5266 {
5267 /* Load the rest of the insn (in manual-friendly order). */
5268 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
5269
5270 /* Encoding T4: B<c>.W. */
5271 is_b = (insn & 0xf800d000) == 0xf0009000;
5272 /* Encoding T1: BL<c>.W. */
5273 is_bl = (insn & 0xf800d000) == 0xf000d000;
5274 /* Encoding T2: BLX<c>.W. */
5275 is_blx = (insn & 0xf800d000) == 0xf000c000;
5276 /* Encoding T3: B<c>.W (not permitted in IT block). */
5277 is_bcc = (insn & 0xf800d000) == 0xf0008000
5278 && (insn & 0x07f00000) != 0x03800000;
5279 }
5280
5281 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
5282
5283 if (((base_vma + i) & 0xfff) == 0xffe
5284 && insn_32bit
5285 && is_32bit_branch
5286 && last_was_32bit
5287 && ! last_was_branch)
5288 {
5289 bfd_signed_vma offset = 0;
5290 bfd_boolean force_target_arm = FALSE;
5291 bfd_boolean force_target_thumb = FALSE;
5292 bfd_vma target;
5293 enum elf32_arm_stub_type stub_type = arm_stub_none;
5294 struct a8_erratum_reloc key, *found;
5295 bfd_boolean use_plt = FALSE;
5296
5297 key.from = base_vma + i;
5298 found = (struct a8_erratum_reloc *)
5299 bsearch (&key, a8_relocs, num_a8_relocs,
5300 sizeof (struct a8_erratum_reloc),
5301 &a8_reloc_compare);
5302
5303 if (found)
5304 {
5305 char *error_message = NULL;
5306 struct elf_link_hash_entry *entry;
5307
5308 /* We don't care about the error returned from this
5309 function, only if there is glue or not. */
5310 entry = find_thumb_glue (info, found->sym_name,
5311 &error_message);
5312
5313 if (entry)
5314 found->non_a8_stub = TRUE;
5315
5316 /* Keep a simpler condition, for the sake of clarity. */
5317 if (htab->root.splt != NULL && found->hash != NULL
5318 && found->hash->root.plt.offset != (bfd_vma) -1)
5319 use_plt = TRUE;
5320
5321 if (found->r_type == R_ARM_THM_CALL)
5322 {
5323 if (found->branch_type == ST_BRANCH_TO_ARM
5324 || use_plt)
5325 force_target_arm = TRUE;
5326 else
5327 force_target_thumb = TRUE;
5328 }
5329 }
5330
5331 /* Check if we have an offending branch instruction. */
5332
5333 if (found && found->non_a8_stub)
5334 /* We've already made a stub for this instruction, e.g.
5335 it's a long branch or a Thumb->ARM stub. Assume that
5336 stub will suffice to work around the A8 erratum (see
5337 setting of always_after_branch above). */
5338 ;
5339 else if (is_bcc)
5340 {
5341 offset = (insn & 0x7ff) << 1;
5342 offset |= (insn & 0x3f0000) >> 4;
5343 offset |= (insn & 0x2000) ? 0x40000 : 0;
5344 offset |= (insn & 0x800) ? 0x80000 : 0;
5345 offset |= (insn & 0x4000000) ? 0x100000 : 0;
5346 if (offset & 0x100000)
5347 offset |= ~ ((bfd_signed_vma) 0xfffff);
5348 stub_type = arm_stub_a8_veneer_b_cond;
5349 }
5350 else if (is_b || is_bl || is_blx)
5351 {
5352 int s = (insn & 0x4000000) != 0;
5353 int j1 = (insn & 0x2000) != 0;
5354 int j2 = (insn & 0x800) != 0;
5355 int i1 = !(j1 ^ s);
5356 int i2 = !(j2 ^ s);
5357
5358 offset = (insn & 0x7ff) << 1;
5359 offset |= (insn & 0x3ff0000) >> 4;
5360 offset |= i2 << 22;
5361 offset |= i1 << 23;
5362 offset |= s << 24;
5363 if (offset & 0x1000000)
5364 offset |= ~ ((bfd_signed_vma) 0xffffff);
5365
5366 if (is_blx)
5367 offset &= ~ ((bfd_signed_vma) 3);
5368
5369 stub_type = is_blx ? arm_stub_a8_veneer_blx :
5370 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
5371 }
5372
5373 if (stub_type != arm_stub_none)
5374 {
5375 bfd_vma pc_for_insn = base_vma + i + 4;
5376
5377 /* The original instruction is a BL, but the target is
5378 an ARM instruction. If we were not making a stub,
5379 the BL would have been converted to a BLX. Use the
5380 BLX stub instead in that case. */
5381 if (htab->use_blx && force_target_arm
5382 && stub_type == arm_stub_a8_veneer_bl)
5383 {
5384 stub_type = arm_stub_a8_veneer_blx;
5385 is_blx = TRUE;
5386 is_bl = FALSE;
5387 }
5388 /* Conversely, if the original instruction was
5389 BLX but the target is Thumb mode, use the BL
5390 stub. */
5391 else if (force_target_thumb
5392 && stub_type == arm_stub_a8_veneer_blx)
5393 {
5394 stub_type = arm_stub_a8_veneer_bl;
5395 is_blx = FALSE;
5396 is_bl = TRUE;
5397 }
5398
5399 if (is_blx)
5400 pc_for_insn &= ~ ((bfd_vma) 3);
5401
5402 /* If we found a relocation, use the proper destination,
5403 not the offset in the (unrelocated) instruction.
5404 Note this is always done if we switched the stub type
5405 above. */
5406 if (found)
5407 offset =
5408 (bfd_signed_vma) (found->destination - pc_for_insn);
5409
5410 /* If the stub will use a Thumb-mode branch to a
5411 PLT target, redirect it to the preceding Thumb
5412 entry point. */
5413 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
5414 offset -= PLT_THUMB_STUB_SIZE;
5415
5416 target = pc_for_insn + offset;
5417
5418 /* The BLX stub is ARM-mode code. Adjust the offset to
5419 take the different PC value (+8 instead of +4) into
5420 account. */
5421 if (stub_type == arm_stub_a8_veneer_blx)
5422 offset += 4;
5423
5424 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
5425 {
5426 char *stub_name = NULL;
5427
5428 if (num_a8_fixes == a8_fix_table_size)
5429 {
5430 a8_fix_table_size *= 2;
5431 a8_fixes = (struct a8_erratum_fix *)
5432 bfd_realloc (a8_fixes,
5433 sizeof (struct a8_erratum_fix)
5434 * a8_fix_table_size);
5435 }
5436
5437 if (num_a8_fixes < prev_num_a8_fixes)
5438 {
5439 /* If we're doing a subsequent scan,
5440 check if we've found the same fix as
5441 before, and try and reuse the stub
5442 name. */
5443 stub_name = a8_fixes[num_a8_fixes].stub_name;
5444 if ((a8_fixes[num_a8_fixes].section != section)
5445 || (a8_fixes[num_a8_fixes].offset != i))
5446 {
5447 free (stub_name);
5448 stub_name = NULL;
5449 *stub_changed_p = TRUE;
5450 }
5451 }
5452
5453 if (!stub_name)
5454 {
5455 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
5456 if (stub_name != NULL)
5457 sprintf (stub_name, "%x:%x", section->id, i);
5458 }
5459
5460 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
5461 a8_fixes[num_a8_fixes].section = section;
5462 a8_fixes[num_a8_fixes].offset = i;
5463 a8_fixes[num_a8_fixes].target_offset =
5464 target - base_vma;
5465 a8_fixes[num_a8_fixes].orig_insn = insn;
5466 a8_fixes[num_a8_fixes].stub_name = stub_name;
5467 a8_fixes[num_a8_fixes].stub_type = stub_type;
5468 a8_fixes[num_a8_fixes].branch_type =
5469 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
5470
5471 num_a8_fixes++;
5472 }
5473 }
5474 }
5475
5476 i += insn_32bit ? 4 : 2;
5477 last_was_32bit = insn_32bit;
5478 last_was_branch = is_32bit_branch;
5479 }
5480 }
5481
5482 if (elf_section_data (section)->this_hdr.contents == NULL)
5483 free (contents);
5484 }
5485
5486 *a8_fixes_p = a8_fixes;
5487 *num_a8_fixes_p = num_a8_fixes;
5488 *a8_fix_table_size_p = a8_fix_table_size;
5489
5490 return FALSE;
5491 }
5492
5493 /* Create or update a stub entry depending on whether the stub can already be
5494 found in HTAB. The stub is identified by:
5495 - its type STUB_TYPE
5496 - its source branch (note that several can share the same stub) whose
5497 section and relocation (if any) are given by SECTION and IRELA
5498 respectively
5499 - its target symbol whose input section, hash, name, value and branch type
5500 are given in SYM_SEC, HASH, SYM_NAME, SYM_VALUE and BRANCH_TYPE
5501 respectively
5502
5503 If found, the value of the stub's target symbol is updated from SYM_VALUE
5504 and *NEW_STUB is set to FALSE. Otherwise, *NEW_STUB is set to
5505 TRUE and the stub entry is initialized.
5506
5507 Returns the stub that was created or updated, or NULL if an error
5508 occurred. */
5509
5510 static struct elf32_arm_stub_hash_entry *
5511 elf32_arm_create_stub (struct elf32_arm_link_hash_table *htab,
5512 enum elf32_arm_stub_type stub_type, asection *section,
5513 Elf_Internal_Rela *irela, asection *sym_sec,
5514 struct elf32_arm_link_hash_entry *hash, char *sym_name,
5515 bfd_vma sym_value, enum arm_st_branch_type branch_type,
5516 bfd_boolean *new_stub)
5517 {
5518 const asection *id_sec;
5519 char *stub_name;
5520 struct elf32_arm_stub_hash_entry *stub_entry;
5521 unsigned int r_type;
5522 bfd_boolean sym_claimed = arm_stub_sym_claimed (stub_type);
5523
5524 BFD_ASSERT (stub_type != arm_stub_none);
5525 *new_stub = FALSE;
5526
5527 if (sym_claimed)
5528 stub_name = sym_name;
5529 else
5530 {
5531 BFD_ASSERT (irela);
5532 BFD_ASSERT (section);
5533 BFD_ASSERT (section->id <= htab->top_id);
5534
5535 /* Support for grouping stub sections. */
5536 id_sec = htab->stub_group[section->id].link_sec;
5537
5538 /* Get the name of this stub. */
5539 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, irela,
5540 stub_type);
5541 if (!stub_name)
5542 return NULL;
5543 }
5544
5545 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, FALSE,
5546 FALSE);
5547 /* The proper stub has already been created, just update its value. */
5548 if (stub_entry != NULL)
5549 {
5550 if (!sym_claimed)
5551 free (stub_name);
5552 stub_entry->target_value = sym_value;
5553 return stub_entry;
5554 }
5555
5556 stub_entry = elf32_arm_add_stub (stub_name, section, htab, stub_type);
5557 if (stub_entry == NULL)
5558 {
5559 if (!sym_claimed)
5560 free (stub_name);
5561 return NULL;
5562 }
5563
5564 stub_entry->target_value = sym_value;
5565 stub_entry->target_section = sym_sec;
5566 stub_entry->stub_type = stub_type;
5567 stub_entry->h = hash;
5568 stub_entry->branch_type = branch_type;
5569
5570 if (sym_claimed)
5571 stub_entry->output_name = sym_name;
5572 else
5573 {
5574 if (sym_name == NULL)
5575 sym_name = "unnamed";
5576 stub_entry->output_name = (char *)
5577 bfd_alloc (htab->stub_bfd, sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5578 + strlen (sym_name));
5579 if (stub_entry->output_name == NULL)
5580 {
5581 free (stub_name);
5582 return NULL;
5583 }
5584
5585 /* For historical reasons, use the existing names for ARM-to-Thumb and
5586 Thumb-to-ARM stubs. */
5587 r_type = ELF32_R_TYPE (irela->r_info);
5588 if ((r_type == (unsigned int) R_ARM_THM_CALL
5589 || r_type == (unsigned int) R_ARM_THM_JUMP24
5590 || r_type == (unsigned int) R_ARM_THM_JUMP19)
5591 && branch_type == ST_BRANCH_TO_ARM)
5592 sprintf (stub_entry->output_name, THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5593 else if ((r_type == (unsigned int) R_ARM_CALL
5594 || r_type == (unsigned int) R_ARM_JUMP24)
5595 && branch_type == ST_BRANCH_TO_THUMB)
5596 sprintf (stub_entry->output_name, ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5597 else
5598 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, sym_name);
5599 }
5600
5601 *new_stub = TRUE;
5602 return stub_entry;
5603 }
5604
5605 /* Scan symbols in INPUT_BFD to identify secure entry functions needing a
5606 gateway veneer to transition from non secure to secure state and create them
5607 accordingly.
5608
5609 "ARMv8-M Security Extensions: Requirements on Development Tools" document
5610 defines the conditions that govern Secure Gateway veneer creation for a
5611 given symbol <SYM> as follows:
5612 - it has function type
5613 - it has non local binding
5614 - a symbol named __acle_se_<SYM> (called special symbol) exists with the
5615 same type, binding and value as <SYM> (called normal symbol).
5616 An entry function can handle secure state transition itself in which case
5617 its special symbol would have a different value from the normal symbol.
5618
5619 OUT_ATTR gives the output attributes, SYM_HASHES the symbol index to hash
5620 entry mapping while HTAB gives the name to hash entry mapping.
5621 *CMSE_STUB_CREATED is increased by the number of secure gateway veneer
5622 created.
5623
5624 The return value gives whether a stub failed to be allocated. */
5625
5626 static bfd_boolean
5627 cmse_scan (bfd *input_bfd, struct elf32_arm_link_hash_table *htab,
5628 obj_attribute *out_attr, struct elf_link_hash_entry **sym_hashes,
5629 int *cmse_stub_created)
5630 {
5631 const struct elf_backend_data *bed;
5632 Elf_Internal_Shdr *symtab_hdr;
5633 unsigned i, j, sym_count, ext_start;
5634 Elf_Internal_Sym *cmse_sym, *local_syms;
5635 struct elf32_arm_link_hash_entry *hash, *cmse_hash = NULL;
5636 enum arm_st_branch_type branch_type;
5637 char *sym_name, *lsym_name;
5638 bfd_vma sym_value;
5639 asection *section;
5640 struct elf32_arm_stub_hash_entry *stub_entry;
5641 bfd_boolean is_v8m, new_stub, cmse_invalid, ret = TRUE;
5642
5643 bed = get_elf_backend_data (input_bfd);
5644 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5645 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
5646 ext_start = symtab_hdr->sh_info;
5647 is_v8m = (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
5648 && out_attr[Tag_CPU_arch_profile].i == 'M');
5649
5650 local_syms = (Elf_Internal_Sym *) symtab_hdr->contents;
5651 if (local_syms == NULL)
5652 local_syms = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5653 symtab_hdr->sh_info, 0, NULL, NULL,
5654 NULL);
5655 if (symtab_hdr->sh_info && local_syms == NULL)
5656 return FALSE;
5657
5658 /* Scan symbols. */
5659 for (i = 0; i < sym_count; i++)
5660 {
5661 cmse_invalid = FALSE;
5662
5663 if (i < ext_start)
5664 {
5665 cmse_sym = &local_syms[i];
5666 /* Not a special symbol. */
5667 if (!ARM_GET_SYM_CMSE_SPCL (cmse_sym->st_target_internal))
5668 continue;
5669 sym_name = bfd_elf_string_from_elf_section (input_bfd,
5670 symtab_hdr->sh_link,
5671 cmse_sym->st_name);
5672 /* Special symbol with local binding. */
5673 cmse_invalid = TRUE;
5674 }
5675 else
5676 {
5677 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
5678 sym_name = (char *) cmse_hash->root.root.root.string;
5679
5680 /* Not a special symbol. */
5681 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
5682 continue;
5683
5684 /* Special symbol has incorrect binding or type. */
5685 if ((cmse_hash->root.root.type != bfd_link_hash_defined
5686 && cmse_hash->root.root.type != bfd_link_hash_defweak)
5687 || cmse_hash->root.type != STT_FUNC)
5688 cmse_invalid = TRUE;
5689 }
5690
5691 if (!is_v8m)
5692 {
5693 _bfd_error_handler (_("%B: Special symbol `%s' only allowed for "
5694 "ARMv8-M architecture or later."),
5695 input_bfd, sym_name);
5696 is_v8m = TRUE; /* Avoid multiple warning. */
5697 ret = FALSE;
5698 }
5699
5700 if (cmse_invalid)
5701 {
5702 _bfd_error_handler (_("%B: invalid special symbol `%s'."),
5703 input_bfd, sym_name);
5704 _bfd_error_handler (_("It must be a global or weak function "
5705 "symbol."));
5706 ret = FALSE;
5707 if (i < ext_start)
5708 continue;
5709 }
5710
5711 sym_name += strlen (CMSE_PREFIX);
5712 hash = (struct elf32_arm_link_hash_entry *)
5713 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5714
5715 /* No associated normal symbol or it is neither global nor weak. */
5716 if (!hash
5717 || (hash->root.root.type != bfd_link_hash_defined
5718 && hash->root.root.type != bfd_link_hash_defweak)
5719 || hash->root.type != STT_FUNC)
5720 {
5721 /* Initialize here to avoid warning about use of possibly
5722 uninitialized variable. */
5723 j = 0;
5724
5725 if (!hash)
5726 {
5727 /* Searching for a normal symbol with local binding. */
5728 for (; j < ext_start; j++)
5729 {
5730 lsym_name =
5731 bfd_elf_string_from_elf_section (input_bfd,
5732 symtab_hdr->sh_link,
5733 local_syms[j].st_name);
5734 if (!strcmp (sym_name, lsym_name))
5735 break;
5736 }
5737 }
5738
5739 if (hash || j < ext_start)
5740 {
5741 _bfd_error_handler
5742 (_("%B: invalid standard symbol `%s'."), input_bfd, sym_name);
5743 _bfd_error_handler
5744 (_("It must be a global or weak function symbol."));
5745 }
5746 else
5747 _bfd_error_handler
5748 (_("%B: absent standard symbol `%s'."), input_bfd, sym_name);
5749 ret = FALSE;
5750 if (!hash)
5751 continue;
5752 }
5753
5754 sym_value = hash->root.root.u.def.value;
5755 section = hash->root.root.u.def.section;
5756
5757 if (cmse_hash->root.root.u.def.section != section)
5758 {
5759 _bfd_error_handler
5760 (_("%B: `%s' and its special symbol are in different sections."),
5761 input_bfd, sym_name);
5762 ret = FALSE;
5763 }
5764 if (cmse_hash->root.root.u.def.value != sym_value)
5765 continue; /* Ignore: could be an entry function starting with SG. */
5766
5767 /* If this section is a link-once section that will be discarded, then
5768 don't create any stubs. */
5769 if (section->output_section == NULL)
5770 {
5771 _bfd_error_handler
5772 (_("%B: entry function `%s' not output."), input_bfd, sym_name);
5773 continue;
5774 }
5775
5776 if (hash->root.size == 0)
5777 {
5778 _bfd_error_handler
5779 (_("%B: entry function `%s' is empty."), input_bfd, sym_name);
5780 ret = FALSE;
5781 }
5782
5783 if (!ret)
5784 continue;
5785 branch_type = ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
5786 stub_entry
5787 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5788 NULL, NULL, section, hash, sym_name,
5789 sym_value, branch_type, &new_stub);
5790
5791 if (stub_entry == NULL)
5792 ret = FALSE;
5793 else
5794 {
5795 BFD_ASSERT (new_stub);
5796 (*cmse_stub_created)++;
5797 }
5798 }
5799
5800 if (!symtab_hdr->contents)
5801 free (local_syms);
5802 return ret;
5803 }
5804
5805 /* Return TRUE iff a symbol identified by its linker HASH entry is a secure
5806 code entry function, ie can be called from non secure code without using a
5807 veneer. */
5808
5809 static bfd_boolean
5810 cmse_entry_fct_p (struct elf32_arm_link_hash_entry *hash)
5811 {
5812 bfd_byte contents[4];
5813 uint32_t first_insn;
5814 asection *section;
5815 file_ptr offset;
5816 bfd *abfd;
5817
5818 /* Defined symbol of function type. */
5819 if (hash->root.root.type != bfd_link_hash_defined
5820 && hash->root.root.type != bfd_link_hash_defweak)
5821 return FALSE;
5822 if (hash->root.type != STT_FUNC)
5823 return FALSE;
5824
5825 /* Read first instruction. */
5826 section = hash->root.root.u.def.section;
5827 abfd = section->owner;
5828 offset = hash->root.root.u.def.value - section->vma;
5829 if (!bfd_get_section_contents (abfd, section, contents, offset,
5830 sizeof (contents)))
5831 return FALSE;
5832
5833 first_insn = bfd_get_32 (abfd, contents);
5834
5835 /* Starts by SG instruction. */
5836 return first_insn == 0xe97fe97f;
5837 }
5838
5839 /* Output the name (in symbol table) of the veneer GEN_ENTRY if it is a new
5840 secure gateway veneers (ie. the veneers was not in the input import library)
5841 and there is no output import library (GEN_INFO->out_implib_bfd is NULL. */
5842
5843 static bfd_boolean
5844 arm_list_new_cmse_stub (struct bfd_hash_entry *gen_entry, void *gen_info)
5845 {
5846 struct elf32_arm_stub_hash_entry *stub_entry;
5847 struct bfd_link_info *info;
5848
5849 /* Massage our args to the form they really have. */
5850 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
5851 info = (struct bfd_link_info *) gen_info;
5852
5853 if (info->out_implib_bfd)
5854 return TRUE;
5855
5856 if (stub_entry->stub_type != arm_stub_cmse_branch_thumb_only)
5857 return TRUE;
5858
5859 if (stub_entry->stub_offset == (bfd_vma) -1)
5860 _bfd_error_handler (" %s", stub_entry->output_name);
5861
5862 return TRUE;
5863 }
5864
5865 /* Set offset of each secure gateway veneers so that its address remain
5866 identical to the one in the input import library referred by
5867 HTAB->in_implib_bfd. A warning is issued for veneers that disappeared
5868 (present in input import library but absent from the executable being
5869 linked) or if new veneers appeared and there is no output import library
5870 (INFO->out_implib_bfd is NULL and *CMSE_STUB_CREATED is bigger than the
5871 number of secure gateway veneers found in the input import library.
5872
5873 The function returns whether an error occurred. If no error occurred,
5874 *CMSE_STUB_CREATED gives the number of SG veneers created by both cmse_scan
5875 and this function and HTAB->new_cmse_stub_offset is set to the biggest
5876 veneer observed set for new veneers to be layed out after. */
5877
5878 static bfd_boolean
5879 set_cmse_veneer_addr_from_implib (struct bfd_link_info *info,
5880 struct elf32_arm_link_hash_table *htab,
5881 int *cmse_stub_created)
5882 {
5883 long symsize;
5884 char *sym_name;
5885 flagword flags;
5886 long i, symcount;
5887 bfd *in_implib_bfd;
5888 asection *stub_out_sec;
5889 bfd_boolean ret = TRUE;
5890 Elf_Internal_Sym *intsym;
5891 const char *out_sec_name;
5892 bfd_size_type cmse_stub_size;
5893 asymbol **sympp = NULL, *sym;
5894 struct elf32_arm_link_hash_entry *hash;
5895 const insn_sequence *cmse_stub_template;
5896 struct elf32_arm_stub_hash_entry *stub_entry;
5897 int cmse_stub_template_size, new_cmse_stubs_created = *cmse_stub_created;
5898 bfd_vma veneer_value, stub_offset, next_cmse_stub_offset;
5899 bfd_vma cmse_stub_array_start = (bfd_vma) -1, cmse_stub_sec_vma = 0;
5900
5901 /* No input secure gateway import library. */
5902 if (!htab->in_implib_bfd)
5903 return TRUE;
5904
5905 in_implib_bfd = htab->in_implib_bfd;
5906 if (!htab->cmse_implib)
5907 {
5908 _bfd_error_handler (_("%B: --in-implib only supported for Secure "
5909 "Gateway import libraries."), in_implib_bfd);
5910 return FALSE;
5911 }
5912
5913 /* Get symbol table size. */
5914 symsize = bfd_get_symtab_upper_bound (in_implib_bfd);
5915 if (symsize < 0)
5916 return FALSE;
5917
5918 /* Read in the input secure gateway import library's symbol table. */
5919 sympp = (asymbol **) xmalloc (symsize);
5920 symcount = bfd_canonicalize_symtab (in_implib_bfd, sympp);
5921 if (symcount < 0)
5922 {
5923 ret = FALSE;
5924 goto free_sym_buf;
5925 }
5926
5927 htab->new_cmse_stub_offset = 0;
5928 cmse_stub_size =
5929 find_stub_size_and_template (arm_stub_cmse_branch_thumb_only,
5930 &cmse_stub_template,
5931 &cmse_stub_template_size);
5932 out_sec_name =
5933 arm_dedicated_stub_output_section_name (arm_stub_cmse_branch_thumb_only);
5934 stub_out_sec =
5935 bfd_get_section_by_name (htab->obfd, out_sec_name);
5936 if (stub_out_sec != NULL)
5937 cmse_stub_sec_vma = stub_out_sec->vma;
5938
5939 /* Set addresses of veneers mentionned in input secure gateway import
5940 library's symbol table. */
5941 for (i = 0; i < symcount; i++)
5942 {
5943 sym = sympp[i];
5944 flags = sym->flags;
5945 sym_name = (char *) bfd_asymbol_name (sym);
5946 intsym = &((elf_symbol_type *) sym)->internal_elf_sym;
5947
5948 if (sym->section != bfd_abs_section_ptr
5949 || !(flags & (BSF_GLOBAL | BSF_WEAK))
5950 || (flags & BSF_FUNCTION) != BSF_FUNCTION
5951 || (ARM_GET_SYM_BRANCH_TYPE (intsym->st_target_internal)
5952 != ST_BRANCH_TO_THUMB))
5953 {
5954 _bfd_error_handler (_("%B: invalid import library entry: `%s'."),
5955 in_implib_bfd, sym_name);
5956 _bfd_error_handler (_("Symbol should be absolute, global and "
5957 "refer to Thumb functions."));
5958 ret = FALSE;
5959 continue;
5960 }
5961
5962 veneer_value = bfd_asymbol_value (sym);
5963 stub_offset = veneer_value - cmse_stub_sec_vma;
5964 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, sym_name,
5965 FALSE, FALSE);
5966 hash = (struct elf32_arm_link_hash_entry *)
5967 elf_link_hash_lookup (&(htab)->root, sym_name, FALSE, FALSE, TRUE);
5968
5969 /* Stub entry should have been created by cmse_scan or the symbol be of
5970 a secure function callable from non secure code. */
5971 if (!stub_entry && !hash)
5972 {
5973 bfd_boolean new_stub;
5974
5975 _bfd_error_handler
5976 (_("Entry function `%s' disappeared from secure code."), sym_name);
5977 hash = (struct elf32_arm_link_hash_entry *)
5978 elf_link_hash_lookup (&(htab)->root, sym_name, TRUE, TRUE, TRUE);
5979 stub_entry
5980 = elf32_arm_create_stub (htab, arm_stub_cmse_branch_thumb_only,
5981 NULL, NULL, bfd_abs_section_ptr, hash,
5982 sym_name, veneer_value,
5983 ST_BRANCH_TO_THUMB, &new_stub);
5984 if (stub_entry == NULL)
5985 ret = FALSE;
5986 else
5987 {
5988 BFD_ASSERT (new_stub);
5989 new_cmse_stubs_created++;
5990 (*cmse_stub_created)++;
5991 }
5992 stub_entry->stub_template_size = stub_entry->stub_size = 0;
5993 stub_entry->stub_offset = stub_offset;
5994 }
5995 /* Symbol found is not callable from non secure code. */
5996 else if (!stub_entry)
5997 {
5998 if (!cmse_entry_fct_p (hash))
5999 {
6000 _bfd_error_handler (_("`%s' refers to a non entry function."),
6001 sym_name);
6002 ret = FALSE;
6003 }
6004 continue;
6005 }
6006 else
6007 {
6008 /* Only stubs for SG veneers should have been created. */
6009 BFD_ASSERT (stub_entry->stub_type == arm_stub_cmse_branch_thumb_only);
6010
6011 /* Check visibility hasn't changed. */
6012 if (!!(flags & BSF_GLOBAL)
6013 != (hash->root.root.type == bfd_link_hash_defined))
6014 _bfd_error_handler
6015 (_("%B: visibility of symbol `%s' has changed."), in_implib_bfd,
6016 sym_name);
6017
6018 stub_entry->stub_offset = stub_offset;
6019 }
6020
6021 /* Size should match that of a SG veneer. */
6022 if (intsym->st_size != cmse_stub_size)
6023 {
6024 _bfd_error_handler (_("%B: incorrect size for symbol `%s'."),
6025 in_implib_bfd, sym_name);
6026 ret = FALSE;
6027 }
6028
6029 /* Previous veneer address is before current SG veneer section. */
6030 if (veneer_value < cmse_stub_sec_vma)
6031 {
6032 /* Avoid offset underflow. */
6033 if (stub_entry)
6034 stub_entry->stub_offset = 0;
6035 stub_offset = 0;
6036 ret = FALSE;
6037 }
6038
6039 /* Complain if stub offset not a multiple of stub size. */
6040 if (stub_offset % cmse_stub_size)
6041 {
6042 _bfd_error_handler
6043 (_("Offset of veneer for entry function `%s' not a multiple of "
6044 "its size."), sym_name);
6045 ret = FALSE;
6046 }
6047
6048 if (!ret)
6049 continue;
6050
6051 new_cmse_stubs_created--;
6052 if (veneer_value < cmse_stub_array_start)
6053 cmse_stub_array_start = veneer_value;
6054 next_cmse_stub_offset = stub_offset + ((cmse_stub_size + 7) & ~7);
6055 if (next_cmse_stub_offset > htab->new_cmse_stub_offset)
6056 htab->new_cmse_stub_offset = next_cmse_stub_offset;
6057 }
6058
6059 if (!info->out_implib_bfd && new_cmse_stubs_created != 0)
6060 {
6061 BFD_ASSERT (new_cmse_stubs_created > 0);
6062 _bfd_error_handler
6063 (_("new entry function(s) introduced but no output import library "
6064 "specified:"));
6065 bfd_hash_traverse (&htab->stub_hash_table, arm_list_new_cmse_stub, info);
6066 }
6067
6068 if (cmse_stub_array_start != cmse_stub_sec_vma)
6069 {
6070 _bfd_error_handler
6071 (_("Start address of `%s' is different from previous link."),
6072 out_sec_name);
6073 ret = FALSE;
6074 }
6075
6076 free_sym_buf:
6077 free (sympp);
6078 return ret;
6079 }
6080
6081 /* Determine and set the size of the stub section for a final link.
6082
6083 The basic idea here is to examine all the relocations looking for
6084 PC-relative calls to a target that is unreachable with a "bl"
6085 instruction. */
6086
6087 bfd_boolean
6088 elf32_arm_size_stubs (bfd *output_bfd,
6089 bfd *stub_bfd,
6090 struct bfd_link_info *info,
6091 bfd_signed_vma group_size,
6092 asection * (*add_stub_section) (const char *, asection *,
6093 asection *,
6094 unsigned int),
6095 void (*layout_sections_again) (void))
6096 {
6097 bfd_boolean ret = TRUE;
6098 obj_attribute *out_attr;
6099 int cmse_stub_created = 0;
6100 bfd_size_type stub_group_size;
6101 bfd_boolean m_profile, stubs_always_after_branch, first_veneer_scan = TRUE;
6102 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
6103 struct a8_erratum_fix *a8_fixes = NULL;
6104 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
6105 struct a8_erratum_reloc *a8_relocs = NULL;
6106 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
6107
6108 if (htab == NULL)
6109 return FALSE;
6110
6111 if (htab->fix_cortex_a8)
6112 {
6113 a8_fixes = (struct a8_erratum_fix *)
6114 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
6115 a8_relocs = (struct a8_erratum_reloc *)
6116 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
6117 }
6118
6119 /* Propagate mach to stub bfd, because it may not have been
6120 finalized when we created stub_bfd. */
6121 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
6122 bfd_get_mach (output_bfd));
6123
6124 /* Stash our params away. */
6125 htab->stub_bfd = stub_bfd;
6126 htab->add_stub_section = add_stub_section;
6127 htab->layout_sections_again = layout_sections_again;
6128 stubs_always_after_branch = group_size < 0;
6129
6130 out_attr = elf_known_obj_attributes_proc (output_bfd);
6131 m_profile = out_attr[Tag_CPU_arch_profile].i == 'M';
6132
6133 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
6134 as the first half of a 32-bit branch straddling two 4K pages. This is a
6135 crude way of enforcing that. */
6136 if (htab->fix_cortex_a8)
6137 stubs_always_after_branch = 1;
6138
6139 if (group_size < 0)
6140 stub_group_size = -group_size;
6141 else
6142 stub_group_size = group_size;
6143
6144 if (stub_group_size == 1)
6145 {
6146 /* Default values. */
6147 /* Thumb branch range is +-4MB has to be used as the default
6148 maximum size (a given section can contain both ARM and Thumb
6149 code, so the worst case has to be taken into account).
6150
6151 This value is 24K less than that, which allows for 2025
6152 12-byte stubs. If we exceed that, then we will fail to link.
6153 The user will have to relink with an explicit group size
6154 option. */
6155 stub_group_size = 4170000;
6156 }
6157
6158 group_sections (htab, stub_group_size, stubs_always_after_branch);
6159
6160 /* If we're applying the cortex A8 fix, we need to determine the
6161 program header size now, because we cannot change it later --
6162 that could alter section placements. Notice the A8 erratum fix
6163 ends up requiring the section addresses to remain unchanged
6164 modulo the page size. That's something we cannot represent
6165 inside BFD, and we don't want to force the section alignment to
6166 be the page size. */
6167 if (htab->fix_cortex_a8)
6168 (*htab->layout_sections_again) ();
6169
6170 while (1)
6171 {
6172 bfd *input_bfd;
6173 unsigned int bfd_indx;
6174 asection *stub_sec;
6175 enum elf32_arm_stub_type stub_type;
6176 bfd_boolean stub_changed = FALSE;
6177 unsigned prev_num_a8_fixes = num_a8_fixes;
6178
6179 num_a8_fixes = 0;
6180 for (input_bfd = info->input_bfds, bfd_indx = 0;
6181 input_bfd != NULL;
6182 input_bfd = input_bfd->link.next, bfd_indx++)
6183 {
6184 Elf_Internal_Shdr *symtab_hdr;
6185 asection *section;
6186 Elf_Internal_Sym *local_syms = NULL;
6187
6188 if (!is_arm_elf (input_bfd))
6189 continue;
6190
6191 num_a8_relocs = 0;
6192
6193 /* We'll need the symbol table in a second. */
6194 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
6195 if (symtab_hdr->sh_info == 0)
6196 continue;
6197
6198 /* Limit scan of symbols to object file whose profile is
6199 Microcontroller to not hinder performance in the general case. */
6200 if (m_profile && first_veneer_scan)
6201 {
6202 struct elf_link_hash_entry **sym_hashes;
6203
6204 sym_hashes = elf_sym_hashes (input_bfd);
6205 if (!cmse_scan (input_bfd, htab, out_attr, sym_hashes,
6206 &cmse_stub_created))
6207 goto error_ret_free_local;
6208
6209 if (cmse_stub_created != 0)
6210 stub_changed = TRUE;
6211 }
6212
6213 /* Walk over each section attached to the input bfd. */
6214 for (section = input_bfd->sections;
6215 section != NULL;
6216 section = section->next)
6217 {
6218 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
6219
6220 /* If there aren't any relocs, then there's nothing more
6221 to do. */
6222 if ((section->flags & SEC_RELOC) == 0
6223 || section->reloc_count == 0
6224 || (section->flags & SEC_CODE) == 0)
6225 continue;
6226
6227 /* If this section is a link-once section that will be
6228 discarded, then don't create any stubs. */
6229 if (section->output_section == NULL
6230 || section->output_section->owner != output_bfd)
6231 continue;
6232
6233 /* Get the relocs. */
6234 internal_relocs
6235 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
6236 NULL, info->keep_memory);
6237 if (internal_relocs == NULL)
6238 goto error_ret_free_local;
6239
6240 /* Now examine each relocation. */
6241 irela = internal_relocs;
6242 irelaend = irela + section->reloc_count;
6243 for (; irela < irelaend; irela++)
6244 {
6245 unsigned int r_type, r_indx;
6246 asection *sym_sec;
6247 bfd_vma sym_value;
6248 bfd_vma destination;
6249 struct elf32_arm_link_hash_entry *hash;
6250 const char *sym_name;
6251 unsigned char st_type;
6252 enum arm_st_branch_type branch_type;
6253 bfd_boolean created_stub = FALSE;
6254
6255 r_type = ELF32_R_TYPE (irela->r_info);
6256 r_indx = ELF32_R_SYM (irela->r_info);
6257
6258 if (r_type >= (unsigned int) R_ARM_max)
6259 {
6260 bfd_set_error (bfd_error_bad_value);
6261 error_ret_free_internal:
6262 if (elf_section_data (section)->relocs == NULL)
6263 free (internal_relocs);
6264 /* Fall through. */
6265 error_ret_free_local:
6266 if (local_syms != NULL
6267 && (symtab_hdr->contents
6268 != (unsigned char *) local_syms))
6269 free (local_syms);
6270 return FALSE;
6271 }
6272
6273 hash = NULL;
6274 if (r_indx >= symtab_hdr->sh_info)
6275 hash = elf32_arm_hash_entry
6276 (elf_sym_hashes (input_bfd)
6277 [r_indx - symtab_hdr->sh_info]);
6278
6279 /* Only look for stubs on branch instructions, or
6280 non-relaxed TLSCALL */
6281 if ((r_type != (unsigned int) R_ARM_CALL)
6282 && (r_type != (unsigned int) R_ARM_THM_CALL)
6283 && (r_type != (unsigned int) R_ARM_JUMP24)
6284 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
6285 && (r_type != (unsigned int) R_ARM_THM_XPC22)
6286 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
6287 && (r_type != (unsigned int) R_ARM_PLT32)
6288 && !((r_type == (unsigned int) R_ARM_TLS_CALL
6289 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6290 && r_type == elf32_arm_tls_transition
6291 (info, r_type, &hash->root)
6292 && ((hash ? hash->tls_type
6293 : (elf32_arm_local_got_tls_type
6294 (input_bfd)[r_indx]))
6295 & GOT_TLS_GDESC) != 0))
6296 continue;
6297
6298 /* Now determine the call target, its name, value,
6299 section. */
6300 sym_sec = NULL;
6301 sym_value = 0;
6302 destination = 0;
6303 sym_name = NULL;
6304
6305 if (r_type == (unsigned int) R_ARM_TLS_CALL
6306 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
6307 {
6308 /* A non-relaxed TLS call. The target is the
6309 plt-resident trampoline and nothing to do
6310 with the symbol. */
6311 BFD_ASSERT (htab->tls_trampoline > 0);
6312 sym_sec = htab->root.splt;
6313 sym_value = htab->tls_trampoline;
6314 hash = 0;
6315 st_type = STT_FUNC;
6316 branch_type = ST_BRANCH_TO_ARM;
6317 }
6318 else if (!hash)
6319 {
6320 /* It's a local symbol. */
6321 Elf_Internal_Sym *sym;
6322
6323 if (local_syms == NULL)
6324 {
6325 local_syms
6326 = (Elf_Internal_Sym *) symtab_hdr->contents;
6327 if (local_syms == NULL)
6328 local_syms
6329 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
6330 symtab_hdr->sh_info, 0,
6331 NULL, NULL, NULL);
6332 if (local_syms == NULL)
6333 goto error_ret_free_internal;
6334 }
6335
6336 sym = local_syms + r_indx;
6337 if (sym->st_shndx == SHN_UNDEF)
6338 sym_sec = bfd_und_section_ptr;
6339 else if (sym->st_shndx == SHN_ABS)
6340 sym_sec = bfd_abs_section_ptr;
6341 else if (sym->st_shndx == SHN_COMMON)
6342 sym_sec = bfd_com_section_ptr;
6343 else
6344 sym_sec =
6345 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
6346
6347 if (!sym_sec)
6348 /* This is an undefined symbol. It can never
6349 be resolved. */
6350 continue;
6351
6352 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
6353 sym_value = sym->st_value;
6354 destination = (sym_value + irela->r_addend
6355 + sym_sec->output_offset
6356 + sym_sec->output_section->vma);
6357 st_type = ELF_ST_TYPE (sym->st_info);
6358 branch_type =
6359 ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
6360 sym_name
6361 = bfd_elf_string_from_elf_section (input_bfd,
6362 symtab_hdr->sh_link,
6363 sym->st_name);
6364 }
6365 else
6366 {
6367 /* It's an external symbol. */
6368 while (hash->root.root.type == bfd_link_hash_indirect
6369 || hash->root.root.type == bfd_link_hash_warning)
6370 hash = ((struct elf32_arm_link_hash_entry *)
6371 hash->root.root.u.i.link);
6372
6373 if (hash->root.root.type == bfd_link_hash_defined
6374 || hash->root.root.type == bfd_link_hash_defweak)
6375 {
6376 sym_sec = hash->root.root.u.def.section;
6377 sym_value = hash->root.root.u.def.value;
6378
6379 struct elf32_arm_link_hash_table *globals =
6380 elf32_arm_hash_table (info);
6381
6382 /* For a destination in a shared library,
6383 use the PLT stub as target address to
6384 decide whether a branch stub is
6385 needed. */
6386 if (globals != NULL
6387 && globals->root.splt != NULL
6388 && hash != NULL
6389 && hash->root.plt.offset != (bfd_vma) -1)
6390 {
6391 sym_sec = globals->root.splt;
6392 sym_value = hash->root.plt.offset;
6393 if (sym_sec->output_section != NULL)
6394 destination = (sym_value
6395 + sym_sec->output_offset
6396 + sym_sec->output_section->vma);
6397 }
6398 else if (sym_sec->output_section != NULL)
6399 destination = (sym_value + irela->r_addend
6400 + sym_sec->output_offset
6401 + sym_sec->output_section->vma);
6402 }
6403 else if ((hash->root.root.type == bfd_link_hash_undefined)
6404 || (hash->root.root.type == bfd_link_hash_undefweak))
6405 {
6406 /* For a shared library, use the PLT stub as
6407 target address to decide whether a long
6408 branch stub is needed.
6409 For absolute code, they cannot be handled. */
6410 struct elf32_arm_link_hash_table *globals =
6411 elf32_arm_hash_table (info);
6412
6413 if (globals != NULL
6414 && globals->root.splt != NULL
6415 && hash != NULL
6416 && hash->root.plt.offset != (bfd_vma) -1)
6417 {
6418 sym_sec = globals->root.splt;
6419 sym_value = hash->root.plt.offset;
6420 if (sym_sec->output_section != NULL)
6421 destination = (sym_value
6422 + sym_sec->output_offset
6423 + sym_sec->output_section->vma);
6424 }
6425 else
6426 continue;
6427 }
6428 else
6429 {
6430 bfd_set_error (bfd_error_bad_value);
6431 goto error_ret_free_internal;
6432 }
6433 st_type = hash->root.type;
6434 branch_type =
6435 ARM_GET_SYM_BRANCH_TYPE (hash->root.target_internal);
6436 sym_name = hash->root.root.root.string;
6437 }
6438
6439 do
6440 {
6441 bfd_boolean new_stub;
6442 struct elf32_arm_stub_hash_entry *stub_entry;
6443
6444 /* Determine what (if any) linker stub is needed. */
6445 stub_type = arm_type_of_stub (info, section, irela,
6446 st_type, &branch_type,
6447 hash, destination, sym_sec,
6448 input_bfd, sym_name);
6449 if (stub_type == arm_stub_none)
6450 break;
6451
6452 /* We've either created a stub for this reloc already,
6453 or we are about to. */
6454 stub_entry =
6455 elf32_arm_create_stub (htab, stub_type, section, irela,
6456 sym_sec, hash,
6457 (char *) sym_name, sym_value,
6458 branch_type, &new_stub);
6459
6460 created_stub = stub_entry != NULL;
6461 if (!created_stub)
6462 goto error_ret_free_internal;
6463 else if (!new_stub)
6464 break;
6465 else
6466 stub_changed = TRUE;
6467 }
6468 while (0);
6469
6470 /* Look for relocations which might trigger Cortex-A8
6471 erratum. */
6472 if (htab->fix_cortex_a8
6473 && (r_type == (unsigned int) R_ARM_THM_JUMP24
6474 || r_type == (unsigned int) R_ARM_THM_JUMP19
6475 || r_type == (unsigned int) R_ARM_THM_CALL
6476 || r_type == (unsigned int) R_ARM_THM_XPC22))
6477 {
6478 bfd_vma from = section->output_section->vma
6479 + section->output_offset
6480 + irela->r_offset;
6481
6482 if ((from & 0xfff) == 0xffe)
6483 {
6484 /* Found a candidate. Note we haven't checked the
6485 destination is within 4K here: if we do so (and
6486 don't create an entry in a8_relocs) we can't tell
6487 that a branch should have been relocated when
6488 scanning later. */
6489 if (num_a8_relocs == a8_reloc_table_size)
6490 {
6491 a8_reloc_table_size *= 2;
6492 a8_relocs = (struct a8_erratum_reloc *)
6493 bfd_realloc (a8_relocs,
6494 sizeof (struct a8_erratum_reloc)
6495 * a8_reloc_table_size);
6496 }
6497
6498 a8_relocs[num_a8_relocs].from = from;
6499 a8_relocs[num_a8_relocs].destination = destination;
6500 a8_relocs[num_a8_relocs].r_type = r_type;
6501 a8_relocs[num_a8_relocs].branch_type = branch_type;
6502 a8_relocs[num_a8_relocs].sym_name = sym_name;
6503 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
6504 a8_relocs[num_a8_relocs].hash = hash;
6505
6506 num_a8_relocs++;
6507 }
6508 }
6509 }
6510
6511 /* We're done with the internal relocs, free them. */
6512 if (elf_section_data (section)->relocs == NULL)
6513 free (internal_relocs);
6514 }
6515
6516 if (htab->fix_cortex_a8)
6517 {
6518 /* Sort relocs which might apply to Cortex-A8 erratum. */
6519 qsort (a8_relocs, num_a8_relocs,
6520 sizeof (struct a8_erratum_reloc),
6521 &a8_reloc_compare);
6522
6523 /* Scan for branches which might trigger Cortex-A8 erratum. */
6524 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
6525 &num_a8_fixes, &a8_fix_table_size,
6526 a8_relocs, num_a8_relocs,
6527 prev_num_a8_fixes, &stub_changed)
6528 != 0)
6529 goto error_ret_free_local;
6530 }
6531
6532 if (local_syms != NULL
6533 && symtab_hdr->contents != (unsigned char *) local_syms)
6534 {
6535 if (!info->keep_memory)
6536 free (local_syms);
6537 else
6538 symtab_hdr->contents = (unsigned char *) local_syms;
6539 }
6540 }
6541
6542 if (first_veneer_scan
6543 && !set_cmse_veneer_addr_from_implib (info, htab,
6544 &cmse_stub_created))
6545 ret = FALSE;
6546
6547 if (prev_num_a8_fixes != num_a8_fixes)
6548 stub_changed = TRUE;
6549
6550 if (!stub_changed)
6551 break;
6552
6553 /* OK, we've added some stubs. Find out the new size of the
6554 stub sections. */
6555 for (stub_sec = htab->stub_bfd->sections;
6556 stub_sec != NULL;
6557 stub_sec = stub_sec->next)
6558 {
6559 /* Ignore non-stub sections. */
6560 if (!strstr (stub_sec->name, STUB_SUFFIX))
6561 continue;
6562
6563 stub_sec->size = 0;
6564 }
6565
6566 /* Add new SG veneers after those already in the input import
6567 library. */
6568 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6569 stub_type++)
6570 {
6571 bfd_vma *start_offset_p;
6572 asection **stub_sec_p;
6573
6574 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6575 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6576 if (start_offset_p == NULL)
6577 continue;
6578
6579 BFD_ASSERT (stub_sec_p != NULL);
6580 if (*stub_sec_p != NULL)
6581 (*stub_sec_p)->size = *start_offset_p;
6582 }
6583
6584 /* Compute stub section size, considering padding. */
6585 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
6586 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type;
6587 stub_type++)
6588 {
6589 int size, padding;
6590 asection **stub_sec_p;
6591
6592 padding = arm_dedicated_stub_section_padding (stub_type);
6593 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6594 /* Skip if no stub input section or no stub section padding
6595 required. */
6596 if ((stub_sec_p != NULL && *stub_sec_p == NULL) || padding == 0)
6597 continue;
6598 /* Stub section padding required but no dedicated section. */
6599 BFD_ASSERT (stub_sec_p);
6600
6601 size = (*stub_sec_p)->size;
6602 size = (size + padding - 1) & ~(padding - 1);
6603 (*stub_sec_p)->size = size;
6604 }
6605
6606 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
6607 if (htab->fix_cortex_a8)
6608 for (i = 0; i < num_a8_fixes; i++)
6609 {
6610 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
6611 a8_fixes[i].section, htab, a8_fixes[i].stub_type);
6612
6613 if (stub_sec == NULL)
6614 return FALSE;
6615
6616 stub_sec->size
6617 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
6618 NULL);
6619 }
6620
6621
6622 /* Ask the linker to do its stuff. */
6623 (*htab->layout_sections_again) ();
6624 first_veneer_scan = FALSE;
6625 }
6626
6627 /* Add stubs for Cortex-A8 erratum fixes now. */
6628 if (htab->fix_cortex_a8)
6629 {
6630 for (i = 0; i < num_a8_fixes; i++)
6631 {
6632 struct elf32_arm_stub_hash_entry *stub_entry;
6633 char *stub_name = a8_fixes[i].stub_name;
6634 asection *section = a8_fixes[i].section;
6635 unsigned int section_id = a8_fixes[i].section->id;
6636 asection *link_sec = htab->stub_group[section_id].link_sec;
6637 asection *stub_sec = htab->stub_group[section_id].stub_sec;
6638 const insn_sequence *template_sequence;
6639 int template_size, size = 0;
6640
6641 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
6642 TRUE, FALSE);
6643 if (stub_entry == NULL)
6644 {
6645 _bfd_error_handler (_("%s: cannot create stub entry %s"),
6646 section->owner, stub_name);
6647 return FALSE;
6648 }
6649
6650 stub_entry->stub_sec = stub_sec;
6651 stub_entry->stub_offset = (bfd_vma) -1;
6652 stub_entry->id_sec = link_sec;
6653 stub_entry->stub_type = a8_fixes[i].stub_type;
6654 stub_entry->source_value = a8_fixes[i].offset;
6655 stub_entry->target_section = a8_fixes[i].section;
6656 stub_entry->target_value = a8_fixes[i].target_offset;
6657 stub_entry->orig_insn = a8_fixes[i].orig_insn;
6658 stub_entry->branch_type = a8_fixes[i].branch_type;
6659
6660 size = find_stub_size_and_template (a8_fixes[i].stub_type,
6661 &template_sequence,
6662 &template_size);
6663
6664 stub_entry->stub_size = size;
6665 stub_entry->stub_template = template_sequence;
6666 stub_entry->stub_template_size = template_size;
6667 }
6668
6669 /* Stash the Cortex-A8 erratum fix array for use later in
6670 elf32_arm_write_section(). */
6671 htab->a8_erratum_fixes = a8_fixes;
6672 htab->num_a8_erratum_fixes = num_a8_fixes;
6673 }
6674 else
6675 {
6676 htab->a8_erratum_fixes = NULL;
6677 htab->num_a8_erratum_fixes = 0;
6678 }
6679 return ret;
6680 }
6681
6682 /* Build all the stubs associated with the current output file. The
6683 stubs are kept in a hash table attached to the main linker hash
6684 table. We also set up the .plt entries for statically linked PIC
6685 functions here. This function is called via arm_elf_finish in the
6686 linker. */
6687
6688 bfd_boolean
6689 elf32_arm_build_stubs (struct bfd_link_info *info)
6690 {
6691 asection *stub_sec;
6692 struct bfd_hash_table *table;
6693 enum elf32_arm_stub_type stub_type;
6694 struct elf32_arm_link_hash_table *htab;
6695
6696 htab = elf32_arm_hash_table (info);
6697 if (htab == NULL)
6698 return FALSE;
6699
6700 for (stub_sec = htab->stub_bfd->sections;
6701 stub_sec != NULL;
6702 stub_sec = stub_sec->next)
6703 {
6704 bfd_size_type size;
6705
6706 /* Ignore non-stub sections. */
6707 if (!strstr (stub_sec->name, STUB_SUFFIX))
6708 continue;
6709
6710 /* Allocate memory to hold the linker stubs. Zeroing the stub sections
6711 must at least be done for stub section requiring padding and for SG
6712 veneers to ensure that a non secure code branching to a removed SG
6713 veneer causes an error. */
6714 size = stub_sec->size;
6715 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
6716 if (stub_sec->contents == NULL && size != 0)
6717 return FALSE;
6718
6719 stub_sec->size = 0;
6720 }
6721
6722 /* Add new SG veneers after those already in the input import library. */
6723 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
6724 {
6725 bfd_vma *start_offset_p;
6726 asection **stub_sec_p;
6727
6728 start_offset_p = arm_new_stubs_start_offset_ptr (htab, stub_type);
6729 stub_sec_p = arm_dedicated_stub_input_section_ptr (htab, stub_type);
6730 if (start_offset_p == NULL)
6731 continue;
6732
6733 BFD_ASSERT (stub_sec_p != NULL);
6734 if (*stub_sec_p != NULL)
6735 (*stub_sec_p)->size = *start_offset_p;
6736 }
6737
6738 /* Build the stubs as directed by the stub hash table. */
6739 table = &htab->stub_hash_table;
6740 bfd_hash_traverse (table, arm_build_one_stub, info);
6741 if (htab->fix_cortex_a8)
6742 {
6743 /* Place the cortex a8 stubs last. */
6744 htab->fix_cortex_a8 = -1;
6745 bfd_hash_traverse (table, arm_build_one_stub, info);
6746 }
6747
6748 return TRUE;
6749 }
6750
6751 /* Locate the Thumb encoded calling stub for NAME. */
6752
6753 static struct elf_link_hash_entry *
6754 find_thumb_glue (struct bfd_link_info *link_info,
6755 const char *name,
6756 char **error_message)
6757 {
6758 char *tmp_name;
6759 struct elf_link_hash_entry *hash;
6760 struct elf32_arm_link_hash_table *hash_table;
6761
6762 /* We need a pointer to the armelf specific hash table. */
6763 hash_table = elf32_arm_hash_table (link_info);
6764 if (hash_table == NULL)
6765 return NULL;
6766
6767 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6768 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
6769
6770 BFD_ASSERT (tmp_name);
6771
6772 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
6773
6774 hash = elf_link_hash_lookup
6775 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6776
6777 if (hash == NULL
6778 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
6779 tmp_name, name) == -1)
6780 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6781
6782 free (tmp_name);
6783
6784 return hash;
6785 }
6786
6787 /* Locate the ARM encoded calling stub for NAME. */
6788
6789 static struct elf_link_hash_entry *
6790 find_arm_glue (struct bfd_link_info *link_info,
6791 const char *name,
6792 char **error_message)
6793 {
6794 char *tmp_name;
6795 struct elf_link_hash_entry *myh;
6796 struct elf32_arm_link_hash_table *hash_table;
6797
6798 /* We need a pointer to the elfarm specific hash table. */
6799 hash_table = elf32_arm_hash_table (link_info);
6800 if (hash_table == NULL)
6801 return NULL;
6802
6803 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6804 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6805
6806 BFD_ASSERT (tmp_name);
6807
6808 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6809
6810 myh = elf_link_hash_lookup
6811 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
6812
6813 if (myh == NULL
6814 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
6815 tmp_name, name) == -1)
6816 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
6817
6818 free (tmp_name);
6819
6820 return myh;
6821 }
6822
6823 /* ARM->Thumb glue (static images):
6824
6825 .arm
6826 __func_from_arm:
6827 ldr r12, __func_addr
6828 bx r12
6829 __func_addr:
6830 .word func @ behave as if you saw a ARM_32 reloc.
6831
6832 (v5t static images)
6833 .arm
6834 __func_from_arm:
6835 ldr pc, __func_addr
6836 __func_addr:
6837 .word func @ behave as if you saw a ARM_32 reloc.
6838
6839 (relocatable images)
6840 .arm
6841 __func_from_arm:
6842 ldr r12, __func_offset
6843 add r12, r12, pc
6844 bx r12
6845 __func_offset:
6846 .word func - . */
6847
6848 #define ARM2THUMB_STATIC_GLUE_SIZE 12
6849 static const insn32 a2t1_ldr_insn = 0xe59fc000;
6850 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
6851 static const insn32 a2t3_func_addr_insn = 0x00000001;
6852
6853 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
6854 static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
6855 static const insn32 a2t2v5_func_addr_insn = 0x00000001;
6856
6857 #define ARM2THUMB_PIC_GLUE_SIZE 16
6858 static const insn32 a2t1p_ldr_insn = 0xe59fc004;
6859 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
6860 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
6861
6862 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
6863
6864 .thumb .thumb
6865 .align 2 .align 2
6866 __func_from_thumb: __func_from_thumb:
6867 bx pc push {r6, lr}
6868 nop ldr r6, __func_addr
6869 .arm mov lr, pc
6870 b func bx r6
6871 .arm
6872 ;; back_to_thumb
6873 ldmia r13! {r6, lr}
6874 bx lr
6875 __func_addr:
6876 .word func */
6877
6878 #define THUMB2ARM_GLUE_SIZE 8
6879 static const insn16 t2a1_bx_pc_insn = 0x4778;
6880 static const insn16 t2a2_noop_insn = 0x46c0;
6881 static const insn32 t2a3_b_insn = 0xea000000;
6882
6883 #define VFP11_ERRATUM_VENEER_SIZE 8
6884 #define STM32L4XX_ERRATUM_LDM_VENEER_SIZE 16
6885 #define STM32L4XX_ERRATUM_VLDM_VENEER_SIZE 24
6886
6887 #define ARM_BX_VENEER_SIZE 12
6888 static const insn32 armbx1_tst_insn = 0xe3100001;
6889 static const insn32 armbx2_moveq_insn = 0x01a0f000;
6890 static const insn32 armbx3_bx_insn = 0xe12fff10;
6891
6892 #ifndef ELFARM_NABI_C_INCLUDED
6893 static void
6894 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
6895 {
6896 asection * s;
6897 bfd_byte * contents;
6898
6899 if (size == 0)
6900 {
6901 /* Do not include empty glue sections in the output. */
6902 if (abfd != NULL)
6903 {
6904 s = bfd_get_linker_section (abfd, name);
6905 if (s != NULL)
6906 s->flags |= SEC_EXCLUDE;
6907 }
6908 return;
6909 }
6910
6911 BFD_ASSERT (abfd != NULL);
6912
6913 s = bfd_get_linker_section (abfd, name);
6914 BFD_ASSERT (s != NULL);
6915
6916 contents = (bfd_byte *) bfd_alloc (abfd, size);
6917
6918 BFD_ASSERT (s->size == size);
6919 s->contents = contents;
6920 }
6921
6922 bfd_boolean
6923 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
6924 {
6925 struct elf32_arm_link_hash_table * globals;
6926
6927 globals = elf32_arm_hash_table (info);
6928 BFD_ASSERT (globals != NULL);
6929
6930 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6931 globals->arm_glue_size,
6932 ARM2THUMB_GLUE_SECTION_NAME);
6933
6934 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6935 globals->thumb_glue_size,
6936 THUMB2ARM_GLUE_SECTION_NAME);
6937
6938 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6939 globals->vfp11_erratum_glue_size,
6940 VFP11_ERRATUM_VENEER_SECTION_NAME);
6941
6942 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6943 globals->stm32l4xx_erratum_glue_size,
6944 STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
6945
6946 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
6947 globals->bx_glue_size,
6948 ARM_BX_GLUE_SECTION_NAME);
6949
6950 return TRUE;
6951 }
6952
6953 /* Allocate space and symbols for calling a Thumb function from Arm mode.
6954 returns the symbol identifying the stub. */
6955
6956 static struct elf_link_hash_entry *
6957 record_arm_to_thumb_glue (struct bfd_link_info * link_info,
6958 struct elf_link_hash_entry * h)
6959 {
6960 const char * name = h->root.root.string;
6961 asection * s;
6962 char * tmp_name;
6963 struct elf_link_hash_entry * myh;
6964 struct bfd_link_hash_entry * bh;
6965 struct elf32_arm_link_hash_table * globals;
6966 bfd_vma val;
6967 bfd_size_type size;
6968
6969 globals = elf32_arm_hash_table (link_info);
6970 BFD_ASSERT (globals != NULL);
6971 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
6972
6973 s = bfd_get_linker_section
6974 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
6975
6976 BFD_ASSERT (s != NULL);
6977
6978 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
6979 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
6980
6981 BFD_ASSERT (tmp_name);
6982
6983 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
6984
6985 myh = elf_link_hash_lookup
6986 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
6987
6988 if (myh != NULL)
6989 {
6990 /* We've already seen this guy. */
6991 free (tmp_name);
6992 return myh;
6993 }
6994
6995 /* The only trick here is using hash_table->arm_glue_size as the value.
6996 Even though the section isn't allocated yet, this is where we will be
6997 putting it. The +1 on the value marks that the stub has not been
6998 output yet - not that it is a Thumb function. */
6999 bh = NULL;
7000 val = globals->arm_glue_size + 1;
7001 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7002 tmp_name, BSF_GLOBAL, s, val,
7003 NULL, TRUE, FALSE, &bh);
7004
7005 myh = (struct elf_link_hash_entry *) bh;
7006 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7007 myh->forced_local = 1;
7008
7009 free (tmp_name);
7010
7011 if (bfd_link_pic (link_info)
7012 || globals->root.is_relocatable_executable
7013 || globals->pic_veneer)
7014 size = ARM2THUMB_PIC_GLUE_SIZE;
7015 else if (globals->use_blx)
7016 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
7017 else
7018 size = ARM2THUMB_STATIC_GLUE_SIZE;
7019
7020 s->size += size;
7021 globals->arm_glue_size += size;
7022
7023 return myh;
7024 }
7025
7026 /* Allocate space for ARMv4 BX veneers. */
7027
7028 static void
7029 record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
7030 {
7031 asection * s;
7032 struct elf32_arm_link_hash_table *globals;
7033 char *tmp_name;
7034 struct elf_link_hash_entry *myh;
7035 struct bfd_link_hash_entry *bh;
7036 bfd_vma val;
7037
7038 /* BX PC does not need a veneer. */
7039 if (reg == 15)
7040 return;
7041
7042 globals = elf32_arm_hash_table (link_info);
7043 BFD_ASSERT (globals != NULL);
7044 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7045
7046 /* Check if this veneer has already been allocated. */
7047 if (globals->bx_glue_offset[reg])
7048 return;
7049
7050 s = bfd_get_linker_section
7051 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
7052
7053 BFD_ASSERT (s != NULL);
7054
7055 /* Add symbol for veneer. */
7056 tmp_name = (char *)
7057 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
7058
7059 BFD_ASSERT (tmp_name);
7060
7061 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
7062
7063 myh = elf_link_hash_lookup
7064 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
7065
7066 BFD_ASSERT (myh == NULL);
7067
7068 bh = NULL;
7069 val = globals->bx_glue_size;
7070 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
7071 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7072 NULL, TRUE, FALSE, &bh);
7073
7074 myh = (struct elf_link_hash_entry *) bh;
7075 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7076 myh->forced_local = 1;
7077
7078 s->size += ARM_BX_VENEER_SIZE;
7079 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
7080 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
7081 }
7082
7083
7084 /* Add an entry to the code/data map for section SEC. */
7085
7086 static void
7087 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
7088 {
7089 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
7090 unsigned int newidx;
7091
7092 if (sec_data->map == NULL)
7093 {
7094 sec_data->map = (elf32_arm_section_map *)
7095 bfd_malloc (sizeof (elf32_arm_section_map));
7096 sec_data->mapcount = 0;
7097 sec_data->mapsize = 1;
7098 }
7099
7100 newidx = sec_data->mapcount++;
7101
7102 if (sec_data->mapcount > sec_data->mapsize)
7103 {
7104 sec_data->mapsize *= 2;
7105 sec_data->map = (elf32_arm_section_map *)
7106 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
7107 * sizeof (elf32_arm_section_map));
7108 }
7109
7110 if (sec_data->map)
7111 {
7112 sec_data->map[newidx].vma = vma;
7113 sec_data->map[newidx].type = type;
7114 }
7115 }
7116
7117
7118 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
7119 veneers are handled for now. */
7120
7121 static bfd_vma
7122 record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
7123 elf32_vfp11_erratum_list *branch,
7124 bfd *branch_bfd,
7125 asection *branch_sec,
7126 unsigned int offset)
7127 {
7128 asection *s;
7129 struct elf32_arm_link_hash_table *hash_table;
7130 char *tmp_name;
7131 struct elf_link_hash_entry *myh;
7132 struct bfd_link_hash_entry *bh;
7133 bfd_vma val;
7134 struct _arm_elf_section_data *sec_data;
7135 elf32_vfp11_erratum_list *newerr;
7136
7137 hash_table = elf32_arm_hash_table (link_info);
7138 BFD_ASSERT (hash_table != NULL);
7139 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7140
7141 s = bfd_get_linker_section
7142 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
7143
7144 sec_data = elf32_arm_section_data (s);
7145
7146 BFD_ASSERT (s != NULL);
7147
7148 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7149 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
7150
7151 BFD_ASSERT (tmp_name);
7152
7153 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
7154 hash_table->num_vfp11_fixes);
7155
7156 myh = elf_link_hash_lookup
7157 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7158
7159 BFD_ASSERT (myh == NULL);
7160
7161 bh = NULL;
7162 val = hash_table->vfp11_erratum_glue_size;
7163 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7164 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7165 NULL, TRUE, FALSE, &bh);
7166
7167 myh = (struct elf_link_hash_entry *) bh;
7168 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7169 myh->forced_local = 1;
7170
7171 /* Link veneer back to calling location. */
7172 sec_data->erratumcount += 1;
7173 newerr = (elf32_vfp11_erratum_list *)
7174 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
7175
7176 newerr->type = VFP11_ERRATUM_ARM_VENEER;
7177 newerr->vma = -1;
7178 newerr->u.v.branch = branch;
7179 newerr->u.v.id = hash_table->num_vfp11_fixes;
7180 branch->u.b.veneer = newerr;
7181
7182 newerr->next = sec_data->erratumlist;
7183 sec_data->erratumlist = newerr;
7184
7185 /* A symbol for the return from the veneer. */
7186 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
7187 hash_table->num_vfp11_fixes);
7188
7189 myh = elf_link_hash_lookup
7190 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7191
7192 if (myh != NULL)
7193 abort ();
7194
7195 bh = NULL;
7196 val = offset + 4;
7197 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7198 branch_sec, val, NULL, TRUE, FALSE, &bh);
7199
7200 myh = (struct elf_link_hash_entry *) bh;
7201 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7202 myh->forced_local = 1;
7203
7204 free (tmp_name);
7205
7206 /* Generate a mapping symbol for the veneer section, and explicitly add an
7207 entry for that symbol to the code/data map for the section. */
7208 if (hash_table->vfp11_erratum_glue_size == 0)
7209 {
7210 bh = NULL;
7211 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
7212 ever requires this erratum fix. */
7213 _bfd_generic_link_add_one_symbol (link_info,
7214 hash_table->bfd_of_glue_owner, "$a",
7215 BSF_LOCAL, s, 0, NULL,
7216 TRUE, FALSE, &bh);
7217
7218 myh = (struct elf_link_hash_entry *) bh;
7219 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7220 myh->forced_local = 1;
7221
7222 /* The elf32_arm_init_maps function only cares about symbols from input
7223 BFDs. We must make a note of this generated mapping symbol
7224 ourselves so that code byteswapping works properly in
7225 elf32_arm_write_section. */
7226 elf32_arm_section_map_add (s, 'a', 0);
7227 }
7228
7229 s->size += VFP11_ERRATUM_VENEER_SIZE;
7230 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
7231 hash_table->num_vfp11_fixes++;
7232
7233 /* The offset of the veneer. */
7234 return val;
7235 }
7236
7237 /* Record information about a STM32L4XX STM erratum veneer. Only THUMB-mode
7238 veneers need to be handled because used only in Cortex-M. */
7239
7240 static bfd_vma
7241 record_stm32l4xx_erratum_veneer (struct bfd_link_info *link_info,
7242 elf32_stm32l4xx_erratum_list *branch,
7243 bfd *branch_bfd,
7244 asection *branch_sec,
7245 unsigned int offset,
7246 bfd_size_type veneer_size)
7247 {
7248 asection *s;
7249 struct elf32_arm_link_hash_table *hash_table;
7250 char *tmp_name;
7251 struct elf_link_hash_entry *myh;
7252 struct bfd_link_hash_entry *bh;
7253 bfd_vma val;
7254 struct _arm_elf_section_data *sec_data;
7255 elf32_stm32l4xx_erratum_list *newerr;
7256
7257 hash_table = elf32_arm_hash_table (link_info);
7258 BFD_ASSERT (hash_table != NULL);
7259 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
7260
7261 s = bfd_get_linker_section
7262 (hash_table->bfd_of_glue_owner, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7263
7264 BFD_ASSERT (s != NULL);
7265
7266 sec_data = elf32_arm_section_data (s);
7267
7268 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
7269 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
7270
7271 BFD_ASSERT (tmp_name);
7272
7273 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
7274 hash_table->num_stm32l4xx_fixes);
7275
7276 myh = elf_link_hash_lookup
7277 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7278
7279 BFD_ASSERT (myh == NULL);
7280
7281 bh = NULL;
7282 val = hash_table->stm32l4xx_erratum_glue_size;
7283 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
7284 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
7285 NULL, TRUE, FALSE, &bh);
7286
7287 myh = (struct elf_link_hash_entry *) bh;
7288 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7289 myh->forced_local = 1;
7290
7291 /* Link veneer back to calling location. */
7292 sec_data->stm32l4xx_erratumcount += 1;
7293 newerr = (elf32_stm32l4xx_erratum_list *)
7294 bfd_zmalloc (sizeof (elf32_stm32l4xx_erratum_list));
7295
7296 newerr->type = STM32L4XX_ERRATUM_VENEER;
7297 newerr->vma = -1;
7298 newerr->u.v.branch = branch;
7299 newerr->u.v.id = hash_table->num_stm32l4xx_fixes;
7300 branch->u.b.veneer = newerr;
7301
7302 newerr->next = sec_data->stm32l4xx_erratumlist;
7303 sec_data->stm32l4xx_erratumlist = newerr;
7304
7305 /* A symbol for the return from the veneer. */
7306 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
7307 hash_table->num_stm32l4xx_fixes);
7308
7309 myh = elf_link_hash_lookup
7310 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
7311
7312 if (myh != NULL)
7313 abort ();
7314
7315 bh = NULL;
7316 val = offset + 4;
7317 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
7318 branch_sec, val, NULL, TRUE, FALSE, &bh);
7319
7320 myh = (struct elf_link_hash_entry *) bh;
7321 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
7322 myh->forced_local = 1;
7323
7324 free (tmp_name);
7325
7326 /* Generate a mapping symbol for the veneer section, and explicitly add an
7327 entry for that symbol to the code/data map for the section. */
7328 if (hash_table->stm32l4xx_erratum_glue_size == 0)
7329 {
7330 bh = NULL;
7331 /* Creates a THUMB symbol since there is no other choice. */
7332 _bfd_generic_link_add_one_symbol (link_info,
7333 hash_table->bfd_of_glue_owner, "$t",
7334 BSF_LOCAL, s, 0, NULL,
7335 TRUE, FALSE, &bh);
7336
7337 myh = (struct elf_link_hash_entry *) bh;
7338 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
7339 myh->forced_local = 1;
7340
7341 /* The elf32_arm_init_maps function only cares about symbols from input
7342 BFDs. We must make a note of this generated mapping symbol
7343 ourselves so that code byteswapping works properly in
7344 elf32_arm_write_section. */
7345 elf32_arm_section_map_add (s, 't', 0);
7346 }
7347
7348 s->size += veneer_size;
7349 hash_table->stm32l4xx_erratum_glue_size += veneer_size;
7350 hash_table->num_stm32l4xx_fixes++;
7351
7352 /* The offset of the veneer. */
7353 return val;
7354 }
7355
7356 #define ARM_GLUE_SECTION_FLAGS \
7357 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
7358 | SEC_READONLY | SEC_LINKER_CREATED)
7359
7360 /* Create a fake section for use by the ARM backend of the linker. */
7361
7362 static bfd_boolean
7363 arm_make_glue_section (bfd * abfd, const char * name)
7364 {
7365 asection * sec;
7366
7367 sec = bfd_get_linker_section (abfd, name);
7368 if (sec != NULL)
7369 /* Already made. */
7370 return TRUE;
7371
7372 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
7373
7374 if (sec == NULL
7375 || !bfd_set_section_alignment (abfd, sec, 2))
7376 return FALSE;
7377
7378 /* Set the gc mark to prevent the section from being removed by garbage
7379 collection, despite the fact that no relocs refer to this section. */
7380 sec->gc_mark = 1;
7381
7382 return TRUE;
7383 }
7384
7385 /* Set size of .plt entries. This function is called from the
7386 linker scripts in ld/emultempl/{armelf}.em. */
7387
7388 void
7389 bfd_elf32_arm_use_long_plt (void)
7390 {
7391 elf32_arm_use_long_plt_entry = TRUE;
7392 }
7393
7394 /* Add the glue sections to ABFD. This function is called from the
7395 linker scripts in ld/emultempl/{armelf}.em. */
7396
7397 bfd_boolean
7398 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
7399 struct bfd_link_info *info)
7400 {
7401 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
7402 bfd_boolean dostm32l4xx = globals
7403 && globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE;
7404 bfd_boolean addglue;
7405
7406 /* If we are only performing a partial
7407 link do not bother adding the glue. */
7408 if (bfd_link_relocatable (info))
7409 return TRUE;
7410
7411 addglue = arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
7412 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
7413 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
7414 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
7415
7416 if (!dostm32l4xx)
7417 return addglue;
7418
7419 return addglue
7420 && arm_make_glue_section (abfd, STM32L4XX_ERRATUM_VENEER_SECTION_NAME);
7421 }
7422
7423 /* Mark output sections of veneers needing a dedicated one with SEC_KEEP. This
7424 ensures they are not marked for deletion by
7425 strip_excluded_output_sections () when veneers are going to be created
7426 later. Not doing so would trigger assert on empty section size in
7427 lang_size_sections_1 (). */
7428
7429 void
7430 bfd_elf32_arm_keep_private_stub_output_sections (struct bfd_link_info *info)
7431 {
7432 enum elf32_arm_stub_type stub_type;
7433
7434 /* If we are only performing a partial
7435 link do not bother adding the glue. */
7436 if (bfd_link_relocatable (info))
7437 return;
7438
7439 for (stub_type = arm_stub_none + 1; stub_type < max_stub_type; stub_type++)
7440 {
7441 asection *out_sec;
7442 const char *out_sec_name;
7443
7444 if (!arm_dedicated_stub_output_section_required (stub_type))
7445 continue;
7446
7447 out_sec_name = arm_dedicated_stub_output_section_name (stub_type);
7448 out_sec = bfd_get_section_by_name (info->output_bfd, out_sec_name);
7449 if (out_sec != NULL)
7450 out_sec->flags |= SEC_KEEP;
7451 }
7452 }
7453
7454 /* Select a BFD to be used to hold the sections used by the glue code.
7455 This function is called from the linker scripts in ld/emultempl/
7456 {armelf/pe}.em. */
7457
7458 bfd_boolean
7459 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
7460 {
7461 struct elf32_arm_link_hash_table *globals;
7462
7463 /* If we are only performing a partial link
7464 do not bother getting a bfd to hold the glue. */
7465 if (bfd_link_relocatable (info))
7466 return TRUE;
7467
7468 /* Make sure we don't attach the glue sections to a dynamic object. */
7469 BFD_ASSERT (!(abfd->flags & DYNAMIC));
7470
7471 globals = elf32_arm_hash_table (info);
7472 BFD_ASSERT (globals != NULL);
7473
7474 if (globals->bfd_of_glue_owner != NULL)
7475 return TRUE;
7476
7477 /* Save the bfd for later use. */
7478 globals->bfd_of_glue_owner = abfd;
7479
7480 return TRUE;
7481 }
7482
7483 static void
7484 check_use_blx (struct elf32_arm_link_hash_table *globals)
7485 {
7486 int cpu_arch;
7487
7488 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
7489 Tag_CPU_arch);
7490
7491 if (globals->fix_arm1176)
7492 {
7493 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
7494 globals->use_blx = 1;
7495 }
7496 else
7497 {
7498 if (cpu_arch > TAG_CPU_ARCH_V4T)
7499 globals->use_blx = 1;
7500 }
7501 }
7502
7503 bfd_boolean
7504 bfd_elf32_arm_process_before_allocation (bfd *abfd,
7505 struct bfd_link_info *link_info)
7506 {
7507 Elf_Internal_Shdr *symtab_hdr;
7508 Elf_Internal_Rela *internal_relocs = NULL;
7509 Elf_Internal_Rela *irel, *irelend;
7510 bfd_byte *contents = NULL;
7511
7512 asection *sec;
7513 struct elf32_arm_link_hash_table *globals;
7514
7515 /* If we are only performing a partial link do not bother
7516 to construct any glue. */
7517 if (bfd_link_relocatable (link_info))
7518 return TRUE;
7519
7520 /* Here we have a bfd that is to be included on the link. We have a
7521 hook to do reloc rummaging, before section sizes are nailed down. */
7522 globals = elf32_arm_hash_table (link_info);
7523 BFD_ASSERT (globals != NULL);
7524
7525 check_use_blx (globals);
7526
7527 if (globals->byteswap_code && !bfd_big_endian (abfd))
7528 {
7529 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
7530 abfd);
7531 return FALSE;
7532 }
7533
7534 /* PR 5398: If we have not decided to include any loadable sections in
7535 the output then we will not have a glue owner bfd. This is OK, it
7536 just means that there is nothing else for us to do here. */
7537 if (globals->bfd_of_glue_owner == NULL)
7538 return TRUE;
7539
7540 /* Rummage around all the relocs and map the glue vectors. */
7541 sec = abfd->sections;
7542
7543 if (sec == NULL)
7544 return TRUE;
7545
7546 for (; sec != NULL; sec = sec->next)
7547 {
7548 if (sec->reloc_count == 0)
7549 continue;
7550
7551 if ((sec->flags & SEC_EXCLUDE) != 0)
7552 continue;
7553
7554 symtab_hdr = & elf_symtab_hdr (abfd);
7555
7556 /* Load the relocs. */
7557 internal_relocs
7558 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
7559
7560 if (internal_relocs == NULL)
7561 goto error_return;
7562
7563 irelend = internal_relocs + sec->reloc_count;
7564 for (irel = internal_relocs; irel < irelend; irel++)
7565 {
7566 long r_type;
7567 unsigned long r_index;
7568
7569 struct elf_link_hash_entry *h;
7570
7571 r_type = ELF32_R_TYPE (irel->r_info);
7572 r_index = ELF32_R_SYM (irel->r_info);
7573
7574 /* These are the only relocation types we care about. */
7575 if ( r_type != R_ARM_PC24
7576 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
7577 continue;
7578
7579 /* Get the section contents if we haven't done so already. */
7580 if (contents == NULL)
7581 {
7582 /* Get cached copy if it exists. */
7583 if (elf_section_data (sec)->this_hdr.contents != NULL)
7584 contents = elf_section_data (sec)->this_hdr.contents;
7585 else
7586 {
7587 /* Go get them off disk. */
7588 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
7589 goto error_return;
7590 }
7591 }
7592
7593 if (r_type == R_ARM_V4BX)
7594 {
7595 int reg;
7596
7597 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
7598 record_arm_bx_glue (link_info, reg);
7599 continue;
7600 }
7601
7602 /* If the relocation is not against a symbol it cannot concern us. */
7603 h = NULL;
7604
7605 /* We don't care about local symbols. */
7606 if (r_index < symtab_hdr->sh_info)
7607 continue;
7608
7609 /* This is an external symbol. */
7610 r_index -= symtab_hdr->sh_info;
7611 h = (struct elf_link_hash_entry *)
7612 elf_sym_hashes (abfd)[r_index];
7613
7614 /* If the relocation is against a static symbol it must be within
7615 the current section and so cannot be a cross ARM/Thumb relocation. */
7616 if (h == NULL)
7617 continue;
7618
7619 /* If the call will go through a PLT entry then we do not need
7620 glue. */
7621 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
7622 continue;
7623
7624 switch (r_type)
7625 {
7626 case R_ARM_PC24:
7627 /* This one is a call from arm code. We need to look up
7628 the target of the call. If it is a thumb target, we
7629 insert glue. */
7630 if (ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
7631 == ST_BRANCH_TO_THUMB)
7632 record_arm_to_thumb_glue (link_info, h);
7633 break;
7634
7635 default:
7636 abort ();
7637 }
7638 }
7639
7640 if (contents != NULL
7641 && elf_section_data (sec)->this_hdr.contents != contents)
7642 free (contents);
7643 contents = NULL;
7644
7645 if (internal_relocs != NULL
7646 && elf_section_data (sec)->relocs != internal_relocs)
7647 free (internal_relocs);
7648 internal_relocs = NULL;
7649 }
7650
7651 return TRUE;
7652
7653 error_return:
7654 if (contents != NULL
7655 && elf_section_data (sec)->this_hdr.contents != contents)
7656 free (contents);
7657 if (internal_relocs != NULL
7658 && elf_section_data (sec)->relocs != internal_relocs)
7659 free (internal_relocs);
7660
7661 return FALSE;
7662 }
7663 #endif
7664
7665
7666 /* Initialise maps of ARM/Thumb/data for input BFDs. */
7667
7668 void
7669 bfd_elf32_arm_init_maps (bfd *abfd)
7670 {
7671 Elf_Internal_Sym *isymbuf;
7672 Elf_Internal_Shdr *hdr;
7673 unsigned int i, localsyms;
7674
7675 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
7676 if (! is_arm_elf (abfd))
7677 return;
7678
7679 if ((abfd->flags & DYNAMIC) != 0)
7680 return;
7681
7682 hdr = & elf_symtab_hdr (abfd);
7683 localsyms = hdr->sh_info;
7684
7685 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
7686 should contain the number of local symbols, which should come before any
7687 global symbols. Mapping symbols are always local. */
7688 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
7689 NULL);
7690
7691 /* No internal symbols read? Skip this BFD. */
7692 if (isymbuf == NULL)
7693 return;
7694
7695 for (i = 0; i < localsyms; i++)
7696 {
7697 Elf_Internal_Sym *isym = &isymbuf[i];
7698 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7699 const char *name;
7700
7701 if (sec != NULL
7702 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
7703 {
7704 name = bfd_elf_string_from_elf_section (abfd,
7705 hdr->sh_link, isym->st_name);
7706
7707 if (bfd_is_arm_special_symbol_name (name,
7708 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
7709 elf32_arm_section_map_add (sec, name[1], isym->st_value);
7710 }
7711 }
7712 }
7713
7714
7715 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
7716 say what they wanted. */
7717
7718 void
7719 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
7720 {
7721 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7722 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7723
7724 if (globals == NULL)
7725 return;
7726
7727 if (globals->fix_cortex_a8 == -1)
7728 {
7729 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
7730 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
7731 && (out_attr[Tag_CPU_arch_profile].i == 'A'
7732 || out_attr[Tag_CPU_arch_profile].i == 0))
7733 globals->fix_cortex_a8 = 1;
7734 else
7735 globals->fix_cortex_a8 = 0;
7736 }
7737 }
7738
7739
7740 void
7741 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
7742 {
7743 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7744 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7745
7746 if (globals == NULL)
7747 return;
7748 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
7749 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
7750 {
7751 switch (globals->vfp11_fix)
7752 {
7753 case BFD_ARM_VFP11_FIX_DEFAULT:
7754 case BFD_ARM_VFP11_FIX_NONE:
7755 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7756 break;
7757
7758 default:
7759 /* Give a warning, but do as the user requests anyway. */
7760 _bfd_error_handler (_("%B: warning: selected VFP11 erratum "
7761 "workaround is not necessary for target architecture"), obfd);
7762 }
7763 }
7764 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
7765 /* For earlier architectures, we might need the workaround, but do not
7766 enable it by default. If users is running with broken hardware, they
7767 must enable the erratum fix explicitly. */
7768 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
7769 }
7770
7771 void
7772 bfd_elf32_arm_set_stm32l4xx_fix (bfd *obfd, struct bfd_link_info *link_info)
7773 {
7774 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
7775 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
7776
7777 if (globals == NULL)
7778 return;
7779
7780 /* We assume only Cortex-M4 may require the fix. */
7781 if (out_attr[Tag_CPU_arch].i != TAG_CPU_ARCH_V7E_M
7782 || out_attr[Tag_CPU_arch_profile].i != 'M')
7783 {
7784 if (globals->stm32l4xx_fix != BFD_ARM_STM32L4XX_FIX_NONE)
7785 /* Give a warning, but do as the user requests anyway. */
7786 _bfd_error_handler
7787 (_("%B: warning: selected STM32L4XX erratum "
7788 "workaround is not necessary for target architecture"), obfd);
7789 }
7790 }
7791
7792 enum bfd_arm_vfp11_pipe
7793 {
7794 VFP11_FMAC,
7795 VFP11_LS,
7796 VFP11_DS,
7797 VFP11_BAD
7798 };
7799
7800 /* Return a VFP register number. This is encoded as RX:X for single-precision
7801 registers, or X:RX for double-precision registers, where RX is the group of
7802 four bits in the instruction encoding and X is the single extension bit.
7803 RX and X fields are specified using their lowest (starting) bit. The return
7804 value is:
7805
7806 0...31: single-precision registers s0...s31
7807 32...63: double-precision registers d0...d31.
7808
7809 Although X should be zero for VFP11 (encoding d0...d15 only), we might
7810 encounter VFP3 instructions, so we allow the full range for DP registers. */
7811
7812 static unsigned int
7813 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
7814 unsigned int x)
7815 {
7816 if (is_double)
7817 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
7818 else
7819 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
7820 }
7821
7822 /* Set bits in *WMASK according to a register number REG as encoded by
7823 bfd_arm_vfp11_regno(). Ignore d16-d31. */
7824
7825 static void
7826 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
7827 {
7828 if (reg < 32)
7829 *wmask |= 1 << reg;
7830 else if (reg < 48)
7831 *wmask |= 3 << ((reg - 32) * 2);
7832 }
7833
7834 /* Return TRUE if WMASK overwrites anything in REGS. */
7835
7836 static bfd_boolean
7837 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
7838 {
7839 int i;
7840
7841 for (i = 0; i < numregs; i++)
7842 {
7843 unsigned int reg = regs[i];
7844
7845 if (reg < 32 && (wmask & (1 << reg)) != 0)
7846 return TRUE;
7847
7848 reg -= 32;
7849
7850 if (reg >= 16)
7851 continue;
7852
7853 if ((wmask & (3 << (reg * 2))) != 0)
7854 return TRUE;
7855 }
7856
7857 return FALSE;
7858 }
7859
7860 /* In this function, we're interested in two things: finding input registers
7861 for VFP data-processing instructions, and finding the set of registers which
7862 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
7863 hold the written set, so FLDM etc. are easy to deal with (we're only
7864 interested in 32 SP registers or 16 dp registers, due to the VFP version
7865 implemented by the chip in question). DP registers are marked by setting
7866 both SP registers in the write mask). */
7867
7868 static enum bfd_arm_vfp11_pipe
7869 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
7870 int *numregs)
7871 {
7872 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
7873 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
7874
7875 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
7876 {
7877 unsigned int pqrs;
7878 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7879 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7880
7881 pqrs = ((insn & 0x00800000) >> 20)
7882 | ((insn & 0x00300000) >> 19)
7883 | ((insn & 0x00000040) >> 6);
7884
7885 switch (pqrs)
7886 {
7887 case 0: /* fmac[sd]. */
7888 case 1: /* fnmac[sd]. */
7889 case 2: /* fmsc[sd]. */
7890 case 3: /* fnmsc[sd]. */
7891 vpipe = VFP11_FMAC;
7892 bfd_arm_vfp11_write_mask (destmask, fd);
7893 regs[0] = fd;
7894 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7895 regs[2] = fm;
7896 *numregs = 3;
7897 break;
7898
7899 case 4: /* fmul[sd]. */
7900 case 5: /* fnmul[sd]. */
7901 case 6: /* fadd[sd]. */
7902 case 7: /* fsub[sd]. */
7903 vpipe = VFP11_FMAC;
7904 goto vfp_binop;
7905
7906 case 8: /* fdiv[sd]. */
7907 vpipe = VFP11_DS;
7908 vfp_binop:
7909 bfd_arm_vfp11_write_mask (destmask, fd);
7910 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
7911 regs[1] = fm;
7912 *numregs = 2;
7913 break;
7914
7915 case 15: /* extended opcode. */
7916 {
7917 unsigned int extn = ((insn >> 15) & 0x1e)
7918 | ((insn >> 7) & 1);
7919
7920 switch (extn)
7921 {
7922 case 0: /* fcpy[sd]. */
7923 case 1: /* fabs[sd]. */
7924 case 2: /* fneg[sd]. */
7925 case 8: /* fcmp[sd]. */
7926 case 9: /* fcmpe[sd]. */
7927 case 10: /* fcmpz[sd]. */
7928 case 11: /* fcmpez[sd]. */
7929 case 16: /* fuito[sd]. */
7930 case 17: /* fsito[sd]. */
7931 case 24: /* ftoui[sd]. */
7932 case 25: /* ftouiz[sd]. */
7933 case 26: /* ftosi[sd]. */
7934 case 27: /* ftosiz[sd]. */
7935 /* These instructions will not bounce due to underflow. */
7936 *numregs = 0;
7937 vpipe = VFP11_FMAC;
7938 break;
7939
7940 case 3: /* fsqrt[sd]. */
7941 /* fsqrt cannot underflow, but it can (perhaps) overwrite
7942 registers to cause the erratum in previous instructions. */
7943 bfd_arm_vfp11_write_mask (destmask, fd);
7944 vpipe = VFP11_DS;
7945 break;
7946
7947 case 15: /* fcvt{ds,sd}. */
7948 {
7949 int rnum = 0;
7950
7951 bfd_arm_vfp11_write_mask (destmask, fd);
7952
7953 /* Only FCVTSD can underflow. */
7954 if ((insn & 0x100) != 0)
7955 regs[rnum++] = fm;
7956
7957 *numregs = rnum;
7958
7959 vpipe = VFP11_FMAC;
7960 }
7961 break;
7962
7963 default:
7964 return VFP11_BAD;
7965 }
7966 }
7967 break;
7968
7969 default:
7970 return VFP11_BAD;
7971 }
7972 }
7973 /* Two-register transfer. */
7974 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
7975 {
7976 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
7977
7978 if ((insn & 0x100000) == 0)
7979 {
7980 if (is_double)
7981 bfd_arm_vfp11_write_mask (destmask, fm);
7982 else
7983 {
7984 bfd_arm_vfp11_write_mask (destmask, fm);
7985 bfd_arm_vfp11_write_mask (destmask, fm + 1);
7986 }
7987 }
7988
7989 vpipe = VFP11_LS;
7990 }
7991 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
7992 {
7993 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
7994 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
7995
7996 switch (puw)
7997 {
7998 case 0: /* Two-reg transfer. We should catch these above. */
7999 abort ();
8000
8001 case 2: /* fldm[sdx]. */
8002 case 3:
8003 case 5:
8004 {
8005 unsigned int i, offset = insn & 0xff;
8006
8007 if (is_double)
8008 offset >>= 1;
8009
8010 for (i = fd; i < fd + offset; i++)
8011 bfd_arm_vfp11_write_mask (destmask, i);
8012 }
8013 break;
8014
8015 case 4: /* fld[sd]. */
8016 case 6:
8017 bfd_arm_vfp11_write_mask (destmask, fd);
8018 break;
8019
8020 default:
8021 return VFP11_BAD;
8022 }
8023
8024 vpipe = VFP11_LS;
8025 }
8026 /* Single-register transfer. Note L==0. */
8027 else if ((insn & 0x0f100e10) == 0x0e000a10)
8028 {
8029 unsigned int opcode = (insn >> 21) & 7;
8030 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
8031
8032 switch (opcode)
8033 {
8034 case 0: /* fmsr/fmdlr. */
8035 case 1: /* fmdhr. */
8036 /* Mark fmdhr and fmdlr as writing to the whole of the DP
8037 destination register. I don't know if this is exactly right,
8038 but it is the conservative choice. */
8039 bfd_arm_vfp11_write_mask (destmask, fn);
8040 break;
8041
8042 case 7: /* fmxr. */
8043 break;
8044 }
8045
8046 vpipe = VFP11_LS;
8047 }
8048
8049 return vpipe;
8050 }
8051
8052
8053 static int elf32_arm_compare_mapping (const void * a, const void * b);
8054
8055
8056 /* Look for potentially-troublesome code sequences which might trigger the
8057 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
8058 (available from ARM) for details of the erratum. A short version is
8059 described in ld.texinfo. */
8060
8061 bfd_boolean
8062 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
8063 {
8064 asection *sec;
8065 bfd_byte *contents = NULL;
8066 int state = 0;
8067 int regs[3], numregs = 0;
8068 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8069 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
8070
8071 if (globals == NULL)
8072 return FALSE;
8073
8074 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
8075 The states transition as follows:
8076
8077 0 -> 1 (vector) or 0 -> 2 (scalar)
8078 A VFP FMAC-pipeline instruction has been seen. Fill
8079 regs[0]..regs[numregs-1] with its input operands. Remember this
8080 instruction in 'first_fmac'.
8081
8082 1 -> 2
8083 Any instruction, except for a VFP instruction which overwrites
8084 regs[*].
8085
8086 1 -> 3 [ -> 0 ] or
8087 2 -> 3 [ -> 0 ]
8088 A VFP instruction has been seen which overwrites any of regs[*].
8089 We must make a veneer! Reset state to 0 before examining next
8090 instruction.
8091
8092 2 -> 0
8093 If we fail to match anything in state 2, reset to state 0 and reset
8094 the instruction pointer to the instruction after 'first_fmac'.
8095
8096 If the VFP11 vector mode is in use, there must be at least two unrelated
8097 instructions between anti-dependent VFP11 instructions to properly avoid
8098 triggering the erratum, hence the use of the extra state 1. */
8099
8100 /* If we are only performing a partial link do not bother
8101 to construct any glue. */
8102 if (bfd_link_relocatable (link_info))
8103 return TRUE;
8104
8105 /* Skip if this bfd does not correspond to an ELF image. */
8106 if (! is_arm_elf (abfd))
8107 return TRUE;
8108
8109 /* We should have chosen a fix type by the time we get here. */
8110 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
8111
8112 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
8113 return TRUE;
8114
8115 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8116 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8117 return TRUE;
8118
8119 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8120 {
8121 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
8122 struct _arm_elf_section_data *sec_data;
8123
8124 /* If we don't have executable progbits, we're not interested in this
8125 section. Also skip if section is to be excluded. */
8126 if (elf_section_type (sec) != SHT_PROGBITS
8127 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8128 || (sec->flags & SEC_EXCLUDE) != 0
8129 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8130 || sec->output_section == bfd_abs_section_ptr
8131 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
8132 continue;
8133
8134 sec_data = elf32_arm_section_data (sec);
8135
8136 if (sec_data->mapcount == 0)
8137 continue;
8138
8139 if (elf_section_data (sec)->this_hdr.contents != NULL)
8140 contents = elf_section_data (sec)->this_hdr.contents;
8141 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8142 goto error_return;
8143
8144 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8145 elf32_arm_compare_mapping);
8146
8147 for (span = 0; span < sec_data->mapcount; span++)
8148 {
8149 unsigned int span_start = sec_data->map[span].vma;
8150 unsigned int span_end = (span == sec_data->mapcount - 1)
8151 ? sec->size : sec_data->map[span + 1].vma;
8152 char span_type = sec_data->map[span].type;
8153
8154 /* FIXME: Only ARM mode is supported at present. We may need to
8155 support Thumb-2 mode also at some point. */
8156 if (span_type != 'a')
8157 continue;
8158
8159 for (i = span_start; i < span_end;)
8160 {
8161 unsigned int next_i = i + 4;
8162 unsigned int insn = bfd_big_endian (abfd)
8163 ? (contents[i] << 24)
8164 | (contents[i + 1] << 16)
8165 | (contents[i + 2] << 8)
8166 | contents[i + 3]
8167 : (contents[i + 3] << 24)
8168 | (contents[i + 2] << 16)
8169 | (contents[i + 1] << 8)
8170 | contents[i];
8171 unsigned int writemask = 0;
8172 enum bfd_arm_vfp11_pipe vpipe;
8173
8174 switch (state)
8175 {
8176 case 0:
8177 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
8178 &numregs);
8179 /* I'm assuming the VFP11 erratum can trigger with denorm
8180 operands on either the FMAC or the DS pipeline. This might
8181 lead to slightly overenthusiastic veneer insertion. */
8182 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
8183 {
8184 state = use_vector ? 1 : 2;
8185 first_fmac = i;
8186 veneer_of_insn = insn;
8187 }
8188 break;
8189
8190 case 1:
8191 {
8192 int other_regs[3], other_numregs;
8193 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8194 other_regs,
8195 &other_numregs);
8196 if (vpipe != VFP11_BAD
8197 && bfd_arm_vfp11_antidependency (writemask, regs,
8198 numregs))
8199 state = 3;
8200 else
8201 state = 2;
8202 }
8203 break;
8204
8205 case 2:
8206 {
8207 int other_regs[3], other_numregs;
8208 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
8209 other_regs,
8210 &other_numregs);
8211 if (vpipe != VFP11_BAD
8212 && bfd_arm_vfp11_antidependency (writemask, regs,
8213 numregs))
8214 state = 3;
8215 else
8216 {
8217 state = 0;
8218 next_i = first_fmac + 4;
8219 }
8220 }
8221 break;
8222
8223 case 3:
8224 abort (); /* Should be unreachable. */
8225 }
8226
8227 if (state == 3)
8228 {
8229 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
8230 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
8231
8232 elf32_arm_section_data (sec)->erratumcount += 1;
8233
8234 newerr->u.b.vfp_insn = veneer_of_insn;
8235
8236 switch (span_type)
8237 {
8238 case 'a':
8239 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
8240 break;
8241
8242 default:
8243 abort ();
8244 }
8245
8246 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
8247 first_fmac);
8248
8249 newerr->vma = -1;
8250
8251 newerr->next = sec_data->erratumlist;
8252 sec_data->erratumlist = newerr;
8253
8254 state = 0;
8255 }
8256
8257 i = next_i;
8258 }
8259 }
8260
8261 if (contents != NULL
8262 && elf_section_data (sec)->this_hdr.contents != contents)
8263 free (contents);
8264 contents = NULL;
8265 }
8266
8267 return TRUE;
8268
8269 error_return:
8270 if (contents != NULL
8271 && elf_section_data (sec)->this_hdr.contents != contents)
8272 free (contents);
8273
8274 return FALSE;
8275 }
8276
8277 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
8278 after sections have been laid out, using specially-named symbols. */
8279
8280 void
8281 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
8282 struct bfd_link_info *link_info)
8283 {
8284 asection *sec;
8285 struct elf32_arm_link_hash_table *globals;
8286 char *tmp_name;
8287
8288 if (bfd_link_relocatable (link_info))
8289 return;
8290
8291 /* Skip if this bfd does not correspond to an ELF image. */
8292 if (! is_arm_elf (abfd))
8293 return;
8294
8295 globals = elf32_arm_hash_table (link_info);
8296 if (globals == NULL)
8297 return;
8298
8299 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8300 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
8301
8302 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8303 {
8304 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8305 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
8306
8307 for (; errnode != NULL; errnode = errnode->next)
8308 {
8309 struct elf_link_hash_entry *myh;
8310 bfd_vma vma;
8311
8312 switch (errnode->type)
8313 {
8314 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
8315 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
8316 /* Find veneer symbol. */
8317 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
8318 errnode->u.b.veneer->u.v.id);
8319
8320 myh = elf_link_hash_lookup
8321 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8322
8323 if (myh == NULL)
8324 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8325 "`%s'"), abfd, tmp_name);
8326
8327 vma = myh->root.u.def.section->output_section->vma
8328 + myh->root.u.def.section->output_offset
8329 + myh->root.u.def.value;
8330
8331 errnode->u.b.veneer->vma = vma;
8332 break;
8333
8334 case VFP11_ERRATUM_ARM_VENEER:
8335 case VFP11_ERRATUM_THUMB_VENEER:
8336 /* Find return location. */
8337 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
8338 errnode->u.v.id);
8339
8340 myh = elf_link_hash_lookup
8341 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8342
8343 if (myh == NULL)
8344 _bfd_error_handler (_("%B: unable to find VFP11 veneer "
8345 "`%s'"), abfd, tmp_name);
8346
8347 vma = myh->root.u.def.section->output_section->vma
8348 + myh->root.u.def.section->output_offset
8349 + myh->root.u.def.value;
8350
8351 errnode->u.v.branch->vma = vma;
8352 break;
8353
8354 default:
8355 abort ();
8356 }
8357 }
8358 }
8359
8360 free (tmp_name);
8361 }
8362
8363 /* Find virtual-memory addresses for STM32L4XX erratum veneers and
8364 return locations after sections have been laid out, using
8365 specially-named symbols. */
8366
8367 void
8368 bfd_elf32_arm_stm32l4xx_fix_veneer_locations (bfd *abfd,
8369 struct bfd_link_info *link_info)
8370 {
8371 asection *sec;
8372 struct elf32_arm_link_hash_table *globals;
8373 char *tmp_name;
8374
8375 if (bfd_link_relocatable (link_info))
8376 return;
8377
8378 /* Skip if this bfd does not correspond to an ELF image. */
8379 if (! is_arm_elf (abfd))
8380 return;
8381
8382 globals = elf32_arm_hash_table (link_info);
8383 if (globals == NULL)
8384 return;
8385
8386 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
8387 (STM32L4XX_ERRATUM_VENEER_ENTRY_NAME) + 10);
8388
8389 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8390 {
8391 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
8392 elf32_stm32l4xx_erratum_list *errnode = sec_data->stm32l4xx_erratumlist;
8393
8394 for (; errnode != NULL; errnode = errnode->next)
8395 {
8396 struct elf_link_hash_entry *myh;
8397 bfd_vma vma;
8398
8399 switch (errnode->type)
8400 {
8401 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
8402 /* Find veneer symbol. */
8403 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME,
8404 errnode->u.b.veneer->u.v.id);
8405
8406 myh = elf_link_hash_lookup
8407 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8408
8409 if (myh == NULL)
8410 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8411 "`%s'"), abfd, tmp_name);
8412
8413 vma = myh->root.u.def.section->output_section->vma
8414 + myh->root.u.def.section->output_offset
8415 + myh->root.u.def.value;
8416
8417 errnode->u.b.veneer->vma = vma;
8418 break;
8419
8420 case STM32L4XX_ERRATUM_VENEER:
8421 /* Find return location. */
8422 sprintf (tmp_name, STM32L4XX_ERRATUM_VENEER_ENTRY_NAME "_r",
8423 errnode->u.v.id);
8424
8425 myh = elf_link_hash_lookup
8426 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
8427
8428 if (myh == NULL)
8429 _bfd_error_handler (_("%B: unable to find STM32L4XX veneer "
8430 "`%s'"), abfd, tmp_name);
8431
8432 vma = myh->root.u.def.section->output_section->vma
8433 + myh->root.u.def.section->output_offset
8434 + myh->root.u.def.value;
8435
8436 errnode->u.v.branch->vma = vma;
8437 break;
8438
8439 default:
8440 abort ();
8441 }
8442 }
8443 }
8444
8445 free (tmp_name);
8446 }
8447
8448 static inline bfd_boolean
8449 is_thumb2_ldmia (const insn32 insn)
8450 {
8451 /* Encoding T2: LDM<c>.W <Rn>{!},<registers>
8452 1110 - 1000 - 10W1 - rrrr - PM (0) l - llll - llll - llll. */
8453 return (insn & 0xffd02000) == 0xe8900000;
8454 }
8455
8456 static inline bfd_boolean
8457 is_thumb2_ldmdb (const insn32 insn)
8458 {
8459 /* Encoding T1: LDMDB<c> <Rn>{!},<registers>
8460 1110 - 1001 - 00W1 - rrrr - PM (0) l - llll - llll - llll. */
8461 return (insn & 0xffd02000) == 0xe9100000;
8462 }
8463
8464 static inline bfd_boolean
8465 is_thumb2_vldm (const insn32 insn)
8466 {
8467 /* A6.5 Extension register load or store instruction
8468 A7.7.229
8469 We look for SP 32-bit and DP 64-bit registers.
8470 Encoding T1 VLDM{mode}<c> <Rn>{!}, <list>
8471 <list> is consecutive 64-bit registers
8472 1110 - 110P - UDW1 - rrrr - vvvv - 1011 - iiii - iiii
8473 Encoding T2 VLDM{mode}<c> <Rn>{!}, <list>
8474 <list> is consecutive 32-bit registers
8475 1110 - 110P - UDW1 - rrrr - vvvv - 1010 - iiii - iiii
8476 if P==0 && U==1 && W==1 && Rn=1101 VPOP
8477 if PUW=010 || PUW=011 || PUW=101 VLDM. */
8478 return
8479 (((insn & 0xfe100f00) == 0xec100b00) ||
8480 ((insn & 0xfe100f00) == 0xec100a00))
8481 && /* (IA without !). */
8482 (((((insn << 7) >> 28) & 0xd) == 0x4)
8483 /* (IA with !), includes VPOP (when reg number is SP). */
8484 || ((((insn << 7) >> 28) & 0xd) == 0x5)
8485 /* (DB with !). */
8486 || ((((insn << 7) >> 28) & 0xd) == 0x9));
8487 }
8488
8489 /* STM STM32L4XX erratum : This function assumes that it receives an LDM or
8490 VLDM opcode and:
8491 - computes the number and the mode of memory accesses
8492 - decides if the replacement should be done:
8493 . replaces only if > 8-word accesses
8494 . or (testing purposes only) replaces all accesses. */
8495
8496 static bfd_boolean
8497 stm32l4xx_need_create_replacing_stub (const insn32 insn,
8498 bfd_arm_stm32l4xx_fix stm32l4xx_fix)
8499 {
8500 int nb_words = 0;
8501
8502 /* The field encoding the register list is the same for both LDMIA
8503 and LDMDB encodings. */
8504 if (is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn))
8505 nb_words = popcount (insn & 0x0000ffff);
8506 else if (is_thumb2_vldm (insn))
8507 nb_words = (insn & 0xff);
8508
8509 /* DEFAULT mode accounts for the real bug condition situation,
8510 ALL mode inserts stubs for each LDM/VLDM instruction (testing). */
8511 return
8512 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_DEFAULT) ? nb_words > 8 :
8513 (stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_ALL) ? TRUE : FALSE;
8514 }
8515
8516 /* Look for potentially-troublesome code sequences which might trigger
8517 the STM STM32L4XX erratum. */
8518
8519 bfd_boolean
8520 bfd_elf32_arm_stm32l4xx_erratum_scan (bfd *abfd,
8521 struct bfd_link_info *link_info)
8522 {
8523 asection *sec;
8524 bfd_byte *contents = NULL;
8525 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
8526
8527 if (globals == NULL)
8528 return FALSE;
8529
8530 /* If we are only performing a partial link do not bother
8531 to construct any glue. */
8532 if (bfd_link_relocatable (link_info))
8533 return TRUE;
8534
8535 /* Skip if this bfd does not correspond to an ELF image. */
8536 if (! is_arm_elf (abfd))
8537 return TRUE;
8538
8539 if (globals->stm32l4xx_fix == BFD_ARM_STM32L4XX_FIX_NONE)
8540 return TRUE;
8541
8542 /* Skip this BFD if it corresponds to an executable or dynamic object. */
8543 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
8544 return TRUE;
8545
8546 for (sec = abfd->sections; sec != NULL; sec = sec->next)
8547 {
8548 unsigned int i, span;
8549 struct _arm_elf_section_data *sec_data;
8550
8551 /* If we don't have executable progbits, we're not interested in this
8552 section. Also skip if section is to be excluded. */
8553 if (elf_section_type (sec) != SHT_PROGBITS
8554 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
8555 || (sec->flags & SEC_EXCLUDE) != 0
8556 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
8557 || sec->output_section == bfd_abs_section_ptr
8558 || strcmp (sec->name, STM32L4XX_ERRATUM_VENEER_SECTION_NAME) == 0)
8559 continue;
8560
8561 sec_data = elf32_arm_section_data (sec);
8562
8563 if (sec_data->mapcount == 0)
8564 continue;
8565
8566 if (elf_section_data (sec)->this_hdr.contents != NULL)
8567 contents = elf_section_data (sec)->this_hdr.contents;
8568 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
8569 goto error_return;
8570
8571 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
8572 elf32_arm_compare_mapping);
8573
8574 for (span = 0; span < sec_data->mapcount; span++)
8575 {
8576 unsigned int span_start = sec_data->map[span].vma;
8577 unsigned int span_end = (span == sec_data->mapcount - 1)
8578 ? sec->size : sec_data->map[span + 1].vma;
8579 char span_type = sec_data->map[span].type;
8580 int itblock_current_pos = 0;
8581
8582 /* Only Thumb2 mode need be supported with this CM4 specific
8583 code, we should not encounter any arm mode eg span_type
8584 != 'a'. */
8585 if (span_type != 't')
8586 continue;
8587
8588 for (i = span_start; i < span_end;)
8589 {
8590 unsigned int insn = bfd_get_16 (abfd, &contents[i]);
8591 bfd_boolean insn_32bit = FALSE;
8592 bfd_boolean is_ldm = FALSE;
8593 bfd_boolean is_vldm = FALSE;
8594 bfd_boolean is_not_last_in_it_block = FALSE;
8595
8596 /* The first 16-bits of all 32-bit thumb2 instructions start
8597 with opcode[15..13]=0b111 and the encoded op1 can be anything
8598 except opcode[12..11]!=0b00.
8599 See 32-bit Thumb instruction encoding. */
8600 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
8601 insn_32bit = TRUE;
8602
8603 /* Compute the predicate that tells if the instruction
8604 is concerned by the IT block
8605 - Creates an error if there is a ldm that is not
8606 last in the IT block thus cannot be replaced
8607 - Otherwise we can create a branch at the end of the
8608 IT block, it will be controlled naturally by IT
8609 with the proper pseudo-predicate
8610 - So the only interesting predicate is the one that
8611 tells that we are not on the last item of an IT
8612 block. */
8613 if (itblock_current_pos != 0)
8614 is_not_last_in_it_block = !!--itblock_current_pos;
8615
8616 if (insn_32bit)
8617 {
8618 /* Load the rest of the insn (in manual-friendly order). */
8619 insn = (insn << 16) | bfd_get_16 (abfd, &contents[i + 2]);
8620 is_ldm = is_thumb2_ldmia (insn) || is_thumb2_ldmdb (insn);
8621 is_vldm = is_thumb2_vldm (insn);
8622
8623 /* Veneers are created for (v)ldm depending on
8624 option flags and memory accesses conditions; but
8625 if the instruction is not the last instruction of
8626 an IT block, we cannot create a jump there, so we
8627 bail out. */
8628 if ((is_ldm || is_vldm)
8629 && stm32l4xx_need_create_replacing_stub
8630 (insn, globals->stm32l4xx_fix))
8631 {
8632 if (is_not_last_in_it_block)
8633 {
8634 _bfd_error_handler
8635 /* Note - overlong line used here to allow for translation. */
8636 (_("\
8637 %B(%A+0x%lx): error: multiple load detected in non-last IT block instruction : STM32L4XX veneer cannot be generated.\n"
8638 "Use gcc option -mrestrict-it to generate only one instruction per IT block.\n"),
8639 abfd, sec, (long)i);
8640 }
8641 else
8642 {
8643 elf32_stm32l4xx_erratum_list *newerr =
8644 (elf32_stm32l4xx_erratum_list *)
8645 bfd_zmalloc
8646 (sizeof (elf32_stm32l4xx_erratum_list));
8647
8648 elf32_arm_section_data (sec)
8649 ->stm32l4xx_erratumcount += 1;
8650 newerr->u.b.insn = insn;
8651 /* We create only thumb branches. */
8652 newerr->type =
8653 STM32L4XX_ERRATUM_BRANCH_TO_VENEER;
8654 record_stm32l4xx_erratum_veneer
8655 (link_info, newerr, abfd, sec,
8656 i,
8657 is_ldm ?
8658 STM32L4XX_ERRATUM_LDM_VENEER_SIZE:
8659 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
8660 newerr->vma = -1;
8661 newerr->next = sec_data->stm32l4xx_erratumlist;
8662 sec_data->stm32l4xx_erratumlist = newerr;
8663 }
8664 }
8665 }
8666 else
8667 {
8668 /* A7.7.37 IT p208
8669 IT blocks are only encoded in T1
8670 Encoding T1: IT{x{y{z}}} <firstcond>
8671 1 0 1 1 - 1 1 1 1 - firstcond - mask
8672 if mask = '0000' then see 'related encodings'
8673 We don't deal with UNPREDICTABLE, just ignore these.
8674 There can be no nested IT blocks so an IT block
8675 is naturally a new one for which it is worth
8676 computing its size. */
8677 bfd_boolean is_newitblock = ((insn & 0xff00) == 0xbf00)
8678 && ((insn & 0x000f) != 0x0000);
8679 /* If we have a new IT block we compute its size. */
8680 if (is_newitblock)
8681 {
8682 /* Compute the number of instructions controlled
8683 by the IT block, it will be used to decide
8684 whether we are inside an IT block or not. */
8685 unsigned int mask = insn & 0x000f;
8686 itblock_current_pos = 4 - ctz (mask);
8687 }
8688 }
8689
8690 i += insn_32bit ? 4 : 2;
8691 }
8692 }
8693
8694 if (contents != NULL
8695 && elf_section_data (sec)->this_hdr.contents != contents)
8696 free (contents);
8697 contents = NULL;
8698 }
8699
8700 return TRUE;
8701
8702 error_return:
8703 if (contents != NULL
8704 && elf_section_data (sec)->this_hdr.contents != contents)
8705 free (contents);
8706
8707 return FALSE;
8708 }
8709
8710 /* Set target relocation values needed during linking. */
8711
8712 void
8713 bfd_elf32_arm_set_target_params (struct bfd *output_bfd,
8714 struct bfd_link_info *link_info,
8715 struct elf32_arm_params *params)
8716 {
8717 struct elf32_arm_link_hash_table *globals;
8718
8719 globals = elf32_arm_hash_table (link_info);
8720 if (globals == NULL)
8721 return;
8722
8723 globals->target1_is_rel = params->target1_is_rel;
8724 if (strcmp (params->target2_type, "rel") == 0)
8725 globals->target2_reloc = R_ARM_REL32;
8726 else if (strcmp (params->target2_type, "abs") == 0)
8727 globals->target2_reloc = R_ARM_ABS32;
8728 else if (strcmp (params->target2_type, "got-rel") == 0)
8729 globals->target2_reloc = R_ARM_GOT_PREL;
8730 else
8731 {
8732 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
8733 params->target2_type);
8734 }
8735 globals->fix_v4bx = params->fix_v4bx;
8736 globals->use_blx |= params->use_blx;
8737 globals->vfp11_fix = params->vfp11_denorm_fix;
8738 globals->stm32l4xx_fix = params->stm32l4xx_fix;
8739 globals->pic_veneer = params->pic_veneer;
8740 globals->fix_cortex_a8 = params->fix_cortex_a8;
8741 globals->fix_arm1176 = params->fix_arm1176;
8742 globals->cmse_implib = params->cmse_implib;
8743 globals->in_implib_bfd = params->in_implib_bfd;
8744
8745 BFD_ASSERT (is_arm_elf (output_bfd));
8746 elf_arm_tdata (output_bfd)->no_enum_size_warning
8747 = params->no_enum_size_warning;
8748 elf_arm_tdata (output_bfd)->no_wchar_size_warning
8749 = params->no_wchar_size_warning;
8750 }
8751
8752 /* Replace the target offset of a Thumb bl or b.w instruction. */
8753
8754 static void
8755 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
8756 {
8757 bfd_vma upper;
8758 bfd_vma lower;
8759 int reloc_sign;
8760
8761 BFD_ASSERT ((offset & 1) == 0);
8762
8763 upper = bfd_get_16 (abfd, insn);
8764 lower = bfd_get_16 (abfd, insn + 2);
8765 reloc_sign = (offset < 0) ? 1 : 0;
8766 upper = (upper & ~(bfd_vma) 0x7ff)
8767 | ((offset >> 12) & 0x3ff)
8768 | (reloc_sign << 10);
8769 lower = (lower & ~(bfd_vma) 0x2fff)
8770 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
8771 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
8772 | ((offset >> 1) & 0x7ff);
8773 bfd_put_16 (abfd, upper, insn);
8774 bfd_put_16 (abfd, lower, insn + 2);
8775 }
8776
8777 /* Thumb code calling an ARM function. */
8778
8779 static int
8780 elf32_thumb_to_arm_stub (struct bfd_link_info * info,
8781 const char * name,
8782 bfd * input_bfd,
8783 bfd * output_bfd,
8784 asection * input_section,
8785 bfd_byte * hit_data,
8786 asection * sym_sec,
8787 bfd_vma offset,
8788 bfd_signed_vma addend,
8789 bfd_vma val,
8790 char **error_message)
8791 {
8792 asection * s = 0;
8793 bfd_vma my_offset;
8794 long int ret_offset;
8795 struct elf_link_hash_entry * myh;
8796 struct elf32_arm_link_hash_table * globals;
8797
8798 myh = find_thumb_glue (info, name, error_message);
8799 if (myh == NULL)
8800 return FALSE;
8801
8802 globals = elf32_arm_hash_table (info);
8803 BFD_ASSERT (globals != NULL);
8804 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8805
8806 my_offset = myh->root.u.def.value;
8807
8808 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
8809 THUMB2ARM_GLUE_SECTION_NAME);
8810
8811 BFD_ASSERT (s != NULL);
8812 BFD_ASSERT (s->contents != NULL);
8813 BFD_ASSERT (s->output_section != NULL);
8814
8815 if ((my_offset & 0x01) == 0x01)
8816 {
8817 if (sym_sec != NULL
8818 && sym_sec->owner != NULL
8819 && !INTERWORK_FLAG (sym_sec->owner))
8820 {
8821 _bfd_error_handler
8822 (_("%B(%s): warning: interworking not enabled.\n"
8823 " first occurrence: %B: Thumb call to ARM"),
8824 sym_sec->owner, input_bfd, name);
8825
8826 return FALSE;
8827 }
8828
8829 --my_offset;
8830 myh->root.u.def.value = my_offset;
8831
8832 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
8833 s->contents + my_offset);
8834
8835 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
8836 s->contents + my_offset + 2);
8837
8838 ret_offset =
8839 /* Address of destination of the stub. */
8840 ((bfd_signed_vma) val)
8841 - ((bfd_signed_vma)
8842 /* Offset from the start of the current section
8843 to the start of the stubs. */
8844 (s->output_offset
8845 /* Offset of the start of this stub from the start of the stubs. */
8846 + my_offset
8847 /* Address of the start of the current section. */
8848 + s->output_section->vma)
8849 /* The branch instruction is 4 bytes into the stub. */
8850 + 4
8851 /* ARM branches work from the pc of the instruction + 8. */
8852 + 8);
8853
8854 put_arm_insn (globals, output_bfd,
8855 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
8856 s->contents + my_offset + 4);
8857 }
8858
8859 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
8860
8861 /* Now go back and fix up the original BL insn to point to here. */
8862 ret_offset =
8863 /* Address of where the stub is located. */
8864 (s->output_section->vma + s->output_offset + my_offset)
8865 /* Address of where the BL is located. */
8866 - (input_section->output_section->vma + input_section->output_offset
8867 + offset)
8868 /* Addend in the relocation. */
8869 - addend
8870 /* Biassing for PC-relative addressing. */
8871 - 8;
8872
8873 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
8874
8875 return TRUE;
8876 }
8877
8878 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
8879
8880 static struct elf_link_hash_entry *
8881 elf32_arm_create_thumb_stub (struct bfd_link_info * info,
8882 const char * name,
8883 bfd * input_bfd,
8884 bfd * output_bfd,
8885 asection * sym_sec,
8886 bfd_vma val,
8887 asection * s,
8888 char ** error_message)
8889 {
8890 bfd_vma my_offset;
8891 long int ret_offset;
8892 struct elf_link_hash_entry * myh;
8893 struct elf32_arm_link_hash_table * globals;
8894
8895 myh = find_arm_glue (info, name, error_message);
8896 if (myh == NULL)
8897 return NULL;
8898
8899 globals = elf32_arm_hash_table (info);
8900 BFD_ASSERT (globals != NULL);
8901 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8902
8903 my_offset = myh->root.u.def.value;
8904
8905 if ((my_offset & 0x01) == 0x01)
8906 {
8907 if (sym_sec != NULL
8908 && sym_sec->owner != NULL
8909 && !INTERWORK_FLAG (sym_sec->owner))
8910 {
8911 _bfd_error_handler
8912 (_("%B(%s): warning: interworking not enabled.\n"
8913 " first occurrence: %B: arm call to thumb"),
8914 sym_sec->owner, input_bfd, name);
8915 }
8916
8917 --my_offset;
8918 myh->root.u.def.value = my_offset;
8919
8920 if (bfd_link_pic (info)
8921 || globals->root.is_relocatable_executable
8922 || globals->pic_veneer)
8923 {
8924 /* For relocatable objects we can't use absolute addresses,
8925 so construct the address from a relative offset. */
8926 /* TODO: If the offset is small it's probably worth
8927 constructing the address with adds. */
8928 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
8929 s->contents + my_offset);
8930 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
8931 s->contents + my_offset + 4);
8932 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
8933 s->contents + my_offset + 8);
8934 /* Adjust the offset by 4 for the position of the add,
8935 and 8 for the pipeline offset. */
8936 ret_offset = (val - (s->output_offset
8937 + s->output_section->vma
8938 + my_offset + 12))
8939 | 1;
8940 bfd_put_32 (output_bfd, ret_offset,
8941 s->contents + my_offset + 12);
8942 }
8943 else if (globals->use_blx)
8944 {
8945 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
8946 s->contents + my_offset);
8947
8948 /* It's a thumb address. Add the low order bit. */
8949 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
8950 s->contents + my_offset + 4);
8951 }
8952 else
8953 {
8954 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
8955 s->contents + my_offset);
8956
8957 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
8958 s->contents + my_offset + 4);
8959
8960 /* It's a thumb address. Add the low order bit. */
8961 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
8962 s->contents + my_offset + 8);
8963
8964 my_offset += 12;
8965 }
8966 }
8967
8968 BFD_ASSERT (my_offset <= globals->arm_glue_size);
8969
8970 return myh;
8971 }
8972
8973 /* Arm code calling a Thumb function. */
8974
8975 static int
8976 elf32_arm_to_thumb_stub (struct bfd_link_info * info,
8977 const char * name,
8978 bfd * input_bfd,
8979 bfd * output_bfd,
8980 asection * input_section,
8981 bfd_byte * hit_data,
8982 asection * sym_sec,
8983 bfd_vma offset,
8984 bfd_signed_vma addend,
8985 bfd_vma val,
8986 char **error_message)
8987 {
8988 unsigned long int tmp;
8989 bfd_vma my_offset;
8990 asection * s;
8991 long int ret_offset;
8992 struct elf_link_hash_entry * myh;
8993 struct elf32_arm_link_hash_table * globals;
8994
8995 globals = elf32_arm_hash_table (info);
8996 BFD_ASSERT (globals != NULL);
8997 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
8998
8999 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9000 ARM2THUMB_GLUE_SECTION_NAME);
9001 BFD_ASSERT (s != NULL);
9002 BFD_ASSERT (s->contents != NULL);
9003 BFD_ASSERT (s->output_section != NULL);
9004
9005 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
9006 sym_sec, val, s, error_message);
9007 if (!myh)
9008 return FALSE;
9009
9010 my_offset = myh->root.u.def.value;
9011 tmp = bfd_get_32 (input_bfd, hit_data);
9012 tmp = tmp & 0xFF000000;
9013
9014 /* Somehow these are both 4 too far, so subtract 8. */
9015 ret_offset = (s->output_offset
9016 + my_offset
9017 + s->output_section->vma
9018 - (input_section->output_offset
9019 + input_section->output_section->vma
9020 + offset + addend)
9021 - 8);
9022
9023 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
9024
9025 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
9026
9027 return TRUE;
9028 }
9029
9030 /* Populate Arm stub for an exported Thumb function. */
9031
9032 static bfd_boolean
9033 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
9034 {
9035 struct bfd_link_info * info = (struct bfd_link_info *) inf;
9036 asection * s;
9037 struct elf_link_hash_entry * myh;
9038 struct elf32_arm_link_hash_entry *eh;
9039 struct elf32_arm_link_hash_table * globals;
9040 asection *sec;
9041 bfd_vma val;
9042 char *error_message;
9043
9044 eh = elf32_arm_hash_entry (h);
9045 /* Allocate stubs for exported Thumb functions on v4t. */
9046 if (eh->export_glue == NULL)
9047 return TRUE;
9048
9049 globals = elf32_arm_hash_table (info);
9050 BFD_ASSERT (globals != NULL);
9051 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9052
9053 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9054 ARM2THUMB_GLUE_SECTION_NAME);
9055 BFD_ASSERT (s != NULL);
9056 BFD_ASSERT (s->contents != NULL);
9057 BFD_ASSERT (s->output_section != NULL);
9058
9059 sec = eh->export_glue->root.u.def.section;
9060
9061 BFD_ASSERT (sec->output_section != NULL);
9062
9063 val = eh->export_glue->root.u.def.value + sec->output_offset
9064 + sec->output_section->vma;
9065
9066 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
9067 h->root.u.def.section->owner,
9068 globals->obfd, sec, val, s,
9069 &error_message);
9070 BFD_ASSERT (myh);
9071 return TRUE;
9072 }
9073
9074 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
9075
9076 static bfd_vma
9077 elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
9078 {
9079 bfd_byte *p;
9080 bfd_vma glue_addr;
9081 asection *s;
9082 struct elf32_arm_link_hash_table *globals;
9083
9084 globals = elf32_arm_hash_table (info);
9085 BFD_ASSERT (globals != NULL);
9086 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
9087
9088 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
9089 ARM_BX_GLUE_SECTION_NAME);
9090 BFD_ASSERT (s != NULL);
9091 BFD_ASSERT (s->contents != NULL);
9092 BFD_ASSERT (s->output_section != NULL);
9093
9094 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
9095
9096 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
9097
9098 if ((globals->bx_glue_offset[reg] & 1) == 0)
9099 {
9100 p = s->contents + glue_addr;
9101 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
9102 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
9103 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
9104 globals->bx_glue_offset[reg] |= 1;
9105 }
9106
9107 return glue_addr + s->output_section->vma + s->output_offset;
9108 }
9109
9110 /* Generate Arm stubs for exported Thumb symbols. */
9111 static void
9112 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
9113 struct bfd_link_info *link_info)
9114 {
9115 struct elf32_arm_link_hash_table * globals;
9116
9117 if (link_info == NULL)
9118 /* Ignore this if we are not called by the ELF backend linker. */
9119 return;
9120
9121 globals = elf32_arm_hash_table (link_info);
9122 if (globals == NULL)
9123 return;
9124
9125 /* If blx is available then exported Thumb symbols are OK and there is
9126 nothing to do. */
9127 if (globals->use_blx)
9128 return;
9129
9130 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
9131 link_info);
9132 }
9133
9134 /* Reserve space for COUNT dynamic relocations in relocation selection
9135 SRELOC. */
9136
9137 static void
9138 elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
9139 bfd_size_type count)
9140 {
9141 struct elf32_arm_link_hash_table *htab;
9142
9143 htab = elf32_arm_hash_table (info);
9144 BFD_ASSERT (htab->root.dynamic_sections_created);
9145 if (sreloc == NULL)
9146 abort ();
9147 sreloc->size += RELOC_SIZE (htab) * count;
9148 }
9149
9150 /* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
9151 dynamic, the relocations should go in SRELOC, otherwise they should
9152 go in the special .rel.iplt section. */
9153
9154 static void
9155 elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
9156 bfd_size_type count)
9157 {
9158 struct elf32_arm_link_hash_table *htab;
9159
9160 htab = elf32_arm_hash_table (info);
9161 if (!htab->root.dynamic_sections_created)
9162 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
9163 else
9164 {
9165 BFD_ASSERT (sreloc != NULL);
9166 sreloc->size += RELOC_SIZE (htab) * count;
9167 }
9168 }
9169
9170 /* Add relocation REL to the end of relocation section SRELOC. */
9171
9172 static void
9173 elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
9174 asection *sreloc, Elf_Internal_Rela *rel)
9175 {
9176 bfd_byte *loc;
9177 struct elf32_arm_link_hash_table *htab;
9178
9179 htab = elf32_arm_hash_table (info);
9180 if (!htab->root.dynamic_sections_created
9181 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
9182 sreloc = htab->root.irelplt;
9183 if (sreloc == NULL)
9184 abort ();
9185 loc = sreloc->contents;
9186 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
9187 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
9188 abort ();
9189 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
9190 }
9191
9192 /* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
9193 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
9194 to .plt. */
9195
9196 static void
9197 elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
9198 bfd_boolean is_iplt_entry,
9199 union gotplt_union *root_plt,
9200 struct arm_plt_info *arm_plt)
9201 {
9202 struct elf32_arm_link_hash_table *htab;
9203 asection *splt;
9204 asection *sgotplt;
9205
9206 htab = elf32_arm_hash_table (info);
9207
9208 if (is_iplt_entry)
9209 {
9210 splt = htab->root.iplt;
9211 sgotplt = htab->root.igotplt;
9212
9213 /* NaCl uses a special first entry in .iplt too. */
9214 if (htab->nacl_p && splt->size == 0)
9215 splt->size += htab->plt_header_size;
9216
9217 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
9218 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
9219 }
9220 else
9221 {
9222 splt = htab->root.splt;
9223 sgotplt = htab->root.sgotplt;
9224
9225 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
9226 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
9227
9228 /* If this is the first .plt entry, make room for the special
9229 first entry. */
9230 if (splt->size == 0)
9231 splt->size += htab->plt_header_size;
9232
9233 htab->next_tls_desc_index++;
9234 }
9235
9236 /* Allocate the PLT entry itself, including any leading Thumb stub. */
9237 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9238 splt->size += PLT_THUMB_STUB_SIZE;
9239 root_plt->offset = splt->size;
9240 splt->size += htab->plt_entry_size;
9241
9242 if (!htab->symbian_p)
9243 {
9244 /* We also need to make an entry in the .got.plt section, which
9245 will be placed in the .got section by the linker script. */
9246 if (is_iplt_entry)
9247 arm_plt->got_offset = sgotplt->size;
9248 else
9249 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
9250 sgotplt->size += 4;
9251 }
9252 }
9253
9254 static bfd_vma
9255 arm_movw_immediate (bfd_vma value)
9256 {
9257 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
9258 }
9259
9260 static bfd_vma
9261 arm_movt_immediate (bfd_vma value)
9262 {
9263 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
9264 }
9265
9266 /* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
9267 the entry lives in .iplt and resolves to (*SYM_VALUE)().
9268 Otherwise, DYNINDX is the index of the symbol in the dynamic
9269 symbol table and SYM_VALUE is undefined.
9270
9271 ROOT_PLT points to the offset of the PLT entry from the start of its
9272 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
9273 bookkeeping information.
9274
9275 Returns FALSE if there was a problem. */
9276
9277 static bfd_boolean
9278 elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
9279 union gotplt_union *root_plt,
9280 struct arm_plt_info *arm_plt,
9281 int dynindx, bfd_vma sym_value)
9282 {
9283 struct elf32_arm_link_hash_table *htab;
9284 asection *sgot;
9285 asection *splt;
9286 asection *srel;
9287 bfd_byte *loc;
9288 bfd_vma plt_index;
9289 Elf_Internal_Rela rel;
9290 bfd_vma plt_header_size;
9291 bfd_vma got_header_size;
9292
9293 htab = elf32_arm_hash_table (info);
9294
9295 /* Pick the appropriate sections and sizes. */
9296 if (dynindx == -1)
9297 {
9298 splt = htab->root.iplt;
9299 sgot = htab->root.igotplt;
9300 srel = htab->root.irelplt;
9301
9302 /* There are no reserved entries in .igot.plt, and no special
9303 first entry in .iplt. */
9304 got_header_size = 0;
9305 plt_header_size = 0;
9306 }
9307 else
9308 {
9309 splt = htab->root.splt;
9310 sgot = htab->root.sgotplt;
9311 srel = htab->root.srelplt;
9312
9313 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
9314 plt_header_size = htab->plt_header_size;
9315 }
9316 BFD_ASSERT (splt != NULL && srel != NULL);
9317
9318 /* Fill in the entry in the procedure linkage table. */
9319 if (htab->symbian_p)
9320 {
9321 BFD_ASSERT (dynindx >= 0);
9322 put_arm_insn (htab, output_bfd,
9323 elf32_arm_symbian_plt_entry[0],
9324 splt->contents + root_plt->offset);
9325 bfd_put_32 (output_bfd,
9326 elf32_arm_symbian_plt_entry[1],
9327 splt->contents + root_plt->offset + 4);
9328
9329 /* Fill in the entry in the .rel.plt section. */
9330 rel.r_offset = (splt->output_section->vma
9331 + splt->output_offset
9332 + root_plt->offset + 4);
9333 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
9334
9335 /* Get the index in the procedure linkage table which
9336 corresponds to this symbol. This is the index of this symbol
9337 in all the symbols for which we are making plt entries. The
9338 first entry in the procedure linkage table is reserved. */
9339 plt_index = ((root_plt->offset - plt_header_size)
9340 / htab->plt_entry_size);
9341 }
9342 else
9343 {
9344 bfd_vma got_offset, got_address, plt_address;
9345 bfd_vma got_displacement, initial_got_entry;
9346 bfd_byte * ptr;
9347
9348 BFD_ASSERT (sgot != NULL);
9349
9350 /* Get the offset into the .(i)got.plt table of the entry that
9351 corresponds to this function. */
9352 got_offset = (arm_plt->got_offset & -2);
9353
9354 /* Get the index in the procedure linkage table which
9355 corresponds to this symbol. This is the index of this symbol
9356 in all the symbols for which we are making plt entries.
9357 After the reserved .got.plt entries, all symbols appear in
9358 the same order as in .plt. */
9359 plt_index = (got_offset - got_header_size) / 4;
9360
9361 /* Calculate the address of the GOT entry. */
9362 got_address = (sgot->output_section->vma
9363 + sgot->output_offset
9364 + got_offset);
9365
9366 /* ...and the address of the PLT entry. */
9367 plt_address = (splt->output_section->vma
9368 + splt->output_offset
9369 + root_plt->offset);
9370
9371 ptr = splt->contents + root_plt->offset;
9372 if (htab->vxworks_p && bfd_link_pic (info))
9373 {
9374 unsigned int i;
9375 bfd_vma val;
9376
9377 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9378 {
9379 val = elf32_arm_vxworks_shared_plt_entry[i];
9380 if (i == 2)
9381 val |= got_address - sgot->output_section->vma;
9382 if (i == 5)
9383 val |= plt_index * RELOC_SIZE (htab);
9384 if (i == 2 || i == 5)
9385 bfd_put_32 (output_bfd, val, ptr);
9386 else
9387 put_arm_insn (htab, output_bfd, val, ptr);
9388 }
9389 }
9390 else if (htab->vxworks_p)
9391 {
9392 unsigned int i;
9393 bfd_vma val;
9394
9395 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
9396 {
9397 val = elf32_arm_vxworks_exec_plt_entry[i];
9398 if (i == 2)
9399 val |= got_address;
9400 if (i == 4)
9401 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
9402 if (i == 5)
9403 val |= plt_index * RELOC_SIZE (htab);
9404 if (i == 2 || i == 5)
9405 bfd_put_32 (output_bfd, val, ptr);
9406 else
9407 put_arm_insn (htab, output_bfd, val, ptr);
9408 }
9409
9410 loc = (htab->srelplt2->contents
9411 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9412
9413 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9414 referencing the GOT for this PLT entry. */
9415 rel.r_offset = plt_address + 8;
9416 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9417 rel.r_addend = got_offset;
9418 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9419 loc += RELOC_SIZE (htab);
9420
9421 /* Create the R_ARM_ABS32 relocation referencing the
9422 beginning of the PLT for this GOT entry. */
9423 rel.r_offset = got_address;
9424 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9425 rel.r_addend = 0;
9426 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9427 }
9428 else if (htab->nacl_p)
9429 {
9430 /* Calculate the displacement between the PLT slot and the
9431 common tail that's part of the special initial PLT slot. */
9432 int32_t tail_displacement
9433 = ((splt->output_section->vma + splt->output_offset
9434 + ARM_NACL_PLT_TAIL_OFFSET)
9435 - (plt_address + htab->plt_entry_size + 4));
9436 BFD_ASSERT ((tail_displacement & 3) == 0);
9437 tail_displacement >>= 2;
9438
9439 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
9440 || (-tail_displacement & 0xff000000) == 0);
9441
9442 /* Calculate the displacement between the PLT slot and the entry
9443 in the GOT. The offset accounts for the value produced by
9444 adding to pc in the penultimate instruction of the PLT stub. */
9445 got_displacement = (got_address
9446 - (plt_address + htab->plt_entry_size));
9447
9448 /* NaCl does not support interworking at all. */
9449 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
9450
9451 put_arm_insn (htab, output_bfd,
9452 elf32_arm_nacl_plt_entry[0]
9453 | arm_movw_immediate (got_displacement),
9454 ptr + 0);
9455 put_arm_insn (htab, output_bfd,
9456 elf32_arm_nacl_plt_entry[1]
9457 | arm_movt_immediate (got_displacement),
9458 ptr + 4);
9459 put_arm_insn (htab, output_bfd,
9460 elf32_arm_nacl_plt_entry[2],
9461 ptr + 8);
9462 put_arm_insn (htab, output_bfd,
9463 elf32_arm_nacl_plt_entry[3]
9464 | (tail_displacement & 0x00ffffff),
9465 ptr + 12);
9466 }
9467 else if (using_thumb_only (htab))
9468 {
9469 /* PR ld/16017: Generate thumb only PLT entries. */
9470 if (!using_thumb2 (htab))
9471 {
9472 /* FIXME: We ought to be able to generate thumb-1 PLT
9473 instructions... */
9474 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
9475 output_bfd);
9476 return FALSE;
9477 }
9478
9479 /* Calculate the displacement between the PLT slot and the entry in
9480 the GOT. The 12-byte offset accounts for the value produced by
9481 adding to pc in the 3rd instruction of the PLT stub. */
9482 got_displacement = got_address - (plt_address + 12);
9483
9484 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
9485 instead of 'put_thumb_insn'. */
9486 put_arm_insn (htab, output_bfd,
9487 elf32_thumb2_plt_entry[0]
9488 | ((got_displacement & 0x000000ff) << 16)
9489 | ((got_displacement & 0x00000700) << 20)
9490 | ((got_displacement & 0x00000800) >> 1)
9491 | ((got_displacement & 0x0000f000) >> 12),
9492 ptr + 0);
9493 put_arm_insn (htab, output_bfd,
9494 elf32_thumb2_plt_entry[1]
9495 | ((got_displacement & 0x00ff0000) )
9496 | ((got_displacement & 0x07000000) << 4)
9497 | ((got_displacement & 0x08000000) >> 17)
9498 | ((got_displacement & 0xf0000000) >> 28),
9499 ptr + 4);
9500 put_arm_insn (htab, output_bfd,
9501 elf32_thumb2_plt_entry[2],
9502 ptr + 8);
9503 put_arm_insn (htab, output_bfd,
9504 elf32_thumb2_plt_entry[3],
9505 ptr + 12);
9506 }
9507 else
9508 {
9509 /* Calculate the displacement between the PLT slot and the
9510 entry in the GOT. The eight-byte offset accounts for the
9511 value produced by adding to pc in the first instruction
9512 of the PLT stub. */
9513 got_displacement = got_address - (plt_address + 8);
9514
9515 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
9516 {
9517 put_thumb_insn (htab, output_bfd,
9518 elf32_arm_plt_thumb_stub[0], ptr - 4);
9519 put_thumb_insn (htab, output_bfd,
9520 elf32_arm_plt_thumb_stub[1], ptr - 2);
9521 }
9522
9523 if (!elf32_arm_use_long_plt_entry)
9524 {
9525 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9526
9527 put_arm_insn (htab, output_bfd,
9528 elf32_arm_plt_entry_short[0]
9529 | ((got_displacement & 0x0ff00000) >> 20),
9530 ptr + 0);
9531 put_arm_insn (htab, output_bfd,
9532 elf32_arm_plt_entry_short[1]
9533 | ((got_displacement & 0x000ff000) >> 12),
9534 ptr+ 4);
9535 put_arm_insn (htab, output_bfd,
9536 elf32_arm_plt_entry_short[2]
9537 | (got_displacement & 0x00000fff),
9538 ptr + 8);
9539 #ifdef FOUR_WORD_PLT
9540 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
9541 #endif
9542 }
9543 else
9544 {
9545 put_arm_insn (htab, output_bfd,
9546 elf32_arm_plt_entry_long[0]
9547 | ((got_displacement & 0xf0000000) >> 28),
9548 ptr + 0);
9549 put_arm_insn (htab, output_bfd,
9550 elf32_arm_plt_entry_long[1]
9551 | ((got_displacement & 0x0ff00000) >> 20),
9552 ptr + 4);
9553 put_arm_insn (htab, output_bfd,
9554 elf32_arm_plt_entry_long[2]
9555 | ((got_displacement & 0x000ff000) >> 12),
9556 ptr+ 8);
9557 put_arm_insn (htab, output_bfd,
9558 elf32_arm_plt_entry_long[3]
9559 | (got_displacement & 0x00000fff),
9560 ptr + 12);
9561 }
9562 }
9563
9564 /* Fill in the entry in the .rel(a).(i)plt section. */
9565 rel.r_offset = got_address;
9566 rel.r_addend = 0;
9567 if (dynindx == -1)
9568 {
9569 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
9570 The dynamic linker or static executable then calls SYM_VALUE
9571 to determine the correct run-time value of the .igot.plt entry. */
9572 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
9573 initial_got_entry = sym_value;
9574 }
9575 else
9576 {
9577 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
9578 initial_got_entry = (splt->output_section->vma
9579 + splt->output_offset);
9580 }
9581
9582 /* Fill in the entry in the global offset table. */
9583 bfd_put_32 (output_bfd, initial_got_entry,
9584 sgot->contents + got_offset);
9585 }
9586
9587 if (dynindx == -1)
9588 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
9589 else
9590 {
9591 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9592 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9593 }
9594
9595 return TRUE;
9596 }
9597
9598 /* Some relocations map to different relocations depending on the
9599 target. Return the real relocation. */
9600
9601 static int
9602 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
9603 int r_type)
9604 {
9605 switch (r_type)
9606 {
9607 case R_ARM_TARGET1:
9608 if (globals->target1_is_rel)
9609 return R_ARM_REL32;
9610 else
9611 return R_ARM_ABS32;
9612
9613 case R_ARM_TARGET2:
9614 return globals->target2_reloc;
9615
9616 default:
9617 return r_type;
9618 }
9619 }
9620
9621 /* Return the base VMA address which should be subtracted from real addresses
9622 when resolving @dtpoff relocation.
9623 This is PT_TLS segment p_vaddr. */
9624
9625 static bfd_vma
9626 dtpoff_base (struct bfd_link_info *info)
9627 {
9628 /* If tls_sec is NULL, we should have signalled an error already. */
9629 if (elf_hash_table (info)->tls_sec == NULL)
9630 return 0;
9631 return elf_hash_table (info)->tls_sec->vma;
9632 }
9633
9634 /* Return the relocation value for @tpoff relocation
9635 if STT_TLS virtual address is ADDRESS. */
9636
9637 static bfd_vma
9638 tpoff (struct bfd_link_info *info, bfd_vma address)
9639 {
9640 struct elf_link_hash_table *htab = elf_hash_table (info);
9641 bfd_vma base;
9642
9643 /* If tls_sec is NULL, we should have signalled an error already. */
9644 if (htab->tls_sec == NULL)
9645 return 0;
9646 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
9647 return address - htab->tls_sec->vma + base;
9648 }
9649
9650 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
9651 VALUE is the relocation value. */
9652
9653 static bfd_reloc_status_type
9654 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
9655 {
9656 if (value > 0xfff)
9657 return bfd_reloc_overflow;
9658
9659 value |= bfd_get_32 (abfd, data) & 0xfffff000;
9660 bfd_put_32 (abfd, value, data);
9661 return bfd_reloc_ok;
9662 }
9663
9664 /* Handle TLS relaxations. Relaxing is possible for symbols that use
9665 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
9666 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
9667
9668 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
9669 is to then call final_link_relocate. Return other values in the
9670 case of error.
9671
9672 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
9673 the pre-relaxed code. It would be nice if the relocs were updated
9674 to match the optimization. */
9675
9676 static bfd_reloc_status_type
9677 elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
9678 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
9679 Elf_Internal_Rela *rel, unsigned long is_local)
9680 {
9681 unsigned long insn;
9682
9683 switch (ELF32_R_TYPE (rel->r_info))
9684 {
9685 default:
9686 return bfd_reloc_notsupported;
9687
9688 case R_ARM_TLS_GOTDESC:
9689 if (is_local)
9690 insn = 0;
9691 else
9692 {
9693 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9694 if (insn & 1)
9695 insn -= 5; /* THUMB */
9696 else
9697 insn -= 8; /* ARM */
9698 }
9699 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9700 return bfd_reloc_continue;
9701
9702 case R_ARM_THM_TLS_DESCSEQ:
9703 /* Thumb insn. */
9704 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
9705 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
9706 {
9707 if (is_local)
9708 /* nop */
9709 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9710 }
9711 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
9712 {
9713 if (is_local)
9714 /* nop */
9715 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9716 else
9717 /* ldr rx,[ry] */
9718 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
9719 }
9720 else if ((insn & 0xff87) == 0x4780) /* blx rx */
9721 {
9722 if (is_local)
9723 /* nop */
9724 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
9725 else
9726 /* mov r0, rx */
9727 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
9728 contents + rel->r_offset);
9729 }
9730 else
9731 {
9732 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9733 /* It's a 32 bit instruction, fetch the rest of it for
9734 error generation. */
9735 insn = (insn << 16)
9736 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
9737 _bfd_error_handler
9738 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
9739 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9740 return bfd_reloc_notsupported;
9741 }
9742 break;
9743
9744 case R_ARM_TLS_DESCSEQ:
9745 /* arm insn. */
9746 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
9747 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
9748 {
9749 if (is_local)
9750 /* mov rx, ry */
9751 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
9752 contents + rel->r_offset);
9753 }
9754 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
9755 {
9756 if (is_local)
9757 /* nop */
9758 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9759 else
9760 /* ldr rx,[ry] */
9761 bfd_put_32 (input_bfd, insn & 0xfffff000,
9762 contents + rel->r_offset);
9763 }
9764 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
9765 {
9766 if (is_local)
9767 /* nop */
9768 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
9769 else
9770 /* mov r0, rx */
9771 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
9772 contents + rel->r_offset);
9773 }
9774 else
9775 {
9776 _bfd_error_handler
9777 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
9778 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
9779 return bfd_reloc_notsupported;
9780 }
9781 break;
9782
9783 case R_ARM_TLS_CALL:
9784 /* GD->IE relaxation, turn the instruction into 'nop' or
9785 'ldr r0, [pc,r0]' */
9786 insn = is_local ? 0xe1a00000 : 0xe79f0000;
9787 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
9788 break;
9789
9790 case R_ARM_THM_TLS_CALL:
9791 /* GD->IE relaxation. */
9792 if (!is_local)
9793 /* add r0,pc; ldr r0, [r0] */
9794 insn = 0x44786800;
9795 else if (using_thumb2 (globals))
9796 /* nop.w */
9797 insn = 0xf3af8000;
9798 else
9799 /* nop; nop */
9800 insn = 0xbf00bf00;
9801
9802 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
9803 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
9804 break;
9805 }
9806 return bfd_reloc_ok;
9807 }
9808
9809 /* For a given value of n, calculate the value of G_n as required to
9810 deal with group relocations. We return it in the form of an
9811 encoded constant-and-rotation, together with the final residual. If n is
9812 specified as less than zero, then final_residual is filled with the
9813 input value and no further action is performed. */
9814
9815 static bfd_vma
9816 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
9817 {
9818 int current_n;
9819 bfd_vma g_n;
9820 bfd_vma encoded_g_n = 0;
9821 bfd_vma residual = value; /* Also known as Y_n. */
9822
9823 for (current_n = 0; current_n <= n; current_n++)
9824 {
9825 int shift;
9826
9827 /* Calculate which part of the value to mask. */
9828 if (residual == 0)
9829 shift = 0;
9830 else
9831 {
9832 int msb;
9833
9834 /* Determine the most significant bit in the residual and
9835 align the resulting value to a 2-bit boundary. */
9836 for (msb = 30; msb >= 0; msb -= 2)
9837 if (residual & (3 << msb))
9838 break;
9839
9840 /* The desired shift is now (msb - 6), or zero, whichever
9841 is the greater. */
9842 shift = msb - 6;
9843 if (shift < 0)
9844 shift = 0;
9845 }
9846
9847 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
9848 g_n = residual & (0xff << shift);
9849 encoded_g_n = (g_n >> shift)
9850 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
9851
9852 /* Calculate the residual for the next time around. */
9853 residual &= ~g_n;
9854 }
9855
9856 *final_residual = residual;
9857
9858 return encoded_g_n;
9859 }
9860
9861 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
9862 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
9863
9864 static int
9865 identify_add_or_sub (bfd_vma insn)
9866 {
9867 int opcode = insn & 0x1e00000;
9868
9869 if (opcode == 1 << 23) /* ADD */
9870 return 1;
9871
9872 if (opcode == 1 << 22) /* SUB */
9873 return -1;
9874
9875 return 0;
9876 }
9877
9878 /* Perform a relocation as part of a final link. */
9879
9880 static bfd_reloc_status_type
9881 elf32_arm_final_link_relocate (reloc_howto_type * howto,
9882 bfd * input_bfd,
9883 bfd * output_bfd,
9884 asection * input_section,
9885 bfd_byte * contents,
9886 Elf_Internal_Rela * rel,
9887 bfd_vma value,
9888 struct bfd_link_info * info,
9889 asection * sym_sec,
9890 const char * sym_name,
9891 unsigned char st_type,
9892 enum arm_st_branch_type branch_type,
9893 struct elf_link_hash_entry * h,
9894 bfd_boolean * unresolved_reloc_p,
9895 char ** error_message)
9896 {
9897 unsigned long r_type = howto->type;
9898 unsigned long r_symndx;
9899 bfd_byte * hit_data = contents + rel->r_offset;
9900 bfd_vma * local_got_offsets;
9901 bfd_vma * local_tlsdesc_gotents;
9902 asection * sgot;
9903 asection * splt;
9904 asection * sreloc = NULL;
9905 asection * srelgot;
9906 bfd_vma addend;
9907 bfd_signed_vma signed_addend;
9908 unsigned char dynreloc_st_type;
9909 bfd_vma dynreloc_value;
9910 struct elf32_arm_link_hash_table * globals;
9911 struct elf32_arm_link_hash_entry *eh;
9912 union gotplt_union *root_plt;
9913 struct arm_plt_info *arm_plt;
9914 bfd_vma plt_offset;
9915 bfd_vma gotplt_offset;
9916 bfd_boolean has_iplt_entry;
9917
9918 globals = elf32_arm_hash_table (info);
9919 if (globals == NULL)
9920 return bfd_reloc_notsupported;
9921
9922 BFD_ASSERT (is_arm_elf (input_bfd));
9923
9924 /* Some relocation types map to different relocations depending on the
9925 target. We pick the right one here. */
9926 r_type = arm_real_reloc_type (globals, r_type);
9927
9928 /* It is possible to have linker relaxations on some TLS access
9929 models. Update our information here. */
9930 r_type = elf32_arm_tls_transition (info, r_type, h);
9931
9932 if (r_type != howto->type)
9933 howto = elf32_arm_howto_from_type (r_type);
9934
9935 eh = (struct elf32_arm_link_hash_entry *) h;
9936 sgot = globals->root.sgot;
9937 local_got_offsets = elf_local_got_offsets (input_bfd);
9938 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
9939
9940 if (globals->root.dynamic_sections_created)
9941 srelgot = globals->root.srelgot;
9942 else
9943 srelgot = NULL;
9944
9945 r_symndx = ELF32_R_SYM (rel->r_info);
9946
9947 if (globals->use_rel)
9948 {
9949 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
9950
9951 if (addend & ((howto->src_mask + 1) >> 1))
9952 {
9953 signed_addend = -1;
9954 signed_addend &= ~ howto->src_mask;
9955 signed_addend |= addend;
9956 }
9957 else
9958 signed_addend = addend;
9959 }
9960 else
9961 addend = signed_addend = rel->r_addend;
9962
9963 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
9964 are resolving a function call relocation. */
9965 if (using_thumb_only (globals)
9966 && (r_type == R_ARM_THM_CALL
9967 || r_type == R_ARM_THM_JUMP24)
9968 && branch_type == ST_BRANCH_TO_ARM)
9969 branch_type = ST_BRANCH_TO_THUMB;
9970
9971 /* Record the symbol information that should be used in dynamic
9972 relocations. */
9973 dynreloc_st_type = st_type;
9974 dynreloc_value = value;
9975 if (branch_type == ST_BRANCH_TO_THUMB)
9976 dynreloc_value |= 1;
9977
9978 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
9979 VALUE appropriately for relocations that we resolve at link time. */
9980 has_iplt_entry = FALSE;
9981 if (elf32_arm_get_plt_info (input_bfd, globals, eh, r_symndx, &root_plt,
9982 &arm_plt)
9983 && root_plt->offset != (bfd_vma) -1)
9984 {
9985 plt_offset = root_plt->offset;
9986 gotplt_offset = arm_plt->got_offset;
9987
9988 if (h == NULL || eh->is_iplt)
9989 {
9990 has_iplt_entry = TRUE;
9991 splt = globals->root.iplt;
9992
9993 /* Populate .iplt entries here, because not all of them will
9994 be seen by finish_dynamic_symbol. The lower bit is set if
9995 we have already populated the entry. */
9996 if (plt_offset & 1)
9997 plt_offset--;
9998 else
9999 {
10000 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
10001 -1, dynreloc_value))
10002 root_plt->offset |= 1;
10003 else
10004 return bfd_reloc_notsupported;
10005 }
10006
10007 /* Static relocations always resolve to the .iplt entry. */
10008 st_type = STT_FUNC;
10009 value = (splt->output_section->vma
10010 + splt->output_offset
10011 + plt_offset);
10012 branch_type = ST_BRANCH_TO_ARM;
10013
10014 /* If there are non-call relocations that resolve to the .iplt
10015 entry, then all dynamic ones must too. */
10016 if (arm_plt->noncall_refcount != 0)
10017 {
10018 dynreloc_st_type = st_type;
10019 dynreloc_value = value;
10020 }
10021 }
10022 else
10023 /* We populate the .plt entry in finish_dynamic_symbol. */
10024 splt = globals->root.splt;
10025 }
10026 else
10027 {
10028 splt = NULL;
10029 plt_offset = (bfd_vma) -1;
10030 gotplt_offset = (bfd_vma) -1;
10031 }
10032
10033 switch (r_type)
10034 {
10035 case R_ARM_NONE:
10036 /* We don't need to find a value for this symbol. It's just a
10037 marker. */
10038 *unresolved_reloc_p = FALSE;
10039 return bfd_reloc_ok;
10040
10041 case R_ARM_ABS12:
10042 if (!globals->vxworks_p)
10043 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10044 /* Fall through. */
10045
10046 case R_ARM_PC24:
10047 case R_ARM_ABS32:
10048 case R_ARM_ABS32_NOI:
10049 case R_ARM_REL32:
10050 case R_ARM_REL32_NOI:
10051 case R_ARM_CALL:
10052 case R_ARM_JUMP24:
10053 case R_ARM_XPC25:
10054 case R_ARM_PREL31:
10055 case R_ARM_PLT32:
10056 /* Handle relocations which should use the PLT entry. ABS32/REL32
10057 will use the symbol's value, which may point to a PLT entry, but we
10058 don't need to handle that here. If we created a PLT entry, all
10059 branches in this object should go to it, except if the PLT is too
10060 far away, in which case a long branch stub should be inserted. */
10061 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
10062 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
10063 && r_type != R_ARM_CALL
10064 && r_type != R_ARM_JUMP24
10065 && r_type != R_ARM_PLT32)
10066 && plt_offset != (bfd_vma) -1)
10067 {
10068 /* If we've created a .plt section, and assigned a PLT entry
10069 to this function, it must either be a STT_GNU_IFUNC reference
10070 or not be known to bind locally. In other cases, we should
10071 have cleared the PLT entry by now. */
10072 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
10073
10074 value = (splt->output_section->vma
10075 + splt->output_offset
10076 + plt_offset);
10077 *unresolved_reloc_p = FALSE;
10078 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10079 contents, rel->r_offset, value,
10080 rel->r_addend);
10081 }
10082
10083 /* When generating a shared object or relocatable executable, these
10084 relocations are copied into the output file to be resolved at
10085 run time. */
10086 if ((bfd_link_pic (info)
10087 || globals->root.is_relocatable_executable)
10088 && (input_section->flags & SEC_ALLOC)
10089 && !(globals->vxworks_p
10090 && strcmp (input_section->output_section->name,
10091 ".tls_vars") == 0)
10092 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
10093 || !SYMBOL_CALLS_LOCAL (info, h))
10094 && !(input_bfd == globals->stub_bfd
10095 && strstr (input_section->name, STUB_SUFFIX))
10096 && (h == NULL
10097 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
10098 || h->root.type != bfd_link_hash_undefweak)
10099 && r_type != R_ARM_PC24
10100 && r_type != R_ARM_CALL
10101 && r_type != R_ARM_JUMP24
10102 && r_type != R_ARM_PREL31
10103 && r_type != R_ARM_PLT32)
10104 {
10105 Elf_Internal_Rela outrel;
10106 bfd_boolean skip, relocate;
10107
10108 if ((r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
10109 && !h->def_regular)
10110 {
10111 char *v = _("shared object");
10112
10113 if (bfd_link_executable (info))
10114 v = _("PIE executable");
10115
10116 _bfd_error_handler
10117 (_("%B: relocation %s against external or undefined symbol `%s'"
10118 " can not be used when making a %s; recompile with -fPIC"), input_bfd,
10119 elf32_arm_howto_table_1[r_type].name, h->root.root.string, v);
10120 return bfd_reloc_notsupported;
10121 }
10122
10123 *unresolved_reloc_p = FALSE;
10124
10125 if (sreloc == NULL && globals->root.dynamic_sections_created)
10126 {
10127 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
10128 ! globals->use_rel);
10129
10130 if (sreloc == NULL)
10131 return bfd_reloc_notsupported;
10132 }
10133
10134 skip = FALSE;
10135 relocate = FALSE;
10136
10137 outrel.r_addend = addend;
10138 outrel.r_offset =
10139 _bfd_elf_section_offset (output_bfd, info, input_section,
10140 rel->r_offset);
10141 if (outrel.r_offset == (bfd_vma) -1)
10142 skip = TRUE;
10143 else if (outrel.r_offset == (bfd_vma) -2)
10144 skip = TRUE, relocate = TRUE;
10145 outrel.r_offset += (input_section->output_section->vma
10146 + input_section->output_offset);
10147
10148 if (skip)
10149 memset (&outrel, 0, sizeof outrel);
10150 else if (h != NULL
10151 && h->dynindx != -1
10152 && (!bfd_link_pic (info)
10153 || !SYMBOLIC_BIND (info, h)
10154 || !h->def_regular))
10155 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
10156 else
10157 {
10158 int symbol;
10159
10160 /* This symbol is local, or marked to become local. */
10161 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
10162 if (globals->symbian_p)
10163 {
10164 asection *osec;
10165
10166 /* On Symbian OS, the data segment and text segement
10167 can be relocated independently. Therefore, we
10168 must indicate the segment to which this
10169 relocation is relative. The BPABI allows us to
10170 use any symbol in the right segment; we just use
10171 the section symbol as it is convenient. (We
10172 cannot use the symbol given by "h" directly as it
10173 will not appear in the dynamic symbol table.)
10174
10175 Note that the dynamic linker ignores the section
10176 symbol value, so we don't subtract osec->vma
10177 from the emitted reloc addend. */
10178 if (sym_sec)
10179 osec = sym_sec->output_section;
10180 else
10181 osec = input_section->output_section;
10182 symbol = elf_section_data (osec)->dynindx;
10183 if (symbol == 0)
10184 {
10185 struct elf_link_hash_table *htab = elf_hash_table (info);
10186
10187 if ((osec->flags & SEC_READONLY) == 0
10188 && htab->data_index_section != NULL)
10189 osec = htab->data_index_section;
10190 else
10191 osec = htab->text_index_section;
10192 symbol = elf_section_data (osec)->dynindx;
10193 }
10194 BFD_ASSERT (symbol != 0);
10195 }
10196 else
10197 /* On SVR4-ish systems, the dynamic loader cannot
10198 relocate the text and data segments independently,
10199 so the symbol does not matter. */
10200 symbol = 0;
10201 if (dynreloc_st_type == STT_GNU_IFUNC)
10202 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
10203 to the .iplt entry. Instead, every non-call reference
10204 must use an R_ARM_IRELATIVE relocation to obtain the
10205 correct run-time address. */
10206 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
10207 else
10208 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
10209 if (globals->use_rel)
10210 relocate = TRUE;
10211 else
10212 outrel.r_addend += dynreloc_value;
10213 }
10214
10215 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
10216
10217 /* If this reloc is against an external symbol, we do not want to
10218 fiddle with the addend. Otherwise, we need to include the symbol
10219 value so that it becomes an addend for the dynamic reloc. */
10220 if (! relocate)
10221 return bfd_reloc_ok;
10222
10223 return _bfd_final_link_relocate (howto, input_bfd, input_section,
10224 contents, rel->r_offset,
10225 dynreloc_value, (bfd_vma) 0);
10226 }
10227 else switch (r_type)
10228 {
10229 case R_ARM_ABS12:
10230 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
10231
10232 case R_ARM_XPC25: /* Arm BLX instruction. */
10233 case R_ARM_CALL:
10234 case R_ARM_JUMP24:
10235 case R_ARM_PC24: /* Arm B/BL instruction. */
10236 case R_ARM_PLT32:
10237 {
10238 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
10239
10240 if (r_type == R_ARM_XPC25)
10241 {
10242 /* Check for Arm calling Arm function. */
10243 /* FIXME: Should we translate the instruction into a BL
10244 instruction instead ? */
10245 if (branch_type != ST_BRANCH_TO_THUMB)
10246 _bfd_error_handler
10247 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
10248 input_bfd,
10249 h ? h->root.root.string : "(local)");
10250 }
10251 else if (r_type == R_ARM_PC24)
10252 {
10253 /* Check for Arm calling Thumb function. */
10254 if (branch_type == ST_BRANCH_TO_THUMB)
10255 {
10256 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
10257 output_bfd, input_section,
10258 hit_data, sym_sec, rel->r_offset,
10259 signed_addend, value,
10260 error_message))
10261 return bfd_reloc_ok;
10262 else
10263 return bfd_reloc_dangerous;
10264 }
10265 }
10266
10267 /* Check if a stub has to be inserted because the
10268 destination is too far or we are changing mode. */
10269 if ( r_type == R_ARM_CALL
10270 || r_type == R_ARM_JUMP24
10271 || r_type == R_ARM_PLT32)
10272 {
10273 enum elf32_arm_stub_type stub_type = arm_stub_none;
10274 struct elf32_arm_link_hash_entry *hash;
10275
10276 hash = (struct elf32_arm_link_hash_entry *) h;
10277 stub_type = arm_type_of_stub (info, input_section, rel,
10278 st_type, &branch_type,
10279 hash, value, sym_sec,
10280 input_bfd, sym_name);
10281
10282 if (stub_type != arm_stub_none)
10283 {
10284 /* The target is out of reach, so redirect the
10285 branch to the local stub for this function. */
10286 stub_entry = elf32_arm_get_stub_entry (input_section,
10287 sym_sec, h,
10288 rel, globals,
10289 stub_type);
10290 {
10291 if (stub_entry != NULL)
10292 value = (stub_entry->stub_offset
10293 + stub_entry->stub_sec->output_offset
10294 + stub_entry->stub_sec->output_section->vma);
10295
10296 if (plt_offset != (bfd_vma) -1)
10297 *unresolved_reloc_p = FALSE;
10298 }
10299 }
10300 else
10301 {
10302 /* If the call goes through a PLT entry, make sure to
10303 check distance to the right destination address. */
10304 if (plt_offset != (bfd_vma) -1)
10305 {
10306 value = (splt->output_section->vma
10307 + splt->output_offset
10308 + plt_offset);
10309 *unresolved_reloc_p = FALSE;
10310 /* The PLT entry is in ARM mode, regardless of the
10311 target function. */
10312 branch_type = ST_BRANCH_TO_ARM;
10313 }
10314 }
10315 }
10316
10317 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
10318 where:
10319 S is the address of the symbol in the relocation.
10320 P is address of the instruction being relocated.
10321 A is the addend (extracted from the instruction) in bytes.
10322
10323 S is held in 'value'.
10324 P is the base address of the section containing the
10325 instruction plus the offset of the reloc into that
10326 section, ie:
10327 (input_section->output_section->vma +
10328 input_section->output_offset +
10329 rel->r_offset).
10330 A is the addend, converted into bytes, ie:
10331 (signed_addend * 4)
10332
10333 Note: None of these operations have knowledge of the pipeline
10334 size of the processor, thus it is up to the assembler to
10335 encode this information into the addend. */
10336 value -= (input_section->output_section->vma
10337 + input_section->output_offset);
10338 value -= rel->r_offset;
10339 if (globals->use_rel)
10340 value += (signed_addend << howto->size);
10341 else
10342 /* RELA addends do not have to be adjusted by howto->size. */
10343 value += signed_addend;
10344
10345 signed_addend = value;
10346 signed_addend >>= howto->rightshift;
10347
10348 /* A branch to an undefined weak symbol is turned into a jump to
10349 the next instruction unless a PLT entry will be created.
10350 Do the same for local undefined symbols (but not for STN_UNDEF).
10351 The jump to the next instruction is optimized as a NOP depending
10352 on the architecture. */
10353 if (h ? (h->root.type == bfd_link_hash_undefweak
10354 && plt_offset == (bfd_vma) -1)
10355 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
10356 {
10357 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
10358
10359 if (arch_has_arm_nop (globals))
10360 value |= 0x0320f000;
10361 else
10362 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
10363 }
10364 else
10365 {
10366 /* Perform a signed range check. */
10367 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
10368 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
10369 return bfd_reloc_overflow;
10370
10371 addend = (value & 2);
10372
10373 value = (signed_addend & howto->dst_mask)
10374 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
10375
10376 if (r_type == R_ARM_CALL)
10377 {
10378 /* Set the H bit in the BLX instruction. */
10379 if (branch_type == ST_BRANCH_TO_THUMB)
10380 {
10381 if (addend)
10382 value |= (1 << 24);
10383 else
10384 value &= ~(bfd_vma)(1 << 24);
10385 }
10386
10387 /* Select the correct instruction (BL or BLX). */
10388 /* Only if we are not handling a BL to a stub. In this
10389 case, mode switching is performed by the stub. */
10390 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
10391 value |= (1 << 28);
10392 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
10393 {
10394 value &= ~(bfd_vma)(1 << 28);
10395 value |= (1 << 24);
10396 }
10397 }
10398 }
10399 }
10400 break;
10401
10402 case R_ARM_ABS32:
10403 value += addend;
10404 if (branch_type == ST_BRANCH_TO_THUMB)
10405 value |= 1;
10406 break;
10407
10408 case R_ARM_ABS32_NOI:
10409 value += addend;
10410 break;
10411
10412 case R_ARM_REL32:
10413 value += addend;
10414 if (branch_type == ST_BRANCH_TO_THUMB)
10415 value |= 1;
10416 value -= (input_section->output_section->vma
10417 + input_section->output_offset + rel->r_offset);
10418 break;
10419
10420 case R_ARM_REL32_NOI:
10421 value += addend;
10422 value -= (input_section->output_section->vma
10423 + input_section->output_offset + rel->r_offset);
10424 break;
10425
10426 case R_ARM_PREL31:
10427 value -= (input_section->output_section->vma
10428 + input_section->output_offset + rel->r_offset);
10429 value += signed_addend;
10430 if (! h || h->root.type != bfd_link_hash_undefweak)
10431 {
10432 /* Check for overflow. */
10433 if ((value ^ (value >> 1)) & (1 << 30))
10434 return bfd_reloc_overflow;
10435 }
10436 value &= 0x7fffffff;
10437 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
10438 if (branch_type == ST_BRANCH_TO_THUMB)
10439 value |= 1;
10440 break;
10441 }
10442
10443 bfd_put_32 (input_bfd, value, hit_data);
10444 return bfd_reloc_ok;
10445
10446 case R_ARM_ABS8:
10447 /* PR 16202: Refectch the addend using the correct size. */
10448 if (globals->use_rel)
10449 addend = bfd_get_8 (input_bfd, hit_data);
10450 value += addend;
10451
10452 /* There is no way to tell whether the user intended to use a signed or
10453 unsigned addend. When checking for overflow we accept either,
10454 as specified by the AAELF. */
10455 if ((long) value > 0xff || (long) value < -0x80)
10456 return bfd_reloc_overflow;
10457
10458 bfd_put_8 (input_bfd, value, hit_data);
10459 return bfd_reloc_ok;
10460
10461 case R_ARM_ABS16:
10462 /* PR 16202: Refectch the addend using the correct size. */
10463 if (globals->use_rel)
10464 addend = bfd_get_16 (input_bfd, hit_data);
10465 value += addend;
10466
10467 /* See comment for R_ARM_ABS8. */
10468 if ((long) value > 0xffff || (long) value < -0x8000)
10469 return bfd_reloc_overflow;
10470
10471 bfd_put_16 (input_bfd, value, hit_data);
10472 return bfd_reloc_ok;
10473
10474 case R_ARM_THM_ABS5:
10475 /* Support ldr and str instructions for the thumb. */
10476 if (globals->use_rel)
10477 {
10478 /* Need to refetch addend. */
10479 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10480 /* ??? Need to determine shift amount from operand size. */
10481 addend >>= howto->rightshift;
10482 }
10483 value += addend;
10484
10485 /* ??? Isn't value unsigned? */
10486 if ((long) value > 0x1f || (long) value < -0x10)
10487 return bfd_reloc_overflow;
10488
10489 /* ??? Value needs to be properly shifted into place first. */
10490 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
10491 bfd_put_16 (input_bfd, value, hit_data);
10492 return bfd_reloc_ok;
10493
10494 case R_ARM_THM_ALU_PREL_11_0:
10495 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
10496 {
10497 bfd_vma insn;
10498 bfd_signed_vma relocation;
10499
10500 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10501 | bfd_get_16 (input_bfd, hit_data + 2);
10502
10503 if (globals->use_rel)
10504 {
10505 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
10506 | ((insn & (1 << 26)) >> 15);
10507 if (insn & 0xf00000)
10508 signed_addend = -signed_addend;
10509 }
10510
10511 relocation = value + signed_addend;
10512 relocation -= Pa (input_section->output_section->vma
10513 + input_section->output_offset
10514 + rel->r_offset);
10515
10516 value = relocation;
10517
10518 if (value >= 0x1000)
10519 return bfd_reloc_overflow;
10520
10521 insn = (insn & 0xfb0f8f00) | (value & 0xff)
10522 | ((value & 0x700) << 4)
10523 | ((value & 0x800) << 15);
10524 if (relocation < 0)
10525 insn |= 0xa00000;
10526
10527 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10528 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10529
10530 return bfd_reloc_ok;
10531 }
10532
10533 case R_ARM_THM_PC8:
10534 /* PR 10073: This reloc is not generated by the GNU toolchain,
10535 but it is supported for compatibility with third party libraries
10536 generated by other compilers, specifically the ARM/IAR. */
10537 {
10538 bfd_vma insn;
10539 bfd_signed_vma relocation;
10540
10541 insn = bfd_get_16 (input_bfd, hit_data);
10542
10543 if (globals->use_rel)
10544 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
10545
10546 relocation = value + addend;
10547 relocation -= Pa (input_section->output_section->vma
10548 + input_section->output_offset
10549 + rel->r_offset);
10550
10551 value = relocation;
10552
10553 /* We do not check for overflow of this reloc. Although strictly
10554 speaking this is incorrect, it appears to be necessary in order
10555 to work with IAR generated relocs. Since GCC and GAS do not
10556 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
10557 a problem for them. */
10558 value &= 0x3fc;
10559
10560 insn = (insn & 0xff00) | (value >> 2);
10561
10562 bfd_put_16 (input_bfd, insn, hit_data);
10563
10564 return bfd_reloc_ok;
10565 }
10566
10567 case R_ARM_THM_PC12:
10568 /* Corresponds to: ldr.w reg, [pc, #offset]. */
10569 {
10570 bfd_vma insn;
10571 bfd_signed_vma relocation;
10572
10573 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
10574 | bfd_get_16 (input_bfd, hit_data + 2);
10575
10576 if (globals->use_rel)
10577 {
10578 signed_addend = insn & 0xfff;
10579 if (!(insn & (1 << 23)))
10580 signed_addend = -signed_addend;
10581 }
10582
10583 relocation = value + signed_addend;
10584 relocation -= Pa (input_section->output_section->vma
10585 + input_section->output_offset
10586 + rel->r_offset);
10587
10588 value = relocation;
10589
10590 if (value >= 0x1000)
10591 return bfd_reloc_overflow;
10592
10593 insn = (insn & 0xff7ff000) | value;
10594 if (relocation >= 0)
10595 insn |= (1 << 23);
10596
10597 bfd_put_16 (input_bfd, insn >> 16, hit_data);
10598 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
10599
10600 return bfd_reloc_ok;
10601 }
10602
10603 case R_ARM_THM_XPC22:
10604 case R_ARM_THM_CALL:
10605 case R_ARM_THM_JUMP24:
10606 /* Thumb BL (branch long instruction). */
10607 {
10608 bfd_vma relocation;
10609 bfd_vma reloc_sign;
10610 bfd_boolean overflow = FALSE;
10611 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10612 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10613 bfd_signed_vma reloc_signed_max;
10614 bfd_signed_vma reloc_signed_min;
10615 bfd_vma check;
10616 bfd_signed_vma signed_check;
10617 int bitsize;
10618 const int thumb2 = using_thumb2 (globals);
10619 const int thumb2_bl = using_thumb2_bl (globals);
10620
10621 /* A branch to an undefined weak symbol is turned into a jump to
10622 the next instruction unless a PLT entry will be created.
10623 The jump to the next instruction is optimized as a NOP.W for
10624 Thumb-2 enabled architectures. */
10625 if (h && h->root.type == bfd_link_hash_undefweak
10626 && plt_offset == (bfd_vma) -1)
10627 {
10628 if (thumb2)
10629 {
10630 bfd_put_16 (input_bfd, 0xf3af, hit_data);
10631 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
10632 }
10633 else
10634 {
10635 bfd_put_16 (input_bfd, 0xe000, hit_data);
10636 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
10637 }
10638 return bfd_reloc_ok;
10639 }
10640
10641 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
10642 with Thumb-1) involving the J1 and J2 bits. */
10643 if (globals->use_rel)
10644 {
10645 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
10646 bfd_vma upper = upper_insn & 0x3ff;
10647 bfd_vma lower = lower_insn & 0x7ff;
10648 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
10649 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
10650 bfd_vma i1 = j1 ^ s ? 0 : 1;
10651 bfd_vma i2 = j2 ^ s ? 0 : 1;
10652
10653 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
10654 /* Sign extend. */
10655 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
10656
10657 signed_addend = addend;
10658 }
10659
10660 if (r_type == R_ARM_THM_XPC22)
10661 {
10662 /* Check for Thumb to Thumb call. */
10663 /* FIXME: Should we translate the instruction into a BL
10664 instruction instead ? */
10665 if (branch_type == ST_BRANCH_TO_THUMB)
10666 _bfd_error_handler
10667 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
10668 input_bfd,
10669 h ? h->root.root.string : "(local)");
10670 }
10671 else
10672 {
10673 /* If it is not a call to Thumb, assume call to Arm.
10674 If it is a call relative to a section name, then it is not a
10675 function call at all, but rather a long jump. Calls through
10676 the PLT do not require stubs. */
10677 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
10678 {
10679 if (globals->use_blx && r_type == R_ARM_THM_CALL)
10680 {
10681 /* Convert BL to BLX. */
10682 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10683 }
10684 else if (( r_type != R_ARM_THM_CALL)
10685 && (r_type != R_ARM_THM_JUMP24))
10686 {
10687 if (elf32_thumb_to_arm_stub
10688 (info, sym_name, input_bfd, output_bfd, input_section,
10689 hit_data, sym_sec, rel->r_offset, signed_addend, value,
10690 error_message))
10691 return bfd_reloc_ok;
10692 else
10693 return bfd_reloc_dangerous;
10694 }
10695 }
10696 else if (branch_type == ST_BRANCH_TO_THUMB
10697 && globals->use_blx
10698 && r_type == R_ARM_THM_CALL)
10699 {
10700 /* Make sure this is a BL. */
10701 lower_insn |= 0x1800;
10702 }
10703 }
10704
10705 enum elf32_arm_stub_type stub_type = arm_stub_none;
10706 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
10707 {
10708 /* Check if a stub has to be inserted because the destination
10709 is too far. */
10710 struct elf32_arm_stub_hash_entry *stub_entry;
10711 struct elf32_arm_link_hash_entry *hash;
10712
10713 hash = (struct elf32_arm_link_hash_entry *) h;
10714
10715 stub_type = arm_type_of_stub (info, input_section, rel,
10716 st_type, &branch_type,
10717 hash, value, sym_sec,
10718 input_bfd, sym_name);
10719
10720 if (stub_type != arm_stub_none)
10721 {
10722 /* The target is out of reach or we are changing modes, so
10723 redirect the branch to the local stub for this
10724 function. */
10725 stub_entry = elf32_arm_get_stub_entry (input_section,
10726 sym_sec, h,
10727 rel, globals,
10728 stub_type);
10729 if (stub_entry != NULL)
10730 {
10731 value = (stub_entry->stub_offset
10732 + stub_entry->stub_sec->output_offset
10733 + stub_entry->stub_sec->output_section->vma);
10734
10735 if (plt_offset != (bfd_vma) -1)
10736 *unresolved_reloc_p = FALSE;
10737 }
10738
10739 /* If this call becomes a call to Arm, force BLX. */
10740 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
10741 {
10742 if ((stub_entry
10743 && !arm_stub_is_thumb (stub_entry->stub_type))
10744 || branch_type != ST_BRANCH_TO_THUMB)
10745 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10746 }
10747 }
10748 }
10749
10750 /* Handle calls via the PLT. */
10751 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
10752 {
10753 value = (splt->output_section->vma
10754 + splt->output_offset
10755 + plt_offset);
10756
10757 if (globals->use_blx
10758 && r_type == R_ARM_THM_CALL
10759 && ! using_thumb_only (globals))
10760 {
10761 /* If the Thumb BLX instruction is available, convert
10762 the BL to a BLX instruction to call the ARM-mode
10763 PLT entry. */
10764 lower_insn = (lower_insn & ~0x1000) | 0x0800;
10765 branch_type = ST_BRANCH_TO_ARM;
10766 }
10767 else
10768 {
10769 if (! using_thumb_only (globals))
10770 /* Target the Thumb stub before the ARM PLT entry. */
10771 value -= PLT_THUMB_STUB_SIZE;
10772 branch_type = ST_BRANCH_TO_THUMB;
10773 }
10774 *unresolved_reloc_p = FALSE;
10775 }
10776
10777 relocation = value + signed_addend;
10778
10779 relocation -= (input_section->output_section->vma
10780 + input_section->output_offset
10781 + rel->r_offset);
10782
10783 check = relocation >> howto->rightshift;
10784
10785 /* If this is a signed value, the rightshift just dropped
10786 leading 1 bits (assuming twos complement). */
10787 if ((bfd_signed_vma) relocation >= 0)
10788 signed_check = check;
10789 else
10790 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
10791
10792 /* Calculate the permissable maximum and minimum values for
10793 this relocation according to whether we're relocating for
10794 Thumb-2 or not. */
10795 bitsize = howto->bitsize;
10796 if (!thumb2_bl)
10797 bitsize -= 2;
10798 reloc_signed_max = (1 << (bitsize - 1)) - 1;
10799 reloc_signed_min = ~reloc_signed_max;
10800
10801 /* Assumes two's complement. */
10802 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10803 overflow = TRUE;
10804
10805 if ((lower_insn & 0x5000) == 0x4000)
10806 /* For a BLX instruction, make sure that the relocation is rounded up
10807 to a word boundary. This follows the semantics of the instruction
10808 which specifies that bit 1 of the target address will come from bit
10809 1 of the base address. */
10810 relocation = (relocation + 2) & ~ 3;
10811
10812 /* Put RELOCATION back into the insn. Assumes two's complement.
10813 We use the Thumb-2 encoding, which is safe even if dealing with
10814 a Thumb-1 instruction by virtue of our overflow check above. */
10815 reloc_sign = (signed_check < 0) ? 1 : 0;
10816 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
10817 | ((relocation >> 12) & 0x3ff)
10818 | (reloc_sign << 10);
10819 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
10820 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
10821 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
10822 | ((relocation >> 1) & 0x7ff);
10823
10824 /* Put the relocated value back in the object file: */
10825 bfd_put_16 (input_bfd, upper_insn, hit_data);
10826 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10827
10828 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10829 }
10830 break;
10831
10832 case R_ARM_THM_JUMP19:
10833 /* Thumb32 conditional branch instruction. */
10834 {
10835 bfd_vma relocation;
10836 bfd_boolean overflow = FALSE;
10837 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
10838 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
10839 bfd_signed_vma reloc_signed_max = 0xffffe;
10840 bfd_signed_vma reloc_signed_min = -0x100000;
10841 bfd_signed_vma signed_check;
10842 enum elf32_arm_stub_type stub_type = arm_stub_none;
10843 struct elf32_arm_stub_hash_entry *stub_entry;
10844 struct elf32_arm_link_hash_entry *hash;
10845
10846 /* Need to refetch the addend, reconstruct the top three bits,
10847 and squish the two 11 bit pieces together. */
10848 if (globals->use_rel)
10849 {
10850 bfd_vma S = (upper_insn & 0x0400) >> 10;
10851 bfd_vma upper = (upper_insn & 0x003f);
10852 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
10853 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
10854 bfd_vma lower = (lower_insn & 0x07ff);
10855
10856 upper |= J1 << 6;
10857 upper |= J2 << 7;
10858 upper |= (!S) << 8;
10859 upper -= 0x0100; /* Sign extend. */
10860
10861 addend = (upper << 12) | (lower << 1);
10862 signed_addend = addend;
10863 }
10864
10865 /* Handle calls via the PLT. */
10866 if (plt_offset != (bfd_vma) -1)
10867 {
10868 value = (splt->output_section->vma
10869 + splt->output_offset
10870 + plt_offset);
10871 /* Target the Thumb stub before the ARM PLT entry. */
10872 value -= PLT_THUMB_STUB_SIZE;
10873 *unresolved_reloc_p = FALSE;
10874 }
10875
10876 hash = (struct elf32_arm_link_hash_entry *)h;
10877
10878 stub_type = arm_type_of_stub (info, input_section, rel,
10879 st_type, &branch_type,
10880 hash, value, sym_sec,
10881 input_bfd, sym_name);
10882 if (stub_type != arm_stub_none)
10883 {
10884 stub_entry = elf32_arm_get_stub_entry (input_section,
10885 sym_sec, h,
10886 rel, globals,
10887 stub_type);
10888 if (stub_entry != NULL)
10889 {
10890 value = (stub_entry->stub_offset
10891 + stub_entry->stub_sec->output_offset
10892 + stub_entry->stub_sec->output_section->vma);
10893 }
10894 }
10895
10896 relocation = value + signed_addend;
10897 relocation -= (input_section->output_section->vma
10898 + input_section->output_offset
10899 + rel->r_offset);
10900 signed_check = (bfd_signed_vma) relocation;
10901
10902 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10903 overflow = TRUE;
10904
10905 /* Put RELOCATION back into the insn. */
10906 {
10907 bfd_vma S = (relocation & 0x00100000) >> 20;
10908 bfd_vma J2 = (relocation & 0x00080000) >> 19;
10909 bfd_vma J1 = (relocation & 0x00040000) >> 18;
10910 bfd_vma hi = (relocation & 0x0003f000) >> 12;
10911 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
10912
10913 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
10914 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
10915 }
10916
10917 /* Put the relocated value back in the object file: */
10918 bfd_put_16 (input_bfd, upper_insn, hit_data);
10919 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
10920
10921 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
10922 }
10923
10924 case R_ARM_THM_JUMP11:
10925 case R_ARM_THM_JUMP8:
10926 case R_ARM_THM_JUMP6:
10927 /* Thumb B (branch) instruction). */
10928 {
10929 bfd_signed_vma relocation;
10930 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
10931 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
10932 bfd_signed_vma signed_check;
10933
10934 /* CZB cannot jump backward. */
10935 if (r_type == R_ARM_THM_JUMP6)
10936 reloc_signed_min = 0;
10937
10938 if (globals->use_rel)
10939 {
10940 /* Need to refetch addend. */
10941 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
10942 if (addend & ((howto->src_mask + 1) >> 1))
10943 {
10944 signed_addend = -1;
10945 signed_addend &= ~ howto->src_mask;
10946 signed_addend |= addend;
10947 }
10948 else
10949 signed_addend = addend;
10950 /* The value in the insn has been right shifted. We need to
10951 undo this, so that we can perform the address calculation
10952 in terms of bytes. */
10953 signed_addend <<= howto->rightshift;
10954 }
10955 relocation = value + signed_addend;
10956
10957 relocation -= (input_section->output_section->vma
10958 + input_section->output_offset
10959 + rel->r_offset);
10960
10961 relocation >>= howto->rightshift;
10962 signed_check = relocation;
10963
10964 if (r_type == R_ARM_THM_JUMP6)
10965 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
10966 else
10967 relocation &= howto->dst_mask;
10968 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
10969
10970 bfd_put_16 (input_bfd, relocation, hit_data);
10971
10972 /* Assumes two's complement. */
10973 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
10974 return bfd_reloc_overflow;
10975
10976 return bfd_reloc_ok;
10977 }
10978
10979 case R_ARM_ALU_PCREL7_0:
10980 case R_ARM_ALU_PCREL15_8:
10981 case R_ARM_ALU_PCREL23_15:
10982 {
10983 bfd_vma insn;
10984 bfd_vma relocation;
10985
10986 insn = bfd_get_32 (input_bfd, hit_data);
10987 if (globals->use_rel)
10988 {
10989 /* Extract the addend. */
10990 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
10991 signed_addend = addend;
10992 }
10993 relocation = value + signed_addend;
10994
10995 relocation -= (input_section->output_section->vma
10996 + input_section->output_offset
10997 + rel->r_offset);
10998 insn = (insn & ~0xfff)
10999 | ((howto->bitpos << 7) & 0xf00)
11000 | ((relocation >> howto->bitpos) & 0xff);
11001 bfd_put_32 (input_bfd, value, hit_data);
11002 }
11003 return bfd_reloc_ok;
11004
11005 case R_ARM_GNU_VTINHERIT:
11006 case R_ARM_GNU_VTENTRY:
11007 return bfd_reloc_ok;
11008
11009 case R_ARM_GOTOFF32:
11010 /* Relocation is relative to the start of the
11011 global offset table. */
11012
11013 BFD_ASSERT (sgot != NULL);
11014 if (sgot == NULL)
11015 return bfd_reloc_notsupported;
11016
11017 /* If we are addressing a Thumb function, we need to adjust the
11018 address by one, so that attempts to call the function pointer will
11019 correctly interpret it as Thumb code. */
11020 if (branch_type == ST_BRANCH_TO_THUMB)
11021 value += 1;
11022
11023 /* Note that sgot->output_offset is not involved in this
11024 calculation. We always want the start of .got. If we
11025 define _GLOBAL_OFFSET_TABLE in a different way, as is
11026 permitted by the ABI, we might have to change this
11027 calculation. */
11028 value -= sgot->output_section->vma;
11029 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11030 contents, rel->r_offset, value,
11031 rel->r_addend);
11032
11033 case R_ARM_GOTPC:
11034 /* Use global offset table as symbol value. */
11035 BFD_ASSERT (sgot != NULL);
11036
11037 if (sgot == NULL)
11038 return bfd_reloc_notsupported;
11039
11040 *unresolved_reloc_p = FALSE;
11041 value = sgot->output_section->vma;
11042 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11043 contents, rel->r_offset, value,
11044 rel->r_addend);
11045
11046 case R_ARM_GOT32:
11047 case R_ARM_GOT_PREL:
11048 /* Relocation is to the entry for this symbol in the
11049 global offset table. */
11050 if (sgot == NULL)
11051 return bfd_reloc_notsupported;
11052
11053 if (dynreloc_st_type == STT_GNU_IFUNC
11054 && plt_offset != (bfd_vma) -1
11055 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
11056 {
11057 /* We have a relocation against a locally-binding STT_GNU_IFUNC
11058 symbol, and the relocation resolves directly to the runtime
11059 target rather than to the .iplt entry. This means that any
11060 .got entry would be the same value as the .igot.plt entry,
11061 so there's no point creating both. */
11062 sgot = globals->root.igotplt;
11063 value = sgot->output_offset + gotplt_offset;
11064 }
11065 else if (h != NULL)
11066 {
11067 bfd_vma off;
11068
11069 off = h->got.offset;
11070 BFD_ASSERT (off != (bfd_vma) -1);
11071 if ((off & 1) != 0)
11072 {
11073 /* We have already processsed one GOT relocation against
11074 this symbol. */
11075 off &= ~1;
11076 if (globals->root.dynamic_sections_created
11077 && !SYMBOL_REFERENCES_LOCAL (info, h))
11078 *unresolved_reloc_p = FALSE;
11079 }
11080 else
11081 {
11082 Elf_Internal_Rela outrel;
11083
11084 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
11085 {
11086 /* If the symbol doesn't resolve locally in a static
11087 object, we have an undefined reference. If the
11088 symbol doesn't resolve locally in a dynamic object,
11089 it should be resolved by the dynamic linker. */
11090 if (globals->root.dynamic_sections_created)
11091 {
11092 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
11093 *unresolved_reloc_p = FALSE;
11094 }
11095 else
11096 outrel.r_info = 0;
11097 outrel.r_addend = 0;
11098 }
11099 else
11100 {
11101 if (dynreloc_st_type == STT_GNU_IFUNC)
11102 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11103 else if (bfd_link_pic (info)
11104 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11105 || h->root.type != bfd_link_hash_undefweak))
11106 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11107 else
11108 outrel.r_info = 0;
11109 outrel.r_addend = dynreloc_value;
11110 }
11111
11112 /* The GOT entry is initialized to zero by default.
11113 See if we should install a different value. */
11114 if (outrel.r_addend != 0
11115 && (outrel.r_info == 0 || globals->use_rel))
11116 {
11117 bfd_put_32 (output_bfd, outrel.r_addend,
11118 sgot->contents + off);
11119 outrel.r_addend = 0;
11120 }
11121
11122 if (outrel.r_info != 0)
11123 {
11124 outrel.r_offset = (sgot->output_section->vma
11125 + sgot->output_offset
11126 + off);
11127 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11128 }
11129 h->got.offset |= 1;
11130 }
11131 value = sgot->output_offset + off;
11132 }
11133 else
11134 {
11135 bfd_vma off;
11136
11137 BFD_ASSERT (local_got_offsets != NULL
11138 && local_got_offsets[r_symndx] != (bfd_vma) -1);
11139
11140 off = local_got_offsets[r_symndx];
11141
11142 /* The offset must always be a multiple of 4. We use the
11143 least significant bit to record whether we have already
11144 generated the necessary reloc. */
11145 if ((off & 1) != 0)
11146 off &= ~1;
11147 else
11148 {
11149 if (globals->use_rel)
11150 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
11151
11152 if (bfd_link_pic (info) || dynreloc_st_type == STT_GNU_IFUNC)
11153 {
11154 Elf_Internal_Rela outrel;
11155
11156 outrel.r_addend = addend + dynreloc_value;
11157 outrel.r_offset = (sgot->output_section->vma
11158 + sgot->output_offset
11159 + off);
11160 if (dynreloc_st_type == STT_GNU_IFUNC)
11161 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
11162 else
11163 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
11164 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11165 }
11166
11167 local_got_offsets[r_symndx] |= 1;
11168 }
11169
11170 value = sgot->output_offset + off;
11171 }
11172 if (r_type != R_ARM_GOT32)
11173 value += sgot->output_section->vma;
11174
11175 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11176 contents, rel->r_offset, value,
11177 rel->r_addend);
11178
11179 case R_ARM_TLS_LDO32:
11180 value = value - dtpoff_base (info);
11181
11182 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11183 contents, rel->r_offset, value,
11184 rel->r_addend);
11185
11186 case R_ARM_TLS_LDM32:
11187 {
11188 bfd_vma off;
11189
11190 if (sgot == NULL)
11191 abort ();
11192
11193 off = globals->tls_ldm_got.offset;
11194
11195 if ((off & 1) != 0)
11196 off &= ~1;
11197 else
11198 {
11199 /* If we don't know the module number, create a relocation
11200 for it. */
11201 if (bfd_link_pic (info))
11202 {
11203 Elf_Internal_Rela outrel;
11204
11205 if (srelgot == NULL)
11206 abort ();
11207
11208 outrel.r_addend = 0;
11209 outrel.r_offset = (sgot->output_section->vma
11210 + sgot->output_offset + off);
11211 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
11212
11213 if (globals->use_rel)
11214 bfd_put_32 (output_bfd, outrel.r_addend,
11215 sgot->contents + off);
11216
11217 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11218 }
11219 else
11220 bfd_put_32 (output_bfd, 1, sgot->contents + off);
11221
11222 globals->tls_ldm_got.offset |= 1;
11223 }
11224
11225 value = sgot->output_section->vma + sgot->output_offset + off
11226 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
11227
11228 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11229 contents, rel->r_offset, value,
11230 rel->r_addend);
11231 }
11232
11233 case R_ARM_TLS_CALL:
11234 case R_ARM_THM_TLS_CALL:
11235 case R_ARM_TLS_GD32:
11236 case R_ARM_TLS_IE32:
11237 case R_ARM_TLS_GOTDESC:
11238 case R_ARM_TLS_DESCSEQ:
11239 case R_ARM_THM_TLS_DESCSEQ:
11240 {
11241 bfd_vma off, offplt;
11242 int indx = 0;
11243 char tls_type;
11244
11245 BFD_ASSERT (sgot != NULL);
11246
11247 if (h != NULL)
11248 {
11249 bfd_boolean dyn;
11250 dyn = globals->root.dynamic_sections_created;
11251 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
11252 bfd_link_pic (info),
11253 h)
11254 && (!bfd_link_pic (info)
11255 || !SYMBOL_REFERENCES_LOCAL (info, h)))
11256 {
11257 *unresolved_reloc_p = FALSE;
11258 indx = h->dynindx;
11259 }
11260 off = h->got.offset;
11261 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
11262 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
11263 }
11264 else
11265 {
11266 BFD_ASSERT (local_got_offsets != NULL);
11267 off = local_got_offsets[r_symndx];
11268 offplt = local_tlsdesc_gotents[r_symndx];
11269 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
11270 }
11271
11272 /* Linker relaxations happens from one of the
11273 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
11274 if (ELF32_R_TYPE(rel->r_info) != r_type)
11275 tls_type = GOT_TLS_IE;
11276
11277 BFD_ASSERT (tls_type != GOT_UNKNOWN);
11278
11279 if ((off & 1) != 0)
11280 off &= ~1;
11281 else
11282 {
11283 bfd_boolean need_relocs = FALSE;
11284 Elf_Internal_Rela outrel;
11285 int cur_off = off;
11286
11287 /* The GOT entries have not been initialized yet. Do it
11288 now, and emit any relocations. If both an IE GOT and a
11289 GD GOT are necessary, we emit the GD first. */
11290
11291 if ((bfd_link_pic (info) || indx != 0)
11292 && (h == NULL
11293 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
11294 || h->root.type != bfd_link_hash_undefweak))
11295 {
11296 need_relocs = TRUE;
11297 BFD_ASSERT (srelgot != NULL);
11298 }
11299
11300 if (tls_type & GOT_TLS_GDESC)
11301 {
11302 bfd_byte *loc;
11303
11304 /* We should have relaxed, unless this is an undefined
11305 weak symbol. */
11306 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
11307 || bfd_link_pic (info));
11308 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
11309 <= globals->root.sgotplt->size);
11310
11311 outrel.r_addend = 0;
11312 outrel.r_offset = (globals->root.sgotplt->output_section->vma
11313 + globals->root.sgotplt->output_offset
11314 + offplt
11315 + globals->sgotplt_jump_table_size);
11316
11317 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
11318 sreloc = globals->root.srelplt;
11319 loc = sreloc->contents;
11320 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
11321 BFD_ASSERT (loc + RELOC_SIZE (globals)
11322 <= sreloc->contents + sreloc->size);
11323
11324 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
11325
11326 /* For globals, the first word in the relocation gets
11327 the relocation index and the top bit set, or zero,
11328 if we're binding now. For locals, it gets the
11329 symbol's offset in the tls section. */
11330 bfd_put_32 (output_bfd,
11331 !h ? value - elf_hash_table (info)->tls_sec->vma
11332 : info->flags & DF_BIND_NOW ? 0
11333 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
11334 globals->root.sgotplt->contents + offplt
11335 + globals->sgotplt_jump_table_size);
11336
11337 /* Second word in the relocation is always zero. */
11338 bfd_put_32 (output_bfd, 0,
11339 globals->root.sgotplt->contents + offplt
11340 + globals->sgotplt_jump_table_size + 4);
11341 }
11342 if (tls_type & GOT_TLS_GD)
11343 {
11344 if (need_relocs)
11345 {
11346 outrel.r_addend = 0;
11347 outrel.r_offset = (sgot->output_section->vma
11348 + sgot->output_offset
11349 + cur_off);
11350 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
11351
11352 if (globals->use_rel)
11353 bfd_put_32 (output_bfd, outrel.r_addend,
11354 sgot->contents + cur_off);
11355
11356 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11357
11358 if (indx == 0)
11359 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11360 sgot->contents + cur_off + 4);
11361 else
11362 {
11363 outrel.r_addend = 0;
11364 outrel.r_info = ELF32_R_INFO (indx,
11365 R_ARM_TLS_DTPOFF32);
11366 outrel.r_offset += 4;
11367
11368 if (globals->use_rel)
11369 bfd_put_32 (output_bfd, outrel.r_addend,
11370 sgot->contents + cur_off + 4);
11371
11372 elf32_arm_add_dynreloc (output_bfd, info,
11373 srelgot, &outrel);
11374 }
11375 }
11376 else
11377 {
11378 /* If we are not emitting relocations for a
11379 general dynamic reference, then we must be in a
11380 static link or an executable link with the
11381 symbol binding locally. Mark it as belonging
11382 to module 1, the executable. */
11383 bfd_put_32 (output_bfd, 1,
11384 sgot->contents + cur_off);
11385 bfd_put_32 (output_bfd, value - dtpoff_base (info),
11386 sgot->contents + cur_off + 4);
11387 }
11388
11389 cur_off += 8;
11390 }
11391
11392 if (tls_type & GOT_TLS_IE)
11393 {
11394 if (need_relocs)
11395 {
11396 if (indx == 0)
11397 outrel.r_addend = value - dtpoff_base (info);
11398 else
11399 outrel.r_addend = 0;
11400 outrel.r_offset = (sgot->output_section->vma
11401 + sgot->output_offset
11402 + cur_off);
11403 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
11404
11405 if (globals->use_rel)
11406 bfd_put_32 (output_bfd, outrel.r_addend,
11407 sgot->contents + cur_off);
11408
11409 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
11410 }
11411 else
11412 bfd_put_32 (output_bfd, tpoff (info, value),
11413 sgot->contents + cur_off);
11414 cur_off += 4;
11415 }
11416
11417 if (h != NULL)
11418 h->got.offset |= 1;
11419 else
11420 local_got_offsets[r_symndx] |= 1;
11421 }
11422
11423 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
11424 off += 8;
11425 else if (tls_type & GOT_TLS_GDESC)
11426 off = offplt;
11427
11428 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
11429 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
11430 {
11431 bfd_signed_vma offset;
11432 /* TLS stubs are arm mode. The original symbol is a
11433 data object, so branch_type is bogus. */
11434 branch_type = ST_BRANCH_TO_ARM;
11435 enum elf32_arm_stub_type stub_type
11436 = arm_type_of_stub (info, input_section, rel,
11437 st_type, &branch_type,
11438 (struct elf32_arm_link_hash_entry *)h,
11439 globals->tls_trampoline, globals->root.splt,
11440 input_bfd, sym_name);
11441
11442 if (stub_type != arm_stub_none)
11443 {
11444 struct elf32_arm_stub_hash_entry *stub_entry
11445 = elf32_arm_get_stub_entry
11446 (input_section, globals->root.splt, 0, rel,
11447 globals, stub_type);
11448 offset = (stub_entry->stub_offset
11449 + stub_entry->stub_sec->output_offset
11450 + stub_entry->stub_sec->output_section->vma);
11451 }
11452 else
11453 offset = (globals->root.splt->output_section->vma
11454 + globals->root.splt->output_offset
11455 + globals->tls_trampoline);
11456
11457 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
11458 {
11459 unsigned long inst;
11460
11461 offset -= (input_section->output_section->vma
11462 + input_section->output_offset
11463 + rel->r_offset + 8);
11464
11465 inst = offset >> 2;
11466 inst &= 0x00ffffff;
11467 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
11468 }
11469 else
11470 {
11471 /* Thumb blx encodes the offset in a complicated
11472 fashion. */
11473 unsigned upper_insn, lower_insn;
11474 unsigned neg;
11475
11476 offset -= (input_section->output_section->vma
11477 + input_section->output_offset
11478 + rel->r_offset + 4);
11479
11480 if (stub_type != arm_stub_none
11481 && arm_stub_is_thumb (stub_type))
11482 {
11483 lower_insn = 0xd000;
11484 }
11485 else
11486 {
11487 lower_insn = 0xc000;
11488 /* Round up the offset to a word boundary. */
11489 offset = (offset + 2) & ~2;
11490 }
11491
11492 neg = offset < 0;
11493 upper_insn = (0xf000
11494 | ((offset >> 12) & 0x3ff)
11495 | (neg << 10));
11496 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
11497 | (((!((offset >> 22) & 1)) ^ neg) << 11)
11498 | ((offset >> 1) & 0x7ff);
11499 bfd_put_16 (input_bfd, upper_insn, hit_data);
11500 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
11501 return bfd_reloc_ok;
11502 }
11503 }
11504 /* These relocations needs special care, as besides the fact
11505 they point somewhere in .gotplt, the addend must be
11506 adjusted accordingly depending on the type of instruction
11507 we refer to. */
11508 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
11509 {
11510 unsigned long data, insn;
11511 unsigned thumb;
11512
11513 data = bfd_get_32 (input_bfd, hit_data);
11514 thumb = data & 1;
11515 data &= ~1u;
11516
11517 if (thumb)
11518 {
11519 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
11520 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
11521 insn = (insn << 16)
11522 | bfd_get_16 (input_bfd,
11523 contents + rel->r_offset - data + 2);
11524 if ((insn & 0xf800c000) == 0xf000c000)
11525 /* bl/blx */
11526 value = -6;
11527 else if ((insn & 0xffffff00) == 0x4400)
11528 /* add */
11529 value = -5;
11530 else
11531 {
11532 _bfd_error_handler
11533 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
11534 input_bfd, input_section,
11535 (unsigned long)rel->r_offset, insn);
11536 return bfd_reloc_notsupported;
11537 }
11538 }
11539 else
11540 {
11541 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
11542
11543 switch (insn >> 24)
11544 {
11545 case 0xeb: /* bl */
11546 case 0xfa: /* blx */
11547 value = -4;
11548 break;
11549
11550 case 0xe0: /* add */
11551 value = -8;
11552 break;
11553
11554 default:
11555 _bfd_error_handler
11556 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
11557 input_bfd, input_section,
11558 (unsigned long)rel->r_offset, insn);
11559 return bfd_reloc_notsupported;
11560 }
11561 }
11562
11563 value += ((globals->root.sgotplt->output_section->vma
11564 + globals->root.sgotplt->output_offset + off)
11565 - (input_section->output_section->vma
11566 + input_section->output_offset
11567 + rel->r_offset)
11568 + globals->sgotplt_jump_table_size);
11569 }
11570 else
11571 value = ((globals->root.sgot->output_section->vma
11572 + globals->root.sgot->output_offset + off)
11573 - (input_section->output_section->vma
11574 + input_section->output_offset + rel->r_offset));
11575
11576 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11577 contents, rel->r_offset, value,
11578 rel->r_addend);
11579 }
11580
11581 case R_ARM_TLS_LE32:
11582 if (bfd_link_dll (info))
11583 {
11584 _bfd_error_handler
11585 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
11586 input_bfd, input_section,
11587 (long) rel->r_offset, howto->name);
11588 return bfd_reloc_notsupported;
11589 }
11590 else
11591 value = tpoff (info, value);
11592
11593 return _bfd_final_link_relocate (howto, input_bfd, input_section,
11594 contents, rel->r_offset, value,
11595 rel->r_addend);
11596
11597 case R_ARM_V4BX:
11598 if (globals->fix_v4bx)
11599 {
11600 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11601
11602 /* Ensure that we have a BX instruction. */
11603 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
11604
11605 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
11606 {
11607 /* Branch to veneer. */
11608 bfd_vma glue_addr;
11609 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
11610 glue_addr -= input_section->output_section->vma
11611 + input_section->output_offset
11612 + rel->r_offset + 8;
11613 insn = (insn & 0xf0000000) | 0x0a000000
11614 | ((glue_addr >> 2) & 0x00ffffff);
11615 }
11616 else
11617 {
11618 /* Preserve Rm (lowest four bits) and the condition code
11619 (highest four bits). Other bits encode MOV PC,Rm. */
11620 insn = (insn & 0xf000000f) | 0x01a0f000;
11621 }
11622
11623 bfd_put_32 (input_bfd, insn, hit_data);
11624 }
11625 return bfd_reloc_ok;
11626
11627 case R_ARM_MOVW_ABS_NC:
11628 case R_ARM_MOVT_ABS:
11629 case R_ARM_MOVW_PREL_NC:
11630 case R_ARM_MOVT_PREL:
11631 /* Until we properly support segment-base-relative addressing then
11632 we assume the segment base to be zero, as for the group relocations.
11633 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
11634 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
11635 case R_ARM_MOVW_BREL_NC:
11636 case R_ARM_MOVW_BREL:
11637 case R_ARM_MOVT_BREL:
11638 {
11639 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11640
11641 if (globals->use_rel)
11642 {
11643 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
11644 signed_addend = (addend ^ 0x8000) - 0x8000;
11645 }
11646
11647 value += signed_addend;
11648
11649 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
11650 value -= (input_section->output_section->vma
11651 + input_section->output_offset + rel->r_offset);
11652
11653 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
11654 return bfd_reloc_overflow;
11655
11656 if (branch_type == ST_BRANCH_TO_THUMB)
11657 value |= 1;
11658
11659 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
11660 || r_type == R_ARM_MOVT_BREL)
11661 value >>= 16;
11662
11663 insn &= 0xfff0f000;
11664 insn |= value & 0xfff;
11665 insn |= (value & 0xf000) << 4;
11666 bfd_put_32 (input_bfd, insn, hit_data);
11667 }
11668 return bfd_reloc_ok;
11669
11670 case R_ARM_THM_MOVW_ABS_NC:
11671 case R_ARM_THM_MOVT_ABS:
11672 case R_ARM_THM_MOVW_PREL_NC:
11673 case R_ARM_THM_MOVT_PREL:
11674 /* Until we properly support segment-base-relative addressing then
11675 we assume the segment base to be zero, as for the above relocations.
11676 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
11677 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
11678 as R_ARM_THM_MOVT_ABS. */
11679 case R_ARM_THM_MOVW_BREL_NC:
11680 case R_ARM_THM_MOVW_BREL:
11681 case R_ARM_THM_MOVT_BREL:
11682 {
11683 bfd_vma insn;
11684
11685 insn = bfd_get_16 (input_bfd, hit_data) << 16;
11686 insn |= bfd_get_16 (input_bfd, hit_data + 2);
11687
11688 if (globals->use_rel)
11689 {
11690 addend = ((insn >> 4) & 0xf000)
11691 | ((insn >> 15) & 0x0800)
11692 | ((insn >> 4) & 0x0700)
11693 | (insn & 0x00ff);
11694 signed_addend = (addend ^ 0x8000) - 0x8000;
11695 }
11696
11697 value += signed_addend;
11698
11699 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
11700 value -= (input_section->output_section->vma
11701 + input_section->output_offset + rel->r_offset);
11702
11703 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
11704 return bfd_reloc_overflow;
11705
11706 if (branch_type == ST_BRANCH_TO_THUMB)
11707 value |= 1;
11708
11709 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
11710 || r_type == R_ARM_THM_MOVT_BREL)
11711 value >>= 16;
11712
11713 insn &= 0xfbf08f00;
11714 insn |= (value & 0xf000) << 4;
11715 insn |= (value & 0x0800) << 15;
11716 insn |= (value & 0x0700) << 4;
11717 insn |= (value & 0x00ff);
11718
11719 bfd_put_16 (input_bfd, insn >> 16, hit_data);
11720 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
11721 }
11722 return bfd_reloc_ok;
11723
11724 case R_ARM_ALU_PC_G0_NC:
11725 case R_ARM_ALU_PC_G1_NC:
11726 case R_ARM_ALU_PC_G0:
11727 case R_ARM_ALU_PC_G1:
11728 case R_ARM_ALU_PC_G2:
11729 case R_ARM_ALU_SB_G0_NC:
11730 case R_ARM_ALU_SB_G1_NC:
11731 case R_ARM_ALU_SB_G0:
11732 case R_ARM_ALU_SB_G1:
11733 case R_ARM_ALU_SB_G2:
11734 {
11735 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11736 bfd_vma pc = input_section->output_section->vma
11737 + input_section->output_offset + rel->r_offset;
11738 /* sb is the origin of the *segment* containing the symbol. */
11739 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11740 bfd_vma residual;
11741 bfd_vma g_n;
11742 bfd_signed_vma signed_value;
11743 int group = 0;
11744
11745 /* Determine which group of bits to select. */
11746 switch (r_type)
11747 {
11748 case R_ARM_ALU_PC_G0_NC:
11749 case R_ARM_ALU_PC_G0:
11750 case R_ARM_ALU_SB_G0_NC:
11751 case R_ARM_ALU_SB_G0:
11752 group = 0;
11753 break;
11754
11755 case R_ARM_ALU_PC_G1_NC:
11756 case R_ARM_ALU_PC_G1:
11757 case R_ARM_ALU_SB_G1_NC:
11758 case R_ARM_ALU_SB_G1:
11759 group = 1;
11760 break;
11761
11762 case R_ARM_ALU_PC_G2:
11763 case R_ARM_ALU_SB_G2:
11764 group = 2;
11765 break;
11766
11767 default:
11768 abort ();
11769 }
11770
11771 /* If REL, extract the addend from the insn. If RELA, it will
11772 have already been fetched for us. */
11773 if (globals->use_rel)
11774 {
11775 int negative;
11776 bfd_vma constant = insn & 0xff;
11777 bfd_vma rotation = (insn & 0xf00) >> 8;
11778
11779 if (rotation == 0)
11780 signed_addend = constant;
11781 else
11782 {
11783 /* Compensate for the fact that in the instruction, the
11784 rotation is stored in multiples of 2 bits. */
11785 rotation *= 2;
11786
11787 /* Rotate "constant" right by "rotation" bits. */
11788 signed_addend = (constant >> rotation) |
11789 (constant << (8 * sizeof (bfd_vma) - rotation));
11790 }
11791
11792 /* Determine if the instruction is an ADD or a SUB.
11793 (For REL, this determines the sign of the addend.) */
11794 negative = identify_add_or_sub (insn);
11795 if (negative == 0)
11796 {
11797 _bfd_error_handler
11798 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
11799 input_bfd, input_section,
11800 (long) rel->r_offset, howto->name);
11801 return bfd_reloc_overflow;
11802 }
11803
11804 signed_addend *= negative;
11805 }
11806
11807 /* Compute the value (X) to go in the place. */
11808 if (r_type == R_ARM_ALU_PC_G0_NC
11809 || r_type == R_ARM_ALU_PC_G1_NC
11810 || r_type == R_ARM_ALU_PC_G0
11811 || r_type == R_ARM_ALU_PC_G1
11812 || r_type == R_ARM_ALU_PC_G2)
11813 /* PC relative. */
11814 signed_value = value - pc + signed_addend;
11815 else
11816 /* Section base relative. */
11817 signed_value = value - sb + signed_addend;
11818
11819 /* If the target symbol is a Thumb function, then set the
11820 Thumb bit in the address. */
11821 if (branch_type == ST_BRANCH_TO_THUMB)
11822 signed_value |= 1;
11823
11824 /* Calculate the value of the relevant G_n, in encoded
11825 constant-with-rotation format. */
11826 g_n = calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11827 group, &residual);
11828
11829 /* Check for overflow if required. */
11830 if ((r_type == R_ARM_ALU_PC_G0
11831 || r_type == R_ARM_ALU_PC_G1
11832 || r_type == R_ARM_ALU_PC_G2
11833 || r_type == R_ARM_ALU_SB_G0
11834 || r_type == R_ARM_ALU_SB_G1
11835 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
11836 {
11837 _bfd_error_handler
11838 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11839 input_bfd, input_section,
11840 (long) rel->r_offset, signed_value < 0 ? - signed_value : signed_value,
11841 howto->name);
11842 return bfd_reloc_overflow;
11843 }
11844
11845 /* Mask out the value and the ADD/SUB part of the opcode; take care
11846 not to destroy the S bit. */
11847 insn &= 0xff1ff000;
11848
11849 /* Set the opcode according to whether the value to go in the
11850 place is negative. */
11851 if (signed_value < 0)
11852 insn |= 1 << 22;
11853 else
11854 insn |= 1 << 23;
11855
11856 /* Encode the offset. */
11857 insn |= g_n;
11858
11859 bfd_put_32 (input_bfd, insn, hit_data);
11860 }
11861 return bfd_reloc_ok;
11862
11863 case R_ARM_LDR_PC_G0:
11864 case R_ARM_LDR_PC_G1:
11865 case R_ARM_LDR_PC_G2:
11866 case R_ARM_LDR_SB_G0:
11867 case R_ARM_LDR_SB_G1:
11868 case R_ARM_LDR_SB_G2:
11869 {
11870 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11871 bfd_vma pc = input_section->output_section->vma
11872 + input_section->output_offset + rel->r_offset;
11873 /* sb is the origin of the *segment* containing the symbol. */
11874 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11875 bfd_vma residual;
11876 bfd_signed_vma signed_value;
11877 int group = 0;
11878
11879 /* Determine which groups of bits to calculate. */
11880 switch (r_type)
11881 {
11882 case R_ARM_LDR_PC_G0:
11883 case R_ARM_LDR_SB_G0:
11884 group = 0;
11885 break;
11886
11887 case R_ARM_LDR_PC_G1:
11888 case R_ARM_LDR_SB_G1:
11889 group = 1;
11890 break;
11891
11892 case R_ARM_LDR_PC_G2:
11893 case R_ARM_LDR_SB_G2:
11894 group = 2;
11895 break;
11896
11897 default:
11898 abort ();
11899 }
11900
11901 /* If REL, extract the addend from the insn. If RELA, it will
11902 have already been fetched for us. */
11903 if (globals->use_rel)
11904 {
11905 int negative = (insn & (1 << 23)) ? 1 : -1;
11906 signed_addend = negative * (insn & 0xfff);
11907 }
11908
11909 /* Compute the value (X) to go in the place. */
11910 if (r_type == R_ARM_LDR_PC_G0
11911 || r_type == R_ARM_LDR_PC_G1
11912 || r_type == R_ARM_LDR_PC_G2)
11913 /* PC relative. */
11914 signed_value = value - pc + signed_addend;
11915 else
11916 /* Section base relative. */
11917 signed_value = value - sb + signed_addend;
11918
11919 /* Calculate the value of the relevant G_{n-1} to obtain
11920 the residual at that stage. */
11921 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
11922 group - 1, &residual);
11923
11924 /* Check for overflow. */
11925 if (residual >= 0x1000)
11926 {
11927 _bfd_error_handler
11928 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
11929 input_bfd, input_section,
11930 (long) rel->r_offset, labs (signed_value), howto->name);
11931 return bfd_reloc_overflow;
11932 }
11933
11934 /* Mask out the value and U bit. */
11935 insn &= 0xff7ff000;
11936
11937 /* Set the U bit if the value to go in the place is non-negative. */
11938 if (signed_value >= 0)
11939 insn |= 1 << 23;
11940
11941 /* Encode the offset. */
11942 insn |= residual;
11943
11944 bfd_put_32 (input_bfd, insn, hit_data);
11945 }
11946 return bfd_reloc_ok;
11947
11948 case R_ARM_LDRS_PC_G0:
11949 case R_ARM_LDRS_PC_G1:
11950 case R_ARM_LDRS_PC_G2:
11951 case R_ARM_LDRS_SB_G0:
11952 case R_ARM_LDRS_SB_G1:
11953 case R_ARM_LDRS_SB_G2:
11954 {
11955 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
11956 bfd_vma pc = input_section->output_section->vma
11957 + input_section->output_offset + rel->r_offset;
11958 /* sb is the origin of the *segment* containing the symbol. */
11959 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
11960 bfd_vma residual;
11961 bfd_signed_vma signed_value;
11962 int group = 0;
11963
11964 /* Determine which groups of bits to calculate. */
11965 switch (r_type)
11966 {
11967 case R_ARM_LDRS_PC_G0:
11968 case R_ARM_LDRS_SB_G0:
11969 group = 0;
11970 break;
11971
11972 case R_ARM_LDRS_PC_G1:
11973 case R_ARM_LDRS_SB_G1:
11974 group = 1;
11975 break;
11976
11977 case R_ARM_LDRS_PC_G2:
11978 case R_ARM_LDRS_SB_G2:
11979 group = 2;
11980 break;
11981
11982 default:
11983 abort ();
11984 }
11985
11986 /* If REL, extract the addend from the insn. If RELA, it will
11987 have already been fetched for us. */
11988 if (globals->use_rel)
11989 {
11990 int negative = (insn & (1 << 23)) ? 1 : -1;
11991 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
11992 }
11993
11994 /* Compute the value (X) to go in the place. */
11995 if (r_type == R_ARM_LDRS_PC_G0
11996 || r_type == R_ARM_LDRS_PC_G1
11997 || r_type == R_ARM_LDRS_PC_G2)
11998 /* PC relative. */
11999 signed_value = value - pc + signed_addend;
12000 else
12001 /* Section base relative. */
12002 signed_value = value - sb + signed_addend;
12003
12004 /* Calculate the value of the relevant G_{n-1} to obtain
12005 the residual at that stage. */
12006 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12007 group - 1, &residual);
12008
12009 /* Check for overflow. */
12010 if (residual >= 0x100)
12011 {
12012 _bfd_error_handler
12013 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12014 input_bfd, input_section,
12015 (long) rel->r_offset, labs (signed_value), howto->name);
12016 return bfd_reloc_overflow;
12017 }
12018
12019 /* Mask out the value and U bit. */
12020 insn &= 0xff7ff0f0;
12021
12022 /* Set the U bit if the value to go in the place is non-negative. */
12023 if (signed_value >= 0)
12024 insn |= 1 << 23;
12025
12026 /* Encode the offset. */
12027 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
12028
12029 bfd_put_32 (input_bfd, insn, hit_data);
12030 }
12031 return bfd_reloc_ok;
12032
12033 case R_ARM_LDC_PC_G0:
12034 case R_ARM_LDC_PC_G1:
12035 case R_ARM_LDC_PC_G2:
12036 case R_ARM_LDC_SB_G0:
12037 case R_ARM_LDC_SB_G1:
12038 case R_ARM_LDC_SB_G2:
12039 {
12040 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
12041 bfd_vma pc = input_section->output_section->vma
12042 + input_section->output_offset + rel->r_offset;
12043 /* sb is the origin of the *segment* containing the symbol. */
12044 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
12045 bfd_vma residual;
12046 bfd_signed_vma signed_value;
12047 int group = 0;
12048
12049 /* Determine which groups of bits to calculate. */
12050 switch (r_type)
12051 {
12052 case R_ARM_LDC_PC_G0:
12053 case R_ARM_LDC_SB_G0:
12054 group = 0;
12055 break;
12056
12057 case R_ARM_LDC_PC_G1:
12058 case R_ARM_LDC_SB_G1:
12059 group = 1;
12060 break;
12061
12062 case R_ARM_LDC_PC_G2:
12063 case R_ARM_LDC_SB_G2:
12064 group = 2;
12065 break;
12066
12067 default:
12068 abort ();
12069 }
12070
12071 /* If REL, extract the addend from the insn. If RELA, it will
12072 have already been fetched for us. */
12073 if (globals->use_rel)
12074 {
12075 int negative = (insn & (1 << 23)) ? 1 : -1;
12076 signed_addend = negative * ((insn & 0xff) << 2);
12077 }
12078
12079 /* Compute the value (X) to go in the place. */
12080 if (r_type == R_ARM_LDC_PC_G0
12081 || r_type == R_ARM_LDC_PC_G1
12082 || r_type == R_ARM_LDC_PC_G2)
12083 /* PC relative. */
12084 signed_value = value - pc + signed_addend;
12085 else
12086 /* Section base relative. */
12087 signed_value = value - sb + signed_addend;
12088
12089 /* Calculate the value of the relevant G_{n-1} to obtain
12090 the residual at that stage. */
12091 calculate_group_reloc_mask (signed_value < 0 ? - signed_value : signed_value,
12092 group - 1, &residual);
12093
12094 /* Check for overflow. (The absolute value to go in the place must be
12095 divisible by four and, after having been divided by four, must
12096 fit in eight bits.) */
12097 if ((residual & 0x3) != 0 || residual >= 0x400)
12098 {
12099 _bfd_error_handler
12100 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
12101 input_bfd, input_section,
12102 (long) rel->r_offset, labs (signed_value), howto->name);
12103 return bfd_reloc_overflow;
12104 }
12105
12106 /* Mask out the value and U bit. */
12107 insn &= 0xff7fff00;
12108
12109 /* Set the U bit if the value to go in the place is non-negative. */
12110 if (signed_value >= 0)
12111 insn |= 1 << 23;
12112
12113 /* Encode the offset. */
12114 insn |= residual >> 2;
12115
12116 bfd_put_32 (input_bfd, insn, hit_data);
12117 }
12118 return bfd_reloc_ok;
12119
12120 case R_ARM_THM_ALU_ABS_G0_NC:
12121 case R_ARM_THM_ALU_ABS_G1_NC:
12122 case R_ARM_THM_ALU_ABS_G2_NC:
12123 case R_ARM_THM_ALU_ABS_G3_NC:
12124 {
12125 const int shift_array[4] = {0, 8, 16, 24};
12126 bfd_vma insn = bfd_get_16 (input_bfd, hit_data);
12127 bfd_vma addr = value;
12128 int shift = shift_array[r_type - R_ARM_THM_ALU_ABS_G0_NC];
12129
12130 /* Compute address. */
12131 if (globals->use_rel)
12132 signed_addend = insn & 0xff;
12133 addr += signed_addend;
12134 if (branch_type == ST_BRANCH_TO_THUMB)
12135 addr |= 1;
12136 /* Clean imm8 insn. */
12137 insn &= 0xff00;
12138 /* And update with correct part of address. */
12139 insn |= (addr >> shift) & 0xff;
12140 /* Update insn. */
12141 bfd_put_16 (input_bfd, insn, hit_data);
12142 }
12143
12144 *unresolved_reloc_p = FALSE;
12145 return bfd_reloc_ok;
12146
12147 default:
12148 return bfd_reloc_notsupported;
12149 }
12150 }
12151
12152 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
12153 static void
12154 arm_add_to_rel (bfd * abfd,
12155 bfd_byte * address,
12156 reloc_howto_type * howto,
12157 bfd_signed_vma increment)
12158 {
12159 bfd_signed_vma addend;
12160
12161 if (howto->type == R_ARM_THM_CALL
12162 || howto->type == R_ARM_THM_JUMP24)
12163 {
12164 int upper_insn, lower_insn;
12165 int upper, lower;
12166
12167 upper_insn = bfd_get_16 (abfd, address);
12168 lower_insn = bfd_get_16 (abfd, address + 2);
12169 upper = upper_insn & 0x7ff;
12170 lower = lower_insn & 0x7ff;
12171
12172 addend = (upper << 12) | (lower << 1);
12173 addend += increment;
12174 addend >>= 1;
12175
12176 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
12177 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
12178
12179 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
12180 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
12181 }
12182 else
12183 {
12184 bfd_vma contents;
12185
12186 contents = bfd_get_32 (abfd, address);
12187
12188 /* Get the (signed) value from the instruction. */
12189 addend = contents & howto->src_mask;
12190 if (addend & ((howto->src_mask + 1) >> 1))
12191 {
12192 bfd_signed_vma mask;
12193
12194 mask = -1;
12195 mask &= ~ howto->src_mask;
12196 addend |= mask;
12197 }
12198
12199 /* Add in the increment, (which is a byte value). */
12200 switch (howto->type)
12201 {
12202 default:
12203 addend += increment;
12204 break;
12205
12206 case R_ARM_PC24:
12207 case R_ARM_PLT32:
12208 case R_ARM_CALL:
12209 case R_ARM_JUMP24:
12210 addend <<= howto->size;
12211 addend += increment;
12212
12213 /* Should we check for overflow here ? */
12214
12215 /* Drop any undesired bits. */
12216 addend >>= howto->rightshift;
12217 break;
12218 }
12219
12220 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
12221
12222 bfd_put_32 (abfd, contents, address);
12223 }
12224 }
12225
12226 #define IS_ARM_TLS_RELOC(R_TYPE) \
12227 ((R_TYPE) == R_ARM_TLS_GD32 \
12228 || (R_TYPE) == R_ARM_TLS_LDO32 \
12229 || (R_TYPE) == R_ARM_TLS_LDM32 \
12230 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
12231 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
12232 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
12233 || (R_TYPE) == R_ARM_TLS_LE32 \
12234 || (R_TYPE) == R_ARM_TLS_IE32 \
12235 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
12236
12237 /* Specific set of relocations for the gnu tls dialect. */
12238 #define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
12239 ((R_TYPE) == R_ARM_TLS_GOTDESC \
12240 || (R_TYPE) == R_ARM_TLS_CALL \
12241 || (R_TYPE) == R_ARM_THM_TLS_CALL \
12242 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
12243 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
12244
12245 /* Relocate an ARM ELF section. */
12246
12247 static bfd_boolean
12248 elf32_arm_relocate_section (bfd * output_bfd,
12249 struct bfd_link_info * info,
12250 bfd * input_bfd,
12251 asection * input_section,
12252 bfd_byte * contents,
12253 Elf_Internal_Rela * relocs,
12254 Elf_Internal_Sym * local_syms,
12255 asection ** local_sections)
12256 {
12257 Elf_Internal_Shdr *symtab_hdr;
12258 struct elf_link_hash_entry **sym_hashes;
12259 Elf_Internal_Rela *rel;
12260 Elf_Internal_Rela *relend;
12261 const char *name;
12262 struct elf32_arm_link_hash_table * globals;
12263
12264 globals = elf32_arm_hash_table (info);
12265 if (globals == NULL)
12266 return FALSE;
12267
12268 symtab_hdr = & elf_symtab_hdr (input_bfd);
12269 sym_hashes = elf_sym_hashes (input_bfd);
12270
12271 rel = relocs;
12272 relend = relocs + input_section->reloc_count;
12273 for (; rel < relend; rel++)
12274 {
12275 int r_type;
12276 reloc_howto_type * howto;
12277 unsigned long r_symndx;
12278 Elf_Internal_Sym * sym;
12279 asection * sec;
12280 struct elf_link_hash_entry * h;
12281 bfd_vma relocation;
12282 bfd_reloc_status_type r;
12283 arelent bfd_reloc;
12284 char sym_type;
12285 bfd_boolean unresolved_reloc = FALSE;
12286 char *error_message = NULL;
12287
12288 r_symndx = ELF32_R_SYM (rel->r_info);
12289 r_type = ELF32_R_TYPE (rel->r_info);
12290 r_type = arm_real_reloc_type (globals, r_type);
12291
12292 if ( r_type == R_ARM_GNU_VTENTRY
12293 || r_type == R_ARM_GNU_VTINHERIT)
12294 continue;
12295
12296 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
12297 howto = bfd_reloc.howto;
12298
12299 h = NULL;
12300 sym = NULL;
12301 sec = NULL;
12302
12303 if (r_symndx < symtab_hdr->sh_info)
12304 {
12305 sym = local_syms + r_symndx;
12306 sym_type = ELF32_ST_TYPE (sym->st_info);
12307 sec = local_sections[r_symndx];
12308
12309 /* An object file might have a reference to a local
12310 undefined symbol. This is a daft object file, but we
12311 should at least do something about it. V4BX & NONE
12312 relocations do not use the symbol and are explicitly
12313 allowed to use the undefined symbol, so allow those.
12314 Likewise for relocations against STN_UNDEF. */
12315 if (r_type != R_ARM_V4BX
12316 && r_type != R_ARM_NONE
12317 && r_symndx != STN_UNDEF
12318 && bfd_is_und_section (sec)
12319 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
12320 (*info->callbacks->undefined_symbol)
12321 (info, bfd_elf_string_from_elf_section
12322 (input_bfd, symtab_hdr->sh_link, sym->st_name),
12323 input_bfd, input_section,
12324 rel->r_offset, TRUE);
12325
12326 if (globals->use_rel)
12327 {
12328 relocation = (sec->output_section->vma
12329 + sec->output_offset
12330 + sym->st_value);
12331 if (!bfd_link_relocatable (info)
12332 && (sec->flags & SEC_MERGE)
12333 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12334 {
12335 asection *msec;
12336 bfd_vma addend, value;
12337
12338 switch (r_type)
12339 {
12340 case R_ARM_MOVW_ABS_NC:
12341 case R_ARM_MOVT_ABS:
12342 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12343 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
12344 addend = (addend ^ 0x8000) - 0x8000;
12345 break;
12346
12347 case R_ARM_THM_MOVW_ABS_NC:
12348 case R_ARM_THM_MOVT_ABS:
12349 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
12350 << 16;
12351 value |= bfd_get_16 (input_bfd,
12352 contents + rel->r_offset + 2);
12353 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
12354 | ((value & 0x04000000) >> 15);
12355 addend = (addend ^ 0x8000) - 0x8000;
12356 break;
12357
12358 default:
12359 if (howto->rightshift
12360 || (howto->src_mask & (howto->src_mask + 1)))
12361 {
12362 _bfd_error_handler
12363 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
12364 input_bfd, input_section,
12365 (long) rel->r_offset, howto->name);
12366 return FALSE;
12367 }
12368
12369 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
12370
12371 /* Get the (signed) value from the instruction. */
12372 addend = value & howto->src_mask;
12373 if (addend & ((howto->src_mask + 1) >> 1))
12374 {
12375 bfd_signed_vma mask;
12376
12377 mask = -1;
12378 mask &= ~ howto->src_mask;
12379 addend |= mask;
12380 }
12381 break;
12382 }
12383
12384 msec = sec;
12385 addend =
12386 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
12387 - relocation;
12388 addend += msec->output_section->vma + msec->output_offset;
12389
12390 /* Cases here must match those in the preceding
12391 switch statement. */
12392 switch (r_type)
12393 {
12394 case R_ARM_MOVW_ABS_NC:
12395 case R_ARM_MOVT_ABS:
12396 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
12397 | (addend & 0xfff);
12398 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12399 break;
12400
12401 case R_ARM_THM_MOVW_ABS_NC:
12402 case R_ARM_THM_MOVT_ABS:
12403 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
12404 | (addend & 0xff) | ((addend & 0x0800) << 15);
12405 bfd_put_16 (input_bfd, value >> 16,
12406 contents + rel->r_offset);
12407 bfd_put_16 (input_bfd, value,
12408 contents + rel->r_offset + 2);
12409 break;
12410
12411 default:
12412 value = (value & ~ howto->dst_mask)
12413 | (addend & howto->dst_mask);
12414 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
12415 break;
12416 }
12417 }
12418 }
12419 else
12420 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
12421 }
12422 else
12423 {
12424 bfd_boolean warned, ignored;
12425
12426 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
12427 r_symndx, symtab_hdr, sym_hashes,
12428 h, sec, relocation,
12429 unresolved_reloc, warned, ignored);
12430
12431 sym_type = h->type;
12432 }
12433
12434 if (sec != NULL && discarded_section (sec))
12435 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
12436 rel, 1, relend, howto, 0, contents);
12437
12438 if (bfd_link_relocatable (info))
12439 {
12440 /* This is a relocatable link. We don't have to change
12441 anything, unless the reloc is against a section symbol,
12442 in which case we have to adjust according to where the
12443 section symbol winds up in the output section. */
12444 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
12445 {
12446 if (globals->use_rel)
12447 arm_add_to_rel (input_bfd, contents + rel->r_offset,
12448 howto, (bfd_signed_vma) sec->output_offset);
12449 else
12450 rel->r_addend += sec->output_offset;
12451 }
12452 continue;
12453 }
12454
12455 if (h != NULL)
12456 name = h->root.root.string;
12457 else
12458 {
12459 name = (bfd_elf_string_from_elf_section
12460 (input_bfd, symtab_hdr->sh_link, sym->st_name));
12461 if (name == NULL || *name == '\0')
12462 name = bfd_section_name (input_bfd, sec);
12463 }
12464
12465 if (r_symndx != STN_UNDEF
12466 && r_type != R_ARM_NONE
12467 && (h == NULL
12468 || h->root.type == bfd_link_hash_defined
12469 || h->root.type == bfd_link_hash_defweak)
12470 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
12471 {
12472 _bfd_error_handler
12473 ((sym_type == STT_TLS
12474 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
12475 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
12476 input_bfd,
12477 input_section,
12478 (long) rel->r_offset,
12479 howto->name,
12480 name);
12481 }
12482
12483 /* We call elf32_arm_final_link_relocate unless we're completely
12484 done, i.e., the relaxation produced the final output we want,
12485 and we won't let anybody mess with it. Also, we have to do
12486 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
12487 both in relaxed and non-relaxed cases. */
12488 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
12489 || (IS_ARM_TLS_GNU_RELOC (r_type)
12490 && !((h ? elf32_arm_hash_entry (h)->tls_type :
12491 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
12492 & GOT_TLS_GDESC)))
12493 {
12494 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
12495 contents, rel, h == NULL);
12496 /* This may have been marked unresolved because it came from
12497 a shared library. But we've just dealt with that. */
12498 unresolved_reloc = 0;
12499 }
12500 else
12501 r = bfd_reloc_continue;
12502
12503 if (r == bfd_reloc_continue)
12504 {
12505 unsigned char branch_type =
12506 h ? ARM_GET_SYM_BRANCH_TYPE (h->target_internal)
12507 : ARM_GET_SYM_BRANCH_TYPE (sym->st_target_internal);
12508
12509 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
12510 input_section, contents, rel,
12511 relocation, info, sec, name,
12512 sym_type, branch_type, h,
12513 &unresolved_reloc,
12514 &error_message);
12515 }
12516
12517 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
12518 because such sections are not SEC_ALLOC and thus ld.so will
12519 not process them. */
12520 if (unresolved_reloc
12521 && !((input_section->flags & SEC_DEBUGGING) != 0
12522 && h->def_dynamic)
12523 && _bfd_elf_section_offset (output_bfd, info, input_section,
12524 rel->r_offset) != (bfd_vma) -1)
12525 {
12526 _bfd_error_handler
12527 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
12528 input_bfd,
12529 input_section,
12530 (long) rel->r_offset,
12531 howto->name,
12532 h->root.root.string);
12533 return FALSE;
12534 }
12535
12536 if (r != bfd_reloc_ok)
12537 {
12538 switch (r)
12539 {
12540 case bfd_reloc_overflow:
12541 /* If the overflowing reloc was to an undefined symbol,
12542 we have already printed one error message and there
12543 is no point complaining again. */
12544 if (!h || h->root.type != bfd_link_hash_undefined)
12545 (*info->callbacks->reloc_overflow)
12546 (info, (h ? &h->root : NULL), name, howto->name,
12547 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
12548 break;
12549
12550 case bfd_reloc_undefined:
12551 (*info->callbacks->undefined_symbol)
12552 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
12553 break;
12554
12555 case bfd_reloc_outofrange:
12556 error_message = _("out of range");
12557 goto common_error;
12558
12559 case bfd_reloc_notsupported:
12560 error_message = _("unsupported relocation");
12561 goto common_error;
12562
12563 case bfd_reloc_dangerous:
12564 /* error_message should already be set. */
12565 goto common_error;
12566
12567 default:
12568 error_message = _("unknown error");
12569 /* Fall through. */
12570
12571 common_error:
12572 BFD_ASSERT (error_message != NULL);
12573 (*info->callbacks->reloc_dangerous)
12574 (info, error_message, input_bfd, input_section, rel->r_offset);
12575 break;
12576 }
12577 }
12578 }
12579
12580 return TRUE;
12581 }
12582
12583 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
12584 adds the edit to the start of the list. (The list must be built in order of
12585 ascending TINDEX: the function's callers are primarily responsible for
12586 maintaining that condition). */
12587
12588 static void
12589 add_unwind_table_edit (arm_unwind_table_edit **head,
12590 arm_unwind_table_edit **tail,
12591 arm_unwind_edit_type type,
12592 asection *linked_section,
12593 unsigned int tindex)
12594 {
12595 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
12596 xmalloc (sizeof (arm_unwind_table_edit));
12597
12598 new_edit->type = type;
12599 new_edit->linked_section = linked_section;
12600 new_edit->index = tindex;
12601
12602 if (tindex > 0)
12603 {
12604 new_edit->next = NULL;
12605
12606 if (*tail)
12607 (*tail)->next = new_edit;
12608
12609 (*tail) = new_edit;
12610
12611 if (!*head)
12612 (*head) = new_edit;
12613 }
12614 else
12615 {
12616 new_edit->next = *head;
12617
12618 if (!*tail)
12619 *tail = new_edit;
12620
12621 *head = new_edit;
12622 }
12623 }
12624
12625 static _arm_elf_section_data *get_arm_elf_section_data (asection *);
12626
12627 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
12628 static void
12629 adjust_exidx_size(asection *exidx_sec, int adjust)
12630 {
12631 asection *out_sec;
12632
12633 if (!exidx_sec->rawsize)
12634 exidx_sec->rawsize = exidx_sec->size;
12635
12636 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
12637 out_sec = exidx_sec->output_section;
12638 /* Adjust size of output section. */
12639 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
12640 }
12641
12642 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
12643 static void
12644 insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
12645 {
12646 struct _arm_elf_section_data *exidx_arm_data;
12647
12648 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12649 add_unwind_table_edit (
12650 &exidx_arm_data->u.exidx.unwind_edit_list,
12651 &exidx_arm_data->u.exidx.unwind_edit_tail,
12652 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
12653
12654 exidx_arm_data->additional_reloc_count++;
12655
12656 adjust_exidx_size(exidx_sec, 8);
12657 }
12658
12659 /* Scan .ARM.exidx tables, and create a list describing edits which should be
12660 made to those tables, such that:
12661
12662 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
12663 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
12664 codes which have been inlined into the index).
12665
12666 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
12667
12668 The edits are applied when the tables are written
12669 (in elf32_arm_write_section). */
12670
12671 bfd_boolean
12672 elf32_arm_fix_exidx_coverage (asection **text_section_order,
12673 unsigned int num_text_sections,
12674 struct bfd_link_info *info,
12675 bfd_boolean merge_exidx_entries)
12676 {
12677 bfd *inp;
12678 unsigned int last_second_word = 0, i;
12679 asection *last_exidx_sec = NULL;
12680 asection *last_text_sec = NULL;
12681 int last_unwind_type = -1;
12682
12683 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
12684 text sections. */
12685 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
12686 {
12687 asection *sec;
12688
12689 for (sec = inp->sections; sec != NULL; sec = sec->next)
12690 {
12691 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
12692 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
12693
12694 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
12695 continue;
12696
12697 if (elf_sec->linked_to)
12698 {
12699 Elf_Internal_Shdr *linked_hdr
12700 = &elf_section_data (elf_sec->linked_to)->this_hdr;
12701 struct _arm_elf_section_data *linked_sec_arm_data
12702 = get_arm_elf_section_data (linked_hdr->bfd_section);
12703
12704 if (linked_sec_arm_data == NULL)
12705 continue;
12706
12707 /* Link this .ARM.exidx section back from the text section it
12708 describes. */
12709 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
12710 }
12711 }
12712 }
12713
12714 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
12715 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
12716 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
12717
12718 for (i = 0; i < num_text_sections; i++)
12719 {
12720 asection *sec = text_section_order[i];
12721 asection *exidx_sec;
12722 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
12723 struct _arm_elf_section_data *exidx_arm_data;
12724 bfd_byte *contents = NULL;
12725 int deleted_exidx_bytes = 0;
12726 bfd_vma j;
12727 arm_unwind_table_edit *unwind_edit_head = NULL;
12728 arm_unwind_table_edit *unwind_edit_tail = NULL;
12729 Elf_Internal_Shdr *hdr;
12730 bfd *ibfd;
12731
12732 if (arm_data == NULL)
12733 continue;
12734
12735 exidx_sec = arm_data->u.text.arm_exidx_sec;
12736 if (exidx_sec == NULL)
12737 {
12738 /* Section has no unwind data. */
12739 if (last_unwind_type == 0 || !last_exidx_sec)
12740 continue;
12741
12742 /* Ignore zero sized sections. */
12743 if (sec->size == 0)
12744 continue;
12745
12746 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12747 last_unwind_type = 0;
12748 continue;
12749 }
12750
12751 /* Skip /DISCARD/ sections. */
12752 if (bfd_is_abs_section (exidx_sec->output_section))
12753 continue;
12754
12755 hdr = &elf_section_data (exidx_sec)->this_hdr;
12756 if (hdr->sh_type != SHT_ARM_EXIDX)
12757 continue;
12758
12759 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
12760 if (exidx_arm_data == NULL)
12761 continue;
12762
12763 ibfd = exidx_sec->owner;
12764
12765 if (hdr->contents != NULL)
12766 contents = hdr->contents;
12767 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
12768 /* An error? */
12769 continue;
12770
12771 if (last_unwind_type > 0)
12772 {
12773 unsigned int first_word = bfd_get_32 (ibfd, contents);
12774 /* Add cantunwind if first unwind item does not match section
12775 start. */
12776 if (first_word != sec->vma)
12777 {
12778 insert_cantunwind_after (last_text_sec, last_exidx_sec);
12779 last_unwind_type = 0;
12780 }
12781 }
12782
12783 for (j = 0; j < hdr->sh_size; j += 8)
12784 {
12785 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
12786 int unwind_type;
12787 int elide = 0;
12788
12789 /* An EXIDX_CANTUNWIND entry. */
12790 if (second_word == 1)
12791 {
12792 if (last_unwind_type == 0)
12793 elide = 1;
12794 unwind_type = 0;
12795 }
12796 /* Inlined unwinding data. Merge if equal to previous. */
12797 else if ((second_word & 0x80000000) != 0)
12798 {
12799 if (merge_exidx_entries
12800 && last_second_word == second_word && last_unwind_type == 1)
12801 elide = 1;
12802 unwind_type = 1;
12803 last_second_word = second_word;
12804 }
12805 /* Normal table entry. In theory we could merge these too,
12806 but duplicate entries are likely to be much less common. */
12807 else
12808 unwind_type = 2;
12809
12810 if (elide && !bfd_link_relocatable (info))
12811 {
12812 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
12813 DELETE_EXIDX_ENTRY, NULL, j / 8);
12814
12815 deleted_exidx_bytes += 8;
12816 }
12817
12818 last_unwind_type = unwind_type;
12819 }
12820
12821 /* Free contents if we allocated it ourselves. */
12822 if (contents != hdr->contents)
12823 free (contents);
12824
12825 /* Record edits to be applied later (in elf32_arm_write_section). */
12826 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
12827 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
12828
12829 if (deleted_exidx_bytes > 0)
12830 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
12831
12832 last_exidx_sec = exidx_sec;
12833 last_text_sec = sec;
12834 }
12835
12836 /* Add terminating CANTUNWIND entry. */
12837 if (!bfd_link_relocatable (info) && last_exidx_sec
12838 && last_unwind_type != 0)
12839 insert_cantunwind_after(last_text_sec, last_exidx_sec);
12840
12841 return TRUE;
12842 }
12843
12844 static bfd_boolean
12845 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
12846 bfd *ibfd, const char *name)
12847 {
12848 asection *sec, *osec;
12849
12850 sec = bfd_get_linker_section (ibfd, name);
12851 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
12852 return TRUE;
12853
12854 osec = sec->output_section;
12855 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
12856 return TRUE;
12857
12858 if (! bfd_set_section_contents (obfd, osec, sec->contents,
12859 sec->output_offset, sec->size))
12860 return FALSE;
12861
12862 return TRUE;
12863 }
12864
12865 static bfd_boolean
12866 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
12867 {
12868 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
12869 asection *sec, *osec;
12870
12871 if (globals == NULL)
12872 return FALSE;
12873
12874 /* Invoke the regular ELF backend linker to do all the work. */
12875 if (!bfd_elf_final_link (abfd, info))
12876 return FALSE;
12877
12878 /* Process stub sections (eg BE8 encoding, ...). */
12879 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
12880 unsigned int i;
12881 for (i=0; i<htab->top_id; i++)
12882 {
12883 sec = htab->stub_group[i].stub_sec;
12884 /* Only process it once, in its link_sec slot. */
12885 if (sec && i == htab->stub_group[i].link_sec->id)
12886 {
12887 osec = sec->output_section;
12888 elf32_arm_write_section (abfd, info, sec, sec->contents);
12889 if (! bfd_set_section_contents (abfd, osec, sec->contents,
12890 sec->output_offset, sec->size))
12891 return FALSE;
12892 }
12893 }
12894
12895 /* Write out any glue sections now that we have created all the
12896 stubs. */
12897 if (globals->bfd_of_glue_owner != NULL)
12898 {
12899 if (! elf32_arm_output_glue_section (info, abfd,
12900 globals->bfd_of_glue_owner,
12901 ARM2THUMB_GLUE_SECTION_NAME))
12902 return FALSE;
12903
12904 if (! elf32_arm_output_glue_section (info, abfd,
12905 globals->bfd_of_glue_owner,
12906 THUMB2ARM_GLUE_SECTION_NAME))
12907 return FALSE;
12908
12909 if (! elf32_arm_output_glue_section (info, abfd,
12910 globals->bfd_of_glue_owner,
12911 VFP11_ERRATUM_VENEER_SECTION_NAME))
12912 return FALSE;
12913
12914 if (! elf32_arm_output_glue_section (info, abfd,
12915 globals->bfd_of_glue_owner,
12916 STM32L4XX_ERRATUM_VENEER_SECTION_NAME))
12917 return FALSE;
12918
12919 if (! elf32_arm_output_glue_section (info, abfd,
12920 globals->bfd_of_glue_owner,
12921 ARM_BX_GLUE_SECTION_NAME))
12922 return FALSE;
12923 }
12924
12925 return TRUE;
12926 }
12927
12928 /* Return a best guess for the machine number based on the attributes. */
12929
12930 static unsigned int
12931 bfd_arm_get_mach_from_attributes (bfd * abfd)
12932 {
12933 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
12934
12935 switch (arch)
12936 {
12937 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
12938 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
12939 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
12940
12941 case TAG_CPU_ARCH_V5TE:
12942 {
12943 char * name;
12944
12945 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
12946 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
12947
12948 if (name)
12949 {
12950 if (strcmp (name, "IWMMXT2") == 0)
12951 return bfd_mach_arm_iWMMXt2;
12952
12953 if (strcmp (name, "IWMMXT") == 0)
12954 return bfd_mach_arm_iWMMXt;
12955
12956 if (strcmp (name, "XSCALE") == 0)
12957 {
12958 int wmmx;
12959
12960 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
12961 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
12962 switch (wmmx)
12963 {
12964 case 1: return bfd_mach_arm_iWMMXt;
12965 case 2: return bfd_mach_arm_iWMMXt2;
12966 default: return bfd_mach_arm_XScale;
12967 }
12968 }
12969 }
12970
12971 return bfd_mach_arm_5TE;
12972 }
12973
12974 default:
12975 return bfd_mach_arm_unknown;
12976 }
12977 }
12978
12979 /* Set the right machine number. */
12980
12981 static bfd_boolean
12982 elf32_arm_object_p (bfd *abfd)
12983 {
12984 unsigned int mach;
12985
12986 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
12987
12988 if (mach == bfd_mach_arm_unknown)
12989 {
12990 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
12991 mach = bfd_mach_arm_ep9312;
12992 else
12993 mach = bfd_arm_get_mach_from_attributes (abfd);
12994 }
12995
12996 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
12997 return TRUE;
12998 }
12999
13000 /* Function to keep ARM specific flags in the ELF header. */
13001
13002 static bfd_boolean
13003 elf32_arm_set_private_flags (bfd *abfd, flagword flags)
13004 {
13005 if (elf_flags_init (abfd)
13006 && elf_elfheader (abfd)->e_flags != flags)
13007 {
13008 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
13009 {
13010 if (flags & EF_ARM_INTERWORK)
13011 _bfd_error_handler
13012 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
13013 abfd);
13014 else
13015 _bfd_error_handler
13016 (_("Warning: Clearing the interworking flag of %B due to outside request"),
13017 abfd);
13018 }
13019 }
13020 else
13021 {
13022 elf_elfheader (abfd)->e_flags = flags;
13023 elf_flags_init (abfd) = TRUE;
13024 }
13025
13026 return TRUE;
13027 }
13028
13029 /* Copy backend specific data from one object module to another. */
13030
13031 static bfd_boolean
13032 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
13033 {
13034 flagword in_flags;
13035 flagword out_flags;
13036
13037 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
13038 return TRUE;
13039
13040 in_flags = elf_elfheader (ibfd)->e_flags;
13041 out_flags = elf_elfheader (obfd)->e_flags;
13042
13043 if (elf_flags_init (obfd)
13044 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
13045 && in_flags != out_flags)
13046 {
13047 /* Cannot mix APCS26 and APCS32 code. */
13048 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
13049 return FALSE;
13050
13051 /* Cannot mix float APCS and non-float APCS code. */
13052 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
13053 return FALSE;
13054
13055 /* If the src and dest have different interworking flags
13056 then turn off the interworking bit. */
13057 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
13058 {
13059 if (out_flags & EF_ARM_INTERWORK)
13060 _bfd_error_handler
13061 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
13062 obfd, ibfd);
13063
13064 in_flags &= ~EF_ARM_INTERWORK;
13065 }
13066
13067 /* Likewise for PIC, though don't warn for this case. */
13068 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
13069 in_flags &= ~EF_ARM_PIC;
13070 }
13071
13072 elf_elfheader (obfd)->e_flags = in_flags;
13073 elf_flags_init (obfd) = TRUE;
13074
13075 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
13076 }
13077
13078 /* Values for Tag_ABI_PCS_R9_use. */
13079 enum
13080 {
13081 AEABI_R9_V6,
13082 AEABI_R9_SB,
13083 AEABI_R9_TLS,
13084 AEABI_R9_unused
13085 };
13086
13087 /* Values for Tag_ABI_PCS_RW_data. */
13088 enum
13089 {
13090 AEABI_PCS_RW_data_absolute,
13091 AEABI_PCS_RW_data_PCrel,
13092 AEABI_PCS_RW_data_SBrel,
13093 AEABI_PCS_RW_data_unused
13094 };
13095
13096 /* Values for Tag_ABI_enum_size. */
13097 enum
13098 {
13099 AEABI_enum_unused,
13100 AEABI_enum_short,
13101 AEABI_enum_wide,
13102 AEABI_enum_forced_wide
13103 };
13104
13105 /* Determine whether an object attribute tag takes an integer, a
13106 string or both. */
13107
13108 static int
13109 elf32_arm_obj_attrs_arg_type (int tag)
13110 {
13111 if (tag == Tag_compatibility)
13112 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
13113 else if (tag == Tag_nodefaults)
13114 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
13115 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
13116 return ATTR_TYPE_FLAG_STR_VAL;
13117 else if (tag < 32)
13118 return ATTR_TYPE_FLAG_INT_VAL;
13119 else
13120 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
13121 }
13122
13123 /* The ABI defines that Tag_conformance should be emitted first, and that
13124 Tag_nodefaults should be second (if either is defined). This sets those
13125 two positions, and bumps up the position of all the remaining tags to
13126 compensate. */
13127 static int
13128 elf32_arm_obj_attrs_order (int num)
13129 {
13130 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
13131 return Tag_conformance;
13132 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
13133 return Tag_nodefaults;
13134 if ((num - 2) < Tag_nodefaults)
13135 return num - 2;
13136 if ((num - 1) < Tag_conformance)
13137 return num - 1;
13138 return num;
13139 }
13140
13141 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
13142 static bfd_boolean
13143 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
13144 {
13145 if ((tag & 127) < 64)
13146 {
13147 _bfd_error_handler
13148 (_("%B: Unknown mandatory EABI object attribute %d"),
13149 abfd, tag);
13150 bfd_set_error (bfd_error_bad_value);
13151 return FALSE;
13152 }
13153 else
13154 {
13155 _bfd_error_handler
13156 (_("Warning: %B: Unknown EABI object attribute %d"),
13157 abfd, tag);
13158 return TRUE;
13159 }
13160 }
13161
13162 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
13163 Returns -1 if no architecture could be read. */
13164
13165 static int
13166 get_secondary_compatible_arch (bfd *abfd)
13167 {
13168 obj_attribute *attr =
13169 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13170
13171 /* Note: the tag and its argument below are uleb128 values, though
13172 currently-defined values fit in one byte for each. */
13173 if (attr->s
13174 && attr->s[0] == Tag_CPU_arch
13175 && (attr->s[1] & 128) != 128
13176 && attr->s[2] == 0)
13177 return attr->s[1];
13178
13179 /* This tag is "safely ignorable", so don't complain if it looks funny. */
13180 return -1;
13181 }
13182
13183 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
13184 The tag is removed if ARCH is -1. */
13185
13186 static void
13187 set_secondary_compatible_arch (bfd *abfd, int arch)
13188 {
13189 obj_attribute *attr =
13190 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
13191
13192 if (arch == -1)
13193 {
13194 attr->s = NULL;
13195 return;
13196 }
13197
13198 /* Note: the tag and its argument below are uleb128 values, though
13199 currently-defined values fit in one byte for each. */
13200 if (!attr->s)
13201 attr->s = (char *) bfd_alloc (abfd, 3);
13202 attr->s[0] = Tag_CPU_arch;
13203 attr->s[1] = arch;
13204 attr->s[2] = '\0';
13205 }
13206
13207 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
13208 into account. */
13209
13210 static int
13211 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
13212 int newtag, int secondary_compat)
13213 {
13214 #define T(X) TAG_CPU_ARCH_##X
13215 int tagl, tagh, result;
13216 const int v6t2[] =
13217 {
13218 T(V6T2), /* PRE_V4. */
13219 T(V6T2), /* V4. */
13220 T(V6T2), /* V4T. */
13221 T(V6T2), /* V5T. */
13222 T(V6T2), /* V5TE. */
13223 T(V6T2), /* V5TEJ. */
13224 T(V6T2), /* V6. */
13225 T(V7), /* V6KZ. */
13226 T(V6T2) /* V6T2. */
13227 };
13228 const int v6k[] =
13229 {
13230 T(V6K), /* PRE_V4. */
13231 T(V6K), /* V4. */
13232 T(V6K), /* V4T. */
13233 T(V6K), /* V5T. */
13234 T(V6K), /* V5TE. */
13235 T(V6K), /* V5TEJ. */
13236 T(V6K), /* V6. */
13237 T(V6KZ), /* V6KZ. */
13238 T(V7), /* V6T2. */
13239 T(V6K) /* V6K. */
13240 };
13241 const int v7[] =
13242 {
13243 T(V7), /* PRE_V4. */
13244 T(V7), /* V4. */
13245 T(V7), /* V4T. */
13246 T(V7), /* V5T. */
13247 T(V7), /* V5TE. */
13248 T(V7), /* V5TEJ. */
13249 T(V7), /* V6. */
13250 T(V7), /* V6KZ. */
13251 T(V7), /* V6T2. */
13252 T(V7), /* V6K. */
13253 T(V7) /* V7. */
13254 };
13255 const int v6_m[] =
13256 {
13257 -1, /* PRE_V4. */
13258 -1, /* V4. */
13259 T(V6K), /* V4T. */
13260 T(V6K), /* V5T. */
13261 T(V6K), /* V5TE. */
13262 T(V6K), /* V5TEJ. */
13263 T(V6K), /* V6. */
13264 T(V6KZ), /* V6KZ. */
13265 T(V7), /* V6T2. */
13266 T(V6K), /* V6K. */
13267 T(V7), /* V7. */
13268 T(V6_M) /* V6_M. */
13269 };
13270 const int v6s_m[] =
13271 {
13272 -1, /* PRE_V4. */
13273 -1, /* V4. */
13274 T(V6K), /* V4T. */
13275 T(V6K), /* V5T. */
13276 T(V6K), /* V5TE. */
13277 T(V6K), /* V5TEJ. */
13278 T(V6K), /* V6. */
13279 T(V6KZ), /* V6KZ. */
13280 T(V7), /* V6T2. */
13281 T(V6K), /* V6K. */
13282 T(V7), /* V7. */
13283 T(V6S_M), /* V6_M. */
13284 T(V6S_M) /* V6S_M. */
13285 };
13286 const int v7e_m[] =
13287 {
13288 -1, /* PRE_V4. */
13289 -1, /* V4. */
13290 T(V7E_M), /* V4T. */
13291 T(V7E_M), /* V5T. */
13292 T(V7E_M), /* V5TE. */
13293 T(V7E_M), /* V5TEJ. */
13294 T(V7E_M), /* V6. */
13295 T(V7E_M), /* V6KZ. */
13296 T(V7E_M), /* V6T2. */
13297 T(V7E_M), /* V6K. */
13298 T(V7E_M), /* V7. */
13299 T(V7E_M), /* V6_M. */
13300 T(V7E_M), /* V6S_M. */
13301 T(V7E_M) /* V7E_M. */
13302 };
13303 const int v8[] =
13304 {
13305 T(V8), /* PRE_V4. */
13306 T(V8), /* V4. */
13307 T(V8), /* V4T. */
13308 T(V8), /* V5T. */
13309 T(V8), /* V5TE. */
13310 T(V8), /* V5TEJ. */
13311 T(V8), /* V6. */
13312 T(V8), /* V6KZ. */
13313 T(V8), /* V6T2. */
13314 T(V8), /* V6K. */
13315 T(V8), /* V7. */
13316 T(V8), /* V6_M. */
13317 T(V8), /* V6S_M. */
13318 T(V8), /* V7E_M. */
13319 T(V8) /* V8. */
13320 };
13321 const int v8m_baseline[] =
13322 {
13323 -1, /* PRE_V4. */
13324 -1, /* V4. */
13325 -1, /* V4T. */
13326 -1, /* V5T. */
13327 -1, /* V5TE. */
13328 -1, /* V5TEJ. */
13329 -1, /* V6. */
13330 -1, /* V6KZ. */
13331 -1, /* V6T2. */
13332 -1, /* V6K. */
13333 -1, /* V7. */
13334 T(V8M_BASE), /* V6_M. */
13335 T(V8M_BASE), /* V6S_M. */
13336 -1, /* V7E_M. */
13337 -1, /* V8. */
13338 -1,
13339 T(V8M_BASE) /* V8-M BASELINE. */
13340 };
13341 const int v8m_mainline[] =
13342 {
13343 -1, /* PRE_V4. */
13344 -1, /* V4. */
13345 -1, /* V4T. */
13346 -1, /* V5T. */
13347 -1, /* V5TE. */
13348 -1, /* V5TEJ. */
13349 -1, /* V6. */
13350 -1, /* V6KZ. */
13351 -1, /* V6T2. */
13352 -1, /* V6K. */
13353 T(V8M_MAIN), /* V7. */
13354 T(V8M_MAIN), /* V6_M. */
13355 T(V8M_MAIN), /* V6S_M. */
13356 T(V8M_MAIN), /* V7E_M. */
13357 -1, /* V8. */
13358 -1,
13359 T(V8M_MAIN), /* V8-M BASELINE. */
13360 T(V8M_MAIN) /* V8-M MAINLINE. */
13361 };
13362 const int v4t_plus_v6_m[] =
13363 {
13364 -1, /* PRE_V4. */
13365 -1, /* V4. */
13366 T(V4T), /* V4T. */
13367 T(V5T), /* V5T. */
13368 T(V5TE), /* V5TE. */
13369 T(V5TEJ), /* V5TEJ. */
13370 T(V6), /* V6. */
13371 T(V6KZ), /* V6KZ. */
13372 T(V6T2), /* V6T2. */
13373 T(V6K), /* V6K. */
13374 T(V7), /* V7. */
13375 T(V6_M), /* V6_M. */
13376 T(V6S_M), /* V6S_M. */
13377 T(V7E_M), /* V7E_M. */
13378 T(V8), /* V8. */
13379 -1, /* Unused. */
13380 T(V8M_BASE), /* V8-M BASELINE. */
13381 T(V8M_MAIN), /* V8-M MAINLINE. */
13382 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
13383 };
13384 const int *comb[] =
13385 {
13386 v6t2,
13387 v6k,
13388 v7,
13389 v6_m,
13390 v6s_m,
13391 v7e_m,
13392 v8,
13393 NULL,
13394 v8m_baseline,
13395 v8m_mainline,
13396 /* Pseudo-architecture. */
13397 v4t_plus_v6_m
13398 };
13399
13400 /* Check we've not got a higher architecture than we know about. */
13401
13402 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
13403 {
13404 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
13405 return -1;
13406 }
13407
13408 /* Override old tag if we have a Tag_also_compatible_with on the output. */
13409
13410 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
13411 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
13412 oldtag = T(V4T_PLUS_V6_M);
13413
13414 /* And override the new tag if we have a Tag_also_compatible_with on the
13415 input. */
13416
13417 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
13418 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
13419 newtag = T(V4T_PLUS_V6_M);
13420
13421 tagl = (oldtag < newtag) ? oldtag : newtag;
13422 result = tagh = (oldtag > newtag) ? oldtag : newtag;
13423
13424 /* Architectures before V6KZ add features monotonically. */
13425 if (tagh <= TAG_CPU_ARCH_V6KZ)
13426 return result;
13427
13428 result = comb[tagh - T(V6T2)] ? comb[tagh - T(V6T2)][tagl] : -1;
13429
13430 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
13431 as the canonical version. */
13432 if (result == T(V4T_PLUS_V6_M))
13433 {
13434 result = T(V4T);
13435 *secondary_compat_out = T(V6_M);
13436 }
13437 else
13438 *secondary_compat_out = -1;
13439
13440 if (result == -1)
13441 {
13442 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
13443 ibfd, oldtag, newtag);
13444 return -1;
13445 }
13446
13447 return result;
13448 #undef T
13449 }
13450
13451 /* Query attributes object to see if integer divide instructions may be
13452 present in an object. */
13453 static bfd_boolean
13454 elf32_arm_attributes_accept_div (const obj_attribute *attr)
13455 {
13456 int arch = attr[Tag_CPU_arch].i;
13457 int profile = attr[Tag_CPU_arch_profile].i;
13458
13459 switch (attr[Tag_DIV_use].i)
13460 {
13461 case 0:
13462 /* Integer divide allowed if instruction contained in archetecture. */
13463 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
13464 return TRUE;
13465 else if (arch >= TAG_CPU_ARCH_V7E_M)
13466 return TRUE;
13467 else
13468 return FALSE;
13469
13470 case 1:
13471 /* Integer divide explicitly prohibited. */
13472 return FALSE;
13473
13474 default:
13475 /* Unrecognised case - treat as allowing divide everywhere. */
13476 case 2:
13477 /* Integer divide allowed in ARM state. */
13478 return TRUE;
13479 }
13480 }
13481
13482 /* Query attributes object to see if integer divide instructions are
13483 forbidden to be in the object. This is not the inverse of
13484 elf32_arm_attributes_accept_div. */
13485 static bfd_boolean
13486 elf32_arm_attributes_forbid_div (const obj_attribute *attr)
13487 {
13488 return attr[Tag_DIV_use].i == 1;
13489 }
13490
13491 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
13492 are conflicting attributes. */
13493
13494 static bfd_boolean
13495 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
13496 {
13497 obj_attribute *in_attr;
13498 obj_attribute *out_attr;
13499 /* Some tags have 0 = don't care, 1 = strong requirement,
13500 2 = weak requirement. */
13501 static const int order_021[3] = {0, 2, 1};
13502 int i;
13503 bfd_boolean result = TRUE;
13504 const char *sec_name = get_elf_backend_data (ibfd)->obj_attrs_section;
13505
13506 /* Skip the linker stubs file. This preserves previous behavior
13507 of accepting unknown attributes in the first input file - but
13508 is that a bug? */
13509 if (ibfd->flags & BFD_LINKER_CREATED)
13510 return TRUE;
13511
13512 /* Skip any input that hasn't attribute section.
13513 This enables to link object files without attribute section with
13514 any others. */
13515 if (bfd_get_section_by_name (ibfd, sec_name) == NULL)
13516 return TRUE;
13517
13518 if (!elf_known_obj_attributes_proc (obfd)[0].i)
13519 {
13520 /* This is the first object. Copy the attributes. */
13521 _bfd_elf_copy_obj_attributes (ibfd, obfd);
13522
13523 out_attr = elf_known_obj_attributes_proc (obfd);
13524
13525 /* Use the Tag_null value to indicate the attributes have been
13526 initialized. */
13527 out_attr[0].i = 1;
13528
13529 /* We do not output objects with Tag_MPextension_use_legacy - we move
13530 the attribute's value to Tag_MPextension_use. */
13531 if (out_attr[Tag_MPextension_use_legacy].i != 0)
13532 {
13533 if (out_attr[Tag_MPextension_use].i != 0
13534 && out_attr[Tag_MPextension_use_legacy].i
13535 != out_attr[Tag_MPextension_use].i)
13536 {
13537 _bfd_error_handler
13538 (_("Error: %B has both the current and legacy "
13539 "Tag_MPextension_use attributes"), ibfd);
13540 result = FALSE;
13541 }
13542
13543 out_attr[Tag_MPextension_use] =
13544 out_attr[Tag_MPextension_use_legacy];
13545 out_attr[Tag_MPextension_use_legacy].type = 0;
13546 out_attr[Tag_MPextension_use_legacy].i = 0;
13547 }
13548
13549 return result;
13550 }
13551
13552 in_attr = elf_known_obj_attributes_proc (ibfd);
13553 out_attr = elf_known_obj_attributes_proc (obfd);
13554 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
13555 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
13556 {
13557 /* Ignore mismatches if the object doesn't use floating point or is
13558 floating point ABI independent. */
13559 if (out_attr[Tag_ABI_FP_number_model].i == AEABI_FP_number_model_none
13560 || (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13561 && out_attr[Tag_ABI_VFP_args].i == AEABI_VFP_args_compatible))
13562 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
13563 else if (in_attr[Tag_ABI_FP_number_model].i != AEABI_FP_number_model_none
13564 && in_attr[Tag_ABI_VFP_args].i != AEABI_VFP_args_compatible)
13565 {
13566 _bfd_error_handler
13567 (_("error: %B uses VFP register arguments, %B does not"),
13568 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
13569 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
13570 result = FALSE;
13571 }
13572 }
13573
13574 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
13575 {
13576 /* Merge this attribute with existing attributes. */
13577 switch (i)
13578 {
13579 case Tag_CPU_raw_name:
13580 case Tag_CPU_name:
13581 /* These are merged after Tag_CPU_arch. */
13582 break;
13583
13584 case Tag_ABI_optimization_goals:
13585 case Tag_ABI_FP_optimization_goals:
13586 /* Use the first value seen. */
13587 break;
13588
13589 case Tag_CPU_arch:
13590 {
13591 int secondary_compat = -1, secondary_compat_out = -1;
13592 unsigned int saved_out_attr = out_attr[i].i;
13593 int arch_attr;
13594 static const char *name_table[] =
13595 {
13596 /* These aren't real CPU names, but we can't guess
13597 that from the architecture version alone. */
13598 "Pre v4",
13599 "ARM v4",
13600 "ARM v4T",
13601 "ARM v5T",
13602 "ARM v5TE",
13603 "ARM v5TEJ",
13604 "ARM v6",
13605 "ARM v6KZ",
13606 "ARM v6T2",
13607 "ARM v6K",
13608 "ARM v7",
13609 "ARM v6-M",
13610 "ARM v6S-M",
13611 "ARM v8",
13612 "",
13613 "ARM v8-M.baseline",
13614 "ARM v8-M.mainline",
13615 };
13616
13617 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
13618 secondary_compat = get_secondary_compatible_arch (ibfd);
13619 secondary_compat_out = get_secondary_compatible_arch (obfd);
13620 arch_attr = tag_cpu_arch_combine (ibfd, out_attr[i].i,
13621 &secondary_compat_out,
13622 in_attr[i].i,
13623 secondary_compat);
13624
13625 /* Return with error if failed to merge. */
13626 if (arch_attr == -1)
13627 return FALSE;
13628
13629 out_attr[i].i = arch_attr;
13630
13631 set_secondary_compatible_arch (obfd, secondary_compat_out);
13632
13633 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
13634 if (out_attr[i].i == saved_out_attr)
13635 ; /* Leave the names alone. */
13636 else if (out_attr[i].i == in_attr[i].i)
13637 {
13638 /* The output architecture has been changed to match the
13639 input architecture. Use the input names. */
13640 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
13641 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
13642 : NULL;
13643 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
13644 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
13645 : NULL;
13646 }
13647 else
13648 {
13649 out_attr[Tag_CPU_name].s = NULL;
13650 out_attr[Tag_CPU_raw_name].s = NULL;
13651 }
13652
13653 /* If we still don't have a value for Tag_CPU_name,
13654 make one up now. Tag_CPU_raw_name remains blank. */
13655 if (out_attr[Tag_CPU_name].s == NULL
13656 && out_attr[i].i < ARRAY_SIZE (name_table))
13657 out_attr[Tag_CPU_name].s =
13658 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
13659 }
13660 break;
13661
13662 case Tag_ARM_ISA_use:
13663 case Tag_THUMB_ISA_use:
13664 case Tag_WMMX_arch:
13665 case Tag_Advanced_SIMD_arch:
13666 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
13667 case Tag_ABI_FP_rounding:
13668 case Tag_ABI_FP_exceptions:
13669 case Tag_ABI_FP_user_exceptions:
13670 case Tag_ABI_FP_number_model:
13671 case Tag_FP_HP_extension:
13672 case Tag_CPU_unaligned_access:
13673 case Tag_T2EE_use:
13674 case Tag_MPextension_use:
13675 /* Use the largest value specified. */
13676 if (in_attr[i].i > out_attr[i].i)
13677 out_attr[i].i = in_attr[i].i;
13678 break;
13679
13680 case Tag_ABI_align_preserved:
13681 case Tag_ABI_PCS_RO_data:
13682 /* Use the smallest value specified. */
13683 if (in_attr[i].i < out_attr[i].i)
13684 out_attr[i].i = in_attr[i].i;
13685 break;
13686
13687 case Tag_ABI_align_needed:
13688 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
13689 && (in_attr[Tag_ABI_align_preserved].i == 0
13690 || out_attr[Tag_ABI_align_preserved].i == 0))
13691 {
13692 /* This error message should be enabled once all non-conformant
13693 binaries in the toolchain have had the attributes set
13694 properly.
13695 _bfd_error_handler
13696 (_("error: %B: 8-byte data alignment conflicts with %B"),
13697 obfd, ibfd);
13698 result = FALSE; */
13699 }
13700 /* Fall through. */
13701 case Tag_ABI_FP_denormal:
13702 case Tag_ABI_PCS_GOT_use:
13703 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
13704 value if greater than 2 (for future-proofing). */
13705 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
13706 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
13707 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
13708 out_attr[i].i = in_attr[i].i;
13709 break;
13710
13711 case Tag_Virtualization_use:
13712 /* The virtualization tag effectively stores two bits of
13713 information: the intended use of TrustZone (in bit 0), and the
13714 intended use of Virtualization (in bit 1). */
13715 if (out_attr[i].i == 0)
13716 out_attr[i].i = in_attr[i].i;
13717 else if (in_attr[i].i != 0
13718 && in_attr[i].i != out_attr[i].i)
13719 {
13720 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
13721 out_attr[i].i = 3;
13722 else
13723 {
13724 _bfd_error_handler
13725 (_("error: %B: unable to merge virtualization attributes "
13726 "with %B"),
13727 obfd, ibfd);
13728 result = FALSE;
13729 }
13730 }
13731 break;
13732
13733 case Tag_CPU_arch_profile:
13734 if (out_attr[i].i != in_attr[i].i)
13735 {
13736 /* 0 will merge with anything.
13737 'A' and 'S' merge to 'A'.
13738 'R' and 'S' merge to 'R'.
13739 'M' and 'A|R|S' is an error. */
13740 if (out_attr[i].i == 0
13741 || (out_attr[i].i == 'S'
13742 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
13743 out_attr[i].i = in_attr[i].i;
13744 else if (in_attr[i].i == 0
13745 || (in_attr[i].i == 'S'
13746 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
13747 ; /* Do nothing. */
13748 else
13749 {
13750 _bfd_error_handler
13751 (_("error: %B: Conflicting architecture profiles %c/%c"),
13752 ibfd,
13753 in_attr[i].i ? in_attr[i].i : '0',
13754 out_attr[i].i ? out_attr[i].i : '0');
13755 result = FALSE;
13756 }
13757 }
13758 break;
13759
13760 case Tag_DSP_extension:
13761 /* No need to change output value if any of:
13762 - pre (<=) ARMv5T input architecture (do not have DSP)
13763 - M input profile not ARMv7E-M and do not have DSP. */
13764 if (in_attr[Tag_CPU_arch].i <= 3
13765 || (in_attr[Tag_CPU_arch_profile].i == 'M'
13766 && in_attr[Tag_CPU_arch].i != 13
13767 && in_attr[i].i == 0))
13768 ; /* Do nothing. */
13769 /* Output value should be 0 if DSP part of architecture, ie.
13770 - post (>=) ARMv5te architecture output
13771 - A, R or S profile output or ARMv7E-M output architecture. */
13772 else if (out_attr[Tag_CPU_arch].i >= 4
13773 && (out_attr[Tag_CPU_arch_profile].i == 'A'
13774 || out_attr[Tag_CPU_arch_profile].i == 'R'
13775 || out_attr[Tag_CPU_arch_profile].i == 'S'
13776 || out_attr[Tag_CPU_arch].i == 13))
13777 out_attr[i].i = 0;
13778 /* Otherwise, DSP instructions are added and not part of output
13779 architecture. */
13780 else
13781 out_attr[i].i = 1;
13782 break;
13783
13784 case Tag_FP_arch:
13785 {
13786 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
13787 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
13788 when it's 0. It might mean absence of FP hardware if
13789 Tag_FP_arch is zero. */
13790
13791 #define VFP_VERSION_COUNT 9
13792 static const struct
13793 {
13794 int ver;
13795 int regs;
13796 } vfp_versions[VFP_VERSION_COUNT] =
13797 {
13798 {0, 0},
13799 {1, 16},
13800 {2, 16},
13801 {3, 32},
13802 {3, 16},
13803 {4, 32},
13804 {4, 16},
13805 {8, 32},
13806 {8, 16}
13807 };
13808 int ver;
13809 int regs;
13810 int newval;
13811
13812 /* If the output has no requirement about FP hardware,
13813 follow the requirement of the input. */
13814 if (out_attr[i].i == 0)
13815 {
13816 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
13817 out_attr[i].i = in_attr[i].i;
13818 out_attr[Tag_ABI_HardFP_use].i
13819 = in_attr[Tag_ABI_HardFP_use].i;
13820 break;
13821 }
13822 /* If the input has no requirement about FP hardware, do
13823 nothing. */
13824 else if (in_attr[i].i == 0)
13825 {
13826 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
13827 break;
13828 }
13829
13830 /* Both the input and the output have nonzero Tag_FP_arch.
13831 So Tag_ABI_HardFP_use is implied by Tag_FP_arch when it's zero. */
13832
13833 /* If both the input and the output have zero Tag_ABI_HardFP_use,
13834 do nothing. */
13835 if (in_attr[Tag_ABI_HardFP_use].i == 0
13836 && out_attr[Tag_ABI_HardFP_use].i == 0)
13837 ;
13838 /* If the input and the output have different Tag_ABI_HardFP_use,
13839 the combination of them is 0 (implied by Tag_FP_arch). */
13840 else if (in_attr[Tag_ABI_HardFP_use].i
13841 != out_attr[Tag_ABI_HardFP_use].i)
13842 out_attr[Tag_ABI_HardFP_use].i = 0;
13843
13844 /* Now we can handle Tag_FP_arch. */
13845
13846 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
13847 pick the biggest. */
13848 if (in_attr[i].i >= VFP_VERSION_COUNT
13849 && in_attr[i].i > out_attr[i].i)
13850 {
13851 out_attr[i] = in_attr[i];
13852 break;
13853 }
13854 /* The output uses the superset of input features
13855 (ISA version) and registers. */
13856 ver = vfp_versions[in_attr[i].i].ver;
13857 if (ver < vfp_versions[out_attr[i].i].ver)
13858 ver = vfp_versions[out_attr[i].i].ver;
13859 regs = vfp_versions[in_attr[i].i].regs;
13860 if (regs < vfp_versions[out_attr[i].i].regs)
13861 regs = vfp_versions[out_attr[i].i].regs;
13862 /* This assumes all possible supersets are also a valid
13863 options. */
13864 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
13865 {
13866 if (regs == vfp_versions[newval].regs
13867 && ver == vfp_versions[newval].ver)
13868 break;
13869 }
13870 out_attr[i].i = newval;
13871 }
13872 break;
13873 case Tag_PCS_config:
13874 if (out_attr[i].i == 0)
13875 out_attr[i].i = in_attr[i].i;
13876 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
13877 {
13878 /* It's sometimes ok to mix different configs, so this is only
13879 a warning. */
13880 _bfd_error_handler
13881 (_("Warning: %B: Conflicting platform configuration"), ibfd);
13882 }
13883 break;
13884 case Tag_ABI_PCS_R9_use:
13885 if (in_attr[i].i != out_attr[i].i
13886 && out_attr[i].i != AEABI_R9_unused
13887 && in_attr[i].i != AEABI_R9_unused)
13888 {
13889 _bfd_error_handler
13890 (_("error: %B: Conflicting use of R9"), ibfd);
13891 result = FALSE;
13892 }
13893 if (out_attr[i].i == AEABI_R9_unused)
13894 out_attr[i].i = in_attr[i].i;
13895 break;
13896 case Tag_ABI_PCS_RW_data:
13897 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
13898 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
13899 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
13900 {
13901 _bfd_error_handler
13902 (_("error: %B: SB relative addressing conflicts with use of R9"),
13903 ibfd);
13904 result = FALSE;
13905 }
13906 /* Use the smallest value specified. */
13907 if (in_attr[i].i < out_attr[i].i)
13908 out_attr[i].i = in_attr[i].i;
13909 break;
13910 case Tag_ABI_PCS_wchar_t:
13911 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
13912 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
13913 {
13914 _bfd_error_handler
13915 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
13916 ibfd, in_attr[i].i, out_attr[i].i);
13917 }
13918 else if (in_attr[i].i && !out_attr[i].i)
13919 out_attr[i].i = in_attr[i].i;
13920 break;
13921 case Tag_ABI_enum_size:
13922 if (in_attr[i].i != AEABI_enum_unused)
13923 {
13924 if (out_attr[i].i == AEABI_enum_unused
13925 || out_attr[i].i == AEABI_enum_forced_wide)
13926 {
13927 /* The existing object is compatible with anything.
13928 Use whatever requirements the new object has. */
13929 out_attr[i].i = in_attr[i].i;
13930 }
13931 else if (in_attr[i].i != AEABI_enum_forced_wide
13932 && out_attr[i].i != in_attr[i].i
13933 && !elf_arm_tdata (obfd)->no_enum_size_warning)
13934 {
13935 static const char *aeabi_enum_names[] =
13936 { "", "variable-size", "32-bit", "" };
13937 const char *in_name =
13938 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13939 ? aeabi_enum_names[in_attr[i].i]
13940 : "<unknown>";
13941 const char *out_name =
13942 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
13943 ? aeabi_enum_names[out_attr[i].i]
13944 : "<unknown>";
13945 _bfd_error_handler
13946 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
13947 ibfd, in_name, out_name);
13948 }
13949 }
13950 break;
13951 case Tag_ABI_VFP_args:
13952 /* Aready done. */
13953 break;
13954 case Tag_ABI_WMMX_args:
13955 if (in_attr[i].i != out_attr[i].i)
13956 {
13957 _bfd_error_handler
13958 (_("error: %B uses iWMMXt register arguments, %B does not"),
13959 ibfd, obfd);
13960 result = FALSE;
13961 }
13962 break;
13963 case Tag_compatibility:
13964 /* Merged in target-independent code. */
13965 break;
13966 case Tag_ABI_HardFP_use:
13967 /* This is handled along with Tag_FP_arch. */
13968 break;
13969 case Tag_ABI_FP_16bit_format:
13970 if (in_attr[i].i != 0 && out_attr[i].i != 0)
13971 {
13972 if (in_attr[i].i != out_attr[i].i)
13973 {
13974 _bfd_error_handler
13975 (_("error: fp16 format mismatch between %B and %B"),
13976 ibfd, obfd);
13977 result = FALSE;
13978 }
13979 }
13980 if (in_attr[i].i != 0)
13981 out_attr[i].i = in_attr[i].i;
13982 break;
13983
13984 case Tag_DIV_use:
13985 /* A value of zero on input means that the divide instruction may
13986 be used if available in the base architecture as specified via
13987 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
13988 the user did not want divide instructions. A value of 2
13989 explicitly means that divide instructions were allowed in ARM
13990 and Thumb state. */
13991 if (in_attr[i].i == out_attr[i].i)
13992 /* Do nothing. */ ;
13993 else if (elf32_arm_attributes_forbid_div (in_attr)
13994 && !elf32_arm_attributes_accept_div (out_attr))
13995 out_attr[i].i = 1;
13996 else if (elf32_arm_attributes_forbid_div (out_attr)
13997 && elf32_arm_attributes_accept_div (in_attr))
13998 out_attr[i].i = in_attr[i].i;
13999 else if (in_attr[i].i == 2)
14000 out_attr[i].i = in_attr[i].i;
14001 break;
14002
14003 case Tag_MPextension_use_legacy:
14004 /* We don't output objects with Tag_MPextension_use_legacy - we
14005 move the value to Tag_MPextension_use. */
14006 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
14007 {
14008 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
14009 {
14010 _bfd_error_handler
14011 (_("%B has has both the current and legacy "
14012 "Tag_MPextension_use attributes"),
14013 ibfd);
14014 result = FALSE;
14015 }
14016 }
14017
14018 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
14019 out_attr[Tag_MPextension_use] = in_attr[i];
14020
14021 break;
14022
14023 case Tag_nodefaults:
14024 /* This tag is set if it exists, but the value is unused (and is
14025 typically zero). We don't actually need to do anything here -
14026 the merge happens automatically when the type flags are merged
14027 below. */
14028 break;
14029 case Tag_also_compatible_with:
14030 /* Already done in Tag_CPU_arch. */
14031 break;
14032 case Tag_conformance:
14033 /* Keep the attribute if it matches. Throw it away otherwise.
14034 No attribute means no claim to conform. */
14035 if (!in_attr[i].s || !out_attr[i].s
14036 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
14037 out_attr[i].s = NULL;
14038 break;
14039
14040 default:
14041 result
14042 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
14043 }
14044
14045 /* If out_attr was copied from in_attr then it won't have a type yet. */
14046 if (in_attr[i].type && !out_attr[i].type)
14047 out_attr[i].type = in_attr[i].type;
14048 }
14049
14050 /* Merge Tag_compatibility attributes and any common GNU ones. */
14051 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
14052 return FALSE;
14053
14054 /* Check for any attributes not known on ARM. */
14055 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
14056
14057 return result;
14058 }
14059
14060
14061 /* Return TRUE if the two EABI versions are incompatible. */
14062
14063 static bfd_boolean
14064 elf32_arm_versions_compatible (unsigned iver, unsigned over)
14065 {
14066 /* v4 and v5 are the same spec before and after it was released,
14067 so allow mixing them. */
14068 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
14069 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
14070 return TRUE;
14071
14072 return (iver == over);
14073 }
14074
14075 /* Merge backend specific data from an object file to the output
14076 object file when linking. */
14077
14078 static bfd_boolean
14079 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
14080
14081 /* Display the flags field. */
14082
14083 static bfd_boolean
14084 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
14085 {
14086 FILE * file = (FILE *) ptr;
14087 unsigned long flags;
14088
14089 BFD_ASSERT (abfd != NULL && ptr != NULL);
14090
14091 /* Print normal ELF private data. */
14092 _bfd_elf_print_private_bfd_data (abfd, ptr);
14093
14094 flags = elf_elfheader (abfd)->e_flags;
14095 /* Ignore init flag - it may not be set, despite the flags field
14096 containing valid data. */
14097
14098 /* xgettext:c-format */
14099 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
14100
14101 switch (EF_ARM_EABI_VERSION (flags))
14102 {
14103 case EF_ARM_EABI_UNKNOWN:
14104 /* The following flag bits are GNU extensions and not part of the
14105 official ARM ELF extended ABI. Hence they are only decoded if
14106 the EABI version is not set. */
14107 if (flags & EF_ARM_INTERWORK)
14108 fprintf (file, _(" [interworking enabled]"));
14109
14110 if (flags & EF_ARM_APCS_26)
14111 fprintf (file, " [APCS-26]");
14112 else
14113 fprintf (file, " [APCS-32]");
14114
14115 if (flags & EF_ARM_VFP_FLOAT)
14116 fprintf (file, _(" [VFP float format]"));
14117 else if (flags & EF_ARM_MAVERICK_FLOAT)
14118 fprintf (file, _(" [Maverick float format]"));
14119 else
14120 fprintf (file, _(" [FPA float format]"));
14121
14122 if (flags & EF_ARM_APCS_FLOAT)
14123 fprintf (file, _(" [floats passed in float registers]"));
14124
14125 if (flags & EF_ARM_PIC)
14126 fprintf (file, _(" [position independent]"));
14127
14128 if (flags & EF_ARM_NEW_ABI)
14129 fprintf (file, _(" [new ABI]"));
14130
14131 if (flags & EF_ARM_OLD_ABI)
14132 fprintf (file, _(" [old ABI]"));
14133
14134 if (flags & EF_ARM_SOFT_FLOAT)
14135 fprintf (file, _(" [software FP]"));
14136
14137 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
14138 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
14139 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
14140 | EF_ARM_MAVERICK_FLOAT);
14141 break;
14142
14143 case EF_ARM_EABI_VER1:
14144 fprintf (file, _(" [Version1 EABI]"));
14145
14146 if (flags & EF_ARM_SYMSARESORTED)
14147 fprintf (file, _(" [sorted symbol table]"));
14148 else
14149 fprintf (file, _(" [unsorted symbol table]"));
14150
14151 flags &= ~ EF_ARM_SYMSARESORTED;
14152 break;
14153
14154 case EF_ARM_EABI_VER2:
14155 fprintf (file, _(" [Version2 EABI]"));
14156
14157 if (flags & EF_ARM_SYMSARESORTED)
14158 fprintf (file, _(" [sorted symbol table]"));
14159 else
14160 fprintf (file, _(" [unsorted symbol table]"));
14161
14162 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
14163 fprintf (file, _(" [dynamic symbols use segment index]"));
14164
14165 if (flags & EF_ARM_MAPSYMSFIRST)
14166 fprintf (file, _(" [mapping symbols precede others]"));
14167
14168 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
14169 | EF_ARM_MAPSYMSFIRST);
14170 break;
14171
14172 case EF_ARM_EABI_VER3:
14173 fprintf (file, _(" [Version3 EABI]"));
14174 break;
14175
14176 case EF_ARM_EABI_VER4:
14177 fprintf (file, _(" [Version4 EABI]"));
14178 goto eabi;
14179
14180 case EF_ARM_EABI_VER5:
14181 fprintf (file, _(" [Version5 EABI]"));
14182
14183 if (flags & EF_ARM_ABI_FLOAT_SOFT)
14184 fprintf (file, _(" [soft-float ABI]"));
14185
14186 if (flags & EF_ARM_ABI_FLOAT_HARD)
14187 fprintf (file, _(" [hard-float ABI]"));
14188
14189 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
14190
14191 eabi:
14192 if (flags & EF_ARM_BE8)
14193 fprintf (file, _(" [BE8]"));
14194
14195 if (flags & EF_ARM_LE8)
14196 fprintf (file, _(" [LE8]"));
14197
14198 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
14199 break;
14200
14201 default:
14202 fprintf (file, _(" <EABI version unrecognised>"));
14203 break;
14204 }
14205
14206 flags &= ~ EF_ARM_EABIMASK;
14207
14208 if (flags & EF_ARM_RELEXEC)
14209 fprintf (file, _(" [relocatable executable]"));
14210
14211 flags &= ~EF_ARM_RELEXEC;
14212
14213 if (flags)
14214 fprintf (file, _("<Unrecognised flag bits set>"));
14215
14216 fputc ('\n', file);
14217
14218 return TRUE;
14219 }
14220
14221 static int
14222 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
14223 {
14224 switch (ELF_ST_TYPE (elf_sym->st_info))
14225 {
14226 case STT_ARM_TFUNC:
14227 return ELF_ST_TYPE (elf_sym->st_info);
14228
14229 case STT_ARM_16BIT:
14230 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
14231 This allows us to distinguish between data used by Thumb instructions
14232 and non-data (which is probably code) inside Thumb regions of an
14233 executable. */
14234 if (type != STT_OBJECT && type != STT_TLS)
14235 return ELF_ST_TYPE (elf_sym->st_info);
14236 break;
14237
14238 default:
14239 break;
14240 }
14241
14242 return type;
14243 }
14244
14245 static asection *
14246 elf32_arm_gc_mark_hook (asection *sec,
14247 struct bfd_link_info *info,
14248 Elf_Internal_Rela *rel,
14249 struct elf_link_hash_entry *h,
14250 Elf_Internal_Sym *sym)
14251 {
14252 if (h != NULL)
14253 switch (ELF32_R_TYPE (rel->r_info))
14254 {
14255 case R_ARM_GNU_VTINHERIT:
14256 case R_ARM_GNU_VTENTRY:
14257 return NULL;
14258 }
14259
14260 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
14261 }
14262
14263 /* Update the got entry reference counts for the section being removed. */
14264
14265 static bfd_boolean
14266 elf32_arm_gc_sweep_hook (bfd * abfd,
14267 struct bfd_link_info * info,
14268 asection * sec,
14269 const Elf_Internal_Rela * relocs)
14270 {
14271 Elf_Internal_Shdr *symtab_hdr;
14272 struct elf_link_hash_entry **sym_hashes;
14273 bfd_signed_vma *local_got_refcounts;
14274 const Elf_Internal_Rela *rel, *relend;
14275 struct elf32_arm_link_hash_table * globals;
14276
14277 if (bfd_link_relocatable (info))
14278 return TRUE;
14279
14280 globals = elf32_arm_hash_table (info);
14281 if (globals == NULL)
14282 return FALSE;
14283
14284 elf_section_data (sec)->local_dynrel = NULL;
14285
14286 symtab_hdr = & elf_symtab_hdr (abfd);
14287 sym_hashes = elf_sym_hashes (abfd);
14288 local_got_refcounts = elf_local_got_refcounts (abfd);
14289
14290 check_use_blx (globals);
14291
14292 relend = relocs + sec->reloc_count;
14293 for (rel = relocs; rel < relend; rel++)
14294 {
14295 unsigned long r_symndx;
14296 struct elf_link_hash_entry *h = NULL;
14297 struct elf32_arm_link_hash_entry *eh;
14298 int r_type;
14299 bfd_boolean call_reloc_p;
14300 bfd_boolean may_become_dynamic_p;
14301 bfd_boolean may_need_local_target_p;
14302 union gotplt_union *root_plt;
14303 struct arm_plt_info *arm_plt;
14304
14305 r_symndx = ELF32_R_SYM (rel->r_info);
14306 if (r_symndx >= symtab_hdr->sh_info)
14307 {
14308 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14309 while (h->root.type == bfd_link_hash_indirect
14310 || h->root.type == bfd_link_hash_warning)
14311 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14312 }
14313 eh = (struct elf32_arm_link_hash_entry *) h;
14314
14315 call_reloc_p = FALSE;
14316 may_become_dynamic_p = FALSE;
14317 may_need_local_target_p = FALSE;
14318
14319 r_type = ELF32_R_TYPE (rel->r_info);
14320 r_type = arm_real_reloc_type (globals, r_type);
14321 switch (r_type)
14322 {
14323 case R_ARM_GOT32:
14324 case R_ARM_GOT_PREL:
14325 case R_ARM_TLS_GD32:
14326 case R_ARM_TLS_IE32:
14327 if (h != NULL)
14328 {
14329 if (h->got.refcount > 0)
14330 h->got.refcount -= 1;
14331 }
14332 else if (local_got_refcounts != NULL)
14333 {
14334 if (local_got_refcounts[r_symndx] > 0)
14335 local_got_refcounts[r_symndx] -= 1;
14336 }
14337 break;
14338
14339 case R_ARM_TLS_LDM32:
14340 globals->tls_ldm_got.refcount -= 1;
14341 break;
14342
14343 case R_ARM_PC24:
14344 case R_ARM_PLT32:
14345 case R_ARM_CALL:
14346 case R_ARM_JUMP24:
14347 case R_ARM_PREL31:
14348 case R_ARM_THM_CALL:
14349 case R_ARM_THM_JUMP24:
14350 case R_ARM_THM_JUMP19:
14351 call_reloc_p = TRUE;
14352 may_need_local_target_p = TRUE;
14353 break;
14354
14355 case R_ARM_ABS12:
14356 if (!globals->vxworks_p)
14357 {
14358 may_need_local_target_p = TRUE;
14359 break;
14360 }
14361 /* Fall through. */
14362 case R_ARM_ABS32:
14363 case R_ARM_ABS32_NOI:
14364 case R_ARM_REL32:
14365 case R_ARM_REL32_NOI:
14366 case R_ARM_MOVW_ABS_NC:
14367 case R_ARM_MOVT_ABS:
14368 case R_ARM_MOVW_PREL_NC:
14369 case R_ARM_MOVT_PREL:
14370 case R_ARM_THM_MOVW_ABS_NC:
14371 case R_ARM_THM_MOVT_ABS:
14372 case R_ARM_THM_MOVW_PREL_NC:
14373 case R_ARM_THM_MOVT_PREL:
14374 /* Should the interworking branches be here also? */
14375 if ((bfd_link_pic (info) || globals->root.is_relocatable_executable)
14376 && (sec->flags & SEC_ALLOC) != 0)
14377 {
14378 if (h == NULL
14379 && elf32_arm_howto_from_type (r_type)->pc_relative)
14380 {
14381 call_reloc_p = TRUE;
14382 may_need_local_target_p = TRUE;
14383 }
14384 else
14385 may_become_dynamic_p = TRUE;
14386 }
14387 else
14388 may_need_local_target_p = TRUE;
14389 break;
14390
14391 default:
14392 break;
14393 }
14394
14395 if (may_need_local_target_p
14396 && elf32_arm_get_plt_info (abfd, globals, eh, r_symndx, &root_plt,
14397 &arm_plt))
14398 {
14399 /* If PLT refcount book-keeping is wrong and too low, we'll
14400 see a zero value (going to -1) for the root PLT reference
14401 count. */
14402 if (root_plt->refcount >= 0)
14403 {
14404 BFD_ASSERT (root_plt->refcount != 0);
14405 root_plt->refcount -= 1;
14406 }
14407 else
14408 /* A value of -1 means the symbol has become local, forced
14409 or seeing a hidden definition. Any other negative value
14410 is an error. */
14411 BFD_ASSERT (root_plt->refcount == -1);
14412
14413 if (!call_reloc_p)
14414 arm_plt->noncall_refcount--;
14415
14416 if (r_type == R_ARM_THM_CALL)
14417 arm_plt->maybe_thumb_refcount--;
14418
14419 if (r_type == R_ARM_THM_JUMP24
14420 || r_type == R_ARM_THM_JUMP19)
14421 arm_plt->thumb_refcount--;
14422 }
14423
14424 if (may_become_dynamic_p)
14425 {
14426 struct elf_dyn_relocs **pp;
14427 struct elf_dyn_relocs *p;
14428
14429 if (h != NULL)
14430 pp = &(eh->dyn_relocs);
14431 else
14432 {
14433 Elf_Internal_Sym *isym;
14434
14435 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
14436 abfd, r_symndx);
14437 if (isym == NULL)
14438 return FALSE;
14439 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14440 if (pp == NULL)
14441 return FALSE;
14442 }
14443 for (; (p = *pp) != NULL; pp = &p->next)
14444 if (p->sec == sec)
14445 {
14446 /* Everything must go for SEC. */
14447 *pp = p->next;
14448 break;
14449 }
14450 }
14451 }
14452
14453 return TRUE;
14454 }
14455
14456 /* Look through the relocs for a section during the first phase. */
14457
14458 static bfd_boolean
14459 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
14460 asection *sec, const Elf_Internal_Rela *relocs)
14461 {
14462 Elf_Internal_Shdr *symtab_hdr;
14463 struct elf_link_hash_entry **sym_hashes;
14464 const Elf_Internal_Rela *rel;
14465 const Elf_Internal_Rela *rel_end;
14466 bfd *dynobj;
14467 asection *sreloc;
14468 struct elf32_arm_link_hash_table *htab;
14469 bfd_boolean call_reloc_p;
14470 bfd_boolean may_become_dynamic_p;
14471 bfd_boolean may_need_local_target_p;
14472 unsigned long nsyms;
14473
14474 if (bfd_link_relocatable (info))
14475 return TRUE;
14476
14477 BFD_ASSERT (is_arm_elf (abfd));
14478
14479 htab = elf32_arm_hash_table (info);
14480 if (htab == NULL)
14481 return FALSE;
14482
14483 sreloc = NULL;
14484
14485 /* Create dynamic sections for relocatable executables so that we can
14486 copy relocations. */
14487 if (htab->root.is_relocatable_executable
14488 && ! htab->root.dynamic_sections_created)
14489 {
14490 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
14491 return FALSE;
14492 }
14493
14494 if (htab->root.dynobj == NULL)
14495 htab->root.dynobj = abfd;
14496 if (!create_ifunc_sections (info))
14497 return FALSE;
14498
14499 dynobj = htab->root.dynobj;
14500
14501 symtab_hdr = & elf_symtab_hdr (abfd);
14502 sym_hashes = elf_sym_hashes (abfd);
14503 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
14504
14505 rel_end = relocs + sec->reloc_count;
14506 for (rel = relocs; rel < rel_end; rel++)
14507 {
14508 Elf_Internal_Sym *isym;
14509 struct elf_link_hash_entry *h;
14510 struct elf32_arm_link_hash_entry *eh;
14511 unsigned long r_symndx;
14512 int r_type;
14513
14514 r_symndx = ELF32_R_SYM (rel->r_info);
14515 r_type = ELF32_R_TYPE (rel->r_info);
14516 r_type = arm_real_reloc_type (htab, r_type);
14517
14518 if (r_symndx >= nsyms
14519 /* PR 9934: It is possible to have relocations that do not
14520 refer to symbols, thus it is also possible to have an
14521 object file containing relocations but no symbol table. */
14522 && (r_symndx > STN_UNDEF || nsyms > 0))
14523 {
14524 _bfd_error_handler (_("%B: bad symbol index: %d"), abfd,
14525 r_symndx);
14526 return FALSE;
14527 }
14528
14529 h = NULL;
14530 isym = NULL;
14531 if (nsyms > 0)
14532 {
14533 if (r_symndx < symtab_hdr->sh_info)
14534 {
14535 /* A local symbol. */
14536 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
14537 abfd, r_symndx);
14538 if (isym == NULL)
14539 return FALSE;
14540 }
14541 else
14542 {
14543 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
14544 while (h->root.type == bfd_link_hash_indirect
14545 || h->root.type == bfd_link_hash_warning)
14546 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14547
14548 /* PR15323, ref flags aren't set for references in the
14549 same object. */
14550 h->root.non_ir_ref = 1;
14551 }
14552 }
14553
14554 eh = (struct elf32_arm_link_hash_entry *) h;
14555
14556 call_reloc_p = FALSE;
14557 may_become_dynamic_p = FALSE;
14558 may_need_local_target_p = FALSE;
14559
14560 /* Could be done earlier, if h were already available. */
14561 r_type = elf32_arm_tls_transition (info, r_type, h);
14562 switch (r_type)
14563 {
14564 case R_ARM_GOT32:
14565 case R_ARM_GOT_PREL:
14566 case R_ARM_TLS_GD32:
14567 case R_ARM_TLS_IE32:
14568 case R_ARM_TLS_GOTDESC:
14569 case R_ARM_TLS_DESCSEQ:
14570 case R_ARM_THM_TLS_DESCSEQ:
14571 case R_ARM_TLS_CALL:
14572 case R_ARM_THM_TLS_CALL:
14573 /* This symbol requires a global offset table entry. */
14574 {
14575 int tls_type, old_tls_type;
14576
14577 switch (r_type)
14578 {
14579 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
14580
14581 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
14582
14583 case R_ARM_TLS_GOTDESC:
14584 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
14585 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
14586 tls_type = GOT_TLS_GDESC; break;
14587
14588 default: tls_type = GOT_NORMAL; break;
14589 }
14590
14591 if (!bfd_link_executable (info) && (tls_type & GOT_TLS_IE))
14592 info->flags |= DF_STATIC_TLS;
14593
14594 if (h != NULL)
14595 {
14596 h->got.refcount++;
14597 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
14598 }
14599 else
14600 {
14601 /* This is a global offset table entry for a local symbol. */
14602 if (!elf32_arm_allocate_local_sym_info (abfd))
14603 return FALSE;
14604 elf_local_got_refcounts (abfd)[r_symndx] += 1;
14605 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
14606 }
14607
14608 /* If a variable is accessed with both tls methods, two
14609 slots may be created. */
14610 if (GOT_TLS_GD_ANY_P (old_tls_type)
14611 && GOT_TLS_GD_ANY_P (tls_type))
14612 tls_type |= old_tls_type;
14613
14614 /* We will already have issued an error message if there
14615 is a TLS/non-TLS mismatch, based on the symbol
14616 type. So just combine any TLS types needed. */
14617 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
14618 && tls_type != GOT_NORMAL)
14619 tls_type |= old_tls_type;
14620
14621 /* If the symbol is accessed in both IE and GDESC
14622 method, we're able to relax. Turn off the GDESC flag,
14623 without messing up with any other kind of tls types
14624 that may be involved. */
14625 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
14626 tls_type &= ~GOT_TLS_GDESC;
14627
14628 if (old_tls_type != tls_type)
14629 {
14630 if (h != NULL)
14631 elf32_arm_hash_entry (h)->tls_type = tls_type;
14632 else
14633 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
14634 }
14635 }
14636 /* Fall through. */
14637
14638 case R_ARM_TLS_LDM32:
14639 if (r_type == R_ARM_TLS_LDM32)
14640 htab->tls_ldm_got.refcount++;
14641 /* Fall through. */
14642
14643 case R_ARM_GOTOFF32:
14644 case R_ARM_GOTPC:
14645 if (htab->root.sgot == NULL
14646 && !create_got_section (htab->root.dynobj, info))
14647 return FALSE;
14648 break;
14649
14650 case R_ARM_PC24:
14651 case R_ARM_PLT32:
14652 case R_ARM_CALL:
14653 case R_ARM_JUMP24:
14654 case R_ARM_PREL31:
14655 case R_ARM_THM_CALL:
14656 case R_ARM_THM_JUMP24:
14657 case R_ARM_THM_JUMP19:
14658 call_reloc_p = TRUE;
14659 may_need_local_target_p = TRUE;
14660 break;
14661
14662 case R_ARM_ABS12:
14663 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
14664 ldr __GOTT_INDEX__ offsets. */
14665 if (!htab->vxworks_p)
14666 {
14667 may_need_local_target_p = TRUE;
14668 break;
14669 }
14670 else goto jump_over;
14671
14672 /* Fall through. */
14673
14674 case R_ARM_MOVW_ABS_NC:
14675 case R_ARM_MOVT_ABS:
14676 case R_ARM_THM_MOVW_ABS_NC:
14677 case R_ARM_THM_MOVT_ABS:
14678 if (bfd_link_pic (info))
14679 {
14680 _bfd_error_handler
14681 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
14682 abfd, elf32_arm_howto_table_1[r_type].name,
14683 (h) ? h->root.root.string : "a local symbol");
14684 bfd_set_error (bfd_error_bad_value);
14685 return FALSE;
14686 }
14687
14688 /* Fall through. */
14689 case R_ARM_ABS32:
14690 case R_ARM_ABS32_NOI:
14691 jump_over:
14692 if (h != NULL && bfd_link_executable (info))
14693 {
14694 h->pointer_equality_needed = 1;
14695 }
14696 /* Fall through. */
14697 case R_ARM_REL32:
14698 case R_ARM_REL32_NOI:
14699 case R_ARM_MOVW_PREL_NC:
14700 case R_ARM_MOVT_PREL:
14701 case R_ARM_THM_MOVW_PREL_NC:
14702 case R_ARM_THM_MOVT_PREL:
14703
14704 /* Should the interworking branches be listed here? */
14705 if ((bfd_link_pic (info) || htab->root.is_relocatable_executable)
14706 && (sec->flags & SEC_ALLOC) != 0)
14707 {
14708 if (h == NULL
14709 && elf32_arm_howto_from_type (r_type)->pc_relative)
14710 {
14711 /* In shared libraries and relocatable executables,
14712 we treat local relative references as calls;
14713 see the related SYMBOL_CALLS_LOCAL code in
14714 allocate_dynrelocs. */
14715 call_reloc_p = TRUE;
14716 may_need_local_target_p = TRUE;
14717 }
14718 else
14719 /* We are creating a shared library or relocatable
14720 executable, and this is a reloc against a global symbol,
14721 or a non-PC-relative reloc against a local symbol.
14722 We may need to copy the reloc into the output. */
14723 may_become_dynamic_p = TRUE;
14724 }
14725 else
14726 may_need_local_target_p = TRUE;
14727 break;
14728
14729 /* This relocation describes the C++ object vtable hierarchy.
14730 Reconstruct it for later use during GC. */
14731 case R_ARM_GNU_VTINHERIT:
14732 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
14733 return FALSE;
14734 break;
14735
14736 /* This relocation describes which C++ vtable entries are actually
14737 used. Record for later use during GC. */
14738 case R_ARM_GNU_VTENTRY:
14739 BFD_ASSERT (h != NULL);
14740 if (h != NULL
14741 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
14742 return FALSE;
14743 break;
14744 }
14745
14746 if (h != NULL)
14747 {
14748 if (call_reloc_p)
14749 /* We may need a .plt entry if the function this reloc
14750 refers to is in a different object, regardless of the
14751 symbol's type. We can't tell for sure yet, because
14752 something later might force the symbol local. */
14753 h->needs_plt = 1;
14754 else if (may_need_local_target_p)
14755 /* If this reloc is in a read-only section, we might
14756 need a copy reloc. We can't check reliably at this
14757 stage whether the section is read-only, as input
14758 sections have not yet been mapped to output sections.
14759 Tentatively set the flag for now, and correct in
14760 adjust_dynamic_symbol. */
14761 h->non_got_ref = 1;
14762 }
14763
14764 if (may_need_local_target_p
14765 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
14766 {
14767 union gotplt_union *root_plt;
14768 struct arm_plt_info *arm_plt;
14769 struct arm_local_iplt_info *local_iplt;
14770
14771 if (h != NULL)
14772 {
14773 root_plt = &h->plt;
14774 arm_plt = &eh->plt;
14775 }
14776 else
14777 {
14778 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
14779 if (local_iplt == NULL)
14780 return FALSE;
14781 root_plt = &local_iplt->root;
14782 arm_plt = &local_iplt->arm;
14783 }
14784
14785 /* If the symbol is a function that doesn't bind locally,
14786 this relocation will need a PLT entry. */
14787 if (root_plt->refcount != -1)
14788 root_plt->refcount += 1;
14789
14790 if (!call_reloc_p)
14791 arm_plt->noncall_refcount++;
14792
14793 /* It's too early to use htab->use_blx here, so we have to
14794 record possible blx references separately from
14795 relocs that definitely need a thumb stub. */
14796
14797 if (r_type == R_ARM_THM_CALL)
14798 arm_plt->maybe_thumb_refcount += 1;
14799
14800 if (r_type == R_ARM_THM_JUMP24
14801 || r_type == R_ARM_THM_JUMP19)
14802 arm_plt->thumb_refcount += 1;
14803 }
14804
14805 if (may_become_dynamic_p)
14806 {
14807 struct elf_dyn_relocs *p, **head;
14808
14809 /* Create a reloc section in dynobj. */
14810 if (sreloc == NULL)
14811 {
14812 sreloc = _bfd_elf_make_dynamic_reloc_section
14813 (sec, dynobj, 2, abfd, ! htab->use_rel);
14814
14815 if (sreloc == NULL)
14816 return FALSE;
14817
14818 /* BPABI objects never have dynamic relocations mapped. */
14819 if (htab->symbian_p)
14820 {
14821 flagword flags;
14822
14823 flags = bfd_get_section_flags (dynobj, sreloc);
14824 flags &= ~(SEC_LOAD | SEC_ALLOC);
14825 bfd_set_section_flags (dynobj, sreloc, flags);
14826 }
14827 }
14828
14829 /* If this is a global symbol, count the number of
14830 relocations we need for this symbol. */
14831 if (h != NULL)
14832 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
14833 else
14834 {
14835 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
14836 if (head == NULL)
14837 return FALSE;
14838 }
14839
14840 p = *head;
14841 if (p == NULL || p->sec != sec)
14842 {
14843 bfd_size_type amt = sizeof *p;
14844
14845 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
14846 if (p == NULL)
14847 return FALSE;
14848 p->next = *head;
14849 *head = p;
14850 p->sec = sec;
14851 p->count = 0;
14852 p->pc_count = 0;
14853 }
14854
14855 if (elf32_arm_howto_from_type (r_type)->pc_relative)
14856 p->pc_count += 1;
14857 p->count += 1;
14858 }
14859 }
14860
14861 return TRUE;
14862 }
14863
14864 static void
14865 elf32_arm_update_relocs (asection *o,
14866 struct bfd_elf_section_reloc_data *reldata)
14867 {
14868 void (*swap_in) (bfd *, const bfd_byte *, Elf_Internal_Rela *);
14869 void (*swap_out) (bfd *, const Elf_Internal_Rela *, bfd_byte *);
14870 const struct elf_backend_data *bed;
14871 _arm_elf_section_data *eado;
14872 struct bfd_link_order *p;
14873 bfd_byte *erela_head, *erela;
14874 Elf_Internal_Rela *irela_head, *irela;
14875 Elf_Internal_Shdr *rel_hdr;
14876 bfd *abfd;
14877 unsigned int count;
14878
14879 eado = get_arm_elf_section_data (o);
14880
14881 if (!eado || eado->elf.this_hdr.sh_type != SHT_ARM_EXIDX)
14882 return;
14883
14884 abfd = o->owner;
14885 bed = get_elf_backend_data (abfd);
14886 rel_hdr = reldata->hdr;
14887
14888 if (rel_hdr->sh_entsize == bed->s->sizeof_rel)
14889 {
14890 swap_in = bed->s->swap_reloc_in;
14891 swap_out = bed->s->swap_reloc_out;
14892 }
14893 else if (rel_hdr->sh_entsize == bed->s->sizeof_rela)
14894 {
14895 swap_in = bed->s->swap_reloca_in;
14896 swap_out = bed->s->swap_reloca_out;
14897 }
14898 else
14899 abort ();
14900
14901 erela_head = rel_hdr->contents;
14902 irela_head = (Elf_Internal_Rela *) bfd_zmalloc
14903 ((NUM_SHDR_ENTRIES (rel_hdr) + 1) * sizeof (*irela_head));
14904
14905 erela = erela_head;
14906 irela = irela_head;
14907 count = 0;
14908
14909 for (p = o->map_head.link_order; p; p = p->next)
14910 {
14911 if (p->type == bfd_section_reloc_link_order
14912 || p->type == bfd_symbol_reloc_link_order)
14913 {
14914 (*swap_in) (abfd, erela, irela);
14915 erela += rel_hdr->sh_entsize;
14916 irela++;
14917 count++;
14918 }
14919 else if (p->type == bfd_indirect_link_order)
14920 {
14921 struct bfd_elf_section_reloc_data *input_reldata;
14922 arm_unwind_table_edit *edit_list, *edit_tail;
14923 _arm_elf_section_data *eadi;
14924 bfd_size_type j;
14925 bfd_vma offset;
14926 asection *i;
14927
14928 i = p->u.indirect.section;
14929
14930 eadi = get_arm_elf_section_data (i);
14931 edit_list = eadi->u.exidx.unwind_edit_list;
14932 edit_tail = eadi->u.exidx.unwind_edit_tail;
14933 offset = o->vma + i->output_offset;
14934
14935 if (eadi->elf.rel.hdr &&
14936 eadi->elf.rel.hdr->sh_entsize == rel_hdr->sh_entsize)
14937 input_reldata = &eadi->elf.rel;
14938 else if (eadi->elf.rela.hdr &&
14939 eadi->elf.rela.hdr->sh_entsize == rel_hdr->sh_entsize)
14940 input_reldata = &eadi->elf.rela;
14941 else
14942 abort ();
14943
14944 if (edit_list)
14945 {
14946 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14947 {
14948 arm_unwind_table_edit *edit_node, *edit_next;
14949 bfd_vma bias;
14950 bfd_vma index;
14951
14952 (*swap_in) (abfd, erela, irela);
14953 index = (irela->r_offset - offset) / 8;
14954
14955 bias = 0;
14956 edit_node = edit_list;
14957 for (edit_next = edit_list;
14958 edit_next && edit_next->index <= index;
14959 edit_next = edit_node->next)
14960 {
14961 bias++;
14962 edit_node = edit_next;
14963 }
14964
14965 if (edit_node->type != DELETE_EXIDX_ENTRY
14966 || edit_node->index != index)
14967 {
14968 irela->r_offset -= bias * 8;
14969 irela++;
14970 count++;
14971 }
14972
14973 erela += rel_hdr->sh_entsize;
14974 }
14975
14976 if (edit_tail->type == INSERT_EXIDX_CANTUNWIND_AT_END)
14977 {
14978 /* New relocation entity. */
14979 asection *text_sec = edit_tail->linked_section;
14980 asection *text_out = text_sec->output_section;
14981 bfd_vma exidx_offset = offset + i->size - 8;
14982
14983 irela->r_addend = 0;
14984 irela->r_offset = exidx_offset;
14985 irela->r_info = ELF32_R_INFO
14986 (text_out->target_index, R_ARM_PREL31);
14987 irela++;
14988 count++;
14989 }
14990 }
14991 else
14992 {
14993 for (j = 0; j < NUM_SHDR_ENTRIES (input_reldata->hdr); j++)
14994 {
14995 (*swap_in) (abfd, erela, irela);
14996 erela += rel_hdr->sh_entsize;
14997 irela++;
14998 }
14999
15000 count += NUM_SHDR_ENTRIES (input_reldata->hdr);
15001 }
15002 }
15003 }
15004
15005 reldata->count = count;
15006 rel_hdr->sh_size = count * rel_hdr->sh_entsize;
15007
15008 erela = erela_head;
15009 irela = irela_head;
15010 while (count > 0)
15011 {
15012 (*swap_out) (abfd, irela, erela);
15013 erela += rel_hdr->sh_entsize;
15014 irela++;
15015 count--;
15016 }
15017
15018 free (irela_head);
15019
15020 /* Hashes are no longer valid. */
15021 free (reldata->hashes);
15022 reldata->hashes = NULL;
15023 }
15024
15025 /* Unwinding tables are not referenced directly. This pass marks them as
15026 required if the corresponding code section is marked. Similarly, ARMv8-M
15027 secure entry functions can only be referenced by SG veneers which are
15028 created after the GC process. They need to be marked in case they reside in
15029 their own section (as would be the case if code was compiled with
15030 -ffunction-sections). */
15031
15032 static bfd_boolean
15033 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
15034 elf_gc_mark_hook_fn gc_mark_hook)
15035 {
15036 bfd *sub;
15037 Elf_Internal_Shdr **elf_shdrp;
15038 asection *cmse_sec;
15039 obj_attribute *out_attr;
15040 Elf_Internal_Shdr *symtab_hdr;
15041 unsigned i, sym_count, ext_start;
15042 const struct elf_backend_data *bed;
15043 struct elf_link_hash_entry **sym_hashes;
15044 struct elf32_arm_link_hash_entry *cmse_hash;
15045 bfd_boolean again, is_v8m, first_bfd_browse = TRUE;
15046
15047 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
15048
15049 out_attr = elf_known_obj_attributes_proc (info->output_bfd);
15050 is_v8m = out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V8M_BASE
15051 && out_attr[Tag_CPU_arch_profile].i == 'M';
15052
15053 /* Marking EH data may cause additional code sections to be marked,
15054 requiring multiple passes. */
15055 again = TRUE;
15056 while (again)
15057 {
15058 again = FALSE;
15059 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
15060 {
15061 asection *o;
15062
15063 if (! is_arm_elf (sub))
15064 continue;
15065
15066 elf_shdrp = elf_elfsections (sub);
15067 for (o = sub->sections; o != NULL; o = o->next)
15068 {
15069 Elf_Internal_Shdr *hdr;
15070
15071 hdr = &elf_section_data (o)->this_hdr;
15072 if (hdr->sh_type == SHT_ARM_EXIDX
15073 && hdr->sh_link
15074 && hdr->sh_link < elf_numsections (sub)
15075 && !o->gc_mark
15076 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
15077 {
15078 again = TRUE;
15079 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
15080 return FALSE;
15081 }
15082 }
15083
15084 /* Mark section holding ARMv8-M secure entry functions. We mark all
15085 of them so no need for a second browsing. */
15086 if (is_v8m && first_bfd_browse)
15087 {
15088 sym_hashes = elf_sym_hashes (sub);
15089 bed = get_elf_backend_data (sub);
15090 symtab_hdr = &elf_tdata (sub)->symtab_hdr;
15091 sym_count = symtab_hdr->sh_size / bed->s->sizeof_sym;
15092 ext_start = symtab_hdr->sh_info;
15093
15094 /* Scan symbols. */
15095 for (i = ext_start; i < sym_count; i++)
15096 {
15097 cmse_hash = elf32_arm_hash_entry (sym_hashes[i - ext_start]);
15098
15099 /* Assume it is a special symbol. If not, cmse_scan will
15100 warn about it and user can do something about it. */
15101 if (ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
15102 {
15103 cmse_sec = cmse_hash->root.root.u.def.section;
15104 if (!cmse_sec->gc_mark
15105 && !_bfd_elf_gc_mark (info, cmse_sec, gc_mark_hook))
15106 return FALSE;
15107 }
15108 }
15109 }
15110 }
15111 first_bfd_browse = FALSE;
15112 }
15113
15114 return TRUE;
15115 }
15116
15117 /* Treat mapping symbols as special target symbols. */
15118
15119 static bfd_boolean
15120 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
15121 {
15122 return bfd_is_arm_special_symbol_name (sym->name,
15123 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
15124 }
15125
15126 /* This is a copy of elf_find_function() from elf.c except that
15127 ARM mapping symbols are ignored when looking for function names
15128 and STT_ARM_TFUNC is considered to a function type. */
15129
15130 static bfd_boolean
15131 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
15132 asymbol ** symbols,
15133 asection * section,
15134 bfd_vma offset,
15135 const char ** filename_ptr,
15136 const char ** functionname_ptr)
15137 {
15138 const char * filename = NULL;
15139 asymbol * func = NULL;
15140 bfd_vma low_func = 0;
15141 asymbol ** p;
15142
15143 for (p = symbols; *p != NULL; p++)
15144 {
15145 elf_symbol_type *q;
15146
15147 q = (elf_symbol_type *) *p;
15148
15149 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
15150 {
15151 default:
15152 break;
15153 case STT_FILE:
15154 filename = bfd_asymbol_name (&q->symbol);
15155 break;
15156 case STT_FUNC:
15157 case STT_ARM_TFUNC:
15158 case STT_NOTYPE:
15159 /* Skip mapping symbols. */
15160 if ((q->symbol.flags & BSF_LOCAL)
15161 && bfd_is_arm_special_symbol_name (q->symbol.name,
15162 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
15163 continue;
15164 /* Fall through. */
15165 if (bfd_get_section (&q->symbol) == section
15166 && q->symbol.value >= low_func
15167 && q->symbol.value <= offset)
15168 {
15169 func = (asymbol *) q;
15170 low_func = q->symbol.value;
15171 }
15172 break;
15173 }
15174 }
15175
15176 if (func == NULL)
15177 return FALSE;
15178
15179 if (filename_ptr)
15180 *filename_ptr = filename;
15181 if (functionname_ptr)
15182 *functionname_ptr = bfd_asymbol_name (func);
15183
15184 return TRUE;
15185 }
15186
15187
15188 /* Find the nearest line to a particular section and offset, for error
15189 reporting. This code is a duplicate of the code in elf.c, except
15190 that it uses arm_elf_find_function. */
15191
15192 static bfd_boolean
15193 elf32_arm_find_nearest_line (bfd * abfd,
15194 asymbol ** symbols,
15195 asection * section,
15196 bfd_vma offset,
15197 const char ** filename_ptr,
15198 const char ** functionname_ptr,
15199 unsigned int * line_ptr,
15200 unsigned int * discriminator_ptr)
15201 {
15202 bfd_boolean found = FALSE;
15203
15204 if (_bfd_dwarf2_find_nearest_line (abfd, symbols, NULL, section, offset,
15205 filename_ptr, functionname_ptr,
15206 line_ptr, discriminator_ptr,
15207 dwarf_debug_sections, 0,
15208 & elf_tdata (abfd)->dwarf2_find_line_info))
15209 {
15210 if (!*functionname_ptr)
15211 arm_elf_find_function (abfd, symbols, section, offset,
15212 *filename_ptr ? NULL : filename_ptr,
15213 functionname_ptr);
15214
15215 return TRUE;
15216 }
15217
15218 /* Skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain
15219 uses DWARF1. */
15220
15221 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
15222 & found, filename_ptr,
15223 functionname_ptr, line_ptr,
15224 & elf_tdata (abfd)->line_info))
15225 return FALSE;
15226
15227 if (found && (*functionname_ptr || *line_ptr))
15228 return TRUE;
15229
15230 if (symbols == NULL)
15231 return FALSE;
15232
15233 if (! arm_elf_find_function (abfd, symbols, section, offset,
15234 filename_ptr, functionname_ptr))
15235 return FALSE;
15236
15237 *line_ptr = 0;
15238 return TRUE;
15239 }
15240
15241 static bfd_boolean
15242 elf32_arm_find_inliner_info (bfd * abfd,
15243 const char ** filename_ptr,
15244 const char ** functionname_ptr,
15245 unsigned int * line_ptr)
15246 {
15247 bfd_boolean found;
15248 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
15249 functionname_ptr, line_ptr,
15250 & elf_tdata (abfd)->dwarf2_find_line_info);
15251 return found;
15252 }
15253
15254 /* Adjust a symbol defined by a dynamic object and referenced by a
15255 regular object. The current definition is in some section of the
15256 dynamic object, but we're not including those sections. We have to
15257 change the definition to something the rest of the link can
15258 understand. */
15259
15260 static bfd_boolean
15261 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
15262 struct elf_link_hash_entry * h)
15263 {
15264 bfd * dynobj;
15265 asection * s;
15266 struct elf32_arm_link_hash_entry * eh;
15267 struct elf32_arm_link_hash_table *globals;
15268
15269 globals = elf32_arm_hash_table (info);
15270 if (globals == NULL)
15271 return FALSE;
15272
15273 dynobj = elf_hash_table (info)->dynobj;
15274
15275 /* Make sure we know what is going on here. */
15276 BFD_ASSERT (dynobj != NULL
15277 && (h->needs_plt
15278 || h->type == STT_GNU_IFUNC
15279 || h->u.weakdef != NULL
15280 || (h->def_dynamic
15281 && h->ref_regular
15282 && !h->def_regular)));
15283
15284 eh = (struct elf32_arm_link_hash_entry *) h;
15285
15286 /* If this is a function, put it in the procedure linkage table. We
15287 will fill in the contents of the procedure linkage table later,
15288 when we know the address of the .got section. */
15289 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
15290 {
15291 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
15292 symbol binds locally. */
15293 if (h->plt.refcount <= 0
15294 || (h->type != STT_GNU_IFUNC
15295 && (SYMBOL_CALLS_LOCAL (info, h)
15296 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
15297 && h->root.type == bfd_link_hash_undefweak))))
15298 {
15299 /* This case can occur if we saw a PLT32 reloc in an input
15300 file, but the symbol was never referred to by a dynamic
15301 object, or if all references were garbage collected. In
15302 such a case, we don't actually need to build a procedure
15303 linkage table, and we can just do a PC24 reloc instead. */
15304 h->plt.offset = (bfd_vma) -1;
15305 eh->plt.thumb_refcount = 0;
15306 eh->plt.maybe_thumb_refcount = 0;
15307 eh->plt.noncall_refcount = 0;
15308 h->needs_plt = 0;
15309 }
15310
15311 return TRUE;
15312 }
15313 else
15314 {
15315 /* It's possible that we incorrectly decided a .plt reloc was
15316 needed for an R_ARM_PC24 or similar reloc to a non-function sym
15317 in check_relocs. We can't decide accurately between function
15318 and non-function syms in check-relocs; Objects loaded later in
15319 the link may change h->type. So fix it now. */
15320 h->plt.offset = (bfd_vma) -1;
15321 eh->plt.thumb_refcount = 0;
15322 eh->plt.maybe_thumb_refcount = 0;
15323 eh->plt.noncall_refcount = 0;
15324 }
15325
15326 /* If this is a weak symbol, and there is a real definition, the
15327 processor independent code will have arranged for us to see the
15328 real definition first, and we can just use the same value. */
15329 if (h->u.weakdef != NULL)
15330 {
15331 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
15332 || h->u.weakdef->root.type == bfd_link_hash_defweak);
15333 h->root.u.def.section = h->u.weakdef->root.u.def.section;
15334 h->root.u.def.value = h->u.weakdef->root.u.def.value;
15335 return TRUE;
15336 }
15337
15338 /* If there are no non-GOT references, we do not need a copy
15339 relocation. */
15340 if (!h->non_got_ref)
15341 return TRUE;
15342
15343 /* This is a reference to a symbol defined by a dynamic object which
15344 is not a function. */
15345
15346 /* If we are creating a shared library, we must presume that the
15347 only references to the symbol are via the global offset table.
15348 For such cases we need not do anything here; the relocations will
15349 be handled correctly by relocate_section. Relocatable executables
15350 can reference data in shared objects directly, so we don't need to
15351 do anything here. */
15352 if (bfd_link_pic (info) || globals->root.is_relocatable_executable)
15353 return TRUE;
15354
15355 /* We must allocate the symbol in our .dynbss section, which will
15356 become part of the .bss section of the executable. There will be
15357 an entry for this symbol in the .dynsym section. The dynamic
15358 object will contain position independent code, so all references
15359 from the dynamic object to this symbol will go through the global
15360 offset table. The dynamic linker will use the .dynsym entry to
15361 determine the address it must put in the global offset table, so
15362 both the dynamic object and the regular object will refer to the
15363 same memory location for the variable. */
15364 s = bfd_get_linker_section (dynobj, ".dynbss");
15365 BFD_ASSERT (s != NULL);
15366
15367 /* If allowed, we must generate a R_ARM_COPY reloc to tell the dynamic
15368 linker to copy the initial value out of the dynamic object and into
15369 the runtime process image. We need to remember the offset into the
15370 .rel(a).bss section we are going to use. */
15371 if (info->nocopyreloc == 0
15372 && (h->root.u.def.section->flags & SEC_ALLOC) != 0
15373 && h->size != 0)
15374 {
15375 asection *srel;
15376
15377 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
15378 elf32_arm_allocate_dynrelocs (info, srel, 1);
15379 h->needs_copy = 1;
15380 }
15381
15382 return _bfd_elf_adjust_dynamic_copy (info, h, s);
15383 }
15384
15385 /* Allocate space in .plt, .got and associated reloc sections for
15386 dynamic relocs. */
15387
15388 static bfd_boolean
15389 allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
15390 {
15391 struct bfd_link_info *info;
15392 struct elf32_arm_link_hash_table *htab;
15393 struct elf32_arm_link_hash_entry *eh;
15394 struct elf_dyn_relocs *p;
15395
15396 if (h->root.type == bfd_link_hash_indirect)
15397 return TRUE;
15398
15399 eh = (struct elf32_arm_link_hash_entry *) h;
15400
15401 info = (struct bfd_link_info *) inf;
15402 htab = elf32_arm_hash_table (info);
15403 if (htab == NULL)
15404 return FALSE;
15405
15406 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
15407 && h->plt.refcount > 0)
15408 {
15409 /* Make sure this symbol is output as a dynamic symbol.
15410 Undefined weak syms won't yet be marked as dynamic. */
15411 if (h->dynindx == -1
15412 && !h->forced_local)
15413 {
15414 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15415 return FALSE;
15416 }
15417
15418 /* If the call in the PLT entry binds locally, the associated
15419 GOT entry should use an R_ARM_IRELATIVE relocation instead of
15420 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
15421 than the .plt section. */
15422 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
15423 {
15424 eh->is_iplt = 1;
15425 if (eh->plt.noncall_refcount == 0
15426 && SYMBOL_REFERENCES_LOCAL (info, h))
15427 /* All non-call references can be resolved directly.
15428 This means that they can (and in some cases, must)
15429 resolve directly to the run-time target, rather than
15430 to the PLT. That in turns means that any .got entry
15431 would be equal to the .igot.plt entry, so there's
15432 no point having both. */
15433 h->got.refcount = 0;
15434 }
15435
15436 if (bfd_link_pic (info)
15437 || eh->is_iplt
15438 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
15439 {
15440 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
15441
15442 /* If this symbol is not defined in a regular file, and we are
15443 not generating a shared library, then set the symbol to this
15444 location in the .plt. This is required to make function
15445 pointers compare as equal between the normal executable and
15446 the shared library. */
15447 if (! bfd_link_pic (info)
15448 && !h->def_regular)
15449 {
15450 h->root.u.def.section = htab->root.splt;
15451 h->root.u.def.value = h->plt.offset;
15452
15453 /* Make sure the function is not marked as Thumb, in case
15454 it is the target of an ABS32 relocation, which will
15455 point to the PLT entry. */
15456 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15457 }
15458
15459 /* VxWorks executables have a second set of relocations for
15460 each PLT entry. They go in a separate relocation section,
15461 which is processed by the kernel loader. */
15462 if (htab->vxworks_p && !bfd_link_pic (info))
15463 {
15464 /* There is a relocation for the initial PLT entry:
15465 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
15466 if (h->plt.offset == htab->plt_header_size)
15467 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
15468
15469 /* There are two extra relocations for each subsequent
15470 PLT entry: an R_ARM_32 relocation for the GOT entry,
15471 and an R_ARM_32 relocation for the PLT entry. */
15472 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
15473 }
15474 }
15475 else
15476 {
15477 h->plt.offset = (bfd_vma) -1;
15478 h->needs_plt = 0;
15479 }
15480 }
15481 else
15482 {
15483 h->plt.offset = (bfd_vma) -1;
15484 h->needs_plt = 0;
15485 }
15486
15487 eh = (struct elf32_arm_link_hash_entry *) h;
15488 eh->tlsdesc_got = (bfd_vma) -1;
15489
15490 if (h->got.refcount > 0)
15491 {
15492 asection *s;
15493 bfd_boolean dyn;
15494 int tls_type = elf32_arm_hash_entry (h)->tls_type;
15495 int indx;
15496
15497 /* Make sure this symbol is output as a dynamic symbol.
15498 Undefined weak syms won't yet be marked as dynamic. */
15499 if (h->dynindx == -1
15500 && !h->forced_local)
15501 {
15502 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15503 return FALSE;
15504 }
15505
15506 if (!htab->symbian_p)
15507 {
15508 s = htab->root.sgot;
15509 h->got.offset = s->size;
15510
15511 if (tls_type == GOT_UNKNOWN)
15512 abort ();
15513
15514 if (tls_type == GOT_NORMAL)
15515 /* Non-TLS symbols need one GOT slot. */
15516 s->size += 4;
15517 else
15518 {
15519 if (tls_type & GOT_TLS_GDESC)
15520 {
15521 /* R_ARM_TLS_DESC needs 2 GOT slots. */
15522 eh->tlsdesc_got
15523 = (htab->root.sgotplt->size
15524 - elf32_arm_compute_jump_table_size (htab));
15525 htab->root.sgotplt->size += 8;
15526 h->got.offset = (bfd_vma) -2;
15527 /* plt.got_offset needs to know there's a TLS_DESC
15528 reloc in the middle of .got.plt. */
15529 htab->num_tls_desc++;
15530 }
15531
15532 if (tls_type & GOT_TLS_GD)
15533 {
15534 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
15535 the symbol is both GD and GDESC, got.offset may
15536 have been overwritten. */
15537 h->got.offset = s->size;
15538 s->size += 8;
15539 }
15540
15541 if (tls_type & GOT_TLS_IE)
15542 /* R_ARM_TLS_IE32 needs one GOT slot. */
15543 s->size += 4;
15544 }
15545
15546 dyn = htab->root.dynamic_sections_created;
15547
15548 indx = 0;
15549 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
15550 bfd_link_pic (info),
15551 h)
15552 && (!bfd_link_pic (info)
15553 || !SYMBOL_REFERENCES_LOCAL (info, h)))
15554 indx = h->dynindx;
15555
15556 if (tls_type != GOT_NORMAL
15557 && (bfd_link_pic (info) || indx != 0)
15558 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15559 || h->root.type != bfd_link_hash_undefweak))
15560 {
15561 if (tls_type & GOT_TLS_IE)
15562 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15563
15564 if (tls_type & GOT_TLS_GD)
15565 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15566
15567 if (tls_type & GOT_TLS_GDESC)
15568 {
15569 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
15570 /* GDESC needs a trampoline to jump to. */
15571 htab->tls_trampoline = -1;
15572 }
15573
15574 /* Only GD needs it. GDESC just emits one relocation per
15575 2 entries. */
15576 if ((tls_type & GOT_TLS_GD) && indx != 0)
15577 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15578 }
15579 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
15580 {
15581 if (htab->root.dynamic_sections_created)
15582 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
15583 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15584 }
15585 else if (h->type == STT_GNU_IFUNC
15586 && eh->plt.noncall_refcount == 0)
15587 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
15588 they all resolve dynamically instead. Reserve room for the
15589 GOT entry's R_ARM_IRELATIVE relocation. */
15590 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
15591 else if (bfd_link_pic (info)
15592 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
15593 || h->root.type != bfd_link_hash_undefweak))
15594 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
15595 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15596 }
15597 }
15598 else
15599 h->got.offset = (bfd_vma) -1;
15600
15601 /* Allocate stubs for exported Thumb functions on v4t. */
15602 if (!htab->use_blx && h->dynindx != -1
15603 && h->def_regular
15604 && ARM_GET_SYM_BRANCH_TYPE (h->target_internal) == ST_BRANCH_TO_THUMB
15605 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
15606 {
15607 struct elf_link_hash_entry * th;
15608 struct bfd_link_hash_entry * bh;
15609 struct elf_link_hash_entry * myh;
15610 char name[1024];
15611 asection *s;
15612 bh = NULL;
15613 /* Create a new symbol to regist the real location of the function. */
15614 s = h->root.u.def.section;
15615 sprintf (name, "__real_%s", h->root.root.string);
15616 _bfd_generic_link_add_one_symbol (info, s->owner,
15617 name, BSF_GLOBAL, s,
15618 h->root.u.def.value,
15619 NULL, TRUE, FALSE, &bh);
15620
15621 myh = (struct elf_link_hash_entry *) bh;
15622 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
15623 myh->forced_local = 1;
15624 ARM_SET_SYM_BRANCH_TYPE (myh->target_internal, ST_BRANCH_TO_THUMB);
15625 eh->export_glue = myh;
15626 th = record_arm_to_thumb_glue (info, h);
15627 /* Point the symbol at the stub. */
15628 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
15629 ARM_SET_SYM_BRANCH_TYPE (h->target_internal, ST_BRANCH_TO_ARM);
15630 h->root.u.def.section = th->root.u.def.section;
15631 h->root.u.def.value = th->root.u.def.value & ~1;
15632 }
15633
15634 if (eh->dyn_relocs == NULL)
15635 return TRUE;
15636
15637 /* In the shared -Bsymbolic case, discard space allocated for
15638 dynamic pc-relative relocs against symbols which turn out to be
15639 defined in regular objects. For the normal shared case, discard
15640 space for pc-relative relocs that have become local due to symbol
15641 visibility changes. */
15642
15643 if (bfd_link_pic (info) || htab->root.is_relocatable_executable)
15644 {
15645 /* Relocs that use pc_count are PC-relative forms, which will appear
15646 on something like ".long foo - ." or "movw REG, foo - .". We want
15647 calls to protected symbols to resolve directly to the function
15648 rather than going via the plt. If people want function pointer
15649 comparisons to work as expected then they should avoid writing
15650 assembly like ".long foo - .". */
15651 if (SYMBOL_CALLS_LOCAL (info, h))
15652 {
15653 struct elf_dyn_relocs **pp;
15654
15655 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15656 {
15657 p->count -= p->pc_count;
15658 p->pc_count = 0;
15659 if (p->count == 0)
15660 *pp = p->next;
15661 else
15662 pp = &p->next;
15663 }
15664 }
15665
15666 if (htab->vxworks_p)
15667 {
15668 struct elf_dyn_relocs **pp;
15669
15670 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
15671 {
15672 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
15673 *pp = p->next;
15674 else
15675 pp = &p->next;
15676 }
15677 }
15678
15679 /* Also discard relocs on undefined weak syms with non-default
15680 visibility. */
15681 if (eh->dyn_relocs != NULL
15682 && h->root.type == bfd_link_hash_undefweak)
15683 {
15684 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
15685 eh->dyn_relocs = NULL;
15686
15687 /* Make sure undefined weak symbols are output as a dynamic
15688 symbol in PIEs. */
15689 else if (h->dynindx == -1
15690 && !h->forced_local)
15691 {
15692 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15693 return FALSE;
15694 }
15695 }
15696
15697 else if (htab->root.is_relocatable_executable && h->dynindx == -1
15698 && h->root.type == bfd_link_hash_new)
15699 {
15700 /* Output absolute symbols so that we can create relocations
15701 against them. For normal symbols we output a relocation
15702 against the section that contains them. */
15703 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15704 return FALSE;
15705 }
15706
15707 }
15708 else
15709 {
15710 /* For the non-shared case, discard space for relocs against
15711 symbols which turn out to need copy relocs or are not
15712 dynamic. */
15713
15714 if (!h->non_got_ref
15715 && ((h->def_dynamic
15716 && !h->def_regular)
15717 || (htab->root.dynamic_sections_created
15718 && (h->root.type == bfd_link_hash_undefweak
15719 || h->root.type == bfd_link_hash_undefined))))
15720 {
15721 /* Make sure this symbol is output as a dynamic symbol.
15722 Undefined weak syms won't yet be marked as dynamic. */
15723 if (h->dynindx == -1
15724 && !h->forced_local)
15725 {
15726 if (! bfd_elf_link_record_dynamic_symbol (info, h))
15727 return FALSE;
15728 }
15729
15730 /* If that succeeded, we know we'll be keeping all the
15731 relocs. */
15732 if (h->dynindx != -1)
15733 goto keep;
15734 }
15735
15736 eh->dyn_relocs = NULL;
15737
15738 keep: ;
15739 }
15740
15741 /* Finally, allocate space. */
15742 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15743 {
15744 asection *sreloc = elf_section_data (p->sec)->sreloc;
15745 if (h->type == STT_GNU_IFUNC
15746 && eh->plt.noncall_refcount == 0
15747 && SYMBOL_REFERENCES_LOCAL (info, h))
15748 elf32_arm_allocate_irelocs (info, sreloc, p->count);
15749 else
15750 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
15751 }
15752
15753 return TRUE;
15754 }
15755
15756 /* Find any dynamic relocs that apply to read-only sections. */
15757
15758 static bfd_boolean
15759 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
15760 {
15761 struct elf32_arm_link_hash_entry * eh;
15762 struct elf_dyn_relocs * p;
15763
15764 eh = (struct elf32_arm_link_hash_entry *) h;
15765 for (p = eh->dyn_relocs; p != NULL; p = p->next)
15766 {
15767 asection *s = p->sec;
15768
15769 if (s != NULL && (s->flags & SEC_READONLY) != 0)
15770 {
15771 struct bfd_link_info *info = (struct bfd_link_info *) inf;
15772
15773 info->flags |= DF_TEXTREL;
15774
15775 /* Not an error, just cut short the traversal. */
15776 return FALSE;
15777 }
15778 }
15779 return TRUE;
15780 }
15781
15782 void
15783 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
15784 int byteswap_code)
15785 {
15786 struct elf32_arm_link_hash_table *globals;
15787
15788 globals = elf32_arm_hash_table (info);
15789 if (globals == NULL)
15790 return;
15791
15792 globals->byteswap_code = byteswap_code;
15793 }
15794
15795 /* Set the sizes of the dynamic sections. */
15796
15797 static bfd_boolean
15798 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
15799 struct bfd_link_info * info)
15800 {
15801 bfd * dynobj;
15802 asection * s;
15803 bfd_boolean plt;
15804 bfd_boolean relocs;
15805 bfd *ibfd;
15806 struct elf32_arm_link_hash_table *htab;
15807
15808 htab = elf32_arm_hash_table (info);
15809 if (htab == NULL)
15810 return FALSE;
15811
15812 dynobj = elf_hash_table (info)->dynobj;
15813 BFD_ASSERT (dynobj != NULL);
15814 check_use_blx (htab);
15815
15816 if (elf_hash_table (info)->dynamic_sections_created)
15817 {
15818 /* Set the contents of the .interp section to the interpreter. */
15819 if (bfd_link_executable (info) && !info->nointerp)
15820 {
15821 s = bfd_get_linker_section (dynobj, ".interp");
15822 BFD_ASSERT (s != NULL);
15823 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
15824 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
15825 }
15826 }
15827
15828 /* Set up .got offsets for local syms, and space for local dynamic
15829 relocs. */
15830 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
15831 {
15832 bfd_signed_vma *local_got;
15833 bfd_signed_vma *end_local_got;
15834 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
15835 char *local_tls_type;
15836 bfd_vma *local_tlsdesc_gotent;
15837 bfd_size_type locsymcount;
15838 Elf_Internal_Shdr *symtab_hdr;
15839 asection *srel;
15840 bfd_boolean is_vxworks = htab->vxworks_p;
15841 unsigned int symndx;
15842
15843 if (! is_arm_elf (ibfd))
15844 continue;
15845
15846 for (s = ibfd->sections; s != NULL; s = s->next)
15847 {
15848 struct elf_dyn_relocs *p;
15849
15850 for (p = (struct elf_dyn_relocs *)
15851 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
15852 {
15853 if (!bfd_is_abs_section (p->sec)
15854 && bfd_is_abs_section (p->sec->output_section))
15855 {
15856 /* Input section has been discarded, either because
15857 it is a copy of a linkonce section or due to
15858 linker script /DISCARD/, so we'll be discarding
15859 the relocs too. */
15860 }
15861 else if (is_vxworks
15862 && strcmp (p->sec->output_section->name,
15863 ".tls_vars") == 0)
15864 {
15865 /* Relocations in vxworks .tls_vars sections are
15866 handled specially by the loader. */
15867 }
15868 else if (p->count != 0)
15869 {
15870 srel = elf_section_data (p->sec)->sreloc;
15871 elf32_arm_allocate_dynrelocs (info, srel, p->count);
15872 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
15873 info->flags |= DF_TEXTREL;
15874 }
15875 }
15876 }
15877
15878 local_got = elf_local_got_refcounts (ibfd);
15879 if (!local_got)
15880 continue;
15881
15882 symtab_hdr = & elf_symtab_hdr (ibfd);
15883 locsymcount = symtab_hdr->sh_info;
15884 end_local_got = local_got + locsymcount;
15885 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
15886 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
15887 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
15888 symndx = 0;
15889 s = htab->root.sgot;
15890 srel = htab->root.srelgot;
15891 for (; local_got < end_local_got;
15892 ++local_got, ++local_iplt_ptr, ++local_tls_type,
15893 ++local_tlsdesc_gotent, ++symndx)
15894 {
15895 *local_tlsdesc_gotent = (bfd_vma) -1;
15896 local_iplt = *local_iplt_ptr;
15897 if (local_iplt != NULL)
15898 {
15899 struct elf_dyn_relocs *p;
15900
15901 if (local_iplt->root.refcount > 0)
15902 {
15903 elf32_arm_allocate_plt_entry (info, TRUE,
15904 &local_iplt->root,
15905 &local_iplt->arm);
15906 if (local_iplt->arm.noncall_refcount == 0)
15907 /* All references to the PLT are calls, so all
15908 non-call references can resolve directly to the
15909 run-time target. This means that the .got entry
15910 would be the same as the .igot.plt entry, so there's
15911 no point creating both. */
15912 *local_got = 0;
15913 }
15914 else
15915 {
15916 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
15917 local_iplt->root.offset = (bfd_vma) -1;
15918 }
15919
15920 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
15921 {
15922 asection *psrel;
15923
15924 psrel = elf_section_data (p->sec)->sreloc;
15925 if (local_iplt->arm.noncall_refcount == 0)
15926 elf32_arm_allocate_irelocs (info, psrel, p->count);
15927 else
15928 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
15929 }
15930 }
15931 if (*local_got > 0)
15932 {
15933 Elf_Internal_Sym *isym;
15934
15935 *local_got = s->size;
15936 if (*local_tls_type & GOT_TLS_GD)
15937 /* TLS_GD relocs need an 8-byte structure in the GOT. */
15938 s->size += 8;
15939 if (*local_tls_type & GOT_TLS_GDESC)
15940 {
15941 *local_tlsdesc_gotent = htab->root.sgotplt->size
15942 - elf32_arm_compute_jump_table_size (htab);
15943 htab->root.sgotplt->size += 8;
15944 *local_got = (bfd_vma) -2;
15945 /* plt.got_offset needs to know there's a TLS_DESC
15946 reloc in the middle of .got.plt. */
15947 htab->num_tls_desc++;
15948 }
15949 if (*local_tls_type & GOT_TLS_IE)
15950 s->size += 4;
15951
15952 if (*local_tls_type & GOT_NORMAL)
15953 {
15954 /* If the symbol is both GD and GDESC, *local_got
15955 may have been overwritten. */
15956 *local_got = s->size;
15957 s->size += 4;
15958 }
15959
15960 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
15961 if (isym == NULL)
15962 return FALSE;
15963
15964 /* If all references to an STT_GNU_IFUNC PLT are calls,
15965 then all non-call references, including this GOT entry,
15966 resolve directly to the run-time target. */
15967 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
15968 && (local_iplt == NULL
15969 || local_iplt->arm.noncall_refcount == 0))
15970 elf32_arm_allocate_irelocs (info, srel, 1);
15971 else if (bfd_link_pic (info) || output_bfd->flags & DYNAMIC)
15972 {
15973 if ((bfd_link_pic (info) && !(*local_tls_type & GOT_TLS_GDESC))
15974 || *local_tls_type & GOT_TLS_GD)
15975 elf32_arm_allocate_dynrelocs (info, srel, 1);
15976
15977 if (bfd_link_pic (info) && *local_tls_type & GOT_TLS_GDESC)
15978 {
15979 elf32_arm_allocate_dynrelocs (info,
15980 htab->root.srelplt, 1);
15981 htab->tls_trampoline = -1;
15982 }
15983 }
15984 }
15985 else
15986 *local_got = (bfd_vma) -1;
15987 }
15988 }
15989
15990 if (htab->tls_ldm_got.refcount > 0)
15991 {
15992 /* Allocate two GOT entries and one dynamic relocation (if necessary)
15993 for R_ARM_TLS_LDM32 relocations. */
15994 htab->tls_ldm_got.offset = htab->root.sgot->size;
15995 htab->root.sgot->size += 8;
15996 if (bfd_link_pic (info))
15997 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
15998 }
15999 else
16000 htab->tls_ldm_got.offset = -1;
16001
16002 /* Allocate global sym .plt and .got entries, and space for global
16003 sym dynamic relocs. */
16004 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
16005
16006 /* Here we rummage through the found bfds to collect glue information. */
16007 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
16008 {
16009 if (! is_arm_elf (ibfd))
16010 continue;
16011
16012 /* Initialise mapping tables for code/data. */
16013 bfd_elf32_arm_init_maps (ibfd);
16014
16015 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
16016 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)
16017 || !bfd_elf32_arm_stm32l4xx_erratum_scan (ibfd, info))
16018 /* xgettext:c-format */
16019 _bfd_error_handler (_("Errors encountered processing file %s"),
16020 ibfd->filename);
16021 }
16022
16023 /* Allocate space for the glue sections now that we've sized them. */
16024 bfd_elf32_arm_allocate_interworking_sections (info);
16025
16026 /* For every jump slot reserved in the sgotplt, reloc_count is
16027 incremented. However, when we reserve space for TLS descriptors,
16028 it's not incremented, so in order to compute the space reserved
16029 for them, it suffices to multiply the reloc count by the jump
16030 slot size. */
16031 if (htab->root.srelplt)
16032 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
16033
16034 if (htab->tls_trampoline)
16035 {
16036 if (htab->root.splt->size == 0)
16037 htab->root.splt->size += htab->plt_header_size;
16038
16039 htab->tls_trampoline = htab->root.splt->size;
16040 htab->root.splt->size += htab->plt_entry_size;
16041
16042 /* If we're not using lazy TLS relocations, don't generate the
16043 PLT and GOT entries they require. */
16044 if (!(info->flags & DF_BIND_NOW))
16045 {
16046 htab->dt_tlsdesc_got = htab->root.sgot->size;
16047 htab->root.sgot->size += 4;
16048
16049 htab->dt_tlsdesc_plt = htab->root.splt->size;
16050 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
16051 }
16052 }
16053
16054 /* The check_relocs and adjust_dynamic_symbol entry points have
16055 determined the sizes of the various dynamic sections. Allocate
16056 memory for them. */
16057 plt = FALSE;
16058 relocs = FALSE;
16059 for (s = dynobj->sections; s != NULL; s = s->next)
16060 {
16061 const char * name;
16062
16063 if ((s->flags & SEC_LINKER_CREATED) == 0)
16064 continue;
16065
16066 /* It's OK to base decisions on the section name, because none
16067 of the dynobj section names depend upon the input files. */
16068 name = bfd_get_section_name (dynobj, s);
16069
16070 if (s == htab->root.splt)
16071 {
16072 /* Remember whether there is a PLT. */
16073 plt = s->size != 0;
16074 }
16075 else if (CONST_STRNEQ (name, ".rel"))
16076 {
16077 if (s->size != 0)
16078 {
16079 /* Remember whether there are any reloc sections other
16080 than .rel(a).plt and .rela.plt.unloaded. */
16081 if (s != htab->root.srelplt && s != htab->srelplt2)
16082 relocs = TRUE;
16083
16084 /* We use the reloc_count field as a counter if we need
16085 to copy relocs into the output file. */
16086 s->reloc_count = 0;
16087 }
16088 }
16089 else if (s != htab->root.sgot
16090 && s != htab->root.sgotplt
16091 && s != htab->root.iplt
16092 && s != htab->root.igotplt
16093 && s != htab->sdynbss)
16094 {
16095 /* It's not one of our sections, so don't allocate space. */
16096 continue;
16097 }
16098
16099 if (s->size == 0)
16100 {
16101 /* If we don't need this section, strip it from the
16102 output file. This is mostly to handle .rel(a).bss and
16103 .rel(a).plt. We must create both sections in
16104 create_dynamic_sections, because they must be created
16105 before the linker maps input sections to output
16106 sections. The linker does that before
16107 adjust_dynamic_symbol is called, and it is that
16108 function which decides whether anything needs to go
16109 into these sections. */
16110 s->flags |= SEC_EXCLUDE;
16111 continue;
16112 }
16113
16114 if ((s->flags & SEC_HAS_CONTENTS) == 0)
16115 continue;
16116
16117 /* Allocate memory for the section contents. */
16118 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
16119 if (s->contents == NULL)
16120 return FALSE;
16121 }
16122
16123 if (elf_hash_table (info)->dynamic_sections_created)
16124 {
16125 /* Add some entries to the .dynamic section. We fill in the
16126 values later, in elf32_arm_finish_dynamic_sections, but we
16127 must add the entries now so that we get the correct size for
16128 the .dynamic section. The DT_DEBUG entry is filled in by the
16129 dynamic linker and used by the debugger. */
16130 #define add_dynamic_entry(TAG, VAL) \
16131 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
16132
16133 if (bfd_link_executable (info))
16134 {
16135 if (!add_dynamic_entry (DT_DEBUG, 0))
16136 return FALSE;
16137 }
16138
16139 if (plt)
16140 {
16141 if ( !add_dynamic_entry (DT_PLTGOT, 0)
16142 || !add_dynamic_entry (DT_PLTRELSZ, 0)
16143 || !add_dynamic_entry (DT_PLTREL,
16144 htab->use_rel ? DT_REL : DT_RELA)
16145 || !add_dynamic_entry (DT_JMPREL, 0))
16146 return FALSE;
16147
16148 if (htab->dt_tlsdesc_plt
16149 && (!add_dynamic_entry (DT_TLSDESC_PLT,0)
16150 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
16151 return FALSE;
16152 }
16153
16154 if (relocs)
16155 {
16156 if (htab->use_rel)
16157 {
16158 if (!add_dynamic_entry (DT_REL, 0)
16159 || !add_dynamic_entry (DT_RELSZ, 0)
16160 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
16161 return FALSE;
16162 }
16163 else
16164 {
16165 if (!add_dynamic_entry (DT_RELA, 0)
16166 || !add_dynamic_entry (DT_RELASZ, 0)
16167 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
16168 return FALSE;
16169 }
16170 }
16171
16172 /* If any dynamic relocs apply to a read-only section,
16173 then we need a DT_TEXTREL entry. */
16174 if ((info->flags & DF_TEXTREL) == 0)
16175 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
16176 info);
16177
16178 if ((info->flags & DF_TEXTREL) != 0)
16179 {
16180 if (!add_dynamic_entry (DT_TEXTREL, 0))
16181 return FALSE;
16182 }
16183 if (htab->vxworks_p
16184 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
16185 return FALSE;
16186 }
16187 #undef add_dynamic_entry
16188
16189 return TRUE;
16190 }
16191
16192 /* Size sections even though they're not dynamic. We use it to setup
16193 _TLS_MODULE_BASE_, if needed. */
16194
16195 static bfd_boolean
16196 elf32_arm_always_size_sections (bfd *output_bfd,
16197 struct bfd_link_info *info)
16198 {
16199 asection *tls_sec;
16200
16201 if (bfd_link_relocatable (info))
16202 return TRUE;
16203
16204 tls_sec = elf_hash_table (info)->tls_sec;
16205
16206 if (tls_sec)
16207 {
16208 struct elf_link_hash_entry *tlsbase;
16209
16210 tlsbase = elf_link_hash_lookup
16211 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
16212
16213 if (tlsbase)
16214 {
16215 struct bfd_link_hash_entry *bh = NULL;
16216 const struct elf_backend_data *bed
16217 = get_elf_backend_data (output_bfd);
16218
16219 if (!(_bfd_generic_link_add_one_symbol
16220 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
16221 tls_sec, 0, NULL, FALSE,
16222 bed->collect, &bh)))
16223 return FALSE;
16224
16225 tlsbase->type = STT_TLS;
16226 tlsbase = (struct elf_link_hash_entry *)bh;
16227 tlsbase->def_regular = 1;
16228 tlsbase->other = STV_HIDDEN;
16229 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
16230 }
16231 }
16232 return TRUE;
16233 }
16234
16235 /* Finish up dynamic symbol handling. We set the contents of various
16236 dynamic sections here. */
16237
16238 static bfd_boolean
16239 elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
16240 struct bfd_link_info * info,
16241 struct elf_link_hash_entry * h,
16242 Elf_Internal_Sym * sym)
16243 {
16244 struct elf32_arm_link_hash_table *htab;
16245 struct elf32_arm_link_hash_entry *eh;
16246
16247 htab = elf32_arm_hash_table (info);
16248 if (htab == NULL)
16249 return FALSE;
16250
16251 eh = (struct elf32_arm_link_hash_entry *) h;
16252
16253 if (h->plt.offset != (bfd_vma) -1)
16254 {
16255 if (!eh->is_iplt)
16256 {
16257 BFD_ASSERT (h->dynindx != -1);
16258 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
16259 h->dynindx, 0))
16260 return FALSE;
16261 }
16262
16263 if (!h->def_regular)
16264 {
16265 /* Mark the symbol as undefined, rather than as defined in
16266 the .plt section. */
16267 sym->st_shndx = SHN_UNDEF;
16268 /* If the symbol is weak we need to clear the value.
16269 Otherwise, the PLT entry would provide a definition for
16270 the symbol even if the symbol wasn't defined anywhere,
16271 and so the symbol would never be NULL. Leave the value if
16272 there were any relocations where pointer equality matters
16273 (this is a clue for the dynamic linker, to make function
16274 pointer comparisons work between an application and shared
16275 library). */
16276 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
16277 sym->st_value = 0;
16278 }
16279 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
16280 {
16281 /* At least one non-call relocation references this .iplt entry,
16282 so the .iplt entry is the function's canonical address. */
16283 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
16284 ARM_SET_SYM_BRANCH_TYPE (sym->st_target_internal, ST_BRANCH_TO_ARM);
16285 sym->st_shndx = (_bfd_elf_section_from_bfd_section
16286 (output_bfd, htab->root.iplt->output_section));
16287 sym->st_value = (h->plt.offset
16288 + htab->root.iplt->output_section->vma
16289 + htab->root.iplt->output_offset);
16290 }
16291 }
16292
16293 if (h->needs_copy)
16294 {
16295 asection * s;
16296 Elf_Internal_Rela rel;
16297
16298 /* This symbol needs a copy reloc. Set it up. */
16299 BFD_ASSERT (h->dynindx != -1
16300 && (h->root.type == bfd_link_hash_defined
16301 || h->root.type == bfd_link_hash_defweak));
16302
16303 s = htab->srelbss;
16304 BFD_ASSERT (s != NULL);
16305
16306 rel.r_addend = 0;
16307 rel.r_offset = (h->root.u.def.value
16308 + h->root.u.def.section->output_section->vma
16309 + h->root.u.def.section->output_offset);
16310 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
16311 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
16312 }
16313
16314 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
16315 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
16316 to the ".got" section. */
16317 if (h == htab->root.hdynamic
16318 || (!htab->vxworks_p && h == htab->root.hgot))
16319 sym->st_shndx = SHN_ABS;
16320
16321 return TRUE;
16322 }
16323
16324 static void
16325 arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16326 void *contents,
16327 const unsigned long *template, unsigned count)
16328 {
16329 unsigned ix;
16330
16331 for (ix = 0; ix != count; ix++)
16332 {
16333 unsigned long insn = template[ix];
16334
16335 /* Emit mov pc,rx if bx is not permitted. */
16336 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
16337 insn = (insn & 0xf000000f) | 0x01a0f000;
16338 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
16339 }
16340 }
16341
16342 /* Install the special first PLT entry for elf32-arm-nacl. Unlike
16343 other variants, NaCl needs this entry in a static executable's
16344 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
16345 zero. For .iplt really only the last bundle is useful, and .iplt
16346 could have a shorter first entry, with each individual PLT entry's
16347 relative branch calculated differently so it targets the last
16348 bundle instead of the instruction before it (labelled .Lplt_tail
16349 above). But it's simpler to keep the size and layout of PLT0
16350 consistent with the dynamic case, at the cost of some dead code at
16351 the start of .iplt and the one dead store to the stack at the start
16352 of .Lplt_tail. */
16353 static void
16354 arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
16355 asection *plt, bfd_vma got_displacement)
16356 {
16357 unsigned int i;
16358
16359 put_arm_insn (htab, output_bfd,
16360 elf32_arm_nacl_plt0_entry[0]
16361 | arm_movw_immediate (got_displacement),
16362 plt->contents + 0);
16363 put_arm_insn (htab, output_bfd,
16364 elf32_arm_nacl_plt0_entry[1]
16365 | arm_movt_immediate (got_displacement),
16366 plt->contents + 4);
16367
16368 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
16369 put_arm_insn (htab, output_bfd,
16370 elf32_arm_nacl_plt0_entry[i],
16371 plt->contents + (i * 4));
16372 }
16373
16374 /* Finish up the dynamic sections. */
16375
16376 static bfd_boolean
16377 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
16378 {
16379 bfd * dynobj;
16380 asection * sgot;
16381 asection * sdyn;
16382 struct elf32_arm_link_hash_table *htab;
16383
16384 htab = elf32_arm_hash_table (info);
16385 if (htab == NULL)
16386 return FALSE;
16387
16388 dynobj = elf_hash_table (info)->dynobj;
16389
16390 sgot = htab->root.sgotplt;
16391 /* A broken linker script might have discarded the dynamic sections.
16392 Catch this here so that we do not seg-fault later on. */
16393 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
16394 return FALSE;
16395 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
16396
16397 if (elf_hash_table (info)->dynamic_sections_created)
16398 {
16399 asection *splt;
16400 Elf32_External_Dyn *dyncon, *dynconend;
16401
16402 splt = htab->root.splt;
16403 BFD_ASSERT (splt != NULL && sdyn != NULL);
16404 BFD_ASSERT (htab->symbian_p || sgot != NULL);
16405
16406 dyncon = (Elf32_External_Dyn *) sdyn->contents;
16407 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
16408
16409 for (; dyncon < dynconend; dyncon++)
16410 {
16411 Elf_Internal_Dyn dyn;
16412 const char * name;
16413 asection * s;
16414
16415 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
16416
16417 switch (dyn.d_tag)
16418 {
16419 unsigned int type;
16420
16421 default:
16422 if (htab->vxworks_p
16423 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
16424 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16425 break;
16426
16427 case DT_HASH:
16428 name = ".hash";
16429 goto get_vma_if_bpabi;
16430 case DT_STRTAB:
16431 name = ".dynstr";
16432 goto get_vma_if_bpabi;
16433 case DT_SYMTAB:
16434 name = ".dynsym";
16435 goto get_vma_if_bpabi;
16436 case DT_VERSYM:
16437 name = ".gnu.version";
16438 goto get_vma_if_bpabi;
16439 case DT_VERDEF:
16440 name = ".gnu.version_d";
16441 goto get_vma_if_bpabi;
16442 case DT_VERNEED:
16443 name = ".gnu.version_r";
16444 goto get_vma_if_bpabi;
16445
16446 case DT_PLTGOT:
16447 name = htab->symbian_p ? ".got" : ".got.plt";
16448 goto get_vma;
16449 case DT_JMPREL:
16450 name = RELOC_SECTION (htab, ".plt");
16451 get_vma:
16452 s = bfd_get_linker_section (dynobj, name);
16453 if (s == NULL)
16454 {
16455 _bfd_error_handler
16456 (_("could not find section %s"), name);
16457 bfd_set_error (bfd_error_invalid_operation);
16458 return FALSE;
16459 }
16460 if (!htab->symbian_p)
16461 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
16462 else
16463 /* In the BPABI, tags in the PT_DYNAMIC section point
16464 at the file offset, not the memory address, for the
16465 convenience of the post linker. */
16466 dyn.d_un.d_ptr = s->output_section->filepos + s->output_offset;
16467 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16468 break;
16469
16470 get_vma_if_bpabi:
16471 if (htab->symbian_p)
16472 goto get_vma;
16473 break;
16474
16475 case DT_PLTRELSZ:
16476 s = htab->root.srelplt;
16477 BFD_ASSERT (s != NULL);
16478 dyn.d_un.d_val = s->size;
16479 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16480 break;
16481
16482 case DT_RELSZ:
16483 case DT_RELASZ:
16484 if (!htab->symbian_p)
16485 {
16486 /* My reading of the SVR4 ABI indicates that the
16487 procedure linkage table relocs (DT_JMPREL) should be
16488 included in the overall relocs (DT_REL). This is
16489 what Solaris does. However, UnixWare can not handle
16490 that case. Therefore, we override the DT_RELSZ entry
16491 here to make it not include the JMPREL relocs. Since
16492 the linker script arranges for .rel(a).plt to follow all
16493 other relocation sections, we don't have to worry
16494 about changing the DT_REL entry. */
16495 s = htab->root.srelplt;
16496 if (s != NULL)
16497 dyn.d_un.d_val -= s->size;
16498 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16499 break;
16500 }
16501 /* Fall through. */
16502
16503 case DT_REL:
16504 case DT_RELA:
16505 /* In the BPABI, the DT_REL tag must point at the file
16506 offset, not the VMA, of the first relocation
16507 section. So, we use code similar to that in
16508 elflink.c, but do not check for SHF_ALLOC on the
16509 relcoation section, since relocations sections are
16510 never allocated under the BPABI. The comments above
16511 about Unixware notwithstanding, we include all of the
16512 relocations here. */
16513 if (htab->symbian_p)
16514 {
16515 unsigned int i;
16516 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
16517 ? SHT_REL : SHT_RELA);
16518 dyn.d_un.d_val = 0;
16519 for (i = 1; i < elf_numsections (output_bfd); i++)
16520 {
16521 Elf_Internal_Shdr *hdr
16522 = elf_elfsections (output_bfd)[i];
16523 if (hdr->sh_type == type)
16524 {
16525 if (dyn.d_tag == DT_RELSZ
16526 || dyn.d_tag == DT_RELASZ)
16527 dyn.d_un.d_val += hdr->sh_size;
16528 else if ((ufile_ptr) hdr->sh_offset
16529 <= dyn.d_un.d_val - 1)
16530 dyn.d_un.d_val = hdr->sh_offset;
16531 }
16532 }
16533 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16534 }
16535 break;
16536
16537 case DT_TLSDESC_PLT:
16538 s = htab->root.splt;
16539 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16540 + htab->dt_tlsdesc_plt);
16541 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16542 break;
16543
16544 case DT_TLSDESC_GOT:
16545 s = htab->root.sgot;
16546 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
16547 + htab->dt_tlsdesc_got);
16548 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16549 break;
16550
16551 /* Set the bottom bit of DT_INIT/FINI if the
16552 corresponding function is Thumb. */
16553 case DT_INIT:
16554 name = info->init_function;
16555 goto get_sym;
16556 case DT_FINI:
16557 name = info->fini_function;
16558 get_sym:
16559 /* If it wasn't set by elf_bfd_final_link
16560 then there is nothing to adjust. */
16561 if (dyn.d_un.d_val != 0)
16562 {
16563 struct elf_link_hash_entry * eh;
16564
16565 eh = elf_link_hash_lookup (elf_hash_table (info), name,
16566 FALSE, FALSE, TRUE);
16567 if (eh != NULL
16568 && ARM_GET_SYM_BRANCH_TYPE (eh->target_internal)
16569 == ST_BRANCH_TO_THUMB)
16570 {
16571 dyn.d_un.d_val |= 1;
16572 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
16573 }
16574 }
16575 break;
16576 }
16577 }
16578
16579 /* Fill in the first entry in the procedure linkage table. */
16580 if (splt->size > 0 && htab->plt_header_size)
16581 {
16582 const bfd_vma *plt0_entry;
16583 bfd_vma got_address, plt_address, got_displacement;
16584
16585 /* Calculate the addresses of the GOT and PLT. */
16586 got_address = sgot->output_section->vma + sgot->output_offset;
16587 plt_address = splt->output_section->vma + splt->output_offset;
16588
16589 if (htab->vxworks_p)
16590 {
16591 /* The VxWorks GOT is relocated by the dynamic linker.
16592 Therefore, we must emit relocations rather than simply
16593 computing the values now. */
16594 Elf_Internal_Rela rel;
16595
16596 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
16597 put_arm_insn (htab, output_bfd, plt0_entry[0],
16598 splt->contents + 0);
16599 put_arm_insn (htab, output_bfd, plt0_entry[1],
16600 splt->contents + 4);
16601 put_arm_insn (htab, output_bfd, plt0_entry[2],
16602 splt->contents + 8);
16603 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
16604
16605 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
16606 rel.r_offset = plt_address + 12;
16607 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16608 rel.r_addend = 0;
16609 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
16610 htab->srelplt2->contents);
16611 }
16612 else if (htab->nacl_p)
16613 arm_nacl_put_plt0 (htab, output_bfd, splt,
16614 got_address + 8 - (plt_address + 16));
16615 else if (using_thumb_only (htab))
16616 {
16617 got_displacement = got_address - (plt_address + 12);
16618
16619 plt0_entry = elf32_thumb2_plt0_entry;
16620 put_arm_insn (htab, output_bfd, plt0_entry[0],
16621 splt->contents + 0);
16622 put_arm_insn (htab, output_bfd, plt0_entry[1],
16623 splt->contents + 4);
16624 put_arm_insn (htab, output_bfd, plt0_entry[2],
16625 splt->contents + 8);
16626
16627 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
16628 }
16629 else
16630 {
16631 got_displacement = got_address - (plt_address + 16);
16632
16633 plt0_entry = elf32_arm_plt0_entry;
16634 put_arm_insn (htab, output_bfd, plt0_entry[0],
16635 splt->contents + 0);
16636 put_arm_insn (htab, output_bfd, plt0_entry[1],
16637 splt->contents + 4);
16638 put_arm_insn (htab, output_bfd, plt0_entry[2],
16639 splt->contents + 8);
16640 put_arm_insn (htab, output_bfd, plt0_entry[3],
16641 splt->contents + 12);
16642
16643 #ifdef FOUR_WORD_PLT
16644 /* The displacement value goes in the otherwise-unused
16645 last word of the second entry. */
16646 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
16647 #else
16648 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
16649 #endif
16650 }
16651 }
16652
16653 /* UnixWare sets the entsize of .plt to 4, although that doesn't
16654 really seem like the right value. */
16655 if (splt->output_section->owner == output_bfd)
16656 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
16657
16658 if (htab->dt_tlsdesc_plt)
16659 {
16660 bfd_vma got_address
16661 = sgot->output_section->vma + sgot->output_offset;
16662 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
16663 + htab->root.sgot->output_offset);
16664 bfd_vma plt_address
16665 = splt->output_section->vma + splt->output_offset;
16666
16667 arm_put_trampoline (htab, output_bfd,
16668 splt->contents + htab->dt_tlsdesc_plt,
16669 dl_tlsdesc_lazy_trampoline, 6);
16670
16671 bfd_put_32 (output_bfd,
16672 gotplt_address + htab->dt_tlsdesc_got
16673 - (plt_address + htab->dt_tlsdesc_plt)
16674 - dl_tlsdesc_lazy_trampoline[6],
16675 splt->contents + htab->dt_tlsdesc_plt + 24);
16676 bfd_put_32 (output_bfd,
16677 got_address - (plt_address + htab->dt_tlsdesc_plt)
16678 - dl_tlsdesc_lazy_trampoline[7],
16679 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
16680 }
16681
16682 if (htab->tls_trampoline)
16683 {
16684 arm_put_trampoline (htab, output_bfd,
16685 splt->contents + htab->tls_trampoline,
16686 tls_trampoline, 3);
16687 #ifdef FOUR_WORD_PLT
16688 bfd_put_32 (output_bfd, 0x00000000,
16689 splt->contents + htab->tls_trampoline + 12);
16690 #endif
16691 }
16692
16693 if (htab->vxworks_p
16694 && !bfd_link_pic (info)
16695 && htab->root.splt->size > 0)
16696 {
16697 /* Correct the .rel(a).plt.unloaded relocations. They will have
16698 incorrect symbol indexes. */
16699 int num_plts;
16700 unsigned char *p;
16701
16702 num_plts = ((htab->root.splt->size - htab->plt_header_size)
16703 / htab->plt_entry_size);
16704 p = htab->srelplt2->contents + RELOC_SIZE (htab);
16705
16706 for (; num_plts; num_plts--)
16707 {
16708 Elf_Internal_Rela rel;
16709
16710 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16711 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
16712 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16713 p += RELOC_SIZE (htab);
16714
16715 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
16716 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
16717 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
16718 p += RELOC_SIZE (htab);
16719 }
16720 }
16721 }
16722
16723 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
16724 /* NaCl uses a special first entry in .iplt too. */
16725 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
16726
16727 /* Fill in the first three entries in the global offset table. */
16728 if (sgot)
16729 {
16730 if (sgot->size > 0)
16731 {
16732 if (sdyn == NULL)
16733 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
16734 else
16735 bfd_put_32 (output_bfd,
16736 sdyn->output_section->vma + sdyn->output_offset,
16737 sgot->contents);
16738 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
16739 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
16740 }
16741
16742 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
16743 }
16744
16745 return TRUE;
16746 }
16747
16748 static void
16749 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
16750 {
16751 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
16752 struct elf32_arm_link_hash_table *globals;
16753 struct elf_segment_map *m;
16754
16755 i_ehdrp = elf_elfheader (abfd);
16756
16757 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
16758 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
16759 else
16760 _bfd_elf_post_process_headers (abfd, link_info);
16761 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
16762
16763 if (link_info)
16764 {
16765 globals = elf32_arm_hash_table (link_info);
16766 if (globals != NULL && globals->byteswap_code)
16767 i_ehdrp->e_flags |= EF_ARM_BE8;
16768 }
16769
16770 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
16771 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
16772 {
16773 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
16774 if (abi == AEABI_VFP_args_vfp)
16775 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
16776 else
16777 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
16778 }
16779
16780 /* Scan segment to set p_flags attribute if it contains only sections with
16781 SHF_ARM_PURECODE flag. */
16782 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
16783 {
16784 unsigned int j;
16785
16786 if (m->count == 0)
16787 continue;
16788 for (j = 0; j < m->count; j++)
16789 {
16790 if (!(elf_section_flags (m->sections[j]) & SHF_ARM_PURECODE))
16791 break;
16792 }
16793 if (j == m->count)
16794 {
16795 m->p_flags = PF_X;
16796 m->p_flags_valid = 1;
16797 }
16798 }
16799 }
16800
16801 static enum elf_reloc_type_class
16802 elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
16803 const asection *rel_sec ATTRIBUTE_UNUSED,
16804 const Elf_Internal_Rela *rela)
16805 {
16806 switch ((int) ELF32_R_TYPE (rela->r_info))
16807 {
16808 case R_ARM_RELATIVE:
16809 return reloc_class_relative;
16810 case R_ARM_JUMP_SLOT:
16811 return reloc_class_plt;
16812 case R_ARM_COPY:
16813 return reloc_class_copy;
16814 case R_ARM_IRELATIVE:
16815 return reloc_class_ifunc;
16816 default:
16817 return reloc_class_normal;
16818 }
16819 }
16820
16821 static void
16822 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
16823 {
16824 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
16825 }
16826
16827 /* Return TRUE if this is an unwinding table entry. */
16828
16829 static bfd_boolean
16830 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
16831 {
16832 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
16833 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
16834 }
16835
16836
16837 /* Set the type and flags for an ARM section. We do this by
16838 the section name, which is a hack, but ought to work. */
16839
16840 static bfd_boolean
16841 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
16842 {
16843 const char * name;
16844
16845 name = bfd_get_section_name (abfd, sec);
16846
16847 if (is_arm_elf_unwind_section_name (abfd, name))
16848 {
16849 hdr->sh_type = SHT_ARM_EXIDX;
16850 hdr->sh_flags |= SHF_LINK_ORDER;
16851 }
16852
16853 if (sec->flags & SEC_ELF_PURECODE)
16854 hdr->sh_flags |= SHF_ARM_PURECODE;
16855
16856 return TRUE;
16857 }
16858
16859 /* Handle an ARM specific section when reading an object file. This is
16860 called when bfd_section_from_shdr finds a section with an unknown
16861 type. */
16862
16863 static bfd_boolean
16864 elf32_arm_section_from_shdr (bfd *abfd,
16865 Elf_Internal_Shdr * hdr,
16866 const char *name,
16867 int shindex)
16868 {
16869 /* There ought to be a place to keep ELF backend specific flags, but
16870 at the moment there isn't one. We just keep track of the
16871 sections by their name, instead. Fortunately, the ABI gives
16872 names for all the ARM specific sections, so we will probably get
16873 away with this. */
16874 switch (hdr->sh_type)
16875 {
16876 case SHT_ARM_EXIDX:
16877 case SHT_ARM_PREEMPTMAP:
16878 case SHT_ARM_ATTRIBUTES:
16879 break;
16880
16881 default:
16882 return FALSE;
16883 }
16884
16885 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
16886 return FALSE;
16887
16888 return TRUE;
16889 }
16890
16891 static _arm_elf_section_data *
16892 get_arm_elf_section_data (asection * sec)
16893 {
16894 if (sec && sec->owner && is_arm_elf (sec->owner))
16895 return elf32_arm_section_data (sec);
16896 else
16897 return NULL;
16898 }
16899
16900 typedef struct
16901 {
16902 void *flaginfo;
16903 struct bfd_link_info *info;
16904 asection *sec;
16905 int sec_shndx;
16906 int (*func) (void *, const char *, Elf_Internal_Sym *,
16907 asection *, struct elf_link_hash_entry *);
16908 } output_arch_syminfo;
16909
16910 enum map_symbol_type
16911 {
16912 ARM_MAP_ARM,
16913 ARM_MAP_THUMB,
16914 ARM_MAP_DATA
16915 };
16916
16917
16918 /* Output a single mapping symbol. */
16919
16920 static bfd_boolean
16921 elf32_arm_output_map_sym (output_arch_syminfo *osi,
16922 enum map_symbol_type type,
16923 bfd_vma offset)
16924 {
16925 static const char *names[3] = {"$a", "$t", "$d"};
16926 Elf_Internal_Sym sym;
16927
16928 sym.st_value = osi->sec->output_section->vma
16929 + osi->sec->output_offset
16930 + offset;
16931 sym.st_size = 0;
16932 sym.st_other = 0;
16933 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
16934 sym.st_shndx = osi->sec_shndx;
16935 sym.st_target_internal = 0;
16936 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
16937 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
16938 }
16939
16940 /* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
16941 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
16942
16943 static bfd_boolean
16944 elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
16945 bfd_boolean is_iplt_entry_p,
16946 union gotplt_union *root_plt,
16947 struct arm_plt_info *arm_plt)
16948 {
16949 struct elf32_arm_link_hash_table *htab;
16950 bfd_vma addr, plt_header_size;
16951
16952 if (root_plt->offset == (bfd_vma) -1)
16953 return TRUE;
16954
16955 htab = elf32_arm_hash_table (osi->info);
16956 if (htab == NULL)
16957 return FALSE;
16958
16959 if (is_iplt_entry_p)
16960 {
16961 osi->sec = htab->root.iplt;
16962 plt_header_size = 0;
16963 }
16964 else
16965 {
16966 osi->sec = htab->root.splt;
16967 plt_header_size = htab->plt_header_size;
16968 }
16969 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
16970 (osi->info->output_bfd, osi->sec->output_section));
16971
16972 addr = root_plt->offset & -2;
16973 if (htab->symbian_p)
16974 {
16975 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16976 return FALSE;
16977 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
16978 return FALSE;
16979 }
16980 else if (htab->vxworks_p)
16981 {
16982 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16983 return FALSE;
16984 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
16985 return FALSE;
16986 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
16987 return FALSE;
16988 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
16989 return FALSE;
16990 }
16991 else if (htab->nacl_p)
16992 {
16993 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
16994 return FALSE;
16995 }
16996 else if (using_thumb_only (htab))
16997 {
16998 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
16999 return FALSE;
17000 }
17001 else
17002 {
17003 bfd_boolean thumb_stub_p;
17004
17005 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
17006 if (thumb_stub_p)
17007 {
17008 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
17009 return FALSE;
17010 }
17011 #ifdef FOUR_WORD_PLT
17012 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17013 return FALSE;
17014 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
17015 return FALSE;
17016 #else
17017 /* A three-word PLT with no Thumb thunk contains only Arm code,
17018 so only need to output a mapping symbol for the first PLT entry and
17019 entries with thumb thunks. */
17020 if (thumb_stub_p || addr == plt_header_size)
17021 {
17022 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
17023 return FALSE;
17024 }
17025 #endif
17026 }
17027
17028 return TRUE;
17029 }
17030
17031 /* Output mapping symbols for PLT entries associated with H. */
17032
17033 static bfd_boolean
17034 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
17035 {
17036 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
17037 struct elf32_arm_link_hash_entry *eh;
17038
17039 if (h->root.type == bfd_link_hash_indirect)
17040 return TRUE;
17041
17042 if (h->root.type == bfd_link_hash_warning)
17043 /* When warning symbols are created, they **replace** the "real"
17044 entry in the hash table, thus we never get to see the real
17045 symbol in a hash traversal. So look at it now. */
17046 h = (struct elf_link_hash_entry *) h->root.u.i.link;
17047
17048 eh = (struct elf32_arm_link_hash_entry *) h;
17049 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
17050 &h->plt, &eh->plt);
17051 }
17052
17053 /* Bind a veneered symbol to its veneer identified by its hash entry
17054 STUB_ENTRY. The veneered location thus loose its symbol. */
17055
17056 static void
17057 arm_stub_claim_sym (struct elf32_arm_stub_hash_entry *stub_entry)
17058 {
17059 struct elf32_arm_link_hash_entry *hash = stub_entry->h;
17060
17061 BFD_ASSERT (hash);
17062 hash->root.root.u.def.section = stub_entry->stub_sec;
17063 hash->root.root.u.def.value = stub_entry->stub_offset;
17064 hash->root.size = stub_entry->stub_size;
17065 }
17066
17067 /* Output a single local symbol for a generated stub. */
17068
17069 static bfd_boolean
17070 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
17071 bfd_vma offset, bfd_vma size)
17072 {
17073 Elf_Internal_Sym sym;
17074
17075 sym.st_value = osi->sec->output_section->vma
17076 + osi->sec->output_offset
17077 + offset;
17078 sym.st_size = size;
17079 sym.st_other = 0;
17080 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
17081 sym.st_shndx = osi->sec_shndx;
17082 sym.st_target_internal = 0;
17083 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
17084 }
17085
17086 static bfd_boolean
17087 arm_map_one_stub (struct bfd_hash_entry * gen_entry,
17088 void * in_arg)
17089 {
17090 struct elf32_arm_stub_hash_entry *stub_entry;
17091 asection *stub_sec;
17092 bfd_vma addr;
17093 char *stub_name;
17094 output_arch_syminfo *osi;
17095 const insn_sequence *template_sequence;
17096 enum stub_insn_type prev_type;
17097 int size;
17098 int i;
17099 enum map_symbol_type sym_type;
17100
17101 /* Massage our args to the form they really have. */
17102 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17103 osi = (output_arch_syminfo *) in_arg;
17104
17105 stub_sec = stub_entry->stub_sec;
17106
17107 /* Ensure this stub is attached to the current section being
17108 processed. */
17109 if (stub_sec != osi->sec)
17110 return TRUE;
17111
17112 addr = (bfd_vma) stub_entry->stub_offset;
17113 template_sequence = stub_entry->stub_template;
17114
17115 if (arm_stub_sym_claimed (stub_entry->stub_type))
17116 arm_stub_claim_sym (stub_entry);
17117 else
17118 {
17119 stub_name = stub_entry->output_name;
17120 switch (template_sequence[0].type)
17121 {
17122 case ARM_TYPE:
17123 if (!elf32_arm_output_stub_sym (osi, stub_name, addr,
17124 stub_entry->stub_size))
17125 return FALSE;
17126 break;
17127 case THUMB16_TYPE:
17128 case THUMB32_TYPE:
17129 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
17130 stub_entry->stub_size))
17131 return FALSE;
17132 break;
17133 default:
17134 BFD_FAIL ();
17135 return 0;
17136 }
17137 }
17138
17139 prev_type = DATA_TYPE;
17140 size = 0;
17141 for (i = 0; i < stub_entry->stub_template_size; i++)
17142 {
17143 switch (template_sequence[i].type)
17144 {
17145 case ARM_TYPE:
17146 sym_type = ARM_MAP_ARM;
17147 break;
17148
17149 case THUMB16_TYPE:
17150 case THUMB32_TYPE:
17151 sym_type = ARM_MAP_THUMB;
17152 break;
17153
17154 case DATA_TYPE:
17155 sym_type = ARM_MAP_DATA;
17156 break;
17157
17158 default:
17159 BFD_FAIL ();
17160 return FALSE;
17161 }
17162
17163 if (template_sequence[i].type != prev_type)
17164 {
17165 prev_type = template_sequence[i].type;
17166 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
17167 return FALSE;
17168 }
17169
17170 switch (template_sequence[i].type)
17171 {
17172 case ARM_TYPE:
17173 case THUMB32_TYPE:
17174 size += 4;
17175 break;
17176
17177 case THUMB16_TYPE:
17178 size += 2;
17179 break;
17180
17181 case DATA_TYPE:
17182 size += 4;
17183 break;
17184
17185 default:
17186 BFD_FAIL ();
17187 return FALSE;
17188 }
17189 }
17190
17191 return TRUE;
17192 }
17193
17194 /* Output mapping symbols for linker generated sections,
17195 and for those data-only sections that do not have a
17196 $d. */
17197
17198 static bfd_boolean
17199 elf32_arm_output_arch_local_syms (bfd *output_bfd,
17200 struct bfd_link_info *info,
17201 void *flaginfo,
17202 int (*func) (void *, const char *,
17203 Elf_Internal_Sym *,
17204 asection *,
17205 struct elf_link_hash_entry *))
17206 {
17207 output_arch_syminfo osi;
17208 struct elf32_arm_link_hash_table *htab;
17209 bfd_vma offset;
17210 bfd_size_type size;
17211 bfd *input_bfd;
17212
17213 htab = elf32_arm_hash_table (info);
17214 if (htab == NULL)
17215 return FALSE;
17216
17217 check_use_blx (htab);
17218
17219 osi.flaginfo = flaginfo;
17220 osi.info = info;
17221 osi.func = func;
17222
17223 /* Add a $d mapping symbol to data-only sections that
17224 don't have any mapping symbol. This may result in (harmless) redundant
17225 mapping symbols. */
17226 for (input_bfd = info->input_bfds;
17227 input_bfd != NULL;
17228 input_bfd = input_bfd->link.next)
17229 {
17230 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
17231 for (osi.sec = input_bfd->sections;
17232 osi.sec != NULL;
17233 osi.sec = osi.sec->next)
17234 {
17235 if (osi.sec->output_section != NULL
17236 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
17237 != 0)
17238 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
17239 == SEC_HAS_CONTENTS
17240 && get_arm_elf_section_data (osi.sec) != NULL
17241 && get_arm_elf_section_data (osi.sec)->mapcount == 0
17242 && osi.sec->size > 0
17243 && (osi.sec->flags & SEC_EXCLUDE) == 0)
17244 {
17245 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17246 (output_bfd, osi.sec->output_section);
17247 if (osi.sec_shndx != (int)SHN_BAD)
17248 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
17249 }
17250 }
17251 }
17252
17253 /* ARM->Thumb glue. */
17254 if (htab->arm_glue_size > 0)
17255 {
17256 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17257 ARM2THUMB_GLUE_SECTION_NAME);
17258
17259 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17260 (output_bfd, osi.sec->output_section);
17261 if (bfd_link_pic (info) || htab->root.is_relocatable_executable
17262 || htab->pic_veneer)
17263 size = ARM2THUMB_PIC_GLUE_SIZE;
17264 else if (htab->use_blx)
17265 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
17266 else
17267 size = ARM2THUMB_STATIC_GLUE_SIZE;
17268
17269 for (offset = 0; offset < htab->arm_glue_size; offset += size)
17270 {
17271 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
17272 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
17273 }
17274 }
17275
17276 /* Thumb->ARM glue. */
17277 if (htab->thumb_glue_size > 0)
17278 {
17279 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17280 THUMB2ARM_GLUE_SECTION_NAME);
17281
17282 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17283 (output_bfd, osi.sec->output_section);
17284 size = THUMB2ARM_GLUE_SIZE;
17285
17286 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
17287 {
17288 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
17289 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
17290 }
17291 }
17292
17293 /* ARMv4 BX veneers. */
17294 if (htab->bx_glue_size > 0)
17295 {
17296 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
17297 ARM_BX_GLUE_SECTION_NAME);
17298
17299 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17300 (output_bfd, osi.sec->output_section);
17301
17302 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
17303 }
17304
17305 /* Long calls stubs. */
17306 if (htab->stub_bfd && htab->stub_bfd->sections)
17307 {
17308 asection* stub_sec;
17309
17310 for (stub_sec = htab->stub_bfd->sections;
17311 stub_sec != NULL;
17312 stub_sec = stub_sec->next)
17313 {
17314 /* Ignore non-stub sections. */
17315 if (!strstr (stub_sec->name, STUB_SUFFIX))
17316 continue;
17317
17318 osi.sec = stub_sec;
17319
17320 osi.sec_shndx = _bfd_elf_section_from_bfd_section
17321 (output_bfd, osi.sec->output_section);
17322
17323 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
17324 }
17325 }
17326
17327 /* Finally, output mapping symbols for the PLT. */
17328 if (htab->root.splt && htab->root.splt->size > 0)
17329 {
17330 osi.sec = htab->root.splt;
17331 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17332 (output_bfd, osi.sec->output_section));
17333
17334 /* Output mapping symbols for the plt header. SymbianOS does not have a
17335 plt header. */
17336 if (htab->vxworks_p)
17337 {
17338 /* VxWorks shared libraries have no PLT header. */
17339 if (!bfd_link_pic (info))
17340 {
17341 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17342 return FALSE;
17343 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17344 return FALSE;
17345 }
17346 }
17347 else if (htab->nacl_p)
17348 {
17349 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17350 return FALSE;
17351 }
17352 else if (using_thumb_only (htab))
17353 {
17354 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
17355 return FALSE;
17356 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
17357 return FALSE;
17358 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
17359 return FALSE;
17360 }
17361 else if (!htab->symbian_p)
17362 {
17363 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17364 return FALSE;
17365 #ifndef FOUR_WORD_PLT
17366 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
17367 return FALSE;
17368 #endif
17369 }
17370 }
17371 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
17372 {
17373 /* NaCl uses a special first entry in .iplt too. */
17374 osi.sec = htab->root.iplt;
17375 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
17376 (output_bfd, osi.sec->output_section));
17377 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
17378 return FALSE;
17379 }
17380 if ((htab->root.splt && htab->root.splt->size > 0)
17381 || (htab->root.iplt && htab->root.iplt->size > 0))
17382 {
17383 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
17384 for (input_bfd = info->input_bfds;
17385 input_bfd != NULL;
17386 input_bfd = input_bfd->link.next)
17387 {
17388 struct arm_local_iplt_info **local_iplt;
17389 unsigned int i, num_syms;
17390
17391 local_iplt = elf32_arm_local_iplt (input_bfd);
17392 if (local_iplt != NULL)
17393 {
17394 num_syms = elf_symtab_hdr (input_bfd).sh_info;
17395 for (i = 0; i < num_syms; i++)
17396 if (local_iplt[i] != NULL
17397 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
17398 &local_iplt[i]->root,
17399 &local_iplt[i]->arm))
17400 return FALSE;
17401 }
17402 }
17403 }
17404 if (htab->dt_tlsdesc_plt != 0)
17405 {
17406 /* Mapping symbols for the lazy tls trampoline. */
17407 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
17408 return FALSE;
17409
17410 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17411 htab->dt_tlsdesc_plt + 24))
17412 return FALSE;
17413 }
17414 if (htab->tls_trampoline != 0)
17415 {
17416 /* Mapping symbols for the tls trampoline. */
17417 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
17418 return FALSE;
17419 #ifdef FOUR_WORD_PLT
17420 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
17421 htab->tls_trampoline + 12))
17422 return FALSE;
17423 #endif
17424 }
17425
17426 return TRUE;
17427 }
17428
17429 /* Filter normal symbols of CMSE entry functions of ABFD to include in
17430 the import library. All SYMCOUNT symbols of ABFD can be examined
17431 from their pointers in SYMS. Pointers of symbols to keep should be
17432 stored continuously at the beginning of that array.
17433
17434 Returns the number of symbols to keep. */
17435
17436 static unsigned int
17437 elf32_arm_filter_cmse_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17438 struct bfd_link_info *info,
17439 asymbol **syms, long symcount)
17440 {
17441 size_t maxnamelen;
17442 char *cmse_name;
17443 long src_count, dst_count = 0;
17444 struct elf32_arm_link_hash_table *htab;
17445
17446 htab = elf32_arm_hash_table (info);
17447 if (!htab->stub_bfd || !htab->stub_bfd->sections)
17448 symcount = 0;
17449
17450 maxnamelen = 128;
17451 cmse_name = (char *) bfd_malloc (maxnamelen);
17452 for (src_count = 0; src_count < symcount; src_count++)
17453 {
17454 struct elf32_arm_link_hash_entry *cmse_hash;
17455 asymbol *sym;
17456 flagword flags;
17457 char *name;
17458 size_t namelen;
17459
17460 sym = syms[src_count];
17461 flags = sym->flags;
17462 name = (char *) bfd_asymbol_name (sym);
17463
17464 if ((flags & BSF_FUNCTION) != BSF_FUNCTION)
17465 continue;
17466 if (!(flags & (BSF_GLOBAL | BSF_WEAK)))
17467 continue;
17468
17469 namelen = strlen (name) + sizeof (CMSE_PREFIX) + 1;
17470 if (namelen > maxnamelen)
17471 {
17472 cmse_name = (char *)
17473 bfd_realloc (cmse_name, namelen);
17474 maxnamelen = namelen;
17475 }
17476 snprintf (cmse_name, maxnamelen, "%s%s", CMSE_PREFIX, name);
17477 cmse_hash = (struct elf32_arm_link_hash_entry *)
17478 elf_link_hash_lookup (&(htab)->root, cmse_name, FALSE, FALSE, TRUE);
17479
17480 if (!cmse_hash
17481 || (cmse_hash->root.root.type != bfd_link_hash_defined
17482 && cmse_hash->root.root.type != bfd_link_hash_defweak)
17483 || cmse_hash->root.type != STT_FUNC)
17484 continue;
17485
17486 if (!ARM_GET_SYM_CMSE_SPCL (cmse_hash->root.target_internal))
17487 continue;
17488
17489 syms[dst_count++] = sym;
17490 }
17491 free (cmse_name);
17492
17493 syms[dst_count] = NULL;
17494
17495 return dst_count;
17496 }
17497
17498 /* Filter symbols of ABFD to include in the import library. All
17499 SYMCOUNT symbols of ABFD can be examined from their pointers in
17500 SYMS. Pointers of symbols to keep should be stored continuously at
17501 the beginning of that array.
17502
17503 Returns the number of symbols to keep. */
17504
17505 static unsigned int
17506 elf32_arm_filter_implib_symbols (bfd *abfd ATTRIBUTE_UNUSED,
17507 struct bfd_link_info *info,
17508 asymbol **syms, long symcount)
17509 {
17510 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
17511
17512 if (globals->cmse_implib)
17513 return elf32_arm_filter_cmse_symbols (abfd, info, syms, symcount);
17514 else
17515 return _bfd_elf_filter_global_symbols (abfd, info, syms, symcount);
17516 }
17517
17518 /* Allocate target specific section data. */
17519
17520 static bfd_boolean
17521 elf32_arm_new_section_hook (bfd *abfd, asection *sec)
17522 {
17523 if (!sec->used_by_bfd)
17524 {
17525 _arm_elf_section_data *sdata;
17526 bfd_size_type amt = sizeof (*sdata);
17527
17528 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
17529 if (sdata == NULL)
17530 return FALSE;
17531 sec->used_by_bfd = sdata;
17532 }
17533
17534 return _bfd_elf_new_section_hook (abfd, sec);
17535 }
17536
17537
17538 /* Used to order a list of mapping symbols by address. */
17539
17540 static int
17541 elf32_arm_compare_mapping (const void * a, const void * b)
17542 {
17543 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
17544 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
17545
17546 if (amap->vma > bmap->vma)
17547 return 1;
17548 else if (amap->vma < bmap->vma)
17549 return -1;
17550 else if (amap->type > bmap->type)
17551 /* Ensure results do not depend on the host qsort for objects with
17552 multiple mapping symbols at the same address by sorting on type
17553 after vma. */
17554 return 1;
17555 else if (amap->type < bmap->type)
17556 return -1;
17557 else
17558 return 0;
17559 }
17560
17561 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
17562
17563 static unsigned long
17564 offset_prel31 (unsigned long addr, bfd_vma offset)
17565 {
17566 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
17567 }
17568
17569 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
17570 relocations. */
17571
17572 static void
17573 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
17574 {
17575 unsigned long first_word = bfd_get_32 (output_bfd, from);
17576 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
17577
17578 /* High bit of first word is supposed to be zero. */
17579 if ((first_word & 0x80000000ul) == 0)
17580 first_word = offset_prel31 (first_word, offset);
17581
17582 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
17583 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
17584 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
17585 second_word = offset_prel31 (second_word, offset);
17586
17587 bfd_put_32 (output_bfd, first_word, to);
17588 bfd_put_32 (output_bfd, second_word, to + 4);
17589 }
17590
17591 /* Data for make_branch_to_a8_stub(). */
17592
17593 struct a8_branch_to_stub_data
17594 {
17595 asection *writing_section;
17596 bfd_byte *contents;
17597 };
17598
17599
17600 /* Helper to insert branches to Cortex-A8 erratum stubs in the right
17601 places for a particular section. */
17602
17603 static bfd_boolean
17604 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
17605 void *in_arg)
17606 {
17607 struct elf32_arm_stub_hash_entry *stub_entry;
17608 struct a8_branch_to_stub_data *data;
17609 bfd_byte *contents;
17610 unsigned long branch_insn;
17611 bfd_vma veneered_insn_loc, veneer_entry_loc;
17612 bfd_signed_vma branch_offset;
17613 bfd *abfd;
17614 unsigned int loc;
17615
17616 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
17617 data = (struct a8_branch_to_stub_data *) in_arg;
17618
17619 if (stub_entry->target_section != data->writing_section
17620 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
17621 return TRUE;
17622
17623 contents = data->contents;
17624
17625 /* We use target_section as Cortex-A8 erratum workaround stubs are only
17626 generated when both source and target are in the same section. */
17627 veneered_insn_loc = stub_entry->target_section->output_section->vma
17628 + stub_entry->target_section->output_offset
17629 + stub_entry->source_value;
17630
17631 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
17632 + stub_entry->stub_sec->output_offset
17633 + stub_entry->stub_offset;
17634
17635 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
17636 veneered_insn_loc &= ~3u;
17637
17638 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
17639
17640 abfd = stub_entry->target_section->owner;
17641 loc = stub_entry->source_value;
17642
17643 /* We attempt to avoid this condition by setting stubs_always_after_branch
17644 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
17645 This check is just to be on the safe side... */
17646 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
17647 {
17648 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub is "
17649 "allocated in unsafe location"), abfd);
17650 return FALSE;
17651 }
17652
17653 switch (stub_entry->stub_type)
17654 {
17655 case arm_stub_a8_veneer_b:
17656 case arm_stub_a8_veneer_b_cond:
17657 branch_insn = 0xf0009000;
17658 goto jump24;
17659
17660 case arm_stub_a8_veneer_blx:
17661 branch_insn = 0xf000e800;
17662 goto jump24;
17663
17664 case arm_stub_a8_veneer_bl:
17665 {
17666 unsigned int i1, j1, i2, j2, s;
17667
17668 branch_insn = 0xf000d000;
17669
17670 jump24:
17671 if (branch_offset < -16777216 || branch_offset > 16777214)
17672 {
17673 /* There's not much we can do apart from complain if this
17674 happens. */
17675 _bfd_error_handler (_("%B: error: Cortex-A8 erratum stub out "
17676 "of range (input file too large)"), abfd);
17677 return FALSE;
17678 }
17679
17680 /* i1 = not(j1 eor s), so:
17681 not i1 = j1 eor s
17682 j1 = (not i1) eor s. */
17683
17684 branch_insn |= (branch_offset >> 1) & 0x7ff;
17685 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
17686 i2 = (branch_offset >> 22) & 1;
17687 i1 = (branch_offset >> 23) & 1;
17688 s = (branch_offset >> 24) & 1;
17689 j1 = (!i1) ^ s;
17690 j2 = (!i2) ^ s;
17691 branch_insn |= j2 << 11;
17692 branch_insn |= j1 << 13;
17693 branch_insn |= s << 26;
17694 }
17695 break;
17696
17697 default:
17698 BFD_FAIL ();
17699 return FALSE;
17700 }
17701
17702 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[loc]);
17703 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[loc + 2]);
17704
17705 return TRUE;
17706 }
17707
17708 /* Beginning of stm32l4xx work-around. */
17709
17710 /* Functions encoding instructions necessary for the emission of the
17711 fix-stm32l4xx-629360.
17712 Encoding is extracted from the
17713 ARM (C) Architecture Reference Manual
17714 ARMv7-A and ARMv7-R edition
17715 ARM DDI 0406C.b (ID072512). */
17716
17717 static inline bfd_vma
17718 create_instruction_branch_absolute (int branch_offset)
17719 {
17720 /* A8.8.18 B (A8-334)
17721 B target_address (Encoding T4). */
17722 /* 1111 - 0Sii - iiii - iiii - 10J1 - Jiii - iiii - iiii. */
17723 /* jump offset is: S:I1:I2:imm10:imm11:0. */
17724 /* with : I1 = NOT (J1 EOR S) I2 = NOT (J2 EOR S). */
17725
17726 int s = ((branch_offset & 0x1000000) >> 24);
17727 int j1 = s ^ !((branch_offset & 0x800000) >> 23);
17728 int j2 = s ^ !((branch_offset & 0x400000) >> 22);
17729
17730 if (branch_offset < -(1 << 24) || branch_offset >= (1 << 24))
17731 BFD_ASSERT (0 && "Error: branch out of range. Cannot create branch.");
17732
17733 bfd_vma patched_inst = 0xf0009000
17734 | s << 26 /* S. */
17735 | (((unsigned long) (branch_offset) >> 12) & 0x3ff) << 16 /* imm10. */
17736 | j1 << 13 /* J1. */
17737 | j2 << 11 /* J2. */
17738 | (((unsigned long) (branch_offset) >> 1) & 0x7ff); /* imm11. */
17739
17740 return patched_inst;
17741 }
17742
17743 static inline bfd_vma
17744 create_instruction_ldmia (int base_reg, int wback, int reg_mask)
17745 {
17746 /* A8.8.57 LDM/LDMIA/LDMFD (A8-396)
17747 LDMIA Rn!, {Ra, Rb, Rc, ...} (Encoding T2). */
17748 bfd_vma patched_inst = 0xe8900000
17749 | (/*W=*/wback << 21)
17750 | (base_reg << 16)
17751 | (reg_mask & 0x0000ffff);
17752
17753 return patched_inst;
17754 }
17755
17756 static inline bfd_vma
17757 create_instruction_ldmdb (int base_reg, int wback, int reg_mask)
17758 {
17759 /* A8.8.60 LDMDB/LDMEA (A8-402)
17760 LDMDB Rn!, {Ra, Rb, Rc, ...} (Encoding T1). */
17761 bfd_vma patched_inst = 0xe9100000
17762 | (/*W=*/wback << 21)
17763 | (base_reg << 16)
17764 | (reg_mask & 0x0000ffff);
17765
17766 return patched_inst;
17767 }
17768
17769 static inline bfd_vma
17770 create_instruction_mov (int target_reg, int source_reg)
17771 {
17772 /* A8.8.103 MOV (register) (A8-486)
17773 MOV Rd, Rm (Encoding T1). */
17774 bfd_vma patched_inst = 0x4600
17775 | (target_reg & 0x7)
17776 | ((target_reg & 0x8) >> 3) << 7
17777 | (source_reg << 3);
17778
17779 return patched_inst;
17780 }
17781
17782 static inline bfd_vma
17783 create_instruction_sub (int target_reg, int source_reg, int value)
17784 {
17785 /* A8.8.221 SUB (immediate) (A8-708)
17786 SUB Rd, Rn, #value (Encoding T3). */
17787 bfd_vma patched_inst = 0xf1a00000
17788 | (target_reg << 8)
17789 | (source_reg << 16)
17790 | (/*S=*/0 << 20)
17791 | ((value & 0x800) >> 11) << 26
17792 | ((value & 0x700) >> 8) << 12
17793 | (value & 0x0ff);
17794
17795 return patched_inst;
17796 }
17797
17798 static inline bfd_vma
17799 create_instruction_vldmia (int base_reg, int is_dp, int wback, int num_words,
17800 int first_reg)
17801 {
17802 /* A8.8.332 VLDM (A8-922)
17803 VLMD{MODE} Rn{!}, {list} (Encoding T1 or T2). */
17804 bfd_vma patched_inst = (is_dp ? 0xec900b00 : 0xec900a00)
17805 | (/*W=*/wback << 21)
17806 | (base_reg << 16)
17807 | (num_words & 0x000000ff)
17808 | (((unsigned)first_reg >> 1) & 0x0000000f) << 12
17809 | (first_reg & 0x00000001) << 22;
17810
17811 return patched_inst;
17812 }
17813
17814 static inline bfd_vma
17815 create_instruction_vldmdb (int base_reg, int is_dp, int num_words,
17816 int first_reg)
17817 {
17818 /* A8.8.332 VLDM (A8-922)
17819 VLMD{MODE} Rn!, {} (Encoding T1 or T2). */
17820 bfd_vma patched_inst = (is_dp ? 0xed300b00 : 0xed300a00)
17821 | (base_reg << 16)
17822 | (num_words & 0x000000ff)
17823 | (((unsigned)first_reg >>1 ) & 0x0000000f) << 12
17824 | (first_reg & 0x00000001) << 22;
17825
17826 return patched_inst;
17827 }
17828
17829 static inline bfd_vma
17830 create_instruction_udf_w (int value)
17831 {
17832 /* A8.8.247 UDF (A8-758)
17833 Undefined (Encoding T2). */
17834 bfd_vma patched_inst = 0xf7f0a000
17835 | (value & 0x00000fff)
17836 | (value & 0x000f0000) << 16;
17837
17838 return patched_inst;
17839 }
17840
17841 static inline bfd_vma
17842 create_instruction_udf (int value)
17843 {
17844 /* A8.8.247 UDF (A8-758)
17845 Undefined (Encoding T1). */
17846 bfd_vma patched_inst = 0xde00
17847 | (value & 0xff);
17848
17849 return patched_inst;
17850 }
17851
17852 /* Functions writing an instruction in memory, returning the next
17853 memory position to write to. */
17854
17855 static inline bfd_byte *
17856 push_thumb2_insn32 (struct elf32_arm_link_hash_table * htab,
17857 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17858 {
17859 put_thumb2_insn (htab, output_bfd, insn, pt);
17860 return pt + 4;
17861 }
17862
17863 static inline bfd_byte *
17864 push_thumb2_insn16 (struct elf32_arm_link_hash_table * htab,
17865 bfd * output_bfd, bfd_byte *pt, insn32 insn)
17866 {
17867 put_thumb_insn (htab, output_bfd, insn, pt);
17868 return pt + 2;
17869 }
17870
17871 /* Function filling up a region in memory with T1 and T2 UDFs taking
17872 care of alignment. */
17873
17874 static bfd_byte *
17875 stm32l4xx_fill_stub_udf (struct elf32_arm_link_hash_table * htab,
17876 bfd * output_bfd,
17877 const bfd_byte * const base_stub_contents,
17878 bfd_byte * const from_stub_contents,
17879 const bfd_byte * const end_stub_contents)
17880 {
17881 bfd_byte *current_stub_contents = from_stub_contents;
17882
17883 /* Fill the remaining of the stub with deterministic contents : UDF
17884 instructions.
17885 Check if realignment is needed on modulo 4 frontier using T1, to
17886 further use T2. */
17887 if ((current_stub_contents < end_stub_contents)
17888 && !((current_stub_contents - base_stub_contents) % 2)
17889 && ((current_stub_contents - base_stub_contents) % 4))
17890 current_stub_contents =
17891 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
17892 create_instruction_udf (0));
17893
17894 for (; current_stub_contents < end_stub_contents;)
17895 current_stub_contents =
17896 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17897 create_instruction_udf_w (0));
17898
17899 return current_stub_contents;
17900 }
17901
17902 /* Functions writing the stream of instructions equivalent to the
17903 derived sequence for ldmia, ldmdb, vldm respectively. */
17904
17905 static void
17906 stm32l4xx_create_replacing_stub_ldmia (struct elf32_arm_link_hash_table * htab,
17907 bfd * output_bfd,
17908 const insn32 initial_insn,
17909 const bfd_byte *const initial_insn_addr,
17910 bfd_byte *const base_stub_contents)
17911 {
17912 int wback = (initial_insn & 0x00200000) >> 21;
17913 int ri, rn = (initial_insn & 0x000F0000) >> 16;
17914 int insn_all_registers = initial_insn & 0x0000ffff;
17915 int insn_low_registers, insn_high_registers;
17916 int usable_register_mask;
17917 int nb_registers = popcount (insn_all_registers);
17918 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
17919 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
17920 bfd_byte *current_stub_contents = base_stub_contents;
17921
17922 BFD_ASSERT (is_thumb2_ldmia (initial_insn));
17923
17924 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
17925 smaller than 8 registers load sequences that do not cause the
17926 hardware issue. */
17927 if (nb_registers <= 8)
17928 {
17929 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
17930 current_stub_contents =
17931 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17932 initial_insn);
17933
17934 /* B initial_insn_addr+4. */
17935 if (!restore_pc)
17936 current_stub_contents =
17937 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17938 create_instruction_branch_absolute
17939 (initial_insn_addr - current_stub_contents));
17940
17941 /* Fill the remaining of the stub with deterministic contents. */
17942 current_stub_contents =
17943 stm32l4xx_fill_stub_udf (htab, output_bfd,
17944 base_stub_contents, current_stub_contents,
17945 base_stub_contents +
17946 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
17947
17948 return;
17949 }
17950
17951 /* - reg_list[13] == 0. */
17952 BFD_ASSERT ((insn_all_registers & (1 << 13))==0);
17953
17954 /* - reg_list[14] & reg_list[15] != 1. */
17955 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
17956
17957 /* - if (wback==1) reg_list[rn] == 0. */
17958 BFD_ASSERT (!wback || !restore_rn);
17959
17960 /* - nb_registers > 8. */
17961 BFD_ASSERT (popcount (insn_all_registers) > 8);
17962
17963 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
17964
17965 /* In the following algorithm, we split this wide LDM using 2 LDM insns:
17966 - One with the 7 lowest registers (register mask 0x007F)
17967 This LDM will finally contain between 2 and 7 registers
17968 - One with the 7 highest registers (register mask 0xDF80)
17969 This ldm will finally contain between 2 and 7 registers. */
17970 insn_low_registers = insn_all_registers & 0x007F;
17971 insn_high_registers = insn_all_registers & 0xDF80;
17972
17973 /* A spare register may be needed during this veneer to temporarily
17974 handle the base register. This register will be restored with the
17975 last LDM operation.
17976 The usable register may be any general purpose register (that
17977 excludes PC, SP, LR : register mask is 0x1FFF). */
17978 usable_register_mask = 0x1FFF;
17979
17980 /* Generate the stub function. */
17981 if (wback)
17982 {
17983 /* LDMIA Rn!, {R-low-register-list} : (Encoding T2). */
17984 current_stub_contents =
17985 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17986 create_instruction_ldmia
17987 (rn, /*wback=*/1, insn_low_registers));
17988
17989 /* LDMIA Rn!, {R-high-register-list} : (Encoding T2). */
17990 current_stub_contents =
17991 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17992 create_instruction_ldmia
17993 (rn, /*wback=*/1, insn_high_registers));
17994 if (!restore_pc)
17995 {
17996 /* B initial_insn_addr+4. */
17997 current_stub_contents =
17998 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
17999 create_instruction_branch_absolute
18000 (initial_insn_addr - current_stub_contents));
18001 }
18002 }
18003 else /* if (!wback). */
18004 {
18005 ri = rn;
18006
18007 /* If Rn is not part of the high-register-list, move it there. */
18008 if (!(insn_high_registers & (1 << rn)))
18009 {
18010 /* Choose a Ri in the high-register-list that will be restored. */
18011 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18012
18013 /* MOV Ri, Rn. */
18014 current_stub_contents =
18015 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18016 create_instruction_mov (ri, rn));
18017 }
18018
18019 /* LDMIA Ri!, {R-low-register-list} : (Encoding T2). */
18020 current_stub_contents =
18021 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18022 create_instruction_ldmia
18023 (ri, /*wback=*/1, insn_low_registers));
18024
18025 /* LDMIA Ri, {R-high-register-list} : (Encoding T2). */
18026 current_stub_contents =
18027 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18028 create_instruction_ldmia
18029 (ri, /*wback=*/0, insn_high_registers));
18030
18031 if (!restore_pc)
18032 {
18033 /* B initial_insn_addr+4. */
18034 current_stub_contents =
18035 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18036 create_instruction_branch_absolute
18037 (initial_insn_addr - current_stub_contents));
18038 }
18039 }
18040
18041 /* Fill the remaining of the stub with deterministic contents. */
18042 current_stub_contents =
18043 stm32l4xx_fill_stub_udf (htab, output_bfd,
18044 base_stub_contents, current_stub_contents,
18045 base_stub_contents +
18046 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18047 }
18048
18049 static void
18050 stm32l4xx_create_replacing_stub_ldmdb (struct elf32_arm_link_hash_table * htab,
18051 bfd * output_bfd,
18052 const insn32 initial_insn,
18053 const bfd_byte *const initial_insn_addr,
18054 bfd_byte *const base_stub_contents)
18055 {
18056 int wback = (initial_insn & 0x00200000) >> 21;
18057 int ri, rn = (initial_insn & 0x000f0000) >> 16;
18058 int insn_all_registers = initial_insn & 0x0000ffff;
18059 int insn_low_registers, insn_high_registers;
18060 int usable_register_mask;
18061 int restore_pc = (insn_all_registers & (1 << 15)) ? 1 : 0;
18062 int restore_rn = (insn_all_registers & (1 << rn)) ? 1 : 0;
18063 int nb_registers = popcount (insn_all_registers);
18064 bfd_byte *current_stub_contents = base_stub_contents;
18065
18066 BFD_ASSERT (is_thumb2_ldmdb (initial_insn));
18067
18068 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18069 smaller than 8 registers load sequences that do not cause the
18070 hardware issue. */
18071 if (nb_registers <= 8)
18072 {
18073 /* UNTOUCHED : LDMIA Rn{!}, {R-all-register-list}. */
18074 current_stub_contents =
18075 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18076 initial_insn);
18077
18078 /* B initial_insn_addr+4. */
18079 current_stub_contents =
18080 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18081 create_instruction_branch_absolute
18082 (initial_insn_addr - current_stub_contents));
18083
18084 /* Fill the remaining of the stub with deterministic contents. */
18085 current_stub_contents =
18086 stm32l4xx_fill_stub_udf (htab, output_bfd,
18087 base_stub_contents, current_stub_contents,
18088 base_stub_contents +
18089 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18090
18091 return;
18092 }
18093
18094 /* - reg_list[13] == 0. */
18095 BFD_ASSERT ((insn_all_registers & (1 << 13)) == 0);
18096
18097 /* - reg_list[14] & reg_list[15] != 1. */
18098 BFD_ASSERT ((insn_all_registers & 0xC000) != 0xC000);
18099
18100 /* - if (wback==1) reg_list[rn] == 0. */
18101 BFD_ASSERT (!wback || !restore_rn);
18102
18103 /* - nb_registers > 8. */
18104 BFD_ASSERT (popcount (insn_all_registers) > 8);
18105
18106 /* At this point, LDMxx initial insn loads between 9 and 14 registers. */
18107
18108 /* In the following algorithm, we split this wide LDM using 2 LDM insn:
18109 - One with the 7 lowest registers (register mask 0x007F)
18110 This LDM will finally contain between 2 and 7 registers
18111 - One with the 7 highest registers (register mask 0xDF80)
18112 This ldm will finally contain between 2 and 7 registers. */
18113 insn_low_registers = insn_all_registers & 0x007F;
18114 insn_high_registers = insn_all_registers & 0xDF80;
18115
18116 /* A spare register may be needed during this veneer to temporarily
18117 handle the base register. This register will be restored with
18118 the last LDM operation.
18119 The usable register may be any general purpose register (that excludes
18120 PC, SP, LR : register mask is 0x1FFF). */
18121 usable_register_mask = 0x1FFF;
18122
18123 /* Generate the stub function. */
18124 if (!wback && !restore_pc && !restore_rn)
18125 {
18126 /* Choose a Ri in the low-register-list that will be restored. */
18127 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18128
18129 /* MOV Ri, Rn. */
18130 current_stub_contents =
18131 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18132 create_instruction_mov (ri, rn));
18133
18134 /* LDMDB Ri!, {R-high-register-list}. */
18135 current_stub_contents =
18136 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18137 create_instruction_ldmdb
18138 (ri, /*wback=*/1, insn_high_registers));
18139
18140 /* LDMDB Ri, {R-low-register-list}. */
18141 current_stub_contents =
18142 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18143 create_instruction_ldmdb
18144 (ri, /*wback=*/0, insn_low_registers));
18145
18146 /* B initial_insn_addr+4. */
18147 current_stub_contents =
18148 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18149 create_instruction_branch_absolute
18150 (initial_insn_addr - current_stub_contents));
18151 }
18152 else if (wback && !restore_pc && !restore_rn)
18153 {
18154 /* LDMDB Rn!, {R-high-register-list}. */
18155 current_stub_contents =
18156 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18157 create_instruction_ldmdb
18158 (rn, /*wback=*/1, insn_high_registers));
18159
18160 /* LDMDB Rn!, {R-low-register-list}. */
18161 current_stub_contents =
18162 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18163 create_instruction_ldmdb
18164 (rn, /*wback=*/1, insn_low_registers));
18165
18166 /* B initial_insn_addr+4. */
18167 current_stub_contents =
18168 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18169 create_instruction_branch_absolute
18170 (initial_insn_addr - current_stub_contents));
18171 }
18172 else if (!wback && restore_pc && !restore_rn)
18173 {
18174 /* Choose a Ri in the high-register-list that will be restored. */
18175 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18176
18177 /* SUB Ri, Rn, #(4*nb_registers). */
18178 current_stub_contents =
18179 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18180 create_instruction_sub (ri, rn, (4 * nb_registers)));
18181
18182 /* LDMIA Ri!, {R-low-register-list}. */
18183 current_stub_contents =
18184 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18185 create_instruction_ldmia
18186 (ri, /*wback=*/1, insn_low_registers));
18187
18188 /* LDMIA Ri, {R-high-register-list}. */
18189 current_stub_contents =
18190 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18191 create_instruction_ldmia
18192 (ri, /*wback=*/0, insn_high_registers));
18193 }
18194 else if (wback && restore_pc && !restore_rn)
18195 {
18196 /* Choose a Ri in the high-register-list that will be restored. */
18197 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18198
18199 /* SUB Rn, Rn, #(4*nb_registers) */
18200 current_stub_contents =
18201 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18202 create_instruction_sub (rn, rn, (4 * nb_registers)));
18203
18204 /* MOV Ri, Rn. */
18205 current_stub_contents =
18206 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18207 create_instruction_mov (ri, rn));
18208
18209 /* LDMIA Ri!, {R-low-register-list}. */
18210 current_stub_contents =
18211 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18212 create_instruction_ldmia
18213 (ri, /*wback=*/1, insn_low_registers));
18214
18215 /* LDMIA Ri, {R-high-register-list}. */
18216 current_stub_contents =
18217 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18218 create_instruction_ldmia
18219 (ri, /*wback=*/0, insn_high_registers));
18220 }
18221 else if (!wback && !restore_pc && restore_rn)
18222 {
18223 ri = rn;
18224 if (!(insn_low_registers & (1 << rn)))
18225 {
18226 /* Choose a Ri in the low-register-list that will be restored. */
18227 ri = ctz (insn_low_registers & usable_register_mask & ~(1 << rn));
18228
18229 /* MOV Ri, Rn. */
18230 current_stub_contents =
18231 push_thumb2_insn16 (htab, output_bfd, current_stub_contents,
18232 create_instruction_mov (ri, rn));
18233 }
18234
18235 /* LDMDB Ri!, {R-high-register-list}. */
18236 current_stub_contents =
18237 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18238 create_instruction_ldmdb
18239 (ri, /*wback=*/1, insn_high_registers));
18240
18241 /* LDMDB Ri, {R-low-register-list}. */
18242 current_stub_contents =
18243 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18244 create_instruction_ldmdb
18245 (ri, /*wback=*/0, insn_low_registers));
18246
18247 /* B initial_insn_addr+4. */
18248 current_stub_contents =
18249 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18250 create_instruction_branch_absolute
18251 (initial_insn_addr - current_stub_contents));
18252 }
18253 else if (!wback && restore_pc && restore_rn)
18254 {
18255 ri = rn;
18256 if (!(insn_high_registers & (1 << rn)))
18257 {
18258 /* Choose a Ri in the high-register-list that will be restored. */
18259 ri = ctz (insn_high_registers & usable_register_mask & ~(1 << rn));
18260 }
18261
18262 /* SUB Ri, Rn, #(4*nb_registers). */
18263 current_stub_contents =
18264 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18265 create_instruction_sub (ri, rn, (4 * nb_registers)));
18266
18267 /* LDMIA Ri!, {R-low-register-list}. */
18268 current_stub_contents =
18269 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18270 create_instruction_ldmia
18271 (ri, /*wback=*/1, insn_low_registers));
18272
18273 /* LDMIA Ri, {R-high-register-list}. */
18274 current_stub_contents =
18275 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18276 create_instruction_ldmia
18277 (ri, /*wback=*/0, insn_high_registers));
18278 }
18279 else if (wback && restore_rn)
18280 {
18281 /* The assembler should not have accepted to encode this. */
18282 BFD_ASSERT (0 && "Cannot patch an instruction that has an "
18283 "undefined behavior.\n");
18284 }
18285
18286 /* Fill the remaining of the stub with deterministic contents. */
18287 current_stub_contents =
18288 stm32l4xx_fill_stub_udf (htab, output_bfd,
18289 base_stub_contents, current_stub_contents,
18290 base_stub_contents +
18291 STM32L4XX_ERRATUM_LDM_VENEER_SIZE);
18292
18293 }
18294
18295 static void
18296 stm32l4xx_create_replacing_stub_vldm (struct elf32_arm_link_hash_table * htab,
18297 bfd * output_bfd,
18298 const insn32 initial_insn,
18299 const bfd_byte *const initial_insn_addr,
18300 bfd_byte *const base_stub_contents)
18301 {
18302 int num_words = ((unsigned int) initial_insn << 24) >> 24;
18303 bfd_byte *current_stub_contents = base_stub_contents;
18304
18305 BFD_ASSERT (is_thumb2_vldm (initial_insn));
18306
18307 /* In BFD_ARM_STM32L4XX_FIX_ALL mode we may have to deal with
18308 smaller than 8 words load sequences that do not cause the
18309 hardware issue. */
18310 if (num_words <= 8)
18311 {
18312 /* Untouched instruction. */
18313 current_stub_contents =
18314 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18315 initial_insn);
18316
18317 /* B initial_insn_addr+4. */
18318 current_stub_contents =
18319 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18320 create_instruction_branch_absolute
18321 (initial_insn_addr - current_stub_contents));
18322 }
18323 else
18324 {
18325 bfd_boolean is_dp = /* DP encoding. */
18326 (initial_insn & 0xfe100f00) == 0xec100b00;
18327 bfd_boolean is_ia_nobang = /* (IA without !). */
18328 (((initial_insn << 7) >> 28) & 0xd) == 0x4;
18329 bfd_boolean is_ia_bang = /* (IA with !) - includes VPOP. */
18330 (((initial_insn << 7) >> 28) & 0xd) == 0x5;
18331 bfd_boolean is_db_bang = /* (DB with !). */
18332 (((initial_insn << 7) >> 28) & 0xd) == 0x9;
18333 int base_reg = ((unsigned int) initial_insn << 12) >> 28;
18334 /* d = UInt (Vd:D);. */
18335 int first_reg = ((((unsigned int) initial_insn << 16) >> 28) << 1)
18336 | (((unsigned int)initial_insn << 9) >> 31);
18337
18338 /* Compute the number of 8-words chunks needed to split. */
18339 int chunks = (num_words % 8) ? (num_words / 8 + 1) : (num_words / 8);
18340 int chunk;
18341
18342 /* The test coverage has been done assuming the following
18343 hypothesis that exactly one of the previous is_ predicates is
18344 true. */
18345 BFD_ASSERT ( (is_ia_nobang ^ is_ia_bang ^ is_db_bang)
18346 && !(is_ia_nobang & is_ia_bang & is_db_bang));
18347
18348 /* We treat the cutting of the words in one pass for all
18349 cases, then we emit the adjustments:
18350
18351 vldm rx, {...}
18352 -> vldm rx!, {8_words_or_less} for each needed 8_word
18353 -> sub rx, rx, #size (list)
18354
18355 vldm rx!, {...}
18356 -> vldm rx!, {8_words_or_less} for each needed 8_word
18357 This also handles vpop instruction (when rx is sp)
18358
18359 vldmd rx!, {...}
18360 -> vldmb rx!, {8_words_or_less} for each needed 8_word. */
18361 for (chunk = 0; chunk < chunks; ++chunk)
18362 {
18363 bfd_vma new_insn = 0;
18364
18365 if (is_ia_nobang || is_ia_bang)
18366 {
18367 new_insn = create_instruction_vldmia
18368 (base_reg,
18369 is_dp,
18370 /*wback= . */1,
18371 chunks - (chunk + 1) ?
18372 8 : num_words - chunk * 8,
18373 first_reg + chunk * 8);
18374 }
18375 else if (is_db_bang)
18376 {
18377 new_insn = create_instruction_vldmdb
18378 (base_reg,
18379 is_dp,
18380 chunks - (chunk + 1) ?
18381 8 : num_words - chunk * 8,
18382 first_reg + chunk * 8);
18383 }
18384
18385 if (new_insn)
18386 current_stub_contents =
18387 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18388 new_insn);
18389 }
18390
18391 /* Only this case requires the base register compensation
18392 subtract. */
18393 if (is_ia_nobang)
18394 {
18395 current_stub_contents =
18396 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18397 create_instruction_sub
18398 (base_reg, base_reg, 4*num_words));
18399 }
18400
18401 /* B initial_insn_addr+4. */
18402 current_stub_contents =
18403 push_thumb2_insn32 (htab, output_bfd, current_stub_contents,
18404 create_instruction_branch_absolute
18405 (initial_insn_addr - current_stub_contents));
18406 }
18407
18408 /* Fill the remaining of the stub with deterministic contents. */
18409 current_stub_contents =
18410 stm32l4xx_fill_stub_udf (htab, output_bfd,
18411 base_stub_contents, current_stub_contents,
18412 base_stub_contents +
18413 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE);
18414 }
18415
18416 static void
18417 stm32l4xx_create_replacing_stub (struct elf32_arm_link_hash_table * htab,
18418 bfd * output_bfd,
18419 const insn32 wrong_insn,
18420 const bfd_byte *const wrong_insn_addr,
18421 bfd_byte *const stub_contents)
18422 {
18423 if (is_thumb2_ldmia (wrong_insn))
18424 stm32l4xx_create_replacing_stub_ldmia (htab, output_bfd,
18425 wrong_insn, wrong_insn_addr,
18426 stub_contents);
18427 else if (is_thumb2_ldmdb (wrong_insn))
18428 stm32l4xx_create_replacing_stub_ldmdb (htab, output_bfd,
18429 wrong_insn, wrong_insn_addr,
18430 stub_contents);
18431 else if (is_thumb2_vldm (wrong_insn))
18432 stm32l4xx_create_replacing_stub_vldm (htab, output_bfd,
18433 wrong_insn, wrong_insn_addr,
18434 stub_contents);
18435 }
18436
18437 /* End of stm32l4xx work-around. */
18438
18439
18440 /* Do code byteswapping. Return FALSE afterwards so that the section is
18441 written out as normal. */
18442
18443 static bfd_boolean
18444 elf32_arm_write_section (bfd *output_bfd,
18445 struct bfd_link_info *link_info,
18446 asection *sec,
18447 bfd_byte *contents)
18448 {
18449 unsigned int mapcount, errcount;
18450 _arm_elf_section_data *arm_data;
18451 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
18452 elf32_arm_section_map *map;
18453 elf32_vfp11_erratum_list *errnode;
18454 elf32_stm32l4xx_erratum_list *stm32l4xx_errnode;
18455 bfd_vma ptr;
18456 bfd_vma end;
18457 bfd_vma offset = sec->output_section->vma + sec->output_offset;
18458 bfd_byte tmp;
18459 unsigned int i;
18460
18461 if (globals == NULL)
18462 return FALSE;
18463
18464 /* If this section has not been allocated an _arm_elf_section_data
18465 structure then we cannot record anything. */
18466 arm_data = get_arm_elf_section_data (sec);
18467 if (arm_data == NULL)
18468 return FALSE;
18469
18470 mapcount = arm_data->mapcount;
18471 map = arm_data->map;
18472 errcount = arm_data->erratumcount;
18473
18474 if (errcount != 0)
18475 {
18476 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
18477
18478 for (errnode = arm_data->erratumlist; errnode != 0;
18479 errnode = errnode->next)
18480 {
18481 bfd_vma target = errnode->vma - offset;
18482
18483 switch (errnode->type)
18484 {
18485 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
18486 {
18487 bfd_vma branch_to_veneer;
18488 /* Original condition code of instruction, plus bit mask for
18489 ARM B instruction. */
18490 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
18491 | 0x0a000000;
18492
18493 /* The instruction is before the label. */
18494 target -= 4;
18495
18496 /* Above offset included in -4 below. */
18497 branch_to_veneer = errnode->u.b.veneer->vma
18498 - errnode->vma - 4;
18499
18500 if ((signed) branch_to_veneer < -(1 << 25)
18501 || (signed) branch_to_veneer >= (1 << 25))
18502 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18503 "range"), output_bfd);
18504
18505 insn |= (branch_to_veneer >> 2) & 0xffffff;
18506 contents[endianflip ^ target] = insn & 0xff;
18507 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18508 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18509 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18510 }
18511 break;
18512
18513 case VFP11_ERRATUM_ARM_VENEER:
18514 {
18515 bfd_vma branch_from_veneer;
18516 unsigned int insn;
18517
18518 /* Take size of veneer into account. */
18519 branch_from_veneer = errnode->u.v.branch->vma
18520 - errnode->vma - 12;
18521
18522 if ((signed) branch_from_veneer < -(1 << 25)
18523 || (signed) branch_from_veneer >= (1 << 25))
18524 _bfd_error_handler (_("%B: error: VFP11 veneer out of "
18525 "range"), output_bfd);
18526
18527 /* Original instruction. */
18528 insn = errnode->u.v.branch->u.b.vfp_insn;
18529 contents[endianflip ^ target] = insn & 0xff;
18530 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
18531 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
18532 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
18533
18534 /* Branch back to insn after original insn. */
18535 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
18536 contents[endianflip ^ (target + 4)] = insn & 0xff;
18537 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
18538 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
18539 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
18540 }
18541 break;
18542
18543 default:
18544 abort ();
18545 }
18546 }
18547 }
18548
18549 if (arm_data->stm32l4xx_erratumcount != 0)
18550 {
18551 for (stm32l4xx_errnode = arm_data->stm32l4xx_erratumlist;
18552 stm32l4xx_errnode != 0;
18553 stm32l4xx_errnode = stm32l4xx_errnode->next)
18554 {
18555 bfd_vma target = stm32l4xx_errnode->vma - offset;
18556
18557 switch (stm32l4xx_errnode->type)
18558 {
18559 case STM32L4XX_ERRATUM_BRANCH_TO_VENEER:
18560 {
18561 unsigned int insn;
18562 bfd_vma branch_to_veneer =
18563 stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma;
18564
18565 if ((signed) branch_to_veneer < -(1 << 24)
18566 || (signed) branch_to_veneer >= (1 << 24))
18567 {
18568 bfd_vma out_of_range =
18569 ((signed) branch_to_veneer < -(1 << 24)) ?
18570 - branch_to_veneer - (1 << 24) :
18571 ((signed) branch_to_veneer >= (1 << 24)) ?
18572 branch_to_veneer - (1 << 24) : 0;
18573
18574 _bfd_error_handler
18575 (_("%B(%#x): error: Cannot create STM32L4XX veneer. "
18576 "Jump out of range by %ld bytes. "
18577 "Cannot encode branch instruction. "),
18578 output_bfd,
18579 (long) (stm32l4xx_errnode->vma - 4),
18580 out_of_range);
18581 continue;
18582 }
18583
18584 insn = create_instruction_branch_absolute
18585 (stm32l4xx_errnode->u.b.veneer->vma - stm32l4xx_errnode->vma);
18586
18587 /* The instruction is before the label. */
18588 target -= 4;
18589
18590 put_thumb2_insn (globals, output_bfd,
18591 (bfd_vma) insn, contents + target);
18592 }
18593 break;
18594
18595 case STM32L4XX_ERRATUM_VENEER:
18596 {
18597 bfd_byte * veneer;
18598 bfd_byte * veneer_r;
18599 unsigned int insn;
18600
18601 veneer = contents + target;
18602 veneer_r = veneer
18603 + stm32l4xx_errnode->u.b.veneer->vma
18604 - stm32l4xx_errnode->vma - 4;
18605
18606 if ((signed) (veneer_r - veneer -
18607 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE >
18608 STM32L4XX_ERRATUM_LDM_VENEER_SIZE ?
18609 STM32L4XX_ERRATUM_VLDM_VENEER_SIZE :
18610 STM32L4XX_ERRATUM_LDM_VENEER_SIZE) < -(1 << 24)
18611 || (signed) (veneer_r - veneer) >= (1 << 24))
18612 {
18613 _bfd_error_handler (_("%B: error: Cannot create STM32L4XX "
18614 "veneer."), output_bfd);
18615 continue;
18616 }
18617
18618 /* Original instruction. */
18619 insn = stm32l4xx_errnode->u.v.branch->u.b.insn;
18620
18621 stm32l4xx_create_replacing_stub
18622 (globals, output_bfd, insn, (void*)veneer_r, (void*)veneer);
18623 }
18624 break;
18625
18626 default:
18627 abort ();
18628 }
18629 }
18630 }
18631
18632 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
18633 {
18634 arm_unwind_table_edit *edit_node
18635 = arm_data->u.exidx.unwind_edit_list;
18636 /* Now, sec->size is the size of the section we will write. The original
18637 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
18638 markers) was sec->rawsize. (This isn't the case if we perform no
18639 edits, then rawsize will be zero and we should use size). */
18640 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
18641 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
18642 unsigned int in_index, out_index;
18643 bfd_vma add_to_offsets = 0;
18644
18645 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
18646 {
18647 if (edit_node)
18648 {
18649 unsigned int edit_index = edit_node->index;
18650
18651 if (in_index < edit_index && in_index * 8 < input_size)
18652 {
18653 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18654 contents + in_index * 8, add_to_offsets);
18655 out_index++;
18656 in_index++;
18657 }
18658 else if (in_index == edit_index
18659 || (in_index * 8 >= input_size
18660 && edit_index == UINT_MAX))
18661 {
18662 switch (edit_node->type)
18663 {
18664 case DELETE_EXIDX_ENTRY:
18665 in_index++;
18666 add_to_offsets += 8;
18667 break;
18668
18669 case INSERT_EXIDX_CANTUNWIND_AT_END:
18670 {
18671 asection *text_sec = edit_node->linked_section;
18672 bfd_vma text_offset = text_sec->output_section->vma
18673 + text_sec->output_offset
18674 + text_sec->size;
18675 bfd_vma exidx_offset = offset + out_index * 8;
18676 unsigned long prel31_offset;
18677
18678 /* Note: this is meant to be equivalent to an
18679 R_ARM_PREL31 relocation. These synthetic
18680 EXIDX_CANTUNWIND markers are not relocated by the
18681 usual BFD method. */
18682 prel31_offset = (text_offset - exidx_offset)
18683 & 0x7ffffffful;
18684 if (bfd_link_relocatable (link_info))
18685 {
18686 /* Here relocation for new EXIDX_CANTUNWIND is
18687 created, so there is no need to
18688 adjust offset by hand. */
18689 prel31_offset = text_sec->output_offset
18690 + text_sec->size;
18691 }
18692
18693 /* First address we can't unwind. */
18694 bfd_put_32 (output_bfd, prel31_offset,
18695 &edited_contents[out_index * 8]);
18696
18697 /* Code for EXIDX_CANTUNWIND. */
18698 bfd_put_32 (output_bfd, 0x1,
18699 &edited_contents[out_index * 8 + 4]);
18700
18701 out_index++;
18702 add_to_offsets -= 8;
18703 }
18704 break;
18705 }
18706
18707 edit_node = edit_node->next;
18708 }
18709 }
18710 else
18711 {
18712 /* No more edits, copy remaining entries verbatim. */
18713 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
18714 contents + in_index * 8, add_to_offsets);
18715 out_index++;
18716 in_index++;
18717 }
18718 }
18719
18720 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
18721 bfd_set_section_contents (output_bfd, sec->output_section,
18722 edited_contents,
18723 (file_ptr) sec->output_offset, sec->size);
18724
18725 return TRUE;
18726 }
18727
18728 /* Fix code to point to Cortex-A8 erratum stubs. */
18729 if (globals->fix_cortex_a8)
18730 {
18731 struct a8_branch_to_stub_data data;
18732
18733 data.writing_section = sec;
18734 data.contents = contents;
18735
18736 bfd_hash_traverse (& globals->stub_hash_table, make_branch_to_a8_stub,
18737 & data);
18738 }
18739
18740 if (mapcount == 0)
18741 return FALSE;
18742
18743 if (globals->byteswap_code)
18744 {
18745 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
18746
18747 ptr = map[0].vma;
18748 for (i = 0; i < mapcount; i++)
18749 {
18750 if (i == mapcount - 1)
18751 end = sec->size;
18752 else
18753 end = map[i + 1].vma;
18754
18755 switch (map[i].type)
18756 {
18757 case 'a':
18758 /* Byte swap code words. */
18759 while (ptr + 3 < end)
18760 {
18761 tmp = contents[ptr];
18762 contents[ptr] = contents[ptr + 3];
18763 contents[ptr + 3] = tmp;
18764 tmp = contents[ptr + 1];
18765 contents[ptr + 1] = contents[ptr + 2];
18766 contents[ptr + 2] = tmp;
18767 ptr += 4;
18768 }
18769 break;
18770
18771 case 't':
18772 /* Byte swap code halfwords. */
18773 while (ptr + 1 < end)
18774 {
18775 tmp = contents[ptr];
18776 contents[ptr] = contents[ptr + 1];
18777 contents[ptr + 1] = tmp;
18778 ptr += 2;
18779 }
18780 break;
18781
18782 case 'd':
18783 /* Leave data alone. */
18784 break;
18785 }
18786 ptr = end;
18787 }
18788 }
18789
18790 free (map);
18791 arm_data->mapcount = -1;
18792 arm_data->mapsize = 0;
18793 arm_data->map = NULL;
18794
18795 return FALSE;
18796 }
18797
18798 /* Mangle thumb function symbols as we read them in. */
18799
18800 static bfd_boolean
18801 elf32_arm_swap_symbol_in (bfd * abfd,
18802 const void *psrc,
18803 const void *pshn,
18804 Elf_Internal_Sym *dst)
18805 {
18806 Elf_Internal_Shdr *symtab_hdr;
18807 const char *name = NULL;
18808
18809 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
18810 return FALSE;
18811 dst->st_target_internal = 0;
18812
18813 /* New EABI objects mark thumb function symbols by setting the low bit of
18814 the address. */
18815 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
18816 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
18817 {
18818 if (dst->st_value & 1)
18819 {
18820 dst->st_value &= ~(bfd_vma) 1;
18821 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal,
18822 ST_BRANCH_TO_THUMB);
18823 }
18824 else
18825 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_ARM);
18826 }
18827 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
18828 {
18829 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
18830 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_TO_THUMB);
18831 }
18832 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
18833 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_LONG);
18834 else
18835 ARM_SET_SYM_BRANCH_TYPE (dst->st_target_internal, ST_BRANCH_UNKNOWN);
18836
18837 /* Mark CMSE special symbols. */
18838 symtab_hdr = & elf_symtab_hdr (abfd);
18839 if (symtab_hdr->sh_size)
18840 name = bfd_elf_sym_name (abfd, symtab_hdr, dst, NULL);
18841 if (name && CONST_STRNEQ (name, CMSE_PREFIX))
18842 ARM_SET_SYM_CMSE_SPCL (dst->st_target_internal);
18843
18844 return TRUE;
18845 }
18846
18847
18848 /* Mangle thumb function symbols as we write them out. */
18849
18850 static void
18851 elf32_arm_swap_symbol_out (bfd *abfd,
18852 const Elf_Internal_Sym *src,
18853 void *cdst,
18854 void *shndx)
18855 {
18856 Elf_Internal_Sym newsym;
18857
18858 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
18859 of the address set, as per the new EABI. We do this unconditionally
18860 because objcopy does not set the elf header flags until after
18861 it writes out the symbol table. */
18862 if (ARM_GET_SYM_BRANCH_TYPE (src->st_target_internal) == ST_BRANCH_TO_THUMB)
18863 {
18864 newsym = *src;
18865 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
18866 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
18867 if (newsym.st_shndx != SHN_UNDEF)
18868 {
18869 /* Do this only for defined symbols. At link type, the static
18870 linker will simulate the work of dynamic linker of resolving
18871 symbols and will carry over the thumbness of found symbols to
18872 the output symbol table. It's not clear how it happens, but
18873 the thumbness of undefined symbols can well be different at
18874 runtime, and writing '1' for them will be confusing for users
18875 and possibly for dynamic linker itself.
18876 */
18877 newsym.st_value |= 1;
18878 }
18879
18880 src = &newsym;
18881 }
18882 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
18883 }
18884
18885 /* Add the PT_ARM_EXIDX program header. */
18886
18887 static bfd_boolean
18888 elf32_arm_modify_segment_map (bfd *abfd,
18889 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18890 {
18891 struct elf_segment_map *m;
18892 asection *sec;
18893
18894 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18895 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18896 {
18897 /* If there is already a PT_ARM_EXIDX header, then we do not
18898 want to add another one. This situation arises when running
18899 "strip"; the input binary already has the header. */
18900 m = elf_seg_map (abfd);
18901 while (m && m->p_type != PT_ARM_EXIDX)
18902 m = m->next;
18903 if (!m)
18904 {
18905 m = (struct elf_segment_map *)
18906 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
18907 if (m == NULL)
18908 return FALSE;
18909 m->p_type = PT_ARM_EXIDX;
18910 m->count = 1;
18911 m->sections[0] = sec;
18912
18913 m->next = elf_seg_map (abfd);
18914 elf_seg_map (abfd) = m;
18915 }
18916 }
18917
18918 return TRUE;
18919 }
18920
18921 /* We may add a PT_ARM_EXIDX program header. */
18922
18923 static int
18924 elf32_arm_additional_program_headers (bfd *abfd,
18925 struct bfd_link_info *info ATTRIBUTE_UNUSED)
18926 {
18927 asection *sec;
18928
18929 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
18930 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
18931 return 1;
18932 else
18933 return 0;
18934 }
18935
18936 /* Hook called by the linker routine which adds symbols from an object
18937 file. */
18938
18939 static bfd_boolean
18940 elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
18941 Elf_Internal_Sym *sym, const char **namep,
18942 flagword *flagsp, asection **secp, bfd_vma *valp)
18943 {
18944 if (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
18945 && (abfd->flags & DYNAMIC) == 0
18946 && bfd_get_flavour (info->output_bfd) == bfd_target_elf_flavour)
18947 elf_tdata (info->output_bfd)->has_gnu_symbols |= elf_gnu_symbol_ifunc;
18948
18949 if (elf32_arm_hash_table (info) == NULL)
18950 return FALSE;
18951
18952 if (elf32_arm_hash_table (info)->vxworks_p
18953 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
18954 flagsp, secp, valp))
18955 return FALSE;
18956
18957 return TRUE;
18958 }
18959
18960 /* We use this to override swap_symbol_in and swap_symbol_out. */
18961 const struct elf_size_info elf32_arm_size_info =
18962 {
18963 sizeof (Elf32_External_Ehdr),
18964 sizeof (Elf32_External_Phdr),
18965 sizeof (Elf32_External_Shdr),
18966 sizeof (Elf32_External_Rel),
18967 sizeof (Elf32_External_Rela),
18968 sizeof (Elf32_External_Sym),
18969 sizeof (Elf32_External_Dyn),
18970 sizeof (Elf_External_Note),
18971 4,
18972 1,
18973 32, 2,
18974 ELFCLASS32, EV_CURRENT,
18975 bfd_elf32_write_out_phdrs,
18976 bfd_elf32_write_shdrs_and_ehdr,
18977 bfd_elf32_checksum_contents,
18978 bfd_elf32_write_relocs,
18979 elf32_arm_swap_symbol_in,
18980 elf32_arm_swap_symbol_out,
18981 bfd_elf32_slurp_reloc_table,
18982 bfd_elf32_slurp_symbol_table,
18983 bfd_elf32_swap_dyn_in,
18984 bfd_elf32_swap_dyn_out,
18985 bfd_elf32_swap_reloc_in,
18986 bfd_elf32_swap_reloc_out,
18987 bfd_elf32_swap_reloca_in,
18988 bfd_elf32_swap_reloca_out
18989 };
18990
18991 static bfd_vma
18992 read_code32 (const bfd *abfd, const bfd_byte *addr)
18993 {
18994 /* V7 BE8 code is always little endian. */
18995 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
18996 return bfd_getl32 (addr);
18997
18998 return bfd_get_32 (abfd, addr);
18999 }
19000
19001 static bfd_vma
19002 read_code16 (const bfd *abfd, const bfd_byte *addr)
19003 {
19004 /* V7 BE8 code is always little endian. */
19005 if ((elf_elfheader (abfd)->e_flags & EF_ARM_BE8) != 0)
19006 return bfd_getl16 (addr);
19007
19008 return bfd_get_16 (abfd, addr);
19009 }
19010
19011 /* Return size of plt0 entry starting at ADDR
19012 or (bfd_vma) -1 if size can not be determined. */
19013
19014 static bfd_vma
19015 elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
19016 {
19017 bfd_vma first_word;
19018 bfd_vma plt0_size;
19019
19020 first_word = read_code32 (abfd, addr);
19021
19022 if (first_word == elf32_arm_plt0_entry[0])
19023 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
19024 else if (first_word == elf32_thumb2_plt0_entry[0])
19025 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
19026 else
19027 /* We don't yet handle this PLT format. */
19028 return (bfd_vma) -1;
19029
19030 return plt0_size;
19031 }
19032
19033 /* Return size of plt entry starting at offset OFFSET
19034 of plt section located at address START
19035 or (bfd_vma) -1 if size can not be determined. */
19036
19037 static bfd_vma
19038 elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
19039 {
19040 bfd_vma first_insn;
19041 bfd_vma plt_size = 0;
19042 const bfd_byte *addr = start + offset;
19043
19044 /* PLT entry size if fixed on Thumb-only platforms. */
19045 if (read_code32 (abfd, start) == elf32_thumb2_plt0_entry[0])
19046 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
19047
19048 /* Respect Thumb stub if necessary. */
19049 if (read_code16 (abfd, addr) == elf32_arm_plt_thumb_stub[0])
19050 {
19051 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
19052 }
19053
19054 /* Strip immediate from first add. */
19055 first_insn = read_code32 (abfd, addr + plt_size) & 0xffffff00;
19056
19057 #ifdef FOUR_WORD_PLT
19058 if (first_insn == elf32_arm_plt_entry[0])
19059 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
19060 #else
19061 if (first_insn == elf32_arm_plt_entry_long[0])
19062 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
19063 else if (first_insn == elf32_arm_plt_entry_short[0])
19064 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
19065 #endif
19066 else
19067 /* We don't yet handle this PLT format. */
19068 return (bfd_vma) -1;
19069
19070 return plt_size;
19071 }
19072
19073 /* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
19074
19075 static long
19076 elf32_arm_get_synthetic_symtab (bfd *abfd,
19077 long symcount ATTRIBUTE_UNUSED,
19078 asymbol **syms ATTRIBUTE_UNUSED,
19079 long dynsymcount,
19080 asymbol **dynsyms,
19081 asymbol **ret)
19082 {
19083 asection *relplt;
19084 asymbol *s;
19085 arelent *p;
19086 long count, i, n;
19087 size_t size;
19088 Elf_Internal_Shdr *hdr;
19089 char *names;
19090 asection *plt;
19091 bfd_vma offset;
19092 bfd_byte *data;
19093
19094 *ret = NULL;
19095
19096 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
19097 return 0;
19098
19099 if (dynsymcount <= 0)
19100 return 0;
19101
19102 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
19103 if (relplt == NULL)
19104 return 0;
19105
19106 hdr = &elf_section_data (relplt)->this_hdr;
19107 if (hdr->sh_link != elf_dynsymtab (abfd)
19108 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
19109 return 0;
19110
19111 plt = bfd_get_section_by_name (abfd, ".plt");
19112 if (plt == NULL)
19113 return 0;
19114
19115 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
19116 return -1;
19117
19118 data = plt->contents;
19119 if (data == NULL)
19120 {
19121 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
19122 return -1;
19123 bfd_cache_section_contents((asection *) plt, data);
19124 }
19125
19126 count = relplt->size / hdr->sh_entsize;
19127 size = count * sizeof (asymbol);
19128 p = relplt->relocation;
19129 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19130 {
19131 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
19132 if (p->addend != 0)
19133 size += sizeof ("+0x") - 1 + 8;
19134 }
19135
19136 s = *ret = (asymbol *) bfd_malloc (size);
19137 if (s == NULL)
19138 return -1;
19139
19140 offset = elf32_arm_plt0_size (abfd, data);
19141 if (offset == (bfd_vma) -1)
19142 return -1;
19143
19144 names = (char *) (s + count);
19145 p = relplt->relocation;
19146 n = 0;
19147 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
19148 {
19149 size_t len;
19150
19151 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
19152 if (plt_size == (bfd_vma) -1)
19153 break;
19154
19155 *s = **p->sym_ptr_ptr;
19156 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
19157 we are defining a symbol, ensure one of them is set. */
19158 if ((s->flags & BSF_LOCAL) == 0)
19159 s->flags |= BSF_GLOBAL;
19160 s->flags |= BSF_SYNTHETIC;
19161 s->section = plt;
19162 s->value = offset;
19163 s->name = names;
19164 s->udata.p = NULL;
19165 len = strlen ((*p->sym_ptr_ptr)->name);
19166 memcpy (names, (*p->sym_ptr_ptr)->name, len);
19167 names += len;
19168 if (p->addend != 0)
19169 {
19170 char buf[30], *a;
19171
19172 memcpy (names, "+0x", sizeof ("+0x") - 1);
19173 names += sizeof ("+0x") - 1;
19174 bfd_sprintf_vma (abfd, buf, p->addend);
19175 for (a = buf; *a == '0'; ++a)
19176 ;
19177 len = strlen (a);
19178 memcpy (names, a, len);
19179 names += len;
19180 }
19181 memcpy (names, "@plt", sizeof ("@plt"));
19182 names += sizeof ("@plt");
19183 ++s, ++n;
19184 offset += plt_size;
19185 }
19186
19187 return n;
19188 }
19189
19190 static bfd_boolean
19191 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr * hdr)
19192 {
19193 if (hdr->sh_flags & SHF_ARM_PURECODE)
19194 *flags |= SEC_ELF_PURECODE;
19195 return TRUE;
19196 }
19197
19198 static flagword
19199 elf32_arm_lookup_section_flags (char *flag_name)
19200 {
19201 if (!strcmp (flag_name, "SHF_ARM_PURECODE"))
19202 return SHF_ARM_PURECODE;
19203
19204 return SEC_NO_FLAGS;
19205 }
19206
19207 static unsigned int
19208 elf32_arm_count_additional_relocs (asection *sec)
19209 {
19210 struct _arm_elf_section_data *arm_data;
19211 arm_data = get_arm_elf_section_data (sec);
19212
19213 return arm_data == NULL ? 0 : arm_data->additional_reloc_count;
19214 }
19215
19216 /* Called to set the sh_flags, sh_link and sh_info fields of OSECTION which
19217 has a type >= SHT_LOOS. Returns TRUE if these fields were initialised
19218 FALSE otherwise. ISECTION is the best guess matching section from the
19219 input bfd IBFD, but it might be NULL. */
19220
19221 static bfd_boolean
19222 elf32_arm_copy_special_section_fields (const bfd *ibfd ATTRIBUTE_UNUSED,
19223 bfd *obfd ATTRIBUTE_UNUSED,
19224 const Elf_Internal_Shdr *isection ATTRIBUTE_UNUSED,
19225 Elf_Internal_Shdr *osection)
19226 {
19227 switch (osection->sh_type)
19228 {
19229 case SHT_ARM_EXIDX:
19230 {
19231 Elf_Internal_Shdr **oheaders = elf_elfsections (obfd);
19232 Elf_Internal_Shdr **iheaders = elf_elfsections (ibfd);
19233 unsigned i = 0;
19234
19235 osection->sh_flags = SHF_ALLOC | SHF_LINK_ORDER;
19236 osection->sh_info = 0;
19237
19238 /* The sh_link field must be set to the text section associated with
19239 this index section. Unfortunately the ARM EHABI does not specify
19240 exactly how to determine this association. Our caller does try
19241 to match up OSECTION with its corresponding input section however
19242 so that is a good first guess. */
19243 if (isection != NULL
19244 && osection->bfd_section != NULL
19245 && isection->bfd_section != NULL
19246 && isection->bfd_section->output_section != NULL
19247 && isection->bfd_section->output_section == osection->bfd_section
19248 && iheaders != NULL
19249 && isection->sh_link > 0
19250 && isection->sh_link < elf_numsections (ibfd)
19251 && iheaders[isection->sh_link]->bfd_section != NULL
19252 && iheaders[isection->sh_link]->bfd_section->output_section != NULL
19253 )
19254 {
19255 for (i = elf_numsections (obfd); i-- > 0;)
19256 if (oheaders[i]->bfd_section
19257 == iheaders[isection->sh_link]->bfd_section->output_section)
19258 break;
19259 }
19260
19261 if (i == 0)
19262 {
19263 /* Failing that we have to find a matching section ourselves. If
19264 we had the output section name available we could compare that
19265 with input section names. Unfortunately we don't. So instead
19266 we use a simple heuristic and look for the nearest executable
19267 section before this one. */
19268 for (i = elf_numsections (obfd); i-- > 0;)
19269 if (oheaders[i] == osection)
19270 break;
19271 if (i == 0)
19272 break;
19273
19274 while (i-- > 0)
19275 if (oheaders[i]->sh_type == SHT_PROGBITS
19276 && (oheaders[i]->sh_flags & (SHF_ALLOC | SHF_EXECINSTR))
19277 == (SHF_ALLOC | SHF_EXECINSTR))
19278 break;
19279 }
19280
19281 if (i)
19282 {
19283 osection->sh_link = i;
19284 /* If the text section was part of a group
19285 then the index section should be too. */
19286 if (oheaders[i]->sh_flags & SHF_GROUP)
19287 osection->sh_flags |= SHF_GROUP;
19288 return TRUE;
19289 }
19290 }
19291 break;
19292
19293 case SHT_ARM_PREEMPTMAP:
19294 osection->sh_flags = SHF_ALLOC;
19295 break;
19296
19297 case SHT_ARM_ATTRIBUTES:
19298 case SHT_ARM_DEBUGOVERLAY:
19299 case SHT_ARM_OVERLAYSECTION:
19300 default:
19301 break;
19302 }
19303
19304 return FALSE;
19305 }
19306
19307 /* Returns TRUE if NAME is an ARM mapping symbol.
19308 Traditionally the symbols $a, $d and $t have been used.
19309 The ARM ELF standard also defines $x (for A64 code). It also allows a
19310 period initiated suffix to be added to the symbol: "$[adtx]\.[:sym_char]+".
19311 Other tools might also produce $b (Thumb BL), $f, $p, $m and $v, but we do
19312 not support them here. $t.x indicates the start of ThumbEE instructions. */
19313
19314 static bfd_boolean
19315 is_arm_mapping_symbol (const char * name)
19316 {
19317 return name != NULL /* Paranoia. */
19318 && name[0] == '$' /* Note: if objcopy --prefix-symbols has been used then
19319 the mapping symbols could have acquired a prefix.
19320 We do not support this here, since such symbols no
19321 longer conform to the ARM ELF ABI. */
19322 && (name[1] == 'a' || name[1] == 'd' || name[1] == 't' || name[1] == 'x')
19323 && (name[2] == 0 || name[2] == '.');
19324 /* FIXME: Strictly speaking the symbol is only a valid mapping symbol if
19325 any characters that follow the period are legal characters for the body
19326 of a symbol's name. For now we just assume that this is the case. */
19327 }
19328
19329 /* Make sure that mapping symbols in object files are not removed via the
19330 "strip --strip-unneeded" tool. These symbols are needed in order to
19331 correctly generate interworking veneers, and for byte swapping code
19332 regions. Once an object file has been linked, it is safe to remove the
19333 symbols as they will no longer be needed. */
19334
19335 static void
19336 elf32_arm_backend_symbol_processing (bfd *abfd, asymbol *sym)
19337 {
19338 if (((abfd->flags & (EXEC_P | DYNAMIC)) == 0)
19339 && sym->section != bfd_abs_section_ptr
19340 && is_arm_mapping_symbol (sym->name))
19341 sym->flags |= BSF_KEEP;
19342 }
19343
19344 #undef elf_backend_copy_special_section_fields
19345 #define elf_backend_copy_special_section_fields elf32_arm_copy_special_section_fields
19346
19347 #define ELF_ARCH bfd_arch_arm
19348 #define ELF_TARGET_ID ARM_ELF_DATA
19349 #define ELF_MACHINE_CODE EM_ARM
19350 #ifdef __QNXTARGET__
19351 #define ELF_MAXPAGESIZE 0x1000
19352 #else
19353 #define ELF_MAXPAGESIZE 0x10000
19354 #endif
19355 #define ELF_MINPAGESIZE 0x1000
19356 #define ELF_COMMONPAGESIZE 0x1000
19357
19358 #define bfd_elf32_mkobject elf32_arm_mkobject
19359
19360 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
19361 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
19362 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
19363 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
19364 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
19365 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
19366 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
19367 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
19368 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
19369 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
19370 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
19371 #define bfd_elf32_bfd_final_link elf32_arm_final_link
19372 #define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
19373
19374 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
19375 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
19376 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
19377 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
19378 #define elf_backend_check_relocs elf32_arm_check_relocs
19379 #define elf_backend_update_relocs elf32_arm_update_relocs
19380 #define elf_backend_relocate_section elf32_arm_relocate_section
19381 #define elf_backend_write_section elf32_arm_write_section
19382 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
19383 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
19384 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
19385 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
19386 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
19387 #define elf_backend_always_size_sections elf32_arm_always_size_sections
19388 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
19389 #define elf_backend_post_process_headers elf32_arm_post_process_headers
19390 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
19391 #define elf_backend_object_p elf32_arm_object_p
19392 #define elf_backend_fake_sections elf32_arm_fake_sections
19393 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
19394 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19395 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
19396 #define elf_backend_size_info elf32_arm_size_info
19397 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19398 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
19399 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
19400 #define elf_backend_filter_implib_symbols elf32_arm_filter_implib_symbols
19401 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
19402 #define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
19403 #define elf_backend_count_additional_relocs elf32_arm_count_additional_relocs
19404 #define elf_backend_symbol_processing elf32_arm_backend_symbol_processing
19405
19406 #define elf_backend_can_refcount 1
19407 #define elf_backend_can_gc_sections 1
19408 #define elf_backend_plt_readonly 1
19409 #define elf_backend_want_got_plt 1
19410 #define elf_backend_want_plt_sym 0
19411 #define elf_backend_may_use_rel_p 1
19412 #define elf_backend_may_use_rela_p 0
19413 #define elf_backend_default_use_rela_p 0
19414
19415 #define elf_backend_got_header_size 12
19416 #define elf_backend_extern_protected_data 1
19417
19418 #undef elf_backend_obj_attrs_vendor
19419 #define elf_backend_obj_attrs_vendor "aeabi"
19420 #undef elf_backend_obj_attrs_section
19421 #define elf_backend_obj_attrs_section ".ARM.attributes"
19422 #undef elf_backend_obj_attrs_arg_type
19423 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
19424 #undef elf_backend_obj_attrs_section_type
19425 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
19426 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
19427 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
19428
19429 #undef elf_backend_section_flags
19430 #define elf_backend_section_flags elf32_arm_section_flags
19431 #undef elf_backend_lookup_section_flags_hook
19432 #define elf_backend_lookup_section_flags_hook elf32_arm_lookup_section_flags
19433
19434 #include "elf32-target.h"
19435
19436 /* Native Client targets. */
19437
19438 #undef TARGET_LITTLE_SYM
19439 #define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
19440 #undef TARGET_LITTLE_NAME
19441 #define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
19442 #undef TARGET_BIG_SYM
19443 #define TARGET_BIG_SYM arm_elf32_nacl_be_vec
19444 #undef TARGET_BIG_NAME
19445 #define TARGET_BIG_NAME "elf32-bigarm-nacl"
19446
19447 /* Like elf32_arm_link_hash_table_create -- but overrides
19448 appropriately for NaCl. */
19449
19450 static struct bfd_link_hash_table *
19451 elf32_arm_nacl_link_hash_table_create (bfd *abfd)
19452 {
19453 struct bfd_link_hash_table *ret;
19454
19455 ret = elf32_arm_link_hash_table_create (abfd);
19456 if (ret)
19457 {
19458 struct elf32_arm_link_hash_table *htab
19459 = (struct elf32_arm_link_hash_table *) ret;
19460
19461 htab->nacl_p = 1;
19462
19463 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
19464 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
19465 }
19466 return ret;
19467 }
19468
19469 /* Since NaCl doesn't use the ARM-specific unwind format, we don't
19470 really need to use elf32_arm_modify_segment_map. But we do it
19471 anyway just to reduce gratuitous differences with the stock ARM backend. */
19472
19473 static bfd_boolean
19474 elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
19475 {
19476 return (elf32_arm_modify_segment_map (abfd, info)
19477 && nacl_modify_segment_map (abfd, info));
19478 }
19479
19480 static void
19481 elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
19482 {
19483 elf32_arm_final_write_processing (abfd, linker);
19484 nacl_final_write_processing (abfd, linker);
19485 }
19486
19487 static bfd_vma
19488 elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
19489 const arelent *rel ATTRIBUTE_UNUSED)
19490 {
19491 return plt->vma
19492 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
19493 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
19494 }
19495
19496 #undef elf32_bed
19497 #define elf32_bed elf32_arm_nacl_bed
19498 #undef bfd_elf32_bfd_link_hash_table_create
19499 #define bfd_elf32_bfd_link_hash_table_create \
19500 elf32_arm_nacl_link_hash_table_create
19501 #undef elf_backend_plt_alignment
19502 #define elf_backend_plt_alignment 4
19503 #undef elf_backend_modify_segment_map
19504 #define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
19505 #undef elf_backend_modify_program_headers
19506 #define elf_backend_modify_program_headers nacl_modify_program_headers
19507 #undef elf_backend_final_write_processing
19508 #define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
19509 #undef bfd_elf32_get_synthetic_symtab
19510 #undef elf_backend_plt_sym_val
19511 #define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
19512 #undef elf_backend_copy_special_section_fields
19513
19514 #undef ELF_MINPAGESIZE
19515 #undef ELF_COMMONPAGESIZE
19516
19517
19518 #include "elf32-target.h"
19519
19520 /* Reset to defaults. */
19521 #undef elf_backend_plt_alignment
19522 #undef elf_backend_modify_segment_map
19523 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
19524 #undef elf_backend_modify_program_headers
19525 #undef elf_backend_final_write_processing
19526 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19527 #undef ELF_MINPAGESIZE
19528 #define ELF_MINPAGESIZE 0x1000
19529 #undef ELF_COMMONPAGESIZE
19530 #define ELF_COMMONPAGESIZE 0x1000
19531
19532
19533 /* VxWorks Targets. */
19534
19535 #undef TARGET_LITTLE_SYM
19536 #define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
19537 #undef TARGET_LITTLE_NAME
19538 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
19539 #undef TARGET_BIG_SYM
19540 #define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
19541 #undef TARGET_BIG_NAME
19542 #define TARGET_BIG_NAME "elf32-bigarm-vxworks"
19543
19544 /* Like elf32_arm_link_hash_table_create -- but overrides
19545 appropriately for VxWorks. */
19546
19547 static struct bfd_link_hash_table *
19548 elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
19549 {
19550 struct bfd_link_hash_table *ret;
19551
19552 ret = elf32_arm_link_hash_table_create (abfd);
19553 if (ret)
19554 {
19555 struct elf32_arm_link_hash_table *htab
19556 = (struct elf32_arm_link_hash_table *) ret;
19557 htab->use_rel = 0;
19558 htab->vxworks_p = 1;
19559 }
19560 return ret;
19561 }
19562
19563 static void
19564 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
19565 {
19566 elf32_arm_final_write_processing (abfd, linker);
19567 elf_vxworks_final_write_processing (abfd, linker);
19568 }
19569
19570 #undef elf32_bed
19571 #define elf32_bed elf32_arm_vxworks_bed
19572
19573 #undef bfd_elf32_bfd_link_hash_table_create
19574 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
19575 #undef elf_backend_final_write_processing
19576 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
19577 #undef elf_backend_emit_relocs
19578 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
19579
19580 #undef elf_backend_may_use_rel_p
19581 #define elf_backend_may_use_rel_p 0
19582 #undef elf_backend_may_use_rela_p
19583 #define elf_backend_may_use_rela_p 1
19584 #undef elf_backend_default_use_rela_p
19585 #define elf_backend_default_use_rela_p 1
19586 #undef elf_backend_want_plt_sym
19587 #define elf_backend_want_plt_sym 1
19588 #undef ELF_MAXPAGESIZE
19589 #define ELF_MAXPAGESIZE 0x1000
19590
19591 #include "elf32-target.h"
19592
19593
19594 /* Merge backend specific data from an object file to the output
19595 object file when linking. */
19596
19597 static bfd_boolean
19598 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
19599 {
19600 flagword out_flags;
19601 flagword in_flags;
19602 bfd_boolean flags_compatible = TRUE;
19603 asection *sec;
19604
19605 /* Check if we have the same endianness. */
19606 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
19607 return FALSE;
19608
19609 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
19610 return TRUE;
19611
19612 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
19613 return FALSE;
19614
19615 /* The input BFD must have had its flags initialised. */
19616 /* The following seems bogus to me -- The flags are initialized in
19617 the assembler but I don't think an elf_flags_init field is
19618 written into the object. */
19619 /* BFD_ASSERT (elf_flags_init (ibfd)); */
19620
19621 in_flags = elf_elfheader (ibfd)->e_flags;
19622 out_flags = elf_elfheader (obfd)->e_flags;
19623
19624 /* In theory there is no reason why we couldn't handle this. However
19625 in practice it isn't even close to working and there is no real
19626 reason to want it. */
19627 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
19628 && !(ibfd->flags & DYNAMIC)
19629 && (in_flags & EF_ARM_BE8))
19630 {
19631 _bfd_error_handler (_("error: %B is already in final BE8 format"),
19632 ibfd);
19633 return FALSE;
19634 }
19635
19636 if (!elf_flags_init (obfd))
19637 {
19638 /* If the input is the default architecture and had the default
19639 flags then do not bother setting the flags for the output
19640 architecture, instead allow future merges to do this. If no
19641 future merges ever set these flags then they will retain their
19642 uninitialised values, which surprise surprise, correspond
19643 to the default values. */
19644 if (bfd_get_arch_info (ibfd)->the_default
19645 && elf_elfheader (ibfd)->e_flags == 0)
19646 return TRUE;
19647
19648 elf_flags_init (obfd) = TRUE;
19649 elf_elfheader (obfd)->e_flags = in_flags;
19650
19651 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
19652 && bfd_get_arch_info (obfd)->the_default)
19653 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
19654
19655 return TRUE;
19656 }
19657
19658 /* Determine what should happen if the input ARM architecture
19659 does not match the output ARM architecture. */
19660 if (! bfd_arm_merge_machines (ibfd, obfd))
19661 return FALSE;
19662
19663 /* Identical flags must be compatible. */
19664 if (in_flags == out_flags)
19665 return TRUE;
19666
19667 /* Check to see if the input BFD actually contains any sections. If
19668 not, its flags may not have been initialised either, but it
19669 cannot actually cause any incompatiblity. Do not short-circuit
19670 dynamic objects; their section list may be emptied by
19671 elf_link_add_object_symbols.
19672
19673 Also check to see if there are no code sections in the input.
19674 In this case there is no need to check for code specific flags.
19675 XXX - do we need to worry about floating-point format compatability
19676 in data sections ? */
19677 if (!(ibfd->flags & DYNAMIC))
19678 {
19679 bfd_boolean null_input_bfd = TRUE;
19680 bfd_boolean only_data_sections = TRUE;
19681
19682 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
19683 {
19684 /* Ignore synthetic glue sections. */
19685 if (strcmp (sec->name, ".glue_7")
19686 && strcmp (sec->name, ".glue_7t"))
19687 {
19688 if ((bfd_get_section_flags (ibfd, sec)
19689 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19690 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
19691 only_data_sections = FALSE;
19692
19693 null_input_bfd = FALSE;
19694 break;
19695 }
19696 }
19697
19698 if (null_input_bfd || only_data_sections)
19699 return TRUE;
19700 }
19701
19702 /* Complain about various flag mismatches. */
19703 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
19704 EF_ARM_EABI_VERSION (out_flags)))
19705 {
19706 _bfd_error_handler
19707 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
19708 ibfd, obfd,
19709 (in_flags & EF_ARM_EABIMASK) >> 24,
19710 (out_flags & EF_ARM_EABIMASK) >> 24);
19711 return FALSE;
19712 }
19713
19714 /* Not sure what needs to be checked for EABI versions >= 1. */
19715 /* VxWorks libraries do not use these flags. */
19716 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
19717 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
19718 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
19719 {
19720 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
19721 {
19722 _bfd_error_handler
19723 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
19724 ibfd, obfd,
19725 in_flags & EF_ARM_APCS_26 ? 26 : 32,
19726 out_flags & EF_ARM_APCS_26 ? 26 : 32);
19727 flags_compatible = FALSE;
19728 }
19729
19730 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
19731 {
19732 if (in_flags & EF_ARM_APCS_FLOAT)
19733 _bfd_error_handler
19734 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
19735 ibfd, obfd);
19736 else
19737 _bfd_error_handler
19738 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
19739 ibfd, obfd);
19740
19741 flags_compatible = FALSE;
19742 }
19743
19744 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
19745 {
19746 if (in_flags & EF_ARM_VFP_FLOAT)
19747 _bfd_error_handler
19748 (_("error: %B uses VFP instructions, whereas %B does not"),
19749 ibfd, obfd);
19750 else
19751 _bfd_error_handler
19752 (_("error: %B uses FPA instructions, whereas %B does not"),
19753 ibfd, obfd);
19754
19755 flags_compatible = FALSE;
19756 }
19757
19758 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
19759 {
19760 if (in_flags & EF_ARM_MAVERICK_FLOAT)
19761 _bfd_error_handler
19762 (_("error: %B uses Maverick instructions, whereas %B does not"),
19763 ibfd, obfd);
19764 else
19765 _bfd_error_handler
19766 (_("error: %B does not use Maverick instructions, whereas %B does"),
19767 ibfd, obfd);
19768
19769 flags_compatible = FALSE;
19770 }
19771
19772 #ifdef EF_ARM_SOFT_FLOAT
19773 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
19774 {
19775 /* We can allow interworking between code that is VFP format
19776 layout, and uses either soft float or integer regs for
19777 passing floating point arguments and results. We already
19778 know that the APCS_FLOAT flags match; similarly for VFP
19779 flags. */
19780 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
19781 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
19782 {
19783 if (in_flags & EF_ARM_SOFT_FLOAT)
19784 _bfd_error_handler
19785 (_("error: %B uses software FP, whereas %B uses hardware FP"),
19786 ibfd, obfd);
19787 else
19788 _bfd_error_handler
19789 (_("error: %B uses hardware FP, whereas %B uses software FP"),
19790 ibfd, obfd);
19791
19792 flags_compatible = FALSE;
19793 }
19794 }
19795 #endif
19796
19797 /* Interworking mismatch is only a warning. */
19798 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
19799 {
19800 if (in_flags & EF_ARM_INTERWORK)
19801 {
19802 _bfd_error_handler
19803 (_("Warning: %B supports interworking, whereas %B does not"),
19804 ibfd, obfd);
19805 }
19806 else
19807 {
19808 _bfd_error_handler
19809 (_("Warning: %B does not support interworking, whereas %B does"),
19810 ibfd, obfd);
19811 }
19812 }
19813 }
19814
19815 return flags_compatible;
19816 }
19817
19818
19819 /* Symbian OS Targets. */
19820
19821 #undef TARGET_LITTLE_SYM
19822 #define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
19823 #undef TARGET_LITTLE_NAME
19824 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
19825 #undef TARGET_BIG_SYM
19826 #define TARGET_BIG_SYM arm_elf32_symbian_be_vec
19827 #undef TARGET_BIG_NAME
19828 #define TARGET_BIG_NAME "elf32-bigarm-symbian"
19829
19830 /* Like elf32_arm_link_hash_table_create -- but overrides
19831 appropriately for Symbian OS. */
19832
19833 static struct bfd_link_hash_table *
19834 elf32_arm_symbian_link_hash_table_create (bfd *abfd)
19835 {
19836 struct bfd_link_hash_table *ret;
19837
19838 ret = elf32_arm_link_hash_table_create (abfd);
19839 if (ret)
19840 {
19841 struct elf32_arm_link_hash_table *htab
19842 = (struct elf32_arm_link_hash_table *)ret;
19843 /* There is no PLT header for Symbian OS. */
19844 htab->plt_header_size = 0;
19845 /* The PLT entries are each one instruction and one word. */
19846 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
19847 htab->symbian_p = 1;
19848 /* Symbian uses armv5t or above, so use_blx is always true. */
19849 htab->use_blx = 1;
19850 htab->root.is_relocatable_executable = 1;
19851 }
19852 return ret;
19853 }
19854
19855 static const struct bfd_elf_special_section
19856 elf32_arm_symbian_special_sections[] =
19857 {
19858 /* In a BPABI executable, the dynamic linking sections do not go in
19859 the loadable read-only segment. The post-linker may wish to
19860 refer to these sections, but they are not part of the final
19861 program image. */
19862 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
19863 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
19864 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
19865 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
19866 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
19867 /* These sections do not need to be writable as the SymbianOS
19868 postlinker will arrange things so that no dynamic relocation is
19869 required. */
19870 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
19871 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
19872 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
19873 { NULL, 0, 0, 0, 0 }
19874 };
19875
19876 static void
19877 elf32_arm_symbian_begin_write_processing (bfd *abfd,
19878 struct bfd_link_info *link_info)
19879 {
19880 /* BPABI objects are never loaded directly by an OS kernel; they are
19881 processed by a postlinker first, into an OS-specific format. If
19882 the D_PAGED bit is set on the file, BFD will align segments on
19883 page boundaries, so that an OS can directly map the file. With
19884 BPABI objects, that just results in wasted space. In addition,
19885 because we clear the D_PAGED bit, map_sections_to_segments will
19886 recognize that the program headers should not be mapped into any
19887 loadable segment. */
19888 abfd->flags &= ~D_PAGED;
19889 elf32_arm_begin_write_processing (abfd, link_info);
19890 }
19891
19892 static bfd_boolean
19893 elf32_arm_symbian_modify_segment_map (bfd *abfd,
19894 struct bfd_link_info *info)
19895 {
19896 struct elf_segment_map *m;
19897 asection *dynsec;
19898
19899 /* BPABI shared libraries and executables should have a PT_DYNAMIC
19900 segment. However, because the .dynamic section is not marked
19901 with SEC_LOAD, the generic ELF code will not create such a
19902 segment. */
19903 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
19904 if (dynsec)
19905 {
19906 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
19907 if (m->p_type == PT_DYNAMIC)
19908 break;
19909
19910 if (m == NULL)
19911 {
19912 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
19913 m->next = elf_seg_map (abfd);
19914 elf_seg_map (abfd) = m;
19915 }
19916 }
19917
19918 /* Also call the generic arm routine. */
19919 return elf32_arm_modify_segment_map (abfd, info);
19920 }
19921
19922 /* Return address for Ith PLT stub in section PLT, for relocation REL
19923 or (bfd_vma) -1 if it should not be included. */
19924
19925 static bfd_vma
19926 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
19927 const arelent *rel ATTRIBUTE_UNUSED)
19928 {
19929 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
19930 }
19931
19932 #undef elf32_bed
19933 #define elf32_bed elf32_arm_symbian_bed
19934
19935 /* The dynamic sections are not allocated on SymbianOS; the postlinker
19936 will process them and then discard them. */
19937 #undef ELF_DYNAMIC_SEC_FLAGS
19938 #define ELF_DYNAMIC_SEC_FLAGS \
19939 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
19940
19941 #undef elf_backend_emit_relocs
19942
19943 #undef bfd_elf32_bfd_link_hash_table_create
19944 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
19945 #undef elf_backend_special_sections
19946 #define elf_backend_special_sections elf32_arm_symbian_special_sections
19947 #undef elf_backend_begin_write_processing
19948 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
19949 #undef elf_backend_final_write_processing
19950 #define elf_backend_final_write_processing elf32_arm_final_write_processing
19951
19952 #undef elf_backend_modify_segment_map
19953 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
19954
19955 /* There is no .got section for BPABI objects, and hence no header. */
19956 #undef elf_backend_got_header_size
19957 #define elf_backend_got_header_size 0
19958
19959 /* Similarly, there is no .got.plt section. */
19960 #undef elf_backend_want_got_plt
19961 #define elf_backend_want_got_plt 0
19962
19963 #undef elf_backend_plt_sym_val
19964 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
19965
19966 #undef elf_backend_may_use_rel_p
19967 #define elf_backend_may_use_rel_p 1
19968 #undef elf_backend_may_use_rela_p
19969 #define elf_backend_may_use_rela_p 0
19970 #undef elf_backend_default_use_rela_p
19971 #define elf_backend_default_use_rela_p 0
19972 #undef elf_backend_want_plt_sym
19973 #define elf_backend_want_plt_sym 0
19974 #undef ELF_MAXPAGESIZE
19975 #define ELF_MAXPAGESIZE 0x8000
19976
19977 #include "elf32-target.h"
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