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[thirdparty/binutils-gdb.git] / bfd / elf32-rl78.c
1 /* Renesas RL78 specific support for 32-bit ELF.
2 Copyright (C) 2011, 2012
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "bfd_stdint.h"
24 #include "libbfd.h"
25 #include "elf-bfd.h"
26 #include "elf/rl78.h"
27 #include "libiberty.h"
28
29 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
30
31 #define RL78REL(n,sz,bit,shift,complain,pcrel) \
32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
34
35 /* Note that the relocations around 0x7f are internal to this file;
36 feel free to move them as needed to avoid conflicts with published
37 relocation numbers. */
38
39 static reloc_howto_type rl78_elf_howto_table [] =
40 {
41 RL78REL (NONE, 0, 0, 0, dont, FALSE),
42 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
43 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
44 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
45 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
46 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
47 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
48 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
49 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
50 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
51 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
52 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
53 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
54 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
55 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
56 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
57 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
59 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
60
61 EMPTY_HOWTO (0x13),
62 EMPTY_HOWTO (0x14),
63 EMPTY_HOWTO (0x15),
64 EMPTY_HOWTO (0x16),
65 EMPTY_HOWTO (0x17),
66 EMPTY_HOWTO (0x18),
67 EMPTY_HOWTO (0x19),
68 EMPTY_HOWTO (0x1a),
69 EMPTY_HOWTO (0x1b),
70 EMPTY_HOWTO (0x1c),
71 EMPTY_HOWTO (0x1d),
72 EMPTY_HOWTO (0x1e),
73 EMPTY_HOWTO (0x1f),
74
75 EMPTY_HOWTO (0x20),
76 EMPTY_HOWTO (0x21),
77 EMPTY_HOWTO (0x22),
78 EMPTY_HOWTO (0x23),
79 EMPTY_HOWTO (0x24),
80 EMPTY_HOWTO (0x25),
81 EMPTY_HOWTO (0x26),
82 EMPTY_HOWTO (0x27),
83 EMPTY_HOWTO (0x28),
84 EMPTY_HOWTO (0x29),
85 EMPTY_HOWTO (0x2a),
86 EMPTY_HOWTO (0x2b),
87 EMPTY_HOWTO (0x2c),
88 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
89
90 EMPTY_HOWTO (0x2e),
91 EMPTY_HOWTO (0x2f),
92 EMPTY_HOWTO (0x30),
93 EMPTY_HOWTO (0x31),
94 EMPTY_HOWTO (0x32),
95 EMPTY_HOWTO (0x33),
96 EMPTY_HOWTO (0x34),
97 EMPTY_HOWTO (0x35),
98 EMPTY_HOWTO (0x36),
99 EMPTY_HOWTO (0x37),
100 EMPTY_HOWTO (0x38),
101 EMPTY_HOWTO (0x39),
102 EMPTY_HOWTO (0x3a),
103 EMPTY_HOWTO (0x3b),
104 EMPTY_HOWTO (0x3c),
105 EMPTY_HOWTO (0x3d),
106 EMPTY_HOWTO (0x3e),
107 EMPTY_HOWTO (0x3f),
108 EMPTY_HOWTO (0x40),
109
110 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
111 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
112 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
113 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
114 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
115 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
116 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
117 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
118 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
119 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
120 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
121 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
123 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
125 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
126 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
127
128 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
129
130 EMPTY_HOWTO (0x52),
131 EMPTY_HOWTO (0x53),
132 EMPTY_HOWTO (0x54),
133 EMPTY_HOWTO (0x55),
134 EMPTY_HOWTO (0x56),
135 EMPTY_HOWTO (0x57),
136 EMPTY_HOWTO (0x58),
137 EMPTY_HOWTO (0x59),
138 EMPTY_HOWTO (0x5a),
139 EMPTY_HOWTO (0x5b),
140 EMPTY_HOWTO (0x5c),
141 EMPTY_HOWTO (0x5d),
142 EMPTY_HOWTO (0x5e),
143 EMPTY_HOWTO (0x5f),
144 EMPTY_HOWTO (0x60),
145 EMPTY_HOWTO (0x61),
146 EMPTY_HOWTO (0x62),
147 EMPTY_HOWTO (0x63),
148 EMPTY_HOWTO (0x64),
149 EMPTY_HOWTO (0x65),
150 EMPTY_HOWTO (0x66),
151 EMPTY_HOWTO (0x67),
152 EMPTY_HOWTO (0x68),
153 EMPTY_HOWTO (0x69),
154 EMPTY_HOWTO (0x6a),
155 EMPTY_HOWTO (0x6b),
156 EMPTY_HOWTO (0x6c),
157 EMPTY_HOWTO (0x6d),
158 EMPTY_HOWTO (0x6e),
159 EMPTY_HOWTO (0x6f),
160 EMPTY_HOWTO (0x70),
161 EMPTY_HOWTO (0x71),
162 EMPTY_HOWTO (0x72),
163 EMPTY_HOWTO (0x73),
164 EMPTY_HOWTO (0x74),
165 EMPTY_HOWTO (0x75),
166 EMPTY_HOWTO (0x76),
167 EMPTY_HOWTO (0x77),
168
169 EMPTY_HOWTO (0x78),
170 EMPTY_HOWTO (0x79),
171 EMPTY_HOWTO (0x7a),
172 EMPTY_HOWTO (0x7b),
173 EMPTY_HOWTO (0x7c),
174 EMPTY_HOWTO (0x7d),
175 EMPTY_HOWTO (0x7e),
176 EMPTY_HOWTO (0x7f),
177
178 RL78REL (SYM, 2, 32, 0, dont, FALSE),
179 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
180 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
181 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
182 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
183 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
185 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
186 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
187 EMPTY_HOWTO (0x89),
188 EMPTY_HOWTO (0x8a),
189 EMPTY_HOWTO (0x8b),
190 EMPTY_HOWTO (0x8c),
191 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
192 EMPTY_HOWTO (0x8e),
193 EMPTY_HOWTO (0x8f),
194 RL78REL (OPand, 2, 32, 0, dont, FALSE),
195 RL78REL (OPor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
197 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
198 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
199 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
200 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
201 };
202 \f
203 /* Map BFD reloc types to RL78 ELF reloc types. */
204
205 struct rl78_reloc_map
206 {
207 bfd_reloc_code_real_type bfd_reloc_val;
208 unsigned int rl78_reloc_val;
209 };
210
211 static const struct rl78_reloc_map rl78_reloc_map [] =
212 {
213 { BFD_RELOC_NONE, R_RL78_NONE },
214 { BFD_RELOC_8, R_RL78_DIR8S },
215 { BFD_RELOC_16, R_RL78_DIR16S },
216 { BFD_RELOC_24, R_RL78_DIR24S },
217 { BFD_RELOC_32, R_RL78_DIR32 },
218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
225 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
239 };
240
241 static reloc_howto_type *
242 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
243 bfd_reloc_code_real_type code)
244 {
245 unsigned int i;
246
247 if (code == BFD_RELOC_RL78_32_OP)
248 return rl78_elf_howto_table + R_RL78_DIR32;
249
250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
251 if (rl78_reloc_map [i].bfd_reloc_val == code)
252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
253
254 return NULL;
255 }
256
257 static reloc_howto_type *
258 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
259 {
260 unsigned int i;
261
262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
263 if (rl78_elf_howto_table[i].name != NULL
264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
265 return rl78_elf_howto_table + i;
266
267 return NULL;
268 }
269
270 /* Set the howto pointer for an RL78 ELF reloc. */
271
272 static void
273 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
274 arelent * cache_ptr,
275 Elf_Internal_Rela * dst)
276 {
277 unsigned int r_type;
278
279 r_type = ELF32_R_TYPE (dst->r_info);
280 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
281 cache_ptr->howto = rl78_elf_howto_table + r_type;
282 }
283 \f
284 static bfd_vma
285 get_symbol_value (const char * name,
286 bfd_reloc_status_type * status,
287 struct bfd_link_info * info,
288 bfd * input_bfd,
289 asection * input_section,
290 int offset)
291 {
292 bfd_vma value = 0;
293 struct bfd_link_hash_entry * h;
294
295 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
296
297 if (h == NULL
298 || (h->type != bfd_link_hash_defined
299 && h->type != bfd_link_hash_defweak))
300 * status = info->callbacks->undefined_symbol
301 (info, name, input_bfd, input_section, offset, TRUE);
302 else
303 value = (h->u.def.value
304 + h->u.def.section->output_section->vma
305 + h->u.def.section->output_offset);
306
307 return value;
308 }
309
310 static bfd_vma
311 get_romstart (bfd_reloc_status_type * status,
312 struct bfd_link_info * info,
313 bfd * abfd,
314 asection * sec,
315 int offset)
316 {
317 static bfd_boolean cached = FALSE;
318 static bfd_vma cached_value = 0;
319
320 if (!cached)
321 {
322 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
323 cached = TRUE;
324 }
325 return cached_value;
326 }
327
328 static bfd_vma
329 get_ramstart (bfd_reloc_status_type * status,
330 struct bfd_link_info * info,
331 bfd * abfd,
332 asection * sec,
333 int offset)
334 {
335 static bfd_boolean cached = FALSE;
336 static bfd_vma cached_value = 0;
337
338 if (!cached)
339 {
340 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
341 cached = TRUE;
342 }
343 return cached_value;
344 }
345
346 #define NUM_STACK_ENTRIES 16
347 static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
348 static unsigned int rl78_stack_top;
349
350 #define RL78_STACK_PUSH(val) \
351 do \
352 { \
353 if (rl78_stack_top < NUM_STACK_ENTRIES) \
354 rl78_stack [rl78_stack_top ++] = (val); \
355 else \
356 r = bfd_reloc_dangerous; \
357 } \
358 while (0)
359
360 #define RL78_STACK_POP(dest) \
361 do \
362 { \
363 if (rl78_stack_top > 0) \
364 (dest) = rl78_stack [-- rl78_stack_top]; \
365 else \
366 (dest) = 0, r = bfd_reloc_dangerous; \
367 } \
368 while (0)
369
370 /* Relocate an RL78 ELF section.
371 There is some attempt to make this function usable for many architectures,
372 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
373 if only to serve as a learning tool.
374
375 The RELOCATE_SECTION function is called by the new ELF backend linker
376 to handle the relocations for a section.
377
378 The relocs are always passed as Rela structures; if the section
379 actually uses Rel structures, the r_addend field will always be
380 zero.
381
382 This function is responsible for adjusting the section contents as
383 necessary, and (if using Rela relocs and generating a relocatable
384 output file) adjusting the reloc addend as necessary.
385
386 This function does not have to worry about setting the reloc
387 address or the reloc symbol index.
388
389 LOCAL_SYMS is a pointer to the swapped in local symbols.
390
391 LOCAL_SECTIONS is an array giving the section in the input file
392 corresponding to the st_shndx field of each local symbol.
393
394 The global hash table entry for the global symbols can be found
395 via elf_sym_hashes (input_bfd).
396
397 When generating relocatable output, this function must handle
398 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
399 going to be the section symbol corresponding to the output
400 section, which means that the addend must be adjusted
401 accordingly. */
402
403 static bfd_boolean
404 rl78_elf_relocate_section
405 (bfd * output_bfd,
406 struct bfd_link_info * info,
407 bfd * input_bfd,
408 asection * input_section,
409 bfd_byte * contents,
410 Elf_Internal_Rela * relocs,
411 Elf_Internal_Sym * local_syms,
412 asection ** local_sections)
413 {
414 Elf_Internal_Shdr * symtab_hdr;
415 struct elf_link_hash_entry ** sym_hashes;
416 Elf_Internal_Rela * rel;
417 Elf_Internal_Rela * relend;
418 bfd *dynobj;
419 asection *splt;
420
421 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
422 sym_hashes = elf_sym_hashes (input_bfd);
423 relend = relocs + input_section->reloc_count;
424
425 dynobj = elf_hash_table (info)->dynobj;
426 splt = NULL;
427 if (dynobj != NULL)
428 splt = bfd_get_section_by_name (dynobj, ".plt");
429
430 for (rel = relocs; rel < relend; rel ++)
431 {
432 reloc_howto_type * howto;
433 unsigned long r_symndx;
434 Elf_Internal_Sym * sym;
435 asection * sec;
436 struct elf_link_hash_entry * h;
437 bfd_vma relocation;
438 bfd_reloc_status_type r;
439 const char * name = NULL;
440 bfd_boolean unresolved_reloc = TRUE;
441 int r_type;
442
443 r_type = ELF32_R_TYPE (rel->r_info);
444 r_symndx = ELF32_R_SYM (rel->r_info);
445
446 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
447 h = NULL;
448 sym = NULL;
449 sec = NULL;
450 relocation = 0;
451
452 if (r_symndx < symtab_hdr->sh_info)
453 {
454 sym = local_syms + r_symndx;
455 sec = local_sections [r_symndx];
456 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
457
458 name = bfd_elf_string_from_elf_section
459 (input_bfd, symtab_hdr->sh_link, sym->st_name);
460 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
461 }
462 else
463 {
464 bfd_boolean warned;
465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
469 warned);
470
471 name = h->root.root.string;
472 }
473
474 if (sec != NULL && discarded_section (sec))
475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
476 rel, relend, howto, contents);
477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
500 if (! valid_16bit_address (relocation))
501 {
502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559 #define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
567 case R_RL78_RH_RELAX:
568 break;
569
570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
651 case R_RL78_RH_SFR:
652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
659 break;
660
661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
781 else
782 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
783 }
784 break;
785
786 case R_RL78_OPneg:
787 {
788 int32_t tmp;
789
790 RL78_STACK_POP (tmp);
791 tmp = - tmp;
792 RL78_STACK_PUSH (tmp);
793 }
794 break;
795
796 case R_RL78_OPadd:
797 {
798 int32_t tmp1, tmp2;
799
800 RL78_STACK_POP (tmp2);
801 RL78_STACK_POP (tmp1);
802 tmp1 += tmp2;
803 RL78_STACK_PUSH (tmp1);
804 }
805 break;
806
807 case R_RL78_OPsub:
808 {
809 int32_t tmp1, tmp2;
810
811 RL78_STACK_POP (tmp2);
812 RL78_STACK_POP (tmp1);
813 tmp2 -= tmp1;
814 RL78_STACK_PUSH (tmp2);
815 }
816 break;
817
818 case R_RL78_OPmul:
819 {
820 int32_t tmp1, tmp2;
821
822 RL78_STACK_POP (tmp2);
823 RL78_STACK_POP (tmp1);
824 tmp1 *= tmp2;
825 RL78_STACK_PUSH (tmp1);
826 }
827 break;
828
829 case R_RL78_OPdiv:
830 {
831 int32_t tmp1, tmp2;
832
833 RL78_STACK_POP (tmp2);
834 RL78_STACK_POP (tmp1);
835 tmp1 /= tmp2;
836 RL78_STACK_PUSH (tmp1);
837 }
838 break;
839
840 case R_RL78_OPshla:
841 {
842 int32_t tmp1, tmp2;
843
844 RL78_STACK_POP (tmp2);
845 RL78_STACK_POP (tmp1);
846 tmp1 <<= tmp2;
847 RL78_STACK_PUSH (tmp1);
848 }
849 break;
850
851 case R_RL78_OPshra:
852 {
853 int32_t tmp1, tmp2;
854
855 RL78_STACK_POP (tmp2);
856 RL78_STACK_POP (tmp1);
857 tmp1 >>= tmp2;
858 RL78_STACK_PUSH (tmp1);
859 }
860 break;
861
862 case R_RL78_OPsctsize:
863 RL78_STACK_PUSH (input_section->size);
864 break;
865
866 case R_RL78_OPscttop:
867 RL78_STACK_PUSH (input_section->output_section->vma);
868 break;
869
870 case R_RL78_OPand:
871 {
872 int32_t tmp1, tmp2;
873
874 RL78_STACK_POP (tmp2);
875 RL78_STACK_POP (tmp1);
876 tmp1 &= tmp2;
877 RL78_STACK_PUSH (tmp1);
878 }
879 break;
880
881 case R_RL78_OPor:
882 {
883 int32_t tmp1, tmp2;
884
885 RL78_STACK_POP (tmp2);
886 RL78_STACK_POP (tmp1);
887 tmp1 |= tmp2;
888 RL78_STACK_PUSH (tmp1);
889 }
890 break;
891
892 case R_RL78_OPxor:
893 {
894 int32_t tmp1, tmp2;
895
896 RL78_STACK_POP (tmp2);
897 RL78_STACK_POP (tmp1);
898 tmp1 ^= tmp2;
899 RL78_STACK_PUSH (tmp1);
900 }
901 break;
902
903 case R_RL78_OPnot:
904 {
905 int32_t tmp;
906
907 RL78_STACK_POP (tmp);
908 tmp = ~ tmp;
909 RL78_STACK_PUSH (tmp);
910 }
911 break;
912
913 case R_RL78_OPmod:
914 {
915 int32_t tmp1, tmp2;
916
917 RL78_STACK_POP (tmp2);
918 RL78_STACK_POP (tmp1);
919 tmp1 %= tmp2;
920 RL78_STACK_PUSH (tmp1);
921 }
922 break;
923
924 case R_RL78_OPromtop:
925 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
926 break;
927
928 case R_RL78_OPramtop:
929 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
930 break;
931
932 default:
933 r = bfd_reloc_notsupported;
934 break;
935 }
936
937 if (r != bfd_reloc_ok)
938 {
939 const char * msg = NULL;
940
941 switch (r)
942 {
943 case bfd_reloc_overflow:
944 /* Catch the case of a missing function declaration
945 and emit a more helpful error message. */
946 if (r_type == R_RL78_DIR24S_PCREL)
947 msg = _("%B(%A): error: call to undefined function '%s'");
948 else
949 r = info->callbacks->reloc_overflow
950 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
951 input_bfd, input_section, rel->r_offset);
952 break;
953
954 case bfd_reloc_undefined:
955 r = info->callbacks->undefined_symbol
956 (info, name, input_bfd, input_section, rel->r_offset,
957 TRUE);
958 break;
959
960 case bfd_reloc_other:
961 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
962 break;
963
964 case bfd_reloc_outofrange:
965 msg = _("%B(%A): internal error: out of range error");
966 break;
967
968 case bfd_reloc_notsupported:
969 msg = _("%B(%A): internal error: unsupported relocation error");
970 break;
971
972 case bfd_reloc_dangerous:
973 msg = _("%B(%A): internal error: dangerous relocation");
974 break;
975
976 default:
977 msg = _("%B(%A): internal error: unknown error");
978 break;
979 }
980
981 if (msg)
982 _bfd_error_handler (msg, input_bfd, input_section, name);
983
984 if (! r)
985 return FALSE;
986 }
987 }
988
989 return TRUE;
990 }
991 \f
992 /* Function to set the ELF flag bits. */
993
994 static bfd_boolean
995 rl78_elf_set_private_flags (bfd * abfd, flagword flags)
996 {
997 elf_elfheader (abfd)->e_flags = flags;
998 elf_flags_init (abfd) = TRUE;
999 return TRUE;
1000 }
1001
1002 static bfd_boolean no_warn_mismatch = FALSE;
1003
1004 void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1005
1006 void
1007 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1008 {
1009 no_warn_mismatch = user_no_warn_mismatch;
1010 }
1011
1012 /* Merge backend specific data from an object file to the output
1013 object file when linking. */
1014
1015 static bfd_boolean
1016 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1017 {
1018 flagword new_flags;
1019 bfd_boolean error = FALSE;
1020
1021 new_flags = elf_elfheader (ibfd)->e_flags;
1022
1023 if (!elf_flags_init (obfd))
1024 {
1025 /* First call, no flags set. */
1026 elf_flags_init (obfd) = TRUE;
1027 elf_elfheader (obfd)->e_flags = new_flags;
1028 }
1029
1030 return !error;
1031 }
1032 \f
1033 static bfd_boolean
1034 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1035 {
1036 FILE * file = (FILE *) ptr;
1037 flagword flags;
1038
1039 BFD_ASSERT (abfd != NULL && ptr != NULL);
1040
1041 /* Print normal ELF private data. */
1042 _bfd_elf_print_private_bfd_data (abfd, ptr);
1043
1044 flags = elf_elfheader (abfd)->e_flags;
1045 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1046
1047 fputc ('\n', file);
1048 return TRUE;
1049 }
1050
1051 /* Return the MACH for an e_flags value. */
1052
1053 static int
1054 elf32_rl78_machine (bfd * abfd)
1055 {
1056 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1057 return bfd_mach_rl78;
1058
1059 return 0;
1060 }
1061
1062 static bfd_boolean
1063 rl78_elf_object_p (bfd * abfd)
1064 {
1065 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1066 elf32_rl78_machine (abfd));
1067 return TRUE;
1068 }
1069 \f
1070 #ifdef DEBUG
1071 void
1072 rl78_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
1073 {
1074 size_t locsymcount;
1075 Elf_Internal_Sym * isymbuf;
1076 Elf_Internal_Sym * isymend;
1077 Elf_Internal_Sym * isym;
1078 Elf_Internal_Shdr * symtab_hdr;
1079 bfd_boolean free_internal = FALSE, free_external = FALSE;
1080 char * st_info_str;
1081 char * st_info_stb_str;
1082 char * st_other_str;
1083 char * st_shndx_str;
1084
1085 if (! internal_syms)
1086 {
1087 internal_syms = bfd_malloc (1000);
1088 free_internal = 1;
1089 }
1090 if (! external_syms)
1091 {
1092 external_syms = bfd_malloc (1000);
1093 free_external = 1;
1094 }
1095
1096 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1097 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
1098 if (free_internal)
1099 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1100 symtab_hdr->sh_info, 0,
1101 internal_syms, external_syms, NULL);
1102 else
1103 isymbuf = internal_syms;
1104 isymend = isymbuf + locsymcount;
1105
1106 for (isym = isymbuf ; isym < isymend ; isym++)
1107 {
1108 switch (ELF_ST_TYPE (isym->st_info))
1109 {
1110 case STT_FUNC: st_info_str = "STT_FUNC";
1111 case STT_SECTION: st_info_str = "STT_SECTION";
1112 case STT_FILE: st_info_str = "STT_FILE";
1113 case STT_OBJECT: st_info_str = "STT_OBJECT";
1114 case STT_TLS: st_info_str = "STT_TLS";
1115 default: st_info_str = "";
1116 }
1117 switch (ELF_ST_BIND (isym->st_info))
1118 {
1119 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
1120 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
1121 default: st_info_stb_str = "";
1122 }
1123 switch (ELF_ST_VISIBILITY (isym->st_other))
1124 {
1125 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
1126 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
1127 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
1128 default: st_other_str = "";
1129 }
1130 switch (isym->st_shndx)
1131 {
1132 case SHN_ABS: st_shndx_str = "SHN_ABS";
1133 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
1134 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
1135 default: st_shndx_str = "";
1136 }
1137 }
1138 if (free_internal)
1139 free (internal_syms);
1140 if (free_external)
1141 free (external_syms);
1142 }
1143
1144 char *
1145 rl78_get_reloc (long reloc)
1146 {
1147 if (0 <= reloc && reloc < R_RL78_max)
1148 return rl78_elf_howto_table[reloc].name;
1149 return "";
1150 }
1151 #endif /* DEBUG */
1152
1153 \f
1154 /* support PLT for 16-bit references to 24-bit functions. */
1155
1156 /* We support 16-bit pointers to code above 64k by generating a thunk
1157 below 64k containing a JMP instruction to the final address. */
1158
1159 static bfd_boolean
1160 rl78_elf_check_relocs
1161 (bfd * abfd,
1162 struct bfd_link_info * info,
1163 asection * sec,
1164 const Elf_Internal_Rela * relocs)
1165 {
1166 Elf_Internal_Shdr * symtab_hdr;
1167 struct elf_link_hash_entry ** sym_hashes;
1168 const Elf_Internal_Rela * rel;
1169 const Elf_Internal_Rela * rel_end;
1170 bfd_vma *local_plt_offsets;
1171 asection *splt;
1172 bfd *dynobj;
1173
1174 if (info->relocatable)
1175 return TRUE;
1176
1177 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1178 sym_hashes = elf_sym_hashes (abfd);
1179 local_plt_offsets = elf_local_got_offsets (abfd);
1180 splt = NULL;
1181 dynobj = elf_hash_table(info)->dynobj;
1182
1183 rel_end = relocs + sec->reloc_count;
1184 for (rel = relocs; rel < rel_end; rel++)
1185 {
1186 struct elf_link_hash_entry *h;
1187 unsigned long r_symndx;
1188 bfd_vma *offset;
1189
1190 r_symndx = ELF32_R_SYM (rel->r_info);
1191 if (r_symndx < symtab_hdr->sh_info)
1192 h = NULL;
1193 else
1194 {
1195 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1196 while (h->root.type == bfd_link_hash_indirect
1197 || h->root.type == bfd_link_hash_warning)
1198 h = (struct elf_link_hash_entry *) h->root.u.i.link;
1199 }
1200
1201 switch (ELF32_R_TYPE (rel->r_info))
1202 {
1203 /* This relocation describes a 16-bit pointer to a function.
1204 We may need to allocate a thunk in low memory; reserve memory
1205 for it now. */
1206 case R_RL78_DIR16S:
1207 if (dynobj == NULL)
1208 elf_hash_table (info)->dynobj = dynobj = abfd;
1209 if (splt == NULL)
1210 {
1211 splt = bfd_get_section_by_name (dynobj, ".plt");
1212 if (splt == NULL)
1213 {
1214 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1215 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1216 | SEC_READONLY | SEC_CODE);
1217 splt = bfd_make_section_with_flags (dynobj, ".plt", flags);
1218 if (splt == NULL
1219 || ! bfd_set_section_alignment (dynobj, splt, 1))
1220 return FALSE;
1221 }
1222 }
1223
1224 if (h != NULL)
1225 offset = &h->plt.offset;
1226 else
1227 {
1228 if (local_plt_offsets == NULL)
1229 {
1230 size_t size;
1231 unsigned int i;
1232
1233 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1234 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1235 if (local_plt_offsets == NULL)
1236 return FALSE;
1237 elf_local_got_offsets (abfd) = local_plt_offsets;
1238
1239 for (i = 0; i < symtab_hdr->sh_info; i++)
1240 local_plt_offsets[i] = (bfd_vma) -1;
1241 }
1242 offset = &local_plt_offsets[r_symndx];
1243 }
1244
1245 if (*offset == (bfd_vma) -1)
1246 {
1247 *offset = splt->size;
1248 splt->size += 4;
1249 }
1250 break;
1251 }
1252 }
1253
1254 return TRUE;
1255 }
1256
1257 /* This must exist if dynobj is ever set. */
1258
1259 static bfd_boolean
1260 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1261 struct bfd_link_info *info)
1262 {
1263 bfd *dynobj;
1264 asection *splt;
1265
1266 /* As an extra sanity check, verify that all plt entries have been
1267 filled in. However, relaxing might have changed the relocs so
1268 that some plt entries don't get filled in, so we have to skip
1269 this check if we're relaxing. Unfortunately, check_relocs is
1270 called before relaxation. */
1271
1272 if (info->relax_trip > 0)
1273 {
1274 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1275 && (splt = bfd_get_section_by_name (dynobj, ".plt")) != NULL)
1276 {
1277 bfd_byte *contents = splt->contents;
1278 unsigned int i, size = splt->size;
1279 for (i = 0; i < size; i += 4)
1280 {
1281 unsigned int x = bfd_get_32 (dynobj, contents + i);
1282 BFD_ASSERT (x != 0);
1283 }
1284 }
1285 }
1286
1287 return TRUE;
1288 }
1289
1290 static bfd_boolean
1291 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1292 struct bfd_link_info *info)
1293 {
1294 bfd *dynobj;
1295 asection *splt;
1296
1297 if (info->relocatable)
1298 return TRUE;
1299
1300 dynobj = elf_hash_table (info)->dynobj;
1301 if (dynobj == NULL)
1302 return TRUE;
1303
1304 splt = bfd_get_section_by_name (dynobj, ".plt");
1305 BFD_ASSERT (splt != NULL);
1306
1307 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1308 if (splt->contents == NULL)
1309 return FALSE;
1310
1311 return TRUE;
1312 }
1313
1314 \f
1315
1316 /* Handle relaxing. */
1317
1318 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1319 is within the low 64k, remove any entry for it in the plt. */
1320
1321 struct relax_plt_data
1322 {
1323 asection *splt;
1324 bfd_boolean *again;
1325 };
1326
1327 static bfd_boolean
1328 rl78_relax_plt_check (struct elf_link_hash_entry *h,
1329 PTR xdata)
1330 {
1331 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1332
1333 if (h->plt.offset != (bfd_vma) -1)
1334 {
1335 bfd_vma address;
1336
1337 if (h->root.type == bfd_link_hash_undefined
1338 || h->root.type == bfd_link_hash_undefweak)
1339 address = 0;
1340 else
1341 address = (h->root.u.def.section->output_section->vma
1342 + h->root.u.def.section->output_offset
1343 + h->root.u.def.value);
1344
1345 if (valid_16bit_address (address))
1346 {
1347 h->plt.offset = -1;
1348 data->splt->size -= 4;
1349 *data->again = TRUE;
1350 }
1351 }
1352
1353 return TRUE;
1354 }
1355
1356 /* A subroutine of rl78_elf_relax_section. If the global symbol H
1357 previously had a plt entry, give it a new entry offset. */
1358
1359 static bfd_boolean
1360 rl78_relax_plt_realloc (struct elf_link_hash_entry *h,
1361 PTR xdata)
1362 {
1363 bfd_vma *entry = (bfd_vma *) xdata;
1364
1365 if (h->plt.offset != (bfd_vma) -1)
1366 {
1367 h->plt.offset = *entry;
1368 *entry += 4;
1369 }
1370
1371 return TRUE;
1372 }
1373
1374 static bfd_boolean
1375 rl78_elf_relax_plt_section (bfd *dynobj,
1376 asection *splt,
1377 struct bfd_link_info *info,
1378 bfd_boolean *again)
1379 {
1380 struct relax_plt_data relax_plt_data;
1381 bfd *ibfd;
1382
1383 /* Assume nothing changes. */
1384 *again = FALSE;
1385
1386 if (info->relocatable)
1387 return TRUE;
1388
1389 /* We only relax the .plt section at the moment. */
1390 if (dynobj != elf_hash_table (info)->dynobj
1391 || strcmp (splt->name, ".plt") != 0)
1392 return TRUE;
1393
1394 /* Quick check for an empty plt. */
1395 if (splt->size == 0)
1396 return TRUE;
1397
1398 /* Map across all global symbols; see which ones happen to
1399 fall in the low 64k. */
1400 relax_plt_data.splt = splt;
1401 relax_plt_data.again = again;
1402 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1403 &relax_plt_data);
1404
1405 /* Likewise for local symbols, though that's somewhat less convenient
1406 as we have to walk the list of input bfds and swap in symbol data. */
1407 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1408 {
1409 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1410 Elf_Internal_Shdr *symtab_hdr;
1411 Elf_Internal_Sym *isymbuf = NULL;
1412 unsigned int idx;
1413
1414 if (! local_plt_offsets)
1415 continue;
1416
1417 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1418 if (symtab_hdr->sh_info != 0)
1419 {
1420 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1421 if (isymbuf == NULL)
1422 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1423 symtab_hdr->sh_info, 0,
1424 NULL, NULL, NULL);
1425 if (isymbuf == NULL)
1426 return FALSE;
1427 }
1428
1429 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1430 {
1431 Elf_Internal_Sym *isym;
1432 asection *tsec;
1433 bfd_vma address;
1434
1435 if (local_plt_offsets[idx] == (bfd_vma) -1)
1436 continue;
1437
1438 isym = &isymbuf[idx];
1439 if (isym->st_shndx == SHN_UNDEF)
1440 continue;
1441 else if (isym->st_shndx == SHN_ABS)
1442 tsec = bfd_abs_section_ptr;
1443 else if (isym->st_shndx == SHN_COMMON)
1444 tsec = bfd_com_section_ptr;
1445 else
1446 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1447
1448 address = (tsec->output_section->vma
1449 + tsec->output_offset
1450 + isym->st_value);
1451 if (valid_16bit_address (address))
1452 {
1453 local_plt_offsets[idx] = -1;
1454 splt->size -= 4;
1455 *again = TRUE;
1456 }
1457 }
1458
1459 if (isymbuf != NULL
1460 && symtab_hdr->contents != (unsigned char *) isymbuf)
1461 {
1462 if (! info->keep_memory)
1463 free (isymbuf);
1464 else
1465 {
1466 /* Cache the symbols for elf_link_input_bfd. */
1467 symtab_hdr->contents = (unsigned char *) isymbuf;
1468 }
1469 }
1470 }
1471
1472 /* If we changed anything, walk the symbols again to reallocate
1473 .plt entry addresses. */
1474 if (*again && splt->size > 0)
1475 {
1476 bfd_vma entry = 0;
1477
1478 elf_link_hash_traverse (elf_hash_table (info),
1479 rl78_relax_plt_realloc, &entry);
1480
1481 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1482 {
1483 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1484 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1485 unsigned int idx;
1486
1487 if (! local_plt_offsets)
1488 continue;
1489
1490 for (idx = 0; idx < nlocals; ++idx)
1491 if (local_plt_offsets[idx] != (bfd_vma) -1)
1492 {
1493 local_plt_offsets[idx] = entry;
1494 entry += 4;
1495 }
1496 }
1497 }
1498
1499 return TRUE;
1500 }
1501
1502 /* Delete some bytes from a section while relaxing. */
1503
1504 static bfd_boolean
1505 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1506 Elf_Internal_Rela *alignment_rel, int force_snip)
1507 {
1508 Elf_Internal_Shdr * symtab_hdr;
1509 unsigned int sec_shndx;
1510 bfd_byte * contents;
1511 Elf_Internal_Rela * irel;
1512 Elf_Internal_Rela * irelend;
1513 Elf_Internal_Sym * isym;
1514 Elf_Internal_Sym * isymend;
1515 bfd_vma toaddr;
1516 unsigned int symcount;
1517 struct elf_link_hash_entry ** sym_hashes;
1518 struct elf_link_hash_entry ** end_hashes;
1519
1520 if (!alignment_rel)
1521 force_snip = 1;
1522
1523 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1524
1525 contents = elf_section_data (sec)->this_hdr.contents;
1526
1527 /* The deletion must stop at the next alignment boundary, if
1528 ALIGNMENT_REL is non-NULL. */
1529 toaddr = sec->size;
1530 if (alignment_rel)
1531 toaddr = alignment_rel->r_offset;
1532
1533 irel = elf_section_data (sec)->relocs;
1534 irelend = irel + sec->reloc_count;
1535
1536 /* Actually delete the bytes. */
1537 memmove (contents + addr, contents + addr + count,
1538 (size_t) (toaddr - addr - count));
1539
1540 /* If we don't have an alignment marker to worry about, we can just
1541 shrink the section. Otherwise, we have to fill in the newly
1542 created gap with NOP insns (0x03). */
1543 if (force_snip)
1544 sec->size -= count;
1545 else
1546 memset (contents + toaddr - count, 0x03, count);
1547
1548 /* Adjust all the relocs. */
1549 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1550 {
1551 /* Get the new reloc address. */
1552 if (irel->r_offset > addr
1553 && (irel->r_offset < toaddr
1554 || (force_snip && irel->r_offset == toaddr)))
1555 irel->r_offset -= count;
1556
1557 /* If we see an ALIGN marker at the end of the gap, we move it
1558 to the beginning of the gap, since marking these gaps is what
1559 they're for. */
1560 if (irel->r_offset == toaddr
1561 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1562 && irel->r_addend & RL78_RELAXA_ALIGN)
1563 irel->r_offset -= count;
1564 }
1565
1566 /* Adjust the local symbols defined in this section. */
1567 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1568 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1569 isymend = isym + symtab_hdr->sh_info;
1570
1571 for (; isym < isymend; isym++)
1572 {
1573 /* If the symbol is in the range of memory we just moved, we
1574 have to adjust its value. */
1575 if (isym->st_shndx == sec_shndx
1576 && isym->st_value > addr
1577 && isym->st_value < toaddr)
1578 isym->st_value -= count;
1579
1580 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1581 *end* is in the moved bytes but it's *start* isn't), then we
1582 must adjust its size. */
1583 if (isym->st_shndx == sec_shndx
1584 && isym->st_value < addr
1585 && isym->st_value + isym->st_size > addr
1586 && isym->st_value + isym->st_size < toaddr)
1587 isym->st_size -= count;
1588 }
1589
1590 /* Now adjust the global symbols defined in this section. */
1591 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1592 - symtab_hdr->sh_info);
1593 sym_hashes = elf_sym_hashes (abfd);
1594 end_hashes = sym_hashes + symcount;
1595
1596 for (; sym_hashes < end_hashes; sym_hashes++)
1597 {
1598 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1599
1600 if ((sym_hash->root.type == bfd_link_hash_defined
1601 || sym_hash->root.type == bfd_link_hash_defweak)
1602 && sym_hash->root.u.def.section == sec)
1603 {
1604 /* As above, adjust the value if needed. */
1605 if (sym_hash->root.u.def.value > addr
1606 && sym_hash->root.u.def.value < toaddr)
1607 sym_hash->root.u.def.value -= count;
1608
1609 /* As above, adjust the size if needed. */
1610 if (sym_hash->root.u.def.value < addr
1611 && sym_hash->root.u.def.value + sym_hash->size > addr
1612 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1613 sym_hash->size -= count;
1614 }
1615 }
1616
1617 return TRUE;
1618 }
1619
1620 /* Used to sort relocs by address. If relocs have the same address,
1621 we maintain their relative order, except that R_RL78_RH_RELAX
1622 alignment relocs must be the first reloc for any given address. */
1623
1624 static void
1625 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1626 {
1627 int i;
1628 bfd_boolean again;
1629 bfd_boolean swappit;
1630
1631 /* This is almost a classic bubblesort. It's the slowest sort, but
1632 we're taking advantage of the fact that the relocations are
1633 mostly in order already (the assembler emits them that way) and
1634 we need relocs with the same address to remain in the same
1635 relative order. */
1636 again = TRUE;
1637 while (again)
1638 {
1639 again = FALSE;
1640 for (i = 0; i < count - 1; i ++)
1641 {
1642 if (r[i].r_offset > r[i + 1].r_offset)
1643 swappit = TRUE;
1644 else if (r[i].r_offset < r[i + 1].r_offset)
1645 swappit = FALSE;
1646 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1647 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1648 swappit = TRUE;
1649 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1650 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1651 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1652 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1653 swappit = TRUE;
1654 else
1655 swappit = FALSE;
1656
1657 if (swappit)
1658 {
1659 Elf_Internal_Rela tmp;
1660
1661 tmp = r[i];
1662 r[i] = r[i + 1];
1663 r[i + 1] = tmp;
1664 /* If we do move a reloc back, re-scan to see if it
1665 needs to be moved even further back. This avoids
1666 most of the O(n^2) behavior for our cases. */
1667 if (i > 0)
1668 i -= 2;
1669 again = TRUE;
1670 }
1671 }
1672 }
1673 }
1674
1675
1676 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1677 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1678 lrel, abfd, sec, link_info, scale)
1679
1680 static bfd_vma
1681 rl78_offset_for_reloc (bfd * abfd,
1682 Elf_Internal_Rela * rel,
1683 Elf_Internal_Shdr * symtab_hdr,
1684 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1685 Elf_Internal_Sym * intsyms,
1686 Elf_Internal_Rela ** lrel,
1687 bfd * input_bfd,
1688 asection * input_section,
1689 struct bfd_link_info * info,
1690 int * scale)
1691 {
1692 bfd_vma symval;
1693 bfd_reloc_status_type r;
1694
1695 *scale = 1;
1696
1697 /* REL is the first of 1..N relocations. We compute the symbol
1698 value for each relocation, then combine them if needed. LREL
1699 gets a pointer to the last relocation used. */
1700 while (1)
1701 {
1702 int32_t tmp1, tmp2;
1703
1704 /* Get the value of the symbol referred to by the reloc. */
1705 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1706 {
1707 /* A local symbol. */
1708 Elf_Internal_Sym *isym;
1709 asection *ssec;
1710
1711 isym = intsyms + ELF32_R_SYM (rel->r_info);
1712
1713 if (isym->st_shndx == SHN_UNDEF)
1714 ssec = bfd_und_section_ptr;
1715 else if (isym->st_shndx == SHN_ABS)
1716 ssec = bfd_abs_section_ptr;
1717 else if (isym->st_shndx == SHN_COMMON)
1718 ssec = bfd_com_section_ptr;
1719 else
1720 ssec = bfd_section_from_elf_index (abfd,
1721 isym->st_shndx);
1722
1723 /* Initial symbol value. */
1724 symval = isym->st_value;
1725
1726 /* GAS may have made this symbol relative to a section, in
1727 which case, we have to add the addend to find the
1728 symbol. */
1729 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1730 symval += rel->r_addend;
1731
1732 if (ssec)
1733 {
1734 if ((ssec->flags & SEC_MERGE)
1735 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
1736 symval = _bfd_merged_section_offset (abfd, & ssec,
1737 elf_section_data (ssec)->sec_info,
1738 symval);
1739 }
1740
1741 /* Now make the offset relative to where the linker is putting it. */
1742 if (ssec)
1743 symval +=
1744 ssec->output_section->vma + ssec->output_offset;
1745
1746 symval += rel->r_addend;
1747 }
1748 else
1749 {
1750 unsigned long indx;
1751 struct elf_link_hash_entry * h;
1752
1753 /* An external symbol. */
1754 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1755 h = elf_sym_hashes (abfd)[indx];
1756 BFD_ASSERT (h != NULL);
1757
1758 if (h->root.type != bfd_link_hash_defined
1759 && h->root.type != bfd_link_hash_defweak)
1760 {
1761 /* This appears to be a reference to an undefined
1762 symbol. Just ignore it--it will be caught by the
1763 regular reloc processing. */
1764 if (lrel)
1765 *lrel = rel;
1766 return 0;
1767 }
1768
1769 symval = (h->root.u.def.value
1770 + h->root.u.def.section->output_section->vma
1771 + h->root.u.def.section->output_offset);
1772
1773 symval += rel->r_addend;
1774 }
1775
1776 switch (ELF32_R_TYPE (rel->r_info))
1777 {
1778 case R_RL78_SYM:
1779 RL78_STACK_PUSH (symval);
1780 break;
1781
1782 case R_RL78_OPneg:
1783 RL78_STACK_POP (tmp1);
1784 tmp1 = - tmp1;
1785 RL78_STACK_PUSH (tmp1);
1786 break;
1787
1788 case R_RL78_OPadd:
1789 RL78_STACK_POP (tmp1);
1790 RL78_STACK_POP (tmp2);
1791 tmp1 += tmp2;
1792 RL78_STACK_PUSH (tmp1);
1793 break;
1794
1795 case R_RL78_OPsub:
1796 RL78_STACK_POP (tmp1);
1797 RL78_STACK_POP (tmp2);
1798 tmp2 -= tmp1;
1799 RL78_STACK_PUSH (tmp2);
1800 break;
1801
1802 case R_RL78_OPmul:
1803 RL78_STACK_POP (tmp1);
1804 RL78_STACK_POP (tmp2);
1805 tmp1 *= tmp2;
1806 RL78_STACK_PUSH (tmp1);
1807 break;
1808
1809 case R_RL78_OPdiv:
1810 RL78_STACK_POP (tmp1);
1811 RL78_STACK_POP (tmp2);
1812 tmp1 /= tmp2;
1813 RL78_STACK_PUSH (tmp1);
1814 break;
1815
1816 case R_RL78_OPshla:
1817 RL78_STACK_POP (tmp1);
1818 RL78_STACK_POP (tmp2);
1819 tmp1 <<= tmp2;
1820 RL78_STACK_PUSH (tmp1);
1821 break;
1822
1823 case R_RL78_OPshra:
1824 RL78_STACK_POP (tmp1);
1825 RL78_STACK_POP (tmp2);
1826 tmp1 >>= tmp2;
1827 RL78_STACK_PUSH (tmp1);
1828 break;
1829
1830 case R_RL78_OPsctsize:
1831 RL78_STACK_PUSH (input_section->size);
1832 break;
1833
1834 case R_RL78_OPscttop:
1835 RL78_STACK_PUSH (input_section->output_section->vma);
1836 break;
1837
1838 case R_RL78_OPand:
1839 RL78_STACK_POP (tmp1);
1840 RL78_STACK_POP (tmp2);
1841 tmp1 &= tmp2;
1842 RL78_STACK_PUSH (tmp1);
1843 break;
1844
1845 case R_RL78_OPor:
1846 RL78_STACK_POP (tmp1);
1847 RL78_STACK_POP (tmp2);
1848 tmp1 |= tmp2;
1849 RL78_STACK_PUSH (tmp1);
1850 break;
1851
1852 case R_RL78_OPxor:
1853 RL78_STACK_POP (tmp1);
1854 RL78_STACK_POP (tmp2);
1855 tmp1 ^= tmp2;
1856 RL78_STACK_PUSH (tmp1);
1857 break;
1858
1859 case R_RL78_OPnot:
1860 RL78_STACK_POP (tmp1);
1861 tmp1 = ~ tmp1;
1862 RL78_STACK_PUSH (tmp1);
1863 break;
1864
1865 case R_RL78_OPmod:
1866 RL78_STACK_POP (tmp1);
1867 RL78_STACK_POP (tmp2);
1868 tmp1 %= tmp2;
1869 RL78_STACK_PUSH (tmp1);
1870 break;
1871
1872 case R_RL78_OPromtop:
1873 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1874 break;
1875
1876 case R_RL78_OPramtop:
1877 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1878 break;
1879
1880 case R_RL78_DIR16UL:
1881 case R_RL78_DIR8UL:
1882 case R_RL78_ABS16UL:
1883 case R_RL78_ABS8UL:
1884 if (rl78_stack_top)
1885 RL78_STACK_POP (symval);
1886 if (lrel)
1887 *lrel = rel;
1888 *scale = 4;
1889 return symval;
1890
1891 case R_RL78_DIR16UW:
1892 case R_RL78_DIR8UW:
1893 case R_RL78_ABS16UW:
1894 case R_RL78_ABS8UW:
1895 if (rl78_stack_top)
1896 RL78_STACK_POP (symval);
1897 if (lrel)
1898 *lrel = rel;
1899 *scale = 2;
1900 return symval;
1901
1902 default:
1903 if (rl78_stack_top)
1904 RL78_STACK_POP (symval);
1905 if (lrel)
1906 *lrel = rel;
1907 return symval;
1908 }
1909
1910 rel ++;
1911 }
1912 }
1913
1914 struct {
1915 int prefix; /* or -1 for "no prefix" */
1916 int insn; /* or -1 for "end of list" */
1917 int insn_for_saddr; /* or -1 for "no alternative" */
1918 int insn_for_sfr; /* or -1 for "no alternative" */
1919 } relax_addr16[] = {
1920 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1921 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1922 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1923 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1924
1925 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1926 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1927 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1928 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1929 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1930 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1931 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1932 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1933
1934 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1935 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1936 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1937 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1938 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1939
1940 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1941 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1942 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1943 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1944
1945 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1946 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1947 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1948
1949 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1950 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1951 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1952 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1953 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1954 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1955
1956 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1957
1958 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1959 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1960 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1961 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1962 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1963 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1964 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1965 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1966
1967 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1968 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1969 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1970 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1971 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1972 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1973 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1974 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
1975
1976 { -1, -1, -1, -1 }
1977 };
1978
1979 /* Relax one section. */
1980
1981 static bfd_boolean
1982 rl78_elf_relax_section
1983 (bfd * abfd,
1984 asection * sec,
1985 struct bfd_link_info * link_info,
1986 bfd_boolean * again)
1987 {
1988 Elf_Internal_Shdr * symtab_hdr;
1989 Elf_Internal_Shdr * shndx_hdr;
1990 Elf_Internal_Rela * internal_relocs;
1991 Elf_Internal_Rela * free_relocs = NULL;
1992 Elf_Internal_Rela * irel;
1993 Elf_Internal_Rela * srel;
1994 Elf_Internal_Rela * irelend;
1995 Elf_Internal_Rela * next_alignment;
1996 bfd_byte * contents = NULL;
1997 bfd_byte * free_contents = NULL;
1998 Elf_Internal_Sym * intsyms = NULL;
1999 Elf_Internal_Sym * free_intsyms = NULL;
2000 Elf_External_Sym_Shndx * shndx_buf = NULL;
2001 bfd_vma pc;
2002 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2003 int pcrel ATTRIBUTE_UNUSED = 0;
2004 int code ATTRIBUTE_UNUSED = 0;
2005 int section_alignment_glue;
2006 int scale;
2007
2008 if (abfd == elf_hash_table (link_info)->dynobj
2009 && strcmp (sec->name, ".plt") == 0)
2010 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2011
2012 /* Assume nothing changes. */
2013 *again = FALSE;
2014
2015 /* We don't have to do anything for a relocatable link, if
2016 this section does not have relocs, or if this is not a
2017 code section. */
2018 if (link_info->relocatable
2019 || (sec->flags & SEC_RELOC) == 0
2020 || sec->reloc_count == 0
2021 || (sec->flags & SEC_CODE) == 0)
2022 return TRUE;
2023
2024 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2025 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2026
2027 /* Get the section contents. */
2028 if (elf_section_data (sec)->this_hdr.contents != NULL)
2029 contents = elf_section_data (sec)->this_hdr.contents;
2030 /* Go get them off disk. */
2031 else
2032 {
2033 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2034 goto error_return;
2035 elf_section_data (sec)->this_hdr.contents = contents;
2036 }
2037
2038 /* Read this BFD's symbols. */
2039 /* Get cached copy if it exists. */
2040 if (symtab_hdr->contents != NULL)
2041 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2042 else
2043 {
2044 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2045 symtab_hdr->contents = (bfd_byte *) intsyms;
2046 }
2047
2048 if (shndx_hdr->sh_size != 0)
2049 {
2050 bfd_size_type amt;
2051
2052 amt = symtab_hdr->sh_info;
2053 amt *= sizeof (Elf_External_Sym_Shndx);
2054 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2055 if (shndx_buf == NULL)
2056 goto error_return;
2057 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2058 || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
2059 goto error_return;
2060 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2061 }
2062
2063 /* Get a copy of the native relocations. */
2064 internal_relocs = (_bfd_elf_link_read_relocs
2065 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
2066 link_info->keep_memory));
2067 if (internal_relocs == NULL)
2068 goto error_return;
2069 if (! link_info->keep_memory)
2070 free_relocs = internal_relocs;
2071
2072 /* The RL_ relocs must be just before the operand relocs they go
2073 with, so we must sort them to guarantee this. We use bubblesort
2074 instead of qsort so we can guarantee that relocs with the same
2075 address remain in the same relative order. */
2076 reloc_bubblesort (internal_relocs, sec->reloc_count);
2077
2078 /* Walk through them looking for relaxing opportunities. */
2079 irelend = internal_relocs + sec->reloc_count;
2080
2081
2082 /* This will either be NULL or a pointer to the next alignment
2083 relocation. */
2084 next_alignment = internal_relocs;
2085
2086 /* We calculate worst case shrinkage caused by alignment directives.
2087 No fool-proof, but better than either ignoring the problem or
2088 doing heavy duty analysis of all the alignment markers in all
2089 input sections. */
2090 section_alignment_glue = 0;
2091 for (irel = internal_relocs; irel < irelend; irel++)
2092 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2093 && irel->r_addend & RL78_RELAXA_ALIGN)
2094 {
2095 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2096
2097 if (section_alignment_glue < this_glue)
2098 section_alignment_glue = this_glue;
2099 }
2100 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2101 shrinkage. */
2102 section_alignment_glue *= 2;
2103
2104 for (irel = internal_relocs; irel < irelend; irel++)
2105 {
2106 unsigned char *insn;
2107 int nrelocs;
2108
2109 /* The insns we care about are all marked with one of these. */
2110 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2111 continue;
2112
2113 if (irel->r_addend & RL78_RELAXA_ALIGN
2114 || next_alignment == internal_relocs)
2115 {
2116 /* When we delete bytes, we need to maintain all the alignments
2117 indicated. In addition, we need to be careful about relaxing
2118 jumps across alignment boundaries - these displacements
2119 *grow* when we delete bytes. For now, don't shrink
2120 displacements across an alignment boundary, just in case.
2121 Note that this only affects relocations to the same
2122 section. */
2123 next_alignment += 2;
2124 while (next_alignment < irelend
2125 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2126 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2127 next_alignment ++;
2128 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2129 next_alignment = NULL;
2130 }
2131
2132 /* When we hit alignment markers, see if we've shrunk enough
2133 before them to reduce the gap without violating the alignment
2134 requirements. */
2135 if (irel->r_addend & RL78_RELAXA_ALIGN)
2136 {
2137 /* At this point, the next relocation *should* be the ELIGN
2138 end marker. */
2139 Elf_Internal_Rela *erel = irel + 1;
2140 unsigned int alignment, nbytes;
2141
2142 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2143 continue;
2144 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2145 continue;
2146
2147 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2148
2149 if (erel->r_offset - irel->r_offset < alignment)
2150 continue;
2151
2152 nbytes = erel->r_offset - irel->r_offset;
2153 nbytes /= alignment;
2154 nbytes *= alignment;
2155
2156 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2157 erel->r_offset == sec->size);
2158 *again = TRUE;
2159
2160 continue;
2161 }
2162
2163 if (irel->r_addend & RL78_RELAXA_ELIGN)
2164 continue;
2165
2166 insn = contents + irel->r_offset;
2167
2168 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2169
2170 /* At this point, we have an insn that is a candidate for linker
2171 relaxation. There are NRELOCS relocs following that may be
2172 relaxed, although each reloc may be made of more than one
2173 reloc entry (such as gp-rel symbols). */
2174
2175 /* Get the value of the symbol referred to by the reloc. Just
2176 in case this is the last reloc in the list, use the RL's
2177 addend to choose between this reloc (no addend) or the next
2178 (yes addend, which means at least one following reloc). */
2179
2180 /* srel points to the "current" reloction for this insn -
2181 actually the last reloc for a given operand, which is the one
2182 we need to update. We check the relaxations in the same
2183 order that the relocations happen, so we'll just push it
2184 along as we go. */
2185 srel = irel;
2186
2187 pc = sec->output_section->vma + sec->output_offset
2188 + srel->r_offset;
2189
2190 #define GET_RELOC \
2191 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2192 pcrel = symval - pc + srel->r_addend; \
2193 nrelocs --;
2194
2195 #define SNIPNR(offset, nbytes) \
2196 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2197 #define SNIP(offset, nbytes, newtype) \
2198 SNIPNR (offset, nbytes); \
2199 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2200
2201 /* The order of these bit tests must match the order that the
2202 relocs appear in. Since we sorted those by offset, we can
2203 predict them. */
2204
2205 /*----------------------------------------------------------------------*/
2206 /* EF ad BR $rel8 pcrel
2207 ED al ah BR !abs16 abs
2208 EE al ah BR $!rel16 pcrel
2209 EC al ah as BR !!abs20 abs
2210
2211 FD al ah CALL !abs16 abs
2212 FE al ah CALL $!rel16 pcrel
2213 FC al ah as CALL !!abs20 abs
2214
2215 DC ad BC $rel8
2216 DE ad BNC $rel8
2217 DD ad BZ $rel8
2218 DF ad BNZ $rel8
2219 61 C3 ad BH $rel8
2220 61 D3 ad BNH $rel8
2221 61 C8 EF ad SKC ; BR $rel8
2222 61 D8 EF ad SKNC ; BR $rel8
2223 61 E8 EF ad SKZ ; BR $rel8
2224 61 F8 EF ad SKNZ ; BR $rel8
2225 61 E3 EF ad SKH ; BR $rel8
2226 61 F3 EF ad SKNH ; BR $rel8
2227 */
2228
2229 if (irel->r_addend & RL78_RELAXA_BRA)
2230 {
2231 GET_RELOC;
2232
2233 switch (insn[0])
2234 {
2235 case 0xec: /* BR !!abs20 */
2236
2237 if (pcrel < 127
2238 && pcrel > -127)
2239 {
2240 insn[0] = 0xef;
2241 insn[1] = pcrel;
2242 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2243 *again = TRUE;
2244 }
2245 else if (symval < 65536)
2246 {
2247 insn[0] = 0xed;
2248 insn[1] = symval & 0xff;
2249 insn[2] = symval >> 8;
2250 SNIP (2, 1, R_RL78_DIR16S);
2251 *again = TRUE;
2252 }
2253 else if (pcrel < 32767
2254 && pcrel > -32767)
2255 {
2256 insn[0] = 0xee;
2257 insn[1] = pcrel & 0xff;
2258 insn[2] = pcrel >> 8;
2259 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2260 *again = TRUE;
2261 }
2262 break;
2263
2264 case 0xee: /* BR $!pcrel16 */
2265 case 0xed: /* BR $!abs16 */
2266 if (pcrel < 127
2267 && pcrel > -127)
2268 {
2269 insn[0] = 0xef;
2270 insn[1] = pcrel;
2271 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2272 *again = TRUE;
2273 }
2274 break;
2275
2276 case 0xfc: /* CALL !!abs20 */
2277 if (symval < 65536)
2278 {
2279 insn[0] = 0xfd;
2280 insn[1] = symval & 0xff;
2281 insn[2] = symval >> 8;
2282 SNIP (2, 1, R_RL78_DIR16S);
2283 *again = TRUE;
2284 }
2285 else if (pcrel < 32767
2286 && pcrel > -32767)
2287 {
2288 insn[0] = 0xfe;
2289 insn[1] = pcrel & 0xff;
2290 insn[2] = pcrel >> 8;
2291 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2292 *again = TRUE;
2293 }
2294 break;
2295
2296 case 0x61: /* PREFIX */
2297 /* For SKIP/BR, we change the BR opcode and delete the
2298 SKIP. That way, we don't have to find and change the
2299 relocation for the BR. */
2300 switch (insn[1])
2301 {
2302 case 0xc8: /* SKC */
2303 if (insn[2] == 0xef)
2304 {
2305 insn[2] = 0xde; /* BNC */
2306 SNIPNR (0, 2);
2307 }
2308 break;
2309
2310 case 0xd8: /* SKNC */
2311 if (insn[2] == 0xef)
2312 {
2313 insn[2] = 0xdc; /* BC */
2314 SNIPNR (0, 2);
2315 }
2316 break;
2317
2318 case 0xe8: /* SKZ */
2319 if (insn[2] == 0xef)
2320 {
2321 insn[2] = 0xdf; /* BNZ */
2322 SNIPNR (0, 2);
2323 }
2324 break;
2325
2326 case 0xf8: /* SKNZ */
2327 if (insn[2] == 0xef)
2328 {
2329 insn[2] = 0xdd; /* BZ */
2330 SNIPNR (0, 2);
2331 }
2332 break;
2333
2334 case 0xe3: /* SKH */
2335 if (insn[2] == 0xef)
2336 {
2337 insn[2] = 0xd3; /* BNH */
2338 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2339 }
2340 break;
2341
2342 case 0xf3: /* SKNH */
2343 if (insn[2] == 0xef)
2344 {
2345 insn[2] = 0xc3; /* BH */
2346 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2347 }
2348 break;
2349 }
2350 break;
2351 }
2352
2353 }
2354
2355 if (irel->r_addend & RL78_RELAXA_ADDR16)
2356 {
2357 /*----------------------------------------------------------------------*/
2358 /* Some insns have both a 16-bit address operand and an 8-bit
2359 variant if the address is within a special range:
2360
2361 Address 16-bit operand SADDR range SFR range
2362 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2363 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2364
2365 The RELAX_ADDR16[] array has the insn encodings for the
2366 16-bit operand version, as well as the SFR and SADDR
2367 variants. We only need to replace the encodings and
2368 adjust the operand.
2369
2370 Note: we intentionally do not attempt to decode and skip
2371 any ES: prefix, as adding ES: means the addr16 (likely)
2372 no longer points to saddr/sfr space.
2373 */
2374
2375 int is_sfr;
2376 int is_saddr;
2377 int idx;
2378 int poff;
2379
2380 GET_RELOC;
2381
2382 if (0xffe20 <= symval && symval <= 0xfffff)
2383 {
2384
2385 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2386 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2387
2388 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2389 {
2390 if (relax_addr16[idx].prefix != -1
2391 && insn[0] == relax_addr16[idx].prefix
2392 && insn[1] == relax_addr16[idx].insn)
2393 {
2394 poff = 1;
2395 }
2396 else if (relax_addr16[idx].prefix == -1
2397 && insn[0] == relax_addr16[idx].insn)
2398 {
2399 poff = 0;
2400 }
2401 else
2402 continue;
2403
2404 /* We have a matched insn, and poff is 0 or 1 depending
2405 on the base pattern size. */
2406
2407 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2408 {
2409 insn[poff] = relax_addr16[idx].insn_for_sfr;
2410 SNIP (poff+2, 1, R_RL78_RH_SFR);
2411 }
2412
2413 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2414 {
2415 insn[poff] = relax_addr16[idx].insn_for_saddr;
2416 SNIP (poff+2, 1, R_RL78_RH_SADDR);
2417 }
2418
2419 }
2420 }
2421 }
2422
2423 /*----------------------------------------------------------------------*/
2424
2425 }
2426
2427 return TRUE;
2428
2429 error_return:
2430 if (free_relocs != NULL)
2431 free (free_relocs);
2432
2433 if (free_contents != NULL)
2434 free (free_contents);
2435
2436 if (shndx_buf != NULL)
2437 {
2438 shndx_hdr->contents = NULL;
2439 free (shndx_buf);
2440 }
2441
2442 if (free_intsyms != NULL)
2443 free (free_intsyms);
2444
2445 return TRUE;
2446 }
2447
2448 \f
2449
2450 #define ELF_ARCH bfd_arch_rl78
2451 #define ELF_MACHINE_CODE EM_RL78
2452 #define ELF_MAXPAGESIZE 0x1000
2453
2454 #define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2455 #define TARGET_LITTLE_NAME "elf32-rl78"
2456
2457 #define elf_info_to_howto_rel NULL
2458 #define elf_info_to_howto rl78_info_to_howto_rela
2459 #define elf_backend_object_p rl78_elf_object_p
2460 #define elf_backend_relocate_section rl78_elf_relocate_section
2461 #define elf_symbol_leading_char ('_')
2462 #define elf_backend_can_gc_sections 1
2463
2464 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2465 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2466 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2467 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2468 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2469
2470 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2471 #define elf_backend_check_relocs rl78_elf_check_relocs
2472 #define elf_backend_always_size_sections \
2473 rl78_elf_always_size_sections
2474 #define elf_backend_finish_dynamic_sections \
2475 rl78_elf_finish_dynamic_sections
2476
2477 #include "elf32-target.h"
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