cpu/ChangeLog

   1 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
   2             Anil Paranjape   <anilp1@kpitcummins.com>
   3             Shilin Shakti    <shilins@kpitcummins.com>
   4
   5         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
   6         description.
   7         * xc16x.opc: New file containing supporting XC16C routines.
   8
   9 2006-02-10  Nick Clifton  <nickc@redhat.com>
  10
  11         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
  12
  13 2006-01-06  DJ Delorie  <dj@redhat.com>
  14
  15         * m32c.cpu (mov.w:q): Fix mode.
  16         (push32.b.imm): Likewise, for the comment.
  17
  18 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
  19
  20         Second part of ms1 to mt renaming.
  21         * mt.cpu (define-arch, define-isa): Set name to mt.
  22         (define-mach): Adjust.
  23         * mt.opc (CGEN_ASM_HASH): Update.
  24         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
  25         (parse_loopsize, parse_imm16): Adjust.
  26
  27 2005-12-13  DJ Delorie  <dj@redhat.com>
  28
  29         * m32c.cpu (jsri): Fix order so register names aren't treated as
  30         symbols.
  31         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
  32         indexwd, indexws): Fix encodings.
  33
  34 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
  35
  36         * mt.cpu: Rename from ms1.cpu.
  37         * mt.opc: Rename from ms1.opc.
  38
  39 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
  40
  41         * cris.cpu (simplecris-common-writable-specregs)
  42         (simplecris-common-readable-specregs): Split from
  43         simplecris-common-specregs.  All users changed.
  44         (cris-implemented-writable-specregs-v0)
  45         (cris-implemented-readable-specregs-v0): Similar from
  46         cris-implemented-specregs-v0.
  47         (cris-implemented-writable-specregs-v3)
  48         (cris-implemented-readable-specregs-v3)
  49         (cris-implemented-writable-specregs-v8)
  50         (cris-implemented-readable-specregs-v8)
  51         (cris-implemented-writable-specregs-v10)
  52         (cris-implemented-readable-specregs-v10)
  53         (cris-implemented-writable-specregs-v32)
  54         (cris-implemented-readable-specregs-v32): Similar.
  55         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
  56         insns and specializations.
  57
  58 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
  59
  60         Add ms2
  61         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
  62         model.
  63         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
  64         f-cb2incr, f-rc3): New fields.
  65         (LOOP): New instruction.
  66         (JAL-HAZARD): New hazard.
  67         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
  68         New operands.
  69         (mul, muli, dbnz, iflush): Enable for ms2
  70         (jal, reti): Has JAL-HAZARD.
  71         (ldctxt, ldfb, stfb): Only ms1.
  72         (fbcb): Only ms1,ms1-003.
  73         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
  74         fbcbincrs, mfbcbincrs): Enable for ms2.
  75         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
  76         * ms1.opc (parse_loopsize): New.
  77         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
  78         (print_pcrel): New.
  79
  80 2005-10-28  Dave Brolley  <brolley@redhat.com>
  81
  82         Contribute the following change:
  83         2003-09-24  Dave Brolley  <brolley@redhat.com>
  84
  85         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
  86         CGEN_ATTR_VALUE_TYPE.
  87         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
  88         Use cgen_bitset_intersect_p.
  89
  90 2005-10-27  DJ Delorie  <dj@redhat.com>
  91
  92         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
  93         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
  94         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
  95         imm operand is needed.
  96         (adjnz, sbjnz): Pass the right operands.
  97         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
  98         unary-insn): Add -g variants for opcodes that need to support :G.
  99         (not.BW:G, push.BW:G): Call it.
 100         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 101         stzx16-imm8-imm8-abs16): Fix operand typos.
 102         * m32c.opc (m32c_asm_hash): Support bnCND.
 103         (parse_signed4n, print_signed4n): New.
 104
 105 2005-10-26  DJ Delorie  <dj@redhat.com>
 106
 107         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 108         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 109         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 110         dsp8[sp] is signed.
 111         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 112         (mov.BW:S r0,r1): Fix typo r1l->r1.
 113         (tst): Allow :G suffix.
 114         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 115
 116 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 117
 118         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 119
 120 2005-10-25  DJ Delorie  <dj@redhat.com>
 121
 122         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 123         making one a macro of the other.
 124
 125 2005-10-21  DJ Delorie  <dj@redhat.com>
 126
 127         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 128         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 129         indexld, indexls): .w variants have `1' bit.
 130         (rot32.b): QI, not SI.
 131         (rot32.w): HI, not SI.
 132         (xchg16): HI for .w variant.
 133
 134 2005-10-19  Nick Clifton  <nickc@redhat.com>
 135
 136         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 137
 138 2005-10-18  Andreas Schwab  <schwab@suse.de>
 139
 140         * m32r.opc (parse_slo16): Better version of previous patch.
 141
 142 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 143
 144         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 145         size.
 146
 147 2005-07-25  DJ Delorie  <dj@redhat.com>
 148
 149         * m32c.opc (parse_unsigned8): Add %dsp8().
 150         (parse_signed8): Add %hi8().
 151         (parse_unsigned16): Add %dsp16().
 152         (parse_signed16): Add %lo16() and %hi16().
 153         (parse_lab_5_3): Make valuep a bfd_vma *.
 154
 155 2005-07-18  Nick Clifton  <nickc@redhat.com>
 156
 157         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 158         components.
 159         (f-lab32-jmp-s): Fix insertion sequence.
 160         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 161         (Dsp-40-s8): Make parameter be signed.
 162         (Dsp-40-s16): Likewise.
 163         (Dsp-48-s8): Likewise.
 164         (Dsp-48-s16): Likewise.
 165         (Imm-13-u3): Likewise. (Despite its name!)
 166         (BitBase16-16-s8): Make the parameter be unsigned.
 167         (BitBase16-8-u11-S): Likewise.
 168         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 169         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 170         relaxation.
 171
 172         * m32c.opc: Fix formatting.
 173         Use safe-ctype.h instead of ctype.h
 174         Move duplicated code sequences into a macro.
 175         Fix compile time warnings about signedness mismatches.
 176         Remove dead code.
 177         (parse_lab_5_3): New parser function.
 178
 179 2005-07-16  Jim Blandy  <jimb@redhat.com>
 180
 181         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 182         to represent isa sets.
 183
 184 2005-07-15  Jim Blandy  <jimb@redhat.com>
 185
 186         * m32c.cpu, m32c.opc: Fix copyright.
 187
 188 2005-07-14  Jim Blandy  <jimb@redhat.com>
 189
 190         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 191
 192 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 193
 194         * ms1.opc (print_dollarhex): Correct format string.
 195
 196 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 197
 198         * iq2000.cpu: Include from binutils cpu dir.
 199
 200 2005-07-05  Nick Clifton  <nickc@redhat.com>
 201
 202         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 203         unsigned in order to avoid compile time warnings about sign
 204         conflicts.
 205
 206         * ms1.opc (parse_*): Likewise.
 207         (parse_imm16): Use a "void *" as it is passed both signed and
 208         unsigned arguments.
 209
 210 2005-07-01  Nick Clifton  <nickc@redhat.com>
 211
 212         * frv.opc: Update to ISO C90 function declaration style.
 213         * iq2000.opc: Likewise.
 214         * m32r.opc: Likewise.
 215         * sh.opc: Likewise.
 216
 217 2005-06-15  Dave Brolley  <brolley@redhat.com>
 218
 219         Contributed by Red Hat.
 220         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 221         * ms1.opc: New file.  Written by Stan Cox.
 222
 223 2005-05-10  Nick Clifton  <nickc@redhat.com>
 224
 225         * Update the address and phone number of the FSF organization in
 226         the GPL notices in the following files:
 227         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 228         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 229         sh64-media.cpu, simplify.inc
 230
 231 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 232
 233         * frv.opc (parse_A): Warning fix.
 234
 235 2005-02-23  Nick Clifton  <nickc@redhat.com>
 236
 237         * frv.opc: Fixed compile time warnings about differing signed'ness
 238         of pointers passed to functions.
 239         * m32r.opc: Likewise.
 240
 241 2005-02-11  Nick Clifton  <nickc@redhat.com>
 242
 243         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 244         'bfd_vma *' in order avoid compile time warning message.
 245
 246 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 247
 248         * cris.cpu (mstep): Add missing insn.
 249
 250 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 251
 252         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 253         * frv.cpu: Add support for TLS annotations in loads and calll.
 254         * frv.opc (parse_symbolic_address): New.
 255         (parse_ldd_annotation): New.
 256         (parse_call_annotation): New.
 257         (parse_ld_annotation): New.
 258         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 259         Introduce TLS relocations.
 260         (parse_d12, parse_s12, parse_u12): Likewise.
 261         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 262         (parse_call_label, print_at): New.
 263
 264 2004-12-21  Mikael Starvik  <starvik@axis.com>
 265
 266         * cris.cpu (cris-set-mem): Correct integral write semantics.
 267
 268 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 269
 270         * cris.cpu: New file.
 271
 272 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 273
 274         * iq2000.cpu: Added quotes around macro arguments so that they
 275         will work with newer versions of guile.
 276
 277 2004-10-27  Nick Clifton  <nickc@redhat.com>
 278
 279         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 280         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 281         operand.
 282         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 283         with guile.
 284
 285 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 286
 287         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 288
 289 2004-05-15  Nick Clifton  <nickc@redhat.com>
 290
 291         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 292
 293 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 294
 295         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 296
 297 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 298
 299         * frv.cpu (define-arch frv): Add fr450 mach.
 300         (define-mach fr450): New.
 301         (define-model fr450): New.  Add profile units to every fr450 insn.
 302         (define-attr UNIT): Add MDCUTSSI.
 303         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 304         (define-attr AUDIO): New boolean.
 305         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 306         (f-LRA-null, f-TLBPR-null): New fields.
 307         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 308         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 309         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 310         (LRA-null, TLBPR-null): New macros.
 311         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 312         (load-real-address): New macro.
 313         (lrai, lrad, tlbpr): New instructions.
 314         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 315         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 316         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 317         (media-low-clear-semantics, media-scope-limit-semantics)
 318         (media-quad-limit, media-quad-shift): New macros.
 319         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 320         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 321         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 322         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 323         (fr450_unit_mapping): New array.
 324         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 325         for new MDCUTSSI unit.
 326         (fr450_check_insn_major_constraints): New function.
 327         (check_insn_major_constraints): Use it.
 328
 329 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 330
 331         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 332         (scutss): Change unit to I0.
 333         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 334         (mqsaths): Fix FR400-MAJOR categorization.
 335         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 336         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 337         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 338         combinations.
 339
 340 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 341
 342         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 343         (rstb, rsth, rst, rstd, rstq): Delete.
 344         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 345
 346 2004-02-23  Nick Clifton  <nickc@redhat.com>
 347
 348         * Apply these patches from Renesas:
 349
 350         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 351
 352         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 353         disassembling codes for 0x*2 addresses.
 354
 355         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 356
 357         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 358
 359         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 360
 361         * cpu/m32r.cpu : Add new model m32r2.
 362         Add new instructions.
 363         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 364         Changed PIPE attr of push from O to OS.
 365         Care for Little-endian of M32R.
 366         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 367         Care for Little-endian of M32R.
 368         (parse_slo16): signed extension for value.
 369
 370 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 371
 372         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 373         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 374
 375         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 376         written by Ben Elliston.
 377
 378 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 379
 380         * frv.cpu (UNIT): Add IACC.
 381         (iacc-multiply-r-r): Use it.
 382         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 383         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 384
 385 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 386
 387         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 388         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 389         cut&paste errors in shifting/truncating numerical operands.
 390         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 391         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 392         (parse_uslo16): Likewise.
 393         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 394         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 395         (parse_s12): Likewise.
 396         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 397         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 398         (parse_uslo16): Likewise.
 399         (parse_uhi16): Parse gothi and gotfuncdeschi.
 400         (parse_d12): Parse got12 and gotfuncdesc12.
 401         (parse_s12): Likewise.
 402
 403 2003-10-10  Dave Brolley  <brolley@redhat.com>
 404
 405         * frv.cpu (dnpmop): New p-macro.
 406         (GRdoublek): Use dnpmop.
 407         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 408         (store-double-r-r): Use (.sym regtype doublek).
 409         (r-store-double): Ditto.
 410         (store-double-r-r-u): Ditto.
 411         (conditional-store-double): Ditto.
 412         (conditional-store-double-u): Ditto.
 413         (store-double-r-simm): Ditto.
 414         (fmovs): Assign to UNIT FMALL.
 415
 416 2003-10-06  Dave Brolley  <brolley@redhat.com>
 417
 418         * frv.cpu, frv.opc: Add support for fr550.
 419
 420 2003-09-24  Dave Brolley  <brolley@redhat.com>
 421
 422         * frv.cpu (u-commit): New modelling unit for fr500.
 423         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 424         (commit-r): Use u-commit model for fr500.
 425         (commit): Ditto.
 426         (conditional-float-binary-op): Take profiling data as an argument.
 427         Update callers.
 428         (ne-float-binary-op): Ditto.
 429
 430 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 431
 432         * frv.cpu (nldqi): Delete unimplemented instruction.
 433
 434 2003-09-12  Dave Brolley  <brolley@redhat.com>
 435
 436         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 437         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 438         frv_ref_SI to get input register referenced for profiling.
 439         (clear-ne-flag-all): Pass insn profiling in as an argument.
 440         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 441
 442 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 443
 444         * frv.cpu: Typographical corrections.
 445
 446 2003-09-09  Dave Brolley  <brolley@redhat.com>
 447
 448         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 449         (conditional-media-dual-complex, media-quad-complex): Likewise.
 450
 451 2003-09-04  Dave Brolley  <brolley@redhat.com>
 452
 453         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 454         Update all callers.
 455         (conditional-register-transfer): Ditto.
 456         (cache-preload): Ditto.
 457         (floating-point-conversion): Ditto.
 458         (floating-point-neg): Ditto.
 459         (float-abs): Ditto.
 460         (float-binary-op-s): Ditto.
 461         (conditional-float-binary-op): Ditto.
 462         (ne-float-binary-op): Ditto.
 463         (float-dual-arith): Ditto.
 464         (ne-float-dual-arith): Ditto.
 465
 466 2003-09-03  Dave Brolley  <brolley@redhat.com>
 467
 468         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 469         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 470         MCLRACC-1.
 471         (A): Removed operand.
 472         (A0,A1): New operands replace operand A.
 473         (mnop): Now a real insn
 474         (mclracc): Removed insn.
 475         (mclracc-0, mclracc-1): New insns replace mclracc.
 476         (all insns): Use new UNIT attributes.
 477
 478 2003-08-21  Nick Clifton  <nickc@redhat.com>
 479
 480         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 481         and u-media-dual-btoh with output parameter.
 482         (cmbtoh): Add profiling hack.
 483
 484 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 485
 486         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 487
 488 2003-06-10  Doug Evans  <dje@sebabeach.org>
 489
 490         * frv.cpu: Add IDOC attribute.
 491
 492 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 493
 494         Contributed by Red Hat.
 495         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 496         Stan Cox, and Frank Ch. Eigler.
 497         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 498         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 499         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 500         * iq10.cpu: New file.  Written by Jeff Johnston.
 501
 502 2003-06-05  Nick Clifton  <nickc@redhat.com>
 503
 504         * frv.cpu (FRintieven): New operand.  An even-numbered only
 505         version of the FRinti operand.
 506         (FRintjeven): Likewise for FRintj.
 507         (FRintkeven): Likewise for FRintk.
 508         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 509         media-quad-arith-sat-semantics, media-quad-arith-sat,
 510         conditional-media-quad-arith-sat, mdunpackh,
 511         media-quad-multiply-semantics, media-quad-multiply,
 512         conditional-media-quad-multiply, media-quad-complex-i,
 513         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 514         conditional-media-quad-multiply-acc, munpackh,
 515         media-quad-multiply-cross-acc-semantics, mdpackh,
 516         media-quad-multiply-cross-acc, mbtoh-semantics,
 517         media-quad-cross-multiply-cross-acc-semantics,
 518         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 519         media-quad-cross-multiply-acc-semantics, cmbtoh,
 520         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 521         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 522         cmhtob): Use new operands.
 523         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 524         (parse_even_register): New function.
 525
 526 2003-06-03  Nick Clifton  <nickc@redhat.com>
 527
 528         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 529         immediate value not unsigned.
 530
 531 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 532
 533         Contributed by Red Hat.
 534         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 535         and Eric Christopher.
 536         * frv.opc: New file.  Written by Catherine Moore, and Dave
 537         Brolley.
 538         * simplify.inc: New file.  Written by Doug Evans.
 539
 540 2003-05-02  Andrew Cagney  <cagney@redhat.com>
 541
 542         * New file.
 543
 544 \f
 545 Local Variables:
 546 mode: change-log
 547 left-margin: 8
 548 fill-column: 74
 549 version-control: never
 550 End: