gas/NEWS

   1 -*- text -*-
   2
   3 Changes in 2.42:
   4
   5 * Experimental support in GAS to synthesize CFI for ABI-conformant,
   6   hand-written asm using the new command line option --scfi=experimental on
   7   x86-64.  Only System V AMD64 ABI is supported.
   8
   9 * Add support for the Arm Scalable Vector Extension version 2.1 (SVE2.1)
  10   instructions.
  11
  12 * Add support for the AArch64 Scalable Matrix Extension version 2.1 (SME2.1)
  13   instructions.
  14
  15 * Add support for 'armv8.9-a' and 'armv9.4-a' for -march in Arm GAS.
  16
  17 * Initial support for Intel APX: 32 GPRs, NDD, PUSH2/POP2 and PUSHP/POPP.
  18
  19 * On RISC-V macro instructions expanding to AUIPC and a load, store, or branch
  20   no longer accept x0 as an intermediate and/or destination register.
  21
  22 * Add support for Reliability, Availability and Serviceability extension v2
  23   (RASv2) for AArch64.
  24
  25 * Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
  26
  27 * Add support for Guarded Control Stack (GCS) for AArch64.
  28
  29 * Add support for AArch64 Check Feature Status Extension (CHK).
  30
  31 * Add support for 'armv8.9-a' and 'armv9.4-a' for -march in AArch64 GAS.
  32
  33 * Add support for Intel USER_MSR instructions.
  34
  35 * Add support for Intel AVX10.1.
  36
  37 * Add support for Intel PBNDKB instructions.
  38
  39 * Add support for Intel SM4 instructions.
  40
  41 * Add support for Intel SM3 instructions.
  42
  43 * Add support for Intel SHA512 instructions.
  44
  45 * Add support for Intel AVX-VNNI-INT16 instructions.
  46
  47 * Add support for Cortex-A520 for AArch64.
  48
  49 * Add support for Cortex-A720 for AArch64.
  50
  51 * Add support for Cortex-X3 for AArch64.
  52
  53 * Add support for Cortex-X4 for AArch64.
  54
  55 * Add support for RISC-V T-Head extensions (XTheadVector, XTheadZvlsseg
  56   and XTheadZvamo) from version 2.3.0 of the T-Head ISA manual.
  57
  58 * Add support for RISC-V CORE-V extensions (XCVmac, XCValu) with version 1.0.
  59
  60 * Add support for RISC-V SiFive VCIX extension (XSfVcp) with version 1.0.
  61
  62 * The BPF assembler now uses semi-colon (;) to separate statements, and
  63   therefore they cannot longer be used to begin line comments. This matches the
  64   behavior of the clang/LLVM BPF assembler.
  65
  66 * The BPF assembler now allows using both hash (#) and double slash (//) to
  67   begin line comments.
  68
  69 Changes in 2.41:
  70
  71 * Add support for the KVX instruction set.
  72
  73 * Add support for Intel FRED instructions.
  74
  75 * Add support for Intel LKGS instructions.
  76
  77 * Add support for Intel AMX-COMPLEX instructions.
  78
  79 * Add SME2 support to the AArch64 port.
  80
  81 * A new .insn directive is recognized by x86 gas.
  82
  83 * Add support for LoongArch LSX instructions.
  84
  85 * Add support for LoongArch LASX instructions.
  86
  87 * Add support for LoongArch LVZ instructions.
  88
  89 * Add support for LoongArch LBT instructions.
  90
  91 * Initial LoongArch support for linker relaxation has been added.
  92
  93 * Deprecate the LoongArch register aliases $v0, $v1, $x, $fv0 and $fv1.
  94
  95 Changes in 2.40:
  96
  97 * Add support for Intel RAO-INT instructions.
  98
  99 * Add support for Intel AVX-NE-CONVERT instructions.
 100
 101 * Add support for Intel MSRLIST instructions.
 102
 103 * Add support for Intel WRMSRNS instructions.
 104
 105 * Add support for Intel CMPccXADD instructions.
 106
 107 * Add support for Intel AVX-VNNI-INT8 instructions.
 108
 109 * Add support for Intel AVX-IFMA instructions.
 110
 111 * Add support for Intel PREFETCHI instructions.
 112
 113 * Add support for Intel AMX-FP16 instructions.
 114
 115 * gas now supports --compress-debug-sections=zstd to compress
 116   debug sections with zstd.
 117
 118 * Add --enable-default-compressed-debug-sections-algorithm={zlib,zstd}
 119   that selects the default compression algorithm
 120   for --enable-compressed-debug-sections.
 121
 122 * Add support for various T-Head extensions (XTheadBa, XTheadBb, XTheadBs,
 123   XTheadCmo, XTheadCondMov, XTheadFMemIdx, XTheadFmv, XTheadInt, XTheadMemIdx,
 124   XTheadMemPair, XTheadMac, and XTheadSync) from version 2.0 of the T-Head
 125   ISA manual, which are implemented in the Allwinner D1.
 126
 127 * Add support for the RISC-V Zawrs extension, version 1.0-rc4.
 128
 129 * Add support for Cortex-X1C for Arm.
 130
 131 * New command line option --gsframe to generate SFrame unwind information
 132   on x86_64 and aarch64 targets.
 133
 134 Changes in 2.39:
 135
 136 * Remove (rudimentary) support for the x86-64 sub-architectures Intel L1OM and
 137   Intel K1OM.
 138
 139 * Add support for the RISC-V Zicbop, Zicbom, and Zicboz extensions, version
 140   1.0-fd39d01.
 141
 142 * Add support for the RISC-V Zfh extension, version 1.0.
 143
 144 * Add support for the Zhinx extension, version 1.0.0-rc.
 145
 146 * Add support for the RISC-V H extension.
 147
 148 * Add support for the RISC-V Zfhmin extension, version 1.0, and Zhinxmin
 149   extension, version 1.0.0-rc.
 150
 151 Changes in 2.38:
 152
 153 * Add support for AArch64 system registers that were missing in previous
 154   releases.
 155
 156 * Add support for the LoongArch instruction set.
 157
 158 * Add a command-line option, -muse-unaligned-vector-move, for x86 target
 159   to encode aligned vector move as unaligned vector move.
 160
 161 * Add support for Cortex-R52+ for Arm.
 162
 163 * Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64.
 164
 165 * Add support for Cortex-A710 for Arm.
 166
 167 * Add support for Scalable Matrix Extension (SME) for AArch64.
 168
 169 * The --multibyte-handling=[allow|warn|warn-sym-only] option tells the
 170   assembler what to when it encoutners multibyte characters in the input.  The
 171   default is to allow them.  Setting the option to "warn" will generate a
 172   warning message whenever any multibyte character is encountered.  Using the
 173   option to "warn-sym-only" will make the assembler generate a warning whenever a
 174   symbol is defined containing multibyte characters.  (References to undefined
 175   symbols will not generate warnings).
 176
 177 * Outputs of .ds.x directive and .tfloat directive with hex input from
 178   x86 assembler have been reduced from 12 bytes to 10 bytes to match the
 179   output of .tfloat directive.
 180
 181 * Add support for 'armv8.8-a', 'armv9-a', 'armv9.1-a', 'armv9.2-a' and
 182   'armv9.3-a' for -march in AArch64 GAS.
 183
 184 * Add support for 'armv8.7-a', 'armv8.8-a', 'armv9-a', 'armv9.1-a',
 185   'armv9.2-a' and 'armv9.3-a' for -march in Arm GAS.
 186
 187 * Add support for Intel AVX512_FP16 instructions.
 188
 189 * Add support for the RISC-V scalar crypto extension, version 1.0.0.
 190
 191 * Add support for the RISC-V vector extension, version 1.0.
 192
 193 * Add support for the Z{f,d,q}inx extensions, version 1.0.0-rc.
 194
 195 * Add support for the RISC-V svinval extension, version 1.0.
 196
 197 * Add support for the RISC-V hypervisor extension, as defined by Privileged
 198   Specification 1.12.
 199
 200 Changes in 2.37:
 201
 202 * arm-symbianelf support removed.
 203
 204 * Add support for Realm Management Extension (RME) for AArch64.
 205
 206 * Add support for the Zba, Zbb, Zbc, and Zbs subsets of the RISC-V
 207   bit manipulation extension, version 0.93.
 208
 209 Changes in 2.36:
 210
 211 * Add support for Intel AVX VNNI instructions.
 212
 213 * Add support for Intel HRESET instruction.
 214
 215 * Add support for Intel UINTR instructions.
 216
 217 * Support non-absolute segment values for i386 lcall and ljmp.
 218
 219 * When setting the link order attribute of ELF sections, it is now possible to
 220   use a numeric section index instead of symbol name.
 221
 222 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
 223   AArch64 and ARM.
 224   Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
 225
 226 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
 227   Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
 228   Extension) system registers for AArch64.
 229
 230 * Add support for Armv8-R and Armv8.7-A AArch64.
 231
 232 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
 233   AArch64.
 234
 235 * Add support for +flagm feature for -march in Armv8.4 AArch64.
 236
 237 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
 238   64-byte load/store instructions for this feature.
 239
 240 * Add support for +pauth (Pointer Authentication) feature for -march in
 241   AArch64.
 242
 243 * Add support for Intel TDX instructions.
 244
 245 * Add support for Intel Key Locker instructions.
 246
 247 * Added a .nop directive to generate a single no-op instruction in a target
 248   neutral manner.  This instruction does have an effect on DWARF line number
 249   generation, if that is active.
 250
 251 * Removed --reduce-memory-overheads and --hash-size as gas now
 252   uses hash tables that can be expand and shrink automatically.
 253
 254 * Add {disp16} pseudo prefix to x86 assembler.
 255
 256 * Add support for Intel AMX instructions.
 257
 258 * Configure with --enable-x86-used-note by default for Linux/x86.
 259
 260 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
 261   sections using the 'R' flag in the .section directive.
 262   SHF_GNU_RETAIN specifies that the section should not be garbage
 263   collected by the linker.  It requires the GNU or FreeBSD ELF OSABIs.
 264
 265 * Add support for the RISC-V Zihintpause extension.
 266
 267 Changes in 2.35:
 268
 269 * X86 NaCl target support is removed.
 270
 271 * Extend .symver directive to update visibility of the original symbol
 272   and assign one original symbol to different versioned symbols.
 273
 274 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
 275
 276 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
 277   -mlfence-before-ret= options to x86 assembler to help mitigate
 278   CVE-2020-0551.
 279
 280 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
 281   (if such output is being generated).  Added the ability to generate
 282   version 5 .debug_line sections.
 283
 284 * Add -mbig-obj support to i386 MingW targets.
 285
 286 * Add support for the -mriscv-isa-version argument, to select the version of
 287   the RISC-V ISA specification used when assembling.
 288
 289 * Remove support for the RISC-V privileged specification, version 1.9.
 290
 291 Changes in 2.34:
 292
 293 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
 294   -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
 295   options to x86 assembler to align branches within a fixed boundary
 296   with segment prefixes or NOPs.
 297
 298 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
 299
 300 * Add support for z80-elf target.
 301
 302 * Add support for relocation of each byte or word of multibyte value to Z80
 303   targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
 304   with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
 305
 306 * Add SDCC support for Z80 targets.
 307
 308 Changes in 2.33:
 309
 310 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
 311   instructions.
 312
 313 * Add support for the Arm Transactional Memory Extension (TME)
 314   instructions.
 315
 316 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
 317   instructions.
 318
 319 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
 320   LLSC Errata.  Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
 321   time option to set the default behavior. Set the default if the configure
 322   option is not used to "no".
 323
 324 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
 325   processors.
 326
 327 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
 328   Cortex-A76AE, and Cortex-A77 processors.
 329
 330 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
 331   floating point literals.  Add .float16_format directive and
 332   -mfp16-format=[ieee|alternative] option for Arm to control the format of the
 333   encoding.
 334
 335 * Add --gdwarf-cie-version command line flag.  This allows control over which
 336   version of DWARF CIE the assembler creates.
 337
 338 Changes in 2.32:
 339
 340 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
 341   VEX.W-ignored (WIG) VEX instructions.
 342
 343 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
 344   notes.  Add a --enable-x86-used-note configure time option to set the
 345   default behavior.  Set the default if the configure option is not used
 346   to "no".
 347
 348 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
 349
 350 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
 351
 352 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
 353
 354 * Add support for the C-SKY processor series.
 355
 356 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
 357   ASE.
 358
 359 Changes in 2.31:
 360
 361 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
 362   now only set the bottom bit of the address of thumb function symbols
 363   if the -mthumb-interwork command line option is active.
 364
 365 * Add support for the MIPS Global INValidate (GINV) ASE.
 366
 367 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
 368
 369 * Add support for the Freescale S12Z architecture.
 370
 371 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
 372   Build Attribute notes if none are present in the input sources.  Add a
 373   --enable-generate-build-notes=[yes|no] configure time option to set the
 374   default behaviour.  Set the default if the configure option is not used
 375   to "no".
 376
 377 * Remove -mold-gcc command-line option for x86 targets.
 378
 379 * Add -O[2|s] command-line options to x86 assembler to enable alternate
 380   shorter instruction encoding.
 381
 382 * Add support for .nops directive.  It is currently supported only for
 383   x86 targets.
 384
 385 * Add support for the .insn directive on RISC-V targets.
 386
 387 Changes in 2.30:
 388
 389 * Add support for loaction views in DWARF debug line information.
 390
 391 Changes in 2.29:
 392
 393 * Add support for ELF SHF_GNU_MBIND.
 394
 395 * Add support for the WebAssembly file format and wasm32 ELF conversion.
 396
 397 * PowerPC gas now checks that the correct register class is used in
 398   instructions.  For instance, "addi %f4,%cr3,%r31" warns three times
 399   that the registers are invalid.
 400
 401 * Add support for the Texas Instruments PRU processor.
 402
 403 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
 404   added to the ARM port.
 405
 406 Changes in 2.28:
 407
 408 * Add support for the RISC-V architecture.
 409
 410 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
 411
 412 Changes in 2.27:
 413
 414 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
 415
 416 * Add --no-pad-sections to stop the assembler from padding the end of output
 417   sections up to their alignment boundary.
 418
 419 * Support for the ARMv8-M architecture has been added to the ARM port.  Support
 420   for the ARMv8-M Security and DSP Extensions has also been added to the ARM
 421   port.
 422
 423 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
 424   .extCoreRegister pseudo-ops that allow an user to define custom
 425   instructions, conditional codes, auxiliary and core registers.
 426
 427 * Add a configure option --enable-elf-stt-common to decide whether ELF
 428   assembler should generate common symbols with the STT_COMMON type by
 429   default.  Default to no.
 430
 431 * New command-line option --elf-stt-common= for ELF targets to control
 432   whether to generate common symbols with the STT_COMMON type.
 433
 434 * Add ability to set section flags and types via numeric values for ELF
 435   based targets.
 436
 437 * Add a configure option --enable-x86-relax-relocations to decide whether
 438   x86 assembler should generate relax relocations by default.  Default to
 439   yes, except for x86 Solaris targets older than Solaris 12.
 440
 441 * New command-line option -mrelax-relocations= for x86 target to control
 442   whether to generate relax relocations.
 443
 444 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
 445   lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
 446
 447 * Add assembly-time relaxation option for ARC cpus.
 448
 449 * Add --with-cpu=TYPE configure option for ARC gas.  This allows the default
 450   cpu type to be adjusted at configure time.
 451
 452 Changes in 2.26:
 453
 454 * Add a configure option --enable-compressed-debug-sections={all,gas} to
 455   decide whether DWARF debug sections should be compressed by default.
 456
 457 * Add support for the ARC EM/HS, and ARC600/700 architectures.  Remove
 458   assembler support for Argonaut RISC architectures.
 459
 460 * Symbol and label names can now be enclosed in double quotes (") which allows
 461   them to contain characters that are not part of valid symbol names in high
 462   level languages.
 463
 464 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support.  The
 465   previous spelling, -march=armv6zk, is still accepted.
 466
 467 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
 468   Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
 469   extensions has also been added to the Aarch64 port.
 470
 471 * Support for the ARMv8.1 architecture has been added to the ARM port.  Support
 472   for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
 473   been added to the ARM port.
 474
 475 * Extend --compress-debug-sections option to support
 476   --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
 477   targets.
 478
 479 * --compress-debug-sections is turned on for Linux/x86 by default.
 480
 481 Changes in 2.25:
 482
 483 * Add support for the AVR Tiny microcontrollers.
 484
 485 * Replace support for openrisc and or32 with support for or1k.
 486
 487 * Enhanced the ARM port to accept the assembler output from the CodeComposer
 488   Studio tool.  Support is enabled via the new command-line option -mccs.
 489
 490 * Add support for the Andes NDS32.
 491
 492 Changes in 2.24:
 493
 494 * Add support for the Texas Instruments MSP430X processor.
 495
 496 * Add -gdwarf-sections command-line option to enable per-code-section
 497   generation of DWARF .debug_line sections.
 498
 499 * Add support for Altera Nios II.
 500
 501 * Add support for the Imagination Technologies Meta processor.
 502
 503 * Add support for the v850e3v5.
 504
 505 * Remove assembler support for MIPS ECOFF targets.
 506
 507 Changes in 2.23:
 508
 509 * Add support for the 64-bit ARM architecture: AArch64.
 510
 511 * Add support for S12X processor.
 512
 513 * Add support for the VLE extension to the PowerPC architecture.
 514
 515 * Add support for the Freescale XGATE architecture.
 516
 517 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
 518   directives.  These are currently available only for x86 and ARM targets.
 519
 520 * Add support for the Renesas RL78 architecture.
 521
 522 * Add support for the Adapteva EPIPHANY architecture.
 523
 524 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
 525
 526 Changes in 2.22:
 527
 528 * Add support for the Tilera TILEPro and TILE-Gx architectures.
 529
 530 Changes in 2.21:
 531
 532 * Gas no longer requires doubling of ampersands in macros.
 533
 534 * Add support for the TMS320C6000 (TI C6X) processor family.
 535
 536 * GAS now understands an extended syntax in the .section directive flags
 537   for COFF targets that allows the section's alignment to be specified.  This
 538   feature has also been backported to the 2.20 release series, starting with
 539   2.20.1.
 540
 541 * Add support for the Renesas RX processor.
 542
 543 * New command-line option, --compress-debug-sections, which requests
 544   compression of DWARF debug information sections in the relocatable output
 545   file.  Compressed debug sections are supported by readelf, objdump, and
 546   gold, but not currently by Gnu ld.
 547
 548 Changes in 2.20:
 549
 550 * Added support for v850e2 and v850e2v3.
 551
 552 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
 553   pseudo op.  It marks the symbol as being globally unique in the entire
 554   process.
 555
 556 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
 557   in binary rather than text.
 558
 559 * Add support for common symbol alignment to PE formats.
 560
 561 * Add support for the new discriminator column in the DWARF line table,
 562   with a discriminator operand for the .loc directive.
 563
 564 * Add support for Sunplus score architecture.
 565
 566 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
 567   indicate that if the symbol is the target of a relocation, its value should
 568   not be use.  Instead the function should be invoked and its result used as
 569   the value.
 570
 571 * Add support for Lattice Mico32 (lm32) architecture.
 572
 573 * Add support for Xilinx MicroBlaze architecture.
 574
 575 Changes in 2.19:
 576
 577 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
 578   tables without runtime relocation.
 579
 580 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
 581   adds compatibility with H'00 style hex constants.
 582
 583 * New command-line option, -msse-check=[none|error|warning], for x86
 584   targets.
 585
 586 * New sub-option added to the assembler's -a command-line switch to
 587   generate a listing output.  The 'g' sub-option will insert into the listing
 588   various information about the assembly, such as assembler version, the
 589   command-line options used, and a time stamp.
 590
 591 * New command-line option -msse2avx for x86 target to encode SSE
 592   instructions with VEX prefix.
 593
 594 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
 595
 596 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
 597   -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
 598   -mnaked-reg and -mold-gcc, for x86 targets.
 599
 600 * Support for generating wide character strings has been added via the new
 601   pseudo ops: .string16, .string32 and .string64.
 602
 603 * Support for SSE5 has been added to the i386 port.
 604
 605 Changes in 2.18:
 606
 607 * The GAS sources are now released under the GPLv3.
 608
 609 * Support for the National Semiconductor CR16 target has been added.
 610
 611 * Added gas .reloc pseudo.  This is a low-level interface for creating
 612   relocations.
 613
 614 * Add support for x86_64 PE+ target.
 615
 616 * Add support for Score target.
 617
 618 Changes in 2.17:
 619
 620 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
 621
 622 * Support for ms2 architecture has been added.
 623
 624 * Support for the Z80 processor family has been added.
 625
 626 * Add support for the "@<file>" syntax to the command line, so that extra
 627   switches can be read from <file>.
 628
 629 * The SH target supports a new command-line switch --enable-reg-prefix which,
 630   if enabled, will allow register names to be optionally prefixed with a $
 631   character.  This allows register names to be distinguished from label names.
 632
 633 * Macros with a variable number of arguments are now supported. See the
 634   documentation for how this works.
 635
 636 * Added --reduce-memory-overheads switch to reduce the size of the hash
 637   tables used, at the expense of longer assembly times, and
 638   --hash-size=<NUMBER> to set the size of the hash tables used by gas.
 639
 640 * Macro names and macro parameter names can now be any identifier that would
 641   also be legal as a symbol elsewhere. For macro parameter names, this is
 642   known to cause problems in certain sources when the respective target uses
 643   characters inconsistently, and thus macro parameter references may no longer
 644   be recognized as such (see the documentation for details).
 645
 646 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
 647   for the VAX target in order to be more compatible with the VAX MACRO
 648   assembler.
 649
 650 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
 651
 652 Changes in 2.16:
 653
 654 * Redefinition of macros now results in an error.
 655
 656 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
 657
 658 * New command-line option -munwind-check=[warning|error] for IA64
 659   targets.
 660
 661 * The IA64 port now uses automatic dependency violation removal as its default
 662   mode.
 663
 664 * Port to MAXQ processor contributed by HCL Tech.
 665
 666 * Added support for generating unwind tables for ARM ELF targets.
 667
 668 * Add a -g command-line option to generate debug information in the target's
 669   preferred debug format.
 670
 671 * Support for the crx-elf target added.
 672
 673 * Support for the sh-symbianelf target added.
 674
 675 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
 676   on pe[i]-i386; required for this target's DWARF 2 support.
 677
 678 * Support for Motorola MCF521x/5249/547x/548x added.
 679
 680 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
 681   instrucitons.
 682
 683 * New command-line option -mno-shared for MIPS ELF targets.
 684
 685 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
 686   added to enter (and leave) alternate macro syntax mode.
 687
 688 Changes in 2.15:
 689
 690 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
 691   deprecated and will be removed in a future release.
 692
 693 * Added PIC m32r Linux (ELF) and support to M32R assembler.
 694
 695 * Added support for ARM V6.
 696
 697 * Added support for sh4a and variants.
 698
 699 * Support for Renesas M32R2 added.
 700
 701 * Limited support for Mapping Symbols as specified in the ARM ELF
 702   specification has been added to the arm assembler.
 703
 704 * On ARM architectures, added a new gas directive ".unreq" that undoes
 705   definitions created by ".req".
 706
 707 * Support for Motorola ColdFire MCF528x added.
 708
 709 * Added --gstabs+ switch to enable the generation of STABS debug format
 710   information with GNU extensions.
 711
 712 * Added support for MIPS64 Release 2.
 713
 714 * Added support for v850e1.
 715
 716 * Added -n switch for x86 assembler.  By default, x86 GAS replaces
 717   multiple nop instructions used for alignment within code sections
 718   with multi-byte nop instructions such as leal 0(%esi,1),%esi.  This
 719   switch disables the optimization.
 720
 721 * Removed -n option from MIPS assembler.  It was not useful, and confused the
 722   existing -non_shared option.
 723
 724 Changes in 2.14:
 725
 726 * Added support for MIPS32 Release 2.
 727
 728 * Added support for Xtensa architecture.
 729
 730 * Support for Intel's iWMMXt processor (an ARM variant) added.
 731
 732 * An assembler test generator has been contributed and an example file that
 733   uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
 734
 735 * Support for SH2E added.
 736
 737 * GASP has now been removed.
 738
 739 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
 740   DSP's contributed by Michael Hayes and Svein E. Seldal.
 741
 742 * Support for the Ubicom IP2xxx microcontroller added.
 743
 744 Changes in 2.13:
 745
 746 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
 747   and FR500 included.
 748
 749 * Support for DLX processor added.
 750
 751 * GASP has now been deprecated and will be removed in a future release.  Use
 752   the macro facilities in GAS instead.
 753
 754 * GASP now correctly parses floating point numbers. Unless the base is
 755   explicitly specified, they are interpreted as decimal numbers regardless of
 756   the currently specified base.
 757
 758 Changes in 2.12:
 759
 760 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
 761
 762 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
 763
 764 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
 765   specifying the target instruction set.  The old method of specifying the
 766   target processor has been deprecated, but is still accepted for
 767   compatibility.
 768
 769 * Support for the VFP floating-point instruction set has been added to
 770   the ARM assembler.
 771
 772 * New psuedo op: .incbin to include a set of binary data at a given point
 773   in the assembly.  Contributed by Anders Norlander.
 774
 775 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
 776   but still works for compatability.
 777
 778 * The MIPS assembler no longer issues a warning by default when it
 779   generates a nop instruction from a macro. The new command-line option
 780   -n will turn on the warning.
 781
 782 Changes in 2.11:
 783
 784 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
 785
 786 * x86 gas now supports the full Pentium4 instruction set.
 787
 788 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
 789
 790 * Support for Motorola 68HC11 and 68HC12.
 791
 792 * Support for Texas Instruments TMS320C54x (tic54x).
 793
 794 * Support for IA-64.
 795
 796 * Support for i860, by Jason Eckhardt.
 797
 798 * Support for CRIS (Axis Communications ETRAX series).
 799
 800 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
 801
 802 * x86 gas -q command-line option quietens warnings about register size changes
 803   due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
 804   translating various deprecated floating point instructions.
 805
 806 Changes in 2.10:
 807
 808 * Support for the ARM msr instruction was changed to only allow an immediate
 809   operand when altering the flags field.
 810
 811 * Support for ATMEL AVR.
 812
 813 * Support for IBM 370 ELF.  Somewhat experimental.
 814
 815 * Support for numbers with suffixes.
 816
 817 * Added support for breaking to the end of repeat loops.
 818
 819 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
 820
 821 * New .elseif pseudo-op added.
 822
 823 * New --fatal-warnings option.
 824
 825 * picoJava architecture support added.
 826
 827 * Motorola MCore 210 processor support added.
 828
 829 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
 830   assembly programs with intel syntax.
 831
 832 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
 833
 834 * Added -gdwarf2 option to generate DWARF 2 debugging information.
 835
 836 * Full 16-bit mode support for i386.
 837
 838 * Greatly improved instruction operand checking for i386.  This change will
 839   produce errors or warnings on incorrect assembly code that previous versions
 840   of gas accepted.  If you get unexpected messages from code that worked with
 841   older versions of gas, please double check the code before reporting a bug.
 842
 843 * Weak symbol support added for COFF targets.
 844
 845 * Mitsubishi D30V support added.
 846
 847 * Texas Instruments c80 (tms320c80) support added.
 848
 849 * i960 ELF support added.
 850
 851 * ARM ELF support added.
 852
 853 Changes in 2.9:
 854
 855 * Texas Instruments c30 (tms320c30) support added.
 856
 857 * The assembler now optimizes the exception frame information generated by egcs
 858   and gcc 2.8.  The new --traditional-format option disables this optimization.
 859
 860 * Added --gstabs option to generate stabs debugging information.
 861
 862 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
 863   listing.
 864
 865 * Added -MD option to print dependencies.
 866
 867 Changes in 2.8:
 868
 869 * BeOS support added.
 870
 871 * MIPS16 support added.
 872
 873 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
 874
 875 * Alpha/VMS support added.
 876
 877 * m68k options --base-size-default-16, --base-size-default-32,
 878   --disp-size-default-16, and --disp-size-default-32 added.
 879
 880 * The alignment directives now take an optional third argument, which is the
 881   maximum number of bytes to skip.  If doing the alignment would require
 882   skipping more than the given number of bytes, the alignment is not done at
 883   all.
 884
 885 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
 886
 887 * The -a option takes a new suboption, c (e.g., -alc), to skip false
 888   conditionals in listings.
 889
 890 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
 891   the symbol is already defined.
 892
 893 Changes in 2.7:
 894
 895 * The PowerPC assembler now allows the use of symbolic register names (r0,
 896   etc.) if -mregnames is used.  Symbolic names preceded by a '%' (%r0, etc.)
 897   can be used any time.  PowerPC 860 move to/from SPR instructions have been
 898   added.
 899
 900 * Alpha Linux (ELF) support added.
 901
 902 * PowerPC ELF support added.
 903
 904 * m68k Linux (ELF) support added.
 905
 906 * i960 Hx/Jx support added.
 907
 908 * i386/PowerPC gnu-win32 support added.
 909
 910 * SCO ELF support added.  For OpenServer 5 targets (i386-unknown-sco3.2v5) the
 911   default is to build COFF-only support.  To get a set of tools that generate
 912   ELF (they'll understand both COFF and ELF), you must configure with
 913   target=i386-unknown-sco3.2v5elf.
 914
 915 * m88k-motorola-sysv3* support added.
 916
 917 Changes in 2.6:
 918
 919 * Gas now directly supports macros, without requiring GASP.
 920
 921 * Gas now has an MRI assembler compatibility mode.  Use -M or --mri to select
 922   MRI mode.  The pseudo-op ``.mri 1'' will switch into the MRI mode until the
 923   ``.mri 0'' is seen; this can be convenient for inline assembler code.
 924
 925 * Added --defsym SYM=VALUE option.
 926
 927 * Added -mips4 support to MIPS assembler.
 928
 929 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
 930
 931 Changes in 2.4:
 932
 933 * Converted this directory to use an autoconf-generated configure script.
 934
 935 * ARM support, from Richard Earnshaw.
 936
 937 * Updated VMS support, from Pat Rankin, including considerably improved
 938   debugging support.
 939
 940 * Support for the control registers in the 68060.
 941
 942 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
 943   provide for possible future gcc changes, for targets where gas provides some
 944   features not available in the native assembler.  If the native assembler is
 945   used, it should become obvious pretty quickly what the problem is.
 946
 947 * Usage message is available with "--help".
 948
 949 * The GNU Assembler Preprocessor (gasp) is included.  (Actually, it was in 2.3
 950   also, but didn't get into the NEWS file.)
 951
 952 * Weak symbol support for a.out.
 953
 954 * A bug in the listing code which could cause an infinite loop has been fixed.
 955   Bugs in listings when generating a COFF object file have also been fixed.
 956
 957 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
 958   Paul Kranenburg.
 959
 960 * Improved Alpha support.  Immediate constants can have a much larger range
 961   now. Support for the 21164 has been contributed by Digital.
 962
 963 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
 964
 965 Changes in 2.3:
 966
 967 * Mach i386 support, by David Mackenzie and Ken Raeburn.
 968
 969 * RS/6000 and PowerPC support by Ian Taylor.
 970
 971 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
 972   based on mail received from various people.  The `-h#' option should work
 973   again too.
 974
 975 * HP-PA work, by Jeff Law.  Note, for the PA, gas-2.3 has been designed to work
 976   with gdb-4.12 and gcc-2.6.  As gcc-2.6 has not been released yet, a special
 977   version of gcc-2.5.8 has been patched to work with gas-2.3.  You can retrieve
 978   this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
 979   in the "dist" directory.
 980
 981 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
 982   simple tests okay.  I haven't put it through extensive testing.  (GNU make is
 983   currently required for BSD 4.3 builds.)
 984
 985 * Support for the DEC Alpha, running OSF/1 (ECOFF format).  The gas support is
 986   based on code donated by CMU, which used an a.out-based format.  I'm afraid
 987   the alpha-a.out support is pretty badly mangled, and much of it removed;
 988   making it work will require rewriting it as BFD support for the format anyways.
 989
 990 * Irix 5 support.
 991
 992 * The test suites have been fixed up a bit, so that they should work with a
 993   couple different versions of expect and dejagnu.
 994
 995 * Symbols' values are now handled internally as expressions, permitting more
 996   flexibility in evaluating them in some cases.  Some details of relocation
 997   handling have also changed, and simple constant pool management has been
 998   added, to make the Alpha port easier.
 999
1000 * New option "--statistics" for printing out program run times.  This is
1001   intended to be used with the gcc "-Q" option, which prints out times spent in
1002   various phases of compilation.  (You should be able to get all of them
1003   printed out with "gcc -Q -Wa,--statistics", I think.)
1004
1005 Changes in 2.2:
1006
1007 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
1008
1009 * Configurations that are still in development (and therefore are convenient to
1010   have listed in configure.in) still get rejected without a minor change to
1011   gas/Makefile.in, so people not doing development work shouldn't get the
1012   impression that support for such configurations is actually believed to be
1013   reliable.
1014
1015 * The program name (usually "as") is printed when a fatal error message is
1016   displayed.  This should prevent some confusion about the source of occasional
1017   messages about "internal errors".
1018
1019 * ELF support is falling into place.  Support for the 386 should be working.
1020   Support for SPARC Solaris is in.  HPPA support from Utah is being integrated.
1021
1022 * Symbol values are maintained as expressions instead of being immediately
1023   boiled down to add-symbol, sub-symbol, and constant.  This permits slightly
1024   more complex calculations involving symbols whose values are not alreadey
1025   known.
1026
1027 * DBX-style debugging info ("stabs") is now supported for COFF formats.
1028   If any stabs directives are seen in the source, GAS will create two new
1029   sections: a ".stab" and a ".stabstr" section.  The format of the .stab
1030   section is nearly identical to the a.out symbol format, and .stabstr is
1031   its string table.  For this to be useful, you must have configured GCC
1032   to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
1033   that can use the stab sections (4.11 or later).
1034
1035 * LynxOS, on i386 and m68k platforms, is now supported.  SPARC LynxOS
1036   support is in progress.
1037
1038 Changes in 2.1:
1039
1040 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
1041   incorporated, but not well tested yet.
1042
1043 * Altered the opcode table split for m68k; it should require less VM to compile
1044   with gcc now.
1045
1046 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
1047   suggested by Ronald Cole.
1048
1049 * HPPA support (running OSF only, not HPUX) has been contributed by Utah.  This
1050   includes improved ELF support, which I've started adapting for SPARC Solaris
1051   2.x.  Integration isn't completely, so it probably won't work.
1052
1053 * HP9000/300 support, donated by HP, has been merged in.
1054
1055 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
1056
1057 * Better error messages for unsupported configurations (e.g., hppa-hpux).
1058
1059 * Test suite framework is starting to become reasonable.
1060
1061 Changes in 2.0:
1062
1063 * Mostly bug fixes.
1064
1065 * Some more merging of BFD and ELF code, but ELF still doesn't work.
1066
1067 Changes in 1.94:
1068
1069 * BFD merge is partly done.  Adventurous souls may try giving configure the
1070   "--with-bfd-assembler" option.  Currently, ELF format requires it, a.out
1071   format accepts it; SPARC CPU accepts it.  It's the default only for OS "elf"
1072   or "solaris".  (ELF isn't really supported yet.  It needs work.  I've got
1073   some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
1074   fully merged yet.)
1075
1076 * The 68K opcode table has been split in half.  It should now compile under gcc
1077   without consuming ridiculous amounts of memory.
1078
1079 * A couple data structures have been reduced in size.  This should result in
1080   saving a little bit of space at runtime.
1081
1082 * Support for MIPS, from OSF and Ralph Campbell, has been merged in.  The OSF
1083   code provided ROSE format support, which I haven't merged in yet.  (I can
1084   make it available, if anyone wants to try it out.)  Ralph's code, for BSD
1085   4.4, supports a.out format.  We don't have ECOFF support in just yet; it's
1086   coming.
1087
1088 * Support for the Hitachi H8/500 has been added.
1089
1090 * VMS host and target support should be working now, thanks chiefly to Eric
1091   Youngdale.
1092
1093 Changes in 1.93.01:
1094
1095 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
1096
1097 * For i386, .align is now power-of-two; was number-of-bytes.
1098
1099 * For m68k, "%" is now accepted before register names.  For COFF format, which
1100   doesn't use underscore prefixes for C labels, it is required, so variable "a0"
1101   can be distinguished from the register.
1102
1103 * Last public release was 1.38.  Lots of configuration changes since then, lots
1104   of new CPUs and formats, lots of bugs fixed.
1105
1106 \f
1107 Copyright (C) 2012-2024 Free Software Foundation, Inc.
1108
1109 Copying and distribution of this file, with or without modification,
1110 are permitted in any medium without royalty provided the copyright
1111 notice and this notice are preserved.
1112
1113 Local variables:
1114 fill-column: 79
1115 End: