gas/config/tc-lm32.c

   1 /* tc-lm32.c - Lattice Mico32 assembler.
   2    Copyright (C) 2008-2021 Free Software Foundation, Inc.
   3    Contributed by Jon Beniston <jon@beniston.com>
   4
   5    This file is part of GAS, the GNU Assembler.
   6
   7    GAS is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2, or (at your option)
  10    any later version.
  11
  12    GAS is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License along
  18    with GAS; see the file COPYING.  If not, write to the Free Software
  19    Foundation, 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22 #include "as.h"
  23 #include <string.h>
  24 #include <stdlib.h>
  25 #include "safe-ctype.h"
  26 #include "subsegs.h"
  27 #include "bfd.h"
  28 #include "safe-ctype.h"
  29 #include "opcodes/lm32-desc.h"
  30 #include "opcodes/lm32-opc.h"
  31 #include "cgen.h"
  32 #include "elf/lm32.h"
  33
  34 typedef struct
  35 {
  36   const CGEN_INSN *insn;
  37   const CGEN_INSN *orig_insn;
  38   CGEN_FIELDS fields;
  39 #if CGEN_INT_INSN_P
  40   CGEN_INSN_INT buffer [1];
  41 #define INSN_VALUE(buf) (*(buf))
  42 #else
  43   unsigned char buffer[CGEN_MAX_INSN_SIZE];
  44 #define INSN_VALUE(buf) (buf)
  45 #endif
  46   char *addr;
  47   fragS *frag;
  48   int num_fixups;
  49   fixS *fixups[GAS_CGEN_MAX_FIXUPS];
  50   int indices[MAX_OPERAND_INSTANCES];
  51 } lm32_insn;
  52
  53 /* Configuration options */
  54
  55 #define LM_CFG_MULTIPLIY_ENABLED        0x0001
  56 #define LM_CFG_DIVIDE_ENABLED           0x0002
  57 #define LM_CFG_BARREL_SHIFT_ENABLED     0x0004
  58 #define LM_CFG_SIGN_EXTEND_ENABLED      0x0008
  59 #define LM_CFG_USER_ENABLED             0x0010
  60 #define LM_CFG_ICACHE_ENABLED           0x0020
  61 #define LM_CFG_DCACHE_ENABLED           0x0040
  62 #define LM_CFG_BREAK_ENABLED            0x0080
  63
  64 static unsigned config = 0U;
  65
  66 /* Target specific assembler tokens / delimiters.  */
  67
  68 const char comment_chars[]        = "#";
  69 const char line_comment_chars[]   = "#";
  70 const char line_separator_chars[] = ";";
  71 const char EXP_CHARS[]            = "eE";
  72 const char FLT_CHARS[]            = "dD";
  73
  74 /* Target specific assembly directives.  */
  75
  76 const pseudo_typeS md_pseudo_table[] =
  77 {
  78   { "align",   s_align_bytes,       0 },
  79   { "byte",    cons,                1 },
  80   { "hword",   cons,                2 },
  81   { "word",    cons,                4 },
  82   { "dword",   cons,                8 },
  83   {(char *)0 , (void(*)(int))0,     0}
  84 };
  85
  86 /* Target specific command line options.  */
  87
  88 const char * md_shortopts = "";
  89
  90 struct option md_longopts[] =
  91 {
  92 #define OPTION_MULTIPLY_ENABLED         (OPTION_MD_BASE + 1)
  93   { "mmultiply-enabled",            no_argument, NULL, OPTION_MULTIPLY_ENABLED },
  94 #define OPTION_DIVIDE_ENABLED           (OPTION_MD_BASE + 2)
  95   { "mdivide-enabled",              no_argument, NULL, OPTION_DIVIDE_ENABLED },
  96 #define OPTION_BARREL_SHIFT_ENABLED     (OPTION_MD_BASE + 3)
  97   { "mbarrel-shift-enabled",        no_argument, NULL, OPTION_BARREL_SHIFT_ENABLED },
  98 #define OPTION_SIGN_EXTEND_ENABLED      (OPTION_MD_BASE + 4)
  99   { "msign-extend-enabled",         no_argument, NULL, OPTION_SIGN_EXTEND_ENABLED },
 100 #define OPTION_USER_ENABLED             (OPTION_MD_BASE + 5)
 101   { "muser-enabled",                no_argument, NULL, OPTION_USER_ENABLED },
 102 #define OPTION_ICACHE_ENABLED           (OPTION_MD_BASE + 6)
 103   { "micache-enabled",              no_argument, NULL, OPTION_ICACHE_ENABLED },
 104 #define OPTION_DCACHE_ENABLED           (OPTION_MD_BASE + 7)
 105   { "mdcache-enabled",              no_argument, NULL, OPTION_DCACHE_ENABLED },
 106 #define OPTION_BREAK_ENABLED            (OPTION_MD_BASE + 8)
 107   { "mbreak-enabled",               no_argument, NULL, OPTION_BREAK_ENABLED },
 108 #define OPTION_ALL_ENABLED              (OPTION_MD_BASE + 9)
 109   { "mall-enabled",                 no_argument, NULL, OPTION_ALL_ENABLED },
 110 };
 111
 112 size_t md_longopts_size = sizeof (md_longopts);
 113
 114 /* Display architecture specific options.  */
 115
 116 void
 117 md_show_usage (FILE * fp)
 118 {
 119   fprintf (fp, "LM32 specific options:\n"
 120         "  -mmultiply-enabled          enable multiply instructions\n"
 121         "  -mdivide-enabled            enable divide and modulus instructions\n"
 122         "  -mbarrel-shift-enabled      enable multi-bit shift instructions\n"
 123         "  -msign-extend-enabled       enable sign-extension instructions\n"
 124         "  -muser-enabled              enable user-defined instructions\n"
 125         "  -micache-enabled            enable instruction cache instructions\n"
 126         "  -mdcache-enabled            enable data cache instructions\n"
 127         "  -mbreak-enabled             enable the break instruction\n"
 128         "  -mall-enabled               enable all optional instructions\n"
 129         );
 130 }
 131
 132 /* Parse command line options.  */
 133
 134 int
 135 md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
 136 {
 137   switch (c)
 138     {
 139       case OPTION_MULTIPLY_ENABLED:
 140         config |= LM_CFG_MULTIPLIY_ENABLED;
 141         break;
 142       case OPTION_DIVIDE_ENABLED:
 143         config |= LM_CFG_DIVIDE_ENABLED;
 144         break;
 145       case OPTION_BARREL_SHIFT_ENABLED:
 146         config |= LM_CFG_BARREL_SHIFT_ENABLED;
 147         break;
 148       case OPTION_SIGN_EXTEND_ENABLED:
 149         config |= LM_CFG_SIGN_EXTEND_ENABLED;
 150         break;
 151       case OPTION_USER_ENABLED:
 152         config |= LM_CFG_USER_ENABLED;
 153         break;
 154       case OPTION_ICACHE_ENABLED:
 155         config |= LM_CFG_ICACHE_ENABLED;
 156         break;
 157       case OPTION_DCACHE_ENABLED:
 158         config |= LM_CFG_DCACHE_ENABLED;
 159         break;
 160       case OPTION_BREAK_ENABLED:
 161         config |= LM_CFG_BREAK_ENABLED;
 162         break;
 163       case OPTION_ALL_ENABLED:
 164         config |= LM_CFG_MULTIPLIY_ENABLED;
 165         config |= LM_CFG_DIVIDE_ENABLED;
 166         config |= LM_CFG_BARREL_SHIFT_ENABLED;
 167         config |= LM_CFG_SIGN_EXTEND_ENABLED;
 168         config |= LM_CFG_USER_ENABLED;
 169         config |= LM_CFG_ICACHE_ENABLED;
 170         config |= LM_CFG_DCACHE_ENABLED;
 171         config |= LM_CFG_BREAK_ENABLED;
 172         break;
 173       default:
 174         return 0;
 175     }
 176   return 1;
 177 }
 178
 179 /* Do any architecture specific initialisation.  */
 180
 181 void
 182 md_begin (void)
 183 {
 184   /* Initialize the `cgen' interface.  */
 185
 186   /* Set the machine number and endian.  */
 187   gas_cgen_cpu_desc = lm32_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
 188                                            CGEN_CPU_OPEN_ENDIAN,
 189                                            CGEN_ENDIAN_BIG,
 190                                            CGEN_CPU_OPEN_END);
 191   lm32_cgen_init_asm (gas_cgen_cpu_desc);
 192
 193   /* This is a callback from cgen to gas to parse operands.  */
 194   cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
 195
 196   if (! bfd_set_arch_mach (stdoutput, bfd_arch_lm32, bfd_mach_lm32))
 197     as_warn (_("could not set architecture and machine"));
 198 }
 199
 200 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
 201    for use in the a.out file, and stores them in the array pointed to by buf. */
 202
 203 void
 204 md_number_to_chars (char * buf, valueT val, int n)
 205 {
 206   if (target_big_endian)
 207     number_to_chars_bigendian (buf, val, n);
 208   else
 209     number_to_chars_littleendian (buf, val, n);
 210 }
 211
 212 /* Turn a string in input_line_pointer into a floating point constant
 213    of type TYPE, and store the appropriate bytes in *LITP.  The number
 214    of LITTLENUMS emitted is stored in *SIZEP.  An error message is
 215    returned, or NULL on OK.  */
 216
 217 const char *
 218 md_atof (int type, char *litP, int *sizeP)
 219 {
 220   int i;
 221   int prec;
 222   LITTLENUM_TYPE words[4];
 223
 224   char *t;
 225
 226   switch (type)
 227     {
 228     case 'f':
 229       prec = 2;
 230       break;
 231     case 'd':
 232       prec = 4;
 233       break;
 234     default:
 235       *sizeP = 0;
 236       return _("bad call to md_atof");
 237     }
 238
 239   t = atof_ieee (input_line_pointer, type, words);
 240   if (t)
 241     input_line_pointer = t;
 242
 243   *sizeP = prec * sizeof (LITTLENUM_TYPE);
 244
 245   if (target_big_endian)
 246     {
 247       for (i = 0; i < prec; i++)
 248         {
 249           md_number_to_chars (litP, (valueT) words[i],
 250                               sizeof (LITTLENUM_TYPE));
 251           litP += sizeof (LITTLENUM_TYPE);
 252         }
 253     }
 254   else
 255     {
 256       for (i = prec - 1; i >= 0; i--)
 257         {
 258           md_number_to_chars (litP, (valueT) words[i],
 259                               sizeof (LITTLENUM_TYPE));
 260           litP += sizeof (LITTLENUM_TYPE);
 261         }
 262     }
 263
 264   return NULL;
 265 }
 266
 267 /* Called for each undefined symbol. */
 268
 269 symbolS *
 270 md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
 271 {
 272   return 0;
 273 }
 274
 275 /* Round up a section size to the appropriate boundary.  */
 276
 277 valueT
 278 md_section_align (asection *seg, valueT addr)
 279 {
 280   int align = bfd_section_alignment (seg);
 281   return ((addr + (1 << align) - 1) & -(1 << align));
 282 }
 283
 284 /* This function assembles the instructions. It emits the frags/bytes to the
 285    sections and creates the relocation entries.  */
 286
 287 void
 288 md_assemble (char * str)
 289 {
 290   lm32_insn insn;
 291   char * errmsg;
 292
 293   /* Initialize GAS's cgen interface for a new instruction.  */
 294   gas_cgen_init_parse ();
 295
 296   insn.insn = lm32_cgen_assemble_insn
 297       (gas_cgen_cpu_desc, str, &insn.fields, insn.buffer, &errmsg);
 298
 299   if (!insn.insn)
 300     {
 301       as_bad ("%s", errmsg);
 302       return;
 303     }
 304
 305   gas_cgen_finish_insn (insn.insn, insn.buffer,
 306                         CGEN_FIELDS_BITSIZE (&insn.fields), 1, NULL);
 307 }
 308
 309 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
 310    Returns BFD_RELOC_NONE if no reloc type can be found.
 311    *FIXP may be modified if desired.  */
 312
 313 bfd_reloc_code_real_type
 314 md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
 315                       const CGEN_OPERAND *operand,
 316                       fixS *fixP ATTRIBUTE_UNUSED)
 317 {
 318   switch (operand->type)
 319     {
 320     case LM32_OPERAND_GOT16:
 321       return BFD_RELOC_LM32_16_GOT;
 322     case LM32_OPERAND_GOTOFFHI16:
 323       return BFD_RELOC_LM32_GOTOFF_HI16;
 324     case LM32_OPERAND_GOTOFFLO16:
 325       return BFD_RELOC_LM32_GOTOFF_LO16;
 326     case LM32_OPERAND_GP16:
 327       return BFD_RELOC_GPREL16;
 328     case LM32_OPERAND_LO16:
 329       return BFD_RELOC_LO16;
 330     case LM32_OPERAND_HI16:
 331       return BFD_RELOC_HI16;
 332     case LM32_OPERAND_BRANCH:
 333       return BFD_RELOC_LM32_BRANCH;
 334     case LM32_OPERAND_CALL:
 335       return BFD_RELOC_LM32_CALL;
 336     default:
 337       break;
 338     }
 339   return BFD_RELOC_NONE;
 340 }
 341
 342 /* Return the position from which the PC relative adjustment for a PC relative
 343    fixup should be made.  */
 344
 345 long
 346 md_pcrel_from (fixS *fixP)
 347 {
 348   /* Shouldn't get called.  */
 349   abort ();
 350   /* Return address of current instruction.  */
 351   return fixP->fx_where + fixP->fx_frag->fr_address;
 352 }
 353
 354 /* The location from which a PC relative jump should be calculated,
 355    given a PC relative reloc.  */
 356
 357 long
 358 md_pcrel_from_section (fixS * fixP, segT sec)
 359 {
 360   if ((fixP->fx_addsy != (symbolS *) NULL)
 361       && (! S_IS_DEFINED (fixP->fx_addsy)
 362           || (S_GET_SEGMENT (fixP->fx_addsy) != sec)))
 363     {
 364       /* The symbol is undefined (or is defined but not in this section).
 365          Let the linker figure it out.  */
 366       return 0;
 367     }
 368
 369   /*fprintf(stderr, "%s extern %d local %d\n", S_GET_NAME (fixP->fx_addsy), S_IS_EXTERN (fixP->fx_addsy), S_IS_LOCAL (fixP->fx_addsy));*/
 370   /* FIXME: Weak problem? */
 371   if ((fixP->fx_addsy != (symbolS *) NULL)
 372       && S_IS_EXTERNAL (fixP->fx_addsy))
 373     {
 374       /* If the symbol is external, let the linker handle it.  */
 375       return 0;
 376     }
 377
 378   return fixP->fx_where + fixP->fx_frag->fr_address;
 379 }
 380
 381 /* Return true if we can partially resolve a relocation now.  */
 382
 383 bfd_boolean
 384 lm32_fix_adjustable (fixS * fixP)
 385 {
 386   /* We need the symbol name for the VTABLE entries */
 387   if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
 388       || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
 389     return FALSE;
 390
 391   return TRUE;
 392 }
 393
 394 /* Relaxation isn't required/supported on this target.  */
 395
 396 int
 397 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
 398                                asection *seg ATTRIBUTE_UNUSED)
 399 {
 400   abort ();
 401   return 0;
 402 }
 403
 404 void
 405 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
 406                  asection *sec ATTRIBUTE_UNUSED,
 407                  fragS *fragP ATTRIBUTE_UNUSED)
 408 {
 409   abort ();
 410 }
 411
 412 void
 413 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
 414 {
 415   /* Fix for weak symbols. Why do we have fx_addsy for weak symbols?  */
 416   if (fixP->fx_addsy != NULL && S_IS_WEAK (fixP->fx_addsy))
 417     *valP = 0;
 418
 419   gas_cgen_md_apply_fix (fixP, valP, seg);
 420   return;
 421 }