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1 /* TI C6X assembler.
2 Copyright 2010, 2011
3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
23
24 #include "as.h"
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
27 #include "subsegs.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
31
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
36
37 /* Stuff for .scomm symbols. */
38 static segT sbss_section;
39 static asection scom_section;
40 static asymbol scom_symbol;
41
42 const char comment_chars[] = ";";
43 const char line_comment_chars[] = "#*;";
44 const char line_separator_chars[] = "@";
45
46 const char EXP_CHARS[] = "eE";
47 const char FLT_CHARS[] = "dDfF";
48
49 const char *md_shortopts = "";
50
51 enum
52 {
53 OPTION_MARCH = OPTION_MD_BASE,
54 OPTION_MBIG_ENDIAN,
55 OPTION_MLITTLE_ENDIAN,
56 OPTION_MDSBT,
57 OPTION_MNO_DSBT,
58 OPTION_MPID,
59 OPTION_MPIC,
60 OPTION_MNO_PIC,
61 OPTION_MGENERATE_REL
62 };
63
64 struct option md_longopts[] =
65 {
66 { "march", required_argument, NULL, OPTION_MARCH },
67 { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
68 { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
69 { "mdsbt", no_argument, NULL, OPTION_MDSBT },
70 { "mno-dsbt", no_argument, NULL, OPTION_MNO_DSBT },
71 { "mpid", required_argument, NULL, OPTION_MPID },
72 { "mpic", no_argument, NULL, OPTION_MPIC },
73 { "mno-pic", no_argument, NULL, OPTION_MNO_PIC },
74 { "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL },
75 { NULL, no_argument, NULL, 0 }
76 };
77 size_t md_longopts_size = sizeof (md_longopts);
78
79 /* The instructions enabled based only on the selected architecture
80 (all instructions, if no architecture specified). */
81 static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
82 | TIC6X_INSN_C64X
83 | TIC6X_INSN_C64XP
84 | TIC6X_INSN_C67X
85 | TIC6X_INSN_C67XP
86 | TIC6X_INSN_C674X);
87
88 /* The instructions enabled based on the current set of features
89 (architecture, as modified by other options). */
90 static unsigned short tic6x_features;
91
92 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
93 not yet set. */
94 static int tic6x_arch_attribute = C6XABI_Tag_ISA_none;
95
96 /* Whether any instructions at all have been seen. Once any
97 instructions have been seen, architecture attributes merge into the
98 previous attribute value rather than replacing it. */
99 static bfd_boolean tic6x_seen_insns = FALSE;
100
101 /* The number of registers in each register file supported by the
102 current architecture. */
103 static unsigned int tic6x_num_registers;
104
105 /* Whether predication on A0 is possible. */
106 static bfd_boolean tic6x_predicate_a0;
107
108 /* Whether execute packets can cross fetch packet boundaries. */
109 static bfd_boolean tic6x_can_cross_fp_boundary;
110
111 /* Whether there are constraints on simultaneous reads and writes of
112 40-bit data. */
113 static bfd_boolean tic6x_long_data_constraints;
114
115 /* Whether compact instructions are available. */
116 static bfd_boolean tic6x_compact_insns;
117
118 /* Whether to generate RELA relocations. */
119 static bfd_boolean tic6x_generate_rela = TRUE;
120
121 /* Whether the code uses DSBT addressing. */
122 static bfd_boolean tic6x_dsbt;
123
124 /* Types of position-independent data (attribute values for
125 Tag_ABI_PID). */
126 typedef enum
127 {
128 tic6x_pid_no = 0,
129 tic6x_pid_near = 1,
130 tic6x_pid_far = 2
131 } tic6x_pid_type;
132
133 /* The type of data addressing used in this code. */
134 static tic6x_pid_type tic6x_pid;
135
136 /* Whether the code uses position-independent code. */
137 static bfd_boolean tic6x_pic;
138
139 /* Table of supported architecture variants. */
140 typedef struct
141 {
142 const char *arch;
143 int attr;
144 unsigned short features;
145 } tic6x_arch_table;
146 static const tic6x_arch_table tic6x_arches[] =
147 {
148 { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X },
149 { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
150 { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X
151 | TIC6X_INSN_C64X
152 | TIC6X_INSN_C64XP) },
153 { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
154 { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X
155 | TIC6X_INSN_C67X
156 | TIC6X_INSN_C67XP) },
157 { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X
158 | TIC6X_INSN_C64X
159 | TIC6X_INSN_C64XP
160 | TIC6X_INSN_C67X
161 | TIC6X_INSN_C67XP
162 | TIC6X_INSN_C674X) }
163 };
164
165 /* Update the selected architecture based on ARCH, giving an error if
166 ARCH is an invalid value. Does not call tic6x_update_features; the
167 caller must do that if necessary. */
168
169 static void
170 tic6x_use_arch (const char *arch)
171 {
172 unsigned int i;
173
174 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
175 if (strcmp (arch, tic6x_arches[i].arch) == 0)
176 {
177 tic6x_arch_enable = tic6x_arches[i].features;
178 if (tic6x_seen_insns)
179 tic6x_arch_attribute
180 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute,
181 tic6x_arches[i].attr);
182 else
183 tic6x_arch_attribute = tic6x_arches[i].attr;
184 return;
185 }
186
187 as_bad (_("unknown architecture '%s'"), arch);
188 }
189
190 /* Table of supported -mpid arguments. */
191 typedef struct
192 {
193 const char *arg;
194 tic6x_pid_type attr;
195 } tic6x_pid_type_table;
196 static const tic6x_pid_type_table tic6x_pid_types[] =
197 {
198 { "no", tic6x_pid_no },
199 { "near", tic6x_pid_near },
200 { "far", tic6x_pid_far }
201 };
202
203 /* Handle -mpid=ARG. */
204
205 static void
206 tic6x_use_pid (const char *arg)
207 {
208 unsigned int i;
209
210 for (i = 0; i < ARRAY_SIZE (tic6x_pid_types); i++)
211 if (strcmp (arg, tic6x_pid_types[i].arg) == 0)
212 {
213 tic6x_pid = tic6x_pid_types[i].attr;
214 return;
215 }
216
217 as_bad (_("unknown -mpid= argument '%s'"), arg);
218 }
219
220 /* Parse a target-specific option. */
221
222 int
223 md_parse_option (int c, char *arg)
224 {
225 switch (c)
226 {
227 case OPTION_MARCH:
228 tic6x_use_arch (arg);
229 break;
230
231 case OPTION_MBIG_ENDIAN:
232 target_big_endian = 1;
233 break;
234
235 case OPTION_MLITTLE_ENDIAN:
236 target_big_endian = 0;
237 break;
238
239 case OPTION_MDSBT:
240 tic6x_dsbt = 1;
241 break;
242
243 case OPTION_MNO_DSBT:
244 tic6x_dsbt = 0;
245 break;
246
247 case OPTION_MPID:
248 tic6x_use_pid (arg);
249 break;
250
251 case OPTION_MPIC:
252 tic6x_pic = 1;
253 break;
254
255 case OPTION_MNO_PIC:
256 tic6x_pic = 0;
257 break;
258
259 case OPTION_MGENERATE_REL:
260 tic6x_generate_rela = FALSE;
261 break;
262
263 default:
264 return 0;
265 }
266 return 1;
267 }
268
269 void
270 md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
271 {
272 unsigned int i;
273
274 fputc ('\n', stream);
275 fprintf (stream, _("TMS320C6000 options:\n"));
276 fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n"));
277 fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
278 fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
279 fprintf (stream, _(" -mdsbt code uses DSBT addressing\n"));
280 fprintf (stream, _(" -mno-dsbt code does not use DSBT addressing\n"));
281 fprintf (stream, _(" -mpid=no code uses position-dependent data addressing\n"));
282 fprintf (stream, _(" -mpid=near code uses position-independent data addressing,\n"
283 " GOT accesses use near DP addressing\n"));
284 fprintf (stream, _(" -mpid=far code uses position-independent data addressing,\n"
285 " GOT accesses use far DP addressing\n"));
286 fprintf (stream, _(" -mpic code addressing is position-independent\n"));
287 fprintf (stream, _(" -mno-pic code addressing is position-dependent\n"));
288 /* -mgenerate-rel is only for testsuite use and is deliberately
289 undocumented. */
290
291 fputc ('\n', stream);
292 fprintf (stream, _("Supported ARCH values are:"));
293 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
294 fprintf (stream, " %s", tic6x_arches[i].arch);
295 fputc ('\n', stream);
296 }
297
298 /* Update enabled features based on the current architecture and
299 related settings. */
300 static void
301 tic6x_update_features (void)
302 {
303 tic6x_features = tic6x_arch_enable;
304
305 tic6x_num_registers
306 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16;
307
308 tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE;
309
310 tic6x_can_cross_fp_boundary
311 = (tic6x_arch_enable
312 & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE;
313
314 tic6x_long_data_constraints
315 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE;
316
317 tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE;
318 }
319
320 /* Do configuration after all options have been parsed. */
321
322 void
323 tic6x_after_parse_args (void)
324 {
325 tic6x_update_features ();
326 }
327
328 /* Parse a .arch directive. */
329
330 static void
331 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED)
332 {
333 char c;
334 char *arch;
335
336 arch = input_line_pointer;
337 while (*input_line_pointer && !ISSPACE (*input_line_pointer))
338 input_line_pointer++;
339 c = *input_line_pointer;
340 *input_line_pointer = 0;
341
342 tic6x_use_arch (arch);
343 tic6x_update_features ();
344 *input_line_pointer = c;
345 demand_empty_rest_of_line ();
346 }
347
348 /* Parse a .nocmp directive. */
349
350 static void
351 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED)
352 {
353 seg_info (now_seg)->tc_segment_info_data.nocmp = TRUE;
354 demand_empty_rest_of_line ();
355 }
356
357 /* .scomm pseudo-op handler.
358
359 This is a new pseudo-op to handle putting objects in .scommon.
360 By doing this the linker won't need to do any work,
361 and more importantly it removes the implicit -G arg necessary to
362 correctly link the object file. */
363
364 static void
365 s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED)
366 {
367 char *name;
368 char c;
369 char *p;
370 offsetT size;
371 symbolS *symbolP;
372 offsetT align;
373 int align2;
374
375 name = input_line_pointer;
376 c = get_symbol_end ();
377
378 /* Just after name is now '\0'. */
379 p = input_line_pointer;
380 *p = c;
381 SKIP_WHITESPACE ();
382 if (*input_line_pointer != ',')
383 {
384 as_bad (_("expected comma after symbol name"));
385 ignore_rest_of_line ();
386 return;
387 }
388
389 /* Skip ','. */
390 input_line_pointer++;
391 if ((size = get_absolute_expression ()) < 0)
392 {
393 /* xgettext:c-format */
394 as_warn (_("invalid length for .scomm directive"));
395 ignore_rest_of_line ();
396 return;
397 }
398
399 /* The third argument to .scomm is the alignment. */
400 if (*input_line_pointer != ',')
401 align = 8;
402 else
403 {
404 ++input_line_pointer;
405 align = get_absolute_expression ();
406 if (align <= 0)
407 {
408 as_warn (_("alignment is not a positive number"));
409 align = 8;
410 }
411 }
412
413 /* Convert to a power of 2 alignment. */
414 if (align)
415 {
416 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
417 continue;
418 if (align != 1)
419 {
420 as_bad (_("alignment is not a power of 2"));
421 ignore_rest_of_line ();
422 return;
423 }
424 }
425 else
426 align2 = 0;
427
428 *p = 0;
429 symbolP = symbol_find_or_make (name);
430 *p = c;
431
432 if (S_IS_DEFINED (symbolP))
433 {
434 /* xgettext:c-format */
435 as_bad (_("attempt to re-define symbol `%s'"),
436 S_GET_NAME (symbolP));
437 ignore_rest_of_line ();
438 return;
439 }
440
441 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
442 {
443 /* xgettext:c-format */
444 as_bad (_("attempt to redefine `%s' with a different length"),
445 S_GET_NAME (symbolP));
446
447 ignore_rest_of_line ();
448 return;
449 }
450
451 if (symbol_get_obj (symbolP)->local)
452 {
453 segT old_sec = now_seg;
454 int old_subsec = now_subseg;
455 char *pfrag;
456
457 record_alignment (sbss_section, align2);
458 subseg_set (sbss_section, 0);
459
460 if (align2)
461 frag_align (align2, 0, 0);
462
463 if (S_GET_SEGMENT (symbolP) == sbss_section)
464 symbol_get_frag (symbolP)->fr_symbol = 0;
465
466 symbol_set_frag (symbolP, frag_now);
467
468 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
469 (char *) 0);
470 *pfrag = 0;
471 S_SET_SIZE (symbolP, size);
472 S_SET_SEGMENT (symbolP, sbss_section);
473 S_CLEAR_EXTERNAL (symbolP);
474 subseg_set (old_sec, old_subsec);
475 }
476 else
477 {
478 S_SET_VALUE (symbolP, (valueT) size);
479 S_SET_ALIGN (symbolP, 1 << align2);
480 S_SET_EXTERNAL (symbolP);
481 S_SET_SEGMENT (symbolP, &scom_section);
482 }
483
484 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
485
486 demand_empty_rest_of_line ();
487 }
488
489 /* Track for each attribute whether it has been set explicitly (and so
490 should not have a default value set by the assembler). */
491 static bfd_boolean tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES];
492
493 /* Parse a .c6xabi_attribute directive. */
494
495 static void
496 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED)
497 {
498 int tag = s_vendor_attribute (OBJ_ATTR_PROC);
499
500 if (tag < NUM_KNOWN_OBJ_ATTRIBUTES)
501 tic6x_attributes_set_explicitly[tag] = TRUE;
502 }
503
504 typedef struct
505 {
506 const char *name;
507 int tag;
508 } tic6x_attribute_table;
509
510 static const tic6x_attribute_table tic6x_attributes[] =
511 {
512 #define TAG(tag, value) { #tag, tag },
513 #include "elf/tic6x-attrs.h"
514 #undef TAG
515 };
516
517 /* Convert an attribute name to a number. */
518
519 int
520 tic6x_convert_symbolic_attribute (const char *name)
521 {
522 unsigned int i;
523
524 for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++)
525 if (strcmp (name, tic6x_attributes[i].name) == 0)
526 return tic6x_attributes[i].tag;
527
528 return -1;
529 }
530
531 const pseudo_typeS md_pseudo_table[] =
532 {
533 { "arch", s_tic6x_arch, 0 },
534 { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 },
535 { "nocmp", s_tic6x_nocmp, 0 },
536 { "scomm", s_tic6x_scomm, 0 },
537 { "word", cons, 4 },
538 { 0, 0, 0 }
539 };
540
541 /* Hash table of opcodes. For each opcode name, this stores a pointer
542 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
543 table entries with that name. */
544 static struct hash_control *opcode_hash;
545
546 /* Initialize the assembler (called once at assembler startup). */
547
548 void
549 md_begin (void)
550 {
551 tic6x_opcode_id id;
552 flagword applicable;
553 segT seg;
554 subsegT subseg;
555
556 bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0);
557
558 /* Insert opcodes into the hash table. */
559 opcode_hash = hash_new ();
560 for (id = 0; id < tic6x_opcode_max; id++)
561 {
562 const char *errmsg;
563 tic6x_opcode_list *opc = xmalloc (sizeof (tic6x_opcode_list));
564
565 opc->id = id;
566 opc->next = hash_find (opcode_hash, tic6x_opcode_table[id].name);
567 if ((errmsg = hash_jam (opcode_hash, tic6x_opcode_table[id].name, opc))
568 != NULL)
569 as_fatal ("%s", _(errmsg));
570 }
571
572 /* Save the current subseg so we can restore it [it's the default one and
573 we don't want the initial section to be .sbss]. */
574 seg = now_seg;
575 subseg = now_subseg;
576
577 /* The sbss section is for local .scomm symbols. */
578 sbss_section = subseg_new (".bss", 0);
579 seg_info (sbss_section)->bss = 1;
580
581 /* This is copied from perform_an_assembly_pass. */
582 applicable = bfd_applicable_section_flags (stdoutput);
583 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
584
585 subseg_set (seg, subseg);
586
587 /* We must construct a fake section similar to bfd_com_section
588 but with the name .scommon. */
589 scom_section = bfd_com_section;
590 scom_section.name = ".scommon";
591 scom_section.output_section = & scom_section;
592 scom_section.symbol = & scom_symbol;
593 scom_section.symbol_ptr_ptr = & scom_section.symbol;
594 scom_symbol = * bfd_com_section.symbol;
595 scom_symbol.name = ".scommon";
596 scom_symbol.section = & scom_section;
597 }
598
599 /* Whether the current line being parsed had the "||" parallel bars. */
600 static bfd_boolean tic6x_line_parallel;
601
602 /* Whether the current line being parsed started "||^" to indicate an
603 SPMASKed parallel instruction. */
604 static bfd_boolean tic6x_line_spmask;
605
606 /* If the current line being parsed had an instruction predicate, the
607 creg value for that predicate (which must be nonzero); otherwise
608 0. */
609 static unsigned int tic6x_line_creg;
610
611 /* If the current line being parsed had an instruction predicate, the
612 z value for that predicate; otherwise 0. */
613 static unsigned int tic6x_line_z;
614
615 /* Return 1 (updating input_line_pointer as appropriate) if the line
616 starting with C (immediately before input_line_pointer) starts with
617 pre-opcode text appropriate for this target, 0 otherwise. */
618
619 int
620 tic6x_unrecognized_line (int c)
621 {
622 char *p, *endp;
623 unsigned int z;
624 bfd_boolean areg;
625 bfd_boolean bad_predicate;
626
627 switch (c)
628 {
629 case '|':
630 if (input_line_pointer[0] == '|')
631 {
632 if (input_line_pointer[1] == '^')
633 {
634 tic6x_line_spmask = TRUE;
635 input_line_pointer += 2;
636 }
637 else
638 input_line_pointer += 1;
639 if (tic6x_line_parallel)
640 as_bad (_("multiple '||' on same line"));
641 tic6x_line_parallel = TRUE;
642 if (tic6x_line_creg)
643 as_bad (_("'||' after predicate"));
644 return 1;
645 }
646 return 0;
647
648 case '[':
649 /* If it doesn't look like a predicate at all, just return 0.
650 If it looks like one but not a valid one, give a better
651 error. */
652 p = input_line_pointer;
653 while (*p != ']' && !is_end_of_line[(unsigned char) *p])
654 p++;
655 if (*p != ']')
656 return 0;
657 endp = p + 1;
658 p = input_line_pointer;
659 z = 0;
660 bad_predicate = FALSE;
661 if (*p == '!')
662 {
663 z = 1;
664 p++;
665 }
666 if (*p == 'A' || *p == 'a')
667 areg = TRUE;
668 else if (*p == 'B' || *p == 'b')
669 areg = FALSE;
670 else
671 {
672 areg = TRUE; /* Avoid uninitialized warning. */
673 bad_predicate = TRUE;
674 }
675 if (!bad_predicate)
676 {
677 p++;
678 if (*p != '0' && *p != '1' && *p != '2')
679 bad_predicate = TRUE;
680 else if (p[1] != ']')
681 bad_predicate = TRUE;
682 else
683 input_line_pointer = p + 2;
684 }
685
686 if (tic6x_line_creg)
687 as_bad (_("multiple predicates on same line"));
688
689 if (bad_predicate)
690 {
691 char ctmp = *endp;
692 *endp = 0;
693 as_bad (_("bad predicate '%s'"), input_line_pointer - 1);
694 *endp = ctmp;
695 input_line_pointer = endp;
696 return 1;
697 }
698
699 switch (*p)
700 {
701 case '0':
702 tic6x_line_creg = (areg ? 6 : 1);
703 if (areg && !tic6x_predicate_a0)
704 as_bad (_("predication on A0 not supported on this architecture"));
705 break;
706
707 case '1':
708 tic6x_line_creg = (areg ? 4 : 2);
709 break;
710
711 case '2':
712 tic6x_line_creg = (areg ? 5 : 3);
713 break;
714
715 default:
716 abort ();
717 }
718
719 tic6x_line_z = z;
720 return 1;
721
722 default:
723 return 0;
724 }
725 }
726
727 /* Do any target-specific handling of a label required. */
728
729 void
730 tic6x_frob_label (symbolS *sym)
731 {
732 segment_info_type *si;
733 tic6x_label_list *list;
734
735 if (tic6x_line_parallel)
736 {
737 as_bad (_("label after '||'"));
738 tic6x_line_parallel = FALSE;
739 tic6x_line_spmask = FALSE;
740 }
741 if (tic6x_line_creg)
742 {
743 as_bad (_("label after predicate"));
744 tic6x_line_creg = 0;
745 tic6x_line_z = 0;
746 }
747
748 si = seg_info (now_seg);
749 list = si->tc_segment_info_data.label_list;
750 si->tc_segment_info_data.label_list = xmalloc (sizeof (tic6x_label_list));
751 si->tc_segment_info_data.label_list->next = list;
752 si->tc_segment_info_data.label_list->label = sym;
753
754 /* Defining tc_frob_label overrides the ELF definition of
755 obj_frob_label, so we need to apply its effects here. */
756 dwarf2_emit_label (sym);
757 }
758
759 /* At end-of-line, give errors for start-of-line decorations that
760 needed an instruction but were not followed by one. */
761
762 static void
763 tic6x_end_of_line (void)
764 {
765 if (tic6x_line_parallel)
766 {
767 as_bad (_("'||' not followed by instruction"));
768 tic6x_line_parallel = FALSE;
769 tic6x_line_spmask = FALSE;
770 }
771 if (tic6x_line_creg)
772 {
773 as_bad (_("predicate not followed by instruction"));
774 tic6x_line_creg = 0;
775 tic6x_line_z = 0;
776 }
777 }
778
779 /* Do any target-specific handling of the start of a logical line. */
780
781 void
782 tic6x_start_line_hook (void)
783 {
784 tic6x_end_of_line ();
785 }
786
787 /* Do target-specific handling immediately after an input file from
788 the command line, and any other inputs it includes, have been
789 read. */
790
791 void
792 tic6x_cleanup (void)
793 {
794 tic6x_end_of_line ();
795 }
796
797 /* Do target-specific initialization after arguments have been
798 processed and the output file created. */
799
800 void
801 tic6x_init_after_args (void)
802 {
803 elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela);
804 }
805
806 /* Free LIST of labels (possibly NULL). */
807
808 static void
809 tic6x_free_label_list (tic6x_label_list *list)
810 {
811 while (list)
812 {
813 tic6x_label_list *old = list;
814
815 list = list->next;
816 free (old);
817 }
818 }
819
820 /* Handle a data alignment of N bytes. */
821
822 void
823 tic6x_cons_align (int n ATTRIBUTE_UNUSED)
824 {
825 segment_info_type *seginfo = seg_info (now_seg);
826
827 /* Data means there is no current execute packet, and that any label
828 applies to that data rather than a subsequent instruction. */
829 tic6x_free_label_list (seginfo->tc_segment_info_data.label_list);
830 seginfo->tc_segment_info_data.label_list = NULL;
831 seginfo->tc_segment_info_data.execute_packet_frag = NULL;
832 seginfo->tc_segment_info_data.last_insn_lsb = NULL;
833 seginfo->tc_segment_info_data.spmask_addr = NULL;
834 seginfo->tc_segment_info_data.func_units_used = 0;
835 }
836
837 /* Handle an alignment directive. Return TRUE if the
838 machine-independent frag generation should be skipped. */
839
840 bfd_boolean
841 tic6x_do_align (int n, char *fill, int len ATTRIBUTE_UNUSED, int max)
842 {
843 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
844 them in the md_end pass by inserting NOPs in parallel with
845 previous instructions. We only do this in sections containing
846 nothing but instructions. Code alignments of 1 or 2 bytes have
847 no effect in such sections (but we record them with
848 machine-dependent frags anyway so they can be skipped or
849 converted to machine-independent), while those of more than 64
850 bytes cannot reliably be handled in this way. */
851 if (n > 0
852 && max >= 0
853 && max < (1 << n)
854 && !need_pass_2
855 && fill == NULL
856 && subseg_text_p (now_seg))
857 {
858 fragS *align_frag;
859 char *p;
860
861 if (n > 5)
862 return FALSE;
863
864 /* Machine-independent code would generate a frag here, but we
865 wish to handle it in a machine-dependent way. */
866 if (frag_now_fix () != 0)
867 {
868 if (frag_now->fr_type != rs_machine_dependent)
869 frag_wane (frag_now);
870
871 frag_new (0);
872 }
873 frag_grow (32);
874 align_frag = frag_now;
875 p = frag_var (rs_machine_dependent, 32, 32, max, NULL, n, NULL);
876 /* This must be the same as the frag to which a pointer was just
877 saved. */
878 if (p != align_frag->fr_literal)
879 abort ();
880 align_frag->tc_frag_data.is_insns = FALSE;
881 return TRUE;
882 }
883 else
884 return FALSE;
885 }
886
887 /* Types of operand for parsing purposes. These are used as bit-masks
888 to tell tic6x_parse_operand what forms of operand are
889 permitted. */
890 #define TIC6X_OP_EXP 0x0001u
891 #define TIC6X_OP_REG 0x0002u
892 #define TIC6X_OP_REGPAIR 0x0004u
893 #define TIC6X_OP_IRP 0x0008u
894 #define TIC6X_OP_NRP 0x0010u
895 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
896 interpreted as an expression, which may be a symbol with the same
897 name as a register that ends up being implicitly DP-relative. With
898 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
899 a register if they match one, and failing that as an expression,
900 which must be constant. */
901 #define TIC6X_OP_MEM_NOUNREG 0x0020u
902 #define TIC6X_OP_MEM_UNREG 0x0040u
903 #define TIC6X_OP_CTRL 0x0080u
904 #define TIC6X_OP_FUNC_UNIT 0x0100u
905
906 /* A register or register pair read by the assembler. */
907 typedef struct
908 {
909 /* The side the register is on (1 or 2). */
910 unsigned int side;
911 /* The register number (0 to 31). */
912 unsigned int num;
913 } tic6x_register;
914
915 /* Types of modification of a base address. */
916 typedef enum
917 {
918 tic6x_mem_mod_none,
919 tic6x_mem_mod_plus,
920 tic6x_mem_mod_minus,
921 tic6x_mem_mod_preinc,
922 tic6x_mem_mod_predec,
923 tic6x_mem_mod_postinc,
924 tic6x_mem_mod_postdec
925 } tic6x_mem_mod;
926
927 /* Scaled [] or unscaled () nature of an offset. */
928 typedef enum
929 {
930 tic6x_offset_none,
931 tic6x_offset_scaled,
932 tic6x_offset_unscaled
933 } tic6x_mem_scaling;
934
935 /* A memory operand read by the assembler. */
936 typedef struct
937 {
938 /* The base register. */
939 tic6x_register base_reg;
940 /* How the base register is modified. */
941 tic6x_mem_mod mod;
942 /* Whether there is an offset (required with plain "+" and "-"), and
943 whether it is scaled or unscaled if so. */
944 tic6x_mem_scaling scaled;
945 /* Whether the offset is a register (TRUE) or an expression
946 (FALSE). */
947 bfd_boolean offset_is_reg;
948 /* The offset. */
949 union
950 {
951 expressionS exp;
952 tic6x_register reg;
953 } offset;
954 } tic6x_mem_ref;
955
956 /* A functional unit in SPMASK operands read by the assembler. */
957 typedef struct
958 {
959 /* The basic unit. */
960 tic6x_func_unit_base base;
961 /* The side (1 or 2). */
962 unsigned int side;
963 } tic6x_func_unit_operand;
964
965 /* An operand read by the assembler. */
966 typedef struct
967 {
968 /* The syntactic form of the operand, as one of the bit-masks
969 above. */
970 unsigned int form;
971 /* The operand value. */
972 union
973 {
974 /* An expression: TIC6X_OP_EXP. */
975 expressionS exp;
976 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
977 tic6x_register reg;
978 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
979 TIC6X_OP_MEM_UNREG. */
980 tic6x_mem_ref mem;
981 /* A control register: TIC6X_OP_CTRL. */
982 tic6x_ctrl_id ctrl;
983 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
984 tic6x_func_unit_operand func_unit;
985 } value;
986 } tic6x_operand;
987
988 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
989
990 /* Parse a register operand, or part of an operand, starting at *P.
991 If syntactically OK (including that the number is in the range 0 to
992 31, but not necessarily in range for this architecture), return
993 TRUE, putting the register side and number in *REG and update *P to
994 point immediately after the register number; otherwise return FALSE
995 without changing *P (but possibly changing *REG). Do not print any
996 diagnostics. */
997
998 static bfd_boolean
999 tic6x_parse_register (char **p, tic6x_register *reg)
1000 {
1001 char *r = *p;
1002
1003 switch (*r)
1004 {
1005 case 'a':
1006 case 'A':
1007 reg->side = 1;
1008 break;
1009
1010 case 'b':
1011 case 'B':
1012 reg->side = 2;
1013 break;
1014
1015 default:
1016 return FALSE;
1017 }
1018 r++;
1019
1020 if (*r >= '0' && *r <= '9')
1021 {
1022 reg->num = *r - '0';
1023 r++;
1024 }
1025 else
1026 return FALSE;
1027
1028 if (reg->num > 0 && *r >= '0' && *r <= '9')
1029 {
1030 reg->num = reg->num * 10 + (*r - '0');
1031 r++;
1032 }
1033
1034 if (*r >= '0' && *r <= '9')
1035 return FALSE;
1036
1037 if (reg->num >= 32)
1038 return FALSE;
1039 *p = r;
1040 return TRUE;
1041 }
1042
1043 /* Parse the initial two characters of a functional unit name starting
1044 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
1045 return FALSE. */
1046
1047 static bfd_boolean
1048 tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base,
1049 unsigned int *side)
1050 {
1051 bfd_boolean good_func_unit = TRUE;
1052 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
1053 unsigned int maybe_side = 0;
1054
1055 switch (p[0])
1056 {
1057 case 'd':
1058 case 'D':
1059 maybe_base = tic6x_func_unit_d;
1060 break;
1061
1062 case 'l':
1063 case 'L':
1064 maybe_base = tic6x_func_unit_l;
1065 break;
1066
1067 case 'm':
1068 case 'M':
1069 maybe_base = tic6x_func_unit_m;
1070 break;
1071
1072 case 's':
1073 case 'S':
1074 maybe_base = tic6x_func_unit_s;
1075 break;
1076
1077 default:
1078 good_func_unit = FALSE;
1079 break;
1080 }
1081
1082 if (good_func_unit)
1083 switch (p[1])
1084 {
1085 case '1':
1086 maybe_side = 1;
1087 break;
1088
1089 case '2':
1090 maybe_side = 2;
1091 break;
1092
1093 default:
1094 good_func_unit = FALSE;
1095 break;
1096 }
1097
1098 if (good_func_unit)
1099 {
1100 *base = maybe_base;
1101 *side = maybe_side;
1102 }
1103
1104 return good_func_unit;
1105 }
1106
1107 /* Parse an operand starting at *P. If the operand parses OK, return
1108 TRUE and store the value in *OP; otherwise return FALSE (possibly
1109 changing *OP). In any case, update *P to point to the following
1110 comma or end of line. The possible operand forms are given by
1111 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1112 starting at STR, length OPC_LEN. */
1113
1114 static bfd_boolean
1115 tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms,
1116 char *str, int opc_len, unsigned int opno)
1117 {
1118 bfd_boolean operand_parsed = FALSE;
1119 char *q = *p;
1120
1121 if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1122 == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1123 abort ();
1124
1125 /* Check for functional unit names for SPMASK and SPMASKR. */
1126 if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT))
1127 {
1128 tic6x_func_unit_base base = tic6x_func_unit_nfu;
1129 unsigned int side = 0;
1130
1131 if (tic6x_parse_func_unit_base (q, &base, &side))
1132 {
1133 char *rq = q + 2;
1134
1135 skip_whitespace (rq);
1136 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1137 {
1138 op->form = TIC6X_OP_FUNC_UNIT;
1139 op->value.func_unit.base = base;
1140 op->value.func_unit.side = side;
1141 operand_parsed = TRUE;
1142 q = rq;
1143 }
1144 }
1145 }
1146
1147 /* Check for literal "irp". */
1148 if (!operand_parsed && (op_forms & TIC6X_OP_IRP))
1149 {
1150 if ((q[0] == 'i' || q[0] == 'I')
1151 && (q[1] == 'r' || q[1] == 'R')
1152 && (q[2] == 'p' || q[2] == 'P'))
1153 {
1154 char *rq = q + 3;
1155
1156 skip_whitespace (rq);
1157 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1158 {
1159 op->form = TIC6X_OP_IRP;
1160 operand_parsed = TRUE;
1161 q = rq;
1162 }
1163 }
1164 }
1165
1166 /* Check for literal "nrp". */
1167 if (!operand_parsed && (op_forms & TIC6X_OP_NRP))
1168 {
1169 if ((q[0] == 'n' || q[0] == 'N')
1170 && (q[1] == 'r' || q[1] == 'R')
1171 && (q[2] == 'p' || q[2] == 'P'))
1172 {
1173 char *rq = q + 3;
1174
1175 skip_whitespace (rq);
1176 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1177 {
1178 op->form = TIC6X_OP_NRP;
1179 operand_parsed = TRUE;
1180 q = rq;
1181 }
1182 }
1183 }
1184
1185 /* Check for control register names. */
1186 if (!operand_parsed && (op_forms & TIC6X_OP_CTRL))
1187 {
1188 tic6x_ctrl_id crid;
1189
1190 for (crid = 0; crid < tic6x_ctrl_max; crid++)
1191 {
1192 size_t len = strlen (tic6x_ctrl_table[crid].name);
1193
1194 if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0)
1195 {
1196 char *rq = q + len;
1197
1198 skip_whitespace (rq);
1199 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1200 {
1201 op->form = TIC6X_OP_CTRL;
1202 op->value.ctrl = crid;
1203 operand_parsed = TRUE;
1204 q = rq;
1205 if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features))
1206 as_bad (_("control register '%s' not supported "
1207 "on this architecture"),
1208 tic6x_ctrl_table[crid].name);
1209 }
1210 }
1211 }
1212 }
1213
1214 /* See if this looks like a memory reference. */
1215 if (!operand_parsed
1216 && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)))
1217 {
1218 bfd_boolean mem_ok = TRUE;
1219 char *mq = q;
1220 tic6x_mem_mod mem_mod = tic6x_mem_mod_none;
1221 tic6x_register base_reg;
1222 bfd_boolean require_offset, permit_offset;
1223 tic6x_mem_scaling scaled;
1224 bfd_boolean offset_is_reg;
1225 expressionS offset_exp;
1226 tic6x_register offset_reg;
1227
1228 if (*mq == '*')
1229 mq++;
1230 else
1231 mem_ok = FALSE;
1232
1233 if (mem_ok)
1234 {
1235 skip_whitespace (mq);
1236 switch (*mq)
1237 {
1238 case '+':
1239 if (mq[1] == '+')
1240 {
1241 mem_mod = tic6x_mem_mod_preinc;
1242 mq += 2;
1243 }
1244 else
1245 {
1246 mem_mod = tic6x_mem_mod_plus;
1247 mq++;
1248 }
1249 break;
1250
1251 case '-':
1252 if (mq[1] == '-')
1253 {
1254 mem_mod = tic6x_mem_mod_predec;
1255 mq += 2;
1256 }
1257 else
1258 {
1259 mem_mod = tic6x_mem_mod_minus;
1260 mq++;
1261 }
1262 break;
1263
1264 default:
1265 break;
1266 }
1267 }
1268
1269 if (mem_ok)
1270 {
1271 skip_whitespace (mq);
1272 mem_ok = tic6x_parse_register (&mq, &base_reg);
1273 }
1274
1275 if (mem_ok && mem_mod == tic6x_mem_mod_none)
1276 {
1277 skip_whitespace (mq);
1278 if (mq[0] == '+' && mq[1] == '+')
1279 {
1280 mem_mod = tic6x_mem_mod_postinc;
1281 mq += 2;
1282 }
1283 else if (mq[0] == '-' && mq[1] == '-')
1284 {
1285 mem_mod = tic6x_mem_mod_postdec;
1286 mq += 2;
1287 }
1288 }
1289
1290 if (mem_mod == tic6x_mem_mod_none)
1291 permit_offset = FALSE;
1292 else
1293 permit_offset = TRUE;
1294 if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus)
1295 require_offset = TRUE;
1296 else
1297 require_offset = FALSE;
1298 scaled = tic6x_offset_none;
1299 offset_is_reg = FALSE;
1300
1301 if (mem_ok && permit_offset)
1302 {
1303 char endc = 0;
1304
1305 skip_whitespace (mq);
1306 switch (*mq)
1307 {
1308 case '[':
1309 scaled = tic6x_offset_scaled;
1310 mq++;
1311 endc = ']';
1312 break;
1313
1314 case '(':
1315 scaled = tic6x_offset_unscaled;
1316 mq++;
1317 endc = ')';
1318 break;
1319
1320 default:
1321 break;
1322 }
1323 if (scaled != tic6x_offset_none)
1324 {
1325 skip_whitespace (mq);
1326 if (scaled == tic6x_offset_scaled
1327 || (op_forms & TIC6X_OP_MEM_UNREG))
1328 {
1329 bfd_boolean reg_ok;
1330 char *rq = mq;
1331
1332 reg_ok = tic6x_parse_register (&rq, &offset_reg);
1333 if (reg_ok)
1334 {
1335 skip_whitespace (rq);
1336 if (*rq == endc)
1337 {
1338 mq = rq;
1339 offset_is_reg = TRUE;
1340 }
1341 }
1342 }
1343 if (!offset_is_reg)
1344 {
1345 char *save_input_line_pointer;
1346
1347 save_input_line_pointer = input_line_pointer;
1348 input_line_pointer = mq;
1349 expression (&offset_exp);
1350 mq = input_line_pointer;
1351 input_line_pointer = save_input_line_pointer;
1352 }
1353 skip_whitespace (mq);
1354 if (*mq == endc)
1355 mq++;
1356 else
1357 mem_ok = FALSE;
1358 }
1359 }
1360
1361 if (mem_ok && require_offset && scaled == tic6x_offset_none)
1362 mem_ok = FALSE;
1363
1364 if (mem_ok)
1365 {
1366 skip_whitespace (mq);
1367 if (!is_end_of_line[(unsigned char) *mq] && *mq != ',')
1368 mem_ok = FALSE;
1369 }
1370
1371 if (mem_ok)
1372 {
1373 op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG);
1374 op->value.mem.base_reg = base_reg;
1375 op->value.mem.mod = mem_mod;
1376 op->value.mem.scaled = scaled;
1377 op->value.mem.offset_is_reg = offset_is_reg;
1378 if (offset_is_reg)
1379 op->value.mem.offset.reg = offset_reg;
1380 else
1381 op->value.mem.offset.exp = offset_exp;
1382 operand_parsed = TRUE;
1383 q = mq;
1384 if (base_reg.num >= tic6x_num_registers)
1385 as_bad (_("register number %u not supported on this architecture"),
1386 base_reg.num);
1387 if (offset_is_reg && offset_reg.num >= tic6x_num_registers)
1388 as_bad (_("register number %u not supported on this architecture"),
1389 offset_reg.num);
1390 }
1391 }
1392
1393 /* See if this looks like a register or register pair. */
1394 if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR)))
1395 {
1396 tic6x_register first_reg, second_reg;
1397 bfd_boolean reg_ok;
1398 char *rq = q;
1399
1400 reg_ok = tic6x_parse_register (&rq, &first_reg);
1401
1402 if (reg_ok)
1403 {
1404 if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR))
1405 {
1406 rq++;
1407 reg_ok = tic6x_parse_register (&rq, &second_reg);
1408 if (reg_ok)
1409 {
1410 skip_whitespace (rq);
1411 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1412 {
1413 if ((second_reg.num & 1)
1414 || (first_reg.num != second_reg.num + 1)
1415 || (first_reg.side != second_reg.side))
1416 as_bad (_("register pair for operand %u of '%.*s'"
1417 " not a valid even/odd pair"), opno,
1418 opc_len, str);
1419 op->form = TIC6X_OP_REGPAIR;
1420 op->value.reg = second_reg;
1421 operand_parsed = TRUE;
1422 q = rq;
1423 }
1424 }
1425 }
1426 else if (op_forms & TIC6X_OP_REG)
1427 {
1428 skip_whitespace (rq);
1429 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1430 {
1431 op->form = TIC6X_OP_REG;
1432 op->value.reg = first_reg;
1433 operand_parsed = TRUE;
1434 q = rq;
1435 }
1436 }
1437 }
1438 if (operand_parsed)
1439 {
1440 if (first_reg.num >= tic6x_num_registers)
1441 as_bad (_("register number %u not supported on this architecture"),
1442 first_reg.num);
1443 if (op->form == TIC6X_OP_REGPAIR
1444 && second_reg.num >= tic6x_num_registers)
1445 as_bad (_("register number %u not supported on this architecture"),
1446 second_reg.num);
1447 }
1448 }
1449
1450 /* Otherwise, parse it as an expression. */
1451 if (!operand_parsed && (op_forms & TIC6X_OP_EXP))
1452 {
1453 char *save_input_line_pointer;
1454
1455 save_input_line_pointer = input_line_pointer;
1456 input_line_pointer = q;
1457 op->form = TIC6X_OP_EXP;
1458 expression (&op->value.exp);
1459 q = input_line_pointer;
1460 input_line_pointer = save_input_line_pointer;
1461 operand_parsed = TRUE;
1462 }
1463
1464 if (operand_parsed)
1465 {
1466 /* Now the operand has been parsed, there must be nothing more
1467 before the comma or end of line. */
1468 skip_whitespace (q);
1469 if (!is_end_of_line[(unsigned char) *q] && *q != ',')
1470 {
1471 operand_parsed = FALSE;
1472 as_bad (_("junk after operand %u of '%.*s'"), opno,
1473 opc_len, str);
1474 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1475 q++;
1476 }
1477 }
1478 else
1479 {
1480 /* This could not be parsed as any acceptable form of
1481 operand. */
1482 switch (op_forms)
1483 {
1484 case TIC6X_OP_REG | TIC6X_OP_REGPAIR:
1485 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1486 opno, opc_len, str);
1487 break;
1488
1489 case TIC6X_OP_REG | TIC6X_OP_CTRL:
1490 case TIC6X_OP_REG:
1491 as_bad (_("bad register for operand %u of '%.*s'"),
1492 opno, opc_len, str);
1493 break;
1494
1495 case TIC6X_OP_REGPAIR:
1496 as_bad (_("bad register pair for operand %u of '%.*s'"),
1497 opno, opc_len, str);
1498 break;
1499
1500 case TIC6X_OP_FUNC_UNIT:
1501 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1502 opno, opc_len, str);
1503 break;
1504
1505 default:
1506 as_bad (_("bad operand %u of '%.*s'"),
1507 opno, opc_len, str);
1508 break;
1509
1510 }
1511 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1512 q++;
1513 }
1514 *p = q;
1515 return operand_parsed;
1516 }
1517
1518 /* Table of assembler operators and associated O_* values. */
1519 typedef struct
1520 {
1521 const char *name;
1522 operatorT op;
1523 } tic6x_operator_table;
1524 static const tic6x_operator_table tic6x_operators[] = {
1525 #define O_dsbt_index O_md1
1526 { "dsbt_index", O_dsbt_index },
1527 #define O_got O_md2
1528 { "got", O_got },
1529 #define O_dpr_got O_md3
1530 { "dpr_got", O_dpr_got },
1531 #define O_dpr_byte O_md4
1532 { "dpr_byte", O_dpr_byte },
1533 #define O_dpr_hword O_md5
1534 { "dpr_hword", O_dpr_hword },
1535 #define O_dpr_word O_md6
1536 { "dpr_word", O_dpr_word },
1537 };
1538
1539 /* Parse a name in some machine-specific way. Used on C6X to handle
1540 assembler operators. */
1541
1542 int
1543 tic6x_parse_name (const char *name, expressionS *exprP,
1544 enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar)
1545 {
1546 char *p = input_line_pointer;
1547 char c, *name_start, *name_end;
1548 const char *inner_name;
1549 unsigned int i;
1550 operatorT op = O_illegal;
1551 symbolS *sym;
1552
1553 if (*name != '$')
1554 return 0;
1555
1556 for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++)
1557 if (strcasecmp (name + 1, tic6x_operators[i].name) == 0)
1558 {
1559 op = tic6x_operators[i].op;
1560 break;
1561 }
1562
1563 if (op == O_illegal)
1564 return 0;
1565
1566 *input_line_pointer = *nextchar;
1567 skip_whitespace (p);
1568
1569 if (*p != '(')
1570 {
1571 *input_line_pointer = 0;
1572 return 0;
1573 }
1574 p++;
1575 skip_whitespace (p);
1576
1577 if (!is_name_beginner (*p))
1578 {
1579 *input_line_pointer = 0;
1580 return 0;
1581 }
1582
1583 name_start = p;
1584 p++;
1585 while (is_part_of_name (*p))
1586 p++;
1587 name_end = p;
1588 skip_whitespace (p);
1589
1590 if (*p != ')')
1591 {
1592 *input_line_pointer = 0;
1593 return 0;
1594 }
1595
1596 input_line_pointer = p + 1;
1597 *nextchar = *input_line_pointer;
1598 *input_line_pointer = 0;
1599
1600 c = *name_end;
1601 *name_end = 0;
1602 inner_name = name_start;
1603 if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0)
1604 {
1605 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1606 inner_name = "__c6xabi_DSBT_BASE";
1607 }
1608 sym = symbol_find_or_make (inner_name);
1609 *name_end = c;
1610
1611 exprP->X_op = op;
1612 exprP->X_add_symbol = sym;
1613 exprP->X_add_number = 0;
1614 exprP->X_op_symbol = NULL;
1615 exprP->X_md = 0;
1616
1617 return 1;
1618 }
1619
1620 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1621 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1622 fixes resolving to constants should have those constants implicitly
1623 shifted) and FALSE otherwise, but look for C6X-specific expression
1624 types and adjust the relocations or give errors accordingly. */
1625
1626 static void
1627 tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp,
1628 int pcrel, bfd_reloc_code_real_type r_type,
1629 bfd_boolean fix_adda)
1630 {
1631 bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED;
1632 fixS *fix;
1633
1634 switch (exp->X_op)
1635 {
1636 case O_dsbt_index:
1637 switch (r_type)
1638 {
1639 case BFD_RELOC_C6000_SBR_U15_W:
1640 new_reloc = BFD_RELOC_C6000_DSBT_INDEX;
1641 break;
1642
1643 default:
1644 as_bad (_("$DSBT_INDEX not supported in this context"));
1645 return;
1646 }
1647 break;
1648
1649 case O_got:
1650 switch (r_type)
1651 {
1652 case BFD_RELOC_C6000_SBR_U15_W:
1653 new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W;
1654 break;
1655
1656 default:
1657 as_bad (_("$GOT not supported in this context"));
1658 return;
1659 }
1660 break;
1661
1662 case O_dpr_got:
1663 switch (r_type)
1664 {
1665 case BFD_RELOC_C6000_ABS_L16:
1666 new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W;
1667 break;
1668
1669 case BFD_RELOC_C6000_ABS_H16:
1670 new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W;
1671 break;
1672
1673 default:
1674 as_bad (_("$DPR_GOT not supported in this context"));
1675 return;
1676 }
1677 break;
1678
1679 case O_dpr_byte:
1680 switch (r_type)
1681 {
1682 case BFD_RELOC_C6000_ABS_S16:
1683 new_reloc = BFD_RELOC_C6000_SBR_S16;
1684 break;
1685
1686 case BFD_RELOC_C6000_ABS_L16:
1687 new_reloc = BFD_RELOC_C6000_SBR_L16_B;
1688 break;
1689
1690 case BFD_RELOC_C6000_ABS_H16:
1691 new_reloc = BFD_RELOC_C6000_SBR_H16_B;
1692 break;
1693
1694 default:
1695 as_bad (_("$DPR_BYTE not supported in this context"));
1696 return;
1697 }
1698 break;
1699
1700 case O_dpr_hword:
1701 switch (r_type)
1702 {
1703 case BFD_RELOC_C6000_ABS_L16:
1704 new_reloc = BFD_RELOC_C6000_SBR_L16_H;
1705 break;
1706
1707 case BFD_RELOC_C6000_ABS_H16:
1708 new_reloc = BFD_RELOC_C6000_SBR_H16_H;
1709 break;
1710
1711 default:
1712 as_bad (_("$DPR_HWORD not supported in this context"));
1713 return;
1714 }
1715 break;
1716
1717 case O_dpr_word:
1718 switch (r_type)
1719 {
1720 case BFD_RELOC_C6000_ABS_L16:
1721 new_reloc = BFD_RELOC_C6000_SBR_L16_W;
1722 break;
1723
1724 case BFD_RELOC_C6000_ABS_H16:
1725 new_reloc = BFD_RELOC_C6000_SBR_H16_W;
1726 break;
1727
1728 default:
1729 as_bad (_("$DPR_WORD not supported in this context"));
1730 return;
1731 }
1732 break;
1733
1734 case O_symbol:
1735 break;
1736
1737 default:
1738 if (pcrel)
1739 {
1740 as_bad (_("invalid PC-relative operand"));
1741 return;
1742 }
1743 break;
1744 }
1745
1746 if (new_reloc == BFD_RELOC_UNUSED)
1747 fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
1748 else
1749 fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number,
1750 pcrel, new_reloc);
1751 fix->tc_fix_data.fix_adda = fix_adda;
1752 }
1753
1754 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1755 go through the error checking in tic6x_fix_new_exp. */
1756
1757 void
1758 tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp)
1759 {
1760 bfd_reloc_code_real_type r_type;
1761
1762 switch (size)
1763 {
1764 case 1:
1765 r_type = BFD_RELOC_8;
1766 break;
1767
1768 case 2:
1769 r_type = BFD_RELOC_16;
1770 break;
1771
1772 case 4:
1773 r_type = BFD_RELOC_32;
1774 break;
1775
1776 default:
1777 as_bad (_("no %d-byte relocations available"), size);
1778 return;
1779 }
1780
1781 tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, FALSE);
1782 }
1783
1784 /* Initialize target-specific fix data. */
1785
1786 void
1787 tic6x_init_fix_data (fixS *fixP)
1788 {
1789 fixP->tc_fix_data.fix_adda = FALSE;
1790 }
1791
1792 /* Return true if the fix can be handled by GAS, false if it must
1793 be passed through to the linker. */
1794
1795 bfd_boolean
1796 tic6x_fix_adjustable (fixS *fixP)
1797 {
1798 switch (fixP->fx_r_type)
1799 {
1800 /* Adjust_reloc_syms doesn't know about the GOT. */
1801 case BFD_RELOC_C6000_SBR_GOT_U15_W:
1802 case BFD_RELOC_C6000_SBR_GOT_H16_W:
1803 case BFD_RELOC_C6000_SBR_GOT_L16_W:
1804 return 0;
1805
1806 default:
1807 return 1;
1808 }
1809 }
1810
1811 /* Given the fine-grained form of an operand, return the coarse
1812 (bit-mask) form. */
1813
1814 static unsigned int
1815 tic6x_coarse_operand_form (tic6x_operand_form form)
1816 {
1817 switch (form)
1818 {
1819 case tic6x_operand_asm_const:
1820 case tic6x_operand_link_const:
1821 return TIC6X_OP_EXP;
1822
1823 case tic6x_operand_reg:
1824 case tic6x_operand_xreg:
1825 case tic6x_operand_dreg:
1826 case tic6x_operand_areg:
1827 case tic6x_operand_retreg:
1828 return TIC6X_OP_REG;
1829
1830 case tic6x_operand_regpair:
1831 case tic6x_operand_xregpair:
1832 case tic6x_operand_dregpair:
1833 return TIC6X_OP_REGPAIR;
1834
1835 case tic6x_operand_irp:
1836 return TIC6X_OP_IRP;
1837
1838 case tic6x_operand_nrp:
1839 return TIC6X_OP_NRP;
1840
1841 case tic6x_operand_ctrl:
1842 return TIC6X_OP_CTRL;
1843
1844 case tic6x_operand_mem_short:
1845 case tic6x_operand_mem_long:
1846 case tic6x_operand_mem_deref:
1847 return TIC6X_OP_MEM_NOUNREG;
1848
1849 case tic6x_operand_mem_ndw:
1850 return TIC6X_OP_MEM_UNREG;
1851
1852 case tic6x_operand_func_unit:
1853 return TIC6X_OP_FUNC_UNIT;
1854
1855 default:
1856 abort ();
1857 }
1858 }
1859
1860 /* How an operand may match or not match a desired form. If different
1861 instruction alternatives fail in different ways, the first failure
1862 in this list determines the diagnostic. */
1863 typedef enum
1864 {
1865 /* Matches. */
1866 tic6x_match_matches,
1867 /* Bad coarse form. */
1868 tic6x_match_coarse,
1869 /* Not constant. */
1870 tic6x_match_non_const,
1871 /* Register on wrong side. */
1872 tic6x_match_wrong_side,
1873 /* Not a valid address register. */
1874 tic6x_match_bad_address,
1875 /* Not a valid return address register. */
1876 tic6x_match_bad_return,
1877 /* Control register not readable. */
1878 tic6x_match_ctrl_write_only,
1879 /* Control register not writable. */
1880 tic6x_match_ctrl_read_only,
1881 /* Not a valid memory reference for this instruction. */
1882 tic6x_match_bad_mem
1883 } tic6x_operand_match;
1884
1885 /* Return whether an operand matches the given fine-grained form and
1886 read/write usage, and, if it does not match, how it fails to match.
1887 The main functional unit side is SIDE; the cross-path side is CROSS
1888 (the same as SIDE if a cross path not used); the data side is
1889 DATA_SIDE. */
1890 static tic6x_operand_match
1891 tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form,
1892 tic6x_rw rw, unsigned int side, unsigned int cross,
1893 unsigned int data_side)
1894 {
1895 unsigned int coarse = tic6x_coarse_operand_form (form);
1896
1897 if (coarse != op->form)
1898 return tic6x_match_coarse;
1899
1900 switch (form)
1901 {
1902 case tic6x_operand_asm_const:
1903 if (op->value.exp.X_op == O_constant)
1904 return tic6x_match_matches;
1905 else
1906 return tic6x_match_non_const;
1907
1908 case tic6x_operand_link_const:
1909 case tic6x_operand_irp:
1910 case tic6x_operand_nrp:
1911 case tic6x_operand_func_unit:
1912 /* All expressions are link-time constants, although there may
1913 not be relocations to express them in the output file. "irp"
1914 and "nrp" are unique operand values. All parsed functional
1915 unit names are valid. */
1916 return tic6x_match_matches;
1917
1918 case tic6x_operand_reg:
1919 case tic6x_operand_regpair:
1920 if (op->value.reg.side == side)
1921 return tic6x_match_matches;
1922 else
1923 return tic6x_match_wrong_side;
1924
1925 case tic6x_operand_xreg:
1926 case tic6x_operand_xregpair:
1927 if (op->value.reg.side == cross)
1928 return tic6x_match_matches;
1929 else
1930 return tic6x_match_wrong_side;
1931
1932 case tic6x_operand_dreg:
1933 case tic6x_operand_dregpair:
1934 if (op->value.reg.side == data_side)
1935 return tic6x_match_matches;
1936 else
1937 return tic6x_match_wrong_side;
1938
1939 case tic6x_operand_areg:
1940 if (op->value.reg.side != cross)
1941 return tic6x_match_wrong_side;
1942 else if (op->value.reg.side == 2
1943 && (op->value.reg.num == 14 || op->value.reg.num == 15))
1944 return tic6x_match_matches;
1945 else
1946 return tic6x_match_bad_address;
1947
1948 case tic6x_operand_retreg:
1949 if (op->value.reg.side != side)
1950 return tic6x_match_wrong_side;
1951 else if (op->value.reg.num != 3)
1952 return tic6x_match_bad_return;
1953 else
1954 return tic6x_match_matches;
1955
1956 case tic6x_operand_ctrl:
1957 switch (rw)
1958 {
1959 case tic6x_rw_read:
1960 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read
1961 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
1962 return tic6x_match_matches;
1963 else
1964 return tic6x_match_ctrl_write_only;
1965
1966 case tic6x_rw_write:
1967 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write
1968 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
1969 return tic6x_match_matches;
1970 else
1971 return tic6x_match_ctrl_read_only;
1972
1973 default:
1974 abort ();
1975 }
1976
1977 case tic6x_operand_mem_deref:
1978 if (op->value.mem.mod != tic6x_mem_mod_none)
1979 return tic6x_match_bad_mem;
1980 else if (op->value.mem.scaled != tic6x_offset_none)
1981 abort ();
1982 else if (op->value.mem.base_reg.side != side)
1983 return tic6x_match_bad_mem;
1984 else
1985 return tic6x_match_matches;
1986
1987 case tic6x_operand_mem_short:
1988 case tic6x_operand_mem_ndw:
1989 if (op->value.mem.base_reg.side != side)
1990 return tic6x_match_bad_mem;
1991 if (op->value.mem.mod == tic6x_mem_mod_none)
1992 {
1993 if (op->value.mem.scaled != tic6x_offset_none)
1994 abort ();
1995 return tic6x_match_matches;
1996 }
1997 if (op->value.mem.scaled == tic6x_offset_none)
1998 {
1999 if (op->value.mem.mod == tic6x_mem_mod_plus
2000 || op->value.mem.mod == tic6x_mem_mod_minus)
2001 abort ();
2002 return tic6x_match_matches;
2003 }
2004 if (op->value.mem.offset_is_reg)
2005 {
2006 if (op->value.mem.scaled == tic6x_offset_unscaled
2007 && form != tic6x_operand_mem_ndw)
2008 abort ();
2009 if (op->value.mem.offset.reg.side == side)
2010 return tic6x_match_matches;
2011 else
2012 return tic6x_match_bad_mem;
2013 }
2014 else
2015 {
2016 if (op->value.mem.offset.exp.X_op == O_constant)
2017 return tic6x_match_matches;
2018 else
2019 return tic6x_match_bad_mem;
2020 }
2021
2022 case tic6x_operand_mem_long:
2023 if (op->value.mem.base_reg.side == 2
2024 && (op->value.mem.base_reg.num == 14
2025 || op->value.mem.base_reg.num == 15))
2026 {
2027 switch (op->value.mem.mod)
2028 {
2029 case tic6x_mem_mod_none:
2030 if (op->value.mem.scaled != tic6x_offset_none)
2031 abort ();
2032 return tic6x_match_matches;
2033
2034 case tic6x_mem_mod_plus:
2035 if (op->value.mem.scaled == tic6x_offset_none)
2036 abort ();
2037 if (op->value.mem.offset_is_reg)
2038 return tic6x_match_bad_mem;
2039 else if (op->value.mem.scaled == tic6x_offset_scaled
2040 && op->value.mem.offset.exp.X_op != O_constant)
2041 return tic6x_match_bad_mem;
2042 else
2043 return tic6x_match_matches;
2044
2045 case tic6x_mem_mod_minus:
2046 case tic6x_mem_mod_preinc:
2047 case tic6x_mem_mod_predec:
2048 case tic6x_mem_mod_postinc:
2049 case tic6x_mem_mod_postdec:
2050 return tic6x_match_bad_mem;
2051
2052 default:
2053 abort ();
2054 }
2055
2056 }
2057 else
2058 return tic6x_match_bad_mem;
2059
2060 default:
2061 abort ();
2062 }
2063 }
2064
2065 /* Return the number of bits shift used with DP-relative coding method
2066 CODING. */
2067
2068 static unsigned int
2069 tic6x_dpr_shift (tic6x_coding_method coding)
2070 {
2071 switch (coding)
2072 {
2073 case tic6x_coding_ulcst_dpr_byte:
2074 return 0;
2075
2076 case tic6x_coding_ulcst_dpr_half:
2077 return 1;
2078
2079 case tic6x_coding_ulcst_dpr_word:
2080 return 2;
2081
2082 default:
2083 abort ();
2084 }
2085 }
2086
2087 /* Return the relocation used with DP-relative coding method
2088 CODING. */
2089
2090 static bfd_reloc_code_real_type
2091 tic6x_dpr_reloc (tic6x_coding_method coding)
2092 {
2093 switch (coding)
2094 {
2095 case tic6x_coding_ulcst_dpr_byte:
2096 return BFD_RELOC_C6000_SBR_U15_B;
2097
2098 case tic6x_coding_ulcst_dpr_half:
2099 return BFD_RELOC_C6000_SBR_U15_H;
2100
2101 case tic6x_coding_ulcst_dpr_word:
2102 return BFD_RELOC_C6000_SBR_U15_W;
2103
2104 default:
2105 abort ();
2106 }
2107 }
2108
2109 /* Given a memory reference *MEM_REF as originally parsed, fill in
2110 defaults for missing offsets. */
2111
2112 static void
2113 tic6x_default_mem_ref (tic6x_mem_ref *mem_ref)
2114 {
2115 switch (mem_ref->mod)
2116 {
2117 case tic6x_mem_mod_none:
2118 if (mem_ref->scaled != tic6x_offset_none)
2119 abort ();
2120 mem_ref->mod = tic6x_mem_mod_plus;
2121 mem_ref->scaled = tic6x_offset_unscaled;
2122 mem_ref->offset_is_reg = FALSE;
2123 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2124 mem_ref->offset.exp.X_op = O_constant;
2125 mem_ref->offset.exp.X_add_number = 0;
2126 mem_ref->offset.exp.X_unsigned = 0;
2127 break;
2128
2129 case tic6x_mem_mod_plus:
2130 case tic6x_mem_mod_minus:
2131 if (mem_ref->scaled == tic6x_offset_none)
2132 abort ();
2133 break;
2134
2135 case tic6x_mem_mod_preinc:
2136 case tic6x_mem_mod_predec:
2137 case tic6x_mem_mod_postinc:
2138 case tic6x_mem_mod_postdec:
2139 if (mem_ref->scaled != tic6x_offset_none)
2140 break;
2141 mem_ref->scaled = tic6x_offset_scaled;
2142 mem_ref->offset_is_reg = FALSE;
2143 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2144 mem_ref->offset.exp.X_op = O_constant;
2145 mem_ref->offset.exp.X_add_number = 1;
2146 mem_ref->offset.exp.X_unsigned = 0;
2147 break;
2148
2149 default:
2150 abort ();
2151 }
2152 }
2153
2154 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2155 instruction of the specified UNIT, side SIDE. */
2156
2157 static unsigned int
2158 tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side)
2159 {
2160 switch (unit)
2161 {
2162 case tic6x_func_unit_l:
2163 return 1 << (side - 1);
2164
2165 case tic6x_func_unit_s:
2166 return 1 << (side + 1);
2167
2168 case tic6x_func_unit_d:
2169 return 1 << (side + 3);
2170
2171 case tic6x_func_unit_m:
2172 return 1 << (side + 5);
2173
2174 default:
2175 abort ();
2176 }
2177 }
2178
2179 /* Try to encode the instruction with opcode number ID and operands
2180 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2181 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2182 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2183 SPLOOP_II is the ii value from the previous SPLOOP-family
2184 instruction, or 0 if not in such a loop; the only possible problems
2185 are operands being out of range (they already match the
2186 fine-grained form), and inappropriate predication. If this
2187 succeeds, return the encoding and set *OK to TRUE; otherwise return
2188 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2189 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2190 Print error messages for failure if PRINT_ERRORS is TRUE; the
2191 opcode starts at STR and has length OPC_LEN. */
2192
2193 static unsigned int
2194 tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
2195 unsigned int num_operands, unsigned int this_line_creg,
2196 unsigned int this_line_z, unsigned int func_unit_side,
2197 unsigned int func_unit_cross,
2198 unsigned int func_unit_data_side, int sploop_ii,
2199 expressionS **fix_exp, int *fix_pcrel,
2200 bfd_reloc_code_real_type *fx_r_type, bfd_boolean *fix_adda,
2201 bfd_boolean *fix_needed, bfd_boolean *ok,
2202 bfd_boolean print_errors, char *str, int opc_len)
2203 {
2204 const tic6x_opcode *opct;
2205 const tic6x_insn_format *fmt;
2206 unsigned int opcode_value;
2207 unsigned int fld;
2208
2209 opct = &tic6x_opcode_table[id];
2210 fmt = &tic6x_insn_format_table[opct->format];
2211 opcode_value = fmt->cst_bits;
2212
2213 for (fld = 0; fld < opct->num_fixed_fields; fld++)
2214 {
2215 if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val)
2216 {
2217 const tic6x_insn_field *fldd;
2218 fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
2219 if (fldd == NULL)
2220 abort ();
2221 opcode_value |= opct->fixed_fields[fld].min_val << fldd->low_pos;
2222 }
2223 }
2224
2225 for (fld = 0; fld < opct->num_variable_fields; fld++)
2226 {
2227 const tic6x_insn_field *fldd;
2228 unsigned int value;
2229 unsigned int opno;
2230 unsigned int ffld;
2231 offsetT sign_value;
2232 unsigned int bits;
2233 unsigned int fcyc_bits;
2234 expressionS *expp;
2235 expressionS ucexp;
2236 tic6x_mem_ref mem;
2237
2238 fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id);
2239 if (fldd == NULL)
2240 abort ();
2241 opno = opct->variable_fields[fld].operand_num;
2242 switch (opct->variable_fields[fld].coding_method)
2243 {
2244 case tic6x_coding_ucst:
2245 if (operands[opno].form != TIC6X_OP_EXP)
2246 abort ();
2247 if (operands[opno].value.exp.X_op != O_constant)
2248 abort ();
2249 ucexp = operands[opno].value.exp;
2250 unsigned_constant:
2251 if (ucexp.X_add_number < 0
2252 || ucexp.X_add_number >= (1 << fldd->width))
2253 {
2254 if (print_errors)
2255 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2256 opc_len, str);
2257 *ok = FALSE;
2258 return 0;
2259 }
2260 value = ucexp.X_add_number;
2261 break;
2262
2263 case tic6x_coding_scst:
2264 if (operands[opno].form != TIC6X_OP_EXP)
2265 abort ();
2266 if (operands[opno].value.exp.X_op != O_constant)
2267 {
2268 value = 0;
2269 /* Opcode table should not permit non-constants without
2270 a known relocation for them. */
2271 if (fldd->low_pos != 7 || fldd->width != 16)
2272 abort ();
2273 *fix_needed = TRUE;
2274 *fix_exp = &operands[opno].value.exp;
2275 *fix_pcrel = 0;
2276 *fx_r_type = BFD_RELOC_C6000_ABS_S16;
2277 *fix_adda = FALSE;
2278 break;
2279 }
2280 sign_value = SEXT (operands[opno].value.exp.X_add_number);
2281 signed_constant:
2282 if (sign_value < -(1 << (fldd->width - 1))
2283 || (sign_value >= (1 << (fldd->width - 1))))
2284 {
2285 if (print_errors)
2286 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2287 opc_len, str);
2288 *ok = FALSE;
2289 return 0;
2290 }
2291 value = sign_value + (1 << (fldd->width - 1));
2292 value ^= (1 << (fldd->width - 1));
2293 break;
2294
2295 case tic6x_coding_ucst_minus_one:
2296 if (operands[opno].form != TIC6X_OP_EXP)
2297 abort ();
2298 if (operands[opno].value.exp.X_op != O_constant)
2299 abort ();
2300 if (operands[opno].value.exp.X_add_number <= 0
2301 || operands[opno].value.exp.X_add_number > (1 << fldd->width))
2302 {
2303 if (print_errors)
2304 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2305 opc_len, str);
2306 *ok = FALSE;
2307 return 0;
2308 }
2309 value = operands[opno].value.exp.X_add_number - 1;
2310 break;
2311
2312 case tic6x_coding_scst_negate:
2313 if (operands[opno].form != TIC6X_OP_EXP)
2314 abort ();
2315 if (operands[opno].value.exp.X_op != O_constant)
2316 abort ();
2317 sign_value = SEXT (-operands[opno].value.exp.X_add_number);
2318 goto signed_constant;
2319
2320 case tic6x_coding_ulcst_dpr_byte:
2321 case tic6x_coding_ulcst_dpr_half:
2322 case tic6x_coding_ulcst_dpr_word:
2323 bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method);
2324 switch (operands[opno].form)
2325 {
2326 case TIC6X_OP_EXP:
2327 if (operands[opno].value.exp.X_op == O_constant)
2328 {
2329 ucexp = operands[opno].value.exp;
2330 goto unsigned_constant;
2331 }
2332 expp = &operands[opno].value.exp;
2333 break;
2334
2335 case TIC6X_OP_MEM_NOUNREG:
2336 mem = operands[opno].value.mem;
2337 tic6x_default_mem_ref (&mem);
2338 if (mem.offset_is_reg)
2339 abort ();
2340 if (mem.offset.exp.X_op == O_constant)
2341 {
2342 ucexp = mem.offset.exp;
2343 if (mem.scaled == tic6x_offset_unscaled)
2344 {
2345 if (ucexp.X_add_number & ((1 << bits) - 1))
2346 {
2347 if (print_errors)
2348 as_bad (_("offset in operand %u of '%.*s' not "
2349 "divisible by %u"), opno + 1, opc_len,
2350 str, 1u << bits);
2351 *ok = FALSE;
2352 return 0;
2353 }
2354 ucexp.X_add_number >>= bits;
2355 }
2356 goto unsigned_constant;
2357 }
2358 if (mem.scaled != tic6x_offset_unscaled)
2359 abort ();
2360 if (operands[opno].value.mem.mod == tic6x_mem_mod_none
2361 || operands[opno].value.mem.scaled != tic6x_offset_unscaled
2362 || operands[opno].value.mem.offset_is_reg)
2363 abort ();
2364 expp = &operands[opno].value.mem.offset.exp;
2365 break;
2366
2367 default:
2368 abort ();
2369 }
2370 value = 0;
2371 /* Opcode table should not use this encoding without a known
2372 relocation. */
2373 if (fldd->low_pos != 8 || fldd->width != 15)
2374 abort ();
2375 /* We do not check for offset divisibility here; such a
2376 check is not needed at this point to encode the value,
2377 and if there is eventually a problem it will be detected
2378 either in md_apply_fix or at link time. */
2379 *fix_needed = TRUE;
2380 *fix_exp = expp;
2381 *fix_pcrel = 0;
2382 *fx_r_type
2383 = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method);
2384 if (operands[opno].form == TIC6X_OP_EXP)
2385 *fix_adda = TRUE;
2386 else
2387 *fix_adda = FALSE;
2388 break;
2389
2390 case tic6x_coding_lcst_low16:
2391 if (operands[opno].form != TIC6X_OP_EXP)
2392 abort ();
2393 if (operands[opno].value.exp.X_op == O_constant)
2394 value = operands[opno].value.exp.X_add_number & 0xffff;
2395 else
2396 {
2397 value = 0;
2398 /* Opcode table should not use this encoding without a
2399 known relocation. */
2400 if (fldd->low_pos != 7 || fldd->width != 16)
2401 abort ();
2402 *fix_needed = TRUE;
2403 *fix_exp = &operands[opno].value.exp;
2404 *fix_pcrel = 0;
2405 *fx_r_type = BFD_RELOC_C6000_ABS_L16;
2406 *fix_adda = FALSE;
2407 }
2408 break;
2409
2410 case tic6x_coding_lcst_high16:
2411 if (operands[opno].form != TIC6X_OP_EXP)
2412 abort ();
2413 if (operands[opno].value.exp.X_op == O_constant)
2414 value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff;
2415 else
2416 {
2417 value = 0;
2418 /* Opcode table should not use this encoding without a
2419 known relocation. */
2420 if (fldd->low_pos != 7 || fldd->width != 16)
2421 abort ();
2422 *fix_needed = TRUE;
2423 *fix_exp = &operands[opno].value.exp;
2424 *fix_pcrel = 0;
2425 *fx_r_type = BFD_RELOC_C6000_ABS_H16;
2426 *fix_adda = FALSE;
2427 }
2428 break;
2429
2430 case tic6x_coding_pcrel:
2431 case tic6x_coding_pcrel_half:
2432 if (operands[opno].form != TIC6X_OP_EXP)
2433 abort ();
2434 value = 0;
2435 *fix_needed = TRUE;
2436 *fix_exp = &operands[opno].value.exp;
2437 *fix_pcrel = 1;
2438 if (fldd->low_pos == 7 && fldd->width == 21)
2439 *fx_r_type = BFD_RELOC_C6000_PCR_S21;
2440 else if (fldd->low_pos == 16 && fldd->width == 12)
2441 *fx_r_type = BFD_RELOC_C6000_PCR_S12;
2442 else if (fldd->low_pos == 13 && fldd->width == 10)
2443 *fx_r_type = BFD_RELOC_C6000_PCR_S10;
2444 else if (fldd->low_pos == 16 && fldd->width == 7)
2445 *fx_r_type = BFD_RELOC_C6000_PCR_S7;
2446 else
2447 /* Opcode table should not use this encoding without a
2448 known relocation. */
2449 abort ();
2450 *fix_adda = FALSE;
2451 break;
2452
2453 case tic6x_coding_reg:
2454 switch (operands[opno].form)
2455 {
2456 case TIC6X_OP_REG:
2457 case TIC6X_OP_REGPAIR:
2458 value = operands[opno].value.reg.num;
2459 break;
2460
2461 case TIC6X_OP_MEM_NOUNREG:
2462 case TIC6X_OP_MEM_UNREG:
2463 value = operands[opno].value.mem.base_reg.num;
2464 break;
2465
2466 default:
2467 abort ();
2468 }
2469 break;
2470
2471 case tic6x_coding_areg:
2472 switch (operands[opno].form)
2473 {
2474 case TIC6X_OP_REG:
2475 value = (operands[opno].value.reg.num == 15 ? 1 : 0);
2476 break;
2477
2478 case TIC6X_OP_MEM_NOUNREG:
2479 value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0);
2480 break;
2481
2482 default:
2483 abort ();
2484 }
2485 break;
2486
2487 case tic6x_coding_crlo:
2488 if (operands[opno].form != TIC6X_OP_CTRL)
2489 abort ();
2490 value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo;
2491 break;
2492
2493 case tic6x_coding_crhi:
2494 if (operands[opno].form != TIC6X_OP_CTRL)
2495 abort ();
2496 value = 0;
2497 break;
2498
2499 case tic6x_coding_reg_shift:
2500 if (operands[opno].form != TIC6X_OP_REGPAIR)
2501 abort ();
2502 value = operands[opno].value.reg.num >> 1;
2503 break;
2504
2505 case tic6x_coding_mem_offset:
2506 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG)
2507 abort ();
2508 mem = operands[opno].value.mem;
2509 tic6x_default_mem_ref (&mem);
2510 if (mem.offset_is_reg)
2511 {
2512 if (mem.scaled != tic6x_offset_scaled)
2513 abort ();
2514 value = mem.offset.reg.num;
2515 }
2516 else
2517 {
2518 int scale;
2519
2520 if (mem.offset.exp.X_op != O_constant)
2521 abort ();
2522 switch (mem.scaled)
2523 {
2524 case tic6x_offset_scaled:
2525 scale = 1;
2526 break;
2527
2528 case tic6x_offset_unscaled:
2529 scale = opct->operand_info[opno].size;
2530 if (scale != 1 && scale != 2 && scale != 4 && scale != 8)
2531 abort ();
2532 break;
2533
2534 default:
2535 abort ();
2536 }
2537 if (mem.offset.exp.X_add_number < 0
2538 || mem.offset.exp.X_add_number >= (1 << fldd->width) * scale)
2539 {
2540 if (print_errors)
2541 as_bad (_("offset in operand %u of '%.*s' out of range"),
2542 opno + 1, opc_len, str);
2543 *ok = FALSE;
2544 return 0;
2545 }
2546 if (mem.offset.exp.X_add_number % scale)
2547 {
2548 if (print_errors)
2549 as_bad (_("offset in operand %u of '%.*s' not "
2550 "divisible by %u"),
2551 opno + 1, opc_len, str, scale);
2552 *ok = FALSE;
2553 return 0;
2554 }
2555 value = mem.offset.exp.X_add_number / scale;
2556 }
2557 break;
2558
2559 case tic6x_coding_mem_offset_noscale:
2560 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2561 abort ();
2562 mem = operands[opno].value.mem;
2563 tic6x_default_mem_ref (&mem);
2564 if (mem.offset_is_reg)
2565 value = mem.offset.reg.num;
2566 else
2567 {
2568 if (mem.offset.exp.X_op != O_constant)
2569 abort ();
2570 if (mem.offset.exp.X_add_number < 0
2571 || mem.offset.exp.X_add_number >= (1 << fldd->width))
2572 {
2573 if (print_errors)
2574 as_bad (_("offset in operand %u of '%.*s' out of range"),
2575 opno + 1, opc_len, str);
2576 *ok = FALSE;
2577 return 0;
2578 }
2579 value = mem.offset.exp.X_add_number;
2580 }
2581 break;
2582
2583 case tic6x_coding_mem_mode:
2584 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG
2585 && operands[opno].form != TIC6X_OP_MEM_UNREG)
2586 abort ();
2587 mem = operands[opno].value.mem;
2588 tic6x_default_mem_ref (&mem);
2589 switch (mem.mod)
2590 {
2591 case tic6x_mem_mod_plus:
2592 value = 1;
2593 break;
2594
2595 case tic6x_mem_mod_minus:
2596 value = 0;
2597 break;
2598
2599 case tic6x_mem_mod_preinc:
2600 value = 9;
2601 break;
2602
2603 case tic6x_mem_mod_predec:
2604 value = 8;
2605 break;
2606
2607 case tic6x_mem_mod_postinc:
2608 value = 11;
2609 break;
2610
2611 case tic6x_mem_mod_postdec:
2612 value = 10;
2613 break;
2614
2615 default:
2616 abort ();
2617 }
2618 value += (mem.offset_is_reg ? 4 : 0);
2619 break;
2620
2621 case tic6x_coding_scaled:
2622 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2623 abort ();
2624 mem = operands[opno].value.mem;
2625 tic6x_default_mem_ref (&mem);
2626 switch (mem.scaled)
2627 {
2628 case tic6x_offset_unscaled:
2629 value = 0;
2630 break;
2631
2632 case tic6x_offset_scaled:
2633 value = 1;
2634 break;
2635
2636 default:
2637 abort ();
2638 }
2639 break;
2640
2641 case tic6x_coding_spmask:
2642 /* The position of such a field is hardcoded in the handling
2643 of "||^". */
2644 if (fldd->low_pos != 18)
2645 abort ();
2646 value = 0;
2647 for (opno = 0; opno < num_operands; opno++)
2648 {
2649 unsigned int v;
2650
2651 v = tic6x_encode_spmask (operands[opno].value.func_unit.base,
2652 operands[opno].value.func_unit.side);
2653 if (value & v)
2654 {
2655 if (print_errors)
2656 as_bad (_("functional unit already masked for operand "
2657 "%u of '%.*s'"), opno + 1, opc_len, str);
2658 *ok = FALSE;
2659 return 0;
2660 }
2661 value |= v;
2662 }
2663 break;
2664
2665 case tic6x_coding_reg_unused:
2666 /* This is a placeholder; correct handling goes along with
2667 resource constraint checks. */
2668 value = 0;
2669 break;
2670
2671 case tic6x_coding_fstg:
2672 case tic6x_coding_fcyc:
2673 if (operands[opno].form != TIC6X_OP_EXP)
2674 abort ();
2675 if (operands[opno].value.exp.X_op != O_constant)
2676 abort ();
2677 if (!sploop_ii)
2678 {
2679 if (print_errors)
2680 as_bad (_("'%.*s' instruction not in a software "
2681 "pipelined loop"),
2682 opc_len, str);
2683 *ok = FALSE;
2684 return 0;
2685 }
2686
2687 if (sploop_ii <= 1)
2688 fcyc_bits = 0;
2689 else if (sploop_ii <= 2)
2690 fcyc_bits = 1;
2691 else if (sploop_ii <= 4)
2692 fcyc_bits = 2;
2693 else if (sploop_ii <= 8)
2694 fcyc_bits = 3;
2695 else if (sploop_ii <= 14)
2696 fcyc_bits = 4;
2697 else
2698 abort ();
2699 if (fcyc_bits > fldd->width)
2700 abort ();
2701
2702 if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
2703 {
2704 int i, t;
2705 if (operands[opno].value.exp.X_add_number < 0
2706 || (operands[opno].value.exp.X_add_number
2707 >= (1 << (fldd->width - fcyc_bits))))
2708 {
2709 if (print_errors)
2710 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2711 opc_len, str);
2712 *ok = FALSE;
2713 return 0;
2714 }
2715 value = operands[opno].value.exp.X_add_number;
2716 for (t = 0, i = fcyc_bits; i < fldd->width; i++)
2717 {
2718 t = (t << 1) | (value & 1);
2719 value >>= 1;
2720 }
2721 value = t << fcyc_bits;
2722 }
2723 else
2724 {
2725 if (operands[opno].value.exp.X_add_number < 0
2726 || (operands[opno].value.exp.X_add_number >= sploop_ii))
2727 {
2728 if (print_errors)
2729 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2730 opc_len, str);
2731 *ok = FALSE;
2732 return 0;
2733 }
2734 value = operands[opno].value.exp.X_add_number;
2735 }
2736 break;
2737
2738 case tic6x_coding_fu:
2739 value = func_unit_side == 2 ? 1 : 0;
2740 break;
2741
2742 case tic6x_coding_data_fu:
2743 value = func_unit_data_side == 2 ? 1 : 0;
2744 break;
2745
2746 case tic6x_coding_xpath:
2747 value = func_unit_cross;
2748 break;
2749
2750 default:
2751 abort ();
2752 }
2753
2754 for (ffld = 0; ffld < opct->num_fixed_fields; ffld++)
2755 if ((opct->fixed_fields[ffld].field_id
2756 == opct->variable_fields[fld].field_id)
2757 && (value < opct->fixed_fields[ffld].min_val
2758 || value > opct->fixed_fields[ffld].max_val))
2759 {
2760 if (print_errors)
2761 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2762 opc_len, str);
2763 *ok = FALSE;
2764 return 0;
2765 }
2766
2767 opcode_value |= value << fldd->low_pos;
2768 }
2769
2770 if (this_line_creg)
2771 {
2772 const tic6x_insn_field *creg;
2773 const tic6x_insn_field *z;
2774
2775 creg = tic6x_field_from_fmt (fmt, tic6x_field_creg);
2776 if (creg == NULL)
2777 {
2778 if (print_errors)
2779 as_bad (_("instruction '%.*s' cannot be predicated"),
2780 opc_len, str);
2781 *ok = FALSE;
2782 return 0;
2783 }
2784 z = tic6x_field_from_fmt (fmt, tic6x_field_z);
2785 /* If there is a creg field, there must be a z field; otherwise
2786 there is an error in the format table. */
2787 if (z == NULL)
2788 abort ();
2789
2790 opcode_value |= this_line_creg << creg->low_pos;
2791 opcode_value |= this_line_z << z->low_pos;
2792 }
2793
2794 *ok = TRUE;
2795 return opcode_value;
2796 }
2797
2798 /* Convert the target integer stored in N bytes in BUF to a host
2799 integer, returning that value. */
2800
2801 static valueT
2802 md_chars_to_number (char *buf, int n)
2803 {
2804 valueT result = 0;
2805 unsigned char *p = (unsigned char *) buf;
2806
2807 if (target_big_endian)
2808 {
2809 while (n--)
2810 {
2811 result <<= 8;
2812 result |= (*p++ & 0xff);
2813 }
2814 }
2815 else
2816 {
2817 while (n--)
2818 {
2819 result <<= 8;
2820 result |= (p[n] & 0xff);
2821 }
2822 }
2823
2824 return result;
2825 }
2826
2827 /* Assemble the instruction starting at STR (an opcode, with the
2828 opcode name all-lowercase). */
2829
2830 void
2831 md_assemble (char *str)
2832 {
2833 char *p;
2834 int opc_len;
2835 bfd_boolean this_line_parallel;
2836 bfd_boolean this_line_spmask;
2837 unsigned int this_line_creg;
2838 unsigned int this_line_z;
2839 tic6x_label_list *this_insn_label_list;
2840 segment_info_type *seginfo;
2841 tic6x_opcode_list *opc_list, *opc;
2842 tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu;
2843 unsigned int func_unit_side = 0;
2844 unsigned int func_unit_cross = 0;
2845 unsigned int cross_side = 0;
2846 unsigned int func_unit_data_side = 0;
2847 unsigned int max_matching_opcodes, num_matching_opcodes;
2848 tic6x_opcode_id *opcm = NULL;
2849 unsigned int opc_rank[TIC6X_NUM_PREFER];
2850 const tic6x_opcode *opct = NULL;
2851 int min_rank, try_rank, max_rank;
2852 bfd_boolean num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1]
2853 = { FALSE };
2854 unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 };
2855 tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS];
2856 unsigned int max_num_operands;
2857 unsigned int num_operands_read;
2858 bfd_boolean ok_this_arch, ok_this_fu, ok_this_arch_fu;
2859 bfd_boolean bad_operands = FALSE;
2860 unsigned int opcode_value;
2861 bfd_boolean encoded_ok;
2862 bfd_boolean fix_needed = FALSE;
2863 expressionS *fix_exp = NULL;
2864 int fix_pcrel = 0;
2865 bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED;
2866 bfd_boolean fix_adda = FALSE;
2867 fragS *insn_frag;
2868 char *output;
2869
2870 p = str;
2871 while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ')
2872 p++;
2873
2874 /* This function should only have been called when there is actually
2875 an instruction to assemble. */
2876 if (p == str)
2877 abort ();
2878
2879 /* Now an instruction has been seen, architecture attributes from
2880 .arch directives merge with rather than overriding the previous
2881 value. */
2882 tic6x_seen_insns = TRUE;
2883 /* If no .arch directives or -march options have been seen, we are
2884 assessing instruction validity based on the C674X default, so set
2885 the attribute accordingly. */
2886 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
2887 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
2888
2889 /* Reset global settings for parallel bars and predicates now to
2890 avoid extra errors if there are problems with this opcode. */
2891 this_line_parallel = tic6x_line_parallel;
2892 this_line_spmask = tic6x_line_spmask;
2893 this_line_creg = tic6x_line_creg;
2894 this_line_z = tic6x_line_z;
2895 tic6x_line_parallel = FALSE;
2896 tic6x_line_spmask = FALSE;
2897 tic6x_line_creg = 0;
2898 tic6x_line_z = 0;
2899 seginfo = seg_info (now_seg);
2900 this_insn_label_list = seginfo->tc_segment_info_data.label_list;
2901 seginfo->tc_segment_info_data.label_list = NULL;
2902
2903 opc_list = hash_find_n (opcode_hash, str, p - str);
2904 if (opc_list == NULL)
2905 {
2906 char c = *p;
2907 *p = 0;
2908 as_bad (_("unknown opcode '%s'"), str);
2909 *p = c;
2910 return;
2911 }
2912
2913 opc_len = p - str;
2914 skip_whitespace (p);
2915
2916 /* See if there is something that looks like a functional unit
2917 specifier. */
2918 if (*p == '.')
2919 {
2920 bfd_boolean good_func_unit;
2921 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
2922 unsigned int maybe_side = 0;
2923 unsigned int maybe_cross = 0;
2924 unsigned int maybe_data_side = 0;
2925
2926 good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base,
2927 &maybe_side);
2928
2929 if (good_func_unit)
2930 {
2931 if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]])
2932 p += 3;
2933 else if ((p[3] == 'x' || p[3] == 'X')
2934 && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]]))
2935 {
2936 maybe_cross = 1;
2937 p += 4;
2938 }
2939 else if (maybe_base == tic6x_func_unit_d
2940 && (p[3] == 't' || p[3] == 'T')
2941 && (p[4] == '1' || p[4] == '2')
2942 && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]]))
2943 {
2944 maybe_data_side = p[4] - '0';
2945 p += 5;
2946 }
2947 else
2948 good_func_unit = FALSE;
2949 }
2950
2951 if (good_func_unit)
2952 {
2953 func_unit_base = maybe_base;
2954 func_unit_side = maybe_side;
2955 func_unit_cross = maybe_cross;
2956 cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side);
2957 func_unit_data_side = maybe_data_side;
2958 }
2959
2960 skip_whitespace (p);
2961 }
2962
2963 /* Determine which entries in the opcode table match, and the
2964 associated permitted forms of operands. */
2965 max_matching_opcodes = 0;
2966 for (opc = opc_list; opc; opc = opc->next)
2967 max_matching_opcodes++;
2968 num_matching_opcodes = 0;
2969 opcm = xmalloc (max_matching_opcodes * sizeof (*opcm));
2970 max_num_operands = 0;
2971 ok_this_arch = FALSE;
2972 ok_this_fu = FALSE;
2973 ok_this_arch_fu = FALSE;
2974 for (opc = opc_list; opc; opc = opc->next)
2975 {
2976 unsigned int num_operands;
2977 unsigned int i;
2978 bfd_boolean this_opc_arch_ok = TRUE;
2979 bfd_boolean this_opc_fu_ok = TRUE;
2980
2981 if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits
2982 != 32)
2983 continue;
2984 if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features))
2985 this_opc_arch_ok = FALSE;
2986 if (tic6x_opcode_table[opc->id].func_unit != func_unit_base)
2987 this_opc_fu_ok = FALSE;
2988 if (func_unit_side == 1
2989 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY))
2990 this_opc_fu_ok = FALSE;
2991 if (func_unit_cross
2992 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS))
2993 this_opc_fu_ok = FALSE;
2994 if (!func_unit_data_side
2995 && (tic6x_opcode_table[opc->id].flags
2996 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
2997 this_opc_fu_ok = FALSE;
2998 if (func_unit_data_side
2999 && !(tic6x_opcode_table[opc->id].flags
3000 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
3001 this_opc_fu_ok = FALSE;
3002 if (func_unit_data_side == 1
3003 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY))
3004 this_opc_fu_ok = FALSE;
3005 if (this_opc_arch_ok)
3006 ok_this_arch = TRUE;
3007 if (this_opc_fu_ok)
3008 ok_this_fu = TRUE;
3009 if (!this_opc_arch_ok || !this_opc_fu_ok)
3010 continue;
3011 ok_this_arch_fu = TRUE;
3012 opcm[num_matching_opcodes] = opc->id;
3013 num_matching_opcodes++;
3014 num_operands = tic6x_opcode_table[opc->id].num_operands;
3015
3016 if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK)
3017 {
3018 if (num_operands != 1
3019 || (tic6x_opcode_table[opc->id].operand_info[0].form
3020 != tic6x_operand_func_unit))
3021 abort ();
3022 num_operands = 8;
3023 for (i = 0; i < num_operands; i++)
3024 {
3025 operand_forms[i]
3026 |= tic6x_coarse_operand_form (tic6x_operand_func_unit);
3027 num_operands_permitted[i] = TRUE;
3028 }
3029 }
3030 else
3031 {
3032 for (i = 0; i < num_operands; i++)
3033 {
3034 tic6x_operand_form f
3035 = tic6x_opcode_table[opc->id].operand_info[i].form;
3036
3037 operand_forms[i] |= tic6x_coarse_operand_form (f);
3038 }
3039 }
3040 num_operands_permitted[num_operands] = TRUE;
3041 if (num_operands > max_num_operands)
3042 max_num_operands = num_operands;
3043 }
3044
3045 if (!ok_this_arch)
3046 {
3047 as_bad (_("'%.*s' instruction not supported on this architecture"),
3048 opc_len, str);
3049 free (opcm);
3050 return;
3051 }
3052
3053 if (!ok_this_fu)
3054 {
3055 as_bad (_("'%.*s' instruction not supported on this functional unit"),
3056 opc_len, str);
3057 free (opcm);
3058 return;
3059 }
3060
3061 if (!ok_this_arch_fu)
3062 {
3063 as_bad (_("'%.*s' instruction not supported on this functional unit"
3064 " for this architecture"),
3065 opc_len, str);
3066 free (opcm);
3067 return;
3068 }
3069
3070 /* If there were no instructions matching the above availability
3071 checks, we should now have given an error and returned. */
3072 if (num_matching_opcodes == 0)
3073 abort ();
3074
3075 num_operands_read = 0;
3076 while (TRUE)
3077 {
3078 skip_whitespace (p);
3079 if (is_end_of_line[(unsigned char) *p])
3080 {
3081 if (num_operands_read > 0)
3082 {
3083 as_bad (_("missing operand after comma"));
3084 bad_operands = TRUE;
3085 }
3086 break;
3087 }
3088
3089 if (max_num_operands == 0)
3090 {
3091 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3092 bad_operands = TRUE;
3093 break;
3094 }
3095
3096 if (!tic6x_parse_operand (&p, &operands[num_operands_read],
3097 operand_forms[num_operands_read], str, opc_len,
3098 num_operands_read + 1))
3099 bad_operands = TRUE;
3100 num_operands_read++;
3101
3102 if (is_end_of_line[(unsigned char) *p])
3103 break;
3104 else if (*p == ',')
3105 {
3106 p++;
3107 if (num_operands_read == max_num_operands)
3108 {
3109 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3110 bad_operands = TRUE;
3111 break;
3112 }
3113 continue;
3114 }
3115 else
3116 /* Operand parsing should consume whole operands. */
3117 abort ();
3118 }
3119
3120 if (!bad_operands && !num_operands_permitted[num_operands_read])
3121 {
3122 as_bad (_("bad number of operands to '%.*s'"), opc_len, str);
3123 bad_operands = TRUE;
3124 }
3125
3126 if (!bad_operands)
3127 {
3128 /* Each operand is of the right syntactic form for some opcode
3129 choice, and the number of operands is valid. Check that each
3130 operand is OK in detail for some opcode choice with the right
3131 number of operands. */
3132 unsigned int i;
3133
3134 for (i = 0; i < num_operands_read; i++)
3135 {
3136 bfd_boolean coarse_ok = FALSE;
3137 bfd_boolean fine_ok = FALSE;
3138 tic6x_operand_match fine_failure = tic6x_match_matches;
3139 unsigned int j;
3140
3141 for (j = 0; j < num_matching_opcodes; j++)
3142 {
3143 tic6x_operand_form f;
3144 tic6x_rw rw;
3145 unsigned int cf;
3146 tic6x_operand_match this_fine_failure;
3147
3148 if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK)
3149 {
3150 f = tic6x_operand_func_unit;
3151 rw = tic6x_rw_none;
3152 }
3153 else
3154 {
3155 if (tic6x_opcode_table[opcm[j]].num_operands
3156 != num_operands_read)
3157 continue;
3158
3159 f = tic6x_opcode_table[opcm[j]].operand_info[i].form;
3160 rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw;
3161 }
3162 cf = tic6x_coarse_operand_form (f);
3163
3164 if (operands[i].form != cf)
3165 continue;
3166
3167 coarse_ok = TRUE;
3168 this_fine_failure
3169 = tic6x_operand_matches_form (&operands[i], f, rw,
3170 func_unit_side,
3171 cross_side,
3172 func_unit_data_side);
3173 if (this_fine_failure == tic6x_match_matches)
3174 {
3175 fine_ok = TRUE;
3176 break;
3177 }
3178 if (fine_failure == tic6x_match_matches
3179 || fine_failure > this_fine_failure)
3180 fine_failure = this_fine_failure;
3181 }
3182
3183 /* No instructions should have operand syntactic forms only
3184 acceptable with certain numbers of operands, so no
3185 diagnostic for this case. */
3186 if (!coarse_ok)
3187 abort ();
3188
3189 if (!fine_ok)
3190 {
3191 switch (fine_failure)
3192 {
3193 case tic6x_match_non_const:
3194 as_bad (_("operand %u of '%.*s' not constant"),
3195 i + 1, opc_len, str);
3196 break;
3197
3198 case tic6x_match_wrong_side:
3199 as_bad (_("operand %u of '%.*s' on wrong side"),
3200 i + 1, opc_len, str);
3201 break;
3202
3203 case tic6x_match_bad_return:
3204 as_bad (_("operand %u of '%.*s' not a valid return "
3205 "address register"),
3206 i + 1, opc_len, str);
3207 break;
3208
3209 case tic6x_match_ctrl_write_only:
3210 as_bad (_("operand %u of '%.*s' is write-only"),
3211 i + 1, opc_len, str);
3212 break;
3213
3214 case tic6x_match_ctrl_read_only:
3215 as_bad (_("operand %u of '%.*s' is read-only"),
3216 i + 1, opc_len, str);
3217 break;
3218
3219 case tic6x_match_bad_mem:
3220 as_bad (_("operand %u of '%.*s' not a valid memory "
3221 "reference"),
3222 i + 1, opc_len, str);
3223 break;
3224
3225 case tic6x_match_bad_address:
3226 as_bad (_("operand %u of '%.*s' not a valid base "
3227 "address register"),
3228 i + 1, opc_len, str);
3229 break;
3230
3231 default:
3232 abort ();
3233 }
3234 bad_operands = TRUE;
3235 break;
3236 }
3237 }
3238 }
3239
3240 if (!bad_operands)
3241 {
3242 /* Each operand is OK for some opcode choice, and the number of
3243 operands is valid. Check whether there is an opcode choice
3244 for which all operands are simultaneously valid. */
3245 unsigned int i;
3246 bfd_boolean found_match = FALSE;
3247
3248 for (i = 0; i < TIC6X_NUM_PREFER; i++)
3249 opc_rank[i] = (unsigned int) -1;
3250
3251 min_rank = TIC6X_NUM_PREFER - 1;
3252 max_rank = 0;
3253
3254 for (i = 0; i < num_matching_opcodes; i++)
3255 {
3256 unsigned int j;
3257 bfd_boolean this_matches = TRUE;
3258
3259 if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3260 && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read)
3261 continue;
3262
3263 for (j = 0; j < num_operands_read; j++)
3264 {
3265 tic6x_operand_form f;
3266 tic6x_rw rw;
3267
3268 if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3269 {
3270 f = tic6x_operand_func_unit;
3271 rw = tic6x_rw_none;
3272 }
3273 else
3274 {
3275 f = tic6x_opcode_table[opcm[i]].operand_info[j].form;
3276 rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw;
3277 }
3278 if (tic6x_operand_matches_form (&operands[j], f, rw,
3279 func_unit_side,
3280 cross_side,
3281 func_unit_data_side)
3282 != tic6x_match_matches)
3283 {
3284 this_matches = FALSE;
3285 break;
3286 }
3287 }
3288
3289 if (this_matches)
3290 {
3291 int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags);
3292
3293 if (rank < min_rank)
3294 min_rank = rank;
3295 if (rank > max_rank)
3296 max_rank = rank;
3297
3298 if (opc_rank[rank] == (unsigned int) -1)
3299 opc_rank[rank] = i;
3300 else
3301 /* The opcode table should provide a total ordering
3302 for all cases where multiple matches may get
3303 here. */
3304 abort ();
3305
3306 found_match = TRUE;
3307 }
3308 }
3309
3310 if (!found_match)
3311 {
3312 as_bad (_("bad operand combination for '%.*s'"), opc_len, str);
3313 bad_operands = TRUE;
3314 }
3315 }
3316
3317 if (bad_operands)
3318 {
3319 free (opcm);
3320 return;
3321 }
3322
3323 opcode_value = 0;
3324 encoded_ok = FALSE;
3325 for (try_rank = max_rank; try_rank >= min_rank; try_rank--)
3326 {
3327 fix_needed = FALSE;
3328
3329 if (opc_rank[try_rank] == (unsigned int) -1)
3330 continue;
3331
3332 opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands,
3333 num_operands_read, this_line_creg,
3334 this_line_z, func_unit_side,
3335 func_unit_cross, func_unit_data_side,
3336 seginfo->tc_segment_info_data.sploop_ii,
3337 &fix_exp, &fix_pcrel, &fx_r_type,
3338 &fix_adda, &fix_needed, &encoded_ok,
3339 (try_rank == min_rank ? TRUE : FALSE),
3340 str, opc_len);
3341 if (encoded_ok)
3342 {
3343 opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]];
3344 break;
3345 }
3346 }
3347
3348 free (opcm);
3349
3350 if (!encoded_ok)
3351 return;
3352
3353 if (this_line_parallel)
3354 {
3355 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag;
3356 if (insn_frag == NULL)
3357 {
3358 as_bad (_("parallel instruction not following another instruction"));
3359 return;
3360 }
3361
3362 if (insn_frag->fr_fix >= 32)
3363 {
3364 as_bad (_("too many instructions in execute packet"));
3365 return;
3366 }
3367
3368 if (this_insn_label_list != NULL)
3369 as_bad (_("label not at start of execute packet"));
3370
3371 if (opct->flags & TIC6X_FLAG_FIRST)
3372 as_bad (_("'%.*s' instruction not at start of execute packet"),
3373 opc_len, str);
3374
3375 *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1;
3376 output = insn_frag->fr_literal + insn_frag->fr_fix;
3377 }
3378 else
3379 {
3380 tic6x_label_list *l;
3381
3382 seginfo->tc_segment_info_data.spmask_addr = NULL;
3383 seginfo->tc_segment_info_data.func_units_used = 0;
3384
3385 /* Start a new frag for this execute packet. */
3386 if (frag_now_fix () != 0)
3387 {
3388 if (frag_now->fr_type != rs_machine_dependent)
3389 frag_wane (frag_now);
3390
3391 frag_new (0);
3392 }
3393 frag_grow (32);
3394 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag = frag_now;
3395 for (l = this_insn_label_list; l; l = l->next)
3396 {
3397 symbol_set_frag (l->label, frag_now);
3398 S_SET_VALUE (l->label, 0);
3399 S_SET_SEGMENT (l->label, now_seg);
3400 }
3401 tic6x_free_label_list (this_insn_label_list);
3402 dwarf2_emit_insn (0);
3403 output = frag_var (rs_machine_dependent, 32, 32, 0, NULL, 0, NULL);
3404 /* This must be the same as the frag to which a pointer was just
3405 saved. */
3406 if (output != insn_frag->fr_literal)
3407 abort ();
3408 insn_frag->tc_frag_data.is_insns = TRUE;
3409 insn_frag->tc_frag_data.can_cross_fp_boundary
3410 = tic6x_can_cross_fp_boundary;
3411 }
3412
3413 if (func_unit_base != tic6x_func_unit_nfu)
3414 {
3415 unsigned int func_unit_enc;
3416
3417 func_unit_enc = tic6x_encode_spmask (func_unit_base, func_unit_side);
3418
3419 if (seginfo->tc_segment_info_data.func_units_used & func_unit_enc)
3420 as_bad (_("functional unit already used in this execute packet"));
3421
3422 seginfo->tc_segment_info_data.func_units_used |= func_unit_enc;
3423 }
3424
3425 if (opct->flags & TIC6X_FLAG_SPLOOP)
3426 {
3427 if (seginfo->tc_segment_info_data.sploop_ii)
3428 as_bad (_("nested software pipelined loop"));
3429 if (num_operands_read != 1
3430 || operands[0].form != TIC6X_OP_EXP
3431 || operands[0].value.exp.X_op != O_constant)
3432 abort ();
3433 seginfo->tc_segment_info_data.sploop_ii
3434 = operands[0].value.exp.X_add_number;
3435 }
3436 else if (opct->flags & TIC6X_FLAG_SPKERNEL)
3437 {
3438 if (!seginfo->tc_segment_info_data.sploop_ii)
3439 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3440 opc_len, str);
3441 seginfo->tc_segment_info_data.sploop_ii = 0;
3442 }
3443
3444 if (this_line_spmask)
3445 {
3446 if (seginfo->tc_segment_info_data.spmask_addr == NULL)
3447 as_bad (_("'||^' without previous SPMASK"));
3448 else if (func_unit_base == tic6x_func_unit_nfu)
3449 as_bad (_("cannot mask instruction using no functional unit"));
3450 else
3451 {
3452 unsigned int spmask_opcode;
3453 unsigned int mask_bit;
3454
3455 spmask_opcode
3456 = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr,
3457 4);
3458 mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side);
3459 mask_bit <<= 18;
3460 if (spmask_opcode & mask_bit)
3461 as_bad (_("functional unit already masked"));
3462 spmask_opcode |= mask_bit;
3463 md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr,
3464 spmask_opcode, 4);
3465 }
3466 }
3467
3468 record_alignment (now_seg, 5);
3469 md_number_to_chars (output, opcode_value, 4);
3470 if (fix_needed)
3471 tic6x_fix_new_exp (insn_frag, output - insn_frag->fr_literal, 4, fix_exp,
3472 fix_pcrel, fx_r_type, fix_adda);
3473 insn_frag->fr_fix += 4;
3474 insn_frag->fr_var -= 4;
3475 seginfo->tc_segment_info_data.last_insn_lsb
3476 = (target_big_endian ? output + 3 : output);
3477 if (opct->flags & TIC6X_FLAG_SPMASK)
3478 seginfo->tc_segment_info_data.spmask_addr = output;
3479 }
3480
3481 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3482 and the least significant BITS bits taken, at position POS. */
3483 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3484 do { \
3485 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3486 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3487 } while (0)
3488
3489 /* Apply a fixup to the object file. */
3490
3491 void
3492 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3493 {
3494 offsetT value = *valP;
3495 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3496
3497 value = SEXT (value);
3498 *valP = value;
3499
3500 fixP->fx_offset = SEXT (fixP->fx_offset);
3501
3502 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3503 fixP->fx_done = 1;
3504
3505 /* We do our own overflow checks. */
3506 fixP->fx_no_overflow = 1;
3507
3508 switch (fixP->fx_r_type)
3509 {
3510 case BFD_RELOC_NONE:
3511 /* Force output to the object file. */
3512 fixP->fx_done = 0;
3513 break;
3514
3515 case BFD_RELOC_32:
3516 if (fixP->fx_done || !seg->use_rela_p)
3517 md_number_to_chars (buf, value, 4);
3518 break;
3519
3520 case BFD_RELOC_16:
3521 if (fixP->fx_done || !seg->use_rela_p)
3522 {
3523 if (value < -0x8000 || value > 0xffff)
3524 as_bad_where (fixP->fx_file, fixP->fx_line,
3525 _("value too large for 2-byte field"));
3526 md_number_to_chars (buf, value, 2);
3527 }
3528 break;
3529
3530 case BFD_RELOC_8:
3531 if (fixP->fx_done || !seg->use_rela_p)
3532 {
3533 if (value < -0x80 || value > 0xff)
3534 as_bad_where (fixP->fx_file, fixP->fx_line,
3535 _("value too large for 1-byte field"));
3536 md_number_to_chars (buf, value, 1);
3537 }
3538 break;
3539
3540 case BFD_RELOC_C6000_ABS_S16:
3541 case BFD_RELOC_C6000_ABS_L16:
3542 case BFD_RELOC_C6000_SBR_S16:
3543 case BFD_RELOC_C6000_SBR_L16_B:
3544 case BFD_RELOC_C6000_SBR_L16_H:
3545 case BFD_RELOC_C6000_SBR_L16_W:
3546 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3547 if (fixP->fx_done || !seg->use_rela_p)
3548 {
3549 offsetT newval = md_chars_to_number (buf, 4);
3550 int shift;
3551
3552 switch (fixP->fx_r_type)
3553 {
3554 case BFD_RELOC_C6000_SBR_L16_H:
3555 shift = 1;
3556 break;
3557
3558 case BFD_RELOC_C6000_SBR_L16_W:
3559 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3560 shift = 2;
3561 break;
3562
3563 default:
3564 shift = 0;
3565 break;
3566 }
3567
3568 MODIFY_VALUE (newval, value, shift, 7, 16);
3569 if ((value < -0x8000 || value > 0x7fff)
3570 && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16
3571 || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16))
3572 as_bad_where (fixP->fx_file, fixP->fx_line,
3573 _("immediate offset out of range"));
3574
3575 md_number_to_chars (buf, newval, 4);
3576 }
3577 if (fixP->fx_done
3578 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16
3579 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16)
3580 abort ();
3581 break;
3582
3583 case BFD_RELOC_C6000_ABS_H16:
3584 case BFD_RELOC_C6000_SBR_H16_B:
3585 case BFD_RELOC_C6000_SBR_H16_H:
3586 case BFD_RELOC_C6000_SBR_H16_W:
3587 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3588 if (fixP->fx_done || !seg->use_rela_p)
3589 {
3590 offsetT newval = md_chars_to_number (buf, 4);
3591 int shift;
3592
3593 switch (fixP->fx_r_type)
3594 {
3595 case BFD_RELOC_C6000_SBR_H16_H:
3596 shift = 17;
3597 break;
3598
3599 case BFD_RELOC_C6000_SBR_H16_W:
3600 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3601 shift = 18;
3602 break;
3603
3604 default:
3605 shift = 16;
3606 break;
3607 }
3608
3609 MODIFY_VALUE (newval, value, shift, 7, 16);
3610
3611 md_number_to_chars (buf, newval, 4);
3612 }
3613 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16)
3614 abort ();
3615 break;
3616
3617 case BFD_RELOC_C6000_SBR_U15_B:
3618 if (fixP->fx_done || !seg->use_rela_p)
3619 {
3620 offsetT newval = md_chars_to_number (buf, 4);
3621
3622 MODIFY_VALUE (newval, value, 0, 8, 15);
3623 if (value < 0 || value > 0x7fff)
3624 as_bad_where (fixP->fx_file, fixP->fx_line,
3625 _("immediate offset out of range"));
3626
3627 md_number_to_chars (buf, newval, 4);
3628 }
3629 break;
3630
3631 case BFD_RELOC_C6000_SBR_U15_H:
3632 if (fixP->fx_done || !seg->use_rela_p)
3633 {
3634 offsetT newval = md_chars_to_number (buf, 4);
3635
3636 /* Constant ADDA operands, processed as constant when the
3637 instruction is parsed, are encoded as-is rather than
3638 shifted. If the operand of an ADDA instruction is now
3639 constant (for example, the difference between two labels
3640 found after the instruction), ensure it is encoded the
3641 same way it would have been if the constant value had
3642 been known when the instruction was parsed. */
3643 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3644 value <<= 1;
3645
3646 MODIFY_VALUE (newval, value, 1, 8, 15);
3647 if (value & 1)
3648 as_bad_where (fixP->fx_file, fixP->fx_line,
3649 _("immediate offset not 2-byte-aligned"));
3650 if (value < 0 || value > 0xfffe)
3651 as_bad_where (fixP->fx_file, fixP->fx_line,
3652 _("immediate offset out of range"));
3653
3654 md_number_to_chars (buf, newval, 4);
3655 }
3656 break;
3657
3658 case BFD_RELOC_C6000_SBR_U15_W:
3659 case BFD_RELOC_C6000_SBR_GOT_U15_W:
3660 if (fixP->fx_done || !seg->use_rela_p)
3661 {
3662 offsetT newval = md_chars_to_number (buf, 4);
3663
3664 /* Constant ADDA operands, processed as constant when the
3665 instruction is parsed, are encoded as-is rather than
3666 shifted. If the operand of an ADDA instruction is now
3667 constant (for example, the difference between two labels
3668 found after the instruction), ensure it is encoded the
3669 same way it would have been if the constant value had
3670 been known when the instruction was parsed. */
3671 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3672 value <<= 2;
3673
3674 MODIFY_VALUE (newval, value, 2, 8, 15);
3675 if (value & 3)
3676 as_bad_where (fixP->fx_file, fixP->fx_line,
3677 _("immediate offset not 4-byte-aligned"));
3678 if (value < 0 || value > 0x1fffc)
3679 as_bad_where (fixP->fx_file, fixP->fx_line,
3680 _("immediate offset out of range"));
3681
3682 md_number_to_chars (buf, newval, 4);
3683 }
3684 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W)
3685 abort ();
3686 break;
3687
3688 case BFD_RELOC_C6000_DSBT_INDEX:
3689 if (value != 0)
3690 as_bad_where (fixP->fx_file, fixP->fx_line,
3691 _("addend used with $DSBT_INDEX"));
3692 if (fixP->fx_done)
3693 abort ();
3694 break;
3695
3696 case BFD_RELOC_C6000_PCR_S21:
3697 if (fixP->fx_done || !seg->use_rela_p)
3698 {
3699 offsetT newval = md_chars_to_number (buf, 4);
3700
3701 MODIFY_VALUE (newval, value, 2, 7, 21);
3702
3703 if (value & 3)
3704 as_bad_where (fixP->fx_file, fixP->fx_line,
3705 _("PC-relative offset not 4-byte-aligned"));
3706 if (value < -0x400000 || value > 0x3ffffc)
3707 as_bad_where (fixP->fx_file, fixP->fx_line,
3708 _("PC-relative offset out of range"));
3709
3710 md_number_to_chars (buf, newval, 4);
3711 }
3712 break;
3713
3714 case BFD_RELOC_C6000_PCR_S12:
3715 if (fixP->fx_done || !seg->use_rela_p)
3716 {
3717 offsetT newval = md_chars_to_number (buf, 4);
3718
3719 MODIFY_VALUE (newval, value, 2, 16, 12);
3720
3721 if (value & 3)
3722 as_bad_where (fixP->fx_file, fixP->fx_line,
3723 _("PC-relative offset not 4-byte-aligned"));
3724 if (value < -0x2000 || value > 0x1ffc)
3725 as_bad_where (fixP->fx_file, fixP->fx_line,
3726 _("PC-relative offset out of range"));
3727
3728 md_number_to_chars (buf, newval, 4);
3729 }
3730 break;
3731
3732 case BFD_RELOC_C6000_PCR_S10:
3733 if (fixP->fx_done || !seg->use_rela_p)
3734 {
3735 offsetT newval = md_chars_to_number (buf, 4);
3736
3737 MODIFY_VALUE (newval, value, 2, 13, 10);
3738
3739 if (value & 3)
3740 as_bad_where (fixP->fx_file, fixP->fx_line,
3741 _("PC-relative offset not 4-byte-aligned"));
3742 if (value < -0x800 || value > 0x7fc)
3743 as_bad_where (fixP->fx_file, fixP->fx_line,
3744 _("PC-relative offset out of range"));
3745
3746 md_number_to_chars (buf, newval, 4);
3747 }
3748 break;
3749
3750 case BFD_RELOC_C6000_PCR_S7:
3751 if (fixP->fx_done || !seg->use_rela_p)
3752 {
3753 offsetT newval = md_chars_to_number (buf, 4);
3754
3755 MODIFY_VALUE (newval, value, 2, 16, 7);
3756
3757 if (value & 3)
3758 as_bad_where (fixP->fx_file, fixP->fx_line,
3759 _("PC-relative offset not 4-byte-aligned"));
3760 if (value < -0x100 || value > 0xfc)
3761 as_bad_where (fixP->fx_file, fixP->fx_line,
3762 _("PC-relative offset out of range"));
3763
3764 md_number_to_chars (buf, newval, 4);
3765 }
3766 break;
3767
3768 default:
3769 abort ();
3770 }
3771 }
3772
3773 /* Convert a floating-point number to target (IEEE) format. */
3774
3775 char *
3776 md_atof (int type, char *litP, int *sizeP)
3777 {
3778 return ieee_md_atof (type, litP, sizeP, target_big_endian);
3779 }
3780
3781 /* Adjust the frags in SECTION (see tic6x_end). */
3782
3783 static void
3784 tic6x_adjust_section (bfd *abfd ATTRIBUTE_UNUSED, segT section,
3785 void *dummy ATTRIBUTE_UNUSED)
3786 {
3787 segment_info_type *info;
3788 frchainS *frchp;
3789 fragS *fragp;
3790 bfd_boolean have_code = FALSE;
3791 bfd_boolean have_non_code = FALSE;
3792
3793 info = seg_info (section);
3794 if (info == NULL)
3795 return;
3796
3797 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
3798 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
3799 switch (fragp->fr_type)
3800 {
3801 case rs_machine_dependent:
3802 if (fragp->tc_frag_data.is_insns)
3803 have_code = TRUE;
3804 break;
3805
3806 case rs_dummy:
3807 case rs_fill:
3808 if (fragp->fr_fix > 0)
3809 have_non_code = TRUE;
3810 break;
3811
3812 default:
3813 have_non_code = TRUE;
3814 break;
3815 }
3816
3817 /* Process alignment requirements in a code-only section. */
3818 if (have_code && !have_non_code)
3819 {
3820 /* If we need to insert an odd number of instructions to meet an
3821 alignment requirement, there must have been an odd number of
3822 instructions since the last 8-byte-aligned execute packet
3823 boundary. So there must have been an execute packet with an
3824 odd number (and so a number fewer than 8) of instructions
3825 into which we can insert a NOP without breaking any previous
3826 alignments.
3827
3828 If then we need to insert a number 2 mod 4 of instructions,
3829 the number of instructions since the last 16-byte-aligned
3830 execute packet boundary must be 2 mod 4. So between that
3831 boundary and the following 8-byte-aligned boundary there must
3832 either be at least one execute packet with 2-mod-4
3833 instructions, or at least two with an odd number of
3834 instructions; again, greedily inserting NOPs as soon as
3835 possible suffices to meet the alignment requirement.
3836
3837 If then we need to insert 4 instructions, we look between the
3838 last 32-byte-aligned boundary and the following
3839 16-byte-aligned boundary. The sizes of the execute packets
3840 in this range total 4 instructions mod 8, so again there is
3841 room for greedy insertion of NOPs to meet the alignment
3842 requirement, and before any intermediate point with 8-byte
3843 (2-instruction) alignment requirement the sizes of execute
3844 packets (and so the room for NOPs) will total 2 instructions
3845 mod 4 so greedy insertion will not break such alignments.
3846
3847 So we can always meet these alignment requirements by
3848 inserting NOPs in parallel with existing execute packets, and
3849 by induction the approach described above inserts the minimum
3850 number of such NOPs. */
3851
3852 /* The number of NOPs we are currently looking to insert, if we
3853 have gone back to insert NOPs. */
3854 unsigned int want_insert = 0;
3855
3856 /* Out of that number, the number inserted so far in the current
3857 stage of the above algorithm. */
3858 unsigned int want_insert_done_so_far = 0;
3859
3860 /* The position mod 32 at the start of the current frag. */
3861 unsigned int pos = 0;
3862
3863 /* The locations in the frag chain of the most recent frags at
3864 the start of which there is the given alignment. */
3865 frchainS *frchp_last32, *frchp_last16, *frchp_last8;
3866 fragS *fragp_last32, *fragp_last16, *fragp_last8;
3867 unsigned int pos_last32, pos_last16, pos_last8;
3868
3869 frchp_last32 = frchp_last16 = frchp_last8 = info->frchainP;
3870 fragp_last32 = fragp_last16 = fragp_last8 = info->frchainP->frch_root;
3871 pos_last32 = pos_last16 = pos_last8 = 0;
3872
3873 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
3874 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
3875 look_at_frag:
3876 {
3877 bfd_boolean go_back = FALSE;
3878 frchainS *frchp_next;
3879 fragS *fragp_next;
3880
3881 if (fragp->fr_type != rs_machine_dependent)
3882 continue;
3883
3884 if (fragp->tc_frag_data.is_insns
3885 && pos + fragp->fr_fix > 32
3886 && !fragp->tc_frag_data.can_cross_fp_boundary)
3887 {
3888 /* As described above, we should always have met an
3889 alignment requirement by the time we come back to
3890 it. */
3891 if (want_insert)
3892 abort ();
3893
3894 if (pos & 3)
3895 abort ();
3896 want_insert = (32 - pos) >> 2;
3897 if (want_insert > 7)
3898 abort ();
3899 want_insert_done_so_far = 0;
3900 go_back = TRUE;
3901 }
3902
3903 if (!fragp->tc_frag_data.is_insns)
3904 {
3905 unsigned int would_insert_bytes;
3906
3907 if (!(pos & ((1 << fragp->fr_offset) - 1)))
3908 /* This alignment requirement is already met. */
3909 continue;
3910
3911 /* As described above, we should always have met an
3912 alignment requirement by the time we come back to
3913 it. */
3914 if (want_insert)
3915 abort ();
3916
3917 /* We may not be able to meet this requirement within
3918 the given number of characters. */
3919 would_insert_bytes
3920 = ((1 << fragp->fr_offset)
3921 - (pos & ((1 << fragp->fr_offset) - 1)));
3922
3923 if (fragp->fr_subtype != 0
3924 && would_insert_bytes > fragp->fr_subtype)
3925 continue;
3926
3927 /* An unmet alignment must be 8, 16 or 32 bytes;
3928 smaller ones must always be met within code-only
3929 sections and larger ones cause the section not to
3930 be code-only. */
3931 if (fragp->fr_offset != 3
3932 && fragp->fr_offset != 4
3933 && fragp->fr_offset != 5)
3934 abort ();
3935
3936 if (would_insert_bytes & 3)
3937 abort ();
3938 want_insert = would_insert_bytes >> 2;
3939 if (want_insert > 7)
3940 abort ();
3941 want_insert_done_so_far = 0;
3942 go_back = TRUE;
3943 }
3944 else if (want_insert && !go_back)
3945 {
3946 unsigned int num_insns = fragp->fr_fix >> 2;
3947 unsigned int max_poss_nops = 8 - num_insns;
3948
3949 if (max_poss_nops)
3950 {
3951 unsigned int cur_want_nops, max_want_nops, do_nops, i;
3952
3953 if (want_insert & 1)
3954 cur_want_nops = 1;
3955 else if (want_insert & 2)
3956 cur_want_nops = 2;
3957 else if (want_insert & 4)
3958 cur_want_nops = 4;
3959 else
3960 abort ();
3961
3962 max_want_nops = cur_want_nops - want_insert_done_so_far;
3963
3964 do_nops = (max_poss_nops < max_want_nops
3965 ? max_poss_nops
3966 : max_want_nops);
3967 for (i = 0; i < do_nops; i++)
3968 {
3969 md_number_to_chars (fragp->fr_literal + fragp->fr_fix,
3970 0, 4);
3971 if (target_big_endian)
3972 fragp->fr_literal[fragp->fr_fix - 1] |= 0x1;
3973 else
3974 fragp->fr_literal[fragp->fr_fix - 4] |= 0x1;
3975 fragp->fr_fix += 4;
3976 fragp->fr_var -= 4;
3977 }
3978 want_insert_done_so_far += do_nops;
3979 if (want_insert_done_so_far == cur_want_nops)
3980 {
3981 want_insert -= want_insert_done_so_far;
3982 want_insert_done_so_far = 0;
3983 if (want_insert)
3984 go_back = TRUE;
3985 }
3986 }
3987 }
3988 if (go_back)
3989 {
3990 if (want_insert & 1)
3991 {
3992 frchp = frchp_last8;
3993 fragp = fragp_last8;
3994 pos = pos_last8;
3995 }
3996 else if (want_insert & 2)
3997 {
3998 frchp = frchp_last8 = frchp_last16;
3999 fragp = fragp_last8 = fragp_last16;
4000 pos = pos_last8 = pos_last16;
4001 }
4002 else if (want_insert & 4)
4003 {
4004 frchp = frchp_last8 = frchp_last16 = frchp_last32;
4005 fragp = fragp_last8 = fragp_last16 = fragp_last32;
4006 pos = pos_last8 = pos_last16 = pos_last32;
4007 }
4008 else
4009 abort ();
4010
4011 goto look_at_frag;
4012 }
4013
4014 /* Update current position for moving past a code
4015 frag. */
4016 pos += fragp->fr_fix;
4017 pos &= 31;
4018 frchp_next = frchp;
4019 fragp_next = fragp->fr_next;
4020 if (fragp_next == NULL)
4021 {
4022 frchp_next = frchp->frch_next;
4023 if (frchp_next != NULL)
4024 fragp_next = frchp_next->frch_root;
4025 }
4026 if (!(pos & 7))
4027 {
4028 frchp_last8 = frchp_next;
4029 fragp_last8 = fragp_next;
4030 pos_last8 = pos;
4031 }
4032 if (!(pos & 15))
4033 {
4034 frchp_last16 = frchp_next;
4035 fragp_last16 = fragp_next;
4036 pos_last16 = pos;
4037 }
4038 if (!(pos & 31))
4039 {
4040 frchp_last32 = frchp_next;
4041 fragp_last32 = fragp_next;
4042 pos_last32 = pos;
4043 }
4044 }
4045 }
4046
4047 /* Now convert the machine-dependent frags to machine-independent
4048 ones. */
4049 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4050 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4051 {
4052 if (fragp->fr_type == rs_machine_dependent)
4053 {
4054 if (fragp->tc_frag_data.is_insns)
4055 frag_wane (fragp);
4056 else
4057 {
4058 fragp->fr_type = rs_align_code;
4059 fragp->fr_var = 1;
4060 *fragp->fr_literal = 0;
4061 }
4062 }
4063 }
4064 }
4065
4066 /* Initialize the machine-dependent parts of a frag. */
4067
4068 void
4069 tic6x_frag_init (fragS *fragp)
4070 {
4071 fragp->tc_frag_data.is_insns = FALSE;
4072 fragp->tc_frag_data.can_cross_fp_boundary = FALSE;
4073 }
4074
4075 /* Set an attribute if it has not already been set by the user. */
4076
4077 static void
4078 tic6x_set_attribute_int (int tag, int value)
4079 {
4080 if (tag < 1
4081 || tag >= NUM_KNOWN_OBJ_ATTRIBUTES)
4082 abort ();
4083 if (!tic6x_attributes_set_explicitly[tag])
4084 bfd_elf_add_proc_attr_int (stdoutput, tag, value);
4085 }
4086
4087 /* Set object attributes deduced from the input file and command line
4088 rather than given explicitly. */
4089 static void
4090 tic6x_set_attributes (void)
4091 {
4092 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
4093 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
4094
4095 tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute);
4096 tic6x_set_attribute_int (Tag_ABI_DSBT, tic6x_dsbt);
4097 tic6x_set_attribute_int (Tag_ABI_PID, tic6x_pid);
4098 tic6x_set_attribute_int (Tag_ABI_PIC, tic6x_pic);
4099 }
4100
4101 /* Do machine-dependent manipulations of the frag chains after all
4102 input has been read and before the machine-independent sizing and
4103 relaxing. */
4104
4105 void
4106 tic6x_end (void)
4107 {
4108 /* Set object attributes at this point if not explicitly set. */
4109 tic6x_set_attributes ();
4110
4111 /* Meeting alignment requirements may require inserting NOPs in
4112 parallel in execute packets earlier in the segment. Future
4113 16-bit instruction generation involves whole-segment optimization
4114 to determine the best choice and ordering of 32-bit or 16-bit
4115 instructions. This doesn't fit will in the general relaxation
4116 framework, so handle alignment and 16-bit instruction generation
4117 here. */
4118 bfd_map_over_sections (stdoutput, tic6x_adjust_section, NULL);
4119 }
4120
4121 /* No machine-dependent frags at this stage; all converted in
4122 tic6x_end. */
4123
4124 void
4125 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED,
4126 fragS *fragp ATTRIBUTE_UNUSED)
4127 {
4128 abort ();
4129 }
4130
4131 /* No machine-dependent frags at this stage; all converted in
4132 tic6x_end. */
4133
4134 int
4135 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
4136 segT seg ATTRIBUTE_UNUSED)
4137 {
4138 abort ();
4139 }
4140
4141 /* Put a number into target byte order. */
4142
4143 void
4144 md_number_to_chars (char *buf, valueT val, int n)
4145 {
4146 if (target_big_endian)
4147 number_to_chars_bigendian (buf, val, n);
4148 else
4149 number_to_chars_littleendian (buf, val, n);
4150 }
4151
4152 /* Machine-dependent operand parsing not currently needed. */
4153
4154 void
4155 md_operand (expressionS *op ATTRIBUTE_UNUSED)
4156 {
4157 }
4158
4159 /* PC-relative operands are relative to the start of the fetch
4160 packet. */
4161
4162 long
4163 tic6x_pcrel_from_section (fixS *fixp, segT sec)
4164 {
4165 if (fixp->fx_addsy != NULL
4166 && (!S_IS_DEFINED (fixp->fx_addsy)
4167 || S_GET_SEGMENT (fixp->fx_addsy) != sec))
4168 return 0;
4169 return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f;
4170 }
4171
4172 /* Round up a section size to the appropriate boundary. */
4173
4174 valueT
4175 md_section_align (segT segment ATTRIBUTE_UNUSED,
4176 valueT size)
4177 {
4178 /* Round up section sizes to ensure that text sections consist of
4179 whole fetch packets. */
4180 int align = bfd_get_section_alignment (stdoutput, segment);
4181 return ((size + (1 << align) - 1) & ((valueT) -1 << align));
4182 }
4183
4184 /* No special undefined symbol handling needed for now. */
4185
4186 symbolS *
4187 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
4188 {
4189 return NULL;
4190 }
4191
4192 /* Translate internal representation of relocation info to BFD target
4193 format. */
4194
4195 arelent *
4196 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
4197 {
4198 arelent *reloc;
4199 asymbol *symbol;
4200 bfd_reloc_code_real_type r_type;
4201
4202 reloc = xmalloc (sizeof (arelent));
4203 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
4204 symbol = symbol_get_bfdsym (fixp->fx_addsy);
4205 *reloc->sym_ptr_ptr = symbol;
4206 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
4207 reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0);
4208 r_type = fixp->fx_r_type;
4209 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
4210
4211 if (reloc->howto == NULL)
4212 {
4213 as_bad_where (fixp->fx_file, fixp->fx_line,
4214 _("Cannot represent relocation type %s"),
4215 bfd_get_reloc_code_name (r_type));
4216 return NULL;
4217 }
4218
4219 /* Correct for adjustments bfd_install_relocation will make. */
4220 if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace)
4221 {
4222 reloc->addend += reloc->address;
4223 if (!bfd_is_com_section (symbol))
4224 reloc->addend -= symbol->value;
4225 }
4226
4227 return reloc;
4228 }