gas/doc/c-rx.texi

   1 @c Copyright (C) 2008-2021 Free Software Foundation, Inc.
   2 @c This is part of the GAS manual.
   3 @c For copying conditions, see the file as.texinfo.
   4 @ifset GENERIC
   5 @page
   6 @node RX-Dependent
   7 @chapter RX Dependent Features
   8 @end ifset
   9 @ifclear GENERIC
  10 @node Machine Dependencies
  11 @chapter RX Dependent Features
  12 @end ifclear
  13
  14 @cindex RX support
  15 @menu
  16 * RX-Opts::                   RX Assembler Command-line Options
  17 * RX-Modifiers::              Symbolic Operand Modifiers
  18 * RX-Directives::             Assembler Directives
  19 * RX-Float::                  Floating Point
  20 * RX-Syntax::                 Syntax
  21 @end menu
  22
  23 @node RX-Opts
  24 @section RX Options
  25 @cindex options, RX
  26 @cindex RX options
  27
  28 The Renesas RX port of @code{@value{AS}} has a few target specific
  29 command-line options:
  30
  31 @table @code
  32
  33 @cindex @samp{-m32bit-doubles}
  34 @item -m32bit-doubles
  35 This option controls the ABI and indicates to use a 32-bit float ABI.
  36 It has no effect on the assembled instructions, but it does influence
  37 the behaviour of the @samp{.double} pseudo-op.
  38 This is the default.
  39
  40 @cindex @samp{-m64bit-doubles}
  41 @item -m64bit-doubles
  42 This option controls the ABI and indicates to use a 64-bit float ABI.
  43 It has no effect on the assembled instructions, but it does influence
  44 the behaviour of the @samp{.double} pseudo-op.
  45
  46 @cindex @samp{-mbig-endian}
  47 @item -mbig-endian
  48 This option controls the ABI and indicates to use a big-endian data
  49 ABI.  It has no effect on the assembled instructions, but it does
  50 influence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int},
  51 @samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops.
  52
  53 @cindex @samp{-mlittle-endian}
  54 @item -mlittle-endian
  55 This option controls the ABI and indicates to use a little-endian data
  56 ABI.  It has no effect on the assembled instructions, but it does
  57 influence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int},
  58 @samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops.
  59 This is the default.
  60
  61 @cindex @samp{-muse-conventional-section-names}
  62 @item -muse-conventional-section-names
  63 This option controls the default names given to the code (.text),
  64 initialised data (.data) and uninitialised data sections (.bss).
  65
  66 @cindex @samp{-muse-renesas-section-names}
  67 @item -muse-renesas-section-names
  68 This option controls the default names given to the code (.P),
  69 initialised data (.D_1) and uninitialised data sections (.B_1).
  70 This is the default.
  71
  72 @cindex @samp{-msmall-data-limit}
  73 @item -msmall-data-limit
  74 This option tells the assembler that the small data limit feature of
  75 the RX port of GCC is being used.  This results in the assembler
  76 generating an undefined reference to a symbol called @code{__gp} for
  77 use by the relocations that are needed to support the small data limit
  78 feature.   This option is not enabled by default as it would otherwise
  79 pollute the symbol table.
  80
  81 @cindex @samp{-mpid}
  82 @item -mpid
  83 This option tells the assembler that the position independent data of the
  84 RX port of GCC is being used.  This results in the assembler
  85 generating an undefined reference to a symbol called @code{__pid_base},
  86 and also setting the RX_PID flag bit in the e_flags field of the ELF
  87 header of the object file.
  88
  89 @cindex @samp{-mint-register}
  90 @item -mint-register=@var{num}
  91 This option tells the assembler how many registers have been reserved
  92 for use by interrupt handlers.  This is needed in order to compute the
  93 correct values for the @code{%gpreg} and @code{%pidreg} meta registers.
  94
  95 @cindex @samp{-mgcc-abi}
  96 @item -mgcc-abi
  97 This option tells the assembler that the old GCC ABI is being used by
  98 the assembled code.  With this version of the ABI function arguments
  99 that are passed on the stack are aligned to a 32-bit boundary.
 100
 101 @cindex @samp{-mrx-abi}
 102 @item -mrx-abi
 103 This option tells the assembler that the official RX ABI is being used
 104 by the assembled code.  With this version of the ABI function
 105 arguments that are passed on the stack are aligned to their natural
 106 alignments.  This option is the default.
 107
 108 @cindex @samp{-mcpu=}
 109 @item -mcpu=@var{name}
 110 This option tells the assembler the target CPU type.  Currently the
 111 @code{rx100}, @code{rx200}, @code{rx600}, @code{rx610}, @code{rxv2},
 112 @code{rxv3} and @code{rxv3-dfpu} are recognised as valid cpu names.
 113 Attempting to assemble an instructionnot supported by the indicated
 114 cpu type will result in an error message being generated.
 115
 116 @cindex @samp{-mno-allow-string-insns}
 117 @item -mno-allow-string-insns
 118 This option tells the assembler to mark the object file that it is
 119 building as one that does not use the string instructions
 120 @code{SMOVF}, @code{SCMPU}, @code{SMOVB}, @code{SMOVU}, @code{SUNTIL}
 121 @code{SWHILE} or the @code{RMPA} instruction.  In addition the mark
 122 tells the linker to complain if an attempt is made to link the binary
 123 with another one that does use any of these instructions.
 124
 125 Note - the inverse of this option, @code{-mallow-string-insns}, is
 126 not needed.  The assembler automatically detects the use of the
 127 the instructions in the source code and labels the resulting
 128 object file appropriately.  If no string instructions are detected
 129 then the object file is labelled as being one that can be linked with
 130 either string-using or string-banned object files.
 131 @end table
 132
 133 @node RX-Modifiers
 134 @section Symbolic Operand Modifiers
 135
 136 @cindex RX modifiers
 137 @cindex syntax, RX
 138 @cindex %gp
 139
 140 The assembler supports one modifier when using symbol addresses
 141 in RX instruction operands.  The general syntax is the following:
 142
 143 @smallexample
 144 %gp(symbol)
 145 @end smallexample
 146
 147 The modifier returns the offset from the @var{__gp} symbol to the
 148 specified symbol as a 16-bit value.  The intent is that this offset
 149 should be used in a register+offset move instruction when generating
 150 references to small data.  Ie, like this:
 151
 152 @smallexample
 153   mov.W  %gp(_foo)[%gpreg], r1
 154 @end smallexample
 155
 156 The assembler also supports two meta register names which can be used
 157 to refer to registers whose values may not be known to the
 158 programmer.  These meta register names are:
 159
 160 @table @code
 161
 162 @cindex @samp{%gpreg}
 163 @item %gpreg
 164 The small data address register.
 165
 166 @cindex @samp{%pidreg}
 167 @item %pidreg
 168 The PID base address register.
 169
 170 @end table
 171
 172 Both registers normally have the value r13, but this can change if
 173 some registers have been reserved for use by interrupt handlers or if
 174 both the small data limit and position independent data features are
 175 being used at the same time.
 176
 177 @node RX-Directives
 178 @section Assembler Directives
 179
 180 @cindex assembler directives, RX
 181 @cindex RX assembler directives
 182
 183 The RX version of @code{@value{AS}} has the following specific
 184 assembler directives:
 185
 186 @table @code
 187
 188 @item .3byte
 189 @cindex assembler directive .3byte, RX
 190 @cindex RX assembler directive .3byte
 191 Inserts a 3-byte value into the output file at the current location.
 192
 193 @item .fetchalign
 194 @cindex assembler directive .fetchalign, RX
 195 @cindex RX assembler directive .fetchalign
 196 If the next opcode following this directive spans a fetch line
 197 boundary (8 byte boundary), the opcode is aligned to that boundary.
 198 If the next opcode does not span a fetch line, this directive has no
 199 effect.  Note that one or more labels may be between this directive
 200 and the opcode; those labels are aligned as well.  Any inserted bytes
 201 due to alignment will form a NOP opcode.
 202
 203 @end table
 204
 205 @node RX-Float
 206 @section Floating Point
 207
 208 @cindex floating point, RX
 209 @cindex RX floating point
 210
 211 The floating point formats generated by directives are these.
 212
 213 @table @code
 214 @cindex @code{float} directive, RX
 215
 216 @item .float
 217 @code{Single} precision (32-bit) floating point constants.
 218
 219 @cindex @code{double} directive, RX
 220 @item .double
 221 If the @option{-m64bit-doubles} command-line option has been specified
 222 then then @code{double} directive generates @code{double} precision
 223 (64-bit) floating point constants, otherwise it generates
 224 @code{single} precision (32-bit) floating point constants.  To force
 225 the generation of 64-bit floating point constants used the @code{dc.d}
 226 directive instead.
 227
 228 @end table
 229
 230 @node RX-Syntax
 231 @section Syntax for the RX
 232 @menu
 233 * RX-Chars::                Special Characters
 234 @end menu
 235
 236 @node RX-Chars
 237 @subsection Special Characters
 238
 239 @cindex line comment character, RX
 240 @cindex RX line comment character
 241 The presence of a @samp{;} appearing anywhere on a line indicates the
 242 start of a comment that extends to the end of that line.
 243
 244 If a @samp{#} appears as the first character of a line then the whole
 245 line is treated as a comment, but in this case the line can also be a
 246 logical line number directive (@pxref{Comments}) or a preprocessor
 247 control command (@pxref{Preprocessing}).
 248
 249 @cindex line separator, RX
 250 @cindex statement separator, RX
 251 @cindex RX line separator
 252 The @samp{!} character can be used to separate statements on the same
 253 line.