gdb/config/sparc/tm-sp64.h

   1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
   2    This is included by other tm-*.h files to define SPARC64 cpu-related info.
   3    Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
   4    This is (obviously) based on the SPARC Vn (n<9) port.
   5    Contributed by Doug Evans (dje@cygnus.com).
   6    Further modified by Bob Manson (manson@cygnus.com).
   7
   8 This file is part of GDB.
   9
  10 This program is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 2 of the License, or
  13 (at your option) any later version.
  14
  15 This program is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with this program; if not, write to the Free Software
  22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  23
  24 #define GDB_TARGET_IS_SPARC64
  25
  26 #ifdef __STDC__
  27 struct value;
  28 #endif
  29
  30 /* Eeeew. Ok, we have to assume (for now) that the processor really is
  31    in sparc64 mode. While this is the same instruction sequence as
  32    on the Sparc, the stack frames are offset by +2047 (and the arguments
  33    are 8 bytes instead of 4). */
  34 /* Instructions are:
  35    std  %f10, [ %fp + 0x7a7 ]
  36    std  %f8, [ %fp + 0x79f ]
  37    std  %f6, [ %fp + 0x797 ]
  38    std  %f4, [ %fp + 0x78f ]
  39    std  %f2, [ %fp + 0x787 ]
  40    std  %f0, [ %fp + 0x77f ]
  41    std  %g6, [ %fp + 0x777 ]
  42    std  %g4, [ %fp + 0x76f ]
  43    std  %g2, [ %fp + 0x767 ]
  44    std  %g0, [ %fp + 0x75f ]
  45    std  %fp, [ %fp + 0x757 ]
  46    std  %i4, [ %fp + 0x74f ]
  47    std  %i2, [ %fp + 0x747 ]
  48    std  %i0, [ %fp + 0x73f ]
  49    nop
  50    nop
  51    nop
  52    nop
  53    rd  %tbr, %o0
  54    st  %o0, [ %fp + 0x72b ]
  55    rd  %tpc, %o0
  56    st  %o0, [ %fp + 0x727 ]
  57    rd  %psr, %o0
  58    st  %o0, [ %fp + 0x723 ]
  59    rd  %y, %o0
  60    st  %o0, [ %fp + 0x71f ]
  61    ldx  [ %sp + 0x8a7 ], %o5
  62    ldx  [ %sp + 0x89f ], %o4
  63    ldx  [ %sp + 0x897 ], %o3
  64    ldx  [ %sp + 0x88f ], %o2
  65    ldx  [ %sp + 0x887 ], %o1
  66    call  %g0
  67    ldx  [ %sp + 0x87f ], %o0
  68    nop
  69    ta  1
  70    nop
  71    nop
  72    */
  73
  74 #define CALL_DUMMY {             0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
  75                                  0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
  76                                  0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
  77                                  0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
  78                                  0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
  79                                  0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
  80                                  0xf03fa73f01000000LL, 0x0100000001000000LL,\
  81                                  0x0100000091580000LL, 0xd027a72b93500000LL,\
  82                                  0xd027a72791480000LL, 0xd027a72391400000LL,\
  83                                  0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
  84                                  0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
  85                                  0x0100000091d02001LL, 0x0100000001000000LL }
  86
  87
  88 /* 128 is to reserve space to write the %i/%l registers that will be restored
  89    when we resume. */
  90 #define CALL_DUMMY_STACK_ADJUST 128
  91
  92 #define CALL_DUMMY_LENGTH 192
  93
  94 #define CALL_DUMMY_START_OFFSET 148
  95
  96 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
  97
  98 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
  99
 100 #include "sparc/tm-sparc.h"
 101
 102 /* Stack must be aligned on 128-bit boundaries when synthesizing
 103    function calls. */
 104
 105 #undef  STACK_ALIGN
 106 #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
 107
 108 /* Number of machine registers.  */
 109
 110 #undef  NUM_REGS
 111 #define NUM_REGS 125
 112
 113 /* Initializer for an array of names of registers.
 114    There should be NUM_REGS strings in this initializer.  */
 115 /* Some of these registers are only accessible from priviledged mode.
 116    They are here for kernel debuggers, etc.  */
 117 /* FIXME: icc and xcc are currently considered separate registers.
 118    This may have to change and consider them as just one (ccr).
 119    Let's postpone this as long as we can.  It's nice to be able to set
 120    them individually.  */
 121 /* FIXME: fcc0-3 are currently separate, even though they are also part of
 122    fsr.  May have to remove them but let's postpone this as long as
 123    possible.  It's nice to be able to set them individually.  */
 124 /* FIXME: Whether to include f33, f35, etc. here is not clear.
 125    There are advantages and disadvantages.  */
 126
 127 #undef  REGISTER_NAMES
 128 #define REGISTER_NAMES  \
 129 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
 130   "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",       \
 131   "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
 132   "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",       \
 133                                                                 \
 134   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",               \
 135   "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",         \
 136   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",       \
 137   "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",       \
 138   "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",       \
 139   "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",       \
 140                                                                 \
 141   "pc", "npc", "ccr", "fsr", "fprs", "y", "asi",                \
 142   "ver", "tick", "pil", "pstate",                               \
 143   "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate",         \
 144   "cwp", "cansave", "canrestore", "cleanwin", "otherwin",       \
 145   "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",         \
 146   "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",         \
 147   "asr28", "asr29", "asr30", "asr31",                           \
 148   /* These are here at the end to simplify removing them if we have to.  */ \
 149   "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"                  \
 150 }
 151
 152 /* Register numbers of various important registers.
 153    Note that some of these values are "real" register numbers,
 154    and correspond to the general registers of the machine,
 155    and some are "phony" register numbers which are too large
 156    to be actual register numbers as far as the user is concerned
 157    but do serve to get the desired values when passed to read_register.  */
 158
 159 #if 0 /* defined in tm-sparc.h, replicated for doc purposes */
 160 #define G0_REGNUM 0             /* %g0 */
 161 #define G1_REGNUM 1             /* %g1 */
 162 #define O0_REGNUM 8             /* %o0 */
 163 #define SP_REGNUM 14            /* Contains address of top of stack, \
 164                                    which is also the bottom of the frame.  */
 165 #define RP_REGNUM 15            /* Contains return address value, *before* \
 166                                    any windows get switched.  */
 167 #define O7_REGNUM 15            /* Last local reg not saved on stack frame */
 168 #define L0_REGNUM 16            /* First local reg that's saved on stack frame
 169                                    rather than in machine registers */
 170 #define I0_REGNUM 24            /* %i0 */
 171 #define FP_REGNUM 30            /* Contains address of executing stack frame */
 172 #define I7_REGNUM 31            /* Last local reg saved on stack frame */
 173 #define FP0_REGNUM 32           /* Floating point register 0 */
 174 #endif
 175
 176 #define FP_MAX_REGNUM 80        /* 1 + last fp reg number */
 177
 178 /* #undef v8 misc. regs */
 179
 180 #undef Y_REGNUM
 181 #undef PS_REGNUM
 182 #undef WIM_REGNUM
 183 #undef TBR_REGNUM
 184 #undef PC_REGNUM
 185 #undef NPC_REGNUM
 186 #undef FPS_REGNUM
 187 #undef CPS_REGNUM
 188
 189 /* v9 misc. and priv. regs */
 190
 191 #define C0_REGNUM FP_MAX_REGNUM                 /* Start of control registers */
 192 #define PC_REGNUM (C0_REGNUM + 0)               /* Current PC */
 193 #define NPC_REGNUM (C0_REGNUM + 1)              /* Next PC */
 194 #define CCR_REGNUM (C0_REGNUM + 2)              /* Condition Code Register (%xcc,%icc) */
 195 #define FSR_REGNUM (C0_REGNUM + 3)              /* Floating Point State */
 196 #define FPRS_REGNUM (C0_REGNUM + 4)             /* Floating Point Registers State */
 197 #define Y_REGNUM (C0_REGNUM + 5)                /* Temp register for multiplication, etc.  */
 198 #define ASI_REGNUM (C0_REGNUM + 6)              /* Alternate Space Identifier */
 199 #define VER_REGNUM (C0_REGNUM + 7)              /* Version register */
 200 #define TICK_REGNUM (C0_REGNUM + 8)             /* Tick register */
 201 #define PIL_REGNUM (C0_REGNUM + 9)              /* Processor Interrupt Level */
 202 #define PSTATE_REGNUM (C0_REGNUM + 10)          /* Processor State */
 203 #define TSTATE_REGNUM (C0_REGNUM + 11)          /* Trap State */
 204 #define TBA_REGNUM (C0_REGNUM + 12)             /* Trap Base Address */
 205 #define TL_REGNUM (C0_REGNUM + 13)              /* Trap Level */
 206 #define TT_REGNUM (C0_REGNUM + 14)              /* Trap Type */
 207 #define TPC_REGNUM (C0_REGNUM + 15)             /* Trap pc */
 208 #define TNPC_REGNUM (C0_REGNUM + 16)            /* Trap npc */
 209 #define WSTATE_REGNUM (C0_REGNUM + 17)          /* Window State */
 210 #define CWP_REGNUM (C0_REGNUM + 18)             /* Current Window Pointer */
 211 #define CANSAVE_REGNUM (C0_REGNUM + 19)         /* Savable Windows */
 212 #define CANRESTORE_REGNUM (C0_REGNUM + 20)      /* Restorable Windows */
 213 #define CLEANWIN_REGNUM (C0_REGNUM + 21)        /* Clean Windows */
 214 #define OTHERWIN_REGNUM (C0_REGNUM + 22)        /* Other Windows */
 215 #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n))   /* Ancillary State Register
 216                                                    (n = 16...31) */
 217 #define ICC_REGNUM (C0_REGNUM + 39)             /* 32 bit condition codes */
 218 #define XCC_REGNUM (C0_REGNUM + 40)             /* 64 bit condition codes */
 219 #define FCC0_REGNUM (C0_REGNUM + 41)            /* fp cc reg 0 */
 220 #define FCC1_REGNUM (C0_REGNUM + 42)            /* fp cc reg 1 */
 221 #define FCC2_REGNUM (C0_REGNUM + 43)            /* fp cc reg 2 */
 222 #define FCC3_REGNUM (C0_REGNUM + 44)            /* fp cc reg 3 */
 223
 224 /* Total amount of space needed to store our copies of the machine's
 225    register state, the array `registers'.
 226    Some of the registers aren't 64 bits, but it's a lot simpler just to assume
 227    they all are (since most of them are).  */
 228 #undef  REGISTER_BYTES
 229 #define REGISTER_BYTES (32*8+32*8+45*8)
 230
 231 /* Index within `registers' of the first byte of the space for
 232    register N.  */
 233 #undef  REGISTER_BYTE
 234 #define REGISTER_BYTE(N) \
 235   ((N) < 32 ? (N)*8                             \
 236    : (N) < 64 ? 32*8 + ((N)-32)*4               \
 237    : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
 238    : 64*8 + ((N)-C0_REGNUM)*8)
 239
 240 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 241    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 242    real way to know how big a register is.  */
 243
 244 #undef  REGISTER_SIZE
 245 #define REGISTER_SIZE 8
 246
 247 /* Number of bytes of storage in the actual machine representation
 248    for register N.  */
 249
 250 #undef  REGISTER_RAW_SIZE
 251 #define REGISTER_RAW_SIZE(N) \
 252   ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
 253
 254 /* Number of bytes of storage in the program's representation
 255    for register N.  */
 256
 257 #undef  REGISTER_VIRTUAL_SIZE
 258 #define REGISTER_VIRTUAL_SIZE(N) \
 259   ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
 260
 261 /* Largest value REGISTER_RAW_SIZE can have.  */
 262 /* tm-sparc.h defines this as 8, but play it safe.  */
 263
 264 #undef  MAX_REGISTER_RAW_SIZE
 265 #define MAX_REGISTER_RAW_SIZE 8
 266
 267 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 268 /* tm-sparc.h defines this as 8, but play it safe.  */
 269
 270 #undef  MAX_REGISTER_VIRTUAL_SIZE
 271 #define MAX_REGISTER_VIRTUAL_SIZE 8
 272
 273 /* Return the GDB type object for the "standard" data type
 274    of data in register N.  */
 275
 276 #undef  REGISTER_VIRTUAL_TYPE
 277 #define REGISTER_VIRTUAL_TYPE(N) \
 278  ((N) < 32 ? builtin_type_long_long \
 279   : (N) < 64 ? builtin_type_float \
 280   : (N) < 80 ? builtin_type_double \
 281   : builtin_type_long_long)
 282
 283 /* We use to support both 32 bit and 64 bit pointers.
 284    We can't anymore because TARGET_PTR_BIT must now be a constant.  */
 285 #undef  TARGET_PTR_BIT
 286 #define TARGET_PTR_BIT 64
 287
 288 /* Longs are 64 bits. */
 289 #undef TARGET_LONG_BIT
 290 #define TARGET_LONG_BIT 64
 291
 292 #undef TARGET_LONG_LONG_BIT
 293 #define TARGET_LONG_LONG_BIT 64
 294
 295 /* Does the specified function use the "struct returning" convention
 296    or the "value returning" convention?  The "value returning" convention
 297    almost invariably returns the entire value in registers.  The
 298    "struct returning" convention often returns the entire value in
 299    memory, and passes a pointer (out of or into the function) saying
 300    where the value (is or should go).
 301
 302    Since this sometimes depends on whether it was compiled with GCC,
 303    this is also an argument.  This is used in call_function to build a
 304    stack, and in value_being_returned to print return values.
 305
 306    On Sparc64, we only pass pointers to structs if they're larger then
 307    32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
 308    values go into %fp0-%fp3).  */
 309
 310
 311 #undef  USE_STRUCT_CONVENTION
 312 #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
 313
 314 #undef REG_STRUCT_HAS_ADDR
 315 #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
 316
 317 /* Store the address of the place in which to copy the structure the
 318    subroutine will return.  This is called from call_function. */
 319 /* FIXME: V9 uses %o0 for this.  */
 320
 321 #undef  STORE_STRUCT_RETURN
 322 #define STORE_STRUCT_RETURN(ADDR, SP) \
 323   { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
 324
 325 /* Return number of bytes at start of arglist that are not really args.  */
 326
 327 #undef  FRAME_ARGS_SKIP
 328 #define FRAME_ARGS_SKIP 136
 329 \f
 330 /* Offsets into jmp_buf.
 331    FIXME: This was borrowed from the v8 stuff and will probably have to change
 332    for v9.  */
 333
 334 #define JB_ELEMENT_SIZE 8       /* Size of each element in jmp_buf */
 335
 336 #define JB_ONSSTACK 0
 337 #define JB_SIGMASK 1
 338 #define JB_SP 2
 339 #define JB_PC 3
 340 #define JB_NPC 4
 341 #define JB_PSR 5
 342 #define JB_G1 6
 343 #define JB_O0 7
 344 #define JB_WBCNT 8
 345
 346 /* Figure out where the longjmp will land.  We expect that we have just entered
 347    longjmp and haven't yet setup the stack frame, so the args are still in the
 348    output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
 349    extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
 350    This routine returns true on success */
 351
 352 extern int
 353 get_longjmp_target PARAMS ((CORE_ADDR *));
 354
 355 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
 356
 357 extern CORE_ADDR sparc64_read_sp ();
 358 extern CORE_ADDR sparc64_read_fp ();
 359 extern void sparc64_write_sp PARAMS ((CORE_ADDR));
 360 extern void sparc64_write_fp PARAMS ((CORE_ADDR));
 361
 362 #define TARGET_READ_SP() (sparc64_read_sp ())
 363 #define TARGET_READ_FP() (sparc64_read_fp ())
 364 #define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
 365 #define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
 366
 367 #undef TM_PRINT_INSN_MACH
 368 #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
 369
 370 CORE_ADDR sp64_push_arguments PARAMS ((int, struct value **, CORE_ADDR, unsigned char, CORE_ADDR));
 371 #undef PUSH_ARGUMENTS
 372 #define PUSH_ARGUMENTS(A,B,C,D,E) (sp = sp64_push_arguments ((A), (B), (C), (D), (E)))
 373
 374 #undef EXTRACT_RETURN_VALUE
 375 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 376   sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
 377 extern void
 378 sparc64_extract_return_value PARAMS ((struct type *, char [], char *, int));