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1 /* Target-machine dependent code for Renesas H8/300, for GDB.
2
3 Copyright (C) 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
4 1999, 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 /*
24 Contributed by Steve Chamberlain
25 sac@cygnus.com
26 */
27
28 #include "defs.h"
29 #include "value.h"
30 #include "arch-utils.h"
31 #include "regcache.h"
32 #include "gdbcore.h"
33 #include "objfiles.h"
34 #include "gdb_assert.h"
35 #include "dis-asm.h"
36 #include "dwarf2-frame.h"
37 #include "frame-base.h"
38 #include "frame-unwind.h"
39
40 enum gdb_regnum
41 {
42 E_R0_REGNUM, E_ER0_REGNUM = E_R0_REGNUM, E_ARG0_REGNUM = E_R0_REGNUM,
43 E_RET0_REGNUM = E_R0_REGNUM,
44 E_R1_REGNUM, E_ER1_REGNUM = E_R1_REGNUM, E_RET1_REGNUM = E_R1_REGNUM,
45 E_R2_REGNUM, E_ER2_REGNUM = E_R2_REGNUM, E_ARGLAST_REGNUM = E_R2_REGNUM,
46 E_R3_REGNUM, E_ER3_REGNUM = E_R3_REGNUM,
47 E_R4_REGNUM, E_ER4_REGNUM = E_R4_REGNUM,
48 E_R5_REGNUM, E_ER5_REGNUM = E_R5_REGNUM,
49 E_R6_REGNUM, E_ER6_REGNUM = E_R6_REGNUM, E_FP_REGNUM = E_R6_REGNUM,
50 E_SP_REGNUM,
51 E_CCR_REGNUM,
52 E_PC_REGNUM,
53 E_CYCLES_REGNUM,
54 E_TICK_REGNUM, E_EXR_REGNUM = E_TICK_REGNUM,
55 E_INST_REGNUM, E_TICKS_REGNUM = E_INST_REGNUM,
56 E_INSTS_REGNUM,
57 E_MACH_REGNUM,
58 E_MACL_REGNUM,
59 E_SBR_REGNUM,
60 E_VBR_REGNUM
61 };
62
63 #define H8300_MAX_NUM_REGS 18
64
65 #define E_PSEUDO_CCR_REGNUM (NUM_REGS)
66 #define E_PSEUDO_EXR_REGNUM (NUM_REGS+1)
67
68 struct h8300_frame_cache
69 {
70 /* Base address. */
71 CORE_ADDR base;
72 CORE_ADDR sp_offset;
73 CORE_ADDR pc;
74
75 /* Flag showing that a frame has been created in the prologue code. */
76 int uses_fp;
77
78 /* Saved registers. */
79 CORE_ADDR saved_regs[H8300_MAX_NUM_REGS];
80 CORE_ADDR saved_sp;
81 };
82
83 enum
84 {
85 h8300_reg_size = 2,
86 h8300h_reg_size = 4,
87 h8300_max_reg_size = 4,
88 };
89
90 static int is_h8300hmode (struct gdbarch *gdbarch);
91 static int is_h8300smode (struct gdbarch *gdbarch);
92 static int is_h8300sxmode (struct gdbarch *gdbarch);
93 static int is_h8300_normal_mode (struct gdbarch *gdbarch);
94
95 #define BINWORD ((is_h8300hmode (current_gdbarch) \
96 && !is_h8300_normal_mode (current_gdbarch)) \
97 ? h8300h_reg_size : h8300_reg_size)
98
99 static CORE_ADDR
100 h8300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
101 {
102 return frame_unwind_register_unsigned (next_frame, E_PC_REGNUM);
103 }
104
105 static CORE_ADDR
106 h8300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
107 {
108 return frame_unwind_register_unsigned (next_frame, E_SP_REGNUM);
109 }
110
111 static struct frame_id
112 h8300_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
113 {
114 return frame_id_build (h8300_unwind_sp (gdbarch, next_frame),
115 frame_pc_unwind (next_frame));
116 }
117
118 /* Normal frames. */
119
120 /* Allocate and initialize a frame cache. */
121
122 static void
123 h8300_init_frame_cache (struct h8300_frame_cache *cache)
124 {
125 int i;
126
127 /* Base address. */
128 cache->base = 0;
129 cache->sp_offset = 0;
130 cache->pc = 0;
131
132 /* Frameless until proven otherwise. */
133 cache->uses_fp = 0;
134
135 /* Saved registers. We initialize these to -1 since zero is a valid
136 offset (that's where %fp is supposed to be stored). */
137 for (i = 0; i < NUM_REGS; i++)
138 cache->saved_regs[i] = -1;
139 }
140
141 #define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
142 #define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
143 #define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
144 #define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
145 #define IS_MOVB_EXT(x) ((x) == 0x7860)
146 #define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
147 #define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
148 #define IS_MOVW_EXT(x) ((x) == 0x78e0)
149 #define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
150 /* Same instructions as mov.w, just prefixed with 0x0100 */
151 #define IS_MOVL_PRE(x) ((x) == 0x0100)
152 #define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
153 #define IS_MOVL_EXT(x) ((x) == 0x78e0)
154 #define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
155
156 #define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
157 #define IS_PUSH_FP(x) ((x) == 0x01006df6)
158 #define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
159 #define IS_SUB2_SP(x) ((x) == 0x1b87)
160 #define IS_SUB4_SP(x) ((x) == 0x1b97)
161 #define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
162 #define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
163 #define IS_SUBL4_SP(x) ((x) == 0x1acf)
164 #define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
165 #define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
166 #define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
167 #define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
168
169 /* If the instruction at PC is an argument register spill, return its
170 length. Otherwise, return zero.
171
172 An argument register spill is an instruction that moves an argument
173 from the register in which it was passed to the stack slot in which
174 it really lives. It is a byte, word, or longword move from an
175 argument register to a negative offset from the frame pointer.
176
177 CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
178 is used, it could be a byte, word or long move to registers r3-r5. */
179
180 static int
181 h8300_is_argument_spill (CORE_ADDR pc)
182 {
183 int w = read_memory_unsigned_integer (pc, 2);
184
185 if ((IS_MOVB_RnRm (w) || IS_MOVW_RnRm (w) || IS_MOVL_RnRm (w))
186 && (w & 0x70) <= 0x20 /* Rs is R0, R1 or R2 */
187 && (w & 0x7) >= 0x3 && (w & 0x7) <= 0x5) /* Rd is R3, R4 or R5 */
188 return 2;
189
190 if (IS_MOVB_Rn16_SP (w)
191 && 8 <= (w & 0xf) && (w & 0xf) <= 10) /* Rs is R0L, R1L, or R2L */
192 {
193 if (read_memory_integer (pc + 2, 2) < 0) /* ... and d:16 is negative. */
194 return 4;
195 }
196 else if (IS_MOVB_EXT (w))
197 {
198 if (IS_MOVB_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
199 {
200 LONGEST disp = read_memory_integer (pc + 4, 4);
201
202 /* ... and d:24 is negative. */
203 if (disp < 0 && disp > 0xffffff)
204 return 8;
205 }
206 }
207 else if (IS_MOVW_Rn16_SP (w)
208 && (w & 0xf) <= 2) /* Rs is R0, R1, or R2 */
209 {
210 /* ... and d:16 is negative. */
211 if (read_memory_integer (pc + 2, 2) < 0)
212 return 4;
213 }
214 else if (IS_MOVW_EXT (w))
215 {
216 if (IS_MOVW_Rn24_SP (read_memory_unsigned_integer (pc + 2, 2)))
217 {
218 LONGEST disp = read_memory_integer (pc + 4, 4);
219
220 /* ... and d:24 is negative. */
221 if (disp < 0 && disp > 0xffffff)
222 return 8;
223 }
224 }
225 else if (IS_MOVL_PRE (w))
226 {
227 int w2 = read_memory_integer (pc + 2, 2);
228
229 if (IS_MOVL_Rn16_SP (w2)
230 && (w2 & 0xf) <= 2) /* Rs is ER0, ER1, or ER2 */
231 {
232 /* ... and d:16 is negative. */
233 if (read_memory_integer (pc + 4, 2) < 0)
234 return 6;
235 }
236 else if (IS_MOVL_EXT (w2))
237 {
238 int w3 = read_memory_integer (pc + 4, 2);
239
240 if (IS_MOVL_Rn24_SP (read_memory_integer (pc + 4, 2)))
241 {
242 LONGEST disp = read_memory_integer (pc + 6, 4);
243
244 /* ... and d:24 is negative. */
245 if (disp < 0 && disp > 0xffffff)
246 return 10;
247 }
248 }
249 }
250
251 return 0;
252 }
253
254 /* Do a full analysis of the prologue at PC and update CACHE
255 accordingly. Bail out early if CURRENT_PC is reached. Return the
256 address where the analysis stopped.
257
258 We handle all cases that can be generated by gcc.
259
260 For allocating a stack frame:
261
262 mov.w r6,@-sp
263 mov.w sp,r6
264 mov.w #-n,rN
265 add.w rN,sp
266
267 mov.w r6,@-sp
268 mov.w sp,r6
269 subs #2,sp
270 (repeat)
271
272 mov.l er6,@-sp
273 mov.l sp,er6
274 add.l #-n,sp
275
276 mov.w r6,@-sp
277 mov.w sp,r6
278 subs #4,sp
279 (repeat)
280
281 For saving registers:
282
283 mov.w rN,@-sp
284 mov.l erN,@-sp
285 stm.l reglist,@-sp
286
287 */
288
289 static CORE_ADDR
290 h8300_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
291 struct h8300_frame_cache *cache)
292 {
293 unsigned int op;
294 int regno, i, spill_size;
295
296 cache->sp_offset = 0;
297
298 if (pc >= current_pc)
299 return current_pc;
300
301 op = read_memory_unsigned_integer (pc, 4);
302
303 if (IS_PUSHFP_MOVESPFP (op))
304 {
305 cache->saved_regs[E_FP_REGNUM] = 0;
306 cache->uses_fp = 1;
307 pc += 4;
308 }
309 else if (IS_PUSH_FP (op))
310 {
311 cache->saved_regs[E_FP_REGNUM] = 0;
312 pc += 4;
313 if (pc >= current_pc)
314 return current_pc;
315 op = read_memory_unsigned_integer (pc, 2);
316 if (IS_MOV_SP_FP (op))
317 {
318 cache->uses_fp = 1;
319 pc += 2;
320 }
321 }
322
323 while (pc < current_pc)
324 {
325 op = read_memory_unsigned_integer (pc, 2);
326 if (IS_SUB2_SP (op))
327 {
328 cache->sp_offset += 2;
329 pc += 2;
330 }
331 else if (IS_SUB4_SP (op))
332 {
333 cache->sp_offset += 4;
334 pc += 2;
335 }
336 else if (IS_ADD_IMM_SP (op))
337 {
338 cache->sp_offset += -read_memory_integer (pc + 2, 2);
339 pc += 4;
340 }
341 else if (IS_SUB_IMM_SP (op))
342 {
343 cache->sp_offset += read_memory_integer (pc + 2, 2);
344 pc += 4;
345 }
346 else if (IS_SUBL4_SP (op))
347 {
348 cache->sp_offset += 4;
349 pc += 2;
350 }
351 else if (IS_MOV_IMM_Rn (op))
352 {
353 int offset = read_memory_integer (pc + 2, 2);
354 regno = op & 0x000f;
355 op = read_memory_unsigned_integer (pc + 4, 2);
356 if (IS_ADD_RnSP (op) && (op & 0x00f0) == regno)
357 {
358 cache->sp_offset -= offset;
359 pc += 6;
360 }
361 else if (IS_SUB_RnSP (op) && (op & 0x00f0) == regno)
362 {
363 cache->sp_offset += offset;
364 pc += 6;
365 }
366 else
367 break;
368 }
369 else if (IS_PUSH (op))
370 {
371 regno = op & 0x000f;
372 cache->sp_offset += 2;
373 cache->saved_regs[regno] = cache->sp_offset;
374 pc += 2;
375 }
376 else if (op == 0x0100)
377 {
378 op = read_memory_unsigned_integer (pc + 2, 2);
379 if (IS_PUSH (op))
380 {
381 regno = op & 0x000f;
382 cache->sp_offset += 4;
383 cache->saved_regs[regno] = cache->sp_offset;
384 pc += 4;
385 }
386 else
387 break;
388 }
389 else if ((op & 0xffcf) == 0x0100)
390 {
391 int op1;
392 op1 = read_memory_unsigned_integer (pc + 2, 2);
393 if (IS_PUSH (op1))
394 {
395 /* Since the prefix is 0x01x0, this is not a simple pushm but a
396 stm.l reglist,@-sp */
397 i = ((op & 0x0030) >> 4) + 1;
398 regno = op1 & 0x000f;
399 for (; i > 0; regno++, --i)
400 {
401 cache->sp_offset += 4;
402 cache->saved_regs[regno] = cache->sp_offset;
403 }
404 pc += 4;
405 }
406 else
407 break;
408 }
409 else
410 break;
411 }
412
413 /* Check for spilling an argument register to the stack frame.
414 This could also be an initializing store from non-prologue code,
415 but I don't think there's any harm in skipping that. */
416 while ((spill_size = h8300_is_argument_spill (pc)) > 0
417 && pc + spill_size <= current_pc)
418 pc += spill_size;
419
420 return pc;
421 }
422
423 static struct h8300_frame_cache *
424 h8300_frame_cache (struct frame_info *next_frame, void **this_cache)
425 {
426 struct h8300_frame_cache *cache;
427 char buf[4];
428 int i;
429 CORE_ADDR current_pc;
430
431 if (*this_cache)
432 return *this_cache;
433
434 cache = FRAME_OBSTACK_ZALLOC (struct h8300_frame_cache);
435 h8300_init_frame_cache (cache);
436 *this_cache = cache;
437
438 /* In principle, for normal frames, %fp holds the frame pointer,
439 which holds the base address for the current stack frame.
440 However, for functions that don't need it, the frame pointer is
441 optional. For these "frameless" functions the frame pointer is
442 actually the frame pointer of the calling frame. */
443
444 cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM);
445 if (cache->base == 0)
446 return cache;
447
448 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
449
450 cache->pc = frame_func_unwind (next_frame);
451 current_pc = frame_pc_unwind (next_frame);
452 if (cache->pc != 0)
453 h8300_analyze_prologue (cache->pc, current_pc, cache);
454
455 if (!cache->uses_fp)
456 {
457 /* We didn't find a valid frame, which means that CACHE->base
458 currently holds the frame pointer for our calling frame. If
459 we're at the start of a function, or somewhere half-way its
460 prologue, the function's frame probably hasn't been fully
461 setup yet. Try to reconstruct the base address for the stack
462 frame by looking at the stack pointer. For truly "frameless"
463 functions this might work too. */
464
465 cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM)
466 + cache->sp_offset;
467 cache->saved_sp = cache->base + BINWORD;
468 cache->saved_regs[E_PC_REGNUM] = 0;
469 }
470 else
471 {
472 cache->saved_sp = cache->base + 2 * BINWORD;
473 cache->saved_regs[E_PC_REGNUM] = -BINWORD;
474 }
475
476 /* Adjust all the saved registers such that they contain addresses
477 instead of offsets. */
478 for (i = 0; i < NUM_REGS; i++)
479 if (cache->saved_regs[i] != -1)
480 cache->saved_regs[i] = cache->base - cache->saved_regs[i];
481
482 return cache;
483 }
484
485 static void
486 h8300_frame_this_id (struct frame_info *next_frame, void **this_cache,
487 struct frame_id *this_id)
488 {
489 struct h8300_frame_cache *cache =
490 h8300_frame_cache (next_frame, this_cache);
491
492 /* This marks the outermost frame. */
493 if (cache->base == 0)
494 return;
495
496 *this_id = frame_id_build (cache->saved_sp, cache->pc);
497 }
498
499 static void
500 h8300_frame_prev_register (struct frame_info *next_frame, void **this_cache,
501 int regnum, int *optimizedp,
502 enum lval_type *lvalp, CORE_ADDR *addrp,
503 int *realnump, gdb_byte *valuep)
504 {
505 struct h8300_frame_cache *cache =
506 h8300_frame_cache (next_frame, this_cache);
507
508 gdb_assert (regnum >= 0);
509
510 if (regnum == E_SP_REGNUM && cache->saved_sp)
511 {
512 *optimizedp = 0;
513 *lvalp = not_lval;
514 *addrp = 0;
515 *realnump = -1;
516 if (valuep)
517 store_unsigned_integer (valuep, BINWORD, cache->saved_sp);
518 return;
519 }
520
521 if (regnum < NUM_REGS && cache->saved_regs[regnum] != -1)
522 {
523 *optimizedp = 0;
524 *lvalp = lval_memory;
525 *addrp = cache->saved_regs[regnum];
526 *realnump = -1;
527 if (valuep)
528 read_memory (*addrp, valuep, register_size (current_gdbarch, regnum));
529 return;
530 }
531
532 frame_register_unwind (next_frame, regnum,
533 optimizedp, lvalp, addrp, realnump, valuep);
534 }
535
536 static const struct frame_unwind h8300_frame_unwind = {
537 NORMAL_FRAME,
538 h8300_frame_this_id,
539 h8300_frame_prev_register
540 };
541
542 static const struct frame_unwind *
543 h8300_frame_sniffer (struct frame_info *next_frame)
544 {
545 return &h8300_frame_unwind;
546 }
547
548 static CORE_ADDR
549 h8300_frame_base_address (struct frame_info *next_frame, void **this_cache)
550 {
551 struct h8300_frame_cache *cache = h8300_frame_cache (next_frame, this_cache);
552 return cache->base;
553 }
554
555 static const struct frame_base h8300_frame_base = {
556 &h8300_frame_unwind,
557 h8300_frame_base_address,
558 h8300_frame_base_address,
559 h8300_frame_base_address
560 };
561
562 static CORE_ADDR
563 h8300_skip_prologue (CORE_ADDR pc)
564 {
565 CORE_ADDR func_addr = 0 , func_end = 0;
566
567 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
568 {
569 struct symtab_and_line sal;
570 struct h8300_frame_cache cache;
571
572 /* Found a function. */
573 sal = find_pc_line (func_addr, 0);
574 if (sal.end && sal.end < func_end)
575 /* Found a line number, use it as end of prologue. */
576 return sal.end;
577
578 /* No useable line symbol. Use prologue parsing method. */
579 h8300_init_frame_cache (&cache);
580 return h8300_analyze_prologue (func_addr, func_end, &cache);
581 }
582
583 /* No function symbol -- just return the PC. */
584 return (CORE_ADDR) pc;
585 }
586
587 /* Function: push_dummy_call
588 Setup the function arguments for calling a function in the inferior.
589 In this discussion, a `word' is 16 bits on the H8/300s, and 32 bits
590 on the H8/300H.
591
592 There are actually two ABI's here: -mquickcall (the default) and
593 -mno-quickcall. With -mno-quickcall, all arguments are passed on
594 the stack after the return address, word-aligned. With
595 -mquickcall, GCC tries to use r0 -- r2 to pass registers. Since
596 GCC doesn't indicate in the object file which ABI was used to
597 compile it, GDB only supports the default --- -mquickcall.
598
599 Here are the rules for -mquickcall, in detail:
600
601 Each argument, whether scalar or aggregate, is padded to occupy a
602 whole number of words. Arguments smaller than a word are padded at
603 the most significant end; those larger than a word are padded at
604 the least significant end.
605
606 The initial arguments are passed in r0 -- r2. Earlier arguments go in
607 lower-numbered registers. Multi-word arguments are passed in
608 consecutive registers, with the most significant end in the
609 lower-numbered register.
610
611 If an argument doesn't fit entirely in the remaining registers, it
612 is passed entirely on the stack. Stack arguments begin just after
613 the return address. Once an argument has overflowed onto the stack
614 this way, all subsequent arguments are passed on the stack.
615
616 The above rule has odd consequences. For example, on the h8/300s,
617 if a function takes two longs and an int as arguments:
618 - the first long will be passed in r0/r1,
619 - the second long will be passed entirely on the stack, since it
620 doesn't fit in r2,
621 - and the int will be passed on the stack, even though it could fit
622 in r2.
623
624 A weird exception: if an argument is larger than a word, but not a
625 whole number of words in length (before padding), it is passed on
626 the stack following the rules for stack arguments above, even if
627 there are sufficient registers available to hold it. Stranger
628 still, the argument registers are still `used up' --- even though
629 there's nothing in them.
630
631 So, for example, on the h8/300s, if a function expects a three-byte
632 structure and an int, the structure will go on the stack, and the
633 int will go in r2, not r0.
634
635 If the function returns an aggregate type (struct, union, or class)
636 by value, the caller must allocate space to hold the return value,
637 and pass the callee a pointer to this space as an invisible first
638 argument, in R0.
639
640 For varargs functions, the last fixed argument and all the variable
641 arguments are always passed on the stack. This means that calls to
642 varargs functions don't work properly unless there is a prototype
643 in scope.
644
645 Basically, this ABI is not good, for the following reasons:
646 - You can't call vararg functions properly unless a prototype is in scope.
647 - Structure passing is inconsistent, to no purpose I can see.
648 - It often wastes argument registers, of which there are only three
649 to begin with. */
650
651 static CORE_ADDR
652 h8300_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
653 struct regcache *regcache, CORE_ADDR bp_addr,
654 int nargs, struct value **args, CORE_ADDR sp,
655 int struct_return, CORE_ADDR struct_addr)
656 {
657 int stack_alloc = 0, stack_offset = 0;
658 int wordsize = BINWORD;
659 int reg = E_ARG0_REGNUM;
660 int argument;
661
662 /* First, make sure the stack is properly aligned. */
663 sp = align_down (sp, wordsize);
664
665 /* Now make sure there's space on the stack for the arguments. We
666 may over-allocate a little here, but that won't hurt anything. */
667 for (argument = 0; argument < nargs; argument++)
668 stack_alloc += align_up (TYPE_LENGTH (value_type (args[argument])),
669 wordsize);
670 sp -= stack_alloc;
671
672 /* Now load as many arguments as possible into registers, and push
673 the rest onto the stack.
674 If we're returning a structure by value, then we must pass a
675 pointer to the buffer for the return value as an invisible first
676 argument. */
677 if (struct_return)
678 regcache_cooked_write_unsigned (regcache, reg++, struct_addr);
679
680 for (argument = 0; argument < nargs; argument++)
681 {
682 struct type *type = value_type (args[argument]);
683 int len = TYPE_LENGTH (type);
684 char *contents = (char *) value_contents (args[argument]);
685
686 /* Pad the argument appropriately. */
687 int padded_len = align_up (len, wordsize);
688 gdb_byte *padded = alloca (padded_len);
689
690 memset (padded, 0, padded_len);
691 memcpy (len < wordsize ? padded + padded_len - len : padded,
692 contents, len);
693
694 /* Could the argument fit in the remaining registers? */
695 if (padded_len <= (E_ARGLAST_REGNUM - reg + 1) * wordsize)
696 {
697 /* Are we going to pass it on the stack anyway, for no good
698 reason? */
699 if (len > wordsize && len % wordsize)
700 {
701 /* I feel so unclean. */
702 write_memory (sp + stack_offset, padded, padded_len);
703 stack_offset += padded_len;
704
705 /* That's right --- even though we passed the argument
706 on the stack, we consume the registers anyway! Love
707 me, love my dog. */
708 reg += padded_len / wordsize;
709 }
710 else
711 {
712 /* Heavens to Betsy --- it's really going in registers!
713 It would be nice if we could use write_register_bytes
714 here, but on the h8/300s, there are gaps between
715 the registers in the register file. */
716 int offset;
717
718 for (offset = 0; offset < padded_len; offset += wordsize)
719 {
720 ULONGEST word = extract_unsigned_integer (padded + offset,
721 wordsize);
722 regcache_cooked_write_unsigned (regcache, reg++, word);
723 }
724 }
725 }
726 else
727 {
728 /* It doesn't fit in registers! Onto the stack it goes. */
729 write_memory (sp + stack_offset, padded, padded_len);
730 stack_offset += padded_len;
731
732 /* Once one argument has spilled onto the stack, all
733 subsequent arguments go on the stack. */
734 reg = E_ARGLAST_REGNUM + 1;
735 }
736 }
737
738 /* Store return address. */
739 sp -= wordsize;
740 write_memory_unsigned_integer (sp, wordsize, bp_addr);
741
742 /* Update stack pointer. */
743 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
744
745 /* Return the new stack pointer minus the return address slot since
746 that's what DWARF2/GCC uses as the frame's CFA. */
747 return sp + wordsize;
748 }
749
750 /* Function: extract_return_value
751 Figure out where in REGBUF the called function has left its return value.
752 Copy that into VALBUF. Be sure to account for CPU type. */
753
754 static void
755 h8300_extract_return_value (struct type *type, struct regcache *regcache,
756 void *valbuf)
757 {
758 int len = TYPE_LENGTH (type);
759 ULONGEST c, addr;
760
761 switch (len)
762 {
763 case 1:
764 case 2:
765 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
766 store_unsigned_integer (valbuf, len, c);
767 break;
768 case 4: /* Needs two registers on plain H8/300 */
769 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
770 store_unsigned_integer (valbuf, 2, c);
771 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
772 store_unsigned_integer ((void *) ((char *) valbuf + 2), 2, c);
773 break;
774 case 8: /* long long is now 8 bytes. */
775 if (TYPE_CODE (type) == TYPE_CODE_INT)
776 {
777 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &addr);
778 c = read_memory_unsigned_integer ((CORE_ADDR) addr, len);
779 store_unsigned_integer (valbuf, len, c);
780 }
781 else
782 {
783 error ("I don't know how this 8 byte value is returned.");
784 }
785 break;
786 }
787 }
788
789 static void
790 h8300h_extract_return_value (struct type *type, struct regcache *regcache,
791 void *valbuf)
792 {
793 int len = TYPE_LENGTH (type);
794 ULONGEST c, addr;
795
796 switch (len)
797 {
798 case 1:
799 case 2:
800 case 4:
801 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
802 store_unsigned_integer (valbuf, len, c);
803 break;
804 case 8: /* long long is now 8 bytes. */
805 if (TYPE_CODE (type) == TYPE_CODE_INT)
806 {
807 regcache_cooked_read_unsigned (regcache, E_RET0_REGNUM, &c);
808 store_unsigned_integer (valbuf, 4, c);
809 regcache_cooked_read_unsigned (regcache, E_RET1_REGNUM, &c);
810 store_unsigned_integer ((void *) ((char *) valbuf + 4), 4, c);
811 }
812 else
813 {
814 error ("I don't know how this 8 byte value is returned.");
815 }
816 break;
817 }
818 }
819
820 int
821 h8300_use_struct_convention (struct type *value_type)
822 {
823 /* Types of 1, 2 or 4 bytes are returned in R0/R1, everything else on the
824 stack. */
825
826 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
827 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
828 return 1;
829 return !(TYPE_LENGTH (value_type) == 1
830 || TYPE_LENGTH (value_type) == 2
831 || TYPE_LENGTH (value_type) == 4);
832 }
833
834 int
835 h8300h_use_struct_convention (struct type *value_type)
836 {
837 /* Types of 1, 2 or 4 bytes are returned in R0, INT types of 8 bytes are
838 returned in R0/R1, everything else on the stack. */
839 if (TYPE_CODE (value_type) == TYPE_CODE_STRUCT
840 || TYPE_CODE (value_type) == TYPE_CODE_UNION)
841 return 1;
842 return !(TYPE_LENGTH (value_type) == 1
843 || TYPE_LENGTH (value_type) == 2
844 || TYPE_LENGTH (value_type) == 4
845 || (TYPE_LENGTH (value_type) == 8
846 && TYPE_CODE (value_type) == TYPE_CODE_INT));
847 }
848
849 /* Function: store_return_value
850 Place the appropriate value in the appropriate registers.
851 Primarily used by the RETURN command. */
852
853 static void
854 h8300_store_return_value (struct type *type, struct regcache *regcache,
855 const void *valbuf)
856 {
857 int len = TYPE_LENGTH (type);
858 ULONGEST val;
859
860 switch (len)
861 {
862 case 1:
863 case 2: /* short... */
864 val = extract_unsigned_integer (valbuf, len);
865 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
866 break;
867 case 4: /* long, float */
868 val = extract_unsigned_integer (valbuf, len);
869 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
870 (val >> 16) & 0xffff);
871 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM, val & 0xffff);
872 break;
873 case 8: /* long long, double and long double are all defined
874 as 4 byte types so far so this shouldn't happen. */
875 error ("I don't know how to return an 8 byte value.");
876 break;
877 }
878 }
879
880 static void
881 h8300h_store_return_value (struct type *type, struct regcache *regcache,
882 const void *valbuf)
883 {
884 int len = TYPE_LENGTH (type);
885 ULONGEST val;
886
887 switch (len)
888 {
889 case 1:
890 case 2:
891 case 4: /* long, float */
892 val = extract_unsigned_integer (valbuf, len);
893 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM, val);
894 break;
895 case 8:
896 val = extract_unsigned_integer (valbuf, len);
897 regcache_cooked_write_unsigned (regcache, E_RET0_REGNUM,
898 (val >> 32) & 0xffffffff);
899 regcache_cooked_write_unsigned (regcache, E_RET1_REGNUM,
900 val & 0xffffffff);
901 break;
902 }
903 }
904
905 static enum return_value_convention
906 h8300_return_value (struct gdbarch *gdbarch, struct type *type,
907 struct regcache *regcache,
908 gdb_byte *readbuf, const gdb_byte *writebuf)
909 {
910 if (h8300_use_struct_convention (type))
911 return RETURN_VALUE_STRUCT_CONVENTION;
912 if (writebuf)
913 h8300_store_return_value (type, regcache, writebuf);
914 else if (readbuf)
915 h8300_extract_return_value (type, regcache, readbuf);
916 return RETURN_VALUE_REGISTER_CONVENTION;
917 }
918
919 static enum return_value_convention
920 h8300h_return_value (struct gdbarch *gdbarch, struct type *type,
921 struct regcache *regcache,
922 gdb_byte *readbuf, const gdb_byte *writebuf)
923 {
924 if (h8300h_use_struct_convention (type))
925 {
926 if (readbuf)
927 {
928 ULONGEST addr;
929
930 regcache_raw_read_unsigned (regcache, E_R0_REGNUM, &addr);
931 read_memory (addr, readbuf, TYPE_LENGTH (type));
932 }
933
934 return RETURN_VALUE_ABI_RETURNS_ADDRESS;
935 }
936 if (writebuf)
937 h8300h_store_return_value (type, regcache, writebuf);
938 else if (readbuf)
939 h8300h_extract_return_value (type, regcache, readbuf);
940 return RETURN_VALUE_REGISTER_CONVENTION;
941 }
942
943 static struct cmd_list_element *setmachinelist;
944
945 static const char *
946 h8300_register_name (int regno)
947 {
948 /* The register names change depending on which h8300 processor
949 type is selected. */
950 static char *register_names[] = {
951 "r0", "r1", "r2", "r3", "r4", "r5", "r6",
952 "sp", "", "pc", "cycles", "tick", "inst",
953 "ccr", /* pseudo register */
954 };
955 if (regno < 0
956 || regno >= (sizeof (register_names) / sizeof (*register_names)))
957 internal_error (__FILE__, __LINE__,
958 "h8300_register_name: illegal register number %d", regno);
959 else
960 return register_names[regno];
961 }
962
963 static const char *
964 h8300s_register_name (int regno)
965 {
966 static char *register_names[] = {
967 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
968 "sp", "", "pc", "cycles", "", "tick", "inst",
969 "mach", "macl",
970 "ccr", "exr" /* pseudo registers */
971 };
972 if (regno < 0
973 || regno >= (sizeof (register_names) / sizeof (*register_names)))
974 internal_error (__FILE__, __LINE__,
975 "h8300s_register_name: illegal register number %d",
976 regno);
977 else
978 return register_names[regno];
979 }
980
981 static const char *
982 h8300sx_register_name (int regno)
983 {
984 static char *register_names[] = {
985 "er0", "er1", "er2", "er3", "er4", "er5", "er6",
986 "sp", "", "pc", "cycles", "", "tick", "inst",
987 "mach", "macl", "sbr", "vbr",
988 "ccr", "exr" /* pseudo registers */
989 };
990 if (regno < 0
991 || regno >= (sizeof (register_names) / sizeof (*register_names)))
992 internal_error (__FILE__, __LINE__,
993 "h8300sx_register_name: illegal register number %d",
994 regno);
995 else
996 return register_names[regno];
997 }
998
999 static void
1000 h8300_print_register (struct gdbarch *gdbarch, struct ui_file *file,
1001 struct frame_info *frame, int regno)
1002 {
1003 LONGEST rval;
1004 const char *name = gdbarch_register_name (gdbarch, regno);
1005
1006 if (!name || !*name)
1007 return;
1008
1009 rval = get_frame_register_signed (frame, regno);
1010
1011 fprintf_filtered (file, "%-14s ", name);
1012 if ((regno == E_PSEUDO_CCR_REGNUM) || \
1013 (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch)))
1014 {
1015 fprintf_filtered (file, "0x%02x ", (unsigned char) rval);
1016 print_longest (file, 'u', 1, rval);
1017 }
1018 else
1019 {
1020 fprintf_filtered (file, "0x%s ", phex ((ULONGEST) rval, BINWORD));
1021 print_longest (file, 'd', 1, rval);
1022 }
1023 if (regno == E_PSEUDO_CCR_REGNUM)
1024 {
1025 /* CCR register */
1026 int C, Z, N, V;
1027 unsigned char l = rval & 0xff;
1028 fprintf_filtered (file, "\t");
1029 fprintf_filtered (file, "I-%d ", (l & 0x80) != 0);
1030 fprintf_filtered (file, "UI-%d ", (l & 0x40) != 0);
1031 fprintf_filtered (file, "H-%d ", (l & 0x20) != 0);
1032 fprintf_filtered (file, "U-%d ", (l & 0x10) != 0);
1033 N = (l & 0x8) != 0;
1034 Z = (l & 0x4) != 0;
1035 V = (l & 0x2) != 0;
1036 C = (l & 0x1) != 0;
1037 fprintf_filtered (file, "N-%d ", N);
1038 fprintf_filtered (file, "Z-%d ", Z);
1039 fprintf_filtered (file, "V-%d ", V);
1040 fprintf_filtered (file, "C-%d ", C);
1041 if ((C | Z) == 0)
1042 fprintf_filtered (file, "u> ");
1043 if ((C | Z) == 1)
1044 fprintf_filtered (file, "u<= ");
1045 if ((C == 0))
1046 fprintf_filtered (file, "u>= ");
1047 if (C == 1)
1048 fprintf_filtered (file, "u< ");
1049 if (Z == 0)
1050 fprintf_filtered (file, "!= ");
1051 if (Z == 1)
1052 fprintf_filtered (file, "== ");
1053 if ((N ^ V) == 0)
1054 fprintf_filtered (file, ">= ");
1055 if ((N ^ V) == 1)
1056 fprintf_filtered (file, "< ");
1057 if ((Z | (N ^ V)) == 0)
1058 fprintf_filtered (file, "> ");
1059 if ((Z | (N ^ V)) == 1)
1060 fprintf_filtered (file, "<= ");
1061 }
1062 else if (regno == E_PSEUDO_EXR_REGNUM && is_h8300smode (current_gdbarch))
1063 {
1064 /* EXR register */
1065 unsigned char l = rval & 0xff;
1066 fprintf_filtered (file, "\t");
1067 fprintf_filtered (file, "T-%d - - - ", (l & 0x80) != 0);
1068 fprintf_filtered (file, "I2-%d ", (l & 4) != 0);
1069 fprintf_filtered (file, "I1-%d ", (l & 2) != 0);
1070 fprintf_filtered (file, "I0-%d", (l & 1) != 0);
1071 }
1072 fprintf_filtered (file, "\n");
1073 }
1074
1075 static void
1076 h8300_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
1077 struct frame_info *frame, int regno, int cpregs)
1078 {
1079 if (regno < 0)
1080 {
1081 for (regno = E_R0_REGNUM; regno <= E_SP_REGNUM; ++regno)
1082 h8300_print_register (gdbarch, file, frame, regno);
1083 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1084 h8300_print_register (gdbarch, file, frame, E_PC_REGNUM);
1085 if (is_h8300smode (current_gdbarch))
1086 {
1087 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1088 if (is_h8300sxmode (current_gdbarch))
1089 {
1090 h8300_print_register (gdbarch, file, frame, E_SBR_REGNUM);
1091 h8300_print_register (gdbarch, file, frame, E_VBR_REGNUM);
1092 }
1093 h8300_print_register (gdbarch, file, frame, E_MACH_REGNUM);
1094 h8300_print_register (gdbarch, file, frame, E_MACL_REGNUM);
1095 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1096 h8300_print_register (gdbarch, file, frame, E_TICKS_REGNUM);
1097 h8300_print_register (gdbarch, file, frame, E_INSTS_REGNUM);
1098 }
1099 else
1100 {
1101 h8300_print_register (gdbarch, file, frame, E_CYCLES_REGNUM);
1102 h8300_print_register (gdbarch, file, frame, E_TICK_REGNUM);
1103 h8300_print_register (gdbarch, file, frame, E_INST_REGNUM);
1104 }
1105 }
1106 else
1107 {
1108 if (regno == E_CCR_REGNUM)
1109 h8300_print_register (gdbarch, file, frame, E_PSEUDO_CCR_REGNUM);
1110 else if (regno == E_PSEUDO_EXR_REGNUM
1111 && is_h8300smode (current_gdbarch))
1112 h8300_print_register (gdbarch, file, frame, E_PSEUDO_EXR_REGNUM);
1113 else
1114 h8300_print_register (gdbarch, file, frame, regno);
1115 }
1116 }
1117
1118 static struct type *
1119 h8300_register_type (struct gdbarch *gdbarch, int regno)
1120 {
1121 if (regno < 0 || regno >= NUM_REGS + NUM_PSEUDO_REGS)
1122 internal_error (__FILE__, __LINE__,
1123 "h8300_register_type: illegal register number %d", regno);
1124 else
1125 {
1126 switch (regno)
1127 {
1128 case E_PC_REGNUM:
1129 return builtin_type_void_func_ptr;
1130 case E_SP_REGNUM:
1131 case E_FP_REGNUM:
1132 return builtin_type_void_data_ptr;
1133 default:
1134 if (regno == E_PSEUDO_CCR_REGNUM)
1135 return builtin_type_uint8;
1136 else if (regno == E_PSEUDO_EXR_REGNUM)
1137 return builtin_type_uint8;
1138 else if (is_h8300hmode (current_gdbarch))
1139 return builtin_type_int32;
1140 else
1141 return builtin_type_int16;
1142 }
1143 }
1144 }
1145
1146 static void
1147 h8300_pseudo_register_read (struct gdbarch *gdbarch,
1148 struct regcache *regcache, int regno,
1149 gdb_byte *buf)
1150 {
1151 if (regno == E_PSEUDO_CCR_REGNUM)
1152 regcache_raw_read (regcache, E_CCR_REGNUM, buf);
1153 else if (regno == E_PSEUDO_EXR_REGNUM)
1154 regcache_raw_read (regcache, E_EXR_REGNUM, buf);
1155 else
1156 regcache_raw_read (regcache, regno, buf);
1157 }
1158
1159 static void
1160 h8300_pseudo_register_write (struct gdbarch *gdbarch,
1161 struct regcache *regcache, int regno,
1162 const gdb_byte *buf)
1163 {
1164 if (regno == E_PSEUDO_CCR_REGNUM)
1165 regcache_raw_write (regcache, E_CCR_REGNUM, buf);
1166 else if (regno == E_PSEUDO_EXR_REGNUM)
1167 regcache_raw_write (regcache, E_EXR_REGNUM, buf);
1168 else
1169 regcache_raw_write (regcache, regno, buf);
1170 }
1171
1172 static int
1173 h8300_dbg_reg_to_regnum (int regno)
1174 {
1175 if (regno == E_CCR_REGNUM)
1176 return E_PSEUDO_CCR_REGNUM;
1177 return regno;
1178 }
1179
1180 static int
1181 h8300s_dbg_reg_to_regnum (int regno)
1182 {
1183 if (regno == E_CCR_REGNUM)
1184 return E_PSEUDO_CCR_REGNUM;
1185 if (regno == E_EXR_REGNUM)
1186 return E_PSEUDO_EXR_REGNUM;
1187 return regno;
1188 }
1189
1190 const static unsigned char *
1191 h8300_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
1192 {
1193 /*static unsigned char breakpoint[] = { 0x7A, 0xFF }; *//* ??? */
1194 static unsigned char breakpoint[] = { 0x01, 0x80 }; /* Sleep */
1195
1196 *lenptr = sizeof (breakpoint);
1197 return breakpoint;
1198 }
1199
1200 static void
1201 h8300_print_float_info (struct gdbarch *gdbarch, struct ui_file *file,
1202 struct frame_info *frame, const char *args)
1203 {
1204 fprintf_filtered (file, "\
1205 No floating-point info available for this processor.\n");
1206 }
1207
1208 static struct gdbarch *
1209 h8300_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1210 {
1211 struct gdbarch_tdep *tdep = NULL;
1212 struct gdbarch *gdbarch;
1213
1214 arches = gdbarch_list_lookup_by_info (arches, &info);
1215 if (arches != NULL)
1216 return arches->gdbarch;
1217
1218 #if 0
1219 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
1220 #endif
1221
1222 if (info.bfd_arch_info->arch != bfd_arch_h8300)
1223 return NULL;
1224
1225 gdbarch = gdbarch_alloc (&info, 0);
1226
1227 switch (info.bfd_arch_info->mach)
1228 {
1229 case bfd_mach_h8300:
1230 set_gdbarch_num_regs (gdbarch, 13);
1231 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1232 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1233 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1234 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1235 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1236 set_gdbarch_register_name (gdbarch, h8300_register_name);
1237 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1238 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1239 set_gdbarch_return_value (gdbarch, h8300_return_value);
1240 set_gdbarch_print_insn (gdbarch, print_insn_h8300);
1241 break;
1242 case bfd_mach_h8300h:
1243 case bfd_mach_h8300hn:
1244 set_gdbarch_num_regs (gdbarch, 13);
1245 set_gdbarch_num_pseudo_regs (gdbarch, 1);
1246 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1247 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1248 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1249 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300_dbg_reg_to_regnum);
1250 set_gdbarch_register_name (gdbarch, h8300_register_name);
1251 if (info.bfd_arch_info->mach != bfd_mach_h8300hn)
1252 {
1253 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1254 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1255 }
1256 else
1257 {
1258 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1259 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1260 }
1261 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1262 set_gdbarch_print_insn (gdbarch, print_insn_h8300h);
1263 break;
1264 case bfd_mach_h8300s:
1265 case bfd_mach_h8300sn:
1266 set_gdbarch_num_regs (gdbarch, 16);
1267 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1268 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1269 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1270 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1271 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1272 set_gdbarch_register_name (gdbarch, h8300s_register_name);
1273 if (info.bfd_arch_info->mach != bfd_mach_h8300sn)
1274 {
1275 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1276 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1277 }
1278 else
1279 {
1280 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1281 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1282 }
1283 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1284 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1285 break;
1286 case bfd_mach_h8300sx:
1287 case bfd_mach_h8300sxn:
1288 set_gdbarch_num_regs (gdbarch, 18);
1289 set_gdbarch_num_pseudo_regs (gdbarch, 2);
1290 set_gdbarch_ecoff_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1291 set_gdbarch_dwarf_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1292 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1293 set_gdbarch_stab_reg_to_regnum (gdbarch, h8300s_dbg_reg_to_regnum);
1294 set_gdbarch_register_name (gdbarch, h8300sx_register_name);
1295 if (info.bfd_arch_info->mach != bfd_mach_h8300sxn)
1296 {
1297 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1298 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1299 }
1300 else
1301 {
1302 set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1303 set_gdbarch_addr_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1304 }
1305 set_gdbarch_return_value (gdbarch, h8300h_return_value);
1306 set_gdbarch_print_insn (gdbarch, print_insn_h8300s);
1307 break;
1308 }
1309
1310 set_gdbarch_pseudo_register_read (gdbarch, h8300_pseudo_register_read);
1311 set_gdbarch_pseudo_register_write (gdbarch, h8300_pseudo_register_write);
1312
1313 /*
1314 * Basic register fields and methods.
1315 */
1316
1317 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
1318 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1319 set_gdbarch_register_type (gdbarch, h8300_register_type);
1320 set_gdbarch_print_registers_info (gdbarch, h8300_print_registers_info);
1321 set_gdbarch_print_float_info (gdbarch, h8300_print_float_info);
1322
1323 /*
1324 * Frame Info
1325 */
1326 set_gdbarch_skip_prologue (gdbarch, h8300_skip_prologue);
1327
1328 /* Frame unwinder. */
1329 set_gdbarch_unwind_pc (gdbarch, h8300_unwind_pc);
1330 set_gdbarch_unwind_sp (gdbarch, h8300_unwind_sp);
1331 set_gdbarch_unwind_dummy_id (gdbarch, h8300_unwind_dummy_id);
1332 frame_base_set_default (gdbarch, &h8300_frame_base);
1333
1334 /*
1335 * Miscelany
1336 */
1337 /* Stack grows up. */
1338 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1339
1340 set_gdbarch_breakpoint_from_pc (gdbarch, h8300_breakpoint_from_pc);
1341 set_gdbarch_push_dummy_call (gdbarch, h8300_push_dummy_call);
1342
1343 set_gdbarch_char_signed (gdbarch, 0);
1344 set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT);
1345 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1346 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
1347 set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1348 set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT);
1349
1350 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
1351
1352 /* Hook in the DWARF CFI frame unwinder. */
1353 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
1354 frame_unwind_append_sniffer (gdbarch, h8300_frame_sniffer);
1355
1356 return gdbarch;
1357
1358 }
1359
1360 extern initialize_file_ftype _initialize_h8300_tdep; /* -Wmissing-prototypes */
1361
1362 void
1363 _initialize_h8300_tdep (void)
1364 {
1365 register_gdbarch_init (bfd_arch_h8300, h8300_gdbarch_init);
1366 }
1367
1368 static int
1369 is_h8300hmode (struct gdbarch *gdbarch)
1370 {
1371 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1372 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1373 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1374 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1375 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300h
1376 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1377 }
1378
1379 static int
1380 is_h8300smode (struct gdbarch *gdbarch)
1381 {
1382 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1383 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1384 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300s
1385 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn;
1386 }
1387
1388 static int
1389 is_h8300sxmode (struct gdbarch *gdbarch)
1390 {
1391 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sx
1392 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn;
1393 }
1394
1395 static int
1396 is_h8300_normal_mode (struct gdbarch *gdbarch)
1397 {
1398 return gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sxn
1399 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300sn
1400 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_h8300hn;
1401 }