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1 /* Native-dependent code for LynxOS.
2 Copyright 1993, 1994 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20 #include "defs.h"
21 #include "frame.h"
22 #include "inferior.h"
23 #include "target.h"
24 #include "gdbcore.h"
25
26 #include <sys/ptrace.h>
27 #include <sys/wait.h>
28 #include <sys/fpp.h>
29
30 static unsigned long registers_addr PARAMS ((int pid));
31 static void fetch_core_registers PARAMS ((char *, unsigned, int, CORE_ADDR);
32
33 #define X(ENTRY)(offsetof(struct econtext, ENTRY))
34
35 #ifdef I386
36 /* Mappings from tm-i386v.h */
37
38 static int regmap[] =
39 {
40 X(eax),
41 X(ecx),
42 X(edx),
43 X(ebx),
44 X(esp), /* sp */
45 X(ebp), /* fp */
46 X(esi),
47 X(edi),
48 X(eip), /* pc */
49 X(flags), /* ps */
50 X(cs),
51 X(ss),
52 X(ds),
53 X(es),
54 X(ecode), /* Lynx doesn't give us either fs or gs, so */
55 X(fault), /* we just substitute these two in the hopes
56 that they are useful. */
57 };
58 #endif /* I386 */
59
60 #ifdef M68K
61 /* Mappings from tm-m68k.h */
62
63 static int regmap[] =
64 {
65 X(regs[0]), /* d0 */
66 X(regs[1]), /* d1 */
67 X(regs[2]), /* d2 */
68 X(regs[3]), /* d3 */
69 X(regs[4]), /* d4 */
70 X(regs[5]), /* d5 */
71 X(regs[6]), /* d6 */
72 X(regs[7]), /* d7 */
73 X(regs[8]), /* a0 */
74 X(regs[9]), /* a1 */
75 X(regs[10]), /* a2 */
76 X(regs[11]), /* a3 */
77 X(regs[12]), /* a4 */
78 X(regs[13]), /* a5 */
79 X(regs[14]), /* fp */
80 offsetof (st_t, usp) - offsetof (st_t, ec), /* sp */
81 X(status), /* ps */
82 X(pc),
83
84 X(fregs[0*3]), /* fp0 */
85 X(fregs[1*3]), /* fp1 */
86 X(fregs[2*3]), /* fp2 */
87 X(fregs[3*3]), /* fp3 */
88 X(fregs[4*3]), /* fp4 */
89 X(fregs[5*3]), /* fp5 */
90 X(fregs[6*3]), /* fp6 */
91 X(fregs[7*3]), /* fp7 */
92
93 X(fcregs[0]), /* fpcontrol */
94 X(fcregs[1]), /* fpstatus */
95 X(fcregs[2]), /* fpiaddr */
96 X(ssw), /* fpcode */
97 X(fault), /* fpflags */
98 };
99 #endif /* M68K */
100
101 #ifdef SPARC
102 /* Mappings from tm-sparc.h */
103
104 #define FX(ENTRY)(offsetof(struct fcontext, ENTRY))
105
106 static int regmap[] =
107 {
108 -1, /* g0 */
109 X(g1),
110 X(g2),
111 X(g3),
112 X(g4),
113 -1, /* g5->g7 aren't saved by Lynx */
114 -1,
115 -1,
116
117 X(o[0]),
118 X(o[1]),
119 X(o[2]),
120 X(o[3]),
121 X(o[4]),
122 X(o[5]),
123 X(o[6]), /* sp */
124 X(o[7]), /* ra */
125
126 -1,-1,-1,-1,-1,-1,-1,-1, /* l0 -> l7 */
127
128 -1,-1,-1,-1,-1,-1,-1,-1, /* i0 -> i7 */
129
130 FX(f.fregs[0]), /* f0 */
131 FX(f.fregs[1]),
132 FX(f.fregs[2]),
133 FX(f.fregs[3]),
134 FX(f.fregs[4]),
135 FX(f.fregs[5]),
136 FX(f.fregs[6]),
137 FX(f.fregs[7]),
138 FX(f.fregs[8]),
139 FX(f.fregs[9]),
140 FX(f.fregs[10]),
141 FX(f.fregs[11]),
142 FX(f.fregs[12]),
143 FX(f.fregs[13]),
144 FX(f.fregs[14]),
145 FX(f.fregs[15]),
146 FX(f.fregs[16]),
147 FX(f.fregs[17]),
148 FX(f.fregs[18]),
149 FX(f.fregs[19]),
150 FX(f.fregs[20]),
151 FX(f.fregs[21]),
152 FX(f.fregs[22]),
153 FX(f.fregs[23]),
154 FX(f.fregs[24]),
155 FX(f.fregs[25]),
156 FX(f.fregs[26]),
157 FX(f.fregs[27]),
158 FX(f.fregs[28]),
159 FX(f.fregs[29]),
160 FX(f.fregs[30]),
161 FX(f.fregs[31]),
162
163 X(y),
164 X(psr),
165 X(wim),
166 X(tbr),
167 X(pc),
168 X(npc),
169 FX(fsr), /* fpsr */
170 -1, /* cpsr */
171 };
172 #endif /* SPARC */
173
174 #ifdef rs6000
175
176 static int regmap[] =
177 {
178 X(iregs[0]), /* r0 */
179 X(iregs[1]),
180 X(iregs[2]),
181 X(iregs[3]),
182 X(iregs[4]),
183 X(iregs[5]),
184 X(iregs[6]),
185 X(iregs[7]),
186 X(iregs[8]),
187 X(iregs[9]),
188 X(iregs[10]),
189 X(iregs[11]),
190 X(iregs[12]),
191 X(iregs[13]),
192 X(iregs[14]),
193 X(iregs[15]),
194 X(iregs[16]),
195 X(iregs[17]),
196 X(iregs[18]),
197 X(iregs[19]),
198 X(iregs[20]),
199 X(iregs[21]),
200 X(iregs[22]),
201 X(iregs[23]),
202 X(iregs[24]),
203 X(iregs[25]),
204 X(iregs[26]),
205 X(iregs[27]),
206 X(iregs[28]),
207 X(iregs[29]),
208 X(iregs[30]),
209 X(iregs[31]),
210
211 X(fregs[0]), /* f0 */
212 X(fregs[1]),
213 X(fregs[2]),
214 X(fregs[3]),
215 X(fregs[4]),
216 X(fregs[5]),
217 X(fregs[6]),
218 X(fregs[7]),
219 X(fregs[8]),
220 X(fregs[9]),
221 X(fregs[10]),
222 X(fregs[11]),
223 X(fregs[12]),
224 X(fregs[13]),
225 X(fregs[14]),
226 X(fregs[15]),
227 X(fregs[16]),
228 X(fregs[17]),
229 X(fregs[18]),
230 X(fregs[19]),
231 X(fregs[20]),
232 X(fregs[21]),
233 X(fregs[22]),
234 X(fregs[23]),
235 X(fregs[24]),
236 X(fregs[25]),
237 X(fregs[26]),
238 X(fregs[27]),
239 X(fregs[28]),
240 X(fregs[29]),
241 X(fregs[30]),
242 X(fregs[31]),
243
244 X(srr0), /* IAR (PC) */
245 X(srr1), /* MSR (PS) */
246 X(cr), /* CR */
247 X(lr), /* LR */
248 X(ctr), /* CTR */
249 X(xer), /* XER */
250 X(mq) /* MQ */
251 };
252
253 #endif /* rs6000 */
254
255 #ifdef SPARC
256
257 /* This routine handles some oddball cases for Sparc registers and LynxOS.
258 In partucular, it causes refs to G0, g5->7, and all fp regs to return zero.
259 It also handles knows where to find the I & L regs on the stack. */
260
261 void
262 fetch_inferior_registers (regno)
263 int regno;
264 {
265 int whatregs = 0;
266
267 #define WHATREGS_FLOAT 1
268 #define WHATREGS_GEN 2
269 #define WHATREGS_STACK 4
270
271 if (regno == -1)
272 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
273 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
274 whatregs = WHATREGS_STACK;
275 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
276 whatregs = WHATREGS_FLOAT;
277 else
278 whatregs = WHATREGS_GEN;
279
280 if (whatregs & WHATREGS_GEN)
281 {
282 struct econtext ec; /* general regs */
283 char buf[MAX_REGISTER_RAW_SIZE];
284 int retval;
285 int i;
286
287 errno = 0;
288 retval = ptrace (PTRACE_GETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
289 0);
290 if (errno)
291 perror_with_name ("ptrace(PTRACE_GETREGS)");
292
293 memset (buf, 0, REGISTER_RAW_SIZE (G0_REGNUM));
294 supply_register (G0_REGNUM, buf);
295 supply_register (TBR_REGNUM, (char *)&ec.tbr);
296
297 memcpy (&registers[REGISTER_BYTE (G1_REGNUM)], &ec.g1,
298 4 * REGISTER_RAW_SIZE (G1_REGNUM));
299 for (i = G1_REGNUM; i <= G1_REGNUM + 3; i++)
300 register_valid[i] = 1;
301
302 supply_register (PS_REGNUM, (char *)&ec.psr);
303 supply_register (Y_REGNUM, (char *)&ec.y);
304 supply_register (PC_REGNUM, (char *)&ec.pc);
305 supply_register (NPC_REGNUM, (char *)&ec.npc);
306 supply_register (WIM_REGNUM, (char *)&ec.wim);
307
308 memcpy (&registers[REGISTER_BYTE (O0_REGNUM)], ec.o,
309 8 * REGISTER_RAW_SIZE (O0_REGNUM));
310 for (i = O0_REGNUM; i <= O0_REGNUM + 7; i++)
311 register_valid[i] = 1;
312 }
313
314 if (whatregs & WHATREGS_STACK)
315 {
316 CORE_ADDR sp;
317 int i;
318
319 sp = read_register (SP_REGNUM);
320
321 target_xfer_memory (sp + FRAME_SAVED_I0,
322 &registers[REGISTER_BYTE(I0_REGNUM)],
323 8 * REGISTER_RAW_SIZE (I0_REGNUM), 0);
324 for (i = I0_REGNUM; i <= I7_REGNUM; i++)
325 register_valid[i] = 1;
326
327 target_xfer_memory (sp + FRAME_SAVED_L0,
328 &registers[REGISTER_BYTE(L0_REGNUM)],
329 8 * REGISTER_RAW_SIZE (L0_REGNUM), 0);
330 for (i = L0_REGNUM; i <= L0_REGNUM + 7; i++)
331 register_valid[i] = 1;
332 }
333
334 if (whatregs & WHATREGS_FLOAT)
335 {
336 struct fcontext fc; /* fp regs */
337 int retval;
338 int i;
339
340 errno = 0;
341 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
342 0);
343 if (errno)
344 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
345
346 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM)], fc.f.fregs,
347 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
348 for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
349 register_valid[i] = 1;
350
351 supply_register (FPS_REGNUM, (char *)&fc.fsr);
352 }
353 }
354
355 /* This routine handles storing of the I & L regs for the Sparc. The trick
356 here is that they actually live on the stack. The really tricky part is
357 that when changing the stack pointer, the I & L regs must be written to
358 where the new SP points, otherwise the regs will be incorrect when the
359 process is started up again. We assume that the I & L regs are valid at
360 this point. */
361
362 void
363 store_inferior_registers (regno)
364 int regno;
365 {
366 int whatregs = 0;
367
368 if (regno == -1)
369 whatregs = WHATREGS_FLOAT | WHATREGS_GEN | WHATREGS_STACK;
370 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
371 whatregs = WHATREGS_STACK;
372 else if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
373 whatregs = WHATREGS_FLOAT;
374 else if (regno == SP_REGNUM)
375 whatregs = WHATREGS_STACK | WHATREGS_GEN;
376 else
377 whatregs = WHATREGS_GEN;
378
379 if (whatregs & WHATREGS_GEN)
380 {
381 struct econtext ec; /* general regs */
382 int retval;
383
384 ec.tbr = read_register (TBR_REGNUM);
385 memcpy (&ec.g1, &registers[REGISTER_BYTE (G1_REGNUM)],
386 4 * REGISTER_RAW_SIZE (G1_REGNUM));
387
388 ec.psr = read_register (PS_REGNUM);
389 ec.y = read_register (Y_REGNUM);
390 ec.pc = read_register (PC_REGNUM);
391 ec.npc = read_register (NPC_REGNUM);
392 ec.wim = read_register (WIM_REGNUM);
393
394 memcpy (ec.o, &registers[REGISTER_BYTE (O0_REGNUM)],
395 8 * REGISTER_RAW_SIZE (O0_REGNUM));
396
397 errno = 0;
398 retval = ptrace (PTRACE_SETREGS, inferior_pid, (PTRACE_ARG3_TYPE) &ec,
399 0);
400 if (errno)
401 perror_with_name ("ptrace(PTRACE_SETREGS)");
402 }
403
404 if (whatregs & WHATREGS_STACK)
405 {
406 int regoffset;
407 CORE_ADDR sp;
408
409 sp = read_register (SP_REGNUM);
410
411 if (regno == -1 || regno == SP_REGNUM)
412 {
413 if (!register_valid[L0_REGNUM+5])
414 abort();
415 target_xfer_memory (sp + FRAME_SAVED_I0,
416 &registers[REGISTER_BYTE (I0_REGNUM)],
417 8 * REGISTER_RAW_SIZE (I0_REGNUM), 1);
418
419 target_xfer_memory (sp + FRAME_SAVED_L0,
420 &registers[REGISTER_BYTE (L0_REGNUM)],
421 8 * REGISTER_RAW_SIZE (L0_REGNUM), 1);
422 }
423 else if (regno >= L0_REGNUM && regno <= I7_REGNUM)
424 {
425 if (!register_valid[regno])
426 abort();
427 if (regno >= L0_REGNUM && regno <= L0_REGNUM + 7)
428 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM)
429 + FRAME_SAVED_L0;
430 else
431 regoffset = REGISTER_BYTE (regno) - REGISTER_BYTE (I0_REGNUM)
432 + FRAME_SAVED_I0;
433 target_xfer_memory (sp + regoffset, &registers[REGISTER_BYTE (regno)],
434 REGISTER_RAW_SIZE (regno), 1);
435 }
436 }
437
438 if (whatregs & WHATREGS_FLOAT)
439 {
440 struct fcontext fc; /* fp regs */
441 int retval;
442
443 /* We read fcontext first so that we can get good values for fq_t... */
444 errno = 0;
445 retval = ptrace (PTRACE_GETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
446 0);
447 if (errno)
448 perror_with_name ("ptrace(PTRACE_GETFPREGS)");
449
450 memcpy (fc.f.fregs, &registers[REGISTER_BYTE (FP0_REGNUM)],
451 32 * REGISTER_RAW_SIZE (FP0_REGNUM));
452
453 fc.fsr = read_register (FPS_REGNUM);
454
455 errno = 0;
456 retval = ptrace (PTRACE_SETFPREGS, inferior_pid, (PTRACE_ARG3_TYPE) &fc,
457 0);
458 if (errno)
459 perror_with_name ("ptrace(PTRACE_SETFPREGS)");
460 }
461 }
462 #endif /* SPARC */
463
464 #if defined (I386) || defined (M68K) || defined (rs6000)
465
466 /* Return the offset relative to the start of the per-thread data to the
467 saved context block. */
468
469 static unsigned long
470 registers_addr(pid)
471 int pid;
472 {
473 CORE_ADDR stblock;
474 int ecpoff = offsetof(st_t, ecp);
475 CORE_ADDR ecp;
476
477 errno = 0;
478 stblock = (CORE_ADDR) ptrace (PTRACE_THREADUSER, pid, (PTRACE_ARG3_TYPE)0,
479 0);
480 if (errno)
481 perror_with_name ("ptrace(PTRACE_THREADUSER)");
482
483 ecp = (CORE_ADDR) ptrace (PTRACE_PEEKTHREAD, pid, (PTRACE_ARG3_TYPE)ecpoff,
484 0);
485 if (errno)
486 perror_with_name ("ptrace(PTRACE_PEEKTHREAD)");
487
488 return ecp - stblock;
489 }
490
491 /* Fetch one or more registers from the inferior. REGNO == -1 to get
492 them all. We actually fetch more than requested, when convenient,
493 marking them as valid so we won't fetch them again. */
494
495 void
496 fetch_inferior_registers (regno)
497 int regno;
498 {
499 int reglo, reghi;
500 int i;
501 unsigned long ecp;
502
503 if (regno == -1)
504 {
505 reglo = 0;
506 reghi = NUM_REGS - 1;
507 }
508 else
509 reglo = reghi = regno;
510
511 ecp = registers_addr (inferior_pid);
512
513 for (regno = reglo; regno <= reghi; regno++)
514 {
515 char buf[MAX_REGISTER_RAW_SIZE];
516 int ptrace_fun = PTRACE_PEEKTHREAD;
517
518 #ifdef M68K
519 ptrace_fun = regno == SP_REGNUM ? PTRACE_PEEKUSP : PTRACE_PEEKTHREAD;
520 #endif
521
522 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
523 {
524 unsigned int reg;
525
526 errno = 0;
527 reg = ptrace (ptrace_fun, inferior_pid,
528 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), 0);
529 if (errno)
530 perror_with_name ("ptrace(PTRACE_PEEKUSP)");
531
532 *(int *)&buf[i] = reg;
533 }
534 supply_register (regno, buf);
535 }
536 }
537
538 /* Store our register values back into the inferior.
539 If REGNO is -1, do this for all registers.
540 Otherwise, REGNO specifies which register (so we can save time). */
541
542 /* Registers we shouldn't try to store. */
543 #if !defined (CANNOT_STORE_REGISTER)
544 #define CANNOT_STORE_REGISTER(regno) 0
545 #endif
546
547 void
548 store_inferior_registers (regno)
549 int regno;
550 {
551 int reglo, reghi;
552 int i;
553 unsigned long ecp;
554
555 if (regno == -1)
556 {
557 reglo = 0;
558 reghi = NUM_REGS - 1;
559 }
560 else
561 reglo = reghi = regno;
562
563 ecp = registers_addr (inferior_pid);
564
565 for (regno = reglo; regno <= reghi; regno++)
566 {
567 int ptrace_fun = PTRACE_POKEUSER;
568
569 if (CANNOT_STORE_REGISTER (regno))
570 continue;
571
572 #ifdef M68K
573 ptrace_fun = regno == SP_REGNUM ? PTRACE_POKEUSP : PTRACE_POKEUSER;
574 #endif
575
576 for (i = 0; i < REGISTER_RAW_SIZE (regno); i += sizeof (int))
577 {
578 unsigned int reg;
579
580 reg = *(unsigned int *)&registers[REGISTER_BYTE (regno) + i];
581
582 errno = 0;
583 ptrace (ptrace_fun, inferior_pid,
584 (PTRACE_ARG3_TYPE) (ecp + regmap[regno] + i), reg);
585 if (errno)
586 perror_with_name ("ptrace(PTRACE_POKEUSP)");
587 }
588 }
589 }
590 #endif /* defined (I386) || defined (M68K) || defined (rs6000) */
591
592 /* Wait for child to do something. Return pid of child, or -1 in case
593 of error; store status through argument pointer OURSTATUS. */
594
595 int
596 child_wait (pid, ourstatus)
597 int pid;
598 struct target_waitstatus *ourstatus;
599 {
600 int save_errno;
601 int thread;
602 union wait status;
603
604 while (1)
605 {
606 int sig;
607
608 set_sigint_trap(); /* Causes SIGINT to be passed on to the
609 attached process. */
610 pid = wait (&status);
611
612 save_errno = errno;
613
614 clear_sigint_trap();
615
616 if (pid == -1)
617 {
618 if (save_errno == EINTR)
619 continue;
620 fprintf_unfiltered (gdb_stderr, "Child process unexpectedly missing: %s.\n",
621 safe_strerror (save_errno));
622 /* Claim it exited with unknown signal. */
623 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
624 ourstatus->value.sig = TARGET_SIGNAL_UNKNOWN;
625 return -1;
626 }
627
628 if (pid != PIDGET (inferior_pid)) /* Some other process?!? */
629 continue;
630
631 thread = status.w_tid; /* Get thread id from status */
632
633 /* Initial thread value can only be acquired via wait, so we have to
634 resort to this hack. */
635
636 if (TIDGET (inferior_pid) == 0 && thread != 0)
637 {
638 inferior_pid = BUILDPID (inferior_pid, thread);
639 add_thread (inferior_pid);
640 }
641
642 pid = BUILDPID (pid, thread);
643
644 /* We've become a single threaded process again. */
645 if (thread == 0)
646 inferior_pid = pid;
647
648 /* Check for thread creation. */
649 if (WIFSTOPPED(status)
650 && WSTOPSIG(status) == SIGTRAP
651 && !in_thread_list (pid))
652 {
653 int realsig;
654
655 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE)0, 0);
656
657 if (realsig == SIGNEWTHREAD)
658 {
659 /* It's a new thread notification. We don't want to much with
660 realsig -- the code in wait_for_inferior expects SIGTRAP. */
661 ourstatus->kind = TARGET_WAITKIND_SPURIOUS;
662 ourstatus->value.sig = TARGET_SIGNAL_0;
663 return pid;
664 }
665 else
666 error ("Signal for unknown thread was not SIGNEWTHREAD");
667 }
668
669 /* Check for thread termination. */
670 else if (WIFSTOPPED(status)
671 && WSTOPSIG(status) == SIGTRAP
672 && in_thread_list (pid))
673 {
674 int realsig;
675
676 realsig = ptrace (PTRACE_GETTRACESIG, pid, (PTRACE_ARG3_TYPE)0, 0);
677
678 if (realsig == SIGTHREADEXIT)
679 {
680 ptrace (PTRACE_CONT, PIDGET (pid), (PTRACE_ARG3_TYPE)0, 0);
681 continue;
682 }
683 }
684
685 #ifdef SPARC
686 /* SPARC Lynx uses an byte reversed wait status; we must use the
687 host macros to access it. These lines just a copy of
688 store_waitstatus. We can't use CHILD_SPECIAL_WAITSTATUS
689 because target.c can't include the Lynx <sys/wait.h>. */
690 if (WIFEXITED (status))
691 {
692 ourstatus->kind = TARGET_WAITKIND_EXITED;
693 ourstatus->value.integer = WEXITSTATUS (status);
694 }
695 else if (!WIFSTOPPED (status))
696 {
697 ourstatus->kind = TARGET_WAITKIND_SIGNALLED;
698 ourstatus->value.sig =
699 target_signal_from_host (WTERMSIG (status));
700 }
701 else
702 {
703 ourstatus->kind = TARGET_WAITKIND_STOPPED;
704 ourstatus->value.sig =
705 target_signal_from_host (WSTOPSIG (status));
706 }
707 #else
708 store_waitstatus (ourstatus, status.w_status);
709 #endif
710
711 return pid;
712 }
713 }
714
715 /* Return nonzero if the given thread is still alive. */
716 int
717 child_thread_alive (pid)
718 int pid;
719 {
720 /* Arggh. Apparently pthread_kill only works for threads within
721 the process that calls pthread_kill.
722
723 We want to avoid the lynx signal extensions as they simply don't
724 map well to the generic gdb interface we want to keep.
725
726 All we want to do is determine if a particular thread is alive;
727 it appears as if we can just make a harmless thread specific
728 ptrace call to do that. */
729 return (ptrace (PTRACE_THREADUSER, pid, 0, 0) != -1);
730 }
731
732 /* Resume execution of the inferior process.
733 If STEP is nonzero, single-step it.
734 If SIGNAL is nonzero, give it that signal. */
735
736 void
737 child_resume (pid, step, signal)
738 int pid;
739 int step;
740 enum target_signal signal;
741 {
742 int func;
743
744 errno = 0;
745
746 /* If pid == -1, then we want to step/continue all threads, else
747 we only want to step/continue a single thread. */
748 if (pid == -1)
749 {
750 pid = inferior_pid;
751 func = step ? PTRACE_SINGLESTEP : PTRACE_CONT;
752 }
753 else
754 func = step ? PTRACE_SINGLESTEP_ONE : PTRACE_CONT_ONE;
755
756
757 /* An address of (PTRACE_ARG3_TYPE)1 tells ptrace to continue from where
758 it was. (If GDB wanted it to start some other way, we have already
759 written a new PC value to the child.)
760
761 If this system does not support PT_STEP, a higher level function will
762 have called single_step() to transmute the step request into a
763 continue request (by setting breakpoints on all possible successor
764 instructions), so we don't have to worry about that here. */
765
766 ptrace (func, pid, (PTRACE_ARG3_TYPE) 1, target_signal_to_host (signal));
767
768 if (errno)
769 perror_with_name ("ptrace");
770 }
771
772 /* Convert a Lynx process ID to a string. Returns the string in a static
773 buffer. */
774
775 char *
776 lynx_pid_to_str (pid)
777 int pid;
778 {
779 static char buf[40];
780
781 sprintf (buf, "process %d thread %d", PIDGET (pid), TIDGET (pid));
782
783 return buf;
784 }
785
786 /* Extract the register values out of the core file and store
787 them where `read_register' will find them.
788
789 CORE_REG_SECT points to the register values themselves, read into memory.
790 CORE_REG_SIZE is the size of that area.
791 WHICH says which set of registers we are handling (0 = int, 2 = float
792 on machines where they are discontiguous).
793 REG_ADDR is the offset from u.u_ar0 to the register values relative to
794 core_reg_sect. This is used with old-fashioned core files to
795 locate the registers in a large upage-plus-stack ".reg" section.
796 Original upage address X is at location core_reg_sect+x+reg_addr.
797 */
798
799 static void
800 fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
801 char *core_reg_sect;
802 unsigned core_reg_size;
803 int which;
804 CORE_ADDR reg_addr;
805 {
806 struct st_entry s;
807 unsigned int regno;
808
809 for (regno = 0; regno < NUM_REGS; regno++)
810 if (regmap[regno] != -1)
811 supply_register (regno, core_reg_sect + offsetof (st_t, ec)
812 + regmap[regno]);
813
814 #ifdef SPARC
815 /* Fetching this register causes all of the I & L regs to be read from the
816 stack and validated. */
817
818 fetch_inferior_registers (I0_REGNUM);
819 #endif
820 }
821
822 \f
823 /* Register that we are able to handle lynx core file formats.
824 FIXME: is this really bfd_target_unknown_flavour? */
825
826 static struct core_fns lynx_core_fns =
827 {
828 bfd_target_unknown_flavour,
829 fetch_core_registers,
830 NULL
831 };
832
833 void
834 _initialize_core_lynx ()
835 {
836 add_core_fns (&lynx_core_fns);
837 }