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1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2019 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2-frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42
43 #include "features/s390-linux32.c"
44 #include "features/s390x-linux64.c"
45
46 /* Holds the current set of options to be passed to the disassembler. */
47 static char *s390_disassembler_options;
48
49 /* Breakpoints. */
50
51 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55 /* Decoding S/390 instructions. */
56
57 /* Read a single instruction from address AT. */
58
59 static int
60 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
61 {
62 static int s390_instrlen[] = { 2, 4, 4, 6 };
63 int instrlen;
64
65 if (target_read_memory (at, &instr[0], 2))
66 return -1;
67 instrlen = s390_instrlen[instr[0] >> 6];
68 if (instrlen > 2)
69 {
70 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
71 return -1;
72 }
73 return instrlen;
74 }
75
76 /* The functions below are for recognizing and decoding S/390
77 instructions of various formats. Each of them checks whether INSN
78 is an instruction of the given format, with the specified opcodes.
79 If it is, it sets the remaining arguments to the values of the
80 instruction's fields, and returns a non-zero value; otherwise, it
81 returns zero.
82
83 These functions' arguments appear in the order they appear in the
84 instruction, not in the machine-language form. So, opcodes always
85 come first, even though they're sometimes scattered around the
86 instructions. And displacements appear before base and extension
87 registers, as they do in the assembly syntax, not at the end, as
88 they do in the machine language.
89
90 Test for RI instruction format. */
91
92 static int
93 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
94 {
95 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
96 {
97 *r1 = (insn[1] >> 4) & 0xf;
98 /* i2 is a 16-bit signed quantity. */
99 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
100 return 1;
101 }
102 else
103 return 0;
104 }
105
106 /* Test for RIL instruction format. See comment on is_ri for details. */
107
108 static int
109 is_ril (bfd_byte *insn, int op1, int op2,
110 unsigned int *r1, int *i2)
111 {
112 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
113 {
114 *r1 = (insn[1] >> 4) & 0xf;
115 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
116 no sign extension is necessary, but we don't want to assume
117 that. */
118 *i2 = (((insn[2] << 24)
119 | (insn[3] << 16)
120 | (insn[4] << 8)
121 | (insn[5])) ^ 0x80000000) - 0x80000000;
122 return 1;
123 }
124 else
125 return 0;
126 }
127
128 /* Test for RR instruction format. See comment on is_ri for details. */
129
130 static int
131 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
132 {
133 if (insn[0] == op)
134 {
135 *r1 = (insn[1] >> 4) & 0xf;
136 *r2 = insn[1] & 0xf;
137 return 1;
138 }
139 else
140 return 0;
141 }
142
143 /* Test for RRE instruction format. See comment on is_ri for details. */
144
145 static int
146 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
147 {
148 if (((insn[0] << 8) | insn[1]) == op)
149 {
150 /* Yes, insn[3]. insn[2] is unused in RRE format. */
151 *r1 = (insn[3] >> 4) & 0xf;
152 *r2 = insn[3] & 0xf;
153 return 1;
154 }
155 else
156 return 0;
157 }
158
159 /* Test for RS instruction format. See comment on is_ri for details. */
160
161 static int
162 is_rs (bfd_byte *insn, int op,
163 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
164 {
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r3 = insn[1] & 0xf;
169 *b2 = (insn[2] >> 4) & 0xf;
170 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
171 return 1;
172 }
173 else
174 return 0;
175 }
176
177 /* Test for RSY instruction format. See comment on is_ri for details. */
178
179 static int
180 is_rsy (bfd_byte *insn, int op1, int op2,
181 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
182 {
183 if (insn[0] == op1
184 && insn[5] == op2)
185 {
186 *r1 = (insn[1] >> 4) & 0xf;
187 *r3 = insn[1] & 0xf;
188 *b2 = (insn[2] >> 4) & 0xf;
189 /* The 'long displacement' is a 20-bit signed integer. */
190 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
191 ^ 0x80000) - 0x80000;
192 return 1;
193 }
194 else
195 return 0;
196 }
197
198 /* Test for RX instruction format. See comment on is_ri for details. */
199
200 static int
201 is_rx (bfd_byte *insn, int op,
202 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
203 {
204 if (insn[0] == op)
205 {
206 *r1 = (insn[1] >> 4) & 0xf;
207 *x2 = insn[1] & 0xf;
208 *b2 = (insn[2] >> 4) & 0xf;
209 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
210 return 1;
211 }
212 else
213 return 0;
214 }
215
216 /* Test for RXY instruction format. See comment on is_ri for details. */
217
218 static int
219 is_rxy (bfd_byte *insn, int op1, int op2,
220 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
221 {
222 if (insn[0] == op1
223 && insn[5] == op2)
224 {
225 *r1 = (insn[1] >> 4) & 0xf;
226 *x2 = insn[1] & 0xf;
227 *b2 = (insn[2] >> 4) & 0xf;
228 /* The 'long displacement' is a 20-bit signed integer. */
229 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
230 ^ 0x80000) - 0x80000;
231 return 1;
232 }
233 else
234 return 0;
235 }
236
237 /* A helper for s390_software_single_step, decides if an instruction
238 is a partial-execution instruction that needs to be executed until
239 completion when in record mode. If it is, returns 1 and writes
240 instruction length to a pointer. */
241
242 static int
243 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
244 {
245 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
246 uint16_t insn;
247
248 insn = read_memory_integer (loc, 2, byte_order);
249
250 switch (insn >> 8)
251 {
252 case 0xa8: /* MVCLE */
253 *len = 4;
254 return 1;
255
256 case 0xeb:
257 {
258 insn = read_memory_integer (loc + 4, 2, byte_order);
259 if ((insn & 0xff) == 0x8e)
260 {
261 /* MVCLU */
262 *len = 6;
263 return 1;
264 }
265 }
266 break;
267 }
268
269 switch (insn)
270 {
271 case 0xb255: /* MVST */
272 case 0xb263: /* CMPSC */
273 case 0xb2a5: /* TRE */
274 case 0xb2a6: /* CU21 */
275 case 0xb2a7: /* CU12 */
276 case 0xb9b0: /* CU14 */
277 case 0xb9b1: /* CU24 */
278 case 0xb9b2: /* CU41 */
279 case 0xb9b3: /* CU42 */
280 case 0xb92a: /* KMF */
281 case 0xb92b: /* KMO */
282 case 0xb92f: /* KMC */
283 case 0xb92d: /* KMCTR */
284 case 0xb92e: /* KM */
285 case 0xb93c: /* PPNO */
286 case 0xb990: /* TRTT */
287 case 0xb991: /* TRTO */
288 case 0xb992: /* TROT */
289 case 0xb993: /* TROO */
290 *len = 4;
291 return 1;
292 }
293
294 return 0;
295 }
296
297 /* Implement the "software_single_step" gdbarch method, needed to single step
298 through instructions like MVCLE in record mode, to make sure they are
299 executed to completion. Without that, record will save the full length
300 of destination buffer on every iteration, even though the CPU will only
301 process about 4kiB of it each time, leading to O(n**2) memory and time
302 complexity. */
303
304 static std::vector<CORE_ADDR>
305 s390_software_single_step (struct regcache *regcache)
306 {
307 struct gdbarch *gdbarch = regcache->arch ();
308 CORE_ADDR loc = regcache_read_pc (regcache);
309 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
310 int len;
311 uint16_t insn;
312
313 /* Special handling only if recording. */
314 if (!record_full_is_used ())
315 return {};
316
317 /* First, match a partial instruction. */
318 if (!s390_is_partial_instruction (gdbarch, loc, &len))
319 return {};
320
321 loc += len;
322
323 /* Second, look for a branch back to it. */
324 insn = read_memory_integer (loc, 2, byte_order);
325 if (insn != 0xa714) /* BRC with mask 1 */
326 return {};
327
328 insn = read_memory_integer (loc + 2, 2, byte_order);
329 if (insn != (uint16_t) -(len / 2))
330 return {};
331
332 loc += 4;
333
334 /* Found it, step past the whole thing. */
335 return {loc};
336 }
337
338 /* Displaced stepping. */
339
340 /* Return true if INSN is a non-branch RIL-b or RIL-c format
341 instruction. */
342
343 static int
344 is_non_branch_ril (gdb_byte *insn)
345 {
346 gdb_byte op1 = insn[0];
347
348 if (op1 == 0xc4)
349 {
350 gdb_byte op2 = insn[1] & 0x0f;
351
352 switch (op2)
353 {
354 case 0x02: /* llhrl */
355 case 0x04: /* lghrl */
356 case 0x05: /* lhrl */
357 case 0x06: /* llghrl */
358 case 0x07: /* sthrl */
359 case 0x08: /* lgrl */
360 case 0x0b: /* stgrl */
361 case 0x0c: /* lgfrl */
362 case 0x0d: /* lrl */
363 case 0x0e: /* llgfrl */
364 case 0x0f: /* strl */
365 return 1;
366 }
367 }
368 else if (op1 == 0xc6)
369 {
370 gdb_byte op2 = insn[1] & 0x0f;
371
372 switch (op2)
373 {
374 case 0x00: /* exrl */
375 case 0x02: /* pfdrl */
376 case 0x04: /* cghrl */
377 case 0x05: /* chrl */
378 case 0x06: /* clghrl */
379 case 0x07: /* clhrl */
380 case 0x08: /* cgrl */
381 case 0x0a: /* clgrl */
382 case 0x0c: /* cgfrl */
383 case 0x0d: /* crl */
384 case 0x0e: /* clgfrl */
385 case 0x0f: /* clrl */
386 return 1;
387 }
388 }
389
390 return 0;
391 }
392
393 typedef buf_displaced_step_closure s390_displaced_step_closure;
394
395 /* Implementation of gdbarch_displaced_step_copy_insn. */
396
397 static struct displaced_step_closure *
398 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
399 CORE_ADDR from, CORE_ADDR to,
400 struct regcache *regs)
401 {
402 size_t len = gdbarch_max_insn_length (gdbarch);
403 std::unique_ptr<s390_displaced_step_closure> closure
404 (new s390_displaced_step_closure (len));
405 gdb_byte *buf = closure->buf.data ();
406
407 read_memory (from, buf, len);
408
409 /* Adjust the displacement field of PC-relative RIL instructions,
410 except branches. The latter are handled in the fixup hook. */
411 if (is_non_branch_ril (buf))
412 {
413 LONGEST offset;
414
415 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
416 offset = (from - to + offset * 2) / 2;
417
418 /* If the instruction is too far from the jump pad, punt. This
419 will usually happen with instructions in shared libraries.
420 We could probably support these by rewriting them to be
421 absolute or fully emulating them. */
422 if (offset < INT32_MIN || offset > INT32_MAX)
423 {
424 /* Let the core fall back to stepping over the breakpoint
425 in-line. */
426 if (debug_displaced)
427 {
428 fprintf_unfiltered (gdb_stdlog,
429 "displaced: can't displaced step "
430 "RIL instruction: offset %s out of range\n",
431 plongest (offset));
432 }
433
434 return NULL;
435 }
436
437 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
438 }
439
440 write_memory (to, buf, len);
441
442 if (debug_displaced)
443 {
444 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
445 paddress (gdbarch, from), paddress (gdbarch, to));
446 displaced_step_dump_bytes (gdb_stdlog, buf, len);
447 }
448
449 return closure.release ();
450 }
451
452 /* Fix up the state of registers and memory after having single-stepped
453 a displaced instruction. */
454
455 static void
456 s390_displaced_step_fixup (struct gdbarch *gdbarch,
457 struct displaced_step_closure *closure_,
458 CORE_ADDR from, CORE_ADDR to,
459 struct regcache *regs)
460 {
461 /* Our closure is a copy of the instruction. */
462 s390_displaced_step_closure *closure
463 = (s390_displaced_step_closure *) closure_;
464 gdb_byte *insn = closure->buf.data ();
465 static int s390_instrlen[] = { 2, 4, 4, 6 };
466 int insnlen = s390_instrlen[insn[0] >> 6];
467
468 /* Fields for various kinds of instructions. */
469 unsigned int b2, r1, r2, x2, r3;
470 int i2, d2;
471
472 /* Get current PC and addressing mode bit. */
473 CORE_ADDR pc = regcache_read_pc (regs);
474 ULONGEST amode = 0;
475
476 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
477 {
478 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
479 amode &= 0x80000000;
480 }
481
482 if (debug_displaced)
483 fprintf_unfiltered (gdb_stdlog,
484 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
485 paddress (gdbarch, from), paddress (gdbarch, to),
486 paddress (gdbarch, pc), insnlen, (int) amode);
487
488 /* Handle absolute branch and save instructions. */
489 if (is_rr (insn, op_basr, &r1, &r2)
490 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
491 {
492 /* Recompute saved return address in R1. */
493 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
494 amode | (from + insnlen));
495 /* Update PC iff the instruction doesn't actually branch. */
496 if (insn[0] == op_basr && r2 == 0)
497 regcache_write_pc (regs, from + insnlen);
498 }
499
500 /* Handle absolute branch instructions. */
501 else if (is_rr (insn, op_bcr, &r1, &r2)
502 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
503 || is_rr (insn, op_bctr, &r1, &r2)
504 || is_rre (insn, op_bctgr, &r1, &r2)
505 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
506 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
507 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
508 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
509 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
510 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
511 {
512 /* Update PC iff branch was *not* taken. */
513 if (pc == to + insnlen)
514 regcache_write_pc (regs, from + insnlen);
515 }
516
517 /* Handle PC-relative branch and save instructions. */
518 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
519 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
520 {
521 /* Update PC. */
522 regcache_write_pc (regs, pc - to + from);
523 /* Recompute saved return address in R1. */
524 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
525 amode | (from + insnlen));
526 }
527
528 /* Handle LOAD ADDRESS RELATIVE LONG. */
529 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
530 {
531 /* Update PC. */
532 regcache_write_pc (regs, from + insnlen);
533 /* Recompute output address in R1. */
534 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
535 amode | (from + i2 * 2));
536 }
537
538 /* If we executed a breakpoint instruction, point PC right back at it. */
539 else if (insn[0] == 0x0 && insn[1] == 0x1)
540 regcache_write_pc (regs, from);
541
542 /* For any other insn, adjust PC by negated displacement. PC then
543 points right after the original instruction, except for PC-relative
544 branches, where it points to the adjusted branch target. */
545 else
546 regcache_write_pc (regs, pc - to + from);
547
548 if (debug_displaced)
549 fprintf_unfiltered (gdb_stdlog,
550 "displaced: (s390) pc is now %s\n",
551 paddress (gdbarch, regcache_read_pc (regs)));
552 }
553
554 /* Implement displaced_step_hw_singlestep gdbarch method. */
555
556 static int
557 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
558 struct displaced_step_closure *closure)
559 {
560 return 1;
561 }
562
563 /* Prologue analysis. */
564
565 struct s390_prologue_data {
566
567 /* The stack. */
568 struct pv_area *stack;
569
570 /* The size and byte-order of a GPR or FPR. */
571 int gpr_size;
572 int fpr_size;
573 enum bfd_endian byte_order;
574
575 /* The general-purpose registers. */
576 pv_t gpr[S390_NUM_GPRS];
577
578 /* The floating-point registers. */
579 pv_t fpr[S390_NUM_FPRS];
580
581 /* The offset relative to the CFA where the incoming GPR N was saved
582 by the function prologue. 0 if not saved or unknown. */
583 int gpr_slot[S390_NUM_GPRS];
584
585 /* Likewise for FPRs. */
586 int fpr_slot[S390_NUM_FPRS];
587
588 /* Nonzero if the backchain was saved. This is assumed to be the
589 case when the incoming SP is saved at the current SP location. */
590 int back_chain_saved_p;
591 };
592
593 /* Return the effective address for an X-style instruction, like:
594
595 L R1, D2(X2, B2)
596
597 Here, X2 and B2 are registers, and D2 is a signed 20-bit
598 constant; the effective address is the sum of all three. If either
599 X2 or B2 are zero, then it doesn't contribute to the sum --- this
600 means that r0 can't be used as either X2 or B2. */
601
602 static pv_t
603 s390_addr (struct s390_prologue_data *data,
604 int d2, unsigned int x2, unsigned int b2)
605 {
606 pv_t result;
607
608 result = pv_constant (d2);
609 if (x2)
610 result = pv_add (result, data->gpr[x2]);
611 if (b2)
612 result = pv_add (result, data->gpr[b2]);
613
614 return result;
615 }
616
617 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
618
619 static void
620 s390_store (struct s390_prologue_data *data,
621 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
622 pv_t value)
623 {
624 pv_t addr = s390_addr (data, d2, x2, b2);
625 pv_t offset;
626
627 /* Check whether we are storing the backchain. */
628 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
629
630 if (pv_is_constant (offset) && offset.k == 0)
631 if (size == data->gpr_size
632 && pv_is_register_k (value, S390_SP_REGNUM, 0))
633 {
634 data->back_chain_saved_p = 1;
635 return;
636 }
637
638 /* Check whether we are storing a register into the stack. */
639 if (!data->stack->store_would_trash (addr))
640 data->stack->store (addr, size, value);
641
642 /* Note: If this is some store we cannot identify, you might think we
643 should forget our cached values, as any of those might have been hit.
644
645 However, we make the assumption that the register save areas are only
646 ever stored to once in any given function, and we do recognize these
647 stores. Thus every store we cannot recognize does not hit our data. */
648 }
649
650 /* Do a SIZE-byte load from D2(X2,B2). */
651
652 static pv_t
653 s390_load (struct s390_prologue_data *data,
654 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
655
656 {
657 pv_t addr = s390_addr (data, d2, x2, b2);
658
659 /* If it's a load from an in-line constant pool, then we can
660 simulate that, under the assumption that the code isn't
661 going to change between the time the processor actually
662 executed it creating the current frame, and the time when
663 we're analyzing the code to unwind past that frame. */
664 if (pv_is_constant (addr))
665 {
666 struct target_section *secp;
667 secp = target_section_by_addr (current_top_target (), addr.k);
668 if (secp != NULL
669 && (bfd_get_section_flags (secp->the_bfd_section->owner,
670 secp->the_bfd_section)
671 & SEC_READONLY))
672 return pv_constant (read_memory_integer (addr.k, size,
673 data->byte_order));
674 }
675
676 /* Check whether we are accessing one of our save slots. */
677 return data->stack->fetch (addr, size);
678 }
679
680 /* Function for finding saved registers in a 'struct pv_area'; we pass
681 this to pv_area::scan.
682
683 If VALUE is a saved register, ADDR says it was saved at a constant
684 offset from the frame base, and SIZE indicates that the whole
685 register was saved, record its offset in the reg_offset table in
686 PROLOGUE_UNTYPED. */
687
688 static void
689 s390_check_for_saved (void *data_untyped, pv_t addr,
690 CORE_ADDR size, pv_t value)
691 {
692 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
693 int i, offset;
694
695 if (!pv_is_register (addr, S390_SP_REGNUM))
696 return;
697
698 offset = 16 * data->gpr_size + 32 - addr.k;
699
700 /* If we are storing the original value of a register, we want to
701 record the CFA offset. If the same register is stored multiple
702 times, the stack slot with the highest address counts. */
703
704 for (i = 0; i < S390_NUM_GPRS; i++)
705 if (size == data->gpr_size
706 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
707 if (data->gpr_slot[i] == 0
708 || data->gpr_slot[i] > offset)
709 {
710 data->gpr_slot[i] = offset;
711 return;
712 }
713
714 for (i = 0; i < S390_NUM_FPRS; i++)
715 if (size == data->fpr_size
716 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
717 if (data->fpr_slot[i] == 0
718 || data->fpr_slot[i] > offset)
719 {
720 data->fpr_slot[i] = offset;
721 return;
722 }
723 }
724
725 /* Analyze the prologue of the function starting at START_PC, continuing at
726 most until CURRENT_PC. Initialize DATA to hold all information we find
727 out about the state of the registers and stack slots. Return the address
728 of the instruction after the last one that changed the SP, FP, or back
729 chain; or zero on error. */
730
731 static CORE_ADDR
732 s390_analyze_prologue (struct gdbarch *gdbarch,
733 CORE_ADDR start_pc,
734 CORE_ADDR current_pc,
735 struct s390_prologue_data *data)
736 {
737 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
738
739 /* Our return value:
740 The address of the instruction after the last one that changed
741 the SP, FP, or back chain; zero if we got an error trying to
742 read memory. */
743 CORE_ADDR result = start_pc;
744
745 /* The current PC for our abstract interpretation. */
746 CORE_ADDR pc;
747
748 /* The address of the next instruction after that. */
749 CORE_ADDR next_pc;
750
751 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
752 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
753
754 /* Set up everything's initial value. */
755 {
756 int i;
757
758 /* For the purpose of prologue tracking, we consider the GPR size to
759 be equal to the ABI word size, even if it is actually larger
760 (i.e. when running a 32-bit binary under a 64-bit kernel). */
761 data->gpr_size = word_size;
762 data->fpr_size = 8;
763 data->byte_order = gdbarch_byte_order (gdbarch);
764
765 for (i = 0; i < S390_NUM_GPRS; i++)
766 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
767
768 for (i = 0; i < S390_NUM_FPRS; i++)
769 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
770
771 for (i = 0; i < S390_NUM_GPRS; i++)
772 data->gpr_slot[i] = 0;
773
774 for (i = 0; i < S390_NUM_FPRS; i++)
775 data->fpr_slot[i] = 0;
776
777 data->back_chain_saved_p = 0;
778 }
779
780 /* Start interpreting instructions, until we hit the frame's
781 current PC or the first branch instruction. */
782 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
783 {
784 bfd_byte insn[S390_MAX_INSTR_SIZE];
785 int insn_len = s390_readinstruction (insn, pc);
786
787 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
788 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
789 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
790
791 /* Fields for various kinds of instructions. */
792 unsigned int b2, r1, r2, x2, r3;
793 int i2, d2;
794
795 /* The values of SP and FP before this instruction,
796 for detecting instructions that change them. */
797 pv_t pre_insn_sp, pre_insn_fp;
798 /* Likewise for the flag whether the back chain was saved. */
799 int pre_insn_back_chain_saved_p;
800
801 /* If we got an error trying to read the instruction, report it. */
802 if (insn_len < 0)
803 {
804 result = 0;
805 break;
806 }
807
808 next_pc = pc + insn_len;
809
810 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
811 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
812 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
813
814 /* LHI r1, i2 --- load halfword immediate. */
815 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
816 /* LGFI r1, i2 --- load fullword immediate. */
817 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
818 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
819 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
820 data->gpr[r1] = pv_constant (i2);
821
822 /* LR r1, r2 --- load from register. */
823 /* LGR r1, r2 --- load from register (64-bit version). */
824 else if (is_rr (insn32, op_lr, &r1, &r2)
825 || is_rre (insn64, op_lgr, &r1, &r2))
826 data->gpr[r1] = data->gpr[r2];
827
828 /* L r1, d2(x2, b2) --- load. */
829 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
830 /* LG r1, d2(x2, b2) --- load (64-bit version). */
831 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
832 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
833 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
834 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
835
836 /* ST r1, d2(x2, b2) --- store. */
837 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
838 /* STG r1, d2(x2, b2) --- store (64-bit version). */
839 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
840 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
841 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
842 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
843
844 /* STD r1, d2(x2,b2) --- store floating-point register. */
845 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
846 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
847
848 /* STM r1, r3, d2(b2) --- store multiple. */
849 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
850 version). */
851 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
852 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
853 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
854 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
855 {
856 for (; r1 <= r3; r1++, d2 += data->gpr_size)
857 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
858 }
859
860 /* AHI r1, i2 --- add halfword immediate. */
861 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
862 /* AFI r1, i2 --- add fullword immediate. */
863 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
864 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
865 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
866 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
867 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
868 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
869
870 /* ALFI r1, i2 --- add logical immediate. */
871 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
872 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
873 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
874 data->gpr[r1] = pv_add_constant (data->gpr[r1],
875 (CORE_ADDR)i2 & 0xffffffff);
876
877 /* AR r1, r2 -- add register. */
878 /* AGR r1, r2 -- add register (64-bit version). */
879 else if (is_rr (insn32, op_ar, &r1, &r2)
880 || is_rre (insn64, op_agr, &r1, &r2))
881 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
882
883 /* A r1, d2(x2, b2) -- add. */
884 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
885 /* AG r1, d2(x2, b2) -- add (64-bit version). */
886 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
887 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
888 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
889 data->gpr[r1] = pv_add (data->gpr[r1],
890 s390_load (data, d2, x2, b2, data->gpr_size));
891
892 /* SLFI r1, i2 --- subtract logical immediate. */
893 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
894 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
895 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
896 data->gpr[r1] = pv_add_constant (data->gpr[r1],
897 -((CORE_ADDR)i2 & 0xffffffff));
898
899 /* SR r1, r2 -- subtract register. */
900 /* SGR r1, r2 -- subtract register (64-bit version). */
901 else if (is_rr (insn32, op_sr, &r1, &r2)
902 || is_rre (insn64, op_sgr, &r1, &r2))
903 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
904
905 /* S r1, d2(x2, b2) -- subtract. */
906 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
907 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
908 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
909 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
910 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
911 data->gpr[r1] = pv_subtract (data->gpr[r1],
912 s390_load (data, d2, x2, b2, data->gpr_size));
913
914 /* LA r1, d2(x2, b2) --- load address. */
915 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
916 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
917 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
918 data->gpr[r1] = s390_addr (data, d2, x2, b2);
919
920 /* LARL r1, i2 --- load address relative long. */
921 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
922 data->gpr[r1] = pv_constant (pc + i2 * 2);
923
924 /* BASR r1, 0 --- branch and save.
925 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
926 else if (is_rr (insn, op_basr, &r1, &r2)
927 && r2 == 0)
928 data->gpr[r1] = pv_constant (next_pc);
929
930 /* BRAS r1, i2 --- branch relative and save. */
931 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
932 {
933 data->gpr[r1] = pv_constant (next_pc);
934 next_pc = pc + i2 * 2;
935
936 /* We'd better not interpret any backward branches. We'll
937 never terminate. */
938 if (next_pc <= pc)
939 break;
940 }
941
942 /* BRC/BRCL -- branch relative on condition. Ignore "branch
943 never", branch to following instruction, and "conditional
944 trap" (BRC +2). Otherwise terminate search. */
945 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
946 {
947 if (r1 != 0 && i2 != 1 && i2 != 2)
948 break;
949 }
950 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
951 {
952 if (r1 != 0 && i2 != 3)
953 break;
954 }
955
956 /* Terminate search when hitting any other branch instruction. */
957 else if (is_rr (insn, op_basr, &r1, &r2)
958 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
959 || is_rr (insn, op_bcr, &r1, &r2)
960 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
961 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
962 break;
963
964 else
965 {
966 /* An instruction we don't know how to simulate. The only
967 safe thing to do would be to set every value we're tracking
968 to 'unknown'. Instead, we'll be optimistic: we assume that
969 we *can* interpret every instruction that the compiler uses
970 to manipulate any of the data we're interested in here --
971 then we can just ignore anything else. */
972 }
973
974 /* Record the address after the last instruction that changed
975 the FP, SP, or backlink. Ignore instructions that changed
976 them back to their original values --- those are probably
977 restore instructions. (The back chain is never restored,
978 just popped.) */
979 {
980 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
981 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
982
983 if ((! pv_is_identical (pre_insn_sp, sp)
984 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
985 && sp.kind != pvk_unknown)
986 || (! pv_is_identical (pre_insn_fp, fp)
987 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
988 && fp.kind != pvk_unknown)
989 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
990 result = next_pc;
991 }
992 }
993
994 /* Record where all the registers were saved. */
995 data->stack->scan (s390_check_for_saved, data);
996
997 return result;
998 }
999
1000 /* Advance PC across any function entry prologue instructions to reach
1001 some "real" code. */
1002
1003 static CORE_ADDR
1004 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1005 {
1006 struct s390_prologue_data data;
1007 CORE_ADDR skip_pc, func_addr;
1008
1009 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1010 {
1011 CORE_ADDR post_prologue_pc
1012 = skip_prologue_using_sal (gdbarch, func_addr);
1013 if (post_prologue_pc != 0)
1014 return std::max (pc, post_prologue_pc);
1015 }
1016
1017 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1018 return skip_pc ? skip_pc : pc;
1019 }
1020
1021 /* Register handling. */
1022
1023 /* ABI call-saved register information. */
1024
1025 static int
1026 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1027 {
1028 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1029
1030 switch (tdep->abi)
1031 {
1032 case ABI_LINUX_S390:
1033 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1034 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1035 || regnum == S390_A0_REGNUM)
1036 return 1;
1037
1038 break;
1039
1040 case ABI_LINUX_ZSERIES:
1041 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1042 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1043 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1044 return 1;
1045
1046 break;
1047 }
1048
1049 return 0;
1050 }
1051
1052 /* The "guess_tracepoint_registers" gdbarch method. */
1053
1054 static void
1055 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1056 struct regcache *regcache,
1057 CORE_ADDR addr)
1058 {
1059 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1060 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1061 gdb_byte *reg = (gdb_byte *) alloca (sz);
1062 ULONGEST pswm, pswa;
1063
1064 /* Set PSWA from the location and a default PSWM (the only part we're
1065 unlikely to get right is the CC). */
1066 if (tdep->abi == ABI_LINUX_S390)
1067 {
1068 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1069 was in 24-bit mode). */
1070 pswa = addr | 0x80000000UL;
1071 pswm = 0x070d0000UL;
1072 }
1073 else
1074 {
1075 pswa = addr;
1076 pswm = 0x0705000180000000ULL;
1077 }
1078
1079 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1080 regcache->raw_supply (S390_PSWA_REGNUM, reg);
1081
1082 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1083 regcache->raw_supply (S390_PSWM_REGNUM, reg);
1084 }
1085
1086 /* Return the name of register REGNO. Return the empty string for
1087 registers that shouldn't be visible. */
1088
1089 static const char *
1090 s390_register_name (struct gdbarch *gdbarch, int regnum)
1091 {
1092 if (regnum >= S390_V0_LOWER_REGNUM
1093 && regnum <= S390_V15_LOWER_REGNUM)
1094 return "";
1095 return tdesc_register_name (gdbarch, regnum);
1096 }
1097
1098 /* DWARF Register Mapping. */
1099
1100 static const short s390_dwarf_regmap[] =
1101 {
1102 /* 0-15: General Purpose Registers. */
1103 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1104 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1105 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1106 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1107
1108 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1109 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1110 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1111 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1112 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1113
1114 /* 32-47: Control Registers (not mapped). */
1115 -1, -1, -1, -1, -1, -1, -1, -1,
1116 -1, -1, -1, -1, -1, -1, -1, -1,
1117
1118 /* 48-63: Access Registers. */
1119 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1120 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1121 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1122 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1123
1124 /* 64-65: Program Status Word. */
1125 S390_PSWM_REGNUM,
1126 S390_PSWA_REGNUM,
1127
1128 /* 66-67: Reserved. */
1129 -1, -1,
1130
1131 /* 68-83: Vector Registers 16-31. */
1132 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1133 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1134 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1135 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1136
1137 /* End of "official" DWARF registers. The remainder of the map is
1138 for GDB internal use only. */
1139
1140 /* GPR Lower Half Access. */
1141 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1142 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1143 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1144 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1145 };
1146
1147 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1148
1149 /* Convert DWARF register number REG to the appropriate register
1150 number used by GDB. */
1151
1152 static int
1153 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1154 {
1155 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1156 int gdb_reg = -1;
1157
1158 /* In a 32-on-64 debug scenario, debug info refers to the full
1159 64-bit GPRs. Note that call frame information still refers to
1160 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1161 special register numbers to access GPRs. */
1162 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1163 return tdep->gpr_full_regnum + reg;
1164
1165 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1166 gdb_reg = s390_dwarf_regmap[reg];
1167
1168 if (tdep->v0_full_regnum == -1)
1169 {
1170 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1171 gdb_reg = -1;
1172 }
1173 else
1174 {
1175 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1176 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1177 }
1178
1179 return gdb_reg;
1180 }
1181
1182 /* Pseudo registers. */
1183
1184 /* Check whether REGNUM indicates a coupled general purpose register.
1185 These pseudo-registers are composed of two adjacent gprs. */
1186
1187 static int
1188 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1189 {
1190 return (tdep->gpr_full_regnum != -1
1191 && regnum >= tdep->gpr_full_regnum
1192 && regnum <= tdep->gpr_full_regnum + 15);
1193 }
1194
1195 /* Check whether REGNUM indicates a full vector register (v0-v15).
1196 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1197
1198 static int
1199 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1200 {
1201 return (tdep->v0_full_regnum != -1
1202 && regnum >= tdep->v0_full_regnum
1203 && regnum <= tdep->v0_full_regnum + 15);
1204 }
1205
1206 /* 'float' values are stored in the upper half of floating-point
1207 registers, even though we are otherwise a big-endian platform. The
1208 same applies to a 'float' value within a vector. */
1209
1210 static struct value *
1211 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1212 int regnum, struct frame_id frame_id)
1213 {
1214 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1215 struct value *value = default_value_from_register (gdbarch, type,
1216 regnum, frame_id);
1217 check_typedef (type);
1218
1219 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1220 && TYPE_LENGTH (type) < 8)
1221 || regnum_is_vxr_full (tdep, regnum)
1222 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1223 set_value_offset (value, 0);
1224
1225 return value;
1226 }
1227
1228 /* Implement pseudo_register_name tdesc method. */
1229
1230 static const char *
1231 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1232 {
1233 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1234
1235 if (regnum == tdep->pc_regnum)
1236 return "pc";
1237
1238 if (regnum == tdep->cc_regnum)
1239 return "cc";
1240
1241 if (regnum_is_gpr_full (tdep, regnum))
1242 {
1243 static const char *full_name[] = {
1244 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1245 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1246 };
1247 return full_name[regnum - tdep->gpr_full_regnum];
1248 }
1249
1250 if (regnum_is_vxr_full (tdep, regnum))
1251 {
1252 static const char *full_name[] = {
1253 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1254 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1255 };
1256 return full_name[regnum - tdep->v0_full_regnum];
1257 }
1258
1259 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1260 }
1261
1262 /* Implement pseudo_register_type tdesc method. */
1263
1264 static struct type *
1265 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1266 {
1267 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1268
1269 if (regnum == tdep->pc_regnum)
1270 return builtin_type (gdbarch)->builtin_func_ptr;
1271
1272 if (regnum == tdep->cc_regnum)
1273 return builtin_type (gdbarch)->builtin_int;
1274
1275 if (regnum_is_gpr_full (tdep, regnum))
1276 return builtin_type (gdbarch)->builtin_uint64;
1277
1278 /* For the "concatenated" vector registers use the same type as v16. */
1279 if (regnum_is_vxr_full (tdep, regnum))
1280 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
1281
1282 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1283 }
1284
1285 /* Implement pseudo_register_read gdbarch method. */
1286
1287 static enum register_status
1288 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1289 int regnum, gdb_byte *buf)
1290 {
1291 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1292 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1293 int regsize = register_size (gdbarch, regnum);
1294 ULONGEST val;
1295
1296 if (regnum == tdep->pc_regnum)
1297 {
1298 enum register_status status;
1299
1300 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1301 if (status == REG_VALID)
1302 {
1303 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1304 val &= 0x7fffffff;
1305 store_unsigned_integer (buf, regsize, byte_order, val);
1306 }
1307 return status;
1308 }
1309
1310 if (regnum == tdep->cc_regnum)
1311 {
1312 enum register_status status;
1313
1314 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1315 if (status == REG_VALID)
1316 {
1317 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1318 val = (val >> 12) & 3;
1319 else
1320 val = (val >> 44) & 3;
1321 store_unsigned_integer (buf, regsize, byte_order, val);
1322 }
1323 return status;
1324 }
1325
1326 if (regnum_is_gpr_full (tdep, regnum))
1327 {
1328 enum register_status status;
1329 ULONGEST val_upper;
1330
1331 regnum -= tdep->gpr_full_regnum;
1332
1333 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1334 if (status == REG_VALID)
1335 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1336 &val_upper);
1337 if (status == REG_VALID)
1338 {
1339 val |= val_upper << 32;
1340 store_unsigned_integer (buf, regsize, byte_order, val);
1341 }
1342 return status;
1343 }
1344
1345 if (regnum_is_vxr_full (tdep, regnum))
1346 {
1347 enum register_status status;
1348
1349 regnum -= tdep->v0_full_regnum;
1350
1351 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1352 if (status == REG_VALID)
1353 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1354 return status;
1355 }
1356
1357 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1358 }
1359
1360 /* Implement pseudo_register_write gdbarch method. */
1361
1362 static void
1363 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1364 int regnum, const gdb_byte *buf)
1365 {
1366 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1367 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1368 int regsize = register_size (gdbarch, regnum);
1369 ULONGEST val, psw;
1370
1371 if (regnum == tdep->pc_regnum)
1372 {
1373 val = extract_unsigned_integer (buf, regsize, byte_order);
1374 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1375 {
1376 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1377 val = (psw & 0x80000000) | (val & 0x7fffffff);
1378 }
1379 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1380 return;
1381 }
1382
1383 if (regnum == tdep->cc_regnum)
1384 {
1385 val = extract_unsigned_integer (buf, regsize, byte_order);
1386 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1387 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1388 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1389 else
1390 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1391 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1392 return;
1393 }
1394
1395 if (regnum_is_gpr_full (tdep, regnum))
1396 {
1397 regnum -= tdep->gpr_full_regnum;
1398 val = extract_unsigned_integer (buf, regsize, byte_order);
1399 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1400 val & 0xffffffff);
1401 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1402 val >> 32);
1403 return;
1404 }
1405
1406 if (regnum_is_vxr_full (tdep, regnum))
1407 {
1408 regnum -= tdep->v0_full_regnum;
1409 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1410 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1411 return;
1412 }
1413
1414 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1415 }
1416
1417 /* Register groups. */
1418
1419 /* Implement pseudo_register_reggroup_p tdesc method. */
1420
1421 static int
1422 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1423 struct reggroup *group)
1424 {
1425 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1426
1427 /* We usually save/restore the whole PSW, which includes PC and CC.
1428 However, some older gdbservers may not support saving/restoring
1429 the whole PSW yet, and will return an XML register description
1430 excluding those from the save/restore register groups. In those
1431 cases, we still need to explicitly save/restore PC and CC in order
1432 to push or pop frames. Since this doesn't hurt anything if we
1433 already save/restore the whole PSW (it's just redundant), we add
1434 PC and CC at this point unconditionally. */
1435 if (group == save_reggroup || group == restore_reggroup)
1436 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1437
1438 if (group == vector_reggroup)
1439 return regnum_is_vxr_full (tdep, regnum);
1440
1441 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1442 return 0;
1443
1444 return default_register_reggroup_p (gdbarch, regnum, group);
1445 }
1446
1447 /* The "ax_pseudo_register_collect" gdbarch method. */
1448
1449 static int
1450 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1451 struct agent_expr *ax, int regnum)
1452 {
1453 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1454 if (regnum == tdep->pc_regnum)
1455 {
1456 ax_reg_mask (ax, S390_PSWA_REGNUM);
1457 }
1458 else if (regnum == tdep->cc_regnum)
1459 {
1460 ax_reg_mask (ax, S390_PSWM_REGNUM);
1461 }
1462 else if (regnum_is_gpr_full (tdep, regnum))
1463 {
1464 regnum -= tdep->gpr_full_regnum;
1465 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1466 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1467 }
1468 else if (regnum_is_vxr_full (tdep, regnum))
1469 {
1470 regnum -= tdep->v0_full_regnum;
1471 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1472 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1473 }
1474 else
1475 {
1476 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1477 }
1478 return 0;
1479 }
1480
1481 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1482
1483 static int
1484 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1485 struct agent_expr *ax, int regnum)
1486 {
1487 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1488 if (regnum == tdep->pc_regnum)
1489 {
1490 ax_reg (ax, S390_PSWA_REGNUM);
1491 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1492 {
1493 ax_zero_ext (ax, 31);
1494 }
1495 }
1496 else if (regnum == tdep->cc_regnum)
1497 {
1498 ax_reg (ax, S390_PSWM_REGNUM);
1499 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1500 ax_const_l (ax, 12);
1501 else
1502 ax_const_l (ax, 44);
1503 ax_simple (ax, aop_rsh_unsigned);
1504 ax_zero_ext (ax, 2);
1505 }
1506 else if (regnum_is_gpr_full (tdep, regnum))
1507 {
1508 regnum -= tdep->gpr_full_regnum;
1509 ax_reg (ax, S390_R0_REGNUM + regnum);
1510 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1511 ax_const_l (ax, 32);
1512 ax_simple (ax, aop_lsh);
1513 ax_simple (ax, aop_bit_or);
1514 }
1515 else if (regnum_is_vxr_full (tdep, regnum))
1516 {
1517 /* Too large to stuff on the stack. */
1518 return 1;
1519 }
1520 else
1521 {
1522 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1523 }
1524 return 0;
1525 }
1526
1527 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1528 just a best-effort method, and we don't really have the means to run
1529 the full unwinder here, just collect the link register. */
1530
1531 static void
1532 s390_gen_return_address (struct gdbarch *gdbarch,
1533 struct agent_expr *ax, struct axs_value *value,
1534 CORE_ADDR scope)
1535 {
1536 value->type = register_type (gdbarch, S390_R14_REGNUM);
1537 value->kind = axs_lvalue_register;
1538 value->u.reg = S390_R14_REGNUM;
1539 }
1540
1541 /* Address handling. */
1542
1543 /* Implement addr_bits_remove gdbarch method.
1544 Only used for ABI_LINUX_S390. */
1545
1546 static CORE_ADDR
1547 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1548 {
1549 return addr & 0x7fffffff;
1550 }
1551
1552 /* Implement addr_class_type_flags gdbarch method.
1553 Only used for ABI_LINUX_ZSERIES. */
1554
1555 static int
1556 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1557 {
1558 if (byte_size == 4)
1559 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1560 else
1561 return 0;
1562 }
1563
1564 /* Implement addr_class_type_flags_to_name gdbarch method.
1565 Only used for ABI_LINUX_ZSERIES. */
1566
1567 static const char *
1568 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1569 {
1570 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1571 return "mode32";
1572 else
1573 return NULL;
1574 }
1575
1576 /* Implement addr_class_name_to_type_flags gdbarch method.
1577 Only used for ABI_LINUX_ZSERIES. */
1578
1579 static int
1580 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1581 const char *name,
1582 int *type_flags_ptr)
1583 {
1584 if (strcmp (name, "mode32") == 0)
1585 {
1586 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1587 return 1;
1588 }
1589 else
1590 return 0;
1591 }
1592
1593 /* Inferior function calls. */
1594
1595 /* Dummy function calls. */
1596
1597 /* Unwrap any single-field structs in TYPE and return the effective
1598 "inner" type. E.g., yield "float" for all these cases:
1599
1600 float x;
1601 struct { float x };
1602 struct { struct { float x; } x; };
1603 struct { struct { struct { float x; } x; } x; };
1604
1605 However, if an inner type is smaller than MIN_SIZE, abort the
1606 unwrapping. */
1607
1608 static struct type *
1609 s390_effective_inner_type (struct type *type, unsigned int min_size)
1610 {
1611 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1612 && TYPE_NFIELDS (type) == 1)
1613 {
1614 struct type *inner = check_typedef (TYPE_FIELD_TYPE (type, 0));
1615
1616 if (TYPE_LENGTH (inner) < min_size)
1617 break;
1618 type = inner;
1619 }
1620
1621 return type;
1622 }
1623
1624 /* Return non-zero if TYPE should be passed like "float" or
1625 "double". */
1626
1627 static int
1628 s390_function_arg_float (struct type *type)
1629 {
1630 /* Note that long double as well as complex types are intentionally
1631 excluded. */
1632 if (TYPE_LENGTH (type) > 8)
1633 return 0;
1634
1635 /* A struct containing just a float or double is passed like a float
1636 or double. */
1637 type = s390_effective_inner_type (type, 0);
1638
1639 return (TYPE_CODE (type) == TYPE_CODE_FLT
1640 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1641 }
1642
1643 /* Return non-zero if TYPE should be passed like a vector. */
1644
1645 static int
1646 s390_function_arg_vector (struct type *type)
1647 {
1648 if (TYPE_LENGTH (type) > 16)
1649 return 0;
1650
1651 /* Structs containing just a vector are passed like a vector. */
1652 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1653
1654 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1655 }
1656
1657 /* Determine whether N is a power of two. */
1658
1659 static int
1660 is_power_of_two (unsigned int n)
1661 {
1662 return n && ((n & (n - 1)) == 0);
1663 }
1664
1665 /* For an argument whose type is TYPE and which is not passed like a
1666 float or vector, return non-zero if it should be passed like "int"
1667 or "long long". */
1668
1669 static int
1670 s390_function_arg_integer (struct type *type)
1671 {
1672 enum type_code code = TYPE_CODE (type);
1673
1674 if (TYPE_LENGTH (type) > 8)
1675 return 0;
1676
1677 if (code == TYPE_CODE_INT
1678 || code == TYPE_CODE_ENUM
1679 || code == TYPE_CODE_RANGE
1680 || code == TYPE_CODE_CHAR
1681 || code == TYPE_CODE_BOOL
1682 || code == TYPE_CODE_PTR
1683 || TYPE_IS_REFERENCE (type))
1684 return 1;
1685
1686 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1687 && is_power_of_two (TYPE_LENGTH (type)));
1688 }
1689
1690 /* Argument passing state: Internal data structure passed to helper
1691 routines of s390_push_dummy_call. */
1692
1693 struct s390_arg_state
1694 {
1695 /* Register cache, or NULL, if we are in "preparation mode". */
1696 struct regcache *regcache;
1697 /* Next available general/floating-point/vector register for
1698 argument passing. */
1699 int gr, fr, vr;
1700 /* Current pointer to copy area (grows downwards). */
1701 CORE_ADDR copy;
1702 /* Current pointer to parameter area (grows upwards). */
1703 CORE_ADDR argp;
1704 };
1705
1706 /* Prepare one argument ARG for a dummy call and update the argument
1707 passing state AS accordingly. If the regcache field in AS is set,
1708 operate in "write mode" and write ARG into the inferior. Otherwise
1709 run "preparation mode" and skip all updates to the inferior. */
1710
1711 static void
1712 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1713 struct gdbarch_tdep *tdep, int word_size,
1714 enum bfd_endian byte_order, int is_unnamed)
1715 {
1716 struct type *type = check_typedef (value_type (arg));
1717 unsigned int length = TYPE_LENGTH (type);
1718 int write_mode = as->regcache != NULL;
1719
1720 if (s390_function_arg_float (type))
1721 {
1722 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1723 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1724 6. */
1725 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1726 {
1727 /* When we store a single-precision value in an FP register,
1728 it occupies the leftmost bits. */
1729 if (write_mode)
1730 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1731 value_contents (arg));
1732 as->fr += 2;
1733 }
1734 else
1735 {
1736 /* When we store a single-precision value in a stack slot,
1737 it occupies the rightmost bits. */
1738 as->argp = align_up (as->argp + length, word_size);
1739 if (write_mode)
1740 write_memory (as->argp - length, value_contents (arg),
1741 length);
1742 }
1743 }
1744 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1745 && s390_function_arg_vector (type))
1746 {
1747 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1748
1749 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1750 {
1751 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1752
1753 if (write_mode)
1754 as->regcache->cooked_write_part (regnum, 0, length,
1755 value_contents (arg));
1756 as->vr++;
1757 }
1758 else
1759 {
1760 if (write_mode)
1761 write_memory (as->argp, value_contents (arg), length);
1762 as->argp = align_up (as->argp + length, word_size);
1763 }
1764 }
1765 else if (s390_function_arg_integer (type) && length <= word_size)
1766 {
1767 /* Initialize it just to avoid a GCC false warning. */
1768 ULONGEST val = 0;
1769
1770 if (write_mode)
1771 {
1772 /* Place value in least significant bits of the register or
1773 memory word and sign- or zero-extend to full word size.
1774 This also applies to a struct or union. */
1775 val = TYPE_UNSIGNED (type)
1776 ? extract_unsigned_integer (value_contents (arg),
1777 length, byte_order)
1778 : extract_signed_integer (value_contents (arg),
1779 length, byte_order);
1780 }
1781
1782 if (as->gr <= 6)
1783 {
1784 if (write_mode)
1785 regcache_cooked_write_unsigned (as->regcache,
1786 S390_R0_REGNUM + as->gr,
1787 val);
1788 as->gr++;
1789 }
1790 else
1791 {
1792 if (write_mode)
1793 write_memory_unsigned_integer (as->argp, word_size,
1794 byte_order, val);
1795 as->argp += word_size;
1796 }
1797 }
1798 else if (s390_function_arg_integer (type) && length == 8)
1799 {
1800 if (as->gr <= 5)
1801 {
1802 if (write_mode)
1803 {
1804 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1805 value_contents (arg));
1806 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1807 value_contents (arg) + word_size);
1808 }
1809 as->gr += 2;
1810 }
1811 else
1812 {
1813 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1814 in it, then don't go back and use it again later. */
1815 as->gr = 7;
1816
1817 if (write_mode)
1818 write_memory (as->argp, value_contents (arg), length);
1819 as->argp += length;
1820 }
1821 }
1822 else
1823 {
1824 /* This argument type is never passed in registers. Place the
1825 value in the copy area and pass a pointer to it. Use 8-byte
1826 alignment as a conservative assumption. */
1827 as->copy = align_down (as->copy - length, 8);
1828 if (write_mode)
1829 write_memory (as->copy, value_contents (arg), length);
1830
1831 if (as->gr <= 6)
1832 {
1833 if (write_mode)
1834 regcache_cooked_write_unsigned (as->regcache,
1835 S390_R0_REGNUM + as->gr,
1836 as->copy);
1837 as->gr++;
1838 }
1839 else
1840 {
1841 if (write_mode)
1842 write_memory_unsigned_integer (as->argp, word_size,
1843 byte_order, as->copy);
1844 as->argp += word_size;
1845 }
1846 }
1847 }
1848
1849 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1850 place to be passed to a function, as specified by the "GNU/Linux
1851 for S/390 ELF Application Binary Interface Supplement".
1852
1853 SP is the current stack pointer. We must put arguments, links,
1854 padding, etc. whereever they belong, and return the new stack
1855 pointer value.
1856
1857 If STRUCT_RETURN is non-zero, then the function we're calling is
1858 going to return a structure by value; STRUCT_ADDR is the address of
1859 a block we've allocated for it on the stack.
1860
1861 Our caller has taken care of any type promotions needed to satisfy
1862 prototypes or the old K&R argument-passing rules. */
1863
1864 static CORE_ADDR
1865 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1866 struct regcache *regcache, CORE_ADDR bp_addr,
1867 int nargs, struct value **args, CORE_ADDR sp,
1868 function_call_return_method return_method,
1869 CORE_ADDR struct_addr)
1870 {
1871 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1872 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1873 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1874 int i;
1875 struct s390_arg_state arg_state, arg_prep;
1876 CORE_ADDR param_area_start, new_sp;
1877 struct type *ftype = check_typedef (value_type (function));
1878
1879 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1880 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1881
1882 arg_prep.copy = sp;
1883 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
1884 arg_prep.fr = 0;
1885 arg_prep.vr = 0;
1886 arg_prep.argp = 0;
1887 arg_prep.regcache = NULL;
1888
1889 /* Initialize arg_state for "preparation mode". */
1890 arg_state = arg_prep;
1891
1892 /* Update arg_state.copy with the start of the reference-to-copy area
1893 and arg_state.argp with the size of the parameter area. */
1894 for (i = 0; i < nargs; i++)
1895 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1896 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1897
1898 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1899
1900 /* Allocate the standard frame areas: the register save area, the
1901 word reserved for the compiler, and the back chain pointer. */
1902 new_sp = param_area_start - (16 * word_size + 32);
1903
1904 /* Now we have the final stack pointer. Make sure we didn't
1905 underflow; on 31-bit, this would result in addresses with the
1906 high bit set, which causes confusion elsewhere. Note that if we
1907 error out here, stack and registers remain untouched. */
1908 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1909 error (_("Stack overflow"));
1910
1911 /* Pass the structure return address in general register 2. */
1912 if (return_method == return_method_struct)
1913 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1914
1915 /* Initialize arg_state for "write mode". */
1916 arg_state = arg_prep;
1917 arg_state.argp = param_area_start;
1918 arg_state.regcache = regcache;
1919
1920 /* Write all parameters. */
1921 for (i = 0; i < nargs; i++)
1922 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1923 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1924
1925 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1926 if (word_size == 4)
1927 {
1928 ULONGEST pswa;
1929 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1930 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1931 }
1932 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1933
1934 /* Store updated stack pointer. */
1935 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1936
1937 /* We need to return the 'stack part' of the frame ID,
1938 which is actually the top of the register save area. */
1939 return param_area_start;
1940 }
1941
1942 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1943 dummy frame. The frame ID's base needs to match the TOS value
1944 returned by push_dummy_call, and the PC match the dummy frame's
1945 breakpoint. */
1946
1947 static struct frame_id
1948 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1949 {
1950 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1951 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1952 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1953
1954 return frame_id_build (sp + 16*word_size + 32,
1955 get_frame_pc (this_frame));
1956 }
1957
1958 /* Implement frame_align gdbarch method. */
1959
1960 static CORE_ADDR
1961 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1962 {
1963 /* Both the 32- and 64-bit ABI's say that the stack pointer should
1964 always be aligned on an eight-byte boundary. */
1965 return (addr & -8);
1966 }
1967
1968 /* Helper for s390_return_value: Set or retrieve a function return
1969 value if it resides in a register. */
1970
1971 static void
1972 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
1973 struct regcache *regcache,
1974 gdb_byte *out, const gdb_byte *in)
1975 {
1976 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1977 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1978 int length = TYPE_LENGTH (type);
1979 int code = TYPE_CODE (type);
1980
1981 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
1982 {
1983 /* Float-like value: left-aligned in f0. */
1984 if (in != NULL)
1985 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
1986 else
1987 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
1988 }
1989 else if (code == TYPE_CODE_ARRAY)
1990 {
1991 /* Vector: left-aligned in v24. */
1992 if (in != NULL)
1993 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
1994 else
1995 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
1996 }
1997 else if (length <= word_size)
1998 {
1999 /* Integer: zero- or sign-extended in r2. */
2000 if (out != NULL)
2001 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2002 out);
2003 else if (TYPE_UNSIGNED (type))
2004 regcache_cooked_write_unsigned
2005 (regcache, S390_R2_REGNUM,
2006 extract_unsigned_integer (in, length, byte_order));
2007 else
2008 regcache_cooked_write_signed
2009 (regcache, S390_R2_REGNUM,
2010 extract_signed_integer (in, length, byte_order));
2011 }
2012 else if (length == 2 * word_size)
2013 {
2014 /* Double word: in r2 and r3. */
2015 if (in != NULL)
2016 {
2017 regcache->cooked_write (S390_R2_REGNUM, in);
2018 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2019 }
2020 else
2021 {
2022 regcache->cooked_read (S390_R2_REGNUM, out);
2023 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2024 }
2025 }
2026 else
2027 internal_error (__FILE__, __LINE__, _("invalid return type"));
2028 }
2029
2030 /* Implement the 'return_value' gdbarch method. */
2031
2032 static enum return_value_convention
2033 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2034 struct type *type, struct regcache *regcache,
2035 gdb_byte *out, const gdb_byte *in)
2036 {
2037 enum return_value_convention rvc;
2038
2039 type = check_typedef (type);
2040
2041 switch (TYPE_CODE (type))
2042 {
2043 case TYPE_CODE_STRUCT:
2044 case TYPE_CODE_UNION:
2045 case TYPE_CODE_COMPLEX:
2046 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2047 break;
2048 case TYPE_CODE_ARRAY:
2049 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2050 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2051 ? RETURN_VALUE_REGISTER_CONVENTION
2052 : RETURN_VALUE_STRUCT_CONVENTION;
2053 break;
2054 default:
2055 rvc = TYPE_LENGTH (type) <= 8
2056 ? RETURN_VALUE_REGISTER_CONVENTION
2057 : RETURN_VALUE_STRUCT_CONVENTION;
2058 }
2059
2060 if (in != NULL || out != NULL)
2061 {
2062 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2063 s390_register_return_value (gdbarch, type, regcache, out, in);
2064 else if (in != NULL)
2065 error (_("Cannot set function return value."));
2066 else
2067 error (_("Function return value unknown."));
2068 }
2069
2070 return rvc;
2071 }
2072
2073 /* Frame unwinding. */
2074
2075 /* Implmement the stack_frame_destroyed_p gdbarch method. */
2076
2077 static int
2078 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2079 {
2080 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2081
2082 /* In frameless functions, there's no frame to destroy and thus
2083 we don't care about the epilogue.
2084
2085 In functions with frame, the epilogue sequence is a pair of
2086 a LM-type instruction that restores (amongst others) the
2087 return register %r14 and the stack pointer %r15, followed
2088 by a branch 'br %r14' --or equivalent-- that effects the
2089 actual return.
2090
2091 In that situation, this function needs to return 'true' in
2092 exactly one case: when pc points to that branch instruction.
2093
2094 Thus we try to disassemble the one instructions immediately
2095 preceding pc and check whether it is an LM-type instruction
2096 modifying the stack pointer.
2097
2098 Note that disassembling backwards is not reliable, so there
2099 is a slight chance of false positives here ... */
2100
2101 bfd_byte insn[6];
2102 unsigned int r1, r3, b2;
2103 int d2;
2104
2105 if (word_size == 4
2106 && !target_read_memory (pc - 4, insn, 4)
2107 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2108 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2109 return 1;
2110
2111 if (word_size == 4
2112 && !target_read_memory (pc - 6, insn, 6)
2113 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2114 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2115 return 1;
2116
2117 if (word_size == 8
2118 && !target_read_memory (pc - 6, insn, 6)
2119 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2120 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2121 return 1;
2122
2123 return 0;
2124 }
2125
2126 /* Implement unwind_pc gdbarch method. */
2127
2128 static CORE_ADDR
2129 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2130 {
2131 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2132 ULONGEST pc;
2133 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2134 return gdbarch_addr_bits_remove (gdbarch, pc);
2135 }
2136
2137 /* Implement unwind_sp gdbarch method. */
2138
2139 static CORE_ADDR
2140 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2141 {
2142 ULONGEST sp;
2143 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2144 return gdbarch_addr_bits_remove (gdbarch, sp);
2145 }
2146
2147 /* Helper routine to unwind pseudo registers. */
2148
2149 static struct value *
2150 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2151 {
2152 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2153 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2154 struct type *type = register_type (gdbarch, regnum);
2155
2156 /* Unwind PC via PSW address. */
2157 if (regnum == tdep->pc_regnum)
2158 {
2159 struct value *val;
2160
2161 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2162 if (!value_optimized_out (val))
2163 {
2164 LONGEST pswa = value_as_long (val);
2165
2166 if (TYPE_LENGTH (type) == 4)
2167 return value_from_pointer (type, pswa & 0x7fffffff);
2168 else
2169 return value_from_pointer (type, pswa);
2170 }
2171 }
2172
2173 /* Unwind CC via PSW mask. */
2174 if (regnum == tdep->cc_regnum)
2175 {
2176 struct value *val;
2177
2178 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2179 if (!value_optimized_out (val))
2180 {
2181 LONGEST pswm = value_as_long (val);
2182
2183 if (TYPE_LENGTH (type) == 4)
2184 return value_from_longest (type, (pswm >> 12) & 3);
2185 else
2186 return value_from_longest (type, (pswm >> 44) & 3);
2187 }
2188 }
2189
2190 /* Unwind full GPRs to show at least the lower halves (as the
2191 upper halves are undefined). */
2192 if (regnum_is_gpr_full (tdep, regnum))
2193 {
2194 int reg = regnum - tdep->gpr_full_regnum;
2195 struct value *val;
2196
2197 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2198 if (!value_optimized_out (val))
2199 return value_cast (type, val);
2200 }
2201
2202 return allocate_optimized_out_value (type);
2203 }
2204
2205 /* Translate a .eh_frame register to DWARF register, or adjust a
2206 .debug_frame register. */
2207
2208 static int
2209 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2210 {
2211 /* See s390_dwarf_reg_to_regnum for comments. */
2212 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2213 }
2214
2215 /* DWARF-2 frame unwinding. */
2216
2217 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2218 s390_dwarf2_frame_init_reg. */
2219
2220 static struct value *
2221 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2222 int regnum)
2223 {
2224 return s390_unwind_pseudo_register (this_frame, regnum);
2225 }
2226
2227 /* Implement init_reg dwarf2_frame method. */
2228
2229 static void
2230 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2231 struct dwarf2_frame_state_reg *reg,
2232 struct frame_info *this_frame)
2233 {
2234 /* The condition code (and thus PSW mask) is call-clobbered. */
2235 if (regnum == S390_PSWM_REGNUM)
2236 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2237
2238 /* The PSW address unwinds to the return address. */
2239 else if (regnum == S390_PSWA_REGNUM)
2240 reg->how = DWARF2_FRAME_REG_RA;
2241
2242 /* Fixed registers are call-saved or call-clobbered
2243 depending on the ABI in use. */
2244 else if (regnum < S390_NUM_REGS)
2245 {
2246 if (s390_register_call_saved (gdbarch, regnum))
2247 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2248 else
2249 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2250 }
2251
2252 /* We install a special function to unwind pseudos. */
2253 else
2254 {
2255 reg->how = DWARF2_FRAME_REG_FN;
2256 reg->loc.fn = s390_dwarf2_prev_register;
2257 }
2258 }
2259
2260 /* Frame unwinding. */
2261
2262 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2263 register translation. */
2264
2265 struct value *
2266 s390_trad_frame_prev_register (struct frame_info *this_frame,
2267 struct trad_frame_saved_reg saved_regs[],
2268 int regnum)
2269 {
2270 if (regnum < S390_NUM_REGS)
2271 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2272 else
2273 return s390_unwind_pseudo_register (this_frame, regnum);
2274 }
2275
2276 /* Normal stack frames. */
2277
2278 struct s390_unwind_cache {
2279
2280 CORE_ADDR func;
2281 CORE_ADDR frame_base;
2282 CORE_ADDR local_base;
2283
2284 struct trad_frame_saved_reg *saved_regs;
2285 };
2286
2287 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2288 prologue analysis. Helper for s390_frame_unwind_cache. */
2289
2290 static int
2291 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2292 struct s390_unwind_cache *info)
2293 {
2294 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2295 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2296 struct s390_prologue_data data;
2297 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2298 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2299 int i;
2300 CORE_ADDR cfa;
2301 CORE_ADDR func;
2302 CORE_ADDR result;
2303 ULONGEST reg;
2304 CORE_ADDR prev_sp;
2305 int frame_pointer;
2306 int size;
2307 struct frame_info *next_frame;
2308
2309 /* Try to find the function start address. If we can't find it, we don't
2310 bother searching for it -- with modern compilers this would be mostly
2311 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2312 or else a valid backchain ... */
2313 if (!get_frame_func_if_available (this_frame, &info->func))
2314 {
2315 info->func = -1;
2316 return 0;
2317 }
2318 func = info->func;
2319
2320 /* Try to analyze the prologue. */
2321 result = s390_analyze_prologue (gdbarch, func,
2322 get_frame_pc (this_frame), &data);
2323 if (!result)
2324 return 0;
2325
2326 /* If this was successful, we should have found the instruction that
2327 sets the stack pointer register to the previous value of the stack
2328 pointer minus the frame size. */
2329 if (!pv_is_register (*sp, S390_SP_REGNUM))
2330 return 0;
2331
2332 /* A frame size of zero at this point can mean either a real
2333 frameless function, or else a failure to find the prologue.
2334 Perform some sanity checks to verify we really have a
2335 frameless function. */
2336 if (sp->k == 0)
2337 {
2338 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2339 size zero. This is only possible if the next frame is a sentinel
2340 frame, a dummy frame, or a signal trampoline frame. */
2341 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2342 needed, instead the code should simpliy rely on its
2343 analysis. */
2344 next_frame = get_next_frame (this_frame);
2345 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2346 next_frame = get_next_frame (next_frame);
2347 if (next_frame
2348 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2349 return 0;
2350
2351 /* If we really have a frameless function, %r14 must be valid
2352 -- in particular, it must point to a different function. */
2353 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2354 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2355 if (get_pc_function_start (reg) == func)
2356 {
2357 /* However, there is one case where it *is* valid for %r14
2358 to point to the same function -- if this is a recursive
2359 call, and we have stopped in the prologue *before* the
2360 stack frame was allocated.
2361
2362 Recognize this case by looking ahead a bit ... */
2363
2364 struct s390_prologue_data data2;
2365 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2366
2367 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2368 && pv_is_register (*sp2, S390_SP_REGNUM)
2369 && sp2->k != 0))
2370 return 0;
2371 }
2372 }
2373
2374 /* OK, we've found valid prologue data. */
2375 size = -sp->k;
2376
2377 /* If the frame pointer originally also holds the same value
2378 as the stack pointer, we're probably using it. If it holds
2379 some other value -- even a constant offset -- it is most
2380 likely used as temp register. */
2381 if (pv_is_identical (*sp, *fp))
2382 frame_pointer = S390_FRAME_REGNUM;
2383 else
2384 frame_pointer = S390_SP_REGNUM;
2385
2386 /* If we've detected a function with stack frame, we'll still have to
2387 treat it as frameless if we're currently within the function epilog
2388 code at a point where the frame pointer has already been restored.
2389 This can only happen in an innermost frame. */
2390 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2391 instead the code should simpliy rely on its analysis. */
2392 next_frame = get_next_frame (this_frame);
2393 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2394 next_frame = get_next_frame (next_frame);
2395 if (size > 0
2396 && (next_frame == NULL
2397 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2398 {
2399 /* See the comment in s390_stack_frame_destroyed_p on why this is
2400 not completely reliable ... */
2401 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2402 {
2403 memset (&data, 0, sizeof (data));
2404 size = 0;
2405 frame_pointer = S390_SP_REGNUM;
2406 }
2407 }
2408
2409 /* Once we know the frame register and the frame size, we can unwind
2410 the current value of the frame register from the next frame, and
2411 add back the frame size to arrive that the previous frame's
2412 stack pointer value. */
2413 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2414 cfa = prev_sp + 16*word_size + 32;
2415
2416 /* Set up ABI call-saved/call-clobbered registers. */
2417 for (i = 0; i < S390_NUM_REGS; i++)
2418 if (!s390_register_call_saved (gdbarch, i))
2419 trad_frame_set_unknown (info->saved_regs, i);
2420
2421 /* CC is always call-clobbered. */
2422 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2423
2424 /* Record the addresses of all register spill slots the prologue parser
2425 has recognized. Consider only registers defined as call-saved by the
2426 ABI; for call-clobbered registers the parser may have recognized
2427 spurious stores. */
2428
2429 for (i = 0; i < 16; i++)
2430 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2431 && data.gpr_slot[i] != 0)
2432 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2433
2434 for (i = 0; i < 16; i++)
2435 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2436 && data.fpr_slot[i] != 0)
2437 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2438
2439 /* Function return will set PC to %r14. */
2440 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2441
2442 /* In frameless functions, we unwind simply by moving the return
2443 address to the PC. However, if we actually stored to the
2444 save area, use that -- we might only think the function frameless
2445 because we're in the middle of the prologue ... */
2446 if (size == 0
2447 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2448 {
2449 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2450 }
2451
2452 /* Another sanity check: unless this is a frameless function,
2453 we should have found spill slots for SP and PC.
2454 If not, we cannot unwind further -- this happens e.g. in
2455 libc's thread_start routine. */
2456 if (size > 0)
2457 {
2458 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2459 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2460 prev_sp = -1;
2461 }
2462
2463 /* We use the current value of the frame register as local_base,
2464 and the top of the register save area as frame_base. */
2465 if (prev_sp != -1)
2466 {
2467 info->frame_base = prev_sp + 16*word_size + 32;
2468 info->local_base = prev_sp - size;
2469 }
2470
2471 return 1;
2472 }
2473
2474 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2475 back chain unwinding. Helper for s390_frame_unwind_cache. */
2476
2477 static void
2478 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2479 struct s390_unwind_cache *info)
2480 {
2481 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2482 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2483 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2484 CORE_ADDR backchain;
2485 ULONGEST reg;
2486 LONGEST sp, tmp;
2487 int i;
2488
2489 /* Set up ABI call-saved/call-clobbered registers. */
2490 for (i = 0; i < S390_NUM_REGS; i++)
2491 if (!s390_register_call_saved (gdbarch, i))
2492 trad_frame_set_unknown (info->saved_regs, i);
2493
2494 /* CC is always call-clobbered. */
2495 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2496
2497 /* Get the backchain. */
2498 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2499 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2500 tmp = 0;
2501 backchain = (CORE_ADDR) tmp;
2502
2503 /* A zero backchain terminates the frame chain. As additional
2504 sanity check, let's verify that the spill slot for SP in the
2505 save area pointed to by the backchain in fact links back to
2506 the save area. */
2507 if (backchain != 0
2508 && safe_read_memory_integer (backchain + 15*word_size,
2509 word_size, byte_order, &sp)
2510 && (CORE_ADDR)sp == backchain)
2511 {
2512 /* We don't know which registers were saved, but it will have
2513 to be at least %r14 and %r15. This will allow us to continue
2514 unwinding, but other prev-frame registers may be incorrect ... */
2515 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2516 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2517
2518 /* Function return will set PC to %r14. */
2519 info->saved_regs[S390_PSWA_REGNUM]
2520 = info->saved_regs[S390_RETADDR_REGNUM];
2521
2522 /* We use the current value of the frame register as local_base,
2523 and the top of the register save area as frame_base. */
2524 info->frame_base = backchain + 16*word_size + 32;
2525 info->local_base = reg;
2526 }
2527
2528 info->func = get_frame_pc (this_frame);
2529 }
2530
2531 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2532 s390_frame_unwind and s390_frame_base. */
2533
2534 static struct s390_unwind_cache *
2535 s390_frame_unwind_cache (struct frame_info *this_frame,
2536 void **this_prologue_cache)
2537 {
2538 struct s390_unwind_cache *info;
2539
2540 if (*this_prologue_cache)
2541 return (struct s390_unwind_cache *) *this_prologue_cache;
2542
2543 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2544 *this_prologue_cache = info;
2545 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2546 info->func = -1;
2547 info->frame_base = -1;
2548 info->local_base = -1;
2549
2550 TRY
2551 {
2552 /* Try to use prologue analysis to fill the unwind cache.
2553 If this fails, fall back to reading the stack backchain. */
2554 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2555 s390_backchain_frame_unwind_cache (this_frame, info);
2556 }
2557 CATCH (ex, RETURN_MASK_ERROR)
2558 {
2559 if (ex.error != NOT_AVAILABLE_ERROR)
2560 throw_exception (ex);
2561 }
2562 END_CATCH
2563
2564 return info;
2565 }
2566
2567 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2568
2569 static void
2570 s390_frame_this_id (struct frame_info *this_frame,
2571 void **this_prologue_cache,
2572 struct frame_id *this_id)
2573 {
2574 struct s390_unwind_cache *info
2575 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2576
2577 if (info->frame_base == -1)
2578 {
2579 if (info->func != -1)
2580 *this_id = frame_id_build_unavailable_stack (info->func);
2581 return;
2582 }
2583
2584 *this_id = frame_id_build (info->frame_base, info->func);
2585 }
2586
2587 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2588
2589 static struct value *
2590 s390_frame_prev_register (struct frame_info *this_frame,
2591 void **this_prologue_cache, int regnum)
2592 {
2593 struct s390_unwind_cache *info
2594 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2595
2596 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2597 }
2598
2599 /* Default S390 frame unwinder. */
2600
2601 static const struct frame_unwind s390_frame_unwind = {
2602 NORMAL_FRAME,
2603 default_frame_unwind_stop_reason,
2604 s390_frame_this_id,
2605 s390_frame_prev_register,
2606 NULL,
2607 default_frame_sniffer
2608 };
2609
2610 /* Code stubs and their stack frames. For things like PLTs and NULL
2611 function calls (where there is no true frame and the return address
2612 is in the RETADDR register). */
2613
2614 struct s390_stub_unwind_cache
2615 {
2616 CORE_ADDR frame_base;
2617 struct trad_frame_saved_reg *saved_regs;
2618 };
2619
2620 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2621 s390_stub_frame_unwind. */
2622
2623 static struct s390_stub_unwind_cache *
2624 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2625 void **this_prologue_cache)
2626 {
2627 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2628 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2629 struct s390_stub_unwind_cache *info;
2630 ULONGEST reg;
2631
2632 if (*this_prologue_cache)
2633 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2634
2635 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2636 *this_prologue_cache = info;
2637 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2638
2639 /* The return address is in register %r14. */
2640 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2641
2642 /* Retrieve stack pointer and determine our frame base. */
2643 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2644 info->frame_base = reg + 16*word_size + 32;
2645
2646 return info;
2647 }
2648
2649 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2650
2651 static void
2652 s390_stub_frame_this_id (struct frame_info *this_frame,
2653 void **this_prologue_cache,
2654 struct frame_id *this_id)
2655 {
2656 struct s390_stub_unwind_cache *info
2657 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2658 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2659 }
2660
2661 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2662
2663 static struct value *
2664 s390_stub_frame_prev_register (struct frame_info *this_frame,
2665 void **this_prologue_cache, int regnum)
2666 {
2667 struct s390_stub_unwind_cache *info
2668 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2669 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2670 }
2671
2672 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2673
2674 static int
2675 s390_stub_frame_sniffer (const struct frame_unwind *self,
2676 struct frame_info *this_frame,
2677 void **this_prologue_cache)
2678 {
2679 CORE_ADDR addr_in_block;
2680 bfd_byte insn[S390_MAX_INSTR_SIZE];
2681
2682 /* If the current PC points to non-readable memory, we assume we
2683 have trapped due to an invalid function pointer call. We handle
2684 the non-existing current function like a PLT stub. */
2685 addr_in_block = get_frame_address_in_block (this_frame);
2686 if (in_plt_section (addr_in_block)
2687 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2688 return 1;
2689 return 0;
2690 }
2691
2692 /* S390 stub frame unwinder. */
2693
2694 static const struct frame_unwind s390_stub_frame_unwind = {
2695 NORMAL_FRAME,
2696 default_frame_unwind_stop_reason,
2697 s390_stub_frame_this_id,
2698 s390_stub_frame_prev_register,
2699 NULL,
2700 s390_stub_frame_sniffer
2701 };
2702
2703 /* Frame base handling. */
2704
2705 static CORE_ADDR
2706 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2707 {
2708 struct s390_unwind_cache *info
2709 = s390_frame_unwind_cache (this_frame, this_cache);
2710 return info->frame_base;
2711 }
2712
2713 static CORE_ADDR
2714 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2715 {
2716 struct s390_unwind_cache *info
2717 = s390_frame_unwind_cache (this_frame, this_cache);
2718 return info->local_base;
2719 }
2720
2721 static const struct frame_base s390_frame_base = {
2722 &s390_frame_unwind,
2723 s390_frame_base_address,
2724 s390_local_base_address,
2725 s390_local_base_address
2726 };
2727
2728 /* Process record-replay */
2729
2730 /* Takes the intermediate sum of address calculations and masks off upper
2731 bits according to current addressing mode. */
2732
2733 static CORE_ADDR
2734 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2735 CORE_ADDR val)
2736 {
2737 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2738 ULONGEST pswm, pswa;
2739 int am;
2740 if (tdep->abi == ABI_LINUX_S390)
2741 {
2742 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2743 am = pswa >> 31 & 1;
2744 }
2745 else
2746 {
2747 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2748 am = pswm >> 31 & 3;
2749 }
2750 switch (am)
2751 {
2752 case 0:
2753 return val & 0xffffff;
2754 case 1:
2755 return val & 0x7fffffff;
2756 case 3:
2757 return val;
2758 default:
2759 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2760 return 0;
2761 }
2762 }
2763
2764 /* Calculates memory address using pre-calculated index, raw instruction word
2765 with b and d/dl fields, and raw instruction byte with dh field. Index and
2766 dh should be set to 0 if unused. */
2767
2768 static CORE_ADDR
2769 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2770 ULONGEST x, uint16_t bd, int8_t dh)
2771 {
2772 uint8_t rb = bd >> 12 & 0xf;
2773 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2774 ULONGEST b;
2775 CORE_ADDR res = d + x;
2776 if (rb)
2777 {
2778 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2779 res += b;
2780 }
2781 return s390_record_address_mask (gdbarch, regcache, res);
2782 }
2783
2784 /* Calculates memory address using raw x, b + d/dl, dh fields from
2785 instruction. rx and dh should be set to 0 if unused. */
2786
2787 static CORE_ADDR
2788 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2789 uint8_t rx, uint16_t bd, int8_t dh)
2790 {
2791 ULONGEST x = 0;
2792 if (rx)
2793 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2794 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2795 }
2796
2797 /* Calculates memory address for VSCE[GF] instructions. */
2798
2799 static int
2800 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2801 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2802 int8_t dh, CORE_ADDR *res)
2803 {
2804 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2805 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2806 ULONGEST x;
2807 gdb_byte buf[16];
2808 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2809 return -1;
2810 if (vx < 16)
2811 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
2812 else
2813 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2814 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2815 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2816 return 0;
2817 }
2818
2819 /* Calculates memory address for instructions with relative long addressing. */
2820
2821 static CORE_ADDR
2822 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2823 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2824 {
2825 int32_t ri = i1 << 16 | i2;
2826 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2827 }
2828
2829 /* Population count helper. */
2830
2831 static int s390_popcnt (unsigned int x) {
2832 int res = 0;
2833 while (x)
2834 {
2835 if (x & 1)
2836 res++;
2837 x >>= 1;
2838 }
2839 return res;
2840 }
2841
2842 /* Record 64-bit register. */
2843
2844 static int
2845 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2846 {
2847 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2848 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2849 return -1;
2850 if (tdep->abi == ABI_LINUX_S390)
2851 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2852 return -1;
2853 return 0;
2854 }
2855
2856 /* Record high 32 bits of a register. */
2857
2858 static int
2859 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2860 {
2861 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2862 if (tdep->abi == ABI_LINUX_S390)
2863 {
2864 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2865 return -1;
2866 }
2867 else
2868 {
2869 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2870 return -1;
2871 }
2872 return 0;
2873 }
2874
2875 /* Record vector register. */
2876
2877 static int
2878 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2879 {
2880 if (i < 16)
2881 {
2882 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2883 return -1;
2884 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2885 return -1;
2886 }
2887 else
2888 {
2889 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2890 return -1;
2891 }
2892 return 0;
2893 }
2894
2895 /* Implement process_record gdbarch method. */
2896
2897 static int
2898 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2899 CORE_ADDR addr)
2900 {
2901 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2902 uint16_t insn[3] = {0};
2903 /* Instruction as bytes. */
2904 uint8_t ibyte[6];
2905 /* Instruction as nibbles. */
2906 uint8_t inib[12];
2907 /* Instruction vector registers. */
2908 uint8_t ivec[4];
2909 CORE_ADDR oaddr, oaddr2, oaddr3;
2910 ULONGEST tmp;
2911 int i, n;
2912 /* if EX/EXRL instruction used, here's the reg parameter */
2913 int ex = -1;
2914 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2915
2916 /* Attempting to use EX or EXRL jumps back here */
2917 ex:
2918
2919 /* Read instruction. */
2920 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2921 /* If execute was involved, do the adjustment. */
2922 if (ex != -1)
2923 insn[0] |= ex & 0xff;
2924 /* Two highest bits determine instruction size. */
2925 if (insn[0] >= 0x4000)
2926 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2927 else
2928 /* Not necessary, but avoids uninitialized variable warnings. */
2929 insn[1] = 0;
2930 if (insn[0] >= 0xc000)
2931 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2932 else
2933 insn[2] = 0;
2934 /* Split instruction into bytes and nibbles. */
2935 for (i = 0; i < 3; i++)
2936 {
2937 ibyte[i*2] = insn[i] >> 8 & 0xff;
2938 ibyte[i*2+1] = insn[i] & 0xff;
2939 }
2940 for (i = 0; i < 6; i++)
2941 {
2942 inib[i*2] = ibyte[i] >> 4 & 0xf;
2943 inib[i*2+1] = ibyte[i] & 0xf;
2944 }
2945 /* Compute vector registers, if applicable. */
2946 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2947 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2948 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2949 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2950
2951 switch (ibyte[0])
2952 {
2953 /* 0x00 undefined */
2954
2955 case 0x01:
2956 /* E-format instruction */
2957 switch (ibyte[1])
2958 {
2959 /* 0x00 undefined */
2960 /* 0x01 unsupported: PR - program return */
2961 /* 0x02 unsupported: UPT */
2962 /* 0x03 undefined */
2963 /* 0x04 privileged: PTFF - perform timing facility function */
2964 /* 0x05-0x06 undefined */
2965 /* 0x07 privileged: SCKPF - set clock programmable field */
2966 /* 0x08-0x09 undefined */
2967
2968 case 0x0a: /* PFPO - perform floating point operation */
2969 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
2970 if (!(tmp & 0x80000000u))
2971 {
2972 uint8_t ofc = tmp >> 16 & 0xff;
2973 switch (ofc)
2974 {
2975 case 0x00: /* HFP32 */
2976 case 0x01: /* HFP64 */
2977 case 0x05: /* BFP32 */
2978 case 0x06: /* BFP64 */
2979 case 0x08: /* DFP32 */
2980 case 0x09: /* DFP64 */
2981 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2982 return -1;
2983 break;
2984 case 0x02: /* HFP128 */
2985 case 0x07: /* BFP128 */
2986 case 0x0a: /* DFP128 */
2987 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
2988 return -1;
2989 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
2990 return -1;
2991 break;
2992 default:
2993 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
2994 ofc, paddress (gdbarch, addr));
2995 return -1;
2996 }
2997
2998 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
2999 return -1;
3000 }
3001 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3002 return -1;
3003 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3004 return -1;
3005 break;
3006
3007 case 0x0b: /* TAM - test address mode */
3008 case 0x0c: /* SAM24 - set address mode 24 */
3009 case 0x0d: /* SAM31 - set address mode 31 */
3010 case 0x0e: /* SAM64 - set address mode 64 */
3011 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3012 return -1;
3013 break;
3014
3015 /* 0x0f-0xfe undefined */
3016
3017 /* 0xff unsupported: TRAP */
3018
3019 default:
3020 goto UNKNOWN_OP;
3021 }
3022 break;
3023
3024 /* 0x02 undefined */
3025 /* 0x03 undefined */
3026
3027 case 0x04: /* SPM - set program mask */
3028 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3029 return -1;
3030 break;
3031
3032 case 0x05: /* BALR - branch and link */
3033 case 0x45: /* BAL - branch and link */
3034 case 0x06: /* BCTR - branch on count */
3035 case 0x46: /* BCT - branch on count */
3036 case 0x0d: /* BASR - branch and save */
3037 case 0x4d: /* BAS - branch and save */
3038 case 0x84: /* BRXH - branch relative on index high */
3039 case 0x85: /* BRXLE - branch relative on index low or equal */
3040 case 0x86: /* BXH - branch on index high */
3041 case 0x87: /* BXLE - branch on index low or equal */
3042 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3043 use 32-bit destination as counter. */
3044 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3045 return -1;
3046 break;
3047
3048 case 0x07: /* BCR - branch on condition */
3049 case 0x47: /* BC - branch on condition */
3050 /* No effect other than PC transfer. */
3051 break;
3052
3053 /* 0x08 undefined */
3054 /* 0x09 undefined */
3055
3056 case 0x0a:
3057 /* SVC - supervisor call */
3058 if (tdep->s390_syscall_record != NULL)
3059 {
3060 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3061 return -1;
3062 }
3063 else
3064 {
3065 printf_unfiltered (_("no syscall record support\n"));
3066 return -1;
3067 }
3068 break;
3069
3070 case 0x0b: /* BSM - branch and set mode */
3071 if (inib[2])
3072 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3073 return -1;
3074 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3075 return -1;
3076 break;
3077
3078 case 0x0c: /* BASSM - branch and save and set mode */
3079 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3080 return -1;
3081 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3082 return -1;
3083 break;
3084
3085 case 0x0e: /* MVCL - move long [interruptible] */
3086 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3087 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3088 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3089 tmp &= 0xffffff;
3090 if (record_full_arch_list_add_mem (oaddr, tmp))
3091 return -1;
3092 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3093 return -1;
3094 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3095 return -1;
3096 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3097 return -1;
3098 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3099 return -1;
3100 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3101 return -1;
3102 break;
3103
3104 case 0x0f: /* CLCL - compare logical long [interruptible] */
3105 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3106 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3107 return -1;
3108 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3109 return -1;
3110 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3111 return -1;
3112 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3113 return -1;
3114 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3115 return -1;
3116 break;
3117
3118 case 0x10: /* LPR - load positive */
3119 case 0x11: /* LNR - load negative */
3120 case 0x12: /* LTR - load and test */
3121 case 0x13: /* LCR - load complement */
3122 case 0x14: /* NR - and */
3123 case 0x16: /* OR - or */
3124 case 0x17: /* XR - xor */
3125 case 0x1a: /* AR - add */
3126 case 0x1b: /* SR - subtract */
3127 case 0x1e: /* ALR - add logical */
3128 case 0x1f: /* SLR - subtract logical */
3129 case 0x54: /* N - and */
3130 case 0x56: /* O - or */
3131 case 0x57: /* X - xor */
3132 case 0x5a: /* A - add */
3133 case 0x5b: /* S - subtract */
3134 case 0x5e: /* AL - add logical */
3135 case 0x5f: /* SL - subtract logical */
3136 case 0x4a: /* AH - add halfword */
3137 case 0x4b: /* SH - subtract halfword */
3138 case 0x8a: /* SRA - shift right single */
3139 case 0x8b: /* SLA - shift left single */
3140 case 0xbf: /* ICM - insert characters under mask */
3141 /* 32-bit destination + flags */
3142 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3143 return -1;
3144 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3145 return -1;
3146 break;
3147
3148 case 0x15: /* CLR - compare logical */
3149 case 0x55: /* CL - compare logical */
3150 case 0x19: /* CR - compare */
3151 case 0x29: /* CDR - compare */
3152 case 0x39: /* CER - compare */
3153 case 0x49: /* CH - compare halfword */
3154 case 0x59: /* C - compare */
3155 case 0x69: /* CD - compare */
3156 case 0x79: /* CE - compare */
3157 case 0x91: /* TM - test under mask */
3158 case 0x95: /* CLI - compare logical */
3159 case 0xbd: /* CLM - compare logical under mask */
3160 case 0xd5: /* CLC - compare logical */
3161 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3162 return -1;
3163 break;
3164
3165 case 0x18: /* LR - load */
3166 case 0x48: /* LH - load halfword */
3167 case 0x58: /* L - load */
3168 case 0x41: /* LA - load address */
3169 case 0x43: /* IC - insert character */
3170 case 0x4c: /* MH - multiply halfword */
3171 case 0x71: /* MS - multiply single */
3172 case 0x88: /* SRL - shift right single logical */
3173 case 0x89: /* SLL - shift left single logical */
3174 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3175 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3176 return -1;
3177 break;
3178
3179 case 0x1c: /* MR - multiply */
3180 case 0x5c: /* M - multiply */
3181 case 0x1d: /* DR - divide */
3182 case 0x5d: /* D - divide */
3183 case 0x8c: /* SRDL - shift right double logical */
3184 case 0x8d: /* SLDL - shift left double logical */
3185 /* 32-bit pair destination, no flags */
3186 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3187 return -1;
3188 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3189 return -1;
3190 break;
3191
3192 case 0x20: /* LPDR - load positive */
3193 case 0x30: /* LPER - load positive */
3194 case 0x21: /* LNDR - load negative */
3195 case 0x31: /* LNER - load negative */
3196 case 0x22: /* LTDR - load and test */
3197 case 0x32: /* LTER - load and test */
3198 case 0x23: /* LCDR - load complement */
3199 case 0x33: /* LCER - load complement */
3200 case 0x2a: /* ADR - add */
3201 case 0x3a: /* AER - add */
3202 case 0x6a: /* AD - add */
3203 case 0x7a: /* AE - add */
3204 case 0x2b: /* SDR - subtract */
3205 case 0x3b: /* SER - subtract */
3206 case 0x6b: /* SD - subtract */
3207 case 0x7b: /* SE - subtract */
3208 case 0x2e: /* AWR - add unnormalized */
3209 case 0x3e: /* AUR - add unnormalized */
3210 case 0x6e: /* AW - add unnormalized */
3211 case 0x7e: /* AU - add unnormalized */
3212 case 0x2f: /* SWR - subtract unnormalized */
3213 case 0x3f: /* SUR - subtract unnormalized */
3214 case 0x6f: /* SW - subtract unnormalized */
3215 case 0x7f: /* SU - subtract unnormalized */
3216 /* float destination + flags */
3217 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3218 return -1;
3219 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3220 return -1;
3221 break;
3222
3223 case 0x24: /* HDR - halve */
3224 case 0x34: /* HER - halve */
3225 case 0x25: /* LDXR - load rounded */
3226 case 0x35: /* LEDR - load rounded */
3227 case 0x28: /* LDR - load */
3228 case 0x38: /* LER - load */
3229 case 0x68: /* LD - load */
3230 case 0x78: /* LE - load */
3231 case 0x2c: /* MDR - multiply */
3232 case 0x3c: /* MDER - multiply */
3233 case 0x6c: /* MD - multiply */
3234 case 0x7c: /* MDE - multiply */
3235 case 0x2d: /* DDR - divide */
3236 case 0x3d: /* DER - divide */
3237 case 0x6d: /* DD - divide */
3238 case 0x7d: /* DE - divide */
3239 /* float destination, no flags */
3240 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3241 return -1;
3242 break;
3243
3244 case 0x26: /* MXR - multiply */
3245 case 0x27: /* MXDR - multiply */
3246 case 0x67: /* MXD - multiply */
3247 /* float pair destination, no flags */
3248 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3249 return -1;
3250 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3251 return -1;
3252 break;
3253
3254 case 0x36: /* AXR - add */
3255 case 0x37: /* SXR - subtract */
3256 /* float pair destination + flags */
3257 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3258 return -1;
3259 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3260 return -1;
3261 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3262 return -1;
3263 break;
3264
3265 case 0x40: /* STH - store halfword */
3266 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3267 if (record_full_arch_list_add_mem (oaddr, 2))
3268 return -1;
3269 break;
3270
3271 case 0x42: /* STC - store character */
3272 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3273 if (record_full_arch_list_add_mem (oaddr, 1))
3274 return -1;
3275 break;
3276
3277 case 0x44: /* EX - execute */
3278 if (ex != -1)
3279 {
3280 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3281 paddress (gdbarch, addr));
3282 return -1;
3283 }
3284 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3285 if (inib[2])
3286 {
3287 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3288 ex = tmp & 0xff;
3289 }
3290 else
3291 {
3292 ex = 0;
3293 }
3294 goto ex;
3295
3296 case 0x4e: /* CVD - convert to decimal */
3297 case 0x60: /* STD - store */
3298 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3299 if (record_full_arch_list_add_mem (oaddr, 8))
3300 return -1;
3301 break;
3302
3303 case 0x4f: /* CVB - convert to binary */
3304 /* 32-bit gpr destination + FPC (DXC write) */
3305 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3306 return -1;
3307 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3308 return -1;
3309 break;
3310
3311 case 0x50: /* ST - store */
3312 case 0x70: /* STE - store */
3313 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3314 if (record_full_arch_list_add_mem (oaddr, 4))
3315 return -1;
3316 break;
3317
3318 case 0x51: /* LAE - load address extended */
3319 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3320 return -1;
3321 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3322 return -1;
3323 break;
3324
3325 /* 0x52 undefined */
3326 /* 0x53 undefined */
3327
3328 /* 0x61-0x66 undefined */
3329
3330 /* 0x72-0x77 undefined */
3331
3332 /* 0x80 privileged: SSM - set system mask */
3333 /* 0x81 undefined */
3334 /* 0x82 privileged: LPSW - load PSW */
3335 /* 0x83 privileged: diagnose */
3336
3337 case 0x8e: /* SRDA - shift right double */
3338 case 0x8f: /* SLDA - shift left double */
3339 /* 32-bit pair destination + flags */
3340 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3341 return -1;
3342 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3343 return -1;
3344 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3345 return -1;
3346 break;
3347
3348 case 0x90: /* STM - store multiple */
3349 case 0x9b: /* STAM - store access multiple */
3350 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3351 if (inib[2] <= inib[3])
3352 n = inib[3] - inib[2] + 1;
3353 else
3354 n = inib[3] + 0x10 - inib[2] + 1;
3355 if (record_full_arch_list_add_mem (oaddr, n * 4))
3356 return -1;
3357 break;
3358
3359 case 0x92: /* MVI - move */
3360 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3361 if (record_full_arch_list_add_mem (oaddr, 1))
3362 return -1;
3363 break;
3364
3365 case 0x93: /* TS - test and set */
3366 case 0x94: /* NI - and */
3367 case 0x96: /* OI - or */
3368 case 0x97: /* XI - xor */
3369 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3370 if (record_full_arch_list_add_mem (oaddr, 1))
3371 return -1;
3372 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3373 return -1;
3374 break;
3375
3376 case 0x98: /* LM - load multiple */
3377 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3378 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3379 return -1;
3380 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3381 return -1;
3382 break;
3383
3384 /* 0x99 privileged: TRACE */
3385
3386 case 0x9a: /* LAM - load access multiple */
3387 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3388 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3389 return -1;
3390 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3391 return -1;
3392 break;
3393
3394 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3395 /* 0xa0-0xa4 undefined */
3396
3397 case 0xa5:
3398 case 0xa7:
3399 /* RI-format instruction */
3400 switch (ibyte[0] << 4 | inib[3])
3401 {
3402 case 0xa50: /* IIHH - insert immediate */
3403 case 0xa51: /* IIHL - insert immediate */
3404 /* high 32-bit destination */
3405 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3406 return -1;
3407 break;
3408
3409 case 0xa52: /* IILH - insert immediate */
3410 case 0xa53: /* IILL - insert immediate */
3411 case 0xa75: /* BRAS - branch relative and save */
3412 case 0xa76: /* BRCT - branch relative on count */
3413 case 0xa78: /* LHI - load halfword immediate */
3414 case 0xa7c: /* MHI - multiply halfword immediate */
3415 /* 32-bit or native destination */
3416 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3417 return -1;
3418 break;
3419
3420 case 0xa54: /* NIHH - and immediate */
3421 case 0xa55: /* NIHL - and immediate */
3422 case 0xa58: /* OIHH - or immediate */
3423 case 0xa59: /* OIHL - or immediate */
3424 /* high 32-bit destination + flags */
3425 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3426 return -1;
3427 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3428 return -1;
3429 break;
3430
3431 case 0xa56: /* NILH - and immediate */
3432 case 0xa57: /* NILL - and immediate */
3433 case 0xa5a: /* OILH - or immediate */
3434 case 0xa5b: /* OILL - or immediate */
3435 case 0xa7a: /* AHI - add halfword immediate */
3436 /* 32-bit destination + flags */
3437 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3438 return -1;
3439 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3440 return -1;
3441 break;
3442
3443 case 0xa5c: /* LLIHH - load logical immediate */
3444 case 0xa5d: /* LLIHL - load logical immediate */
3445 case 0xa5e: /* LLILH - load logical immediate */
3446 case 0xa5f: /* LLILL - load logical immediate */
3447 case 0xa77: /* BRCTG - branch relative on count */
3448 case 0xa79: /* LGHI - load halfword immediate */
3449 case 0xa7d: /* MGHI - multiply halfword immediate */
3450 /* 64-bit destination */
3451 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3452 return -1;
3453 break;
3454
3455 case 0xa70: /* TMLH - test under mask */
3456 case 0xa71: /* TMLL - test under mask */
3457 case 0xa72: /* TMHH - test under mask */
3458 case 0xa73: /* TMHL - test under mask */
3459 case 0xa7e: /* CHI - compare halfword immediate */
3460 case 0xa7f: /* CGHI - compare halfword immediate */
3461 /* flags only */
3462 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3463 return -1;
3464 break;
3465
3466 case 0xa74: /* BRC - branch relative on condition */
3467 /* no register change */
3468 break;
3469
3470 case 0xa7b: /* AGHI - add halfword immediate */
3471 /* 64-bit destination + flags */
3472 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3473 return -1;
3474 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3475 return -1;
3476 break;
3477
3478 default:
3479 goto UNKNOWN_OP;
3480 }
3481 break;
3482
3483 /* 0xa6 undefined */
3484
3485 case 0xa8: /* MVCLE - move long extended [partial] */
3486 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3487 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3488 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3489 if (record_full_arch_list_add_mem (oaddr, tmp))
3490 return -1;
3491 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3492 return -1;
3493 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3494 return -1;
3495 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3496 return -1;
3497 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3498 return -1;
3499 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3500 return -1;
3501 break;
3502
3503 /* 0xaa-0xab undefined */
3504 /* 0xac privileged: STNSM - store then and system mask */
3505 /* 0xad privileged: STOSM - store then or system mask */
3506 /* 0xae privileged: SIGP - signal processor */
3507 /* 0xaf unsupported: MC - monitor call */
3508 /* 0xb0 undefined */
3509 /* 0xb1 privileged: LRA - load real address */
3510
3511 case 0xb2:
3512 case 0xb3:
3513 case 0xb9:
3514 /* S/RRD/RRE/RRF/IE-format instruction */
3515 switch (insn[0])
3516 {
3517 /* 0xb200-0xb204 undefined or privileged */
3518
3519 case 0xb205: /* STCK - store clock */
3520 case 0xb27c: /* STCKF - store clock fast */
3521 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3522 if (record_full_arch_list_add_mem (oaddr, 8))
3523 return -1;
3524 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3525 return -1;
3526 break;
3527
3528 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3529 /* 0xb21a unsupported: CFC */
3530 /* 0xb21b-0xb221 undefined or privileged */
3531
3532 case 0xb222: /* IPM - insert program mask */
3533 case 0xb24f: /* EAR - extract access */
3534 case 0xb252: /* MSR - multiply single */
3535 case 0xb2ec: /* ETND - extract transaction nesting depth */
3536 case 0xb38c: /* EFPC - extract fpc */
3537 case 0xb91f: /* LRVR - load reversed */
3538 case 0xb926: /* LBR - load byte */
3539 case 0xb927: /* LHR - load halfword */
3540 case 0xb994: /* LLCR - load logical character */
3541 case 0xb995: /* LLHR - load logical halfword */
3542 case 0xb9f2: /* LOCR - load on condition */
3543 /* 32-bit gpr destination */
3544 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3545 return -1;
3546 break;
3547
3548 /* 0xb223-0xb22c privileged or unsupported */
3549
3550 case 0xb22d: /* DXR - divide */
3551 case 0xb325: /* LXDR - load lengthened */
3552 case 0xb326: /* LXER - load lengthened */
3553 case 0xb336: /* SQXR - square root */
3554 case 0xb365: /* LXR - load */
3555 case 0xb367: /* FIXR - load fp integer */
3556 case 0xb376: /* LZXR - load zero */
3557 case 0xb3b6: /* CXFR - convert from fixed */
3558 case 0xb3c6: /* CXGR - convert from fixed */
3559 case 0xb3fe: /* IEXTR - insert biased exponent */
3560 /* float pair destination */
3561 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3562 return -1;
3563 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3564 return -1;
3565 break;
3566
3567 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3568
3569 case 0xb241: /* CKSM - checksum [partial] */
3570 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3571 return -1;
3572 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3573 return -1;
3574 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3575 return -1;
3576 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3577 return -1;
3578 break;
3579
3580 /* 0xb242-0xb243 undefined */
3581
3582 case 0xb244: /* SQDR - square root */
3583 case 0xb245: /* SQER - square root */
3584 case 0xb324: /* LDER - load lengthened */
3585 case 0xb337: /* MEER - multiply */
3586 case 0xb366: /* LEXR - load rounded */
3587 case 0xb370: /* LPDFR - load positive */
3588 case 0xb371: /* LNDFR - load negative */
3589 case 0xb372: /* CSDFR - copy sign */
3590 case 0xb373: /* LCDFR - load complement */
3591 case 0xb374: /* LZER - load zero */
3592 case 0xb375: /* LZDR - load zero */
3593 case 0xb377: /* FIER - load fp integer */
3594 case 0xb37f: /* FIDR - load fp integer */
3595 case 0xb3b4: /* CEFR - convert from fixed */
3596 case 0xb3b5: /* CDFR - convert from fixed */
3597 case 0xb3c1: /* LDGR - load fpr from gr */
3598 case 0xb3c4: /* CEGR - convert from fixed */
3599 case 0xb3c5: /* CDGR - convert from fixed */
3600 case 0xb3f6: /* IEDTR - insert biased exponent */
3601 /* float destination */
3602 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3603 return -1;
3604 break;
3605
3606 /* 0xb246-0xb24c: privileged or unsupported */
3607
3608 case 0xb24d: /* CPYA - copy access */
3609 case 0xb24e: /* SAR - set access */
3610 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3611 return -1;
3612 break;
3613
3614 /* 0xb250-0xb251 undefined or privileged */
3615 /* 0xb253-0xb254 undefined or privileged */
3616
3617 case 0xb255: /* MVST - move string [partial] */
3618 {
3619 uint8_t end;
3620 gdb_byte cur;
3621 ULONGEST num = 0;
3622 /* Read ending byte. */
3623 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3624 end = tmp & 0xff;
3625 /* Get address of second operand. */
3626 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3627 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3628 /* Search for ending byte and compute length. */
3629 do {
3630 num++;
3631 if (target_read_memory (oaddr, &cur, 1))
3632 return -1;
3633 oaddr++;
3634 } while (cur != end);
3635 /* Get address of first operand and record it. */
3636 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3637 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3638 if (record_full_arch_list_add_mem (oaddr, num))
3639 return -1;
3640 /* Record the registers. */
3641 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3642 return -1;
3643 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3644 return -1;
3645 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3646 return -1;
3647 }
3648 break;
3649
3650 /* 0xb256 undefined */
3651
3652 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3653 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3654 return -1;
3655 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3656 return -1;
3657 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3658 return -1;
3659 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3660 return -1;
3661 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3662 return -1;
3663 break;
3664
3665 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3666
3667 case 0xb25d: /* CLST - compare logical string [partial] */
3668 case 0xb25e: /* SRST - search string [partial] */
3669 case 0xb9be: /* SRSTU - search string unicode [partial] */
3670 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3671 return -1;
3672 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3673 return -1;
3674 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3675 return -1;
3676 break;
3677
3678 /* 0xb25f-0xb262 undefined */
3679
3680 case 0xb263: /* CMPSC - compression call [interruptible] */
3681 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3682 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3683 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3684 if (record_full_arch_list_add_mem (oaddr, tmp))
3685 return -1;
3686 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3687 return -1;
3688 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3689 return -1;
3690 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3691 return -1;
3692 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3693 return -1;
3694 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3695 return -1;
3696 /* DXC may be written */
3697 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3698 return -1;
3699 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3700 return -1;
3701 break;
3702
3703 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3704
3705 case 0xb278: /* STCKE - store clock extended */
3706 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3707 if (record_full_arch_list_add_mem (oaddr, 16))
3708 return -1;
3709 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3710 return -1;
3711 break;
3712
3713 /* 0xb279-0xb27b undefined or unsupported */
3714 /* 0xb27d-0xb298 undefined or privileged */
3715
3716 case 0xb299: /* SRNM - set rounding mode */
3717 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3718 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3719 case 0xb29d: /* LFPC - load fpc */
3720 case 0xb2bd: /* LFAS - load fpc and signal */
3721 case 0xb384: /* SFPC - set fpc */
3722 case 0xb385: /* SFASR - set fpc and signal */
3723 case 0xb960: /* CGRT - compare and trap */
3724 case 0xb961: /* CLGRT - compare logical and trap */
3725 case 0xb972: /* CRT - compare and trap */
3726 case 0xb973: /* CLRT - compare logical and trap */
3727 /* fpc only - including possible DXC write for trapping insns */
3728 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3729 return -1;
3730 break;
3731
3732 /* 0xb29a-0xb29b undefined */
3733
3734 case 0xb29c: /* STFPC - store fpc */
3735 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3736 if (record_full_arch_list_add_mem (oaddr, 4))
3737 return -1;
3738 break;
3739
3740 /* 0xb29e-0xb2a4 undefined */
3741
3742 case 0xb2a5: /* TRE - translate extended [partial] */
3743 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3744 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3745 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3746 if (record_full_arch_list_add_mem (oaddr, tmp))
3747 return -1;
3748 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3749 return -1;
3750 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3751 return -1;
3752 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3753 return -1;
3754 break;
3755
3756 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3757 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3758 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3759 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3760 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3761 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3762 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3763 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3764 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3765 if (record_full_arch_list_add_mem (oaddr, tmp))
3766 return -1;
3767 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3768 return -1;
3769 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3770 return -1;
3771 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3772 return -1;
3773 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3774 return -1;
3775 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3776 return -1;
3777 break;
3778
3779 /* 0xb2a8-0xb2af undefined */
3780
3781 case 0xb2b0: /* STFLE - store facility list extended */
3782 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3783 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3784 tmp &= 0xff;
3785 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3786 return -1;
3787 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3788 return -1;
3789 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3790 return -1;
3791 break;
3792
3793 /* 0xb2b1-0xb2b7 undefined or privileged */
3794 /* 0xb2ba-0xb2bc undefined */
3795 /* 0xb2be-0xb2e7 undefined */
3796 /* 0xb2e9-0xb2eb undefined */
3797 /* 0xb2ed-0xb2f7 undefined */
3798 /* 0xb2f8 unsupported: TEND */
3799 /* 0xb2f9 undefined */
3800
3801 case 0xb2e8: /* PPA - perform processor assist */
3802 case 0xb2fa: /* NIAI - next instruction access intent */
3803 /* no visible effects */
3804 break;
3805
3806 /* 0xb2fb undefined */
3807 /* 0xb2fc unsupported: TABORT */
3808 /* 0xb2fd-0xb2fe undefined */
3809 /* 0xb2ff unsupported: TRAP */
3810
3811 case 0xb300: /* LPEBR - load positive */
3812 case 0xb301: /* LNEBR - load negative */
3813 case 0xb303: /* LCEBR - load complement */
3814 case 0xb310: /* LPDBR - load positive */
3815 case 0xb311: /* LNDBR - load negative */
3816 case 0xb313: /* LCDBR - load complement */
3817 case 0xb350: /* TBEDR - convert hfp to bfp */
3818 case 0xb351: /* TBDR - convert hfp to bfp */
3819 case 0xb358: /* THDER - convert bfp to hfp */
3820 case 0xb359: /* THDR - convert bfp to hfp */
3821 /* float destination + flags */
3822 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3823 return -1;
3824 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3825 return -1;
3826 break;
3827
3828 case 0xb304: /* LDEBR - load lengthened */
3829 case 0xb30c: /* MDEBR - multiply */
3830 case 0xb30d: /* DEBR - divide */
3831 case 0xb314: /* SQEBR - square root */
3832 case 0xb315: /* SQDBR - square root */
3833 case 0xb317: /* MEEBR - multiply */
3834 case 0xb31c: /* MDBR - multiply */
3835 case 0xb31d: /* DDBR - divide */
3836 case 0xb344: /* LEDBRA - load rounded */
3837 case 0xb345: /* LDXBRA - load rounded */
3838 case 0xb346: /* LEXBRA - load rounded */
3839 case 0xb357: /* FIEBRA - load fp integer */
3840 case 0xb35f: /* FIDBRA - load fp integer */
3841 case 0xb390: /* CELFBR - convert from logical */
3842 case 0xb391: /* CDLFBR - convert from logical */
3843 case 0xb394: /* CEFBR - convert from fixed */
3844 case 0xb395: /* CDFBR - convert from fixed */
3845 case 0xb3a0: /* CELGBR - convert from logical */
3846 case 0xb3a1: /* CDLGBR - convert from logical */
3847 case 0xb3a4: /* CEGBR - convert from fixed */
3848 case 0xb3a5: /* CDGBR - convert from fixed */
3849 case 0xb3d0: /* MDTR - multiply */
3850 case 0xb3d1: /* DDTR - divide */
3851 case 0xb3d4: /* LDETR - load lengthened */
3852 case 0xb3d5: /* LEDTR - load lengthened */
3853 case 0xb3d7: /* FIDTR - load fp integer */
3854 case 0xb3dd: /* LDXTR - load lengthened */
3855 case 0xb3f1: /* CDGTR - convert from fixed */
3856 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3857 case 0xb3f3: /* CDSTR - convert from signed packed */
3858 case 0xb3f5: /* QADTR - quantize */
3859 case 0xb3f7: /* RRDTR - reround */
3860 case 0xb951: /* CDFTR - convert from fixed */
3861 case 0xb952: /* CDLGTR - convert from logical */
3862 case 0xb953: /* CDLFTR - convert from logical */
3863 /* float destination + fpc */
3864 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3865 return -1;
3866 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3867 return -1;
3868 break;
3869
3870 case 0xb305: /* LXDBR - load lengthened */
3871 case 0xb306: /* LXEBR - load lengthened */
3872 case 0xb307: /* MXDBR - multiply */
3873 case 0xb316: /* SQXBR - square root */
3874 case 0xb34c: /* MXBR - multiply */
3875 case 0xb34d: /* DXBR - divide */
3876 case 0xb347: /* FIXBRA - load fp integer */
3877 case 0xb392: /* CXLFBR - convert from logical */
3878 case 0xb396: /* CXFBR - convert from fixed */
3879 case 0xb3a2: /* CXLGBR - convert from logical */
3880 case 0xb3a6: /* CXGBR - convert from fixed */
3881 case 0xb3d8: /* MXTR - multiply */
3882 case 0xb3d9: /* DXTR - divide */
3883 case 0xb3dc: /* LXDTR - load lengthened */
3884 case 0xb3df: /* FIXTR - load fp integer */
3885 case 0xb3f9: /* CXGTR - convert from fixed */
3886 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3887 case 0xb3fb: /* CXSTR - convert from signed packed */
3888 case 0xb3fd: /* QAXTR - quantize */
3889 case 0xb3ff: /* RRXTR - reround */
3890 case 0xb959: /* CXFTR - convert from fixed */
3891 case 0xb95a: /* CXLGTR - convert from logical */
3892 case 0xb95b: /* CXLFTR - convert from logical */
3893 /* float pair destination + fpc */
3894 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3895 return -1;
3896 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3897 return -1;
3898 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3899 return -1;
3900 break;
3901
3902 case 0xb308: /* KEBR - compare and signal */
3903 case 0xb309: /* CEBR - compare */
3904 case 0xb318: /* KDBR - compare and signal */
3905 case 0xb319: /* CDBR - compare */
3906 case 0xb348: /* KXBR - compare and signal */
3907 case 0xb349: /* CXBR - compare */
3908 case 0xb3e0: /* KDTR - compare and signal */
3909 case 0xb3e4: /* CDTR - compare */
3910 case 0xb3e8: /* KXTR - compare and signal */
3911 case 0xb3ec: /* CXTR - compare */
3912 /* flags + fpc only */
3913 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3914 return -1;
3915 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3916 return -1;
3917 break;
3918
3919 case 0xb302: /* LTEBR - load and test */
3920 case 0xb312: /* LTDBR - load and test */
3921 case 0xb30a: /* AEBR - add */
3922 case 0xb30b: /* SEBR - subtract */
3923 case 0xb31a: /* ADBR - add */
3924 case 0xb31b: /* SDBR - subtract */
3925 case 0xb3d2: /* ADTR - add */
3926 case 0xb3d3: /* SDTR - subtract */
3927 case 0xb3d6: /* LTDTR - load and test */
3928 /* float destination + flags + fpc */
3929 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3930 return -1;
3931 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3932 return -1;
3933 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3934 return -1;
3935 break;
3936
3937 case 0xb30e: /* MAEBR - multiply and add */
3938 case 0xb30f: /* MSEBR - multiply and subtract */
3939 case 0xb31e: /* MADBR - multiply and add */
3940 case 0xb31f: /* MSDBR - multiply and subtract */
3941 /* float destination [RRD] + fpc */
3942 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3943 return -1;
3944 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3945 return -1;
3946 break;
3947
3948 /* 0xb320-0xb323 undefined */
3949 /* 0xb327-0xb32d undefined */
3950
3951 case 0xb32e: /* MAER - multiply and add */
3952 case 0xb32f: /* MSER - multiply and subtract */
3953 case 0xb338: /* MAYLR - multiply and add unnormalized */
3954 case 0xb339: /* MYLR - multiply unnormalized */
3955 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3956 case 0xb33d: /* MYHR - multiply unnormalized */
3957 case 0xb33e: /* MADR - multiply and add */
3958 case 0xb33f: /* MSDR - multiply and subtract */
3959 /* float destination [RRD] */
3960 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3961 return -1;
3962 break;
3963
3964 /* 0xb330-0xb335 undefined */
3965
3966 case 0xb33a: /* MAYR - multiply and add unnormalized */
3967 case 0xb33b: /* MYR - multiply unnormalized */
3968 /* float pair destination [RRD] */
3969 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3970 return -1;
3971 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
3972 return -1;
3973 break;
3974
3975 case 0xb340: /* LPXBR - load positive */
3976 case 0xb341: /* LNXBR - load negative */
3977 case 0xb343: /* LCXBR - load complement */
3978 case 0xb360: /* LPXR - load positive */
3979 case 0xb361: /* LNXR - load negative */
3980 case 0xb362: /* LTXR - load and test */
3981 case 0xb363: /* LCXR - load complement */
3982 /* float pair destination + flags */
3983 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3984 return -1;
3985 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3986 return -1;
3987 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3988 return -1;
3989 break;
3990
3991 case 0xb342: /* LTXBR - load and test */
3992 case 0xb34a: /* AXBR - add */
3993 case 0xb34b: /* SXBR - subtract */
3994 case 0xb3da: /* AXTR - add */
3995 case 0xb3db: /* SXTR - subtract */
3996 case 0xb3de: /* LTXTR - load and test */
3997 /* float pair destination + flags + fpc */
3998 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3999 return -1;
4000 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4001 return -1;
4002 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4003 return -1;
4004 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4005 return -1;
4006 break;
4007
4008 /* 0xb34e-0xb34f undefined */
4009 /* 0xb352 undefined */
4010
4011 case 0xb353: /* DIEBR - divide to integer */
4012 case 0xb35b: /* DIDBR - divide to integer */
4013 /* two float destinations + flags + fpc */
4014 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4015 return -1;
4016 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4017 return -1;
4018 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4019 return -1;
4020 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4021 return -1;
4022 break;
4023
4024 /* 0xb354-0xb356 undefined */
4025 /* 0xb35a undefined */
4026
4027 /* 0xb35c-0xb35e undefined */
4028 /* 0xb364 undefined */
4029 /* 0xb368 undefined */
4030
4031 case 0xb369: /* CXR - compare */
4032 case 0xb3f4: /* CEDTR - compare biased exponent */
4033 case 0xb3fc: /* CEXTR - compare biased exponent */
4034 case 0xb920: /* CGR - compare */
4035 case 0xb921: /* CLGR - compare logical */
4036 case 0xb930: /* CGFR - compare */
4037 case 0xb931: /* CLGFR - compare logical */
4038 case 0xb9cd: /* CHHR - compare high */
4039 case 0xb9cf: /* CLHHR - compare logical high */
4040 case 0xb9dd: /* CHLR - compare high */
4041 case 0xb9df: /* CLHLR - compare logical high */
4042 /* flags only */
4043 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4044 return -1;
4045 break;
4046
4047 /* 0xb36a-0xb36f undefined */
4048 /* 0xb377-0xb37e undefined */
4049 /* 0xb380-0xb383 undefined */
4050 /* 0xb386-0xb38b undefined */
4051 /* 0xb38d-0xb38f undefined */
4052 /* 0xb393 undefined */
4053 /* 0xb397 undefined */
4054
4055 case 0xb398: /* CFEBR - convert to fixed */
4056 case 0xb399: /* CFDBR - convert to fixed */
4057 case 0xb39a: /* CFXBR - convert to fixed */
4058 case 0xb39c: /* CLFEBR - convert to logical */
4059 case 0xb39d: /* CLFDBR - convert to logical */
4060 case 0xb39e: /* CLFXBR - convert to logical */
4061 case 0xb941: /* CFDTR - convert to fixed */
4062 case 0xb949: /* CFXTR - convert to fixed */
4063 case 0xb943: /* CLFDTR - convert to logical */
4064 case 0xb94b: /* CLFXTR - convert to logical */
4065 /* 32-bit gpr destination + flags + fpc */
4066 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4067 return -1;
4068 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4069 return -1;
4070 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4071 return -1;
4072 break;
4073
4074 /* 0xb39b undefined */
4075 /* 0xb39f undefined */
4076
4077 /* 0xb3a3 undefined */
4078 /* 0xb3a7 undefined */
4079
4080 case 0xb3a8: /* CGEBR - convert to fixed */
4081 case 0xb3a9: /* CGDBR - convert to fixed */
4082 case 0xb3aa: /* CGXBR - convert to fixed */
4083 case 0xb3ac: /* CLGEBR - convert to logical */
4084 case 0xb3ad: /* CLGDBR - convert to logical */
4085 case 0xb3ae: /* CLGXBR - convert to logical */
4086 case 0xb3e1: /* CGDTR - convert to fixed */
4087 case 0xb3e9: /* CGXTR - convert to fixed */
4088 case 0xb942: /* CLGDTR - convert to logical */
4089 case 0xb94a: /* CLGXTR - convert to logical */
4090 /* 64-bit gpr destination + flags + fpc */
4091 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4092 return -1;
4093 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4094 return -1;
4095 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4096 return -1;
4097 break;
4098
4099 /* 0xb3ab undefined */
4100 /* 0xb3af-0xb3b3 undefined */
4101 /* 0xb3b7 undefined */
4102
4103 case 0xb3b8: /* CFER - convert to fixed */
4104 case 0xb3b9: /* CFDR - convert to fixed */
4105 case 0xb3ba: /* CFXR - convert to fixed */
4106 case 0xb998: /* ALCR - add logical with carry */
4107 case 0xb999: /* SLBR - subtract logical with borrow */
4108 case 0xb9f4: /* NRK - and */
4109 case 0xb9f6: /* ORK - or */
4110 case 0xb9f7: /* XRK - xor */
4111 case 0xb9f8: /* ARK - add */
4112 case 0xb9f9: /* SRK - subtract */
4113 case 0xb9fa: /* ALRK - add logical */
4114 case 0xb9fb: /* SLRK - subtract logical */
4115 /* 32-bit gpr destination + flags */
4116 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4117 return -1;
4118 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4119 return -1;
4120 break;
4121
4122 case 0xb3c8: /* CGER - convert to fixed */
4123 case 0xb3c9: /* CGDR - convert to fixed */
4124 case 0xb3ca: /* CGXR - convert to fixed */
4125 case 0xb900: /* LPGR - load positive */
4126 case 0xb901: /* LNGR - load negative */
4127 case 0xb902: /* LTGR - load and test */
4128 case 0xb903: /* LCGR - load complement */
4129 case 0xb908: /* AGR - add */
4130 case 0xb909: /* SGR - subtract */
4131 case 0xb90a: /* ALGR - add logical */
4132 case 0xb90b: /* SLGR - subtract logical */
4133 case 0xb910: /* LPGFR - load positive */
4134 case 0xb911: /* LNGFR - load negative */
4135 case 0xb912: /* LTGFR - load and test */
4136 case 0xb913: /* LCGFR - load complement */
4137 case 0xb918: /* AGFR - add */
4138 case 0xb919: /* SGFR - subtract */
4139 case 0xb91a: /* ALGFR - add logical */
4140 case 0xb91b: /* SLGFR - subtract logical */
4141 case 0xb980: /* NGR - and */
4142 case 0xb981: /* OGR - or */
4143 case 0xb982: /* XGR - xor */
4144 case 0xb988: /* ALCGR - add logical with carry */
4145 case 0xb989: /* SLBGR - subtract logical with borrow */
4146 case 0xb9e1: /* POPCNT - population count */
4147 case 0xb9e4: /* NGRK - and */
4148 case 0xb9e6: /* OGRK - or */
4149 case 0xb9e7: /* XGRK - xor */
4150 case 0xb9e8: /* AGRK - add */
4151 case 0xb9e9: /* SGRK - subtract */
4152 case 0xb9ea: /* ALGRK - add logical */
4153 case 0xb9eb: /* SLGRK - subtract logical */
4154 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4155 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4156 /* 64-bit gpr destination + flags */
4157 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4158 return -1;
4159 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4160 return -1;
4161 break;
4162
4163 /* 0xb3bb-0xb3c0 undefined */
4164 /* 0xb3c2-0xb3c3 undefined */
4165 /* 0xb3c7 undefined */
4166 /* 0xb3cb-0xb3cc undefined */
4167
4168 case 0xb3cd: /* LGDR - load gr from fpr */
4169 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4170 case 0xb3e3: /* CSDTR - convert to signed packed */
4171 case 0xb3e5: /* EEDTR - extract biased exponent */
4172 case 0xb3e7: /* ESDTR - extract significance */
4173 case 0xb3ed: /* EEXTR - extract biased exponent */
4174 case 0xb3ef: /* ESXTR - extract significance */
4175 case 0xb904: /* LGR - load */
4176 case 0xb906: /* LGBR - load byte */
4177 case 0xb907: /* LGHR - load halfword */
4178 case 0xb90c: /* MSGR - multiply single */
4179 case 0xb90f: /* LRVGR - load reversed */
4180 case 0xb914: /* LGFR - load */
4181 case 0xb916: /* LLGFR - load logical */
4182 case 0xb917: /* LLGTR - load logical thirty one bits */
4183 case 0xb91c: /* MSGFR - multiply single 64<32 */
4184 case 0xb946: /* BCTGR - branch on count */
4185 case 0xb984: /* LLGCR - load logical character */
4186 case 0xb985: /* LLGHR - load logical halfword */
4187 case 0xb9e2: /* LOCGR - load on condition */
4188 /* 64-bit gpr destination */
4189 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4190 return -1;
4191 break;
4192
4193 /* 0xb3ce-0xb3cf undefined */
4194 /* 0xb3e6 undefined */
4195
4196 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4197 case 0xb3eb: /* CSXTR - convert to signed packed */
4198 case 0xb90d: /* DSGR - divide single */
4199 case 0xb91d: /* DSGFR - divide single */
4200 case 0xb986: /* MLGR - multiply logical */
4201 case 0xb987: /* DLGR - divide logical */
4202 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4203 /* 64-bit gpr pair destination */
4204 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4205 return -1;
4206 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4207 return -1;
4208 break;
4209
4210 /* 0xb3ee undefined */
4211 /* 0xb3f0 undefined */
4212 /* 0xb3f8 undefined */
4213
4214 /* 0xb905 privileged */
4215
4216 /* 0xb90e unsupported: EREGG */
4217
4218 /* 0xb915 undefined */
4219
4220 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4221 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4222 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4223 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4224 tmp &= 0xff;
4225 switch (tmp)
4226 {
4227 case 0x00: /* KMAC-Query */
4228 if (record_full_arch_list_add_mem (oaddr, 16))
4229 return -1;
4230 break;
4231
4232 case 0x01: /* KMAC-DEA */
4233 case 0x02: /* KMAC-TDEA-128 */
4234 case 0x03: /* KMAC-TDEA-192 */
4235 case 0x09: /* KMAC-Encrypted-DEA */
4236 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4237 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4238 if (record_full_arch_list_add_mem (oaddr, 8))
4239 return -1;
4240 break;
4241
4242 case 0x12: /* KMAC-AES-128 */
4243 case 0x13: /* KMAC-AES-192 */
4244 case 0x14: /* KMAC-AES-256 */
4245 case 0x1a: /* KMAC-Encrypted-AES-128 */
4246 case 0x1b: /* KMAC-Encrypted-AES-192 */
4247 case 0x1c: /* KMAC-Encrypted-AES-256 */
4248 if (record_full_arch_list_add_mem (oaddr, 16))
4249 return -1;
4250 break;
4251
4252 default:
4253 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4254 (int)tmp, paddress (gdbarch, addr));
4255 return -1;
4256 }
4257 if (tmp != 0)
4258 {
4259 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4260 return -1;
4261 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4262 return -1;
4263 }
4264 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4265 return -1;
4266 break;
4267
4268 /* 0xb922-0xb924 undefined */
4269 /* 0xb925 privileged */
4270 /* 0xb928 privileged */
4271
4272 case 0xb929: /* KMA - cipher message with authentication */
4273 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4274 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4275 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4276 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4277 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4278 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4279 tmp &= 0x7f;
4280 switch (tmp)
4281 {
4282 case 0x00: /* KM*-Query */
4283 if (record_full_arch_list_add_mem (oaddr, 16))
4284 return -1;
4285 break;
4286
4287 case 0x01: /* KM*-DEA */
4288 case 0x02: /* KM*-TDEA-128 */
4289 case 0x03: /* KM*-TDEA-192 */
4290 case 0x09: /* KM*-Encrypted-DEA */
4291 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4292 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4293 if (record_full_arch_list_add_mem (oaddr, 8))
4294 return -1;
4295 break;
4296
4297 case 0x12: /* KM*-AES-128 */
4298 case 0x13: /* KM*-AES-192 */
4299 case 0x14: /* KM*-AES-256 */
4300 case 0x1a: /* KM*-Encrypted-AES-128 */
4301 case 0x1b: /* KM*-Encrypted-AES-192 */
4302 case 0x1c: /* KM*-Encrypted-AES-256 */
4303 if (record_full_arch_list_add_mem (oaddr, 16))
4304 return -1;
4305 break;
4306
4307 case 0x43: /* KMC-PRNG */
4308 /* Only valid for KMC. */
4309 if (insn[0] == 0xb92f)
4310 {
4311 if (record_full_arch_list_add_mem (oaddr, 8))
4312 return -1;
4313 break;
4314 }
4315 /* For other instructions... */
4316 /* Fall through. */
4317 default:
4318 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4319 (int)tmp, paddress (gdbarch, addr));
4320 return -1;
4321 }
4322 if (tmp != 0)
4323 {
4324 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4325 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4326 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4327 if (record_full_arch_list_add_mem (oaddr2, tmp))
4328 return -1;
4329 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4330 return -1;
4331 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4332 return -1;
4333 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4334 return -1;
4335 }
4336 if (tmp != 0 && insn[0] == 0xb929)
4337 {
4338 if (record_full_arch_list_add_reg (regcache,
4339 S390_R0_REGNUM + inib[4]))
4340 return -1;
4341 if (record_full_arch_list_add_reg (regcache,
4342 S390_R0_REGNUM + (inib[4] | 1)))
4343 return -1;
4344 }
4345 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4346 return -1;
4347 break;
4348
4349 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4350 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4351 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4352 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4353 tmp &= 0x7f;
4354 switch (tmp)
4355 {
4356 case 0x00: /* PCC-Query */
4357 if (record_full_arch_list_add_mem (oaddr, 16))
4358 return -1;
4359 break;
4360
4361 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4362 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4363 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4364 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4365 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4366 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4367 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4368 return -1;
4369 break;
4370
4371 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4372 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4373 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4374 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4375 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4376 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4377 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4378 return -1;
4379 break;
4380
4381 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4382 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4383 return -1;
4384 break;
4385
4386 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4387 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4388 return -1;
4389 break;
4390
4391 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4392 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4393 return -1;
4394 break;
4395
4396 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4397 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4398 return -1;
4399 break;
4400
4401 default:
4402 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4403 (int)tmp, paddress (gdbarch, addr));
4404 return -1;
4405 }
4406 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4407 return -1;
4408 break;
4409
4410 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4411 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4412 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4413 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4414 tmp &= 0x7f;
4415 switch (tmp)
4416 {
4417 case 0x00: /* KMCTR-Query */
4418 if (record_full_arch_list_add_mem (oaddr, 16))
4419 return -1;
4420 break;
4421
4422 case 0x01: /* KMCTR-DEA */
4423 case 0x02: /* KMCTR-TDEA-128 */
4424 case 0x03: /* KMCTR-TDEA-192 */
4425 case 0x09: /* KMCTR-Encrypted-DEA */
4426 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4427 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4428 case 0x12: /* KMCTR-AES-128 */
4429 case 0x13: /* KMCTR-AES-192 */
4430 case 0x14: /* KMCTR-AES-256 */
4431 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4432 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4433 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4434 break;
4435
4436 default:
4437 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4438 (int)tmp, paddress (gdbarch, addr));
4439 return -1;
4440 }
4441 if (tmp != 0)
4442 {
4443 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4444 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4445 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4446 if (record_full_arch_list_add_mem (oaddr2, tmp))
4447 return -1;
4448 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4449 return -1;
4450 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4451 return -1;
4452 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4453 return -1;
4454 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4455 return -1;
4456 }
4457 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4458 return -1;
4459 break;
4460
4461 case 0xb92e: /* KM - cipher message [partial] */
4462 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4463 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4464 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4465 tmp &= 0x7f;
4466 switch (tmp)
4467 {
4468 case 0x00: /* KM-Query */
4469 if (record_full_arch_list_add_mem (oaddr, 16))
4470 return -1;
4471 break;
4472
4473 case 0x01: /* KM-DEA */
4474 case 0x02: /* KM-TDEA-128 */
4475 case 0x03: /* KM-TDEA-192 */
4476 case 0x09: /* KM-Encrypted-DEA */
4477 case 0x0a: /* KM-Encrypted-TDEA-128 */
4478 case 0x0b: /* KM-Encrypted-TDEA-192 */
4479 case 0x12: /* KM-AES-128 */
4480 case 0x13: /* KM-AES-192 */
4481 case 0x14: /* KM-AES-256 */
4482 case 0x1a: /* KM-Encrypted-AES-128 */
4483 case 0x1b: /* KM-Encrypted-AES-192 */
4484 case 0x1c: /* KM-Encrypted-AES-256 */
4485 break;
4486
4487 case 0x32: /* KM-XTS-AES-128 */
4488 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4489 return -1;
4490 break;
4491
4492 case 0x34: /* KM-XTS-AES-256 */
4493 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4494 return -1;
4495 break;
4496
4497 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4498 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4499 return -1;
4500 break;
4501
4502 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4503 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4504 return -1;
4505 break;
4506
4507 default:
4508 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4509 (int)tmp, paddress (gdbarch, addr));
4510 return -1;
4511 }
4512 if (tmp != 0)
4513 {
4514 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4515 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4516 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4517 if (record_full_arch_list_add_mem (oaddr2, tmp))
4518 return -1;
4519 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4520 return -1;
4521 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4522 return -1;
4523 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4524 return -1;
4525 }
4526 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4527 return -1;
4528 break;
4529
4530 /* 0xb932-0xb93b undefined */
4531
4532 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4533 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4534 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4535 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4536 tmp &= 0xff;
4537 switch (tmp)
4538 {
4539 case 0x00: /* PPNO-Query */
4540 case 0x80: /* PPNO-Query */
4541 if (record_full_arch_list_add_mem (oaddr, 16))
4542 return -1;
4543 break;
4544
4545 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4546 if (record_full_arch_list_add_mem (oaddr, 240))
4547 return -1;
4548 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4549 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4550 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4551 if (record_full_arch_list_add_mem (oaddr2, tmp))
4552 return -1;
4553 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4554 return -1;
4555 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4556 return -1;
4557 break;
4558
4559 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4560 if (record_full_arch_list_add_mem (oaddr, 240))
4561 return -1;
4562 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4563 return -1;
4564 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4565 return -1;
4566 break;
4567
4568 default:
4569 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4570 (int)tmp, paddress (gdbarch, addr));
4571 return -1;
4572 }
4573 /* DXC may be written */
4574 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4575 return -1;
4576 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4577 return -1;
4578 break;
4579
4580 /* 0xb93d undefined */
4581
4582 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4583 case 0xb93f: /* KLMD - compute last message digest [partial] */
4584 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4585 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4586 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4587 tmp &= 0xff;
4588 switch (tmp)
4589 {
4590 case 0x00: /* K*MD-Query */
4591 if (record_full_arch_list_add_mem (oaddr, 16))
4592 return -1;
4593 break;
4594
4595 case 0x01: /* K*MD-SHA-1 */
4596 if (record_full_arch_list_add_mem (oaddr, 20))
4597 return -1;
4598 break;
4599
4600 case 0x02: /* K*MD-SHA-256 */
4601 if (record_full_arch_list_add_mem (oaddr, 32))
4602 return -1;
4603 break;
4604
4605 case 0x03: /* K*MD-SHA-512 */
4606 if (record_full_arch_list_add_mem (oaddr, 64))
4607 return -1;
4608 break;
4609
4610 case 0x41: /* KIMD-GHASH */
4611 /* Only valid for KIMD. */
4612 if (insn[0] == 0xb93e)
4613 {
4614 if (record_full_arch_list_add_mem (oaddr, 16))
4615 return -1;
4616 break;
4617 }
4618 /* For KLMD... */
4619 /* Fall through. */
4620 default:
4621 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4622 (int)tmp, paddress (gdbarch, addr));
4623 return -1;
4624 }
4625 if (tmp != 0)
4626 {
4627 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4628 return -1;
4629 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4630 return -1;
4631 }
4632 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4633 return -1;
4634 break;
4635
4636 /* 0xb940 undefined */
4637 /* 0xb944-0xb945 undefined */
4638 /* 0xb947-0xb948 undefined */
4639 /* 0xb94c-0xb950 undefined */
4640 /* 0xb954-0xb958 undefined */
4641 /* 0xb95c-0xb95f undefined */
4642 /* 0xb962-0xb971 undefined */
4643 /* 0xb974-0xb97f undefined */
4644
4645 case 0xb983: /* FLOGR - find leftmost one */
4646 /* 64-bit gpr pair destination + flags */
4647 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4648 return -1;
4649 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4650 return -1;
4651 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4652 return -1;
4653 break;
4654
4655 /* 0xb98a privileged */
4656 /* 0xb98b-0xb98c undefined */
4657
4658 case 0xb98d: /* EPSW - extract psw */
4659 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4660 return -1;
4661 if (inib[7])
4662 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4663 return -1;
4664 break;
4665
4666 /* 0xb98e-0xb98f privileged */
4667
4668 case 0xb990: /* TRTT - translate two to two [partial] */
4669 case 0xb991: /* TRTO - translate two to one [partial] */
4670 case 0xb992: /* TROT - translate one to two [partial] */
4671 case 0xb993: /* TROO - translate one to one [partial] */
4672 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4673 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4674 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4675 /* tmp is source length, we want destination length. Adjust. */
4676 if (insn[0] == 0xb991)
4677 tmp >>= 1;
4678 if (insn[0] == 0xb992)
4679 tmp <<= 1;
4680 if (record_full_arch_list_add_mem (oaddr, tmp))
4681 return -1;
4682 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4683 return -1;
4684 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4685 return -1;
4686 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4687 return -1;
4688 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4689 return -1;
4690 break;
4691
4692 case 0xb996: /* MLR - multiply logical */
4693 case 0xb997: /* DLR - divide logical */
4694 /* 32-bit gpr pair destination */
4695 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4696 return -1;
4697 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4698 return -1;
4699 break;
4700
4701 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4702 /* 0xb9b4-0xb9bc undefined */
4703
4704 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4705 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4706 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4707 return -1;
4708 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4709 return -1;
4710 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4711 return -1;
4712 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4713 return -1;
4714 break;
4715
4716 /* 0xb9c0-0xb9c7 undefined */
4717
4718 case 0xb9c8: /* AHHHR - add high */
4719 case 0xb9c9: /* SHHHR - subtract high */
4720 case 0xb9ca: /* ALHHHR - add logical high */
4721 case 0xb9cb: /* SLHHHR - subtract logical high */
4722 case 0xb9d8: /* AHHLR - add high */
4723 case 0xb9d9: /* SHHLR - subtract high */
4724 case 0xb9da: /* ALHHLR - add logical high */
4725 case 0xb9db: /* SLHHLR - subtract logical high */
4726 /* 32-bit high gpr destination + flags */
4727 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4728 return -1;
4729 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4730 return -1;
4731 break;
4732
4733 /* 0xb9cc undefined */
4734 /* 0xb9ce undefined */
4735 /* 0xb9d0-0xb9d7 undefined */
4736 /* 0xb9dc undefined */
4737 /* 0xb9de undefined */
4738
4739 case 0xb9e0: /* LOCFHR - load high on condition */
4740 /* 32-bit high gpr destination */
4741 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4742 return -1;
4743 break;
4744
4745 /* 0xb9e3 undefined */
4746 /* 0xb9e5 undefined */
4747 /* 0xb9ee-0xb9f1 undefined */
4748 /* 0xb9f3 undefined */
4749 /* 0xb9f5 undefined */
4750 /* 0xb9fc undefined */
4751 /* 0xb9fe -0xb9ff undefined */
4752
4753 default:
4754 goto UNKNOWN_OP;
4755 }
4756 break;
4757
4758 /* 0xb4-0xb5 undefined */
4759 /* 0xb6 privileged: STCTL - store control */
4760 /* 0xb7 privileged: LCTL - load control */
4761 /* 0xb8 undefined */
4762
4763 case 0xba: /* CS - compare and swap */
4764 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4765 if (record_full_arch_list_add_mem (oaddr, 4))
4766 return -1;
4767 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4768 return -1;
4769 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4770 return -1;
4771 break;
4772
4773 case 0xbb: /* CDS - compare double and swap */
4774 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4775 if (record_full_arch_list_add_mem (oaddr, 8))
4776 return -1;
4777 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4778 return -1;
4779 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4780 return -1;
4781 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4782 return -1;
4783 break;
4784
4785 /* 0xbc undefined */
4786
4787 case 0xbe: /* STCM - store characters under mask */
4788 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4789 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4790 return -1;
4791 break;
4792
4793 case 0xc0:
4794 case 0xc2:
4795 case 0xc4:
4796 case 0xc6:
4797 case 0xcc:
4798 /* RIL-format instruction */
4799 switch (ibyte[0] << 4 | inib[3])
4800 {
4801 case 0xc00: /* LARL - load address relative long */
4802 case 0xc05: /* BRASL - branch relative and save long */
4803 case 0xc09: /* IILF - insert immediate */
4804 case 0xc21: /* MSFI - multiply single immediate */
4805 case 0xc42: /* LLHRL - load logical halfword relative long */
4806 case 0xc45: /* LHRL - load halfword relative long */
4807 case 0xc4d: /* LRL - load relative long */
4808 /* 32-bit or native gpr destination */
4809 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4810 return -1;
4811 break;
4812
4813 case 0xc01: /* LGFI - load immediate */
4814 case 0xc0e: /* LLIHF - load logical immediate */
4815 case 0xc0f: /* LLILF - load logical immediate */
4816 case 0xc20: /* MSGFI - multiply single immediate */
4817 case 0xc44: /* LGHRL - load halfword relative long */
4818 case 0xc46: /* LLGHRL - load logical halfword relative long */
4819 case 0xc48: /* LGRL - load relative long */
4820 case 0xc4c: /* LGFRL - load relative long */
4821 case 0xc4e: /* LLGFRL - load logical relative long */
4822 /* 64-bit gpr destination */
4823 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4824 return -1;
4825 break;
4826
4827 /* 0xc02-0xc03 undefined */
4828
4829 case 0xc04: /* BRCL - branch relative on condition long */
4830 case 0xc62: /* PFDRL - prefetch data relative long */
4831 break;
4832
4833 case 0xc06: /* XIHF - xor immediate */
4834 case 0xc0a: /* NIHF - and immediate */
4835 case 0xc0c: /* OIHF - or immediate */
4836 case 0xcc8: /* AIH - add immediate high */
4837 case 0xcca: /* ALSIH - add logical with signed immediate high */
4838 /* 32-bit high gpr destination + flags */
4839 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4840 return -1;
4841 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4842 return -1;
4843 break;
4844
4845 case 0xc07: /* XILF - xor immediate */
4846 case 0xc0b: /* NILF - and immediate */
4847 case 0xc0d: /* OILF - or immediate */
4848 case 0xc25: /* SLFI - subtract logical immediate */
4849 case 0xc29: /* AFI - add immediate */
4850 case 0xc2b: /* ALFI - add logical immediate */
4851 /* 32-bit gpr destination + flags */
4852 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4853 return -1;
4854 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4855 return -1;
4856 break;
4857
4858 case 0xc08: /* IIHF - insert immediate */
4859 case 0xcc6: /* BRCTH - branch relative on count high */
4860 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4861 /* 32-bit high gpr destination */
4862 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4863 return -1;
4864 break;
4865
4866 /* 0xc22-0xc23 undefined */
4867
4868 case 0xc24: /* SLGFI - subtract logical immediate */
4869 case 0xc28: /* AGFI - add immediate */
4870 case 0xc2a: /* ALGFI - add logical immediate */
4871 /* 64-bit gpr destination + flags */
4872 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4873 return -1;
4874 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4875 return -1;
4876 break;
4877
4878 /* 0xc26-0xc27 undefined */
4879
4880 case 0xc2c: /* CGFI - compare immediate */
4881 case 0xc2d: /* CFI - compare immediate */
4882 case 0xc2e: /* CLGFI - compare logical immediate */
4883 case 0xc2f: /* CLFI - compare logical immediate */
4884 case 0xc64: /* CGHRL - compare halfword relative long */
4885 case 0xc65: /* CHRL - compare halfword relative long */
4886 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4887 case 0xc67: /* CLHRL - compare logical halfword relative long */
4888 case 0xc68: /* CGRL - compare relative long */
4889 case 0xc6a: /* CLGRL - compare logical relative long */
4890 case 0xc6c: /* CGFRL - compare relative long */
4891 case 0xc6d: /* CRL - compare relative long */
4892 case 0xc6e: /* CLGFRL - compare logical relative long */
4893 case 0xc6f: /* CLRL - compare logical relative long */
4894 case 0xccd: /* CIH - compare immediate high */
4895 case 0xccf: /* CLIH - compare logical immediate high */
4896 /* flags only */
4897 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4898 return -1;
4899 break;
4900
4901 /* 0xc40-0xc41 undefined */
4902 /* 0xc43 undefined */
4903
4904 case 0xc47: /* STHRL - store halfword relative long */
4905 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4906 if (record_full_arch_list_add_mem (oaddr, 2))
4907 return -1;
4908 break;
4909
4910 /* 0xc49-0xc4a undefined */
4911
4912 case 0xc4b: /* STGRL - store relative long */
4913 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4914 if (record_full_arch_list_add_mem (oaddr, 8))
4915 return -1;
4916 break;
4917
4918 case 0xc4f: /* STRL - store relative long */
4919 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4920 if (record_full_arch_list_add_mem (oaddr, 4))
4921 return -1;
4922 break;
4923
4924 case 0xc60: /* EXRL - execute relative long */
4925 if (ex != -1)
4926 {
4927 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4928 paddress (gdbarch, addr));
4929 return -1;
4930 }
4931 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4932 if (inib[2])
4933 {
4934 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4935 ex = tmp & 0xff;
4936 }
4937 else
4938 {
4939 ex = 0;
4940 }
4941 goto ex;
4942
4943 /* 0xc61 undefined */
4944 /* 0xc63 undefined */
4945 /* 0xc69 undefined */
4946 /* 0xc6b undefined */
4947 /* 0xcc0-0xcc5 undefined */
4948 /* 0xcc7 undefined */
4949 /* 0xcc9 undefined */
4950 /* 0xccc undefined */
4951 /* 0xcce undefined */
4952
4953 default:
4954 goto UNKNOWN_OP;
4955 }
4956 break;
4957
4958 /* 0xc1 undefined */
4959 /* 0xc3 undefined */
4960
4961 case 0xc5: /* BPRP - branch prediction relative preload */
4962 case 0xc7: /* BPP - branch prediction preload */
4963 /* no visible effect */
4964 break;
4965
4966 case 0xc8:
4967 /* SSF-format instruction */
4968 switch (ibyte[0] << 4 | inib[3])
4969 {
4970 /* 0xc80 unsupported */
4971
4972 case 0xc81: /* ECTG - extract cpu time */
4973 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4974 return -1;
4975 if (s390_record_gpr_g (gdbarch, regcache, 0))
4976 return -1;
4977 if (s390_record_gpr_g (gdbarch, regcache, 1))
4978 return -1;
4979 break;
4980
4981 case 0xc82: /* CSST - compare and swap and store */
4982 {
4983 uint8_t fc, sc;
4984 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4985 fc = tmp & 0xff;
4986 sc = tmp >> 8 & 0xff;
4987
4988 /* First and third operands. */
4989 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4990 switch (fc)
4991 {
4992 case 0x00: /* 32-bit */
4993 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4994 return -1;
4995 if (record_full_arch_list_add_mem (oaddr, 4))
4996 return -1;
4997 break;
4998
4999 case 0x01: /* 64-bit */
5000 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5001 return -1;
5002 if (record_full_arch_list_add_mem (oaddr, 8))
5003 return -1;
5004 break;
5005
5006 case 0x02: /* 128-bit */
5007 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5008 return -1;
5009 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5010 return -1;
5011 if (record_full_arch_list_add_mem (oaddr, 16))
5012 return -1;
5013 break;
5014
5015 default:
5016 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5017 fc, paddress (gdbarch, addr));
5018 return -1;
5019 }
5020
5021 /* Second operand. */
5022 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5023 if (sc > 4)
5024 {
5025 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5026 sc, paddress (gdbarch, addr));
5027 return -1;
5028 }
5029
5030 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5031 return -1;
5032
5033 /* Flags. */
5034 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5035 return -1;
5036 }
5037 break;
5038
5039 /* 0xc83 undefined */
5040
5041 case 0xc84: /* LPD - load pair disjoint */
5042 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5043 return -1;
5044 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5045 return -1;
5046 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5047 return -1;
5048 break;
5049
5050 case 0xc85: /* LPDG - load pair disjoint */
5051 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5052 return -1;
5053 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5054 return -1;
5055 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5056 return -1;
5057 break;
5058
5059 /* 0xc86-0xc8f undefined */
5060
5061 default:
5062 goto UNKNOWN_OP;
5063 }
5064 break;
5065
5066 /* 0xc9-0xcb undefined */
5067 /* 0xcd-0xcf undefined */
5068
5069 case 0xd0: /* TRTR - translate and test reversed */
5070 case 0xdd: /* TRT - translate and test */
5071 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5072 return -1;
5073 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5074 return -1;
5075 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5076 return -1;
5077 break;
5078
5079 case 0xd1: /* MVN - move numbers */
5080 case 0xd2: /* MVC - move */
5081 case 0xd3: /* MVZ - move zones */
5082 case 0xdc: /* TR - translate */
5083 case 0xe8: /* MVCIN - move inverse */
5084 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5085 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5086 return -1;
5087 break;
5088
5089 case 0xd4: /* NC - and */
5090 case 0xd6: /* OC - or*/
5091 case 0xd7: /* XC - xor */
5092 case 0xe2: /* UNPKU - unpack unicode */
5093 case 0xea: /* UNPKA - unpack ASCII */
5094 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5095 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5096 return -1;
5097 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5098 return -1;
5099 break;
5100
5101 case 0xde: /* ED - edit */
5102 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5103 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5104 return -1;
5105 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5106 return -1;
5107 /* DXC may be written */
5108 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5109 return -1;
5110 break;
5111
5112 case 0xdf: /* EDMK - edit and mark */
5113 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5114 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5115 return -1;
5116 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5117 return -1;
5118 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5119 return -1;
5120 /* DXC may be written */
5121 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5122 return -1;
5123 break;
5124
5125 /* 0xd8 undefined */
5126 /* 0xd9 unsupported: MVCK - move with key */
5127 /* 0xda unsupported: MVCP - move to primary */
5128 /* 0xdb unsupported: MVCS - move to secondary */
5129 /* 0xe0 undefined */
5130
5131 case 0xe1: /* PKU - pack unicode */
5132 case 0xe9: /* PKA - pack ASCII */
5133 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5134 if (record_full_arch_list_add_mem (oaddr, 16))
5135 return -1;
5136 break;
5137
5138 case 0xe3:
5139 case 0xe6:
5140 case 0xe7:
5141 case 0xeb:
5142 case 0xed:
5143 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5144 switch (ibyte[0] << 8 | ibyte[5])
5145 {
5146 /* 0xe300-0xe301 undefined */
5147
5148 case 0xe302: /* LTG - load and test */
5149 case 0xe308: /* AG - add */
5150 case 0xe309: /* SG - subtract */
5151 case 0xe30a: /* ALG - add logical */
5152 case 0xe30b: /* SLG - subtract logical */
5153 case 0xe318: /* AGF - add */
5154 case 0xe319: /* SGF - subtract */
5155 case 0xe31a: /* ALGF - add logical */
5156 case 0xe31b: /* SLGF - subtract logical */
5157 case 0xe332: /* LTGF - load and test */
5158 case 0xe380: /* NG - and */
5159 case 0xe381: /* OG - or */
5160 case 0xe382: /* XG - xor */
5161 case 0xe388: /* ALCG - add logical with carry */
5162 case 0xe389: /* SLBG - subtract logical with borrow */
5163 case 0xeb0a: /* SRAG - shift right single */
5164 case 0xeb0b: /* SLAG - shift left single */
5165 /* 64-bit gpr destination + flags */
5166 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5167 return -1;
5168 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5169 return -1;
5170 break;
5171
5172 /* 0xe303 privileged */
5173
5174 case 0xe304: /* LG - load */
5175 case 0xe30c: /* MSG - multiply single */
5176 case 0xe30f: /* LRVG - load reversed */
5177 case 0xe314: /* LGF - load */
5178 case 0xe315: /* LGH - load halfword */
5179 case 0xe316: /* LLGF - load logical */
5180 case 0xe317: /* LLGT - load logical thirty one bits */
5181 case 0xe31c: /* MSGF - multiply single */
5182 case 0xe32a: /* LZRG - load and zero rightmost byte */
5183 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5184 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5185 case 0xe346: /* BCTG - branch on count */
5186 case 0xe377: /* LGB - load byte */
5187 case 0xe390: /* LLGC - load logical character */
5188 case 0xe391: /* LLGH - load logical halfword */
5189 case 0xeb0c: /* SRLG - shift right single logical */
5190 case 0xeb0d: /* SLLG - shift left single logical */
5191 case 0xeb1c: /* RLLG - rotate left single logical */
5192 case 0xeb44: /* BXHG - branch on index high */
5193 case 0xeb45: /* BXLEG - branch on index low or equal */
5194 case 0xeb4c: /* ECAG - extract cpu attribute */
5195 case 0xebe2: /* LOCG - load on condition */
5196 /* 64-bit gpr destination */
5197 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5198 return -1;
5199 break;
5200
5201 /* 0xe305 undefined */
5202
5203 case 0xe306: /* CVBY - convert to binary */
5204 /* 32-bit or native gpr destination + FPC (DXC write) */
5205 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5206 return -1;
5207 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5208 return -1;
5209 break;
5210
5211 /* 0xe307 undefined */
5212
5213 case 0xe30d: /* DSG - divide single */
5214 case 0xe31d: /* DSGF - divide single */
5215 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5216 case 0xe386: /* MLG - multiply logical */
5217 case 0xe387: /* DLG - divide logical */
5218 case 0xe38f: /* LPQ - load pair from quadword */
5219 /* 64-bit gpr pair destination */
5220 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5221 return -1;
5222 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5223 return -1;
5224 break;
5225
5226 case 0xe30e: /* CVBG - convert to binary */
5227 /* 64-bit gpr destination + FPC (DXC write) */
5228 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5229 return -1;
5230 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5231 return -1;
5232 break;
5233
5234 /* 0xe310-0xe311 undefined */
5235
5236 case 0xe312: /* LT - load and test */
5237 case 0xe338: /* AGH - add halfword to 64 bit value */
5238 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5239 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5240 case 0xe354: /* NY - and */
5241 case 0xe356: /* OY - or */
5242 case 0xe357: /* XY - xor */
5243 case 0xe35a: /* AY - add */
5244 case 0xe35b: /* SY - subtract */
5245 case 0xe35e: /* ALY - add logical */
5246 case 0xe35f: /* SLY - subtract logical */
5247 case 0xe37a: /* AHY - add halfword */
5248 case 0xe37b: /* SHY - subtract halfword */
5249 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5250 case 0xe398: /* ALC - add logical with carry */
5251 case 0xe399: /* SLB - subtract logical with borrow */
5252 case 0xe727: /* LCBB - load count to block bounduary */
5253 case 0xeb81: /* ICMY - insert characters under mask */
5254 case 0xebdc: /* SRAK - shift left single */
5255 case 0xebdd: /* SLAK - shift left single */
5256 /* 32/64-bit gpr destination + flags */
5257 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5258 return -1;
5259 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5260 return -1;
5261 break;
5262
5263 /* 0xe313 privileged */
5264
5265 case 0xe31e: /* LRV - load reversed */
5266 case 0xe31f: /* LRVH - load reversed */
5267 case 0xe33b: /* LZRF - load and zero rightmost byte */
5268 case 0xe351: /* MSY - multiply single */
5269 case 0xe358: /* LY - load */
5270 case 0xe371: /* LAY - load address */
5271 case 0xe373: /* ICY - insert character */
5272 case 0xe376: /* LB - load byte */
5273 case 0xe378: /* LHY - load */
5274 case 0xe37c: /* MHY - multiply halfword */
5275 case 0xe394: /* LLC - load logical character */
5276 case 0xe395: /* LLH - load logical halfword */
5277 case 0xeb1d: /* RLL - rotate left single logical */
5278 case 0xebde: /* SRLK - shift left single logical */
5279 case 0xebdf: /* SLLK - shift left single logical */
5280 case 0xebf2: /* LOC - load on condition */
5281 /* 32-bit or native gpr destination */
5282 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5283 return -1;
5284 break;
5285
5286 case 0xe320: /* CG - compare */
5287 case 0xe321: /* CLG - compare logical */
5288 case 0xe330: /* CGF - compare */
5289 case 0xe331: /* CLGF - compare logical */
5290 case 0xe334: /* CGH - compare halfword */
5291 case 0xe355: /* CLY - compare logical */
5292 case 0xe359: /* CY - compare */
5293 case 0xe379: /* CHY - compare halfword */
5294 case 0xe3cd: /* CHF - compare high */
5295 case 0xe3cf: /* CLHF - compare logical high */
5296 case 0xeb20: /* CLMH - compare logical under mask high */
5297 case 0xeb21: /* CLMY - compare logical under mask */
5298 case 0xeb51: /* TMY - test under mask */
5299 case 0xeb55: /* CLIY - compare logical */
5300 case 0xebc0: /* TP - test decimal */
5301 case 0xed10: /* TCEB - test data class */
5302 case 0xed11: /* TCDB - test data class */
5303 case 0xed12: /* TCXB - test data class */
5304 case 0xed50: /* TDCET - test data class */
5305 case 0xed51: /* TDGET - test data group */
5306 case 0xed54: /* TDCDT - test data class */
5307 case 0xed55: /* TDGDT - test data group */
5308 case 0xed58: /* TDCXT - test data class */
5309 case 0xed59: /* TDGXT - test data group */
5310 /* flags only */
5311 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5312 return -1;
5313 break;
5314
5315 /* 0xe322-0xe323 undefined */
5316
5317 case 0xe324: /* STG - store */
5318 case 0xe325: /* NTSTG - nontransactional store */
5319 case 0xe326: /* CVDY - convert to decimal */
5320 case 0xe32f: /* STRVG - store reversed */
5321 case 0xebe3: /* STOCG - store on condition */
5322 case 0xed67: /* STDY - store */
5323 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5324 if (record_full_arch_list_add_mem (oaddr, 8))
5325 return -1;
5326 break;
5327
5328 /* 0xe327-0xe329 undefined */
5329 /* 0xe32b-0xe32d undefined */
5330
5331 case 0xe32e: /* CVDG - convert to decimal */
5332 case 0xe38e: /* STPQ - store pair to quadword */
5333 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5334 if (record_full_arch_list_add_mem (oaddr, 16))
5335 return -1;
5336 break;
5337
5338 /* 0xe333 undefined */
5339 /* 0xe335 undefined */
5340
5341 case 0xe336: /* PFD - prefetch data */
5342 break;
5343
5344 /* 0xe337 undefined */
5345 /* 0xe33c-0xe33d undefined */
5346
5347 case 0xe33e: /* STRV - store reversed */
5348 case 0xe350: /* STY - store */
5349 case 0xe3cb: /* STFH - store high */
5350 case 0xebe1: /* STOCFH - store high on condition */
5351 case 0xebf3: /* STOC - store on condition */
5352 case 0xed66: /* STEY - store */
5353 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5354 if (record_full_arch_list_add_mem (oaddr, 4))
5355 return -1;
5356 break;
5357
5358 case 0xe33f: /* STRVH - store reversed */
5359 case 0xe370: /* STHY - store halfword */
5360 case 0xe3c7: /* STHH - store halfword high */
5361 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5362 if (record_full_arch_list_add_mem (oaddr, 2))
5363 return -1;
5364 break;
5365
5366 /* 0xe340-0xe345 undefined */
5367
5368 case 0xe347: /* BIC - branch indirect on condition */
5369 break;
5370
5371 /* 0xe348-0xe34f undefined */
5372 /* 0xe352 undefined */
5373
5374 case 0xe35c: /* MFY - multiply */
5375 case 0xe396: /* ML - multiply logical */
5376 case 0xe397: /* DL - divide logical */
5377 /* 32-bit gpr pair destination */
5378 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5379 return -1;
5380 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5381 return -1;
5382 break;
5383
5384 /* 0xe35d undefined */
5385 /* 0xe360-0xe36f undefined */
5386
5387 case 0xe372: /* STCY - store character */
5388 case 0xe3c3: /* STCH - store character high */
5389 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5390 if (record_full_arch_list_add_mem (oaddr, 1))
5391 return -1;
5392 break;
5393
5394 /* 0xe374 undefined */
5395
5396 case 0xe375: /* LAEY - load address extended */
5397 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5398 return -1;
5399 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5400 return -1;
5401 break;
5402
5403 /* 0xe37d-0xe37f undefined */
5404
5405 case 0xe385: /* LGAT - load and trap */
5406 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5407 case 0xe39d: /* LLGFAT - load logical and trap */
5408 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5409 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5410 case 0xe721: /* VLGV - vector load gr from vr element */
5411 /* 64-bit gpr destination + fpc for possible DXC write */
5412 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5413 return -1;
5414 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5415 return -1;
5416 break;
5417
5418 /* 0xe38a-0xe38d undefined */
5419 /* 0xe392-0xe393 undefined */
5420 /* 0xe39a-0xe39b undefined */
5421 /* 0xe39e undefined */
5422
5423 case 0xe39f: /* LAT - load and trap */
5424 /* 32-bit gpr destination + fpc for possible DXC write */
5425 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5426 return -1;
5427 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5428 return -1;
5429 break;
5430
5431 /* 0xe3a0-0xe3bf undefined */
5432
5433 case 0xe3c0: /* LBH - load byte high */
5434 case 0xe3c2: /* LLCH - load logical character high */
5435 case 0xe3c4: /* LHH - load halfword high */
5436 case 0xe3c6: /* LLHH - load logical halfword high */
5437 case 0xe3ca: /* LFH - load high */
5438 case 0xebe0: /* LOCFH - load high on condition */
5439 /* 32-bit high gpr destination */
5440 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5441 return -1;
5442 break;
5443
5444 /* 0xe3c1 undefined */
5445 /* 0xe3c5 undefined */
5446
5447 case 0xe3c8: /* LFHAT - load high and trap */
5448 /* 32-bit high gpr destination + fpc for possible DXC write */
5449 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5450 return -1;
5451 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5452 return -1;
5453 break;
5454
5455 /* 0xe3c9 undefined */
5456 /* 0xe3cc undefined */
5457 /* 0xe3ce undefined */
5458 /* 0xe3d0-0xe3ff undefined */
5459
5460 case 0xe634: /* VPKZ - vector pack zoned */
5461 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5462 case 0xe637: /* VLRLR - vector load rightmost with length */
5463 case 0xe649: /* VLIP - vector load immediate decimal */
5464 case 0xe700: /* VLEB - vector load element */
5465 case 0xe701: /* VLEH - vector load element */
5466 case 0xe702: /* VLEG - vector load element */
5467 case 0xe703: /* VLEF - vector load element */
5468 case 0xe704: /* VLLEZ - vector load logical element and zero */
5469 case 0xe705: /* VLREP - vector load and replicate */
5470 case 0xe706: /* VL - vector load */
5471 case 0xe707: /* VLBB - vector load to block bounduary */
5472 case 0xe712: /* VGEG - vector gather element */
5473 case 0xe713: /* VGEF - vector gather element */
5474 case 0xe722: /* VLVG - vector load vr element from gr */
5475 case 0xe730: /* VESL - vector element shift left */
5476 case 0xe733: /* VERLL - vector element rotate left logical */
5477 case 0xe737: /* VLL - vector load with length */
5478 case 0xe738: /* VESRL - vector element shift right logical */
5479 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5480 case 0xe740: /* VLEIB - vector load element immediate */
5481 case 0xe741: /* VLEIH - vector load element immediate */
5482 case 0xe742: /* VLEIG - vector load element immediate */
5483 case 0xe743: /* VLEIF - vector load element immediate */
5484 case 0xe744: /* VGBM - vector generate byte mask */
5485 case 0xe745: /* VREPI - vector replicate immediate */
5486 case 0xe746: /* VGM - vector generate mask */
5487 case 0xe74d: /* VREP - vector replicate */
5488 case 0xe750: /* VPOPCT - vector population count */
5489 case 0xe752: /* VCTZ - vector count trailing zeros */
5490 case 0xe753: /* VCLZ - vector count leading zeros */
5491 case 0xe756: /* VLR - vector load */
5492 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5493 case 0xe760: /* VMRL - vector merge low */
5494 case 0xe761: /* VMRH - vector merge high */
5495 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5496 case 0xe764: /* VSUM - vector sum across word */
5497 case 0xe765: /* VSUMG - vector sum across doubleword */
5498 case 0xe766: /* VCKSM - vector checksum */
5499 case 0xe767: /* VSUMQ - vector sum across quadword */
5500 case 0xe768: /* VN - vector and */
5501 case 0xe769: /* VNC - vector and with complement */
5502 case 0xe76a: /* VO - vector or */
5503 case 0xe76b: /* VNO - vector nor */
5504 case 0xe76c: /* VNX - vector not exclusive or */
5505 case 0xe76d: /* VX - vector xor */
5506 case 0xe76e: /* VNN - vector nand */
5507 case 0xe76f: /* VOC - vector or with complement */
5508 case 0xe770: /* VESLV - vector element shift left */
5509 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5510 case 0xe773: /* VERLLV - vector element rotate left logical */
5511 case 0xe774: /* VSL - vector shift left */
5512 case 0xe775: /* VSLB - vector shift left by byte */
5513 case 0xe777: /* VSLDB - vector shift left double by byte */
5514 case 0xe778: /* VESRLV - vector element shift right logical */
5515 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5516 case 0xe77c: /* VSRL - vector shift right logical */
5517 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5518 case 0xe77e: /* VSRA - vector shift right arithmetic */
5519 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5520 case 0xe784: /* VPDI - vector permute doubleword immediate */
5521 case 0xe785: /* VBPERM - vector bit permute */
5522 case 0xe78c: /* VPERM - vector permute */
5523 case 0xe78d: /* VSEL - vector select */
5524 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5525 case 0xe78f: /* VFMA - vector fp multiply and add */
5526 case 0xe794: /* VPK - vector pack */
5527 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5528 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5529 case 0xe7a1: /* VMLH - vector multiply logical high */
5530 case 0xe7a2: /* VML - vector multiply low */
5531 case 0xe7a3: /* VMH - vector multiply high */
5532 case 0xe7a4: /* VMLE - vector multiply logical even */
5533 case 0xe7a5: /* VMLO - vector multiply logical odd */
5534 case 0xe7a6: /* VME - vector multiply even */
5535 case 0xe7a7: /* VMO - vector multiply odd */
5536 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5537 case 0xe7aa: /* VMAL - vector multiply and add low */
5538 case 0xe7ab: /* VMAH - vector multiply and add high */
5539 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5540 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5541 case 0xe7ae: /* VMAE - vector multiply and add even */
5542 case 0xe7af: /* VMAO - vector multiply and add odd */
5543 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5544 case 0xe7b8: /* VMSL - vector multiply sum logical */
5545 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5546 case 0xe7bb: /* VAC - vector add with carry */
5547 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5548 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5549 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5550 case 0xe7c0: /* VCLGD - vector convert to logical 64-bit */
5551 case 0xe7c1: /* VCDLG - vector convert from logical 64-bit */
5552 case 0xe7c2: /* VCGD - vector convert to fixed 64-bit */
5553 case 0xe7c3: /* VCDG - vector convert from fixed 64-bit */
5554 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5555 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5556 case 0xe7c7: /* VFI - vector load fp integer */
5557 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5558 case 0xe7ce: /* VFSQ - vector fp square root */
5559 case 0xe7d4: /* VUPLL - vector unpack logical low */
5560 case 0xe7d6: /* VUPL - vector unpack low */
5561 case 0xe7d5: /* VUPLH - vector unpack logical high */
5562 case 0xe7d7: /* VUPH - vector unpack high */
5563 case 0xe7de: /* VLC - vector load complement */
5564 case 0xe7df: /* VLP - vector load positive */
5565 case 0xe7e2: /* VFA - vector fp subtract */
5566 case 0xe7e3: /* VFA - vector fp add */
5567 case 0xe7e5: /* VFD - vector fp divide */
5568 case 0xe7e7: /* VFM - vector fp multiply */
5569 case 0xe7ee: /* VFMIN - vector fp minimum */
5570 case 0xe7ef: /* VFMAX - vector fp maximum */
5571 case 0xe7f0: /* VAVGL - vector average logical */
5572 case 0xe7f1: /* VACC - vector add and compute carry */
5573 case 0xe7f2: /* VAVG - vector average */
5574 case 0xe7f3: /* VA - vector add */
5575 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5576 case 0xe7f7: /* VS - vector subtract */
5577 case 0xe7fc: /* VMNL - vector minimum logical */
5578 case 0xe7fd: /* VMXL - vector maximum logical */
5579 case 0xe7fe: /* VMN - vector minimum */
5580 case 0xe7ff: /* VMX - vector maximum */
5581 /* vector destination + FPC */
5582 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5583 return -1;
5584 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5585 return -1;
5586 break;
5587
5588 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5589 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5590 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5591 return -1;
5592 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5593 return -1;
5594 break;
5595
5596 case 0xe708: /* VSTEB - vector store element */
5597 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5598 if (record_full_arch_list_add_mem (oaddr, 1))
5599 return -1;
5600 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5601 return -1;
5602 break;
5603
5604 case 0xe709: /* VSTEH - vector store element */
5605 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5606 if (record_full_arch_list_add_mem (oaddr, 2))
5607 return -1;
5608 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5609 return -1;
5610 break;
5611
5612 case 0xe70a: /* VSTEG - vector store element */
5613 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5614 if (record_full_arch_list_add_mem (oaddr, 8))
5615 return -1;
5616 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5617 return -1;
5618 break;
5619
5620 case 0xe70b: /* VSTEF - vector store element */
5621 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5622 if (record_full_arch_list_add_mem (oaddr, 4))
5623 return -1;
5624 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5625 return -1;
5626 break;
5627
5628 /* 0xe70c-0xe70d undefined */
5629
5630 case 0xe70e: /* VST - vector store */
5631 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5632 if (record_full_arch_list_add_mem (oaddr, 16))
5633 return -1;
5634 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5635 return -1;
5636 break;
5637
5638 /* 0xe70f-0xe711 undefined */
5639 /* 0xe714-0xe719 undefined */
5640
5641 case 0xe71a: /* VSCEG - vector scatter element */
5642 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5643 return -1;
5644 if (record_full_arch_list_add_mem (oaddr, 8))
5645 return -1;
5646 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5647 return -1;
5648 break;
5649
5650 case 0xe71b: /* VSCEF - vector scatter element */
5651 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5652 return -1;
5653 if (record_full_arch_list_add_mem (oaddr, 4))
5654 return -1;
5655 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5656 return -1;
5657 break;
5658
5659 /* 0xe71c-0xe720 undefined */
5660 /* 0xe723-0xe726 undefined */
5661 /* 0xe728-0xe72f undefined */
5662 /* 0xe731-0xe732 undefined */
5663 /* 0xe734-0xe735 undefined */
5664
5665 case 0xe736: /* VLM - vector load multiple */
5666 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5667 if (s390_record_vr (gdbarch, regcache, i))
5668 return -1;
5669 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5670 return -1;
5671 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5672 return -1;
5673 break;
5674
5675 /* 0xe739 undefined */
5676 /* 0xe73b-0xe73d undefined */
5677
5678 case 0xe73e: /* VSTM - vector store multiple */
5679 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5680 if (ivec[0] <= ivec[1])
5681 n = ivec[1] - ivec[0] + 1;
5682 else
5683 n = ivec[1] + 0x20 - ivec[0] + 1;
5684 if (record_full_arch_list_add_mem (oaddr, n * 16))
5685 return -1;
5686 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5687 return -1;
5688 break;
5689
5690 case 0xe63c: /* VUPKZ - vector unpack zoned */
5691 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5692 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5693 return -1;
5694 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5695 return -1;
5696 break;
5697
5698 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5699 case 0xe73f: /* VSTL - vector store with length */
5700 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5701 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5702 tmp &= 0xffffffffu;
5703 if (tmp > 15)
5704 tmp = 15;
5705 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5706 return -1;
5707 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5708 return -1;
5709 break;
5710
5711 /* 0xe747-0xe749 undefined */
5712
5713 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5714 case 0xe659: /* VSRP - vector shift and round decimal */
5715 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5716 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5717 case 0xe671: /* VAP - vector add decimal */
5718 case 0xe673: /* VSP - vector subtract decimal */
5719 case 0xe678: /* VMP - vector multiply decimal */
5720 case 0xe679: /* VMSP - vector multiply decimal */
5721 case 0xe67a: /* VDP - vector divide decimal */
5722 case 0xe67b: /* VRP - vector remainder decimal */
5723 case 0xe67e: /* VSDP - vector shift and divide decimal */
5724 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5725 case 0xe75c: /* VISTR - vector isolate string */
5726 case 0xe780: /* VFEE - vector find element equal */
5727 case 0xe781: /* VFENE - vector find element not equal */
5728 case 0xe782: /* VFA - vector find any element equal */
5729 case 0xe78a: /* VSTRC - vector string range compare */
5730 case 0xe795: /* VPKLS - vector pack logical saturate */
5731 case 0xe797: /* VPKS - vector pack saturate */
5732 case 0xe7e8: /* VFCE - vector fp compare equal */
5733 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5734 case 0xe7eb: /* VFCH - vector fp compare high */
5735 case 0xe7f8: /* VCEQ - vector compare equal */
5736 case 0xe7f9: /* VCHL - vector compare high logical */
5737 case 0xe7fb: /* VCH - vector compare high */
5738 /* vector destination + flags + FPC */
5739 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5740 return -1;
5741 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5742 return -1;
5743 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5744 return -1;
5745 break;
5746
5747 case 0xe65f: /* VTP - vector test decimal */
5748 /* flags + FPC */
5749 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5750 return -1;
5751 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5752 return -1;
5753 break;
5754
5755 /* 0xe74b-0xe74c undefined */
5756 /* 0xe74e-0xe74f undefined */
5757 /* 0xe751 undefined */
5758 /* 0xe754-0xe755 undefined */
5759 /* 0xe757-0xe75b undefined */
5760 /* 0xe75d-0xe75e undefined */
5761 /* 0xe763 undefined */
5762 /* 0xe771 undefined */
5763 /* 0xe776 undefined */
5764 /* 0xe779 undefined */
5765 /* 0xe77b undefined */
5766 /* 0xe783 undefined */
5767 /* 0xe786-0xe789 undefined */
5768 /* 0xe78b undefined */
5769 /* 0xe790-0xe793 undefined */
5770 /* 0xe796 undefined */
5771 /* 0xe798-0xe79d undefined */
5772 /* 0xe7a0 undefined */
5773 /* 0xe7a8 undefined */
5774 /* 0xe7b0-0xe7b3 undefined */
5775 /* 0xe7b5-0xe7b7 undefined */
5776 /* 0xe7ba undefined */
5777 /* 0xe7be undefined */
5778 /* 0xe7c6 undefined */
5779 /* 0xe7c8-0xe7c9 undefined */
5780
5781 case 0xe677: /* VCP - vector compare decimal */
5782 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5783 case 0xe7cb: /* WFC - vector fp compare scalar */
5784 case 0xe7d8: /* VTM - vector test under mask */
5785 case 0xe7d9: /* VECL - vector element compare logical */
5786 case 0xe7db: /* VEC - vector element compare */
5787 case 0xed08: /* KEB - compare and signal */
5788 case 0xed09: /* CEB - compare */
5789 case 0xed18: /* KDB - compare and signal */
5790 case 0xed19: /* CDB - compare */
5791 /* flags + fpc only */
5792 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5793 return -1;
5794 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5795 return -1;
5796 break;
5797
5798 /* 0xe7cd undefined */
5799 /* 0xe7cf-0xe7d3 undefined */
5800 /* 0xe7da undefined */
5801 /* 0xe7dc-0xe7dd undefined */
5802 /* 0xe7e0-0xe7e1 undefined */
5803 /* 0xe7e4 undefined */
5804 /* 0xe7e6 undefined */
5805 /* 0xe7e9 undefined */
5806 /* 0xe7ec-0xe7ed undefined */
5807 /* 0xe7f4 undefined */
5808 /* 0xe7f6 undefined */
5809 /* 0xe7fa undefined */
5810
5811 /* 0xeb00-0xeb03 undefined */
5812
5813 case 0xeb04: /* LMG - load multiple */
5814 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5815 if (s390_record_gpr_g (gdbarch, regcache, i))
5816 return -1;
5817 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5818 return -1;
5819 break;
5820
5821 /* 0xeb05-0xeb09 undefined */
5822 /* 0xeb0e undefined */
5823 /* 0xeb0f privileged: TRACG */
5824 /* 0xeb10-0xeb13 undefined */
5825
5826 case 0xeb14: /* CSY - compare and swap */
5827 case 0xebf4: /* LAN - load and and */
5828 case 0xebf6: /* LAO - load and or */
5829 case 0xebf7: /* LAX - load and xor */
5830 case 0xebf8: /* LAA - load and add */
5831 case 0xebfa: /* LAAL - load and add logical */
5832 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5833 if (record_full_arch_list_add_mem (oaddr, 4))
5834 return -1;
5835 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5836 return -1;
5837 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5838 return -1;
5839 break;
5840
5841 /* 0xeb15-0xeb1b undefined */
5842 /* 0xeb1e-0xeb1f undefined */
5843 /* 0xeb22 undefined */
5844
5845 case 0xeb23: /* CLT - compare logical and trap */
5846 case 0xeb2b: /* CLGT - compare logical and trap */
5847 /* fpc only - including possible DXC write for trapping insns */
5848 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5849 return -1;
5850 break;
5851
5852 case 0xeb24: /* STMG - store multiple */
5853 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5854 if (inib[2] <= inib[3])
5855 n = inib[3] - inib[2] + 1;
5856 else
5857 n = inib[3] + 0x10 - inib[2] + 1;
5858 if (record_full_arch_list_add_mem (oaddr, n * 8))
5859 return -1;
5860 break;
5861
5862 /* 0xeb25 privileged */
5863
5864 case 0xeb26: /* STMH - store multiple high */
5865 case 0xeb90: /* STMY - store multiple */
5866 case 0xeb9b: /* STAMY - store access multiple */
5867 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5868 if (inib[2] <= inib[3])
5869 n = inib[3] - inib[2] + 1;
5870 else
5871 n = inib[3] + 0x10 - inib[2] + 1;
5872 if (record_full_arch_list_add_mem (oaddr, n * 4))
5873 return -1;
5874 break;
5875
5876 /* 0xeb27-0xeb2a undefined */
5877
5878 case 0xeb2c: /* STCMH - store characters under mask */
5879 case 0xeb2d: /* STCMY - store characters under mask */
5880 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5881 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5882 return -1;
5883 break;
5884
5885 /* 0xeb2e undefined */
5886 /* 0xeb2f privileged */
5887
5888 case 0xeb30: /* CSG - compare and swap */
5889 case 0xebe4: /* LANG - load and and */
5890 case 0xebe6: /* LAOG - load and or */
5891 case 0xebe7: /* LAXG - load and xor */
5892 case 0xebe8: /* LAAG - load and add */
5893 case 0xebea: /* LAALG - load and add logical */
5894 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5895 if (record_full_arch_list_add_mem (oaddr, 8))
5896 return -1;
5897 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5898 return -1;
5899 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5900 return -1;
5901 break;
5902
5903 case 0xeb31: /* CDSY - compare double and swap */
5904 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5905 if (record_full_arch_list_add_mem (oaddr, 8))
5906 return -1;
5907 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5908 return -1;
5909 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5910 return -1;
5911 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5912 return -1;
5913 break;
5914
5915 /* 0xeb32-0xeb3d undefined */
5916
5917 case 0xeb3e: /* CDSG - compare double and swap */
5918 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5919 if (record_full_arch_list_add_mem (oaddr, 16))
5920 return -1;
5921 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5922 return -1;
5923 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5924 return -1;
5925 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5926 return -1;
5927 break;
5928
5929 /* 0xeb3f-0xeb43 undefined */
5930 /* 0xeb46-0xeb4b undefined */
5931 /* 0xeb4d-0xeb50 undefined */
5932
5933 case 0xeb52: /* MVIY - move */
5934 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5935 if (record_full_arch_list_add_mem (oaddr, 1))
5936 return -1;
5937 break;
5938
5939 case 0xeb54: /* NIY - and */
5940 case 0xeb56: /* OIY - or */
5941 case 0xeb57: /* XIY - xor */
5942 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5943 if (record_full_arch_list_add_mem (oaddr, 1))
5944 return -1;
5945 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5946 return -1;
5947 break;
5948
5949 /* 0xeb53 undefined */
5950 /* 0xeb58-0xeb69 undefined */
5951
5952 case 0xeb6a: /* ASI - add immediate */
5953 case 0xeb6e: /* ALSI - add immediate */
5954 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5955 if (record_full_arch_list_add_mem (oaddr, 4))
5956 return -1;
5957 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5958 return -1;
5959 break;
5960
5961 /* 0xeb6b-0xeb6d undefined */
5962 /* 0xeb6f-0xeb79 undefined */
5963
5964 case 0xeb7a: /* AGSI - add immediate */
5965 case 0xeb7e: /* ALGSI - add immediate */
5966 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5967 if (record_full_arch_list_add_mem (oaddr, 8))
5968 return -1;
5969 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5970 return -1;
5971 break;
5972
5973 /* 0xeb7b-0xeb7d undefined */
5974 /* 0xeb7f undefined */
5975
5976 case 0xeb80: /* ICMH - insert characters under mask */
5977 /* 32-bit high gpr destination + flags */
5978 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5979 return -1;
5980 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5981 return -1;
5982 break;
5983
5984 /* 0xeb82-0xeb8d undefined */
5985
5986 case 0xeb8e: /* MVCLU - move long unicode [partial] */
5987 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
5988 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
5989 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
5990 if (record_full_arch_list_add_mem (oaddr, tmp))
5991 return -1;
5992 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5993 return -1;
5994 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5995 return -1;
5996 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
5997 return -1;
5998 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
5999 return -1;
6000 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6001 return -1;
6002 break;
6003
6004 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6005 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6006 return -1;
6007 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6008 return -1;
6009 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6010 return -1;
6011 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6012 return -1;
6013 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6014 return -1;
6015 break;
6016
6017 /* 0xeb91-0xeb95 undefined */
6018
6019 case 0xeb96: /* LMH - load multiple high */
6020 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6021 if (s390_record_gpr_h (gdbarch, regcache, i))
6022 return -1;
6023 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6024 return -1;
6025 break;
6026
6027 /* 0xeb97 undefined */
6028
6029 case 0xeb98: /* LMY - load multiple */
6030 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6031 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6032 return -1;
6033 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6034 return -1;
6035 break;
6036
6037 /* 0xeb99 undefined */
6038
6039 case 0xeb9a: /* LAMY - load access multiple */
6040 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6041 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6042 return -1;
6043 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6044 return -1;
6045 break;
6046
6047 /* 0xeb9c-0xebbf undefined */
6048 /* 0xebc1-0xebdb undefined */
6049 /* 0xebe5 undefined */
6050 /* 0xebe9 undefined */
6051 /* 0xebeb-0xebf1 undefined */
6052 /* 0xebf5 undefined */
6053 /* 0xebf9 undefined */
6054 /* 0xebfb-0xebff undefined */
6055
6056 /* 0xed00-0xed03 undefined */
6057
6058 case 0xed04: /* LDEB - load lengthened */
6059 case 0xed0c: /* MDEB - multiply */
6060 case 0xed0d: /* DEB - divide */
6061 case 0xed14: /* SQEB - square root */
6062 case 0xed15: /* SQDB - square root */
6063 case 0xed17: /* MEEB - multiply */
6064 case 0xed1c: /* MDB - multiply */
6065 case 0xed1d: /* DDB - divide */
6066 /* float destination + fpc */
6067 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6068 return -1;
6069 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6070 return -1;
6071 break;
6072
6073 case 0xed05: /* LXDB - load lengthened */
6074 case 0xed06: /* LXEB - load lengthened */
6075 case 0xed07: /* MXDB - multiply */
6076 /* float pair destination + fpc */
6077 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6078 return -1;
6079 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6080 return -1;
6081 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6082 return -1;
6083 break;
6084
6085 case 0xed0a: /* AEB - add */
6086 case 0xed0b: /* SEB - subtract */
6087 case 0xed1a: /* ADB - add */
6088 case 0xed1b: /* SDB - subtract */
6089 /* float destination + flags + fpc */
6090 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6091 return -1;
6092 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6093 return -1;
6094 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6095 return -1;
6096 break;
6097
6098 case 0xed0e: /* MAEB - multiply and add */
6099 case 0xed0f: /* MSEB - multiply and subtract */
6100 case 0xed1e: /* MADB - multiply and add */
6101 case 0xed1f: /* MSDB - multiply and subtract */
6102 case 0xed40: /* SLDT - shift significand left */
6103 case 0xed41: /* SRDT - shift significand right */
6104 case 0xedaa: /* CDZT - convert from zoned */
6105 case 0xedae: /* CDPT - convert from packed */
6106 /* float destination [RXF] + fpc */
6107 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6108 return -1;
6109 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6110 return -1;
6111 break;
6112
6113 /* 0xed13 undefined */
6114 /* 0xed16 undefined */
6115 /* 0xed20-0xed23 undefined */
6116
6117 case 0xed24: /* LDE - load lengthened */
6118 case 0xed34: /* SQE - square root */
6119 case 0xed35: /* SQD - square root */
6120 case 0xed37: /* MEE - multiply */
6121 case 0xed64: /* LEY - load */
6122 case 0xed65: /* LDY - load */
6123 /* float destination */
6124 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6125 return -1;
6126 break;
6127
6128 case 0xed25: /* LXD - load lengthened */
6129 case 0xed26: /* LXE - load lengthened */
6130 /* float pair destination */
6131 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6132 return -1;
6133 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6134 return -1;
6135 break;
6136
6137 /* 0xed27-0xed2d undefined */
6138
6139 case 0xed2e: /* MAE - multiply and add */
6140 case 0xed2f: /* MSE - multiply and subtract */
6141 case 0xed38: /* MAYL - multiply and add unnormalized */
6142 case 0xed39: /* MYL - multiply unnormalized */
6143 case 0xed3c: /* MAYH - multiply and add unnormalized */
6144 case 0xed3d: /* MYH - multiply unnormalized */
6145 case 0xed3e: /* MAD - multiply and add */
6146 case 0xed3f: /* MSD - multiply and subtract */
6147 /* float destination [RXF] */
6148 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6149 return -1;
6150 break;
6151
6152 /* 0xed30-0xed33 undefined */
6153 /* 0xed36 undefined */
6154
6155 case 0xed3a: /* MAY - multiply and add unnormalized */
6156 case 0xed3b: /* MY - multiply unnormalized */
6157 /* float pair destination [RXF] */
6158 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6159 return -1;
6160 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6161 return -1;
6162 break;
6163
6164 /* 0xed42-0xed47 undefind */
6165
6166 case 0xed48: /* SLXT - shift significand left */
6167 case 0xed49: /* SRXT - shift significand right */
6168 case 0xedab: /* CXZT - convert from zoned */
6169 case 0xedaf: /* CXPT - convert from packed */
6170 /* float pair destination [RXF] + fpc */
6171 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6172 return -1;
6173 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6174 return -1;
6175 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6176 return -1;
6177 break;
6178
6179 /* 0xed4a-0xed4f undefind */
6180 /* 0xed52-0xed53 undefind */
6181 /* 0xed56-0xed57 undefind */
6182 /* 0xed5a-0xed63 undefind */
6183 /* 0xed68-0xeda7 undefined */
6184
6185 case 0xeda8: /* CZDT - convert to zoned */
6186 case 0xeda9: /* CZXT - convert to zoned */
6187 case 0xedac: /* CPDT - convert to packed */
6188 case 0xedad: /* CPXT - convert to packed */
6189 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6190 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6191 return -1;
6192 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6193 return -1;
6194 break;
6195
6196 /* 0xedb0-0xedff undefined */
6197
6198 default:
6199 goto UNKNOWN_OP;
6200 }
6201 break;
6202
6203 /* 0xe4 undefined */
6204
6205 case 0xe5:
6206 /* SSE/SIL-format instruction */
6207 switch (insn[0])
6208 {
6209 /* 0xe500-0xe543 undefined, privileged, or unsupported */
6210
6211 case 0xe544: /* MVHHI - move */
6212 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6213 if (record_full_arch_list_add_mem (oaddr, 2))
6214 return -1;
6215 break;
6216
6217 /* 0xe545-0xe547 undefined */
6218
6219 case 0xe548: /* MVGHI - move */
6220 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6221 if (record_full_arch_list_add_mem (oaddr, 8))
6222 return -1;
6223 break;
6224
6225 /* 0xe549-0xe54b undefined */
6226
6227 case 0xe54c: /* MVHI - move */
6228 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6229 if (record_full_arch_list_add_mem (oaddr, 4))
6230 return -1;
6231 break;
6232
6233 /* 0xe54d-0xe553 undefined */
6234
6235 case 0xe554: /* CHHSI - compare halfword immediate */
6236 case 0xe555: /* CLHHSI - compare logical immediate */
6237 case 0xe558: /* CGHSI - compare halfword immediate */
6238 case 0xe559: /* CLGHSI - compare logical immediate */
6239 case 0xe55c: /* CHSI - compare halfword immediate */
6240 case 0xe55d: /* CLFHSI - compare logical immediate */
6241 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6242 return -1;
6243 break;
6244
6245 /* 0xe556-0xe557 undefined */
6246 /* 0xe55a-0xe55b undefined */
6247 /* 0xe55e-0xe55f undefined */
6248
6249 case 0xe560: /* TBEGIN - transaction begin */
6250 /* The transaction will be immediately aborted after this
6251 instruction, due to single-stepping. This instruction is
6252 only supported so that the program can fail a few times
6253 and go to the non-transactional fallback. */
6254 if (inib[4])
6255 {
6256 /* Transaction diagnostic block - user. */
6257 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6258 if (record_full_arch_list_add_mem (oaddr, 256))
6259 return -1;
6260 }
6261 /* Transaction diagnostic block - supervisor. */
6262 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6263 return -1;
6264 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6265 return -1;
6266 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6267 return -1;
6268 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6269 return -1;
6270 for (i = 0; i < 16; i++)
6271 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6272 return -1;
6273 /* And flags. */
6274 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6275 return -1;
6276 break;
6277
6278 /* 0xe561 unsupported: TBEGINC */
6279 /* 0xe562-0xe5ff undefined */
6280
6281 default:
6282 goto UNKNOWN_OP;
6283 }
6284 break;
6285
6286 case 0xec:
6287 /* RIE/RIS/RRS-format instruction */
6288 switch (ibyte[0] << 8 | ibyte[5])
6289 {
6290 /* 0xec00-0xec41 undefined */
6291
6292 case 0xec42: /* LOCHI - load halfword immediate on condition */
6293 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6294 /* 32-bit or native gpr destination */
6295 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6296 return -1;
6297 break;
6298
6299 /* 0xec43 undefined */
6300
6301 case 0xec44: /* BRXHG - branch relative on index high */
6302 case 0xec45: /* BRXLG - branch relative on index low or equal */
6303 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6304 case 0xec59: /* RISBGN - rotate then insert selected bits */
6305 /* 64-bit gpr destination */
6306 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6307 return -1;
6308 break;
6309
6310 /* 0xec47-0xec4d undefined */
6311
6312 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6313 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6314 /* 32-bit high gpr destination */
6315 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6316 return -1;
6317 break;
6318
6319 /* 0xec4f-0xec50 undefined */
6320 /* 0xec52-0xec53 undefined */
6321
6322 case 0xec54: /* RNSBG - rotate then and selected bits */
6323 case 0xec55: /* RISBG - rotate then insert selected bits */
6324 case 0xec56: /* ROSBG - rotate then or selected bits */
6325 case 0xec57: /* RXSBG - rotate then xor selected bits */
6326 case 0xecd9: /* AGHIK - add immediate */
6327 case 0xecdb: /* ALGHSIK - add logical immediate */
6328 /* 64-bit gpr destination + flags */
6329 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6330 return -1;
6331 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6332 return -1;
6333 break;
6334
6335 /* 0xec58 undefined */
6336 /* 0xec5a-0xec5c undefined */
6337 /* 0xec5e-0xec63 undefined */
6338
6339 case 0xec64: /* CGRJ - compare and branch relative */
6340 case 0xec65: /* CLGRJ - compare logical and branch relative */
6341 case 0xec76: /* CRJ - compare and branch relative */
6342 case 0xec77: /* CLRJ - compare logical and branch relative */
6343 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6344 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6345 case 0xec7e: /* CIJ - compare immediate and branch relative */
6346 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6347 case 0xece4: /* CGRB - compare and branch */
6348 case 0xece5: /* CLGRB - compare logical and branch */
6349 case 0xecf6: /* CRB - compare and branch */
6350 case 0xecf7: /* CLRB - compare logical and branch */
6351 case 0xecfc: /* CGIB - compare immediate and branch */
6352 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6353 case 0xecfe: /* CIB - compare immediate and branch */
6354 case 0xecff: /* CLIB - compare logical immediate and branch */
6355 break;
6356
6357 /* 0xec66-0xec6f undefined */
6358
6359 case 0xec70: /* CGIT - compare immediate and trap */
6360 case 0xec71: /* CLGIT - compare logical immediate and trap */
6361 case 0xec72: /* CIT - compare immediate and trap */
6362 case 0xec73: /* CLFIT - compare logical immediate and trap */
6363 /* fpc only - including possible DXC write for trapping insns */
6364 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6365 return -1;
6366 break;
6367
6368 /* 0xec74-0xec75 undefined */
6369 /* 0xec78-0xec7b undefined */
6370
6371 /* 0xec80-0xecd7 undefined */
6372
6373 case 0xecd8: /* AHIK - add immediate */
6374 case 0xecda: /* ALHSIK - add logical immediate */
6375 /* 32-bit gpr destination + flags */
6376 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6377 return -1;
6378 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6379 return -1;
6380 break;
6381
6382 /* 0xecdc-0xece3 undefined */
6383 /* 0xece6-0xecf5 undefined */
6384 /* 0xecf8-0xecfb undefined */
6385
6386 default:
6387 goto UNKNOWN_OP;
6388 }
6389 break;
6390
6391 case 0xee: /* PLO - perform locked operation */
6392 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6393 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6394 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6395 if (!(tmp & 0x100))
6396 {
6397 uint8_t fc = tmp & 0xff;
6398 gdb_byte buf[8];
6399 switch (fc)
6400 {
6401 case 0x00: /* CL */
6402 /* op1c */
6403 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6404 return -1;
6405 /* op3 */
6406 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6407 return -1;
6408 break;
6409
6410 case 0x01: /* CLG */
6411 /* op1c */
6412 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6413 return -1;
6414 /* op3 */
6415 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6416 return -1;
6417 break;
6418
6419 case 0x02: /* CLGR */
6420 /* op1c */
6421 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6422 return -1;
6423 /* op3 */
6424 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6425 return -1;
6426 break;
6427
6428 case 0x03: /* CLX */
6429 /* op1c */
6430 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6431 return -1;
6432 /* op3 */
6433 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6434 return -1;
6435 break;
6436
6437 case 0x08: /* DCS */
6438 /* op3c */
6439 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6440 return -1;
6441 /* fallthru */
6442 case 0x0c: /* CSST */
6443 /* op4 */
6444 if (record_full_arch_list_add_mem (oaddr2, 4))
6445 return -1;
6446 goto CS;
6447
6448 case 0x14: /* CSTST */
6449 /* op8 */
6450 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6451 return -1;
6452 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6453 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6454 if (record_full_arch_list_add_mem (oaddr3, 4))
6455 return -1;
6456 /* fallthru */
6457 case 0x10: /* CSDST */
6458 /* op6 */
6459 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6460 return -1;
6461 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6462 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6463 if (record_full_arch_list_add_mem (oaddr3, 4))
6464 return -1;
6465 /* op4 */
6466 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6467 return -1;
6468 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6469 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6470 if (record_full_arch_list_add_mem (oaddr3, 4))
6471 return -1;
6472 /* fallthru */
6473 case 0x04: /* CS */
6474 CS:
6475 /* op1c */
6476 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6477 return -1;
6478 /* op2 */
6479 if (record_full_arch_list_add_mem (oaddr, 4))
6480 return -1;
6481 break;
6482
6483 case 0x09: /* DCSG */
6484 /* op3c */
6485 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6486 return -1;
6487 goto CSSTG;
6488
6489 case 0x15: /* CSTSTG */
6490 /* op8 */
6491 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6492 return -1;
6493 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6494 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6495 if (record_full_arch_list_add_mem (oaddr3, 8))
6496 return -1;
6497 /* fallthru */
6498 case 0x11: /* CSDSTG */
6499 /* op6 */
6500 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6501 return -1;
6502 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6503 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6504 if (record_full_arch_list_add_mem (oaddr3, 8))
6505 return -1;
6506 /* fallthru */
6507 case 0x0d: /* CSSTG */
6508 CSSTG:
6509 /* op4 */
6510 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6511 return -1;
6512 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6513 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6514 if (record_full_arch_list_add_mem (oaddr3, 8))
6515 return -1;
6516 /* fallthru */
6517 case 0x05: /* CSG */
6518 /* op1c */
6519 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6520 return -1;
6521 /* op2 */
6522 if (record_full_arch_list_add_mem (oaddr, 8))
6523 return -1;
6524 break;
6525
6526 case 0x0a: /* DCSGR */
6527 /* op3c */
6528 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6529 return -1;
6530 /* fallthru */
6531 case 0x0e: /* CSSTGR */
6532 /* op4 */
6533 if (record_full_arch_list_add_mem (oaddr2, 8))
6534 return -1;
6535 goto CSGR;
6536
6537 case 0x16: /* CSTSTGR */
6538 /* op8 */
6539 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6540 return -1;
6541 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6542 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6543 if (record_full_arch_list_add_mem (oaddr3, 8))
6544 return -1;
6545 /* fallthru */
6546 case 0x12: /* CSDSTGR */
6547 /* op6 */
6548 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6549 return -1;
6550 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6551 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6552 if (record_full_arch_list_add_mem (oaddr3, 8))
6553 return -1;
6554 /* op4 */
6555 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6556 return -1;
6557 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6558 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6559 if (record_full_arch_list_add_mem (oaddr3, 8))
6560 return -1;
6561 /* fallthru */
6562 case 0x06: /* CSGR */
6563 CSGR:
6564 /* op1c */
6565 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6566 return -1;
6567 /* op2 */
6568 if (record_full_arch_list_add_mem (oaddr, 8))
6569 return -1;
6570 break;
6571
6572 case 0x0b: /* DCSX */
6573 /* op3c */
6574 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6575 return -1;
6576 goto CSSTX;
6577
6578 case 0x17: /* CSTSTX */
6579 /* op8 */
6580 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6581 return -1;
6582 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6583 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6584 if (record_full_arch_list_add_mem (oaddr3, 16))
6585 return -1;
6586 /* fallthru */
6587 case 0x13: /* CSDSTX */
6588 /* op6 */
6589 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6590 return -1;
6591 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6592 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6593 if (record_full_arch_list_add_mem (oaddr3, 16))
6594 return -1;
6595 /* fallthru */
6596 case 0x0f: /* CSSTX */
6597 CSSTX:
6598 /* op4 */
6599 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6600 return -1;
6601 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6602 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6603 if (record_full_arch_list_add_mem (oaddr3, 16))
6604 return -1;
6605 /* fallthru */
6606 case 0x07: /* CSX */
6607 /* op1c */
6608 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6609 return -1;
6610 /* op2 */
6611 if (record_full_arch_list_add_mem (oaddr, 16))
6612 return -1;
6613 break;
6614
6615 default:
6616 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6617 fc, paddress (gdbarch, addr));
6618 return -1;
6619 }
6620 }
6621 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6622 return -1;
6623 break;
6624
6625 case 0xef: /* LMD - load multiple disjoint */
6626 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6627 if (s390_record_gpr_g (gdbarch, regcache, i))
6628 return -1;
6629 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6630 return -1;
6631 break;
6632
6633 case 0xf0: /* SRP - shift and round decimal */
6634 case 0xf8: /* ZAP - zero and add */
6635 case 0xfa: /* AP - add decimal */
6636 case 0xfb: /* SP - subtract decimal */
6637 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6638 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6639 return -1;
6640 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6641 return -1;
6642 /* DXC may be written */
6643 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6644 return -1;
6645 break;
6646
6647 case 0xf1: /* MVO - move with offset */
6648 case 0xf2: /* PACK - pack */
6649 case 0xf3: /* UNPK - unpack */
6650 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6651 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6652 return -1;
6653 break;
6654
6655 /* 0xf4-0xf7 undefined */
6656
6657 case 0xf9: /* CP - compare decimal */
6658 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6659 return -1;
6660 /* DXC may be written */
6661 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6662 return -1;
6663 break;
6664
6665 case 0xfc: /* MP - multiply decimal */
6666 case 0xfd: /* DP - divide decimal */
6667 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6668 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6669 return -1;
6670 /* DXC may be written */
6671 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6672 return -1;
6673 break;
6674
6675 /* 0xfe-0xff undefined */
6676
6677 default:
6678 UNKNOWN_OP:
6679 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6680 "at %s.\n", insn[0], paddress (gdbarch, addr));
6681 return -1;
6682 }
6683
6684 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6685 return -1;
6686 if (record_full_arch_list_add_end ())
6687 return -1;
6688 return 0;
6689 }
6690
6691 /* Miscellaneous. */
6692
6693 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6694 "-mcmodel=large". */
6695
6696 static char *
6697 s390_gcc_target_options (struct gdbarch *gdbarch)
6698 {
6699 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
6700 }
6701
6702 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6703 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6704 always "s390". Note that an s390x compiler supports "-m31" as
6705 well. */
6706
6707 static const char *
6708 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6709 {
6710 return "s390x?";
6711 }
6712
6713 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6714 gdbarch.h. */
6715
6716 static int
6717 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6718 {
6719 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6720 or indirection. */
6721 || *s == '%' /* Register access. */
6722 || isdigit (*s)); /* Literal number. */
6723 }
6724
6725 /* gdbarch init. */
6726
6727 /* Validate the range of registers. NAMES must be known at compile time. */
6728
6729 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6730 do \
6731 { \
6732 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6733 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6734 return false; \
6735 } \
6736 while (0)
6737
6738 /* Validate the target description. Also numbers registers contained in
6739 tdesc. */
6740
6741 static bool
6742 s390_tdesc_valid (struct gdbarch_tdep *tdep,
6743 struct tdesc_arch_data *tdesc_data)
6744 {
6745 static const char *const psw[] = {
6746 "pswm", "pswa"
6747 };
6748 static const char *const gprs[] = {
6749 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6750 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6751 };
6752 static const char *const fprs[] = {
6753 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6754 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6755 };
6756 static const char *const acrs[] = {
6757 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6758 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6759 };
6760 static const char *const gprs_lower[] = {
6761 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6762 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6763 };
6764 static const char *const gprs_upper[] = {
6765 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6766 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6767 };
6768 static const char *const tdb_regs[] = {
6769 "tdb0", "tac", "tct", "atia",
6770 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6771 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6772 };
6773 static const char *const vxrs_low[] = {
6774 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6775 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6776 };
6777 static const char *const vxrs_high[] = {
6778 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6779 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6780 };
6781 static const char *const gs_cb[] = {
6782 "gsd", "gssm", "gsepla",
6783 };
6784 static const char *const gs_bc[] = {
6785 "bc_gsd", "bc_gssm", "bc_gsepla",
6786 };
6787
6788 const struct target_desc *tdesc = tdep->tdesc;
6789 const struct tdesc_feature *feature;
6790
6791 if (!tdesc_has_registers (tdesc))
6792 return false;
6793
6794 /* Core registers, i.e. general purpose and PSW. */
6795 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6796 if (feature == NULL)
6797 return false;
6798
6799 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6800
6801 if (tdesc_unnumbered_register (feature, "r0"))
6802 {
6803 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6804 }
6805 else
6806 {
6807 tdep->have_upper = true;
6808 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6809 gprs_lower);
6810 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6811 gprs_upper);
6812 }
6813
6814 /* Floating point registers. */
6815 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6816 if (feature == NULL)
6817 return false;
6818
6819 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6820 return false;
6821
6822 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6823
6824 /* Access control registers. */
6825 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6826 if (feature == NULL)
6827 return false;
6828
6829 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6830
6831 /* Optional GNU/Linux-specific "registers". */
6832 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6833 if (feature)
6834 {
6835 tdesc_numbered_register (feature, tdesc_data,
6836 S390_ORIG_R2_REGNUM, "orig_r2");
6837
6838 if (tdesc_numbered_register (feature, tdesc_data,
6839 S390_LAST_BREAK_REGNUM, "last_break"))
6840 tdep->have_linux_v1 = true;
6841
6842 if (tdesc_numbered_register (feature, tdesc_data,
6843 S390_SYSTEM_CALL_REGNUM, "system_call"))
6844 tdep->have_linux_v2 = true;
6845
6846 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6847 return false;
6848 }
6849
6850 /* Transaction diagnostic block. */
6851 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6852 if (feature)
6853 {
6854 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6855 tdb_regs);
6856 tdep->have_tdb = true;
6857 }
6858
6859 /* Vector registers. */
6860 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6861 if (feature)
6862 {
6863 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6864 vxrs_low);
6865 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6866 vxrs_high);
6867 tdep->have_vx = true;
6868 }
6869
6870 /* Guarded-storage registers. */
6871 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6872 if (feature)
6873 {
6874 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6875 tdep->have_gs = true;
6876 }
6877
6878 /* Guarded-storage broadcast control. */
6879 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6880 if (feature)
6881 {
6882 if (!tdep->have_gs)
6883 return false;
6884 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6885 gs_bc);
6886 }
6887
6888 return true;
6889 }
6890
6891 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6892 memory after use. */
6893
6894 static struct gdbarch_tdep *
6895 s390_gdbarch_tdep_alloc ()
6896 {
6897 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6898
6899 tdep->tdesc = NULL;
6900
6901 tdep->abi = ABI_NONE;
6902 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6903
6904 tdep->gpr_full_regnum = -1;
6905 tdep->v0_full_regnum = -1;
6906 tdep->pc_regnum = -1;
6907 tdep->cc_regnum = -1;
6908
6909 tdep->have_upper = false;
6910 tdep->have_linux_v1 = false;
6911 tdep->have_linux_v2 = false;
6912 tdep->have_tdb = false;
6913 tdep->have_vx = false;
6914 tdep->have_gs = false;
6915
6916 tdep->s390_syscall_record = NULL;
6917
6918 return tdep;
6919 }
6920
6921 /* Set up gdbarch struct. */
6922
6923 static struct gdbarch *
6924 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
6925 {
6926 const struct target_desc *tdesc = info.target_desc;
6927 int first_pseudo_reg, last_pseudo_reg;
6928 static const char *const stap_register_prefixes[] = { "%", NULL };
6929 static const char *const stap_register_indirection_prefixes[] = { "(",
6930 NULL };
6931 static const char *const stap_register_indirection_suffixes[] = { ")",
6932 NULL };
6933
6934 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
6935 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
6936 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
6937 info.tdesc_data = tdesc_data;
6938
6939 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
6940 set_gdbarch_char_signed (gdbarch, 0);
6941
6942 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
6943 We can safely let them default to 128-bit, since the debug info
6944 will give the size of type actually used in each case. */
6945 set_gdbarch_long_double_bit (gdbarch, 128);
6946 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
6947
6948 /* Breakpoints. */
6949 /* Amount PC must be decremented by after a breakpoint. This is
6950 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
6951 always. */
6952 set_gdbarch_decr_pc_after_break (gdbarch, 2);
6953 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
6954 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
6955
6956 /* Displaced stepping. */
6957 set_gdbarch_displaced_step_copy_insn (gdbarch,
6958 s390_displaced_step_copy_insn);
6959 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
6960 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
6961 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
6962 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
6963 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
6964
6965 /* Prologue analysis. */
6966 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
6967
6968 /* Register handling. */
6969 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
6970 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
6971 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
6972 set_gdbarch_guess_tracepoint_registers (gdbarch,
6973 s390_guess_tracepoint_registers);
6974 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6975 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
6976 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
6977
6978 /* Pseudo registers. */
6979 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
6980 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
6981 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
6982 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
6983 set_tdesc_pseudo_register_reggroup_p (gdbarch,
6984 s390_pseudo_register_reggroup_p);
6985 set_gdbarch_ax_pseudo_register_collect (gdbarch,
6986 s390_ax_pseudo_register_collect);
6987 set_gdbarch_ax_pseudo_register_push_stack
6988 (gdbarch, s390_ax_pseudo_register_push_stack);
6989 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
6990
6991 /* Inferior function calls. */
6992 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
6993 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
6994 set_gdbarch_frame_align (gdbarch, s390_frame_align);
6995 set_gdbarch_return_value (gdbarch, s390_return_value);
6996
6997 /* Frame handling. */
6998 /* Stack grows downward. */
6999 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7000 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7001 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7002 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7003 dwarf2_append_unwinders (gdbarch);
7004 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7005 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7006
7007 switch (info.bfd_arch_info->mach)
7008 {
7009 case bfd_mach_s390_31:
7010 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7011 break;
7012
7013 case bfd_mach_s390_64:
7014 set_gdbarch_long_bit (gdbarch, 64);
7015 set_gdbarch_long_long_bit (gdbarch, 64);
7016 set_gdbarch_ptr_bit (gdbarch, 64);
7017 set_gdbarch_address_class_type_flags (gdbarch,
7018 s390_address_class_type_flags);
7019 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7020 s390_address_class_type_flags_to_name);
7021 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7022 s390_address_class_name_to_type_flags);
7023 break;
7024 }
7025
7026 /* SystemTap functions. */
7027 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7028 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7029 stap_register_indirection_prefixes);
7030 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7031 stap_register_indirection_suffixes);
7032
7033 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7034 set_gdbarch_valid_disassembler_options (gdbarch,
7035 disassembler_options_s390 ());
7036
7037 /* Process record-replay */
7038 set_gdbarch_process_record (gdbarch, s390_process_record);
7039
7040 /* Miscellaneous. */
7041 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7042 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7043 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7044
7045 /* Initialize the OSABI. */
7046 gdbarch_init_osabi (info, gdbarch);
7047
7048 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7049 cause GDB to crash with an internal error when the user tries to set
7050 an unsupported OSABI. */
7051 if (!tdesc_has_registers (tdesc))
7052 {
7053 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7054 tdesc = tdesc_s390_linux32;
7055 else
7056 tdesc = tdesc_s390x_linux64;
7057 }
7058 tdep->tdesc = tdesc;
7059
7060 /* Check any target description for validity. */
7061 if (!s390_tdesc_valid (tdep, tdesc_data))
7062 {
7063 tdesc_data_cleanup (tdesc_data);
7064 xfree (tdep);
7065 gdbarch_free (gdbarch);
7066 return NULL;
7067 }
7068
7069 /* Determine vector ABI. */
7070 #ifdef HAVE_ELF
7071 if (tdep->have_vx
7072 && info.abfd != NULL
7073 && info.abfd->format == bfd_object
7074 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7075 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7076 Tag_GNU_S390_ABI_Vector) == 2)
7077 tdep->vector_abi = S390_VECTOR_ABI_128;
7078 #endif
7079
7080 /* Find a candidate among extant architectures. */
7081 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7082 arches != NULL;
7083 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7084 {
7085 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7086 if (!tmp)
7087 continue;
7088 /* A program can 'choose' not to use the vector registers when they
7089 are present. Leading to the same tdesc but different tdep and
7090 thereby a different gdbarch. */
7091 if (tmp->vector_abi != tdep->vector_abi)
7092 continue;
7093
7094 tdesc_data_cleanup (tdesc_data);
7095 xfree (tdep);
7096 gdbarch_free (gdbarch);
7097 return arches->gdbarch;
7098 }
7099
7100 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7101 set_gdbarch_register_name (gdbarch, s390_register_name);
7102
7103 /* Assign pseudo register numbers. */
7104 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7105 last_pseudo_reg = first_pseudo_reg;
7106 if (tdep->have_upper)
7107 {
7108 tdep->gpr_full_regnum = last_pseudo_reg;
7109 last_pseudo_reg += 16;
7110 }
7111 if (tdep->have_vx)
7112 {
7113 tdep->v0_full_regnum = last_pseudo_reg;
7114 last_pseudo_reg += 16;
7115 }
7116 tdep->pc_regnum = last_pseudo_reg++;
7117 tdep->cc_regnum = last_pseudo_reg++;
7118 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7119 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7120
7121 /* Frame handling. */
7122 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7123 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7124 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7125 frame_base_set_default (gdbarch, &s390_frame_base);
7126
7127 return gdbarch;
7128 }
7129
7130 void
7131 _initialize_s390_tdep (void)
7132 {
7133 /* Hook us into the gdbarch mechanism. */
7134 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7135
7136 initialize_tdesc_s390_linux32 ();
7137 initialize_tdesc_s390x_linux64 ();
7138 }