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1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2022 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2/frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42 #include "inferior.h"
43
44 #include "features/s390-linux32.c"
45 #include "features/s390x-linux64.c"
46
47 /* Holds the current set of options to be passed to the disassembler. */
48 static char *s390_disassembler_options;
49
50 /* Breakpoints. */
51
52 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
53
54 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
55
56 /* Types. */
57
58 /* Implement the gdbarch type alignment method. */
59
60 static ULONGEST
61 s390_type_align (gdbarch *gdbarch, struct type *t)
62 {
63 t = check_typedef (t);
64
65 if (TYPE_LENGTH (t) > 8)
66 {
67 switch (t->code ())
68 {
69 case TYPE_CODE_INT:
70 case TYPE_CODE_RANGE:
71 case TYPE_CODE_FLT:
72 case TYPE_CODE_ENUM:
73 case TYPE_CODE_CHAR:
74 case TYPE_CODE_BOOL:
75 case TYPE_CODE_DECFLOAT:
76 return 8;
77
78 case TYPE_CODE_ARRAY:
79 if (t->is_vector ())
80 return 8;
81 break;
82 }
83 }
84 return 0;
85 }
86
87 /* Decoding S/390 instructions. */
88
89 /* Read a single instruction from address AT. */
90
91 static int
92 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
93 {
94 static int s390_instrlen[] = { 2, 4, 4, 6 };
95 int instrlen;
96
97 if (target_read_memory (at, &instr[0], 2))
98 return -1;
99 instrlen = s390_instrlen[instr[0] >> 6];
100 if (instrlen > 2)
101 {
102 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
103 return -1;
104 }
105 return instrlen;
106 }
107
108 /* The functions below are for recognizing and decoding S/390
109 instructions of various formats. Each of them checks whether INSN
110 is an instruction of the given format, with the specified opcodes.
111 If it is, it sets the remaining arguments to the values of the
112 instruction's fields, and returns a non-zero value; otherwise, it
113 returns zero.
114
115 These functions' arguments appear in the order they appear in the
116 instruction, not in the machine-language form. So, opcodes always
117 come first, even though they're sometimes scattered around the
118 instructions. And displacements appear before base and extension
119 registers, as they do in the assembly syntax, not at the end, as
120 they do in the machine language.
121
122 Test for RI instruction format. */
123
124 static int
125 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
126 {
127 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
128 {
129 *r1 = (insn[1] >> 4) & 0xf;
130 /* i2 is a 16-bit signed quantity. */
131 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
132 return 1;
133 }
134 else
135 return 0;
136 }
137
138 /* Test for RIL instruction format. See comment on is_ri for details. */
139
140 static int
141 is_ril (bfd_byte *insn, int op1, int op2,
142 unsigned int *r1, int *i2)
143 {
144 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
145 {
146 *r1 = (insn[1] >> 4) & 0xf;
147 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
148 no sign extension is necessary, but we don't want to assume
149 that. */
150 *i2 = (((insn[2] << 24)
151 | (insn[3] << 16)
152 | (insn[4] << 8)
153 | (insn[5])) ^ 0x80000000) - 0x80000000;
154 return 1;
155 }
156 else
157 return 0;
158 }
159
160 /* Test for RR instruction format. See comment on is_ri for details. */
161
162 static int
163 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
164 {
165 if (insn[0] == op)
166 {
167 *r1 = (insn[1] >> 4) & 0xf;
168 *r2 = insn[1] & 0xf;
169 return 1;
170 }
171 else
172 return 0;
173 }
174
175 /* Test for RRE instruction format. See comment on is_ri for details. */
176
177 static int
178 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
179 {
180 if (((insn[0] << 8) | insn[1]) == op)
181 {
182 /* Yes, insn[3]. insn[2] is unused in RRE format. */
183 *r1 = (insn[3] >> 4) & 0xf;
184 *r2 = insn[3] & 0xf;
185 return 1;
186 }
187 else
188 return 0;
189 }
190
191 /* Test for RS instruction format. See comment on is_ri for details. */
192
193 static int
194 is_rs (bfd_byte *insn, int op,
195 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
196 {
197 if (insn[0] == op)
198 {
199 *r1 = (insn[1] >> 4) & 0xf;
200 *r3 = insn[1] & 0xf;
201 *b2 = (insn[2] >> 4) & 0xf;
202 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
203 return 1;
204 }
205 else
206 return 0;
207 }
208
209 /* Test for RSY instruction format. See comment on is_ri for details. */
210
211 static int
212 is_rsy (bfd_byte *insn, int op1, int op2,
213 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
214 {
215 if (insn[0] == op1
216 && insn[5] == op2)
217 {
218 *r1 = (insn[1] >> 4) & 0xf;
219 *r3 = insn[1] & 0xf;
220 *b2 = (insn[2] >> 4) & 0xf;
221 /* The 'long displacement' is a 20-bit signed integer. */
222 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
223 ^ 0x80000) - 0x80000;
224 return 1;
225 }
226 else
227 return 0;
228 }
229
230 /* Test for RX instruction format. See comment on is_ri for details. */
231
232 static int
233 is_rx (bfd_byte *insn, int op,
234 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
235 {
236 if (insn[0] == op)
237 {
238 *r1 = (insn[1] >> 4) & 0xf;
239 *x2 = insn[1] & 0xf;
240 *b2 = (insn[2] >> 4) & 0xf;
241 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
242 return 1;
243 }
244 else
245 return 0;
246 }
247
248 /* Test for RXY instruction format. See comment on is_ri for details. */
249
250 static int
251 is_rxy (bfd_byte *insn, int op1, int op2,
252 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
253 {
254 if (insn[0] == op1
255 && insn[5] == op2)
256 {
257 *r1 = (insn[1] >> 4) & 0xf;
258 *x2 = insn[1] & 0xf;
259 *b2 = (insn[2] >> 4) & 0xf;
260 /* The 'long displacement' is a 20-bit signed integer. */
261 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
262 ^ 0x80000) - 0x80000;
263 return 1;
264 }
265 else
266 return 0;
267 }
268
269 /* A helper for s390_software_single_step, decides if an instruction
270 is a partial-execution instruction that needs to be executed until
271 completion when in record mode. If it is, returns 1 and writes
272 instruction length to a pointer. */
273
274 static int
275 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
276 {
277 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
278 uint16_t insn;
279
280 insn = read_memory_integer (loc, 2, byte_order);
281
282 switch (insn >> 8)
283 {
284 case 0xa8: /* MVCLE */
285 *len = 4;
286 return 1;
287
288 case 0xeb:
289 {
290 insn = read_memory_integer (loc + 4, 2, byte_order);
291 if ((insn & 0xff) == 0x8e)
292 {
293 /* MVCLU */
294 *len = 6;
295 return 1;
296 }
297 }
298 break;
299 }
300
301 switch (insn)
302 {
303 case 0xb255: /* MVST */
304 case 0xb263: /* CMPSC */
305 case 0xb2a5: /* TRE */
306 case 0xb2a6: /* CU21 */
307 case 0xb2a7: /* CU12 */
308 case 0xb9b0: /* CU14 */
309 case 0xb9b1: /* CU24 */
310 case 0xb9b2: /* CU41 */
311 case 0xb9b3: /* CU42 */
312 case 0xb92a: /* KMF */
313 case 0xb92b: /* KMO */
314 case 0xb92f: /* KMC */
315 case 0xb92d: /* KMCTR */
316 case 0xb92e: /* KM */
317 case 0xb93c: /* PPNO */
318 case 0xb990: /* TRTT */
319 case 0xb991: /* TRTO */
320 case 0xb992: /* TROT */
321 case 0xb993: /* TROO */
322 *len = 4;
323 return 1;
324 }
325
326 return 0;
327 }
328
329 /* Implement the "software_single_step" gdbarch method, needed to single step
330 through instructions like MVCLE in record mode, to make sure they are
331 executed to completion. Without that, record will save the full length
332 of destination buffer on every iteration, even though the CPU will only
333 process about 4kiB of it each time, leading to O(n**2) memory and time
334 complexity. */
335
336 static std::vector<CORE_ADDR>
337 s390_software_single_step (struct regcache *regcache)
338 {
339 struct gdbarch *gdbarch = regcache->arch ();
340 CORE_ADDR loc = regcache_read_pc (regcache);
341 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
342 int len;
343 uint16_t insn;
344
345 /* Special handling only if recording. */
346 if (!record_full_is_used ())
347 return {};
348
349 /* First, match a partial instruction. */
350 if (!s390_is_partial_instruction (gdbarch, loc, &len))
351 return {};
352
353 loc += len;
354
355 /* Second, look for a branch back to it. */
356 insn = read_memory_integer (loc, 2, byte_order);
357 if (insn != 0xa714) /* BRC with mask 1 */
358 return {};
359
360 insn = read_memory_integer (loc + 2, 2, byte_order);
361 if (insn != (uint16_t) -(len / 2))
362 return {};
363
364 loc += 4;
365
366 /* Found it, step past the whole thing. */
367 return {loc};
368 }
369
370 /* Displaced stepping. */
371
372 /* Return true if INSN is a non-branch RIL-b or RIL-c format
373 instruction. */
374
375 static int
376 is_non_branch_ril (gdb_byte *insn)
377 {
378 gdb_byte op1 = insn[0];
379
380 if (op1 == 0xc4)
381 {
382 gdb_byte op2 = insn[1] & 0x0f;
383
384 switch (op2)
385 {
386 case 0x02: /* llhrl */
387 case 0x04: /* lghrl */
388 case 0x05: /* lhrl */
389 case 0x06: /* llghrl */
390 case 0x07: /* sthrl */
391 case 0x08: /* lgrl */
392 case 0x0b: /* stgrl */
393 case 0x0c: /* lgfrl */
394 case 0x0d: /* lrl */
395 case 0x0e: /* llgfrl */
396 case 0x0f: /* strl */
397 return 1;
398 }
399 }
400 else if (op1 == 0xc6)
401 {
402 gdb_byte op2 = insn[1] & 0x0f;
403
404 switch (op2)
405 {
406 case 0x00: /* exrl */
407 case 0x02: /* pfdrl */
408 case 0x04: /* cghrl */
409 case 0x05: /* chrl */
410 case 0x06: /* clghrl */
411 case 0x07: /* clhrl */
412 case 0x08: /* cgrl */
413 case 0x0a: /* clgrl */
414 case 0x0c: /* cgfrl */
415 case 0x0d: /* crl */
416 case 0x0e: /* clgfrl */
417 case 0x0f: /* clrl */
418 return 1;
419 }
420 }
421
422 return 0;
423 }
424
425 typedef buf_displaced_step_copy_insn_closure
426 s390_displaced_step_copy_insn_closure;
427
428 /* Implementation of gdbarch_displaced_step_copy_insn. */
429
430 static displaced_step_copy_insn_closure_up
431 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
432 CORE_ADDR from, CORE_ADDR to,
433 struct regcache *regs)
434 {
435 size_t len = gdbarch_max_insn_length (gdbarch);
436 std::unique_ptr<s390_displaced_step_copy_insn_closure> closure
437 (new s390_displaced_step_copy_insn_closure (len));
438 gdb_byte *buf = closure->buf.data ();
439
440 read_memory (from, buf, len);
441
442 /* Adjust the displacement field of PC-relative RIL instructions,
443 except branches. The latter are handled in the fixup hook. */
444 if (is_non_branch_ril (buf))
445 {
446 LONGEST offset;
447
448 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
449 offset = (from - to + offset * 2) / 2;
450
451 /* If the instruction is too far from the jump pad, punt. This
452 will usually happen with instructions in shared libraries.
453 We could probably support these by rewriting them to be
454 absolute or fully emulating them. */
455 if (offset < INT32_MIN || offset > INT32_MAX)
456 {
457 /* Let the core fall back to stepping over the breakpoint
458 in-line. */
459 displaced_debug_printf ("can't displaced step RIL instruction: offset "
460 "%s out of range", plongest (offset));
461
462 return NULL;
463 }
464
465 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
466 }
467
468 write_memory (to, buf, len);
469
470 displaced_debug_printf ("copy %s->%s: %s",
471 paddress (gdbarch, from), paddress (gdbarch, to),
472 displaced_step_dump_bytes (buf, len).c_str ());
473
474 /* This is a work around for a problem with g++ 4.8. */
475 return displaced_step_copy_insn_closure_up (closure.release ());
476 }
477
478 /* Fix up the state of registers and memory after having single-stepped
479 a displaced instruction. */
480
481 static void
482 s390_displaced_step_fixup (struct gdbarch *gdbarch,
483 displaced_step_copy_insn_closure *closure_,
484 CORE_ADDR from, CORE_ADDR to,
485 struct regcache *regs)
486 {
487 /* Our closure is a copy of the instruction. */
488 s390_displaced_step_copy_insn_closure *closure
489 = (s390_displaced_step_copy_insn_closure *) closure_;
490 gdb_byte *insn = closure->buf.data ();
491 static int s390_instrlen[] = { 2, 4, 4, 6 };
492 int insnlen = s390_instrlen[insn[0] >> 6];
493
494 /* Fields for various kinds of instructions. */
495 unsigned int b2, r1, r2, x2, r3;
496 int i2, d2;
497
498 /* Get current PC and addressing mode bit. */
499 CORE_ADDR pc = regcache_read_pc (regs);
500 ULONGEST amode = 0;
501
502 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
503 {
504 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
505 amode &= 0x80000000;
506 }
507
508 displaced_debug_printf ("(s390) fixup (%s, %s) pc %s len %d amode 0x%x",
509 paddress (gdbarch, from), paddress (gdbarch, to),
510 paddress (gdbarch, pc), insnlen, (int) amode);
511
512 /* Handle absolute branch and save instructions. */
513 int op_basr_p = is_rr (insn, op_basr, &r1, &r2);
514 if (op_basr_p
515 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
516 {
517 /* Recompute saved return address in R1. */
518 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
519 amode | (from + insnlen));
520 /* Update PC iff the instruction doesn't actually branch. */
521 if (op_basr_p && r2 == 0)
522 regcache_write_pc (regs, from + insnlen);
523 }
524
525 /* Handle absolute branch instructions. */
526 else if (is_rr (insn, op_bcr, &r1, &r2)
527 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
528 || is_rr (insn, op_bctr, &r1, &r2)
529 || is_rre (insn, op_bctgr, &r1, &r2)
530 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
531 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
532 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
533 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
534 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
535 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
536 {
537 /* Update PC iff branch was *not* taken. */
538 if (pc == to + insnlen)
539 regcache_write_pc (regs, from + insnlen);
540 }
541
542 /* Handle PC-relative branch and save instructions. */
543 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
544 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
545 {
546 /* Update PC. */
547 regcache_write_pc (regs, pc - to + from);
548 /* Recompute saved return address in R1. */
549 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
550 amode | (from + insnlen));
551 }
552
553 /* Handle LOAD ADDRESS RELATIVE LONG. */
554 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
555 {
556 /* Update PC. */
557 regcache_write_pc (regs, from + insnlen);
558 /* Recompute output address in R1. */
559 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
560 amode | (from + i2 * 2));
561 }
562
563 /* If we executed a breakpoint instruction, point PC right back at it. */
564 else if (insn[0] == 0x0 && insn[1] == 0x1)
565 regcache_write_pc (regs, from);
566
567 /* For any other insn, adjust PC by negated displacement. PC then
568 points right after the original instruction, except for PC-relative
569 branches, where it points to the adjusted branch target. */
570 else
571 regcache_write_pc (regs, pc - to + from);
572
573 displaced_debug_printf ("(s390) pc is now %s",
574 paddress (gdbarch, regcache_read_pc (regs)));
575 }
576
577 /* Implement displaced_step_hw_singlestep gdbarch method. */
578
579 static bool
580 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch)
581 {
582 return true;
583 }
584
585 /* Prologue analysis. */
586
587 struct s390_prologue_data {
588
589 /* The stack. */
590 struct pv_area *stack;
591
592 /* The size and byte-order of a GPR or FPR. */
593 int gpr_size;
594 int fpr_size;
595 enum bfd_endian byte_order;
596
597 /* The general-purpose registers. */
598 pv_t gpr[S390_NUM_GPRS];
599
600 /* The floating-point registers. */
601 pv_t fpr[S390_NUM_FPRS];
602
603 /* The offset relative to the CFA where the incoming GPR N was saved
604 by the function prologue. 0 if not saved or unknown. */
605 int gpr_slot[S390_NUM_GPRS];
606
607 /* Likewise for FPRs. */
608 int fpr_slot[S390_NUM_FPRS];
609
610 /* Nonzero if the backchain was saved. This is assumed to be the
611 case when the incoming SP is saved at the current SP location. */
612 int back_chain_saved_p;
613 };
614
615 /* Return the effective address for an X-style instruction, like:
616
617 L R1, D2(X2, B2)
618
619 Here, X2 and B2 are registers, and D2 is a signed 20-bit
620 constant; the effective address is the sum of all three. If either
621 X2 or B2 are zero, then it doesn't contribute to the sum --- this
622 means that r0 can't be used as either X2 or B2. */
623
624 static pv_t
625 s390_addr (struct s390_prologue_data *data,
626 int d2, unsigned int x2, unsigned int b2)
627 {
628 pv_t result;
629
630 result = pv_constant (d2);
631 if (x2)
632 result = pv_add (result, data->gpr[x2]);
633 if (b2)
634 result = pv_add (result, data->gpr[b2]);
635
636 return result;
637 }
638
639 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
640
641 static void
642 s390_store (struct s390_prologue_data *data,
643 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
644 pv_t value)
645 {
646 pv_t addr = s390_addr (data, d2, x2, b2);
647 pv_t offset;
648
649 /* Check whether we are storing the backchain. */
650 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
651
652 if (pv_is_constant (offset) && offset.k == 0)
653 if (size == data->gpr_size
654 && pv_is_register_k (value, S390_SP_REGNUM, 0))
655 {
656 data->back_chain_saved_p = 1;
657 return;
658 }
659
660 /* Check whether we are storing a register into the stack. */
661 if (!data->stack->store_would_trash (addr))
662 data->stack->store (addr, size, value);
663
664 /* Note: If this is some store we cannot identify, you might think we
665 should forget our cached values, as any of those might have been hit.
666
667 However, we make the assumption that the register save areas are only
668 ever stored to once in any given function, and we do recognize these
669 stores. Thus every store we cannot recognize does not hit our data. */
670 }
671
672 /* Do a SIZE-byte load from D2(X2,B2). */
673
674 static pv_t
675 s390_load (struct s390_prologue_data *data,
676 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
677
678 {
679 pv_t addr = s390_addr (data, d2, x2, b2);
680
681 /* If it's a load from an in-line constant pool, then we can
682 simulate that, under the assumption that the code isn't
683 going to change between the time the processor actually
684 executed it creating the current frame, and the time when
685 we're analyzing the code to unwind past that frame. */
686 if (pv_is_constant (addr))
687 {
688 const struct target_section *secp
689 = target_section_by_addr (current_inferior ()->top_target (), addr.k);
690 if (secp != NULL
691 && (bfd_section_flags (secp->the_bfd_section) & SEC_READONLY))
692 return pv_constant (read_memory_integer (addr.k, size,
693 data->byte_order));
694 }
695
696 /* Check whether we are accessing one of our save slots. */
697 return data->stack->fetch (addr, size);
698 }
699
700 /* Function for finding saved registers in a 'struct pv_area'; we pass
701 this to pv_area::scan.
702
703 If VALUE is a saved register, ADDR says it was saved at a constant
704 offset from the frame base, and SIZE indicates that the whole
705 register was saved, record its offset in the reg_offset table in
706 PROLOGUE_UNTYPED. */
707
708 static void
709 s390_check_for_saved (void *data_untyped, pv_t addr,
710 CORE_ADDR size, pv_t value)
711 {
712 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
713 int i, offset;
714
715 if (!pv_is_register (addr, S390_SP_REGNUM))
716 return;
717
718 offset = 16 * data->gpr_size + 32 - addr.k;
719
720 /* If we are storing the original value of a register, we want to
721 record the CFA offset. If the same register is stored multiple
722 times, the stack slot with the highest address counts. */
723
724 for (i = 0; i < S390_NUM_GPRS; i++)
725 if (size == data->gpr_size
726 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
727 if (data->gpr_slot[i] == 0
728 || data->gpr_slot[i] > offset)
729 {
730 data->gpr_slot[i] = offset;
731 return;
732 }
733
734 for (i = 0; i < S390_NUM_FPRS; i++)
735 if (size == data->fpr_size
736 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
737 if (data->fpr_slot[i] == 0
738 || data->fpr_slot[i] > offset)
739 {
740 data->fpr_slot[i] = offset;
741 return;
742 }
743 }
744
745 /* Analyze the prologue of the function starting at START_PC, continuing at
746 most until CURRENT_PC. Initialize DATA to hold all information we find
747 out about the state of the registers and stack slots. Return the address
748 of the instruction after the last one that changed the SP, FP, or back
749 chain; or zero on error. */
750
751 static CORE_ADDR
752 s390_analyze_prologue (struct gdbarch *gdbarch,
753 CORE_ADDR start_pc,
754 CORE_ADDR current_pc,
755 struct s390_prologue_data *data)
756 {
757 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
758
759 /* Our return value:
760 The address of the instruction after the last one that changed
761 the SP, FP, or back chain; zero if we got an error trying to
762 read memory. */
763 CORE_ADDR result = start_pc;
764
765 /* The current PC for our abstract interpretation. */
766 CORE_ADDR pc;
767
768 /* The address of the next instruction after that. */
769 CORE_ADDR next_pc;
770
771 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
772 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
773
774 /* Set up everything's initial value. */
775 {
776 int i;
777
778 /* For the purpose of prologue tracking, we consider the GPR size to
779 be equal to the ABI word size, even if it is actually larger
780 (i.e. when running a 32-bit binary under a 64-bit kernel). */
781 data->gpr_size = word_size;
782 data->fpr_size = 8;
783 data->byte_order = gdbarch_byte_order (gdbarch);
784
785 for (i = 0; i < S390_NUM_GPRS; i++)
786 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
787
788 for (i = 0; i < S390_NUM_FPRS; i++)
789 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
790
791 for (i = 0; i < S390_NUM_GPRS; i++)
792 data->gpr_slot[i] = 0;
793
794 for (i = 0; i < S390_NUM_FPRS; i++)
795 data->fpr_slot[i] = 0;
796
797 data->back_chain_saved_p = 0;
798 }
799
800 /* Start interpreting instructions, until we hit the frame's
801 current PC or the first branch instruction. */
802 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
803 {
804 bfd_byte insn[S390_MAX_INSTR_SIZE];
805 int insn_len = s390_readinstruction (insn, pc);
806
807 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
808 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
809 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
810
811 /* Fields for various kinds of instructions. */
812 unsigned int b2, r1, r2, x2, r3;
813 int i2, d2;
814
815 /* The values of SP and FP before this instruction,
816 for detecting instructions that change them. */
817 pv_t pre_insn_sp, pre_insn_fp;
818 /* Likewise for the flag whether the back chain was saved. */
819 int pre_insn_back_chain_saved_p;
820
821 /* If we got an error trying to read the instruction, report it. */
822 if (insn_len < 0)
823 {
824 result = 0;
825 break;
826 }
827
828 next_pc = pc + insn_len;
829
830 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
831 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
832 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
833
834 /* LHI r1, i2 --- load halfword immediate. */
835 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
836 /* LGFI r1, i2 --- load fullword immediate. */
837 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
838 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
839 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
840 data->gpr[r1] = pv_constant (i2);
841
842 /* LR r1, r2 --- load from register. */
843 /* LGR r1, r2 --- load from register (64-bit version). */
844 else if (is_rr (insn32, op_lr, &r1, &r2)
845 || is_rre (insn64, op_lgr, &r1, &r2))
846 data->gpr[r1] = data->gpr[r2];
847
848 /* L r1, d2(x2, b2) --- load. */
849 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
850 /* LG r1, d2(x2, b2) --- load (64-bit version). */
851 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
852 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
853 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
854 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
855
856 /* ST r1, d2(x2, b2) --- store. */
857 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
858 /* STG r1, d2(x2, b2) --- store (64-bit version). */
859 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
860 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
861 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
862 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
863
864 /* STD r1, d2(x2,b2) --- store floating-point register. */
865 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
866 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
867
868 /* STM r1, r3, d2(b2) --- store multiple. */
869 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
870 version). */
871 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
872 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
873 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
874 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
875 {
876 for (; r1 <= r3; r1++, d2 += data->gpr_size)
877 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
878 }
879
880 /* AHI r1, i2 --- add halfword immediate. */
881 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
882 /* AFI r1, i2 --- add fullword immediate. */
883 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
884 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
885 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
886 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
887 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
888 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
889
890 /* ALFI r1, i2 --- add logical immediate. */
891 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
892 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
893 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
894 data->gpr[r1] = pv_add_constant (data->gpr[r1],
895 (CORE_ADDR)i2 & 0xffffffff);
896
897 /* AR r1, r2 -- add register. */
898 /* AGR r1, r2 -- add register (64-bit version). */
899 else if (is_rr (insn32, op_ar, &r1, &r2)
900 || is_rre (insn64, op_agr, &r1, &r2))
901 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
902
903 /* A r1, d2(x2, b2) -- add. */
904 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
905 /* AG r1, d2(x2, b2) -- add (64-bit version). */
906 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
907 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
908 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
909 data->gpr[r1] = pv_add (data->gpr[r1],
910 s390_load (data, d2, x2, b2, data->gpr_size));
911
912 /* SLFI r1, i2 --- subtract logical immediate. */
913 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
914 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
915 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
916 data->gpr[r1] = pv_add_constant (data->gpr[r1],
917 -((CORE_ADDR)i2 & 0xffffffff));
918
919 /* SR r1, r2 -- subtract register. */
920 /* SGR r1, r2 -- subtract register (64-bit version). */
921 else if (is_rr (insn32, op_sr, &r1, &r2)
922 || is_rre (insn64, op_sgr, &r1, &r2))
923 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
924
925 /* S r1, d2(x2, b2) -- subtract. */
926 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
927 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
928 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
929 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
930 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
931 data->gpr[r1] = pv_subtract (data->gpr[r1],
932 s390_load (data, d2, x2, b2, data->gpr_size));
933
934 /* LA r1, d2(x2, b2) --- load address. */
935 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
936 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
937 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
938 data->gpr[r1] = s390_addr (data, d2, x2, b2);
939
940 /* LARL r1, i2 --- load address relative long. */
941 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
942 data->gpr[r1] = pv_constant (pc + i2 * 2);
943
944 /* BASR r1, 0 --- branch and save.
945 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
946 else if (is_rr (insn, op_basr, &r1, &r2)
947 && r2 == 0)
948 data->gpr[r1] = pv_constant (next_pc);
949
950 /* BRAS r1, i2 --- branch relative and save. */
951 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
952 {
953 data->gpr[r1] = pv_constant (next_pc);
954 next_pc = pc + i2 * 2;
955
956 /* We'd better not interpret any backward branches. We'll
957 never terminate. */
958 if (next_pc <= pc)
959 break;
960 }
961
962 /* BRC/BRCL -- branch relative on condition. Ignore "branch
963 never", branch to following instruction, and "conditional
964 trap" (BRC +2). Otherwise terminate search. */
965 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
966 {
967 if (r1 != 0 && i2 != 1 && i2 != 2)
968 break;
969 }
970 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
971 {
972 if (r1 != 0 && i2 != 3)
973 break;
974 }
975
976 /* Terminate search when hitting any other branch instruction. */
977 else if (is_rr (insn, op_basr, &r1, &r2)
978 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
979 || is_rr (insn, op_bcr, &r1, &r2)
980 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
981 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
982 break;
983
984 else
985 {
986 /* An instruction we don't know how to simulate. The only
987 safe thing to do would be to set every value we're tracking
988 to 'unknown'. Instead, we'll be optimistic: we assume that
989 we *can* interpret every instruction that the compiler uses
990 to manipulate any of the data we're interested in here --
991 then we can just ignore anything else. */
992 }
993
994 /* Record the address after the last instruction that changed
995 the FP, SP, or backlink. Ignore instructions that changed
996 them back to their original values --- those are probably
997 restore instructions. (The back chain is never restored,
998 just popped.) */
999 {
1000 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1001 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1002
1003 if ((! pv_is_identical (pre_insn_sp, sp)
1004 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1005 && sp.kind != pvk_unknown)
1006 || (! pv_is_identical (pre_insn_fp, fp)
1007 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1008 && fp.kind != pvk_unknown)
1009 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1010 result = next_pc;
1011 }
1012 }
1013
1014 /* Record where all the registers were saved. */
1015 data->stack->scan (s390_check_for_saved, data);
1016
1017 return result;
1018 }
1019
1020 /* Advance PC across any function entry prologue instructions to reach
1021 some "real" code. */
1022
1023 static CORE_ADDR
1024 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1025 {
1026 struct s390_prologue_data data;
1027 CORE_ADDR skip_pc, func_addr;
1028
1029 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1030 {
1031 CORE_ADDR post_prologue_pc
1032 = skip_prologue_using_sal (gdbarch, func_addr);
1033 if (post_prologue_pc != 0)
1034 return std::max (pc, post_prologue_pc);
1035 }
1036
1037 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1038 return skip_pc ? skip_pc : pc;
1039 }
1040
1041 /* Register handling. */
1042
1043 /* ABI call-saved register information. */
1044
1045 static int
1046 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1047 {
1048 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1049
1050 switch (tdep->abi)
1051 {
1052 case ABI_LINUX_S390:
1053 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1054 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1055 || regnum == S390_A0_REGNUM)
1056 return 1;
1057
1058 break;
1059
1060 case ABI_LINUX_ZSERIES:
1061 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1062 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1063 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1064 return 1;
1065
1066 break;
1067 }
1068
1069 return 0;
1070 }
1071
1072 /* The "guess_tracepoint_registers" gdbarch method. */
1073
1074 static void
1075 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1076 struct regcache *regcache,
1077 CORE_ADDR addr)
1078 {
1079 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1080 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1081 gdb_byte *reg = (gdb_byte *) alloca (sz);
1082 ULONGEST pswm, pswa;
1083
1084 /* Set PSWA from the location and a default PSWM (the only part we're
1085 unlikely to get right is the CC). */
1086 if (tdep->abi == ABI_LINUX_S390)
1087 {
1088 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1089 was in 24-bit mode). */
1090 pswa = addr | 0x80000000UL;
1091 pswm = 0x070d0000UL;
1092 }
1093 else
1094 {
1095 pswa = addr;
1096 pswm = 0x0705000180000000ULL;
1097 }
1098
1099 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1100 regcache->raw_supply (S390_PSWA_REGNUM, reg);
1101
1102 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1103 regcache->raw_supply (S390_PSWM_REGNUM, reg);
1104 }
1105
1106 /* Return the name of register REGNO. Return the empty string for
1107 registers that shouldn't be visible. */
1108
1109 static const char *
1110 s390_register_name (struct gdbarch *gdbarch, int regnum)
1111 {
1112 if (regnum >= S390_V0_LOWER_REGNUM
1113 && regnum <= S390_V15_LOWER_REGNUM)
1114 return "";
1115 return tdesc_register_name (gdbarch, regnum);
1116 }
1117
1118 /* DWARF Register Mapping. */
1119
1120 static const short s390_dwarf_regmap[] =
1121 {
1122 /* 0-15: General Purpose Registers. */
1123 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1124 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1125 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1126 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1127
1128 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1129 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1130 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1131 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1132 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1133
1134 /* 32-47: Control Registers (not mapped). */
1135 -1, -1, -1, -1, -1, -1, -1, -1,
1136 -1, -1, -1, -1, -1, -1, -1, -1,
1137
1138 /* 48-63: Access Registers. */
1139 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1140 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1141 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1142 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1143
1144 /* 64-65: Program Status Word. */
1145 S390_PSWM_REGNUM,
1146 S390_PSWA_REGNUM,
1147
1148 /* 66-67: Reserved. */
1149 -1, -1,
1150
1151 /* 68-83: Vector Registers 16-31. */
1152 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1153 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1154 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1155 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1156
1157 /* End of "official" DWARF registers. The remainder of the map is
1158 for GDB internal use only. */
1159
1160 /* GPR Lower Half Access. */
1161 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1162 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1163 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1164 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1165 };
1166
1167 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1168
1169 /* Convert DWARF register number REG to the appropriate register
1170 number used by GDB. */
1171
1172 static int
1173 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1174 {
1175 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1176 int gdb_reg = -1;
1177
1178 /* In a 32-on-64 debug scenario, debug info refers to the full
1179 64-bit GPRs. Note that call frame information still refers to
1180 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1181 special register numbers to access GPRs. */
1182 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1183 return tdep->gpr_full_regnum + reg;
1184
1185 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1186 gdb_reg = s390_dwarf_regmap[reg];
1187
1188 if (tdep->v0_full_regnum == -1)
1189 {
1190 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1191 gdb_reg = -1;
1192 }
1193 else
1194 {
1195 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1196 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1197 }
1198
1199 return gdb_reg;
1200 }
1201
1202 /* Pseudo registers. */
1203
1204 /* Check whether REGNUM indicates a coupled general purpose register.
1205 These pseudo-registers are composed of two adjacent gprs. */
1206
1207 static int
1208 regnum_is_gpr_full (s390_gdbarch_tdep *tdep, int regnum)
1209 {
1210 return (tdep->gpr_full_regnum != -1
1211 && regnum >= tdep->gpr_full_regnum
1212 && regnum <= tdep->gpr_full_regnum + 15);
1213 }
1214
1215 /* Check whether REGNUM indicates a full vector register (v0-v15).
1216 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1217
1218 static int
1219 regnum_is_vxr_full (s390_gdbarch_tdep *tdep, int regnum)
1220 {
1221 return (tdep->v0_full_regnum != -1
1222 && regnum >= tdep->v0_full_regnum
1223 && regnum <= tdep->v0_full_regnum + 15);
1224 }
1225
1226 /* 'float' values are stored in the upper half of floating-point
1227 registers, even though we are otherwise a big-endian platform. The
1228 same applies to a 'float' value within a vector. */
1229
1230 static struct value *
1231 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1232 int regnum, struct frame_id frame_id)
1233 {
1234 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1235 struct value *value = default_value_from_register (gdbarch, type,
1236 regnum, frame_id);
1237 check_typedef (type);
1238
1239 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1240 && TYPE_LENGTH (type) < 8)
1241 || regnum_is_vxr_full (tdep, regnum)
1242 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1243 set_value_offset (value, 0);
1244
1245 return value;
1246 }
1247
1248 /* Implement pseudo_register_name tdesc method. */
1249
1250 static const char *
1251 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1252 {
1253 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1254
1255 if (regnum == tdep->pc_regnum)
1256 return "pc";
1257
1258 if (regnum == tdep->cc_regnum)
1259 return "cc";
1260
1261 if (regnum_is_gpr_full (tdep, regnum))
1262 {
1263 static const char *full_name[] = {
1264 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1265 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1266 };
1267 return full_name[regnum - tdep->gpr_full_regnum];
1268 }
1269
1270 if (regnum_is_vxr_full (tdep, regnum))
1271 {
1272 static const char *full_name[] = {
1273 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1274 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1275 };
1276 return full_name[regnum - tdep->v0_full_regnum];
1277 }
1278
1279 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1280 }
1281
1282 /* Implement pseudo_register_type tdesc method. */
1283
1284 static struct type *
1285 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1286 {
1287 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1288
1289 if (regnum == tdep->pc_regnum)
1290 return builtin_type (gdbarch)->builtin_func_ptr;
1291
1292 if (regnum == tdep->cc_regnum)
1293 return builtin_type (gdbarch)->builtin_int;
1294
1295 if (regnum_is_gpr_full (tdep, regnum))
1296 return builtin_type (gdbarch)->builtin_uint64;
1297
1298 /* For the "concatenated" vector registers use the same type as v16. */
1299 if (regnum_is_vxr_full (tdep, regnum))
1300 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
1301
1302 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1303 }
1304
1305 /* Implement pseudo_register_read gdbarch method. */
1306
1307 static enum register_status
1308 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1309 int regnum, gdb_byte *buf)
1310 {
1311 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1312 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1313 int regsize = register_size (gdbarch, regnum);
1314 ULONGEST val;
1315
1316 if (regnum == tdep->pc_regnum)
1317 {
1318 enum register_status status;
1319
1320 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1321 if (status == REG_VALID)
1322 {
1323 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1324 val &= 0x7fffffff;
1325 store_unsigned_integer (buf, regsize, byte_order, val);
1326 }
1327 return status;
1328 }
1329
1330 if (regnum == tdep->cc_regnum)
1331 {
1332 enum register_status status;
1333
1334 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1335 if (status == REG_VALID)
1336 {
1337 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1338 val = (val >> 12) & 3;
1339 else
1340 val = (val >> 44) & 3;
1341 store_unsigned_integer (buf, regsize, byte_order, val);
1342 }
1343 return status;
1344 }
1345
1346 if (regnum_is_gpr_full (tdep, regnum))
1347 {
1348 enum register_status status;
1349 ULONGEST val_upper;
1350
1351 regnum -= tdep->gpr_full_regnum;
1352
1353 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1354 if (status == REG_VALID)
1355 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1356 &val_upper);
1357 if (status == REG_VALID)
1358 {
1359 val |= val_upper << 32;
1360 store_unsigned_integer (buf, regsize, byte_order, val);
1361 }
1362 return status;
1363 }
1364
1365 if (regnum_is_vxr_full (tdep, regnum))
1366 {
1367 enum register_status status;
1368
1369 regnum -= tdep->v0_full_regnum;
1370
1371 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1372 if (status == REG_VALID)
1373 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1374 return status;
1375 }
1376
1377 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1378 }
1379
1380 /* Implement pseudo_register_write gdbarch method. */
1381
1382 static void
1383 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1384 int regnum, const gdb_byte *buf)
1385 {
1386 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1387 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1388 int regsize = register_size (gdbarch, regnum);
1389 ULONGEST val, psw;
1390
1391 if (regnum == tdep->pc_regnum)
1392 {
1393 val = extract_unsigned_integer (buf, regsize, byte_order);
1394 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1395 {
1396 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1397 val = (psw & 0x80000000) | (val & 0x7fffffff);
1398 }
1399 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1400 return;
1401 }
1402
1403 if (regnum == tdep->cc_regnum)
1404 {
1405 val = extract_unsigned_integer (buf, regsize, byte_order);
1406 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1407 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1408 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1409 else
1410 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1411 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1412 return;
1413 }
1414
1415 if (regnum_is_gpr_full (tdep, regnum))
1416 {
1417 regnum -= tdep->gpr_full_regnum;
1418 val = extract_unsigned_integer (buf, regsize, byte_order);
1419 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1420 val & 0xffffffff);
1421 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1422 val >> 32);
1423 return;
1424 }
1425
1426 if (regnum_is_vxr_full (tdep, regnum))
1427 {
1428 regnum -= tdep->v0_full_regnum;
1429 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1430 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1431 return;
1432 }
1433
1434 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1435 }
1436
1437 /* Register groups. */
1438
1439 /* Implement pseudo_register_reggroup_p tdesc method. */
1440
1441 static int
1442 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1443 const struct reggroup *group)
1444 {
1445 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1446
1447 /* We usually save/restore the whole PSW, which includes PC and CC.
1448 However, some older gdbservers may not support saving/restoring
1449 the whole PSW yet, and will return an XML register description
1450 excluding those from the save/restore register groups. In those
1451 cases, we still need to explicitly save/restore PC and CC in order
1452 to push or pop frames. Since this doesn't hurt anything if we
1453 already save/restore the whole PSW (it's just redundant), we add
1454 PC and CC at this point unconditionally. */
1455 if (group == save_reggroup || group == restore_reggroup)
1456 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1457
1458 if (group == vector_reggroup)
1459 return regnum_is_vxr_full (tdep, regnum);
1460
1461 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1462 return 0;
1463
1464 return default_register_reggroup_p (gdbarch, regnum, group);
1465 }
1466
1467 /* The "ax_pseudo_register_collect" gdbarch method. */
1468
1469 static int
1470 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1471 struct agent_expr *ax, int regnum)
1472 {
1473 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1474 if (regnum == tdep->pc_regnum)
1475 {
1476 ax_reg_mask (ax, S390_PSWA_REGNUM);
1477 }
1478 else if (regnum == tdep->cc_regnum)
1479 {
1480 ax_reg_mask (ax, S390_PSWM_REGNUM);
1481 }
1482 else if (regnum_is_gpr_full (tdep, regnum))
1483 {
1484 regnum -= tdep->gpr_full_regnum;
1485 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1486 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1487 }
1488 else if (regnum_is_vxr_full (tdep, regnum))
1489 {
1490 regnum -= tdep->v0_full_regnum;
1491 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1492 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1493 }
1494 else
1495 {
1496 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1497 }
1498 return 0;
1499 }
1500
1501 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1502
1503 static int
1504 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1505 struct agent_expr *ax, int regnum)
1506 {
1507 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1508 if (regnum == tdep->pc_regnum)
1509 {
1510 ax_reg (ax, S390_PSWA_REGNUM);
1511 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1512 {
1513 ax_zero_ext (ax, 31);
1514 }
1515 }
1516 else if (regnum == tdep->cc_regnum)
1517 {
1518 ax_reg (ax, S390_PSWM_REGNUM);
1519 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1520 ax_const_l (ax, 12);
1521 else
1522 ax_const_l (ax, 44);
1523 ax_simple (ax, aop_rsh_unsigned);
1524 ax_zero_ext (ax, 2);
1525 }
1526 else if (regnum_is_gpr_full (tdep, regnum))
1527 {
1528 regnum -= tdep->gpr_full_regnum;
1529 ax_reg (ax, S390_R0_REGNUM + regnum);
1530 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1531 ax_const_l (ax, 32);
1532 ax_simple (ax, aop_lsh);
1533 ax_simple (ax, aop_bit_or);
1534 }
1535 else if (regnum_is_vxr_full (tdep, regnum))
1536 {
1537 /* Too large to stuff on the stack. */
1538 return 1;
1539 }
1540 else
1541 {
1542 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1543 }
1544 return 0;
1545 }
1546
1547 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1548 just a best-effort method, and we don't really have the means to run
1549 the full unwinder here, just collect the link register. */
1550
1551 static void
1552 s390_gen_return_address (struct gdbarch *gdbarch,
1553 struct agent_expr *ax, struct axs_value *value,
1554 CORE_ADDR scope)
1555 {
1556 value->type = register_type (gdbarch, S390_R14_REGNUM);
1557 value->kind = axs_lvalue_register;
1558 value->u.reg = S390_R14_REGNUM;
1559 }
1560
1561 /* Address handling. */
1562
1563 /* Implement addr_bits_remove gdbarch method.
1564 Only used for ABI_LINUX_S390. */
1565
1566 static CORE_ADDR
1567 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1568 {
1569 return addr & 0x7fffffff;
1570 }
1571
1572 /* Implement addr_class_type_flags gdbarch method.
1573 Only used for ABI_LINUX_ZSERIES. */
1574
1575 static type_instance_flags
1576 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1577 {
1578 if (byte_size == 4)
1579 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1580 else
1581 return 0;
1582 }
1583
1584 /* Implement addr_class_type_flags_to_name gdbarch method.
1585 Only used for ABI_LINUX_ZSERIES. */
1586
1587 static const char *
1588 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch,
1589 type_instance_flags type_flags)
1590 {
1591 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1592 return "mode32";
1593 else
1594 return NULL;
1595 }
1596
1597 /* Implement addr_class_name_to_type_flags gdbarch method.
1598 Only used for ABI_LINUX_ZSERIES. */
1599
1600 static bool
1601 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1602 const char *name,
1603 type_instance_flags *type_flags_ptr)
1604 {
1605 if (strcmp (name, "mode32") == 0)
1606 {
1607 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1608 return true;
1609 }
1610 else
1611 return false;
1612 }
1613
1614 /* Inferior function calls. */
1615
1616 /* Dummy function calls. */
1617
1618 /* Unwrap any single-field structs in TYPE and return the effective
1619 "inner" type. E.g., yield "float" for all these cases:
1620
1621 float x;
1622 struct { float x };
1623 struct { struct { float x; } x; };
1624 struct { struct { struct { float x; } x; } x; };
1625
1626 However, if an inner type is smaller than MIN_SIZE, abort the
1627 unwrapping. */
1628
1629 static struct type *
1630 s390_effective_inner_type (struct type *type, unsigned int min_size)
1631 {
1632 while (type->code () == TYPE_CODE_STRUCT)
1633 {
1634 struct type *inner = NULL;
1635
1636 /* Find a non-static field, if any. Unless there's exactly one,
1637 abort the unwrapping. */
1638 for (int i = 0; i < type->num_fields (); i++)
1639 {
1640 struct field f = type->field (i);
1641
1642 if (field_is_static (&f))
1643 continue;
1644 if (inner != NULL)
1645 return type;
1646 inner = f.type ();
1647 }
1648
1649 if (inner == NULL)
1650 break;
1651 inner = check_typedef (inner);
1652 if (TYPE_LENGTH (inner) < min_size)
1653 break;
1654 type = inner;
1655 }
1656
1657 return type;
1658 }
1659
1660 /* Return non-zero if TYPE should be passed like "float" or
1661 "double". */
1662
1663 static int
1664 s390_function_arg_float (struct type *type)
1665 {
1666 /* Note that long double as well as complex types are intentionally
1667 excluded. */
1668 if (TYPE_LENGTH (type) > 8)
1669 return 0;
1670
1671 /* A struct containing just a float or double is passed like a float
1672 or double. */
1673 type = s390_effective_inner_type (type, 0);
1674
1675 return (type->code () == TYPE_CODE_FLT
1676 || type->code () == TYPE_CODE_DECFLOAT);
1677 }
1678
1679 /* Return non-zero if TYPE should be passed like a vector. */
1680
1681 static int
1682 s390_function_arg_vector (struct type *type)
1683 {
1684 if (TYPE_LENGTH (type) > 16)
1685 return 0;
1686
1687 /* Structs containing just a vector are passed like a vector. */
1688 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1689
1690 return type->code () == TYPE_CODE_ARRAY && type->is_vector ();
1691 }
1692
1693 /* Determine whether N is a power of two. */
1694
1695 static int
1696 is_power_of_two (unsigned int n)
1697 {
1698 return n && ((n & (n - 1)) == 0);
1699 }
1700
1701 /* For an argument whose type is TYPE and which is not passed like a
1702 float or vector, return non-zero if it should be passed like "int"
1703 or "long long". */
1704
1705 static int
1706 s390_function_arg_integer (struct type *type)
1707 {
1708 enum type_code code = type->code ();
1709
1710 if (TYPE_LENGTH (type) > 8)
1711 return 0;
1712
1713 if (code == TYPE_CODE_INT
1714 || code == TYPE_CODE_ENUM
1715 || code == TYPE_CODE_RANGE
1716 || code == TYPE_CODE_CHAR
1717 || code == TYPE_CODE_BOOL
1718 || code == TYPE_CODE_PTR
1719 || TYPE_IS_REFERENCE (type))
1720 return 1;
1721
1722 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1723 && is_power_of_two (TYPE_LENGTH (type)));
1724 }
1725
1726 /* Argument passing state: Internal data structure passed to helper
1727 routines of s390_push_dummy_call. */
1728
1729 struct s390_arg_state
1730 {
1731 /* Register cache, or NULL, if we are in "preparation mode". */
1732 struct regcache *regcache;
1733 /* Next available general/floating-point/vector register for
1734 argument passing. */
1735 int gr, fr, vr;
1736 /* Current pointer to copy area (grows downwards). */
1737 CORE_ADDR copy;
1738 /* Current pointer to parameter area (grows upwards). */
1739 CORE_ADDR argp;
1740 };
1741
1742 /* Prepare one argument ARG for a dummy call and update the argument
1743 passing state AS accordingly. If the regcache field in AS is set,
1744 operate in "write mode" and write ARG into the inferior. Otherwise
1745 run "preparation mode" and skip all updates to the inferior. */
1746
1747 static void
1748 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1749 s390_gdbarch_tdep *tdep, int word_size,
1750 enum bfd_endian byte_order, int is_unnamed)
1751 {
1752 struct type *type = check_typedef (value_type (arg));
1753 unsigned int length = TYPE_LENGTH (type);
1754 int write_mode = as->regcache != NULL;
1755
1756 if (s390_function_arg_float (type))
1757 {
1758 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1759 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1760 6. */
1761 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1762 {
1763 /* When we store a single-precision value in an FP register,
1764 it occupies the leftmost bits. */
1765 if (write_mode)
1766 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1767 value_contents (arg).data ());
1768 as->fr += 2;
1769 }
1770 else
1771 {
1772 /* When we store a single-precision value in a stack slot,
1773 it occupies the rightmost bits. */
1774 as->argp = align_up (as->argp + length, word_size);
1775 if (write_mode)
1776 write_memory (as->argp - length, value_contents (arg).data (),
1777 length);
1778 }
1779 }
1780 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1781 && s390_function_arg_vector (type))
1782 {
1783 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1784
1785 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1786 {
1787 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1788
1789 if (write_mode)
1790 as->regcache->cooked_write_part (regnum, 0, length,
1791 value_contents (arg).data ());
1792 as->vr++;
1793 }
1794 else
1795 {
1796 if (write_mode)
1797 write_memory (as->argp, value_contents (arg).data (), length);
1798 as->argp = align_up (as->argp + length, word_size);
1799 }
1800 }
1801 else if (s390_function_arg_integer (type) && length <= word_size)
1802 {
1803 /* Initialize it just to avoid a GCC false warning. */
1804 ULONGEST val = 0;
1805
1806 if (write_mode)
1807 {
1808 /* Place value in least significant bits of the register or
1809 memory word and sign- or zero-extend to full word size.
1810 This also applies to a struct or union. */
1811 val = type->is_unsigned ()
1812 ? extract_unsigned_integer (value_contents (arg).data (),
1813 length, byte_order)
1814 : extract_signed_integer (value_contents (arg).data (),
1815 length, byte_order);
1816 }
1817
1818 if (as->gr <= 6)
1819 {
1820 if (write_mode)
1821 regcache_cooked_write_unsigned (as->regcache,
1822 S390_R0_REGNUM + as->gr,
1823 val);
1824 as->gr++;
1825 }
1826 else
1827 {
1828 if (write_mode)
1829 write_memory_unsigned_integer (as->argp, word_size,
1830 byte_order, val);
1831 as->argp += word_size;
1832 }
1833 }
1834 else if (s390_function_arg_integer (type) && length == 8)
1835 {
1836 if (as->gr <= 5)
1837 {
1838 if (write_mode)
1839 {
1840 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1841 value_contents (arg).data ());
1842 as->regcache->cooked_write
1843 (S390_R0_REGNUM + as->gr + 1,
1844 value_contents (arg).data () + word_size);
1845 }
1846 as->gr += 2;
1847 }
1848 else
1849 {
1850 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1851 in it, then don't go back and use it again later. */
1852 as->gr = 7;
1853
1854 if (write_mode)
1855 write_memory (as->argp, value_contents (arg).data (), length);
1856 as->argp += length;
1857 }
1858 }
1859 else
1860 {
1861 /* This argument type is never passed in registers. Place the
1862 value in the copy area and pass a pointer to it. Use 8-byte
1863 alignment as a conservative assumption. */
1864 as->copy = align_down (as->copy - length, 8);
1865 if (write_mode)
1866 write_memory (as->copy, value_contents (arg).data (), length);
1867
1868 if (as->gr <= 6)
1869 {
1870 if (write_mode)
1871 regcache_cooked_write_unsigned (as->regcache,
1872 S390_R0_REGNUM + as->gr,
1873 as->copy);
1874 as->gr++;
1875 }
1876 else
1877 {
1878 if (write_mode)
1879 write_memory_unsigned_integer (as->argp, word_size,
1880 byte_order, as->copy);
1881 as->argp += word_size;
1882 }
1883 }
1884 }
1885
1886 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1887 place to be passed to a function, as specified by the "GNU/Linux
1888 for S/390 ELF Application Binary Interface Supplement".
1889
1890 SP is the current stack pointer. We must put arguments, links,
1891 padding, etc. whereever they belong, and return the new stack
1892 pointer value.
1893
1894 If STRUCT_RETURN is non-zero, then the function we're calling is
1895 going to return a structure by value; STRUCT_ADDR is the address of
1896 a block we've allocated for it on the stack.
1897
1898 Our caller has taken care of any type promotions needed to satisfy
1899 prototypes or the old K&R argument-passing rules. */
1900
1901 static CORE_ADDR
1902 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1903 struct regcache *regcache, CORE_ADDR bp_addr,
1904 int nargs, struct value **args, CORE_ADDR sp,
1905 function_call_return_method return_method,
1906 CORE_ADDR struct_addr)
1907 {
1908 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
1909 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1910 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1911 int i;
1912 struct s390_arg_state arg_state, arg_prep;
1913 CORE_ADDR param_area_start, new_sp;
1914 struct type *ftype = check_typedef (value_type (function));
1915
1916 if (ftype->code () == TYPE_CODE_PTR)
1917 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1918
1919 arg_prep.copy = sp;
1920 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
1921 arg_prep.fr = 0;
1922 arg_prep.vr = 0;
1923 arg_prep.argp = 0;
1924 arg_prep.regcache = NULL;
1925
1926 /* Initialize arg_state for "preparation mode". */
1927 arg_state = arg_prep;
1928
1929 /* Update arg_state.copy with the start of the reference-to-copy area
1930 and arg_state.argp with the size of the parameter area. */
1931 for (i = 0; i < nargs; i++)
1932 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1933 ftype->has_varargs () && i >= ftype->num_fields ());
1934
1935 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1936
1937 /* Allocate the standard frame areas: the register save area, the
1938 word reserved for the compiler, and the back chain pointer. */
1939 new_sp = param_area_start - (16 * word_size + 32);
1940
1941 /* Now we have the final stack pointer. Make sure we didn't
1942 underflow; on 31-bit, this would result in addresses with the
1943 high bit set, which causes confusion elsewhere. Note that if we
1944 error out here, stack and registers remain untouched. */
1945 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1946 error (_("Stack overflow"));
1947
1948 /* Pass the structure return address in general register 2. */
1949 if (return_method == return_method_struct)
1950 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1951
1952 /* Initialize arg_state for "write mode". */
1953 arg_state = arg_prep;
1954 arg_state.argp = param_area_start;
1955 arg_state.regcache = regcache;
1956
1957 /* Write all parameters. */
1958 for (i = 0; i < nargs; i++)
1959 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1960 ftype->has_varargs () && i >= ftype->num_fields ());
1961
1962 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1963 if (word_size == 4)
1964 {
1965 ULONGEST pswa;
1966 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1967 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1968 }
1969 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1970
1971 /* Store updated stack pointer. */
1972 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1973
1974 /* We need to return the 'stack part' of the frame ID,
1975 which is actually the top of the register save area. */
1976 return param_area_start;
1977 }
1978
1979 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1980 dummy frame. The frame ID's base needs to match the TOS value
1981 returned by push_dummy_call, and the PC match the dummy frame's
1982 breakpoint. */
1983
1984 static struct frame_id
1985 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1986 {
1987 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1988 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1989 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1990
1991 return frame_id_build (sp + 16*word_size + 32,
1992 get_frame_pc (this_frame));
1993 }
1994
1995 /* Implement frame_align gdbarch method. */
1996
1997 static CORE_ADDR
1998 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
1999 {
2000 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2001 always be aligned on an eight-byte boundary. */
2002 return (addr & -8);
2003 }
2004
2005 /* Helper for s390_return_value: Set or retrieve a function return
2006 value if it resides in a register. */
2007
2008 static void
2009 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2010 struct regcache *regcache,
2011 gdb_byte *out, const gdb_byte *in)
2012 {
2013 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2014 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2015 int length = TYPE_LENGTH (type);
2016 int code = type->code ();
2017
2018 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2019 {
2020 /* Float-like value: left-aligned in f0. */
2021 if (in != NULL)
2022 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
2023 else
2024 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
2025 }
2026 else if (code == TYPE_CODE_ARRAY)
2027 {
2028 /* Vector: left-aligned in v24. */
2029 if (in != NULL)
2030 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
2031 else
2032 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
2033 }
2034 else if (length <= word_size)
2035 {
2036 /* Integer: zero- or sign-extended in r2. */
2037 if (out != NULL)
2038 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2039 out);
2040 else if (type->is_unsigned ())
2041 regcache_cooked_write_unsigned
2042 (regcache, S390_R2_REGNUM,
2043 extract_unsigned_integer (in, length, byte_order));
2044 else
2045 regcache_cooked_write_signed
2046 (regcache, S390_R2_REGNUM,
2047 extract_signed_integer (in, length, byte_order));
2048 }
2049 else if (length == 2 * word_size)
2050 {
2051 /* Double word: in r2 and r3. */
2052 if (in != NULL)
2053 {
2054 regcache->cooked_write (S390_R2_REGNUM, in);
2055 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2056 }
2057 else
2058 {
2059 regcache->cooked_read (S390_R2_REGNUM, out);
2060 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2061 }
2062 }
2063 else
2064 internal_error (__FILE__, __LINE__, _("invalid return type"));
2065 }
2066
2067 /* Implement the 'return_value' gdbarch method. */
2068
2069 static enum return_value_convention
2070 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2071 struct type *type, struct regcache *regcache,
2072 gdb_byte *out, const gdb_byte *in)
2073 {
2074 enum return_value_convention rvc;
2075
2076 type = check_typedef (type);
2077
2078 switch (type->code ())
2079 {
2080 case TYPE_CODE_STRUCT:
2081 case TYPE_CODE_UNION:
2082 case TYPE_CODE_COMPLEX:
2083 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2084 break;
2085 case TYPE_CODE_ARRAY:
2086 {
2087 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2088 rvc = (tdep->vector_abi == S390_VECTOR_ABI_128
2089 && TYPE_LENGTH (type) <= 16 && type->is_vector ())
2090 ? RETURN_VALUE_REGISTER_CONVENTION
2091 : RETURN_VALUE_STRUCT_CONVENTION;
2092 break;
2093 }
2094 default:
2095 rvc = TYPE_LENGTH (type) <= 8
2096 ? RETURN_VALUE_REGISTER_CONVENTION
2097 : RETURN_VALUE_STRUCT_CONVENTION;
2098 }
2099
2100 if (in != NULL || out != NULL)
2101 {
2102 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2103 s390_register_return_value (gdbarch, type, regcache, out, in);
2104 else if (in != NULL)
2105 error (_("Cannot set function return value."));
2106 else
2107 error (_("Function return value unknown."));
2108 }
2109
2110 return rvc;
2111 }
2112
2113 /* Frame unwinding. */
2114
2115 /* Implement the stack_frame_destroyed_p gdbarch method. */
2116
2117 static int
2118 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2119 {
2120 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2121
2122 /* In frameless functions, there's no frame to destroy and thus
2123 we don't care about the epilogue.
2124
2125 In functions with frame, the epilogue sequence is a pair of
2126 a LM-type instruction that restores (amongst others) the
2127 return register %r14 and the stack pointer %r15, followed
2128 by a branch 'br %r14' --or equivalent-- that effects the
2129 actual return.
2130
2131 In that situation, this function needs to return 'true' in
2132 exactly one case: when pc points to that branch instruction.
2133
2134 Thus we try to disassemble the one instructions immediately
2135 preceding pc and check whether it is an LM-type instruction
2136 modifying the stack pointer.
2137
2138 Note that disassembling backwards is not reliable, so there
2139 is a slight chance of false positives here ... */
2140
2141 bfd_byte insn[6];
2142 unsigned int r1, r3, b2;
2143 int d2;
2144
2145 if (word_size == 4
2146 && !target_read_memory (pc - 4, insn, 4)
2147 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2148 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2149 return 1;
2150
2151 if (word_size == 4
2152 && !target_read_memory (pc - 6, insn, 6)
2153 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2154 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2155 return 1;
2156
2157 if (word_size == 8
2158 && !target_read_memory (pc - 6, insn, 6)
2159 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2160 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2161 return 1;
2162
2163 return 0;
2164 }
2165
2166 /* Implement unwind_pc gdbarch method. */
2167
2168 static CORE_ADDR
2169 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2170 {
2171 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2172 ULONGEST pc;
2173 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2174 return gdbarch_addr_bits_remove (gdbarch, pc);
2175 }
2176
2177 /* Implement unwind_sp gdbarch method. */
2178
2179 static CORE_ADDR
2180 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2181 {
2182 ULONGEST sp;
2183 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2184 return gdbarch_addr_bits_remove (gdbarch, sp);
2185 }
2186
2187 /* Helper routine to unwind pseudo registers. */
2188
2189 static struct value *
2190 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2191 {
2192 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2193 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2194 struct type *type = register_type (gdbarch, regnum);
2195
2196 /* Unwind PC via PSW address. */
2197 if (regnum == tdep->pc_regnum)
2198 {
2199 struct value *val;
2200
2201 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2202 if (!value_optimized_out (val))
2203 {
2204 LONGEST pswa = value_as_long (val);
2205
2206 if (TYPE_LENGTH (type) == 4)
2207 return value_from_pointer (type, pswa & 0x7fffffff);
2208 else
2209 return value_from_pointer (type, pswa);
2210 }
2211 }
2212
2213 /* Unwind CC via PSW mask. */
2214 if (regnum == tdep->cc_regnum)
2215 {
2216 struct value *val;
2217
2218 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2219 if (!value_optimized_out (val))
2220 {
2221 LONGEST pswm = value_as_long (val);
2222
2223 if (TYPE_LENGTH (type) == 4)
2224 return value_from_longest (type, (pswm >> 12) & 3);
2225 else
2226 return value_from_longest (type, (pswm >> 44) & 3);
2227 }
2228 }
2229
2230 /* Unwind full GPRs to show at least the lower halves (as the
2231 upper halves are undefined). */
2232 if (regnum_is_gpr_full (tdep, regnum))
2233 {
2234 int reg = regnum - tdep->gpr_full_regnum;
2235 struct value *val;
2236
2237 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2238 if (!value_optimized_out (val))
2239 return value_cast (type, val);
2240 }
2241
2242 return allocate_optimized_out_value (type);
2243 }
2244
2245 /* Translate a .eh_frame register to DWARF register, or adjust a
2246 .debug_frame register. */
2247
2248 static int
2249 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2250 {
2251 /* See s390_dwarf_reg_to_regnum for comments. */
2252 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2253 }
2254
2255 /* DWARF-2 frame unwinding. */
2256
2257 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2258 s390_dwarf2_frame_init_reg. */
2259
2260 static struct value *
2261 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2262 int regnum)
2263 {
2264 return s390_unwind_pseudo_register (this_frame, regnum);
2265 }
2266
2267 /* Implement init_reg dwarf2_frame method. */
2268
2269 static void
2270 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2271 struct dwarf2_frame_state_reg *reg,
2272 struct frame_info *this_frame)
2273 {
2274 /* The condition code (and thus PSW mask) is call-clobbered. */
2275 if (regnum == S390_PSWM_REGNUM)
2276 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2277
2278 /* The PSW address unwinds to the return address. */
2279 else if (regnum == S390_PSWA_REGNUM)
2280 reg->how = DWARF2_FRAME_REG_RA;
2281
2282 /* Fixed registers are call-saved or call-clobbered
2283 depending on the ABI in use. */
2284 else if (regnum < S390_NUM_REGS)
2285 {
2286 if (s390_register_call_saved (gdbarch, regnum))
2287 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2288 else
2289 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2290 }
2291
2292 /* We install a special function to unwind pseudos. */
2293 else
2294 {
2295 reg->how = DWARF2_FRAME_REG_FN;
2296 reg->loc.fn = s390_dwarf2_prev_register;
2297 }
2298 }
2299
2300 /* Frame unwinding. */
2301
2302 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2303 register translation. */
2304
2305 struct value *
2306 s390_trad_frame_prev_register (struct frame_info *this_frame,
2307 trad_frame_saved_reg saved_regs[],
2308 int regnum)
2309 {
2310 if (regnum < S390_NUM_REGS)
2311 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2312 else
2313 return s390_unwind_pseudo_register (this_frame, regnum);
2314 }
2315
2316 /* Normal stack frames. */
2317
2318 struct s390_unwind_cache {
2319
2320 CORE_ADDR func;
2321 CORE_ADDR frame_base;
2322 CORE_ADDR local_base;
2323
2324 trad_frame_saved_reg *saved_regs;
2325 };
2326
2327 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2328 prologue analysis. Helper for s390_frame_unwind_cache. */
2329
2330 static int
2331 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2332 struct s390_unwind_cache *info)
2333 {
2334 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2335 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2336 struct s390_prologue_data data;
2337 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2338 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2339 int i;
2340 CORE_ADDR cfa;
2341 CORE_ADDR func;
2342 CORE_ADDR result;
2343 ULONGEST reg;
2344 CORE_ADDR prev_sp;
2345 int frame_pointer;
2346 int size;
2347 struct frame_info *next_frame;
2348
2349 /* Try to find the function start address. If we can't find it, we don't
2350 bother searching for it -- with modern compilers this would be mostly
2351 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2352 or else a valid backchain ... */
2353 if (!get_frame_func_if_available (this_frame, &info->func))
2354 {
2355 info->func = -1;
2356 return 0;
2357 }
2358 func = info->func;
2359
2360 /* Try to analyze the prologue. */
2361 result = s390_analyze_prologue (gdbarch, func,
2362 get_frame_pc (this_frame), &data);
2363 if (!result)
2364 return 0;
2365
2366 /* If this was successful, we should have found the instruction that
2367 sets the stack pointer register to the previous value of the stack
2368 pointer minus the frame size. */
2369 if (!pv_is_register (*sp, S390_SP_REGNUM))
2370 return 0;
2371
2372 /* A frame size of zero at this point can mean either a real
2373 frameless function, or else a failure to find the prologue.
2374 Perform some sanity checks to verify we really have a
2375 frameless function. */
2376 if (sp->k == 0)
2377 {
2378 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2379 size zero. This is only possible if the next frame is a sentinel
2380 frame, a dummy frame, or a signal trampoline frame. */
2381 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2382 needed, instead the code should simpliy rely on its
2383 analysis. */
2384 next_frame = get_next_frame (this_frame);
2385 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2386 next_frame = get_next_frame (next_frame);
2387 if (next_frame
2388 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2389 return 0;
2390
2391 /* If we really have a frameless function, %r14 must be valid
2392 -- in particular, it must point to a different function. */
2393 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2394 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2395 if (get_pc_function_start (reg) == func)
2396 {
2397 /* However, there is one case where it *is* valid for %r14
2398 to point to the same function -- if this is a recursive
2399 call, and we have stopped in the prologue *before* the
2400 stack frame was allocated.
2401
2402 Recognize this case by looking ahead a bit ... */
2403
2404 struct s390_prologue_data data2;
2405 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2406
2407 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2408 && pv_is_register (*sp2, S390_SP_REGNUM)
2409 && sp2->k != 0))
2410 return 0;
2411 }
2412 }
2413
2414 /* OK, we've found valid prologue data. */
2415 size = -sp->k;
2416
2417 /* If the frame pointer originally also holds the same value
2418 as the stack pointer, we're probably using it. If it holds
2419 some other value -- even a constant offset -- it is most
2420 likely used as temp register. */
2421 if (pv_is_identical (*sp, *fp))
2422 frame_pointer = S390_FRAME_REGNUM;
2423 else
2424 frame_pointer = S390_SP_REGNUM;
2425
2426 /* If we've detected a function with stack frame, we'll still have to
2427 treat it as frameless if we're currently within the function epilog
2428 code at a point where the frame pointer has already been restored.
2429 This can only happen in an innermost frame. */
2430 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2431 instead the code should simpliy rely on its analysis. */
2432 next_frame = get_next_frame (this_frame);
2433 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2434 next_frame = get_next_frame (next_frame);
2435 if (size > 0
2436 && (next_frame == NULL
2437 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2438 {
2439 /* See the comment in s390_stack_frame_destroyed_p on why this is
2440 not completely reliable ... */
2441 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2442 {
2443 memset (&data, 0, sizeof (data));
2444 size = 0;
2445 frame_pointer = S390_SP_REGNUM;
2446 }
2447 }
2448
2449 /* Once we know the frame register and the frame size, we can unwind
2450 the current value of the frame register from the next frame, and
2451 add back the frame size to arrive that the previous frame's
2452 stack pointer value. */
2453 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2454 cfa = prev_sp + 16*word_size + 32;
2455
2456 /* Set up ABI call-saved/call-clobbered registers. */
2457 for (i = 0; i < S390_NUM_REGS; i++)
2458 if (!s390_register_call_saved (gdbarch, i))
2459 info->saved_regs[i].set_unknown ();
2460
2461 /* CC is always call-clobbered. */
2462 info->saved_regs[S390_PSWM_REGNUM].set_unknown ();
2463
2464 /* Record the addresses of all register spill slots the prologue parser
2465 has recognized. Consider only registers defined as call-saved by the
2466 ABI; for call-clobbered registers the parser may have recognized
2467 spurious stores. */
2468
2469 for (i = 0; i < 16; i++)
2470 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2471 && data.gpr_slot[i] != 0)
2472 info->saved_regs[S390_R0_REGNUM + i].set_addr (cfa - data.gpr_slot[i]);
2473
2474 for (i = 0; i < 16; i++)
2475 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2476 && data.fpr_slot[i] != 0)
2477 info->saved_regs[S390_F0_REGNUM + i].set_addr (cfa - data.fpr_slot[i]);
2478
2479 /* Function return will set PC to %r14. */
2480 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2481
2482 /* In frameless functions, we unwind simply by moving the return
2483 address to the PC. However, if we actually stored to the
2484 save area, use that -- we might only think the function frameless
2485 because we're in the middle of the prologue ... */
2486 if (size == 0
2487 && !info->saved_regs[S390_PSWA_REGNUM].is_addr ())
2488 {
2489 info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
2490 }
2491
2492 /* Another sanity check: unless this is a frameless function,
2493 we should have found spill slots for SP and PC.
2494 If not, we cannot unwind further -- this happens e.g. in
2495 libc's thread_start routine. */
2496 if (size > 0)
2497 {
2498 if (!info->saved_regs[S390_SP_REGNUM].is_addr ()
2499 || !info->saved_regs[S390_PSWA_REGNUM].is_addr ())
2500 prev_sp = -1;
2501 }
2502
2503 /* We use the current value of the frame register as local_base,
2504 and the top of the register save area as frame_base. */
2505 if (prev_sp != -1)
2506 {
2507 info->frame_base = prev_sp + 16*word_size + 32;
2508 info->local_base = prev_sp - size;
2509 }
2510
2511 return 1;
2512 }
2513
2514 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2515 back chain unwinding. Helper for s390_frame_unwind_cache. */
2516
2517 static void
2518 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2519 struct s390_unwind_cache *info)
2520 {
2521 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2522 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2523 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2524 CORE_ADDR backchain;
2525 ULONGEST reg;
2526 LONGEST sp, tmp;
2527 int i;
2528
2529 /* Set up ABI call-saved/call-clobbered registers. */
2530 for (i = 0; i < S390_NUM_REGS; i++)
2531 if (!s390_register_call_saved (gdbarch, i))
2532 info->saved_regs[i].set_unknown ();
2533
2534 /* CC is always call-clobbered. */
2535 info->saved_regs[S390_PSWM_REGNUM].set_unknown ();
2536
2537 /* Get the backchain. */
2538 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2539 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2540 tmp = 0;
2541 backchain = (CORE_ADDR) tmp;
2542
2543 /* A zero backchain terminates the frame chain. As additional
2544 sanity check, let's verify that the spill slot for SP in the
2545 save area pointed to by the backchain in fact links back to
2546 the save area. */
2547 if (backchain != 0
2548 && safe_read_memory_integer (backchain + 15*word_size,
2549 word_size, byte_order, &sp)
2550 && (CORE_ADDR)sp == backchain)
2551 {
2552 /* We don't know which registers were saved, but it will have
2553 to be at least %r14 and %r15. This will allow us to continue
2554 unwinding, but other prev-frame registers may be incorrect ... */
2555 info->saved_regs[S390_SP_REGNUM].set_addr (backchain + 15*word_size);
2556 info->saved_regs[S390_RETADDR_REGNUM].set_addr (backchain + 14*word_size);
2557
2558 /* Function return will set PC to %r14. */
2559 info->saved_regs[S390_PSWA_REGNUM]
2560 = info->saved_regs[S390_RETADDR_REGNUM];
2561
2562 /* We use the current value of the frame register as local_base,
2563 and the top of the register save area as frame_base. */
2564 info->frame_base = backchain + 16*word_size + 32;
2565 info->local_base = reg;
2566 }
2567
2568 info->func = get_frame_pc (this_frame);
2569 }
2570
2571 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2572 s390_frame_unwind and s390_frame_base. */
2573
2574 static struct s390_unwind_cache *
2575 s390_frame_unwind_cache (struct frame_info *this_frame,
2576 void **this_prologue_cache)
2577 {
2578 struct s390_unwind_cache *info;
2579
2580 if (*this_prologue_cache)
2581 return (struct s390_unwind_cache *) *this_prologue_cache;
2582
2583 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2584 *this_prologue_cache = info;
2585 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2586 info->func = -1;
2587 info->frame_base = -1;
2588 info->local_base = -1;
2589
2590 try
2591 {
2592 /* Try to use prologue analysis to fill the unwind cache.
2593 If this fails, fall back to reading the stack backchain. */
2594 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2595 s390_backchain_frame_unwind_cache (this_frame, info);
2596 }
2597 catch (const gdb_exception_error &ex)
2598 {
2599 if (ex.error != NOT_AVAILABLE_ERROR)
2600 throw;
2601 }
2602
2603 return info;
2604 }
2605
2606 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2607
2608 static void
2609 s390_frame_this_id (struct frame_info *this_frame,
2610 void **this_prologue_cache,
2611 struct frame_id *this_id)
2612 {
2613 struct s390_unwind_cache *info
2614 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2615
2616 if (info->frame_base == -1)
2617 {
2618 if (info->func != -1)
2619 *this_id = frame_id_build_unavailable_stack (info->func);
2620 return;
2621 }
2622
2623 *this_id = frame_id_build (info->frame_base, info->func);
2624 }
2625
2626 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2627
2628 static struct value *
2629 s390_frame_prev_register (struct frame_info *this_frame,
2630 void **this_prologue_cache, int regnum)
2631 {
2632 struct s390_unwind_cache *info
2633 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2634
2635 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2636 }
2637
2638 /* Default S390 frame unwinder. */
2639
2640 static const struct frame_unwind s390_frame_unwind = {
2641 "s390 prologue",
2642 NORMAL_FRAME,
2643 default_frame_unwind_stop_reason,
2644 s390_frame_this_id,
2645 s390_frame_prev_register,
2646 NULL,
2647 default_frame_sniffer
2648 };
2649
2650 /* Code stubs and their stack frames. For things like PLTs and NULL
2651 function calls (where there is no true frame and the return address
2652 is in the RETADDR register). */
2653
2654 struct s390_stub_unwind_cache
2655 {
2656 CORE_ADDR frame_base;
2657 trad_frame_saved_reg *saved_regs;
2658 };
2659
2660 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2661 s390_stub_frame_unwind. */
2662
2663 static struct s390_stub_unwind_cache *
2664 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2665 void **this_prologue_cache)
2666 {
2667 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2668 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2669 struct s390_stub_unwind_cache *info;
2670 ULONGEST reg;
2671
2672 if (*this_prologue_cache)
2673 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2674
2675 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2676 *this_prologue_cache = info;
2677 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2678
2679 /* The return address is in register %r14. */
2680 info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
2681
2682 /* Retrieve stack pointer and determine our frame base. */
2683 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2684 info->frame_base = reg + 16*word_size + 32;
2685
2686 return info;
2687 }
2688
2689 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2690
2691 static void
2692 s390_stub_frame_this_id (struct frame_info *this_frame,
2693 void **this_prologue_cache,
2694 struct frame_id *this_id)
2695 {
2696 struct s390_stub_unwind_cache *info
2697 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2698 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2699 }
2700
2701 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2702
2703 static struct value *
2704 s390_stub_frame_prev_register (struct frame_info *this_frame,
2705 void **this_prologue_cache, int regnum)
2706 {
2707 struct s390_stub_unwind_cache *info
2708 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2709 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2710 }
2711
2712 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2713
2714 static int
2715 s390_stub_frame_sniffer (const struct frame_unwind *self,
2716 struct frame_info *this_frame,
2717 void **this_prologue_cache)
2718 {
2719 CORE_ADDR addr_in_block;
2720 bfd_byte insn[S390_MAX_INSTR_SIZE];
2721
2722 /* If the current PC points to non-readable memory, we assume we
2723 have trapped due to an invalid function pointer call. We handle
2724 the non-existing current function like a PLT stub. */
2725 addr_in_block = get_frame_address_in_block (this_frame);
2726 if (in_plt_section (addr_in_block)
2727 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2728 return 1;
2729 return 0;
2730 }
2731
2732 /* S390 stub frame unwinder. */
2733
2734 static const struct frame_unwind s390_stub_frame_unwind = {
2735 "s390 stub",
2736 NORMAL_FRAME,
2737 default_frame_unwind_stop_reason,
2738 s390_stub_frame_this_id,
2739 s390_stub_frame_prev_register,
2740 NULL,
2741 s390_stub_frame_sniffer
2742 };
2743
2744 /* Frame base handling. */
2745
2746 static CORE_ADDR
2747 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2748 {
2749 struct s390_unwind_cache *info
2750 = s390_frame_unwind_cache (this_frame, this_cache);
2751 return info->frame_base;
2752 }
2753
2754 static CORE_ADDR
2755 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2756 {
2757 struct s390_unwind_cache *info
2758 = s390_frame_unwind_cache (this_frame, this_cache);
2759 return info->local_base;
2760 }
2761
2762 static const struct frame_base s390_frame_base = {
2763 &s390_frame_unwind,
2764 s390_frame_base_address,
2765 s390_local_base_address,
2766 s390_local_base_address
2767 };
2768
2769 /* Process record-replay */
2770
2771 /* Takes the intermediate sum of address calculations and masks off upper
2772 bits according to current addressing mode. */
2773
2774 static CORE_ADDR
2775 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2776 CORE_ADDR val)
2777 {
2778 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2779 ULONGEST pswm, pswa;
2780 int am;
2781 if (tdep->abi == ABI_LINUX_S390)
2782 {
2783 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2784 am = pswa >> 31 & 1;
2785 }
2786 else
2787 {
2788 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2789 am = pswm >> 31 & 3;
2790 }
2791 switch (am)
2792 {
2793 case 0:
2794 return val & 0xffffff;
2795 case 1:
2796 return val & 0x7fffffff;
2797 case 3:
2798 return val;
2799 default:
2800 gdb_printf (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2801 return 0;
2802 }
2803 }
2804
2805 /* Calculates memory address using pre-calculated index, raw instruction word
2806 with b and d/dl fields, and raw instruction byte with dh field. Index and
2807 dh should be set to 0 if unused. */
2808
2809 static CORE_ADDR
2810 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2811 ULONGEST x, uint16_t bd, int8_t dh)
2812 {
2813 uint8_t rb = bd >> 12 & 0xf;
2814 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2815 ULONGEST b;
2816 CORE_ADDR res = d + x;
2817 if (rb)
2818 {
2819 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2820 res += b;
2821 }
2822 return s390_record_address_mask (gdbarch, regcache, res);
2823 }
2824
2825 /* Calculates memory address using raw x, b + d/dl, dh fields from
2826 instruction. rx and dh should be set to 0 if unused. */
2827
2828 static CORE_ADDR
2829 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2830 uint8_t rx, uint16_t bd, int8_t dh)
2831 {
2832 ULONGEST x = 0;
2833 if (rx)
2834 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2835 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2836 }
2837
2838 /* Calculates memory address for VSCE[GF] instructions. */
2839
2840 static int
2841 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2842 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2843 int8_t dh, CORE_ADDR *res)
2844 {
2845 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2846 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2847 ULONGEST x;
2848 gdb_byte buf[16];
2849 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2850 return -1;
2851 if (vx < 16)
2852 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
2853 else
2854 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2855 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2856 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2857 return 0;
2858 }
2859
2860 /* Calculates memory address for instructions with relative long addressing. */
2861
2862 static CORE_ADDR
2863 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2864 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2865 {
2866 int32_t ri = i1 << 16 | i2;
2867 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2868 }
2869
2870 /* Population count helper. */
2871
2872 static int s390_popcnt (unsigned int x) {
2873 int res = 0;
2874 while (x)
2875 {
2876 if (x & 1)
2877 res++;
2878 x >>= 1;
2879 }
2880 return res;
2881 }
2882
2883 /* Record 64-bit register. */
2884
2885 static int
2886 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2887 {
2888 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2889 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2890 return -1;
2891 if (tdep->abi == ABI_LINUX_S390)
2892 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2893 return -1;
2894 return 0;
2895 }
2896
2897 /* Record high 32 bits of a register. */
2898
2899 static int
2900 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2901 {
2902 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2903 if (tdep->abi == ABI_LINUX_S390)
2904 {
2905 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2906 return -1;
2907 }
2908 else
2909 {
2910 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2911 return -1;
2912 }
2913 return 0;
2914 }
2915
2916 /* Record vector register. */
2917
2918 static int
2919 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2920 {
2921 if (i < 16)
2922 {
2923 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2924 return -1;
2925 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2926 return -1;
2927 }
2928 else
2929 {
2930 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2931 return -1;
2932 }
2933 return 0;
2934 }
2935
2936 /* Implement process_record gdbarch method. */
2937
2938 static int
2939 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2940 CORE_ADDR addr)
2941 {
2942 s390_gdbarch_tdep *tdep = gdbarch_tdep<s390_gdbarch_tdep> (gdbarch);
2943 uint16_t insn[3] = {0};
2944 /* Instruction as bytes. */
2945 uint8_t ibyte[6];
2946 /* Instruction as nibbles. */
2947 uint8_t inib[12];
2948 /* Instruction vector registers. */
2949 uint8_t ivec[4];
2950 CORE_ADDR oaddr, oaddr2, oaddr3;
2951 ULONGEST tmp;
2952 int i, n;
2953 /* if EX/EXRL instruction used, here's the reg parameter */
2954 int ex = -1;
2955 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2956
2957 /* Attempting to use EX or EXRL jumps back here */
2958 ex:
2959
2960 /* Read instruction. */
2961 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2962 /* If execute was involved, do the adjustment. */
2963 if (ex != -1)
2964 insn[0] |= ex & 0xff;
2965 /* Two highest bits determine instruction size. */
2966 if (insn[0] >= 0x4000)
2967 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2968 else
2969 /* Not necessary, but avoids uninitialized variable warnings. */
2970 insn[1] = 0;
2971 if (insn[0] >= 0xc000)
2972 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2973 else
2974 insn[2] = 0;
2975 /* Split instruction into bytes and nibbles. */
2976 for (i = 0; i < 3; i++)
2977 {
2978 ibyte[i*2] = insn[i] >> 8 & 0xff;
2979 ibyte[i*2+1] = insn[i] & 0xff;
2980 }
2981 for (i = 0; i < 6; i++)
2982 {
2983 inib[i*2] = ibyte[i] >> 4 & 0xf;
2984 inib[i*2+1] = ibyte[i] & 0xf;
2985 }
2986 /* Compute vector registers, if applicable. */
2987 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2988 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2989 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2990 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2991
2992 switch (ibyte[0])
2993 {
2994 /* 0x00 undefined */
2995
2996 case 0x01:
2997 /* E-format instruction */
2998 switch (ibyte[1])
2999 {
3000 /* 0x00 undefined */
3001 /* 0x01 unsupported: PR - program return */
3002 /* 0x02 unsupported: UPT */
3003 /* 0x03 undefined */
3004 /* 0x04 privileged: PTFF - perform timing facility function */
3005 /* 0x05-0x06 undefined */
3006 /* 0x07 privileged: SCKPF - set clock programmable field */
3007 /* 0x08-0x09 undefined */
3008
3009 case 0x0a: /* PFPO - perform floating point operation */
3010 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3011 if (!(tmp & 0x80000000u))
3012 {
3013 uint8_t ofc = tmp >> 16 & 0xff;
3014 switch (ofc)
3015 {
3016 case 0x00: /* HFP32 */
3017 case 0x01: /* HFP64 */
3018 case 0x05: /* BFP32 */
3019 case 0x06: /* BFP64 */
3020 case 0x08: /* DFP32 */
3021 case 0x09: /* DFP64 */
3022 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3023 return -1;
3024 break;
3025 case 0x02: /* HFP128 */
3026 case 0x07: /* BFP128 */
3027 case 0x0a: /* DFP128 */
3028 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3029 return -1;
3030 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3031 return -1;
3032 break;
3033 default:
3034 gdb_printf (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3035 ofc, paddress (gdbarch, addr));
3036 return -1;
3037 }
3038
3039 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3040 return -1;
3041 }
3042 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3043 return -1;
3044 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3045 return -1;
3046 break;
3047
3048 case 0x0b: /* TAM - test address mode */
3049 case 0x0c: /* SAM24 - set address mode 24 */
3050 case 0x0d: /* SAM31 - set address mode 31 */
3051 case 0x0e: /* SAM64 - set address mode 64 */
3052 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3053 return -1;
3054 break;
3055
3056 /* 0x0f-0xfe undefined */
3057
3058 /* 0xff unsupported: TRAP */
3059
3060 default:
3061 goto UNKNOWN_OP;
3062 }
3063 break;
3064
3065 /* 0x02 undefined */
3066 /* 0x03 undefined */
3067
3068 case 0x04: /* SPM - set program mask */
3069 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3070 return -1;
3071 break;
3072
3073 case 0x05: /* BALR - branch and link */
3074 case 0x45: /* BAL - branch and link */
3075 case 0x06: /* BCTR - branch on count */
3076 case 0x46: /* BCT - branch on count */
3077 case 0x0d: /* BASR - branch and save */
3078 case 0x4d: /* BAS - branch and save */
3079 case 0x84: /* BRXH - branch relative on index high */
3080 case 0x85: /* BRXLE - branch relative on index low or equal */
3081 case 0x86: /* BXH - branch on index high */
3082 case 0x87: /* BXLE - branch on index low or equal */
3083 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3084 use 32-bit destination as counter. */
3085 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3086 return -1;
3087 break;
3088
3089 case 0x07: /* BCR - branch on condition */
3090 case 0x47: /* BC - branch on condition */
3091 /* No effect other than PC transfer. */
3092 break;
3093
3094 /* 0x08 undefined */
3095 /* 0x09 undefined */
3096
3097 case 0x0a:
3098 /* SVC - supervisor call */
3099 if (tdep->s390_syscall_record != NULL)
3100 {
3101 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3102 return -1;
3103 }
3104 else
3105 {
3106 gdb_printf (gdb_stderr, _("no syscall record support\n"));
3107 return -1;
3108 }
3109 break;
3110
3111 case 0x0b: /* BSM - branch and set mode */
3112 if (inib[2])
3113 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3114 return -1;
3115 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3116 return -1;
3117 break;
3118
3119 case 0x0c: /* BASSM - branch and save and set mode */
3120 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3121 return -1;
3122 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3123 return -1;
3124 break;
3125
3126 case 0x0e: /* MVCL - move long [interruptible] */
3127 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3128 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3129 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3130 tmp &= 0xffffff;
3131 if (record_full_arch_list_add_mem (oaddr, tmp))
3132 return -1;
3133 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3134 return -1;
3135 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3136 return -1;
3137 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3138 return -1;
3139 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3140 return -1;
3141 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3142 return -1;
3143 break;
3144
3145 case 0x0f: /* CLCL - compare logical long [interruptible] */
3146 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3147 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3148 return -1;
3149 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3150 return -1;
3151 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3152 return -1;
3153 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3154 return -1;
3155 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3156 return -1;
3157 break;
3158
3159 case 0x10: /* LPR - load positive */
3160 case 0x11: /* LNR - load negative */
3161 case 0x12: /* LTR - load and test */
3162 case 0x13: /* LCR - load complement */
3163 case 0x14: /* NR - and */
3164 case 0x16: /* OR - or */
3165 case 0x17: /* XR - xor */
3166 case 0x1a: /* AR - add */
3167 case 0x1b: /* SR - subtract */
3168 case 0x1e: /* ALR - add logical */
3169 case 0x1f: /* SLR - subtract logical */
3170 case 0x54: /* N - and */
3171 case 0x56: /* O - or */
3172 case 0x57: /* X - xor */
3173 case 0x5a: /* A - add */
3174 case 0x5b: /* S - subtract */
3175 case 0x5e: /* AL - add logical */
3176 case 0x5f: /* SL - subtract logical */
3177 case 0x4a: /* AH - add halfword */
3178 case 0x4b: /* SH - subtract halfword */
3179 case 0x8a: /* SRA - shift right single */
3180 case 0x8b: /* SLA - shift left single */
3181 case 0xbf: /* ICM - insert characters under mask */
3182 /* 32-bit destination + flags */
3183 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3184 return -1;
3185 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3186 return -1;
3187 break;
3188
3189 case 0x15: /* CLR - compare logical */
3190 case 0x55: /* CL - compare logical */
3191 case 0x19: /* CR - compare */
3192 case 0x29: /* CDR - compare */
3193 case 0x39: /* CER - compare */
3194 case 0x49: /* CH - compare halfword */
3195 case 0x59: /* C - compare */
3196 case 0x69: /* CD - compare */
3197 case 0x79: /* CE - compare */
3198 case 0x91: /* TM - test under mask */
3199 case 0x95: /* CLI - compare logical */
3200 case 0xbd: /* CLM - compare logical under mask */
3201 case 0xd5: /* CLC - compare logical */
3202 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3203 return -1;
3204 break;
3205
3206 case 0x18: /* LR - load */
3207 case 0x48: /* LH - load halfword */
3208 case 0x58: /* L - load */
3209 case 0x41: /* LA - load address */
3210 case 0x43: /* IC - insert character */
3211 case 0x4c: /* MH - multiply halfword */
3212 case 0x71: /* MS - multiply single */
3213 case 0x88: /* SRL - shift right single logical */
3214 case 0x89: /* SLL - shift left single logical */
3215 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3216 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3217 return -1;
3218 break;
3219
3220 case 0x1c: /* MR - multiply */
3221 case 0x5c: /* M - multiply */
3222 case 0x1d: /* DR - divide */
3223 case 0x5d: /* D - divide */
3224 case 0x8c: /* SRDL - shift right double logical */
3225 case 0x8d: /* SLDL - shift left double logical */
3226 /* 32-bit pair destination, no flags */
3227 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3228 return -1;
3229 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3230 return -1;
3231 break;
3232
3233 case 0x20: /* LPDR - load positive */
3234 case 0x30: /* LPER - load positive */
3235 case 0x21: /* LNDR - load negative */
3236 case 0x31: /* LNER - load negative */
3237 case 0x22: /* LTDR - load and test */
3238 case 0x32: /* LTER - load and test */
3239 case 0x23: /* LCDR - load complement */
3240 case 0x33: /* LCER - load complement */
3241 case 0x2a: /* ADR - add */
3242 case 0x3a: /* AER - add */
3243 case 0x6a: /* AD - add */
3244 case 0x7a: /* AE - add */
3245 case 0x2b: /* SDR - subtract */
3246 case 0x3b: /* SER - subtract */
3247 case 0x6b: /* SD - subtract */
3248 case 0x7b: /* SE - subtract */
3249 case 0x2e: /* AWR - add unnormalized */
3250 case 0x3e: /* AUR - add unnormalized */
3251 case 0x6e: /* AW - add unnormalized */
3252 case 0x7e: /* AU - add unnormalized */
3253 case 0x2f: /* SWR - subtract unnormalized */
3254 case 0x3f: /* SUR - subtract unnormalized */
3255 case 0x6f: /* SW - subtract unnormalized */
3256 case 0x7f: /* SU - subtract unnormalized */
3257 /* float destination + flags */
3258 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3259 return -1;
3260 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3261 return -1;
3262 break;
3263
3264 case 0x24: /* HDR - halve */
3265 case 0x34: /* HER - halve */
3266 case 0x25: /* LDXR - load rounded */
3267 case 0x35: /* LEDR - load rounded */
3268 case 0x28: /* LDR - load */
3269 case 0x38: /* LER - load */
3270 case 0x68: /* LD - load */
3271 case 0x78: /* LE - load */
3272 case 0x2c: /* MDR - multiply */
3273 case 0x3c: /* MDER - multiply */
3274 case 0x6c: /* MD - multiply */
3275 case 0x7c: /* MDE - multiply */
3276 case 0x2d: /* DDR - divide */
3277 case 0x3d: /* DER - divide */
3278 case 0x6d: /* DD - divide */
3279 case 0x7d: /* DE - divide */
3280 /* float destination, no flags */
3281 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3282 return -1;
3283 break;
3284
3285 case 0x26: /* MXR - multiply */
3286 case 0x27: /* MXDR - multiply */
3287 case 0x67: /* MXD - multiply */
3288 /* float pair destination, no flags */
3289 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3290 return -1;
3291 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3292 return -1;
3293 break;
3294
3295 case 0x36: /* AXR - add */
3296 case 0x37: /* SXR - subtract */
3297 /* float pair destination + flags */
3298 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3299 return -1;
3300 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3301 return -1;
3302 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3303 return -1;
3304 break;
3305
3306 case 0x40: /* STH - store halfword */
3307 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3308 if (record_full_arch_list_add_mem (oaddr, 2))
3309 return -1;
3310 break;
3311
3312 case 0x42: /* STC - store character */
3313 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3314 if (record_full_arch_list_add_mem (oaddr, 1))
3315 return -1;
3316 break;
3317
3318 case 0x44: /* EX - execute */
3319 if (ex != -1)
3320 {
3321 gdb_printf (gdb_stdlog, "Warning: Double execute at %s.\n",
3322 paddress (gdbarch, addr));
3323 return -1;
3324 }
3325 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3326 if (inib[2])
3327 {
3328 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3329 ex = tmp & 0xff;
3330 }
3331 else
3332 {
3333 ex = 0;
3334 }
3335 goto ex;
3336
3337 case 0x4e: /* CVD - convert to decimal */
3338 case 0x60: /* STD - store */
3339 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3340 if (record_full_arch_list_add_mem (oaddr, 8))
3341 return -1;
3342 break;
3343
3344 case 0x4f: /* CVB - convert to binary */
3345 /* 32-bit gpr destination + FPC (DXC write) */
3346 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3347 return -1;
3348 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3349 return -1;
3350 break;
3351
3352 case 0x50: /* ST - store */
3353 case 0x70: /* STE - store */
3354 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3355 if (record_full_arch_list_add_mem (oaddr, 4))
3356 return -1;
3357 break;
3358
3359 case 0x51: /* LAE - load address extended */
3360 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3361 return -1;
3362 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3363 return -1;
3364 break;
3365
3366 /* 0x52 undefined */
3367 /* 0x53 undefined */
3368
3369 /* 0x61-0x66 undefined */
3370
3371 /* 0x72-0x77 undefined */
3372
3373 /* 0x80 privileged: SSM - set system mask */
3374 /* 0x81 undefined */
3375 /* 0x82 privileged: LPSW - load PSW */
3376 /* 0x83 privileged: diagnose */
3377
3378 case 0x8e: /* SRDA - shift right double */
3379 case 0x8f: /* SLDA - shift left double */
3380 /* 32-bit pair destination + flags */
3381 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3382 return -1;
3383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3384 return -1;
3385 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3386 return -1;
3387 break;
3388
3389 case 0x90: /* STM - store multiple */
3390 case 0x9b: /* STAM - store access multiple */
3391 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3392 if (inib[2] <= inib[3])
3393 n = inib[3] - inib[2] + 1;
3394 else
3395 n = inib[3] + 0x10 - inib[2] + 1;
3396 if (record_full_arch_list_add_mem (oaddr, n * 4))
3397 return -1;
3398 break;
3399
3400 case 0x92: /* MVI - move */
3401 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3402 if (record_full_arch_list_add_mem (oaddr, 1))
3403 return -1;
3404 break;
3405
3406 case 0x93: /* TS - test and set */
3407 case 0x94: /* NI - and */
3408 case 0x96: /* OI - or */
3409 case 0x97: /* XI - xor */
3410 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3411 if (record_full_arch_list_add_mem (oaddr, 1))
3412 return -1;
3413 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3414 return -1;
3415 break;
3416
3417 case 0x98: /* LM - load multiple */
3418 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3419 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3420 return -1;
3421 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3422 return -1;
3423 break;
3424
3425 /* 0x99 privileged: TRACE */
3426
3427 case 0x9a: /* LAM - load access multiple */
3428 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3429 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3430 return -1;
3431 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3432 return -1;
3433 break;
3434
3435 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3436 /* 0xa0-0xa4 undefined */
3437
3438 case 0xa5:
3439 case 0xa7:
3440 /* RI-format instruction */
3441 switch (ibyte[0] << 4 | inib[3])
3442 {
3443 case 0xa50: /* IIHH - insert immediate */
3444 case 0xa51: /* IIHL - insert immediate */
3445 /* high 32-bit destination */
3446 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3447 return -1;
3448 break;
3449
3450 case 0xa52: /* IILH - insert immediate */
3451 case 0xa53: /* IILL - insert immediate */
3452 case 0xa75: /* BRAS - branch relative and save */
3453 case 0xa76: /* BRCT - branch relative on count */
3454 case 0xa78: /* LHI - load halfword immediate */
3455 case 0xa7c: /* MHI - multiply halfword immediate */
3456 /* 32-bit or native destination */
3457 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3458 return -1;
3459 break;
3460
3461 case 0xa54: /* NIHH - and immediate */
3462 case 0xa55: /* NIHL - and immediate */
3463 case 0xa58: /* OIHH - or immediate */
3464 case 0xa59: /* OIHL - or immediate */
3465 /* high 32-bit destination + flags */
3466 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3467 return -1;
3468 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3469 return -1;
3470 break;
3471
3472 case 0xa56: /* NILH - and immediate */
3473 case 0xa57: /* NILL - and immediate */
3474 case 0xa5a: /* OILH - or immediate */
3475 case 0xa5b: /* OILL - or immediate */
3476 case 0xa7a: /* AHI - add halfword immediate */
3477 /* 32-bit destination + flags */
3478 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3479 return -1;
3480 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3481 return -1;
3482 break;
3483
3484 case 0xa5c: /* LLIHH - load logical immediate */
3485 case 0xa5d: /* LLIHL - load logical immediate */
3486 case 0xa5e: /* LLILH - load logical immediate */
3487 case 0xa5f: /* LLILL - load logical immediate */
3488 case 0xa77: /* BRCTG - branch relative on count */
3489 case 0xa79: /* LGHI - load halfword immediate */
3490 case 0xa7d: /* MGHI - multiply halfword immediate */
3491 /* 64-bit destination */
3492 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3493 return -1;
3494 break;
3495
3496 case 0xa70: /* TMLH - test under mask */
3497 case 0xa71: /* TMLL - test under mask */
3498 case 0xa72: /* TMHH - test under mask */
3499 case 0xa73: /* TMHL - test under mask */
3500 case 0xa7e: /* CHI - compare halfword immediate */
3501 case 0xa7f: /* CGHI - compare halfword immediate */
3502 /* flags only */
3503 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3504 return -1;
3505 break;
3506
3507 case 0xa74: /* BRC - branch relative on condition */
3508 /* no register change */
3509 break;
3510
3511 case 0xa7b: /* AGHI - add halfword immediate */
3512 /* 64-bit destination + flags */
3513 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3514 return -1;
3515 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3516 return -1;
3517 break;
3518
3519 default:
3520 goto UNKNOWN_OP;
3521 }
3522 break;
3523
3524 /* 0xa6 undefined */
3525
3526 case 0xa8: /* MVCLE - move long extended [partial] */
3527 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3528 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3529 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3530 if (record_full_arch_list_add_mem (oaddr, tmp))
3531 return -1;
3532 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3533 return -1;
3534 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3535 return -1;
3536 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3537 return -1;
3538 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3539 return -1;
3540 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3541 return -1;
3542 break;
3543
3544 /* 0xaa-0xab undefined */
3545 /* 0xac privileged: STNSM - store then and system mask */
3546 /* 0xad privileged: STOSM - store then or system mask */
3547 /* 0xae privileged: SIGP - signal processor */
3548 /* 0xaf unsupported: MC - monitor call */
3549 /* 0xb0 undefined */
3550 /* 0xb1 privileged: LRA - load real address */
3551
3552 case 0xb2:
3553 case 0xb3:
3554 case 0xb9:
3555 /* S/RRD/RRE/RRF/IE-format instruction */
3556 switch (insn[0])
3557 {
3558 /* 0xb200-0xb204 undefined or privileged */
3559
3560 case 0xb205: /* STCK - store clock */
3561 case 0xb27c: /* STCKF - store clock fast */
3562 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3563 if (record_full_arch_list_add_mem (oaddr, 8))
3564 return -1;
3565 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3566 return -1;
3567 break;
3568
3569 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3570 /* 0xb21a unsupported: CFC */
3571 /* 0xb21b-0xb221 undefined or privileged */
3572
3573 case 0xb222: /* IPM - insert program mask */
3574 case 0xb24f: /* EAR - extract access */
3575 case 0xb252: /* MSR - multiply single */
3576 case 0xb2ec: /* ETND - extract transaction nesting depth */
3577 case 0xb38c: /* EFPC - extract fpc */
3578 case 0xb91f: /* LRVR - load reversed */
3579 case 0xb926: /* LBR - load byte */
3580 case 0xb927: /* LHR - load halfword */
3581 case 0xb994: /* LLCR - load logical character */
3582 case 0xb995: /* LLHR - load logical halfword */
3583 case 0xb9f2: /* LOCR - load on condition */
3584 /* 32-bit gpr destination */
3585 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3586 return -1;
3587 break;
3588
3589 /* 0xb223-0xb22c privileged or unsupported */
3590
3591 case 0xb22d: /* DXR - divide */
3592 case 0xb325: /* LXDR - load lengthened */
3593 case 0xb326: /* LXER - load lengthened */
3594 case 0xb336: /* SQXR - square root */
3595 case 0xb365: /* LXR - load */
3596 case 0xb367: /* FIXR - load fp integer */
3597 case 0xb376: /* LZXR - load zero */
3598 case 0xb3b6: /* CXFR - convert from fixed */
3599 case 0xb3c6: /* CXGR - convert from fixed */
3600 case 0xb3fe: /* IEXTR - insert biased exponent */
3601 /* float pair destination */
3602 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3603 return -1;
3604 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3605 return -1;
3606 break;
3607
3608 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3609
3610 case 0xb241: /* CKSM - checksum [partial] */
3611 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3612 return -1;
3613 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3614 return -1;
3615 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3616 return -1;
3617 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3618 return -1;
3619 break;
3620
3621 /* 0xb242-0xb243 undefined */
3622
3623 case 0xb244: /* SQDR - square root */
3624 case 0xb245: /* SQER - square root */
3625 case 0xb324: /* LDER - load lengthened */
3626 case 0xb337: /* MEER - multiply */
3627 case 0xb366: /* LEXR - load rounded */
3628 case 0xb370: /* LPDFR - load positive */
3629 case 0xb371: /* LNDFR - load negative */
3630 case 0xb372: /* CSDFR - copy sign */
3631 case 0xb373: /* LCDFR - load complement */
3632 case 0xb374: /* LZER - load zero */
3633 case 0xb375: /* LZDR - load zero */
3634 case 0xb377: /* FIER - load fp integer */
3635 case 0xb37f: /* FIDR - load fp integer */
3636 case 0xb3b4: /* CEFR - convert from fixed */
3637 case 0xb3b5: /* CDFR - convert from fixed */
3638 case 0xb3c1: /* LDGR - load fpr from gr */
3639 case 0xb3c4: /* CEGR - convert from fixed */
3640 case 0xb3c5: /* CDGR - convert from fixed */
3641 case 0xb3f6: /* IEDTR - insert biased exponent */
3642 /* float destination */
3643 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3644 return -1;
3645 break;
3646
3647 /* 0xb246-0xb24c: privileged or unsupported */
3648
3649 case 0xb24d: /* CPYA - copy access */
3650 case 0xb24e: /* SAR - set access */
3651 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3652 return -1;
3653 break;
3654
3655 /* 0xb250-0xb251 undefined or privileged */
3656 /* 0xb253-0xb254 undefined or privileged */
3657
3658 case 0xb255: /* MVST - move string [partial] */
3659 {
3660 uint8_t end;
3661 gdb_byte cur;
3662 ULONGEST num = 0;
3663 /* Read ending byte. */
3664 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3665 end = tmp & 0xff;
3666 /* Get address of second operand. */
3667 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3668 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3669 /* Search for ending byte and compute length. */
3670 do {
3671 num++;
3672 if (target_read_memory (oaddr, &cur, 1))
3673 return -1;
3674 oaddr++;
3675 } while (cur != end);
3676 /* Get address of first operand and record it. */
3677 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3678 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3679 if (record_full_arch_list_add_mem (oaddr, num))
3680 return -1;
3681 /* Record the registers. */
3682 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3683 return -1;
3684 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3685 return -1;
3686 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3687 return -1;
3688 }
3689 break;
3690
3691 /* 0xb256 undefined */
3692
3693 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3694 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3695 return -1;
3696 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3697 return -1;
3698 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3699 return -1;
3700 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3701 return -1;
3702 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3703 return -1;
3704 break;
3705
3706 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3707
3708 case 0xb25d: /* CLST - compare logical string [partial] */
3709 case 0xb25e: /* SRST - search string [partial] */
3710 case 0xb9be: /* SRSTU - search string unicode [partial] */
3711 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3712 return -1;
3713 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3714 return -1;
3715 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3716 return -1;
3717 break;
3718
3719 /* 0xb25f-0xb262 undefined */
3720
3721 case 0xb263: /* CMPSC - compression call [interruptible] */
3722 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3723 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3724 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3725 if (record_full_arch_list_add_mem (oaddr, tmp))
3726 return -1;
3727 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3728 return -1;
3729 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3730 return -1;
3731 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3732 return -1;
3733 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3734 return -1;
3735 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3736 return -1;
3737 /* DXC may be written */
3738 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3739 return -1;
3740 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3741 return -1;
3742 break;
3743
3744 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3745
3746 case 0xb278: /* STCKE - store clock extended */
3747 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3748 if (record_full_arch_list_add_mem (oaddr, 16))
3749 return -1;
3750 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3751 return -1;
3752 break;
3753
3754 /* 0xb279-0xb27b undefined or unsupported */
3755 /* 0xb27d-0xb298 undefined or privileged */
3756
3757 case 0xb299: /* SRNM - set rounding mode */
3758 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3759 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3760 case 0xb29d: /* LFPC - load fpc */
3761 case 0xb2bd: /* LFAS - load fpc and signal */
3762 case 0xb384: /* SFPC - set fpc */
3763 case 0xb385: /* SFASR - set fpc and signal */
3764 case 0xb960: /* CGRT - compare and trap */
3765 case 0xb961: /* CLGRT - compare logical and trap */
3766 case 0xb972: /* CRT - compare and trap */
3767 case 0xb973: /* CLRT - compare logical and trap */
3768 /* fpc only - including possible DXC write for trapping insns */
3769 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3770 return -1;
3771 break;
3772
3773 /* 0xb29a-0xb29b undefined */
3774
3775 case 0xb29c: /* STFPC - store fpc */
3776 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3777 if (record_full_arch_list_add_mem (oaddr, 4))
3778 return -1;
3779 break;
3780
3781 /* 0xb29e-0xb2a4 undefined */
3782
3783 case 0xb2a5: /* TRE - translate extended [partial] */
3784 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3785 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3786 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3787 if (record_full_arch_list_add_mem (oaddr, tmp))
3788 return -1;
3789 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3790 return -1;
3791 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3792 return -1;
3793 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3794 return -1;
3795 break;
3796
3797 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3798 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3799 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3800 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3801 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3802 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3803 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3804 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3805 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3806 if (record_full_arch_list_add_mem (oaddr, tmp))
3807 return -1;
3808 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3809 return -1;
3810 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3811 return -1;
3812 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3813 return -1;
3814 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3815 return -1;
3816 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3817 return -1;
3818 break;
3819
3820 /* 0xb2a8-0xb2af undefined */
3821
3822 case 0xb2b0: /* STFLE - store facility list extended */
3823 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3824 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3825 tmp &= 0xff;
3826 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3827 return -1;
3828 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3829 return -1;
3830 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3831 return -1;
3832 break;
3833
3834 /* 0xb2b1-0xb2b7 undefined or privileged */
3835 /* 0xb2ba-0xb2bc undefined */
3836 /* 0xb2be-0xb2e7 undefined */
3837 /* 0xb2e9-0xb2eb undefined */
3838 /* 0xb2ed-0xb2f7 undefined */
3839 /* 0xb2f8 unsupported: TEND */
3840 /* 0xb2f9 undefined */
3841
3842 case 0xb2e8: /* PPA - perform processor assist */
3843 case 0xb2fa: /* NIAI - next instruction access intent */
3844 /* no visible effects */
3845 break;
3846
3847 /* 0xb2fb undefined */
3848 /* 0xb2fc unsupported: TABORT */
3849 /* 0xb2fd-0xb2fe undefined */
3850 /* 0xb2ff unsupported: TRAP */
3851
3852 case 0xb300: /* LPEBR - load positive */
3853 case 0xb301: /* LNEBR - load negative */
3854 case 0xb303: /* LCEBR - load complement */
3855 case 0xb310: /* LPDBR - load positive */
3856 case 0xb311: /* LNDBR - load negative */
3857 case 0xb313: /* LCDBR - load complement */
3858 case 0xb350: /* TBEDR - convert hfp to bfp */
3859 case 0xb351: /* TBDR - convert hfp to bfp */
3860 case 0xb358: /* THDER - convert bfp to hfp */
3861 case 0xb359: /* THDR - convert bfp to hfp */
3862 /* float destination + flags */
3863 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3864 return -1;
3865 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3866 return -1;
3867 break;
3868
3869 case 0xb304: /* LDEBR - load lengthened */
3870 case 0xb30c: /* MDEBR - multiply */
3871 case 0xb30d: /* DEBR - divide */
3872 case 0xb314: /* SQEBR - square root */
3873 case 0xb315: /* SQDBR - square root */
3874 case 0xb317: /* MEEBR - multiply */
3875 case 0xb31c: /* MDBR - multiply */
3876 case 0xb31d: /* DDBR - divide */
3877 case 0xb344: /* LEDBRA - load rounded */
3878 case 0xb345: /* LDXBRA - load rounded */
3879 case 0xb346: /* LEXBRA - load rounded */
3880 case 0xb357: /* FIEBRA - load fp integer */
3881 case 0xb35f: /* FIDBRA - load fp integer */
3882 case 0xb390: /* CELFBR - convert from logical */
3883 case 0xb391: /* CDLFBR - convert from logical */
3884 case 0xb394: /* CEFBR - convert from fixed */
3885 case 0xb395: /* CDFBR - convert from fixed */
3886 case 0xb3a0: /* CELGBR - convert from logical */
3887 case 0xb3a1: /* CDLGBR - convert from logical */
3888 case 0xb3a4: /* CEGBR - convert from fixed */
3889 case 0xb3a5: /* CDGBR - convert from fixed */
3890 case 0xb3d0: /* MDTR - multiply */
3891 case 0xb3d1: /* DDTR - divide */
3892 case 0xb3d4: /* LDETR - load lengthened */
3893 case 0xb3d5: /* LEDTR - load lengthened */
3894 case 0xb3d7: /* FIDTR - load fp integer */
3895 case 0xb3dd: /* LDXTR - load lengthened */
3896 case 0xb3f1: /* CDGTR - convert from fixed */
3897 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3898 case 0xb3f3: /* CDSTR - convert from signed packed */
3899 case 0xb3f5: /* QADTR - quantize */
3900 case 0xb3f7: /* RRDTR - reround */
3901 case 0xb951: /* CDFTR - convert from fixed */
3902 case 0xb952: /* CDLGTR - convert from logical */
3903 case 0xb953: /* CDLFTR - convert from logical */
3904 /* float destination + fpc */
3905 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3906 return -1;
3907 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3908 return -1;
3909 break;
3910
3911 case 0xb305: /* LXDBR - load lengthened */
3912 case 0xb306: /* LXEBR - load lengthened */
3913 case 0xb307: /* MXDBR - multiply */
3914 case 0xb316: /* SQXBR - square root */
3915 case 0xb34c: /* MXBR - multiply */
3916 case 0xb34d: /* DXBR - divide */
3917 case 0xb347: /* FIXBRA - load fp integer */
3918 case 0xb392: /* CXLFBR - convert from logical */
3919 case 0xb396: /* CXFBR - convert from fixed */
3920 case 0xb3a2: /* CXLGBR - convert from logical */
3921 case 0xb3a6: /* CXGBR - convert from fixed */
3922 case 0xb3d8: /* MXTR - multiply */
3923 case 0xb3d9: /* DXTR - divide */
3924 case 0xb3dc: /* LXDTR - load lengthened */
3925 case 0xb3df: /* FIXTR - load fp integer */
3926 case 0xb3f9: /* CXGTR - convert from fixed */
3927 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3928 case 0xb3fb: /* CXSTR - convert from signed packed */
3929 case 0xb3fd: /* QAXTR - quantize */
3930 case 0xb3ff: /* RRXTR - reround */
3931 case 0xb959: /* CXFTR - convert from fixed */
3932 case 0xb95a: /* CXLGTR - convert from logical */
3933 case 0xb95b: /* CXLFTR - convert from logical */
3934 /* float pair destination + fpc */
3935 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3936 return -1;
3937 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3938 return -1;
3939 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3940 return -1;
3941 break;
3942
3943 case 0xb308: /* KEBR - compare and signal */
3944 case 0xb309: /* CEBR - compare */
3945 case 0xb318: /* KDBR - compare and signal */
3946 case 0xb319: /* CDBR - compare */
3947 case 0xb348: /* KXBR - compare and signal */
3948 case 0xb349: /* CXBR - compare */
3949 case 0xb3e0: /* KDTR - compare and signal */
3950 case 0xb3e4: /* CDTR - compare */
3951 case 0xb3e8: /* KXTR - compare and signal */
3952 case 0xb3ec: /* CXTR - compare */
3953 /* flags + fpc only */
3954 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3955 return -1;
3956 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3957 return -1;
3958 break;
3959
3960 case 0xb302: /* LTEBR - load and test */
3961 case 0xb312: /* LTDBR - load and test */
3962 case 0xb30a: /* AEBR - add */
3963 case 0xb30b: /* SEBR - subtract */
3964 case 0xb31a: /* ADBR - add */
3965 case 0xb31b: /* SDBR - subtract */
3966 case 0xb3d2: /* ADTR - add */
3967 case 0xb3d3: /* SDTR - subtract */
3968 case 0xb3d6: /* LTDTR - load and test */
3969 /* float destination + flags + fpc */
3970 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3971 return -1;
3972 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3973 return -1;
3974 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3975 return -1;
3976 break;
3977
3978 case 0xb30e: /* MAEBR - multiply and add */
3979 case 0xb30f: /* MSEBR - multiply and subtract */
3980 case 0xb31e: /* MADBR - multiply and add */
3981 case 0xb31f: /* MSDBR - multiply and subtract */
3982 /* float destination [RRD] + fpc */
3983 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3984 return -1;
3985 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3986 return -1;
3987 break;
3988
3989 /* 0xb320-0xb323 undefined */
3990 /* 0xb327-0xb32d undefined */
3991
3992 case 0xb32e: /* MAER - multiply and add */
3993 case 0xb32f: /* MSER - multiply and subtract */
3994 case 0xb338: /* MAYLR - multiply and add unnormalized */
3995 case 0xb339: /* MYLR - multiply unnormalized */
3996 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3997 case 0xb33d: /* MYHR - multiply unnormalized */
3998 case 0xb33e: /* MADR - multiply and add */
3999 case 0xb33f: /* MSDR - multiply and subtract */
4000 /* float destination [RRD] */
4001 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4002 return -1;
4003 break;
4004
4005 /* 0xb330-0xb335 undefined */
4006
4007 case 0xb33a: /* MAYR - multiply and add unnormalized */
4008 case 0xb33b: /* MYR - multiply unnormalized */
4009 /* float pair destination [RRD] */
4010 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4011 return -1;
4012 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4013 return -1;
4014 break;
4015
4016 case 0xb340: /* LPXBR - load positive */
4017 case 0xb341: /* LNXBR - load negative */
4018 case 0xb343: /* LCXBR - load complement */
4019 case 0xb360: /* LPXR - load positive */
4020 case 0xb361: /* LNXR - load negative */
4021 case 0xb362: /* LTXR - load and test */
4022 case 0xb363: /* LCXR - load complement */
4023 /* float pair destination + flags */
4024 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4025 return -1;
4026 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4027 return -1;
4028 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4029 return -1;
4030 break;
4031
4032 case 0xb342: /* LTXBR - load and test */
4033 case 0xb34a: /* AXBR - add */
4034 case 0xb34b: /* SXBR - subtract */
4035 case 0xb3da: /* AXTR - add */
4036 case 0xb3db: /* SXTR - subtract */
4037 case 0xb3de: /* LTXTR - load and test */
4038 /* float pair destination + flags + fpc */
4039 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4040 return -1;
4041 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4042 return -1;
4043 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4044 return -1;
4045 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4046 return -1;
4047 break;
4048
4049 /* 0xb34e-0xb34f undefined */
4050 /* 0xb352 undefined */
4051
4052 case 0xb353: /* DIEBR - divide to integer */
4053 case 0xb35b: /* DIDBR - divide to integer */
4054 /* two float destinations + flags + fpc */
4055 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4056 return -1;
4057 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4058 return -1;
4059 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4060 return -1;
4061 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4062 return -1;
4063 break;
4064
4065 /* 0xb354-0xb356 undefined */
4066 /* 0xb35a undefined */
4067
4068 /* 0xb35c-0xb35e undefined */
4069 /* 0xb364 undefined */
4070 /* 0xb368 undefined */
4071
4072 case 0xb369: /* CXR - compare */
4073 case 0xb3f4: /* CEDTR - compare biased exponent */
4074 case 0xb3fc: /* CEXTR - compare biased exponent */
4075 case 0xb920: /* CGR - compare */
4076 case 0xb921: /* CLGR - compare logical */
4077 case 0xb930: /* CGFR - compare */
4078 case 0xb931: /* CLGFR - compare logical */
4079 case 0xb9cd: /* CHHR - compare high */
4080 case 0xb9cf: /* CLHHR - compare logical high */
4081 case 0xb9dd: /* CHLR - compare high */
4082 case 0xb9df: /* CLHLR - compare logical high */
4083 /* flags only */
4084 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4085 return -1;
4086 break;
4087
4088 /* 0xb36a-0xb36f undefined */
4089 /* 0xb377-0xb37e undefined */
4090 /* 0xb380-0xb383 undefined */
4091 /* 0xb386-0xb38b undefined */
4092 /* 0xb38d-0xb38f undefined */
4093 /* 0xb393 undefined */
4094 /* 0xb397 undefined */
4095
4096 case 0xb398: /* CFEBR - convert to fixed */
4097 case 0xb399: /* CFDBR - convert to fixed */
4098 case 0xb39a: /* CFXBR - convert to fixed */
4099 case 0xb39c: /* CLFEBR - convert to logical */
4100 case 0xb39d: /* CLFDBR - convert to logical */
4101 case 0xb39e: /* CLFXBR - convert to logical */
4102 case 0xb941: /* CFDTR - convert to fixed */
4103 case 0xb949: /* CFXTR - convert to fixed */
4104 case 0xb943: /* CLFDTR - convert to logical */
4105 case 0xb94b: /* CLFXTR - convert to logical */
4106 /* 32-bit gpr destination + flags + fpc */
4107 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4108 return -1;
4109 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4110 return -1;
4111 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4112 return -1;
4113 break;
4114
4115 /* 0xb39b undefined */
4116 /* 0xb39f undefined */
4117
4118 /* 0xb3a3 undefined */
4119 /* 0xb3a7 undefined */
4120
4121 case 0xb3a8: /* CGEBR - convert to fixed */
4122 case 0xb3a9: /* CGDBR - convert to fixed */
4123 case 0xb3aa: /* CGXBR - convert to fixed */
4124 case 0xb3ac: /* CLGEBR - convert to logical */
4125 case 0xb3ad: /* CLGDBR - convert to logical */
4126 case 0xb3ae: /* CLGXBR - convert to logical */
4127 case 0xb3e1: /* CGDTR - convert to fixed */
4128 case 0xb3e9: /* CGXTR - convert to fixed */
4129 case 0xb942: /* CLGDTR - convert to logical */
4130 case 0xb94a: /* CLGXTR - convert to logical */
4131 /* 64-bit gpr destination + flags + fpc */
4132 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4133 return -1;
4134 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4135 return -1;
4136 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4137 return -1;
4138 break;
4139
4140 /* 0xb3ab undefined */
4141 /* 0xb3af-0xb3b3 undefined */
4142 /* 0xb3b7 undefined */
4143
4144 case 0xb3b8: /* CFER - convert to fixed */
4145 case 0xb3b9: /* CFDR - convert to fixed */
4146 case 0xb3ba: /* CFXR - convert to fixed */
4147 case 0xb998: /* ALCR - add logical with carry */
4148 case 0xb999: /* SLBR - subtract logical with borrow */
4149 case 0xb9f4: /* NRK - and */
4150 case 0xb9f5: /* NCRK - and with complement */
4151 case 0xb9f6: /* ORK - or */
4152 case 0xb9f7: /* XRK - xor */
4153 case 0xb9f8: /* ARK - add */
4154 case 0xb9f9: /* SRK - subtract */
4155 case 0xb9fa: /* ALRK - add logical */
4156 case 0xb9fb: /* SLRK - subtract logical */
4157 /* 32-bit gpr destination + flags */
4158 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4159 return -1;
4160 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4161 return -1;
4162 break;
4163
4164 case 0xb3c8: /* CGER - convert to fixed */
4165 case 0xb3c9: /* CGDR - convert to fixed */
4166 case 0xb3ca: /* CGXR - convert to fixed */
4167 case 0xb900: /* LPGR - load positive */
4168 case 0xb901: /* LNGR - load negative */
4169 case 0xb902: /* LTGR - load and test */
4170 case 0xb903: /* LCGR - load complement */
4171 case 0xb908: /* AGR - add */
4172 case 0xb909: /* SGR - subtract */
4173 case 0xb90a: /* ALGR - add logical */
4174 case 0xb90b: /* SLGR - subtract logical */
4175 case 0xb910: /* LPGFR - load positive */
4176 case 0xb911: /* LNGFR - load negative */
4177 case 0xb912: /* LTGFR - load and test */
4178 case 0xb913: /* LCGFR - load complement */
4179 case 0xb918: /* AGFR - add */
4180 case 0xb919: /* SGFR - subtract */
4181 case 0xb91a: /* ALGFR - add logical */
4182 case 0xb91b: /* SLGFR - subtract logical */
4183 case 0xb964: /* NNGRK - and 64 bit */
4184 case 0xb965: /* OCGRK - or with complement 64 bit */
4185 case 0xb966: /* NOGRK - or 64 bit */
4186 case 0xb967: /* NXGRK - not exclusive or 64 bit */
4187 case 0xb974: /* NNRK - and 32 bit */
4188 case 0xb975: /* OCRK - or with complement 32 bit */
4189 case 0xb976: /* NORK - or 32 bit */
4190 case 0xb977: /* NXRK - not exclusive or 32 bit */
4191 case 0xb980: /* NGR - and */
4192 case 0xb981: /* OGR - or */
4193 case 0xb982: /* XGR - xor */
4194 case 0xb988: /* ALCGR - add logical with carry */
4195 case 0xb989: /* SLBGR - subtract logical with borrow */
4196 case 0xb9c0: /* SELFHR - select high */
4197 case 0xb9e1: /* POPCNT - population count */
4198 case 0xb9e4: /* NGRK - and */
4199 case 0xb9e5: /* NCGRK - and with complement */
4200 case 0xb9e6: /* OGRK - or */
4201 case 0xb9e7: /* XGRK - xor */
4202 case 0xb9e8: /* AGRK - add */
4203 case 0xb9e9: /* SGRK - subtract */
4204 case 0xb9ea: /* ALGRK - add logical */
4205 case 0xb9e3: /* SELGR - select 64 bit */
4206 case 0xb9eb: /* SLGRK - subtract logical */
4207 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4208 case 0xb9f0: /* SELR - select 32 bit */
4209 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4210 /* 64-bit gpr destination + flags */
4211 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4212 return -1;
4213 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4214 return -1;
4215 break;
4216
4217 /* 0xb3bb-0xb3c0 undefined */
4218 /* 0xb3c2-0xb3c3 undefined */
4219 /* 0xb3c7 undefined */
4220 /* 0xb3cb-0xb3cc undefined */
4221
4222 case 0xb3cd: /* LGDR - load gr from fpr */
4223 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4224 case 0xb3e3: /* CSDTR - convert to signed packed */
4225 case 0xb3e5: /* EEDTR - extract biased exponent */
4226 case 0xb3e7: /* ESDTR - extract significance */
4227 case 0xb3ed: /* EEXTR - extract biased exponent */
4228 case 0xb3ef: /* ESXTR - extract significance */
4229 case 0xb904: /* LGR - load */
4230 case 0xb906: /* LGBR - load byte */
4231 case 0xb907: /* LGHR - load halfword */
4232 case 0xb90c: /* MSGR - multiply single */
4233 case 0xb90f: /* LRVGR - load reversed */
4234 case 0xb914: /* LGFR - load */
4235 case 0xb916: /* LLGFR - load logical */
4236 case 0xb917: /* LLGTR - load logical thirty one bits */
4237 case 0xb91c: /* MSGFR - multiply single 64<32 */
4238 case 0xb946: /* BCTGR - branch on count */
4239 case 0xb984: /* LLGCR - load logical character */
4240 case 0xb985: /* LLGHR - load logical halfword */
4241 case 0xb9e2: /* LOCGR - load on condition */
4242 /* 64-bit gpr destination */
4243 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4244 return -1;
4245 break;
4246
4247 /* 0xb3ce-0xb3cf undefined */
4248 /* 0xb3e6 undefined */
4249
4250 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4251 case 0xb3eb: /* CSXTR - convert to signed packed */
4252 case 0xb90d: /* DSGR - divide single */
4253 case 0xb91d: /* DSGFR - divide single */
4254 case 0xb986: /* MLGR - multiply logical */
4255 case 0xb987: /* DLGR - divide logical */
4256 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4257 /* 64-bit gpr pair destination */
4258 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4259 return -1;
4260 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4261 return -1;
4262 break;
4263
4264 /* 0xb3ee undefined */
4265 /* 0xb3f0 undefined */
4266 /* 0xb3f8 undefined */
4267
4268 /* 0xb905 privileged */
4269
4270 /* 0xb90e unsupported: EREGG */
4271
4272 /* 0xb915 undefined */
4273
4274 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4275 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4276 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4277 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4278 tmp &= 0xff;
4279 switch (tmp)
4280 {
4281 case 0x00: /* KMAC-Query */
4282 if (record_full_arch_list_add_mem (oaddr, 16))
4283 return -1;
4284 break;
4285
4286 case 0x01: /* KMAC-DEA */
4287 case 0x02: /* KMAC-TDEA-128 */
4288 case 0x03: /* KMAC-TDEA-192 */
4289 case 0x09: /* KMAC-Encrypted-DEA */
4290 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4291 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4292 if (record_full_arch_list_add_mem (oaddr, 8))
4293 return -1;
4294 break;
4295
4296 case 0x12: /* KMAC-AES-128 */
4297 case 0x13: /* KMAC-AES-192 */
4298 case 0x14: /* KMAC-AES-256 */
4299 case 0x1a: /* KMAC-Encrypted-AES-128 */
4300 case 0x1b: /* KMAC-Encrypted-AES-192 */
4301 case 0x1c: /* KMAC-Encrypted-AES-256 */
4302 if (record_full_arch_list_add_mem (oaddr, 16))
4303 return -1;
4304 break;
4305
4306 default:
4307 gdb_printf (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4308 (int)tmp, paddress (gdbarch, addr));
4309 return -1;
4310 }
4311 if (tmp != 0)
4312 {
4313 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4314 return -1;
4315 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4316 return -1;
4317 }
4318 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4319 return -1;
4320 break;
4321
4322 /* 0xb922-0xb924 undefined */
4323 /* 0xb925 privileged */
4324 /* 0xb928 privileged */
4325
4326 case 0xb929: /* KMA - cipher message with authentication */
4327 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4328 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4329 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4330 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4331 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4332 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4333 tmp &= 0x7f;
4334 switch (tmp)
4335 {
4336 case 0x00: /* KM*-Query */
4337 if (record_full_arch_list_add_mem (oaddr, 16))
4338 return -1;
4339 break;
4340
4341 case 0x01: /* KM*-DEA */
4342 case 0x02: /* KM*-TDEA-128 */
4343 case 0x03: /* KM*-TDEA-192 */
4344 case 0x09: /* KM*-Encrypted-DEA */
4345 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4346 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4347 if (record_full_arch_list_add_mem (oaddr, 8))
4348 return -1;
4349 break;
4350
4351 case 0x12: /* KM*-AES-128 */
4352 case 0x13: /* KM*-AES-192 */
4353 case 0x14: /* KM*-AES-256 */
4354 case 0x1a: /* KM*-Encrypted-AES-128 */
4355 case 0x1b: /* KM*-Encrypted-AES-192 */
4356 case 0x1c: /* KM*-Encrypted-AES-256 */
4357 if (record_full_arch_list_add_mem (oaddr, 16))
4358 return -1;
4359 break;
4360
4361 case 0x43: /* KMC-PRNG */
4362 /* Only valid for KMC. */
4363 if (insn[0] == 0xb92f)
4364 {
4365 if (record_full_arch_list_add_mem (oaddr, 8))
4366 return -1;
4367 break;
4368 }
4369 /* For other instructions... */
4370 /* Fall through. */
4371 default:
4372 gdb_printf (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4373 (int)tmp, paddress (gdbarch, addr));
4374 return -1;
4375 }
4376 if (tmp != 0)
4377 {
4378 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4379 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4380 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4381 if (record_full_arch_list_add_mem (oaddr2, tmp))
4382 return -1;
4383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4384 return -1;
4385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4386 return -1;
4387 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4388 return -1;
4389 }
4390 if (tmp != 0 && insn[0] == 0xb929)
4391 {
4392 if (record_full_arch_list_add_reg (regcache,
4393 S390_R0_REGNUM + inib[4]))
4394 return -1;
4395 if (record_full_arch_list_add_reg (regcache,
4396 S390_R0_REGNUM + (inib[4] | 1)))
4397 return -1;
4398 }
4399 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4400 return -1;
4401 break;
4402
4403 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4404 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4405 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4406 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4407 tmp &= 0x7f;
4408 switch (tmp)
4409 {
4410 case 0x00: /* PCC-Query */
4411 if (record_full_arch_list_add_mem (oaddr, 16))
4412 return -1;
4413 break;
4414
4415 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4416 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4417 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4418 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4419 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4420 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4421 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4422 return -1;
4423 break;
4424
4425 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4426 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4427 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4428 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4429 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4430 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4431 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4432 return -1;
4433 break;
4434
4435 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4436 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4437 return -1;
4438 break;
4439
4440 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4441 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4442 return -1;
4443 break;
4444
4445 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4446 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4447 return -1;
4448 break;
4449
4450 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4451 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4452 return -1;
4453 break;
4454
4455 default:
4456 gdb_printf (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4457 (int)tmp, paddress (gdbarch, addr));
4458 return -1;
4459 }
4460 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4461 return -1;
4462 break;
4463
4464 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4465 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4466 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4467 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4468 tmp &= 0x7f;
4469 switch (tmp)
4470 {
4471 case 0x00: /* KMCTR-Query */
4472 if (record_full_arch_list_add_mem (oaddr, 16))
4473 return -1;
4474 break;
4475
4476 case 0x01: /* KMCTR-DEA */
4477 case 0x02: /* KMCTR-TDEA-128 */
4478 case 0x03: /* KMCTR-TDEA-192 */
4479 case 0x09: /* KMCTR-Encrypted-DEA */
4480 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4481 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4482 case 0x12: /* KMCTR-AES-128 */
4483 case 0x13: /* KMCTR-AES-192 */
4484 case 0x14: /* KMCTR-AES-256 */
4485 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4486 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4487 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4488 break;
4489
4490 default:
4491 gdb_printf (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4492 (int)tmp, paddress (gdbarch, addr));
4493 return -1;
4494 }
4495 if (tmp != 0)
4496 {
4497 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4498 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4499 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4500 if (record_full_arch_list_add_mem (oaddr2, tmp))
4501 return -1;
4502 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4503 return -1;
4504 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4505 return -1;
4506 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4507 return -1;
4508 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4509 return -1;
4510 }
4511 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4512 return -1;
4513 break;
4514
4515 case 0xb92e: /* KM - cipher message [partial] */
4516 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4517 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4518 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4519 tmp &= 0x7f;
4520 switch (tmp)
4521 {
4522 case 0x00: /* KM-Query */
4523 if (record_full_arch_list_add_mem (oaddr, 16))
4524 return -1;
4525 break;
4526
4527 case 0x01: /* KM-DEA */
4528 case 0x02: /* KM-TDEA-128 */
4529 case 0x03: /* KM-TDEA-192 */
4530 case 0x09: /* KM-Encrypted-DEA */
4531 case 0x0a: /* KM-Encrypted-TDEA-128 */
4532 case 0x0b: /* KM-Encrypted-TDEA-192 */
4533 case 0x12: /* KM-AES-128 */
4534 case 0x13: /* KM-AES-192 */
4535 case 0x14: /* KM-AES-256 */
4536 case 0x1a: /* KM-Encrypted-AES-128 */
4537 case 0x1b: /* KM-Encrypted-AES-192 */
4538 case 0x1c: /* KM-Encrypted-AES-256 */
4539 break;
4540
4541 case 0x32: /* KM-XTS-AES-128 */
4542 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4543 return -1;
4544 break;
4545
4546 case 0x34: /* KM-XTS-AES-256 */
4547 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4548 return -1;
4549 break;
4550
4551 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4552 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4553 return -1;
4554 break;
4555
4556 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4557 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4558 return -1;
4559 break;
4560
4561 default:
4562 gdb_printf (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4563 (int)tmp, paddress (gdbarch, addr));
4564 return -1;
4565 }
4566 if (tmp != 0)
4567 {
4568 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4569 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4570 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4571 if (record_full_arch_list_add_mem (oaddr2, tmp))
4572 return -1;
4573 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4574 return -1;
4575 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4576 return -1;
4577 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4578 return -1;
4579 }
4580 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4581 return -1;
4582 break;
4583
4584 /* 0xb932-0xb937 undefined */
4585
4586 /* 0xb938 unsupported: SORTL - sort lists */
4587 /* 0xb939 unsupported: DFLTCC - deflate conversion call */
4588 /* 0xb93a unsupported: KDSA - compute dig. signature auth. */
4589
4590 /* 0xb93b undefined */
4591
4592 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4593 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4594 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4595 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4596 tmp &= 0xff;
4597 switch (tmp)
4598 {
4599 case 0x00: /* PPNO-Query */
4600 case 0x80: /* PPNO-Query */
4601 if (record_full_arch_list_add_mem (oaddr, 16))
4602 return -1;
4603 break;
4604
4605 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4606 if (record_full_arch_list_add_mem (oaddr, 240))
4607 return -1;
4608 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4609 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4610 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4611 if (record_full_arch_list_add_mem (oaddr2, tmp))
4612 return -1;
4613 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4614 return -1;
4615 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4616 return -1;
4617 break;
4618
4619 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4620 if (record_full_arch_list_add_mem (oaddr, 240))
4621 return -1;
4622 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4623 return -1;
4624 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4625 return -1;
4626 break;
4627
4628 default:
4629 gdb_printf (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4630 (int)tmp, paddress (gdbarch, addr));
4631 return -1;
4632 }
4633 /* DXC may be written */
4634 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4635 return -1;
4636 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4637 return -1;
4638 break;
4639
4640 /* 0xb93d undefined */
4641
4642 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4643 case 0xb93f: /* KLMD - compute last message digest [partial] */
4644 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4645 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4646 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4647 tmp &= 0xff;
4648 switch (tmp)
4649 {
4650 case 0x00: /* K*MD-Query */
4651 if (record_full_arch_list_add_mem (oaddr, 16))
4652 return -1;
4653 break;
4654
4655 case 0x01: /* K*MD-SHA-1 */
4656 if (record_full_arch_list_add_mem (oaddr, 20))
4657 return -1;
4658 break;
4659
4660 case 0x02: /* K*MD-SHA-256 */
4661 if (record_full_arch_list_add_mem (oaddr, 32))
4662 return -1;
4663 break;
4664
4665 case 0x03: /* K*MD-SHA-512 */
4666 if (record_full_arch_list_add_mem (oaddr, 64))
4667 return -1;
4668 break;
4669
4670 case 0x41: /* KIMD-GHASH */
4671 /* Only valid for KIMD. */
4672 if (insn[0] == 0xb93e)
4673 {
4674 if (record_full_arch_list_add_mem (oaddr, 16))
4675 return -1;
4676 break;
4677 }
4678 /* For KLMD... */
4679 /* Fall through. */
4680 default:
4681 gdb_printf (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4682 (int)tmp, paddress (gdbarch, addr));
4683 return -1;
4684 }
4685 if (tmp != 0)
4686 {
4687 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4688 return -1;
4689 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4690 return -1;
4691 }
4692 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4693 return -1;
4694 break;
4695
4696 /* 0xb940 undefined */
4697 /* 0xb944-0xb945 undefined */
4698 /* 0xb947-0xb948 undefined */
4699 /* 0xb94c-0xb950 undefined */
4700 /* 0xb954-0xb958 undefined */
4701 /* 0xb95c-0xb95f undefined */
4702 /* 0xb962-0xb971 undefined */
4703 /* 0xb974-0xb97f undefined */
4704
4705 case 0xb983: /* FLOGR - find leftmost one */
4706 /* 64-bit gpr pair destination + flags */
4707 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4708 return -1;
4709 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4710 return -1;
4711 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4712 return -1;
4713 break;
4714
4715 /* 0xb98a privileged */
4716 /* 0xb98b-0xb98c undefined */
4717
4718 case 0xb98d: /* EPSW - extract psw */
4719 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4720 return -1;
4721 if (inib[7])
4722 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4723 return -1;
4724 break;
4725
4726 /* 0xb98e-0xb98f privileged */
4727
4728 case 0xb990: /* TRTT - translate two to two [partial] */
4729 case 0xb991: /* TRTO - translate two to one [partial] */
4730 case 0xb992: /* TROT - translate one to two [partial] */
4731 case 0xb993: /* TROO - translate one to one [partial] */
4732 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4733 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4734 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4735 /* tmp is source length, we want destination length. Adjust. */
4736 if (insn[0] == 0xb991)
4737 tmp >>= 1;
4738 if (insn[0] == 0xb992)
4739 tmp <<= 1;
4740 if (record_full_arch_list_add_mem (oaddr, tmp))
4741 return -1;
4742 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4743 return -1;
4744 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4745 return -1;
4746 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4747 return -1;
4748 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4749 return -1;
4750 break;
4751
4752 case 0xb996: /* MLR - multiply logical */
4753 case 0xb997: /* DLR - divide logical */
4754 /* 32-bit gpr pair destination */
4755 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4756 return -1;
4757 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4758 return -1;
4759 break;
4760
4761 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4762 /* 0xb9b4-0xb9bc undefined */
4763
4764 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4765 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4766 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4767 return -1;
4768 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4769 return -1;
4770 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4771 return -1;
4772 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4773 return -1;
4774 break;
4775
4776 /* 0xb9c0-0xb9c7 undefined */
4777
4778 case 0xb9c8: /* AHHHR - add high */
4779 case 0xb9c9: /* SHHHR - subtract high */
4780 case 0xb9ca: /* ALHHHR - add logical high */
4781 case 0xb9cb: /* SLHHHR - subtract logical high */
4782 case 0xb9d8: /* AHHLR - add high */
4783 case 0xb9d9: /* SHHLR - subtract high */
4784 case 0xb9da: /* ALHHLR - add logical high */
4785 case 0xb9db: /* SLHHLR - subtract logical high */
4786 /* 32-bit high gpr destination + flags */
4787 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4788 return -1;
4789 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4790 return -1;
4791 break;
4792
4793 /* 0xb9cc undefined */
4794 /* 0xb9ce undefined */
4795 /* 0xb9d0-0xb9d7 undefined */
4796 /* 0xb9dc undefined */
4797 /* 0xb9de undefined */
4798
4799 case 0xb9e0: /* LOCFHR - load high on condition */
4800 /* 32-bit high gpr destination */
4801 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4802 return -1;
4803 break;
4804
4805 /* 0xb9e3 undefined */
4806 /* 0xb9e5 undefined */
4807 /* 0xb9ee-0xb9f1 undefined */
4808 /* 0xb9f3 undefined */
4809 /* 0xb9f5 undefined */
4810 /* 0xb9fc undefined */
4811 /* 0xb9fe -0xb9ff undefined */
4812
4813 default:
4814 goto UNKNOWN_OP;
4815 }
4816 break;
4817
4818 /* 0xb4-0xb5 undefined */
4819 /* 0xb6 privileged: STCTL - store control */
4820 /* 0xb7 privileged: LCTL - load control */
4821 /* 0xb8 undefined */
4822
4823 case 0xba: /* CS - compare and swap */
4824 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4825 if (record_full_arch_list_add_mem (oaddr, 4))
4826 return -1;
4827 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4828 return -1;
4829 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4830 return -1;
4831 break;
4832
4833 case 0xbb: /* CDS - compare double and swap */
4834 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4835 if (record_full_arch_list_add_mem (oaddr, 8))
4836 return -1;
4837 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4838 return -1;
4839 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4840 return -1;
4841 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4842 return -1;
4843 break;
4844
4845 /* 0xbc undefined */
4846
4847 case 0xbe: /* STCM - store characters under mask */
4848 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4849 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4850 return -1;
4851 break;
4852
4853 case 0xc0:
4854 case 0xc2:
4855 case 0xc4:
4856 case 0xc6:
4857 case 0xcc:
4858 /* RIL-format instruction */
4859 switch (ibyte[0] << 4 | inib[3])
4860 {
4861 case 0xc00: /* LARL - load address relative long */
4862 case 0xc05: /* BRASL - branch relative and save long */
4863 case 0xc09: /* IILF - insert immediate */
4864 case 0xc21: /* MSFI - multiply single immediate */
4865 case 0xc42: /* LLHRL - load logical halfword relative long */
4866 case 0xc45: /* LHRL - load halfword relative long */
4867 case 0xc4d: /* LRL - load relative long */
4868 /* 32-bit or native gpr destination */
4869 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4870 return -1;
4871 break;
4872
4873 case 0xc01: /* LGFI - load immediate */
4874 case 0xc0e: /* LLIHF - load logical immediate */
4875 case 0xc0f: /* LLILF - load logical immediate */
4876 case 0xc20: /* MSGFI - multiply single immediate */
4877 case 0xc44: /* LGHRL - load halfword relative long */
4878 case 0xc46: /* LLGHRL - load logical halfword relative long */
4879 case 0xc48: /* LGRL - load relative long */
4880 case 0xc4c: /* LGFRL - load relative long */
4881 case 0xc4e: /* LLGFRL - load logical relative long */
4882 /* 64-bit gpr destination */
4883 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4884 return -1;
4885 break;
4886
4887 /* 0xc02-0xc03 undefined */
4888
4889 case 0xc04: /* BRCL - branch relative on condition long */
4890 case 0xc62: /* PFDRL - prefetch data relative long */
4891 break;
4892
4893 case 0xc06: /* XIHF - xor immediate */
4894 case 0xc0a: /* NIHF - and immediate */
4895 case 0xc0c: /* OIHF - or immediate */
4896 case 0xcc8: /* AIH - add immediate high */
4897 case 0xcca: /* ALSIH - add logical with signed immediate high */
4898 /* 32-bit high gpr destination + flags */
4899 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4900 return -1;
4901 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4902 return -1;
4903 break;
4904
4905 case 0xc07: /* XILF - xor immediate */
4906 case 0xc0b: /* NILF - and immediate */
4907 case 0xc0d: /* OILF - or immediate */
4908 case 0xc25: /* SLFI - subtract logical immediate */
4909 case 0xc29: /* AFI - add immediate */
4910 case 0xc2b: /* ALFI - add logical immediate */
4911 /* 32-bit gpr destination + flags */
4912 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4913 return -1;
4914 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4915 return -1;
4916 break;
4917
4918 case 0xc08: /* IIHF - insert immediate */
4919 case 0xcc6: /* BRCTH - branch relative on count high */
4920 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4921 /* 32-bit high gpr destination */
4922 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4923 return -1;
4924 break;
4925
4926 /* 0xc22-0xc23 undefined */
4927
4928 case 0xc24: /* SLGFI - subtract logical immediate */
4929 case 0xc28: /* AGFI - add immediate */
4930 case 0xc2a: /* ALGFI - add logical immediate */
4931 /* 64-bit gpr destination + flags */
4932 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4933 return -1;
4934 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4935 return -1;
4936 break;
4937
4938 /* 0xc26-0xc27 undefined */
4939
4940 case 0xc2c: /* CGFI - compare immediate */
4941 case 0xc2d: /* CFI - compare immediate */
4942 case 0xc2e: /* CLGFI - compare logical immediate */
4943 case 0xc2f: /* CLFI - compare logical immediate */
4944 case 0xc64: /* CGHRL - compare halfword relative long */
4945 case 0xc65: /* CHRL - compare halfword relative long */
4946 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4947 case 0xc67: /* CLHRL - compare logical halfword relative long */
4948 case 0xc68: /* CGRL - compare relative long */
4949 case 0xc6a: /* CLGRL - compare logical relative long */
4950 case 0xc6c: /* CGFRL - compare relative long */
4951 case 0xc6d: /* CRL - compare relative long */
4952 case 0xc6e: /* CLGFRL - compare logical relative long */
4953 case 0xc6f: /* CLRL - compare logical relative long */
4954 case 0xccd: /* CIH - compare immediate high */
4955 case 0xccf: /* CLIH - compare logical immediate high */
4956 /* flags only */
4957 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4958 return -1;
4959 break;
4960
4961 /* 0xc40-0xc41 undefined */
4962 /* 0xc43 undefined */
4963
4964 case 0xc47: /* STHRL - store halfword relative long */
4965 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4966 if (record_full_arch_list_add_mem (oaddr, 2))
4967 return -1;
4968 break;
4969
4970 /* 0xc49-0xc4a undefined */
4971
4972 case 0xc4b: /* STGRL - store relative long */
4973 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4974 if (record_full_arch_list_add_mem (oaddr, 8))
4975 return -1;
4976 break;
4977
4978 case 0xc4f: /* STRL - store relative long */
4979 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4980 if (record_full_arch_list_add_mem (oaddr, 4))
4981 return -1;
4982 break;
4983
4984 case 0xc60: /* EXRL - execute relative long */
4985 if (ex != -1)
4986 {
4987 gdb_printf (gdb_stdlog, "Warning: Double execute at %s.\n",
4988 paddress (gdbarch, addr));
4989 return -1;
4990 }
4991 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4992 if (inib[2])
4993 {
4994 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4995 ex = tmp & 0xff;
4996 }
4997 else
4998 {
4999 ex = 0;
5000 }
5001 goto ex;
5002
5003 /* 0xc61 undefined */
5004 /* 0xc63 undefined */
5005 /* 0xc69 undefined */
5006 /* 0xc6b undefined */
5007 /* 0xcc0-0xcc5 undefined */
5008 /* 0xcc7 undefined */
5009 /* 0xcc9 undefined */
5010 /* 0xccc undefined */
5011 /* 0xcce undefined */
5012
5013 default:
5014 goto UNKNOWN_OP;
5015 }
5016 break;
5017
5018 /* 0xc1 undefined */
5019 /* 0xc3 undefined */
5020
5021 case 0xc5: /* BPRP - branch prediction relative preload */
5022 case 0xc7: /* BPP - branch prediction preload */
5023 /* no visible effect */
5024 break;
5025
5026 case 0xc8:
5027 /* SSF-format instruction */
5028 switch (ibyte[0] << 4 | inib[3])
5029 {
5030 /* 0xc80 unsupported */
5031
5032 case 0xc81: /* ECTG - extract cpu time */
5033 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5034 return -1;
5035 if (s390_record_gpr_g (gdbarch, regcache, 0))
5036 return -1;
5037 if (s390_record_gpr_g (gdbarch, regcache, 1))
5038 return -1;
5039 break;
5040
5041 case 0xc82: /* CSST - compare and swap and store */
5042 {
5043 uint8_t fc, sc;
5044 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5045 fc = tmp & 0xff;
5046 sc = tmp >> 8 & 0xff;
5047
5048 /* First and third operands. */
5049 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5050 switch (fc)
5051 {
5052 case 0x00: /* 32-bit */
5053 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5054 return -1;
5055 if (record_full_arch_list_add_mem (oaddr, 4))
5056 return -1;
5057 break;
5058
5059 case 0x01: /* 64-bit */
5060 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5061 return -1;
5062 if (record_full_arch_list_add_mem (oaddr, 8))
5063 return -1;
5064 break;
5065
5066 case 0x02: /* 128-bit */
5067 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5068 return -1;
5069 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5070 return -1;
5071 if (record_full_arch_list_add_mem (oaddr, 16))
5072 return -1;
5073 break;
5074
5075 default:
5076 gdb_printf (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5077 fc, paddress (gdbarch, addr));
5078 return -1;
5079 }
5080
5081 /* Second operand. */
5082 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5083 if (sc > 4)
5084 {
5085 gdb_printf (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5086 sc, paddress (gdbarch, addr));
5087 return -1;
5088 }
5089
5090 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5091 return -1;
5092
5093 /* Flags. */
5094 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5095 return -1;
5096 }
5097 break;
5098
5099 /* 0xc83 undefined */
5100
5101 case 0xc84: /* LPD - load pair disjoint */
5102 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5103 return -1;
5104 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5105 return -1;
5106 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5107 return -1;
5108 break;
5109
5110 case 0xc85: /* LPDG - load pair disjoint */
5111 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5112 return -1;
5113 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5114 return -1;
5115 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5116 return -1;
5117 break;
5118
5119 /* 0xc86-0xc8f undefined */
5120
5121 default:
5122 goto UNKNOWN_OP;
5123 }
5124 break;
5125
5126 /* 0xc9-0xcb undefined */
5127 /* 0xcd-0xcf undefined */
5128
5129 case 0xd0: /* TRTR - translate and test reversed */
5130 case 0xdd: /* TRT - translate and test */
5131 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5132 return -1;
5133 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5134 return -1;
5135 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5136 return -1;
5137 break;
5138
5139 case 0xd1: /* MVN - move numbers */
5140 case 0xd2: /* MVC - move */
5141 case 0xd3: /* MVZ - move zones */
5142 case 0xdc: /* TR - translate */
5143 case 0xe8: /* MVCIN - move inverse */
5144 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5145 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5146 return -1;
5147 break;
5148
5149 case 0xd4: /* NC - and */
5150 case 0xd6: /* OC - or*/
5151 case 0xd7: /* XC - xor */
5152 case 0xe2: /* UNPKU - unpack unicode */
5153 case 0xea: /* UNPKA - unpack ASCII */
5154 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5155 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5156 return -1;
5157 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5158 return -1;
5159 break;
5160
5161 case 0xde: /* ED - edit */
5162 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5163 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5164 return -1;
5165 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5166 return -1;
5167 /* DXC may be written */
5168 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5169 return -1;
5170 break;
5171
5172 case 0xdf: /* EDMK - edit and mark */
5173 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5174 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5175 return -1;
5176 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5177 return -1;
5178 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5179 return -1;
5180 /* DXC may be written */
5181 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5182 return -1;
5183 break;
5184
5185 /* 0xd8 undefined */
5186 /* 0xd9 unsupported: MVCK - move with key */
5187 /* 0xda unsupported: MVCP - move to primary */
5188 /* 0xdb unsupported: MVCS - move to secondary */
5189 /* 0xe0 undefined */
5190
5191 case 0xe1: /* PKU - pack unicode */
5192 case 0xe9: /* PKA - pack ASCII */
5193 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5194 if (record_full_arch_list_add_mem (oaddr, 16))
5195 return -1;
5196 break;
5197
5198 case 0xe3:
5199 case 0xe6:
5200 case 0xe7:
5201 case 0xeb:
5202 case 0xed:
5203 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5204 switch (ibyte[0] << 8 | ibyte[5])
5205 {
5206 /* 0xe300-0xe301 undefined */
5207
5208 case 0xe302: /* LTG - load and test */
5209 case 0xe308: /* AG - add */
5210 case 0xe309: /* SG - subtract */
5211 case 0xe30a: /* ALG - add logical */
5212 case 0xe30b: /* SLG - subtract logical */
5213 case 0xe318: /* AGF - add */
5214 case 0xe319: /* SGF - subtract */
5215 case 0xe31a: /* ALGF - add logical */
5216 case 0xe31b: /* SLGF - subtract logical */
5217 case 0xe332: /* LTGF - load and test */
5218 case 0xe380: /* NG - and */
5219 case 0xe381: /* OG - or */
5220 case 0xe382: /* XG - xor */
5221 case 0xe388: /* ALCG - add logical with carry */
5222 case 0xe389: /* SLBG - subtract logical with borrow */
5223 case 0xeb0a: /* SRAG - shift right single */
5224 case 0xeb0b: /* SLAG - shift left single */
5225 /* 64-bit gpr destination + flags */
5226 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5227 return -1;
5228 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5229 return -1;
5230 break;
5231
5232 /* 0xe303 privileged */
5233
5234 case 0xe304: /* LG - load */
5235 case 0xe30c: /* MSG - multiply single */
5236 case 0xe30f: /* LRVG - load reversed */
5237 case 0xe314: /* LGF - load */
5238 case 0xe315: /* LGH - load halfword */
5239 case 0xe316: /* LLGF - load logical */
5240 case 0xe317: /* LLGT - load logical thirty one bits */
5241 case 0xe31c: /* MSGF - multiply single */
5242 case 0xe32a: /* LZRG - load and zero rightmost byte */
5243 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5244 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5245 case 0xe346: /* BCTG - branch on count */
5246 case 0xe377: /* LGB - load byte */
5247 case 0xe390: /* LLGC - load logical character */
5248 case 0xe391: /* LLGH - load logical halfword */
5249 case 0xeb0c: /* SRLG - shift right single logical */
5250 case 0xeb0d: /* SLLG - shift left single logical */
5251 case 0xeb1c: /* RLLG - rotate left single logical */
5252 case 0xeb44: /* BXHG - branch on index high */
5253 case 0xeb45: /* BXLEG - branch on index low or equal */
5254 case 0xeb4c: /* ECAG - extract cpu attribute */
5255 case 0xebe2: /* LOCG - load on condition */
5256 /* 64-bit gpr destination */
5257 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5258 return -1;
5259 break;
5260
5261 /* 0xe305 undefined */
5262
5263 case 0xe306: /* CVBY - convert to binary */
5264 /* 32-bit or native gpr destination + FPC (DXC write) */
5265 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5266 return -1;
5267 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5268 return -1;
5269 break;
5270
5271 /* 0xe307 undefined */
5272
5273 case 0xe30d: /* DSG - divide single */
5274 case 0xe31d: /* DSGF - divide single */
5275 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5276 case 0xe386: /* MLG - multiply logical */
5277 case 0xe387: /* DLG - divide logical */
5278 case 0xe38f: /* LPQ - load pair from quadword */
5279 /* 64-bit gpr pair destination */
5280 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5281 return -1;
5282 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5283 return -1;
5284 break;
5285
5286 case 0xe30e: /* CVBG - convert to binary */
5287 /* 64-bit gpr destination + FPC (DXC write) */
5288 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5289 return -1;
5290 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5291 return -1;
5292 break;
5293
5294 /* 0xe310-0xe311 undefined */
5295
5296 case 0xe312: /* LT - load and test */
5297 case 0xe338: /* AGH - add halfword to 64 bit value */
5298 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5299 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5300 case 0xe354: /* NY - and */
5301 case 0xe356: /* OY - or */
5302 case 0xe357: /* XY - xor */
5303 case 0xe35a: /* AY - add */
5304 case 0xe35b: /* SY - subtract */
5305 case 0xe35e: /* ALY - add logical */
5306 case 0xe35f: /* SLY - subtract logical */
5307 case 0xe37a: /* AHY - add halfword */
5308 case 0xe37b: /* SHY - subtract halfword */
5309 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5310 case 0xe398: /* ALC - add logical with carry */
5311 case 0xe399: /* SLB - subtract logical with borrow */
5312 case 0xe727: /* LCBB - load count to block boundary */
5313 case 0xeb81: /* ICMY - insert characters under mask */
5314 case 0xebdc: /* SRAK - shift left single */
5315 case 0xebdd: /* SLAK - shift left single */
5316 /* 32/64-bit gpr destination + flags */
5317 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5318 return -1;
5319 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5320 return -1;
5321 break;
5322
5323 /* 0xe313 privileged */
5324
5325 case 0xe31e: /* LRV - load reversed */
5326 case 0xe31f: /* LRVH - load reversed */
5327 case 0xe33b: /* LZRF - load and zero rightmost byte */
5328 case 0xe351: /* MSY - multiply single */
5329 case 0xe358: /* LY - load */
5330 case 0xe371: /* LAY - load address */
5331 case 0xe373: /* ICY - insert character */
5332 case 0xe376: /* LB - load byte */
5333 case 0xe378: /* LHY - load */
5334 case 0xe37c: /* MHY - multiply halfword */
5335 case 0xe394: /* LLC - load logical character */
5336 case 0xe395: /* LLH - load logical halfword */
5337 case 0xeb1d: /* RLL - rotate left single logical */
5338 case 0xebde: /* SRLK - shift left single logical */
5339 case 0xebdf: /* SLLK - shift left single logical */
5340 case 0xebf2: /* LOC - load on condition */
5341 /* 32-bit or native gpr destination */
5342 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5343 return -1;
5344 break;
5345
5346 case 0xe320: /* CG - compare */
5347 case 0xe321: /* CLG - compare logical */
5348 case 0xe330: /* CGF - compare */
5349 case 0xe331: /* CLGF - compare logical */
5350 case 0xe334: /* CGH - compare halfword */
5351 case 0xe355: /* CLY - compare logical */
5352 case 0xe359: /* CY - compare */
5353 case 0xe379: /* CHY - compare halfword */
5354 case 0xe3cd: /* CHF - compare high */
5355 case 0xe3cf: /* CLHF - compare logical high */
5356 case 0xeb20: /* CLMH - compare logical under mask high */
5357 case 0xeb21: /* CLMY - compare logical under mask */
5358 case 0xeb51: /* TMY - test under mask */
5359 case 0xeb55: /* CLIY - compare logical */
5360 case 0xebc0: /* TP - test decimal */
5361 case 0xed10: /* TCEB - test data class */
5362 case 0xed11: /* TCDB - test data class */
5363 case 0xed12: /* TCXB - test data class */
5364 case 0xed50: /* TDCET - test data class */
5365 case 0xed51: /* TDGET - test data group */
5366 case 0xed54: /* TDCDT - test data class */
5367 case 0xed55: /* TDGDT - test data group */
5368 case 0xed58: /* TDCXT - test data class */
5369 case 0xed59: /* TDGXT - test data group */
5370 /* flags only */
5371 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5372 return -1;
5373 break;
5374
5375 /* 0xe322-0xe323 undefined */
5376
5377 case 0xe324: /* STG - store */
5378 case 0xe325: /* NTSTG - nontransactional store */
5379 case 0xe326: /* CVDY - convert to decimal */
5380 case 0xe32f: /* STRVG - store reversed */
5381 case 0xed67: /* STDY - store */
5382 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5383 if (record_full_arch_list_add_mem (oaddr, 8))
5384 return -1;
5385 break;
5386
5387 /* 0xe327-0xe329 undefined */
5388 /* 0xe32b-0xe32d undefined */
5389
5390 case 0xe32e: /* CVDG - convert to decimal */
5391 case 0xe38e: /* STPQ - store pair to quadword */
5392 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5393 if (record_full_arch_list_add_mem (oaddr, 16))
5394 return -1;
5395 break;
5396
5397 /* 0xe333 undefined */
5398 /* 0xe335 undefined */
5399
5400 case 0xe336: /* PFD - prefetch data */
5401 break;
5402
5403 /* 0xe337 undefined */
5404 /* 0xe33c-0xe33d undefined */
5405
5406 case 0xe33e: /* STRV - store reversed */
5407 case 0xe350: /* STY - store */
5408 case 0xe3cb: /* STFH - store high */
5409 case 0xed66: /* STEY - store */
5410 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5411 if (record_full_arch_list_add_mem (oaddr, 4))
5412 return -1;
5413 break;
5414
5415 case 0xe33f: /* STRVH - store reversed */
5416 case 0xe370: /* STHY - store halfword */
5417 case 0xe3c7: /* STHH - store halfword high */
5418 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5419 if (record_full_arch_list_add_mem (oaddr, 2))
5420 return -1;
5421 break;
5422
5423 /* 0xe340-0xe345 undefined */
5424
5425 case 0xe347: /* BIC - branch indirect on condition */
5426 break;
5427
5428 /* 0xe348-0xe34f undefined */
5429 /* 0xe352 undefined */
5430
5431 case 0xe35c: /* MFY - multiply */
5432 case 0xe396: /* ML - multiply logical */
5433 case 0xe397: /* DL - divide logical */
5434 /* 32-bit gpr pair destination */
5435 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5436 return -1;
5437 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5438 return -1;
5439 break;
5440
5441 /* 0xe35d undefined */
5442 /* 0xe360-0xe36f undefined */
5443
5444 case 0xe372: /* STCY - store character */
5445 case 0xe3c3: /* STCH - store character high */
5446 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5447 if (record_full_arch_list_add_mem (oaddr, 1))
5448 return -1;
5449 break;
5450
5451 /* 0xe374 undefined */
5452
5453 case 0xe375: /* LAEY - load address extended */
5454 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5455 return -1;
5456 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5457 return -1;
5458 break;
5459
5460 /* 0xe37d-0xe37f undefined */
5461
5462 case 0xe385: /* LGAT - load and trap */
5463 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5464 case 0xe39d: /* LLGFAT - load logical and trap */
5465 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5466 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5467 case 0xe721: /* VLGV - vector load gr from vr element */
5468 /* 64-bit gpr destination + fpc for possible DXC write */
5469 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5470 return -1;
5471 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5472 return -1;
5473 break;
5474
5475 /* 0xe38a-0xe38d undefined */
5476 /* 0xe392-0xe393 undefined */
5477 /* 0xe39a-0xe39b undefined */
5478 /* 0xe39e undefined */
5479
5480 case 0xe39f: /* LAT - load and trap */
5481 /* 32-bit gpr destination + fpc for possible DXC write */
5482 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5483 return -1;
5484 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5485 return -1;
5486 break;
5487
5488 /* 0xe3a0-0xe3bf undefined */
5489
5490 case 0xe3c0: /* LBH - load byte high */
5491 case 0xe3c2: /* LLCH - load logical character high */
5492 case 0xe3c4: /* LHH - load halfword high */
5493 case 0xe3c6: /* LLHH - load logical halfword high */
5494 case 0xe3ca: /* LFH - load high */
5495 case 0xebe0: /* LOCFH - load high on condition */
5496 /* 32-bit high gpr destination */
5497 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5498 return -1;
5499 break;
5500
5501 /* 0xe3c1 undefined */
5502 /* 0xe3c5 undefined */
5503
5504 case 0xe3c8: /* LFHAT - load high and trap */
5505 /* 32-bit high gpr destination + fpc for possible DXC write */
5506 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5507 return -1;
5508 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5509 return -1;
5510 break;
5511
5512 /* 0xe3c9 undefined */
5513 /* 0xe3cc undefined */
5514 /* 0xe3ce undefined */
5515 /* 0xe3d0-0xe3ff undefined */
5516
5517 case 0xe601: /* VLEBRH - vector load byte reversed element */
5518 case 0xe602: /* VLEBRG - vector load byte reversed element */
5519 case 0xe603: /* VLEBRF - vector load byte reversed element */
5520 case 0xe604: /* VLLEBRZ - vector load byte rev. el. and zero */
5521 case 0xe605: /* VLBRREP - vector load byte rev. el. and replicate */
5522 case 0xe606: /* VLBR - vector load byte reversed elements */
5523 case 0xe607: /* VLER - vector load elements reversed */
5524 case 0xe634: /* VPKZ - vector pack zoned */
5525 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5526 case 0xe637: /* VLRLR - vector load rightmost with length */
5527 case 0xe649: /* VLIP - vector load immediate decimal */
5528 case 0xe700: /* VLEB - vector load element */
5529 case 0xe701: /* VLEH - vector load element */
5530 case 0xe702: /* VLEG - vector load element */
5531 case 0xe703: /* VLEF - vector load element */
5532 case 0xe704: /* VLLEZ - vector load logical element and zero */
5533 case 0xe705: /* VLREP - vector load and replicate */
5534 case 0xe706: /* VL - vector load */
5535 case 0xe707: /* VLBB - vector load to block boundary */
5536 case 0xe712: /* VGEG - vector gather element */
5537 case 0xe713: /* VGEF - vector gather element */
5538 case 0xe722: /* VLVG - vector load vr element from gr */
5539 case 0xe730: /* VESL - vector element shift left */
5540 case 0xe733: /* VERLL - vector element rotate left logical */
5541 case 0xe737: /* VLL - vector load with length */
5542 case 0xe738: /* VESRL - vector element shift right logical */
5543 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5544 case 0xe740: /* VLEIB - vector load element immediate */
5545 case 0xe741: /* VLEIH - vector load element immediate */
5546 case 0xe742: /* VLEIG - vector load element immediate */
5547 case 0xe743: /* VLEIF - vector load element immediate */
5548 case 0xe744: /* VGBM - vector generate byte mask */
5549 case 0xe745: /* VREPI - vector replicate immediate */
5550 case 0xe746: /* VGM - vector generate mask */
5551 case 0xe74d: /* VREP - vector replicate */
5552 case 0xe750: /* VPOPCT - vector population count */
5553 case 0xe752: /* VCTZ - vector count trailing zeros */
5554 case 0xe753: /* VCLZ - vector count leading zeros */
5555 case 0xe756: /* VLR - vector load */
5556 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5557 case 0xe760: /* VMRL - vector merge low */
5558 case 0xe761: /* VMRH - vector merge high */
5559 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5560 case 0xe764: /* VSUM - vector sum across word */
5561 case 0xe765: /* VSUMG - vector sum across doubleword */
5562 case 0xe766: /* VCKSM - vector checksum */
5563 case 0xe767: /* VSUMQ - vector sum across quadword */
5564 case 0xe768: /* VN - vector and */
5565 case 0xe769: /* VNC - vector and with complement */
5566 case 0xe76a: /* VO - vector or */
5567 case 0xe76b: /* VNO - vector nor */
5568 case 0xe76c: /* VNX - vector not exclusive or */
5569 case 0xe76d: /* VX - vector xor */
5570 case 0xe76e: /* VNN - vector nand */
5571 case 0xe76f: /* VOC - vector or with complement */
5572 case 0xe770: /* VESLV - vector element shift left */
5573 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5574 case 0xe773: /* VERLLV - vector element rotate left logical */
5575 case 0xe774: /* VSL - vector shift left */
5576 case 0xe775: /* VSLB - vector shift left by byte */
5577 case 0xe777: /* VSLDB - vector shift left double by byte */
5578 case 0xe778: /* VESRLV - vector element shift right logical */
5579 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5580 case 0xe77c: /* VSRL - vector shift right logical */
5581 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5582 case 0xe77e: /* VSRA - vector shift right arithmetic */
5583 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5584 case 0xe784: /* VPDI - vector permute doubleword immediate */
5585 case 0xe785: /* VBPERM - vector bit permute */
5586 case 0xe786: /* VSLD - vector shift left double by bit */
5587 case 0xe787: /* VSRD - vector shift right double by bit */
5588 case 0xe78b: /* VSTRS - vector string search */
5589 case 0xe78c: /* VPERM - vector permute */
5590 case 0xe78d: /* VSEL - vector select */
5591 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5592 case 0xe78f: /* VFMA - vector fp multiply and add */
5593 case 0xe794: /* VPK - vector pack */
5594 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5595 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5596 case 0xe7a1: /* VMLH - vector multiply logical high */
5597 case 0xe7a2: /* VML - vector multiply low */
5598 case 0xe7a3: /* VMH - vector multiply high */
5599 case 0xe7a4: /* VMLE - vector multiply logical even */
5600 case 0xe7a5: /* VMLO - vector multiply logical odd */
5601 case 0xe7a6: /* VME - vector multiply even */
5602 case 0xe7a7: /* VMO - vector multiply odd */
5603 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5604 case 0xe7aa: /* VMAL - vector multiply and add low */
5605 case 0xe7ab: /* VMAH - vector multiply and add high */
5606 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5607 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5608 case 0xe7ae: /* VMAE - vector multiply and add even */
5609 case 0xe7af: /* VMAO - vector multiply and add odd */
5610 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5611 case 0xe7b8: /* VMSL - vector multiply sum logical */
5612 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5613 case 0xe7bb: /* VAC - vector add with carry */
5614 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5615 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5616 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5617 case 0xe7c0: /* VCLFP - vector fp convert to logical */
5618 case 0xe7c1: /* VCFPL - vector fp convert from logical */
5619 case 0xe7c2: /* VCSFP - vector fp convert to fixed */
5620 case 0xe7c3: /* VCFPS - vector fp convert from fixed */
5621 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5622 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5623 case 0xe7c7: /* VFI - vector load fp integer */
5624 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5625 case 0xe7ce: /* VFSQ - vector fp square root */
5626 case 0xe7d4: /* VUPLL - vector unpack logical low */
5627 case 0xe7d6: /* VUPL - vector unpack low */
5628 case 0xe7d5: /* VUPLH - vector unpack logical high */
5629 case 0xe7d7: /* VUPH - vector unpack high */
5630 case 0xe7de: /* VLC - vector load complement */
5631 case 0xe7df: /* VLP - vector load positive */
5632 case 0xe7e2: /* VFA - vector fp subtract */
5633 case 0xe7e3: /* VFA - vector fp add */
5634 case 0xe7e5: /* VFD - vector fp divide */
5635 case 0xe7e7: /* VFM - vector fp multiply */
5636 case 0xe7ee: /* VFMIN - vector fp minimum */
5637 case 0xe7ef: /* VFMAX - vector fp maximum */
5638 case 0xe7f0: /* VAVGL - vector average logical */
5639 case 0xe7f1: /* VACC - vector add and compute carry */
5640 case 0xe7f2: /* VAVG - vector average */
5641 case 0xe7f3: /* VA - vector add */
5642 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5643 case 0xe7f7: /* VS - vector subtract */
5644 case 0xe7fc: /* VMNL - vector minimum logical */
5645 case 0xe7fd: /* VMXL - vector maximum logical */
5646 case 0xe7fe: /* VMN - vector minimum */
5647 case 0xe7ff: /* VMX - vector maximum */
5648 /* vector destination + FPC */
5649 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5650 return -1;
5651 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5652 return -1;
5653 break;
5654
5655 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5656 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5657 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5658 return -1;
5659 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5660 return -1;
5661 break;
5662
5663 case 0xe708: /* VSTEB - vector store element */
5664 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5665 if (record_full_arch_list_add_mem (oaddr, 1))
5666 return -1;
5667 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5668 return -1;
5669 break;
5670
5671 case 0xe609: /* VSTEBRH - vector store byte reversed element */
5672 case 0xe709: /* VSTEH - vector store element */
5673 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5674 if (record_full_arch_list_add_mem (oaddr, 2))
5675 return -1;
5676 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5677 return -1;
5678 break;
5679
5680 case 0xe60a: /* VSTEBRG - vector store byte reversed element */
5681 case 0xe70a: /* VSTEG - vector store element */
5682 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5683 if (record_full_arch_list_add_mem (oaddr, 8))
5684 return -1;
5685 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5686 return -1;
5687 break;
5688
5689 case 0xe60b: /* VSTEBRF - vector store byte reversed element */
5690 case 0xe70b: /* VSTEF - vector store element */
5691 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5692 if (record_full_arch_list_add_mem (oaddr, 4))
5693 return -1;
5694 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5695 return -1;
5696 break;
5697
5698 /* 0xe70c-0xe70d undefined */
5699
5700 case 0xe60e: /* VSTBR - vector store byte reversed elements */
5701 case 0xe60f: /* VSTER - vector store elements reversed */
5702 case 0xe70e: /* VST - vector store */
5703 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5704 if (record_full_arch_list_add_mem (oaddr, 16))
5705 return -1;
5706 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5707 return -1;
5708 break;
5709
5710 /* 0xe70f-0xe711 undefined */
5711 /* 0xe714-0xe719 undefined */
5712
5713 case 0xe71a: /* VSCEG - vector scatter element */
5714 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5715 return -1;
5716 if (record_full_arch_list_add_mem (oaddr, 8))
5717 return -1;
5718 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5719 return -1;
5720 break;
5721
5722 case 0xe71b: /* VSCEF - vector scatter element */
5723 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5724 return -1;
5725 if (record_full_arch_list_add_mem (oaddr, 4))
5726 return -1;
5727 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5728 return -1;
5729 break;
5730
5731 /* 0xe71c-0xe720 undefined */
5732 /* 0xe723-0xe726 undefined */
5733 /* 0xe728-0xe72f undefined */
5734 /* 0xe731-0xe732 undefined */
5735 /* 0xe734-0xe735 undefined */
5736
5737 case 0xe736: /* VLM - vector load multiple */
5738 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5739 if (s390_record_vr (gdbarch, regcache, i))
5740 return -1;
5741 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5742 return -1;
5743 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5744 return -1;
5745 break;
5746
5747 /* 0xe739 undefined */
5748 /* 0xe73b-0xe73d undefined */
5749
5750 case 0xe73e: /* VSTM - vector store multiple */
5751 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5752 if (ivec[0] <= ivec[1])
5753 n = ivec[1] - ivec[0] + 1;
5754 else
5755 n = ivec[1] + 0x20 - ivec[0] + 1;
5756 if (record_full_arch_list_add_mem (oaddr, n * 16))
5757 return -1;
5758 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5759 return -1;
5760 break;
5761
5762 case 0xe63c: /* VUPKZ - vector unpack zoned */
5763 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5764 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5765 return -1;
5766 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5767 return -1;
5768 break;
5769
5770 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5771 case 0xe73f: /* VSTL - vector store with length */
5772 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5773 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5774 tmp &= 0xffffffffu;
5775 if (tmp > 15)
5776 tmp = 15;
5777 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5778 return -1;
5779 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5780 return -1;
5781 break;
5782
5783 /* 0xe747-0xe749 undefined */
5784
5785 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5786 case 0xe659: /* VSRP - vector shift and round decimal */
5787 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5788 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5789 case 0xe671: /* VAP - vector add decimal */
5790 case 0xe673: /* VSP - vector subtract decimal */
5791 case 0xe678: /* VMP - vector multiply decimal */
5792 case 0xe679: /* VMSP - vector multiply decimal */
5793 case 0xe67a: /* VDP - vector divide decimal */
5794 case 0xe67b: /* VRP - vector remainder decimal */
5795 case 0xe67e: /* VSDP - vector shift and divide decimal */
5796 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5797 case 0xe75c: /* VISTR - vector isolate string */
5798 case 0xe780: /* VFEE - vector find element equal */
5799 case 0xe781: /* VFENE - vector find element not equal */
5800 case 0xe782: /* VFA - vector find any element equal */
5801 case 0xe78a: /* VSTRC - vector string range compare */
5802 case 0xe795: /* VPKLS - vector pack logical saturate */
5803 case 0xe797: /* VPKS - vector pack saturate */
5804 case 0xe7e8: /* VFCE - vector fp compare equal */
5805 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5806 case 0xe7eb: /* VFCH - vector fp compare high */
5807 case 0xe7f8: /* VCEQ - vector compare equal */
5808 case 0xe7f9: /* VCHL - vector compare high logical */
5809 case 0xe7fb: /* VCH - vector compare high */
5810 /* vector destination + flags + FPC */
5811 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5812 return -1;
5813 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5814 return -1;
5815 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5816 return -1;
5817 break;
5818
5819 case 0xe65f: /* VTP - vector test decimal */
5820 /* flags + FPC */
5821 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5822 return -1;
5823 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5824 return -1;
5825 break;
5826
5827 /* 0xe74b-0xe74c undefined */
5828 /* 0xe74e-0xe74f undefined */
5829 /* 0xe751 undefined */
5830 /* 0xe754-0xe755 undefined */
5831 /* 0xe757-0xe75b undefined */
5832 /* 0xe75d-0xe75e undefined */
5833 /* 0xe763 undefined */
5834 /* 0xe771 undefined */
5835 /* 0xe776 undefined */
5836 /* 0xe779 undefined */
5837 /* 0xe77b undefined */
5838 /* 0xe783 undefined */
5839 /* 0xe786-0xe789 undefined */
5840 /* 0xe78b undefined */
5841 /* 0xe790-0xe793 undefined */
5842 /* 0xe796 undefined */
5843 /* 0xe798-0xe79d undefined */
5844 /* 0xe7a0 undefined */
5845 /* 0xe7a8 undefined */
5846 /* 0xe7b0-0xe7b3 undefined */
5847 /* 0xe7b5-0xe7b7 undefined */
5848 /* 0xe7ba undefined */
5849 /* 0xe7be undefined */
5850 /* 0xe7c6 undefined */
5851 /* 0xe7c8-0xe7c9 undefined */
5852
5853 case 0xe677: /* VCP - vector compare decimal */
5854 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5855 case 0xe7cb: /* WFC - vector fp compare scalar */
5856 case 0xe7d8: /* VTM - vector test under mask */
5857 case 0xe7d9: /* VECL - vector element compare logical */
5858 case 0xe7db: /* VEC - vector element compare */
5859 case 0xed08: /* KEB - compare and signal */
5860 case 0xed09: /* CEB - compare */
5861 case 0xed18: /* KDB - compare and signal */
5862 case 0xed19: /* CDB - compare */
5863 /* flags + fpc only */
5864 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5865 return -1;
5866 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5867 return -1;
5868 break;
5869
5870 /* 0xe7cd undefined */
5871 /* 0xe7cf-0xe7d3 undefined */
5872 /* 0xe7da undefined */
5873 /* 0xe7dc-0xe7dd undefined */
5874 /* 0xe7e0-0xe7e1 undefined */
5875 /* 0xe7e4 undefined */
5876 /* 0xe7e6 undefined */
5877 /* 0xe7e9 undefined */
5878 /* 0xe7ec-0xe7ed undefined */
5879 /* 0xe7f4 undefined */
5880 /* 0xe7f6 undefined */
5881 /* 0xe7fa undefined */
5882
5883 /* 0xeb00-0xeb03 undefined */
5884
5885 case 0xeb04: /* LMG - load multiple */
5886 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5887 if (s390_record_gpr_g (gdbarch, regcache, i))
5888 return -1;
5889 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5890 return -1;
5891 break;
5892
5893 /* 0xeb05-0xeb09 undefined */
5894 /* 0xeb0e undefined */
5895 /* 0xeb0f privileged: TRACG */
5896 /* 0xeb10-0xeb13 undefined */
5897
5898 case 0xeb14: /* CSY - compare and swap */
5899 case 0xebf4: /* LAN - load and and */
5900 case 0xebf6: /* LAO - load and or */
5901 case 0xebf7: /* LAX - load and xor */
5902 case 0xebf8: /* LAA - load and add */
5903 case 0xebfa: /* LAAL - load and add logical */
5904 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5905 if (record_full_arch_list_add_mem (oaddr, 4))
5906 return -1;
5907 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5908 return -1;
5909 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5910 return -1;
5911 break;
5912
5913 /* 0xeb15-0xeb1b undefined */
5914 /* 0xeb1e-0xeb1f undefined */
5915 /* 0xeb22 undefined */
5916
5917 case 0xeb23: /* CLT - compare logical and trap */
5918 case 0xeb2b: /* CLGT - compare logical and trap */
5919 /* fpc only - including possible DXC write for trapping insns */
5920 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5921 return -1;
5922 break;
5923
5924 case 0xeb24: /* STMG - store multiple */
5925 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5926 if (inib[2] <= inib[3])
5927 n = inib[3] - inib[2] + 1;
5928 else
5929 n = inib[3] + 0x10 - inib[2] + 1;
5930 if (record_full_arch_list_add_mem (oaddr, n * 8))
5931 return -1;
5932 break;
5933
5934 /* 0xeb25 privileged */
5935
5936 case 0xeb26: /* STMH - store multiple high */
5937 case 0xeb90: /* STMY - store multiple */
5938 case 0xeb9b: /* STAMY - store access multiple */
5939 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5940 if (inib[2] <= inib[3])
5941 n = inib[3] - inib[2] + 1;
5942 else
5943 n = inib[3] + 0x10 - inib[2] + 1;
5944 if (record_full_arch_list_add_mem (oaddr, n * 4))
5945 return -1;
5946 break;
5947
5948 /* 0xeb27-0xeb2a undefined */
5949
5950 case 0xeb2c: /* STCMH - store characters under mask */
5951 case 0xeb2d: /* STCMY - store characters under mask */
5952 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5953 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5954 return -1;
5955 break;
5956
5957 /* 0xeb2e undefined */
5958 /* 0xeb2f privileged */
5959
5960 case 0xeb30: /* CSG - compare and swap */
5961 case 0xebe4: /* LANG - load and and */
5962 case 0xebe6: /* LAOG - load and or */
5963 case 0xebe7: /* LAXG - load and xor */
5964 case 0xebe8: /* LAAG - load and add */
5965 case 0xebea: /* LAALG - load and add logical */
5966 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5967 if (record_full_arch_list_add_mem (oaddr, 8))
5968 return -1;
5969 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5970 return -1;
5971 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5972 return -1;
5973 break;
5974
5975 case 0xeb31: /* CDSY - compare double and swap */
5976 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5977 if (record_full_arch_list_add_mem (oaddr, 8))
5978 return -1;
5979 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5980 return -1;
5981 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5982 return -1;
5983 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5984 return -1;
5985 break;
5986
5987 /* 0xeb32-0xeb3d undefined */
5988
5989 case 0xeb3e: /* CDSG - compare double and swap */
5990 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5991 if (record_full_arch_list_add_mem (oaddr, 16))
5992 return -1;
5993 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5994 return -1;
5995 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5996 return -1;
5997 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5998 return -1;
5999 break;
6000
6001 /* 0xeb3f-0xeb43 undefined */
6002 /* 0xeb46-0xeb4b undefined */
6003 /* 0xeb4d-0xeb50 undefined */
6004
6005 case 0xeb52: /* MVIY - move */
6006 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6007 if (record_full_arch_list_add_mem (oaddr, 1))
6008 return -1;
6009 break;
6010
6011 case 0xeb54: /* NIY - and */
6012 case 0xeb56: /* OIY - or */
6013 case 0xeb57: /* XIY - xor */
6014 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6015 if (record_full_arch_list_add_mem (oaddr, 1))
6016 return -1;
6017 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6018 return -1;
6019 break;
6020
6021 /* 0xeb53 undefined */
6022 /* 0xeb58-0xeb69 undefined */
6023
6024 case 0xeb6a: /* ASI - add immediate */
6025 case 0xeb6e: /* ALSI - add immediate */
6026 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6027 if (record_full_arch_list_add_mem (oaddr, 4))
6028 return -1;
6029 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6030 return -1;
6031 break;
6032
6033 /* 0xeb6b-0xeb6d undefined */
6034 /* 0xeb6f-0xeb79 undefined */
6035
6036 case 0xeb7a: /* AGSI - add immediate */
6037 case 0xeb7e: /* ALGSI - add immediate */
6038 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6039 if (record_full_arch_list_add_mem (oaddr, 8))
6040 return -1;
6041 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6042 return -1;
6043 break;
6044
6045 /* 0xeb7b-0xeb7d undefined */
6046 /* 0xeb7f undefined */
6047
6048 case 0xeb80: /* ICMH - insert characters under mask */
6049 /* 32-bit high gpr destination + flags */
6050 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6051 return -1;
6052 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6053 return -1;
6054 break;
6055
6056 /* 0xeb82-0xeb8d undefined */
6057
6058 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6059 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6060 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6061 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6062 if (record_full_arch_list_add_mem (oaddr, tmp))
6063 return -1;
6064 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6065 return -1;
6066 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6067 return -1;
6068 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6069 return -1;
6070 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6071 return -1;
6072 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6073 return -1;
6074 break;
6075
6076 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6077 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6078 return -1;
6079 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6080 return -1;
6081 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6082 return -1;
6083 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6084 return -1;
6085 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6086 return -1;
6087 break;
6088
6089 /* 0xeb91-0xeb95 undefined */
6090
6091 case 0xeb96: /* LMH - load multiple high */
6092 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6093 if (s390_record_gpr_h (gdbarch, regcache, i))
6094 return -1;
6095 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6096 return -1;
6097 break;
6098
6099 /* 0xeb97 undefined */
6100
6101 case 0xeb98: /* LMY - load multiple */
6102 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6103 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6104 return -1;
6105 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6106 return -1;
6107 break;
6108
6109 /* 0xeb99 undefined */
6110
6111 case 0xeb9a: /* LAMY - load access multiple */
6112 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6113 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6114 return -1;
6115 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6116 return -1;
6117 break;
6118
6119 /* 0xeb9c-0xebbf undefined */
6120 /* 0xebc1-0xebdb undefined */
6121
6122 case 0xebe1: /* STOCFH - store high on condition */
6123 case 0xebf3: /* STOC - store on condition */
6124 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6125 if (record_full_arch_list_add_mem (oaddr, 4))
6126 return -1;
6127 break;
6128
6129 case 0xebe3: /* STOCG - store on condition */
6130 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6131 if (record_full_arch_list_add_mem (oaddr, 8))
6132 return -1;
6133 break;
6134
6135 /* 0xebe5 undefined */
6136 /* 0xebe9 undefined */
6137 /* 0xebeb-0xebf1 undefined */
6138 /* 0xebf5 undefined */
6139 /* 0xebf9 undefined */
6140 /* 0xebfb-0xebff undefined */
6141
6142 /* 0xed00-0xed03 undefined */
6143
6144 case 0xed04: /* LDEB - load lengthened */
6145 case 0xed0c: /* MDEB - multiply */
6146 case 0xed0d: /* DEB - divide */
6147 case 0xed14: /* SQEB - square root */
6148 case 0xed15: /* SQDB - square root */
6149 case 0xed17: /* MEEB - multiply */
6150 case 0xed1c: /* MDB - multiply */
6151 case 0xed1d: /* DDB - divide */
6152 /* float destination + fpc */
6153 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6154 return -1;
6155 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6156 return -1;
6157 break;
6158
6159 case 0xed05: /* LXDB - load lengthened */
6160 case 0xed06: /* LXEB - load lengthened */
6161 case 0xed07: /* MXDB - multiply */
6162 /* float pair destination + fpc */
6163 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6164 return -1;
6165 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6166 return -1;
6167 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6168 return -1;
6169 break;
6170
6171 case 0xed0a: /* AEB - add */
6172 case 0xed0b: /* SEB - subtract */
6173 case 0xed1a: /* ADB - add */
6174 case 0xed1b: /* SDB - subtract */
6175 /* float destination + flags + fpc */
6176 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6177 return -1;
6178 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6179 return -1;
6180 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6181 return -1;
6182 break;
6183
6184 case 0xed0e: /* MAEB - multiply and add */
6185 case 0xed0f: /* MSEB - multiply and subtract */
6186 case 0xed1e: /* MADB - multiply and add */
6187 case 0xed1f: /* MSDB - multiply and subtract */
6188 case 0xed40: /* SLDT - shift significand left */
6189 case 0xed41: /* SRDT - shift significand right */
6190 case 0xedaa: /* CDZT - convert from zoned */
6191 case 0xedae: /* CDPT - convert from packed */
6192 /* float destination [RXF] + fpc */
6193 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6194 return -1;
6195 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6196 return -1;
6197 break;
6198
6199 /* 0xed13 undefined */
6200 /* 0xed16 undefined */
6201 /* 0xed20-0xed23 undefined */
6202
6203 case 0xed24: /* LDE - load lengthened */
6204 case 0xed34: /* SQE - square root */
6205 case 0xed35: /* SQD - square root */
6206 case 0xed37: /* MEE - multiply */
6207 case 0xed64: /* LEY - load */
6208 case 0xed65: /* LDY - load */
6209 /* float destination */
6210 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6211 return -1;
6212 break;
6213
6214 case 0xed25: /* LXD - load lengthened */
6215 case 0xed26: /* LXE - load lengthened */
6216 /* float pair destination */
6217 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6218 return -1;
6219 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6220 return -1;
6221 break;
6222
6223 /* 0xed27-0xed2d undefined */
6224
6225 case 0xed2e: /* MAE - multiply and add */
6226 case 0xed2f: /* MSE - multiply and subtract */
6227 case 0xed38: /* MAYL - multiply and add unnormalized */
6228 case 0xed39: /* MYL - multiply unnormalized */
6229 case 0xed3c: /* MAYH - multiply and add unnormalized */
6230 case 0xed3d: /* MYH - multiply unnormalized */
6231 case 0xed3e: /* MAD - multiply and add */
6232 case 0xed3f: /* MSD - multiply and subtract */
6233 /* float destination [RXF] */
6234 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6235 return -1;
6236 break;
6237
6238 /* 0xed30-0xed33 undefined */
6239 /* 0xed36 undefined */
6240
6241 case 0xed3a: /* MAY - multiply and add unnormalized */
6242 case 0xed3b: /* MY - multiply unnormalized */
6243 /* float pair destination [RXF] */
6244 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6245 return -1;
6246 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6247 return -1;
6248 break;
6249
6250 /* 0xed42-0xed47 undefined */
6251
6252 case 0xed48: /* SLXT - shift significand left */
6253 case 0xed49: /* SRXT - shift significand right */
6254 case 0xedab: /* CXZT - convert from zoned */
6255 case 0xedaf: /* CXPT - convert from packed */
6256 /* float pair destination [RXF] + fpc */
6257 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6258 return -1;
6259 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6260 return -1;
6261 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6262 return -1;
6263 break;
6264
6265 /* 0xed4a-0xed4f undefined */
6266 /* 0xed52-0xed53 undefined */
6267 /* 0xed56-0xed57 undefined */
6268 /* 0xed5a-0xed63 undefined */
6269 /* 0xed68-0xeda7 undefined */
6270
6271 case 0xeda8: /* CZDT - convert to zoned */
6272 case 0xeda9: /* CZXT - convert to zoned */
6273 case 0xedac: /* CPDT - convert to packed */
6274 case 0xedad: /* CPXT - convert to packed */
6275 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6276 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6277 return -1;
6278 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6279 return -1;
6280 break;
6281
6282 /* 0xedb0-0xedff undefined */
6283
6284 default:
6285 goto UNKNOWN_OP;
6286 }
6287 break;
6288
6289 /* 0xe4 undefined */
6290
6291 case 0xe5:
6292 /* SSE/SIL-format instruction */
6293 switch (insn[0])
6294 {
6295 /* 0xe500-0xe509 undefined, privileged, or unsupported */
6296
6297 case 0xe50a: /* MVCRL - move right to left */
6298 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6299 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6300 if (record_full_arch_list_add_mem (oaddr, (tmp & 0xff) + 1))
6301 return -1;
6302 break;
6303
6304 /* 0xe50b-0xe543 undefined, privileged, or unsupported */
6305
6306 case 0xe544: /* MVHHI - move */
6307 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6308 if (record_full_arch_list_add_mem (oaddr, 2))
6309 return -1;
6310 break;
6311
6312 /* 0xe545-0xe547 undefined */
6313
6314 case 0xe548: /* MVGHI - move */
6315 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6316 if (record_full_arch_list_add_mem (oaddr, 8))
6317 return -1;
6318 break;
6319
6320 /* 0xe549-0xe54b undefined */
6321
6322 case 0xe54c: /* MVHI - move */
6323 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6324 if (record_full_arch_list_add_mem (oaddr, 4))
6325 return -1;
6326 break;
6327
6328 /* 0xe54d-0xe553 undefined */
6329
6330 case 0xe554: /* CHHSI - compare halfword immediate */
6331 case 0xe555: /* CLHHSI - compare logical immediate */
6332 case 0xe558: /* CGHSI - compare halfword immediate */
6333 case 0xe559: /* CLGHSI - compare logical immediate */
6334 case 0xe55c: /* CHSI - compare halfword immediate */
6335 case 0xe55d: /* CLFHSI - compare logical immediate */
6336 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6337 return -1;
6338 break;
6339
6340 /* 0xe556-0xe557 undefined */
6341 /* 0xe55a-0xe55b undefined */
6342 /* 0xe55e-0xe55f undefined */
6343
6344 case 0xe560: /* TBEGIN - transaction begin */
6345 /* The transaction will be immediately aborted after this
6346 instruction, due to single-stepping. This instruction is
6347 only supported so that the program can fail a few times
6348 and go to the non-transactional fallback. */
6349 if (inib[4])
6350 {
6351 /* Transaction diagnostic block - user. */
6352 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6353 if (record_full_arch_list_add_mem (oaddr, 256))
6354 return -1;
6355 }
6356 /* Transaction diagnostic block - supervisor. */
6357 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6358 return -1;
6359 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6360 return -1;
6361 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6362 return -1;
6363 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6364 return -1;
6365 for (i = 0; i < 16; i++)
6366 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6367 return -1;
6368 /* And flags. */
6369 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6370 return -1;
6371 break;
6372
6373 /* 0xe561 unsupported: TBEGINC */
6374 /* 0xe562-0xe5ff undefined */
6375
6376 default:
6377 goto UNKNOWN_OP;
6378 }
6379 break;
6380
6381 case 0xec:
6382 /* RIE/RIS/RRS-format instruction */
6383 switch (ibyte[0] << 8 | ibyte[5])
6384 {
6385 /* 0xec00-0xec41 undefined */
6386
6387 case 0xec42: /* LOCHI - load halfword immediate on condition */
6388 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6389 /* 32-bit or native gpr destination */
6390 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6391 return -1;
6392 break;
6393
6394 /* 0xec43 undefined */
6395
6396 case 0xec44: /* BRXHG - branch relative on index high */
6397 case 0xec45: /* BRXLG - branch relative on index low or equal */
6398 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6399 case 0xec59: /* RISBGN - rotate then insert selected bits */
6400 /* 64-bit gpr destination */
6401 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6402 return -1;
6403 break;
6404
6405 /* 0xec47-0xec4d undefined */
6406
6407 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6408 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6409 /* 32-bit high gpr destination */
6410 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6411 return -1;
6412 break;
6413
6414 /* 0xec4f-0xec50 undefined */
6415 /* 0xec52-0xec53 undefined */
6416
6417 case 0xec54: /* RNSBG - rotate then and selected bits */
6418 case 0xec55: /* RISBG - rotate then insert selected bits */
6419 case 0xec56: /* ROSBG - rotate then or selected bits */
6420 case 0xec57: /* RXSBG - rotate then xor selected bits */
6421 case 0xecd9: /* AGHIK - add immediate */
6422 case 0xecdb: /* ALGHSIK - add logical immediate */
6423 /* 64-bit gpr destination + flags */
6424 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6425 return -1;
6426 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6427 return -1;
6428 break;
6429
6430 /* 0xec58 undefined */
6431 /* 0xec5a-0xec5c undefined */
6432 /* 0xec5e-0xec63 undefined */
6433
6434 case 0xec64: /* CGRJ - compare and branch relative */
6435 case 0xec65: /* CLGRJ - compare logical and branch relative */
6436 case 0xec76: /* CRJ - compare and branch relative */
6437 case 0xec77: /* CLRJ - compare logical and branch relative */
6438 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6439 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6440 case 0xec7e: /* CIJ - compare immediate and branch relative */
6441 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6442 case 0xece4: /* CGRB - compare and branch */
6443 case 0xece5: /* CLGRB - compare logical and branch */
6444 case 0xecf6: /* CRB - compare and branch */
6445 case 0xecf7: /* CLRB - compare logical and branch */
6446 case 0xecfc: /* CGIB - compare immediate and branch */
6447 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6448 case 0xecfe: /* CIB - compare immediate and branch */
6449 case 0xecff: /* CLIB - compare logical immediate and branch */
6450 break;
6451
6452 /* 0xec66-0xec6f undefined */
6453
6454 case 0xec70: /* CGIT - compare immediate and trap */
6455 case 0xec71: /* CLGIT - compare logical immediate and trap */
6456 case 0xec72: /* CIT - compare immediate and trap */
6457 case 0xec73: /* CLFIT - compare logical immediate and trap */
6458 /* fpc only - including possible DXC write for trapping insns */
6459 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6460 return -1;
6461 break;
6462
6463 /* 0xec74-0xec75 undefined */
6464 /* 0xec78-0xec7b undefined */
6465
6466 /* 0xec80-0xecd7 undefined */
6467
6468 case 0xecd8: /* AHIK - add immediate */
6469 case 0xecda: /* ALHSIK - add logical immediate */
6470 /* 32-bit gpr destination + flags */
6471 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6472 return -1;
6473 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6474 return -1;
6475 break;
6476
6477 /* 0xecdc-0xece3 undefined */
6478 /* 0xece6-0xecf5 undefined */
6479 /* 0xecf8-0xecfb undefined */
6480
6481 default:
6482 goto UNKNOWN_OP;
6483 }
6484 break;
6485
6486 case 0xee: /* PLO - perform locked operation */
6487 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6488 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6489 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6490 if (!(tmp & 0x100))
6491 {
6492 uint8_t fc = tmp & 0xff;
6493 gdb_byte buf[8];
6494 switch (fc)
6495 {
6496 case 0x00: /* CL */
6497 /* op1c */
6498 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6499 return -1;
6500 /* op3 */
6501 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6502 return -1;
6503 break;
6504
6505 case 0x01: /* CLG */
6506 /* op1c */
6507 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6508 return -1;
6509 /* op3 */
6510 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6511 return -1;
6512 break;
6513
6514 case 0x02: /* CLGR */
6515 /* op1c */
6516 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6517 return -1;
6518 /* op3 */
6519 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6520 return -1;
6521 break;
6522
6523 case 0x03: /* CLX */
6524 /* op1c */
6525 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6526 return -1;
6527 /* op3 */
6528 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6529 return -1;
6530 break;
6531
6532 case 0x08: /* DCS */
6533 /* op3c */
6534 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6535 return -1;
6536 /* fallthru */
6537 case 0x0c: /* CSST */
6538 /* op4 */
6539 if (record_full_arch_list_add_mem (oaddr2, 4))
6540 return -1;
6541 goto CS;
6542
6543 case 0x14: /* CSTST */
6544 /* op8 */
6545 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6546 return -1;
6547 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6548 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6549 if (record_full_arch_list_add_mem (oaddr3, 4))
6550 return -1;
6551 /* fallthru */
6552 case 0x10: /* CSDST */
6553 /* op6 */
6554 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6555 return -1;
6556 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6557 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6558 if (record_full_arch_list_add_mem (oaddr3, 4))
6559 return -1;
6560 /* op4 */
6561 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6562 return -1;
6563 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6564 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6565 if (record_full_arch_list_add_mem (oaddr3, 4))
6566 return -1;
6567 /* fallthru */
6568 case 0x04: /* CS */
6569 CS:
6570 /* op1c */
6571 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6572 return -1;
6573 /* op2 */
6574 if (record_full_arch_list_add_mem (oaddr, 4))
6575 return -1;
6576 break;
6577
6578 case 0x09: /* DCSG */
6579 /* op3c */
6580 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6581 return -1;
6582 goto CSSTG;
6583
6584 case 0x15: /* CSTSTG */
6585 /* op8 */
6586 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6587 return -1;
6588 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6589 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6590 if (record_full_arch_list_add_mem (oaddr3, 8))
6591 return -1;
6592 /* fallthru */
6593 case 0x11: /* CSDSTG */
6594 /* op6 */
6595 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6596 return -1;
6597 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6598 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6599 if (record_full_arch_list_add_mem (oaddr3, 8))
6600 return -1;
6601 /* fallthru */
6602 case 0x0d: /* CSSTG */
6603 CSSTG:
6604 /* op4 */
6605 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6606 return -1;
6607 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6608 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6609 if (record_full_arch_list_add_mem (oaddr3, 8))
6610 return -1;
6611 /* fallthru */
6612 case 0x05: /* CSG */
6613 /* op1c */
6614 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6615 return -1;
6616 /* op2 */
6617 if (record_full_arch_list_add_mem (oaddr, 8))
6618 return -1;
6619 break;
6620
6621 case 0x0a: /* DCSGR */
6622 /* op3c */
6623 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6624 return -1;
6625 /* fallthru */
6626 case 0x0e: /* CSSTGR */
6627 /* op4 */
6628 if (record_full_arch_list_add_mem (oaddr2, 8))
6629 return -1;
6630 goto CSGR;
6631
6632 case 0x16: /* CSTSTGR */
6633 /* op8 */
6634 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6635 return -1;
6636 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6637 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6638 if (record_full_arch_list_add_mem (oaddr3, 8))
6639 return -1;
6640 /* fallthru */
6641 case 0x12: /* CSDSTGR */
6642 /* op6 */
6643 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6644 return -1;
6645 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6646 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6647 if (record_full_arch_list_add_mem (oaddr3, 8))
6648 return -1;
6649 /* op4 */
6650 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6651 return -1;
6652 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6653 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6654 if (record_full_arch_list_add_mem (oaddr3, 8))
6655 return -1;
6656 /* fallthru */
6657 case 0x06: /* CSGR */
6658 CSGR:
6659 /* op1c */
6660 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6661 return -1;
6662 /* op2 */
6663 if (record_full_arch_list_add_mem (oaddr, 8))
6664 return -1;
6665 break;
6666
6667 case 0x0b: /* DCSX */
6668 /* op3c */
6669 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6670 return -1;
6671 goto CSSTX;
6672
6673 case 0x17: /* CSTSTX */
6674 /* op8 */
6675 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6676 return -1;
6677 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6678 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6679 if (record_full_arch_list_add_mem (oaddr3, 16))
6680 return -1;
6681 /* fallthru */
6682 case 0x13: /* CSDSTX */
6683 /* op6 */
6684 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6685 return -1;
6686 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6687 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6688 if (record_full_arch_list_add_mem (oaddr3, 16))
6689 return -1;
6690 /* fallthru */
6691 case 0x0f: /* CSSTX */
6692 CSSTX:
6693 /* op4 */
6694 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6695 return -1;
6696 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6697 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6698 if (record_full_arch_list_add_mem (oaddr3, 16))
6699 return -1;
6700 /* fallthru */
6701 case 0x07: /* CSX */
6702 /* op1c */
6703 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6704 return -1;
6705 /* op2 */
6706 if (record_full_arch_list_add_mem (oaddr, 16))
6707 return -1;
6708 break;
6709
6710 default:
6711 gdb_printf (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6712 fc, paddress (gdbarch, addr));
6713 return -1;
6714 }
6715 }
6716 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6717 return -1;
6718 break;
6719
6720 case 0xef: /* LMD - load multiple disjoint */
6721 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6722 if (s390_record_gpr_g (gdbarch, regcache, i))
6723 return -1;
6724 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6725 return -1;
6726 break;
6727
6728 case 0xf0: /* SRP - shift and round decimal */
6729 case 0xf8: /* ZAP - zero and add */
6730 case 0xfa: /* AP - add decimal */
6731 case 0xfb: /* SP - subtract decimal */
6732 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6733 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6734 return -1;
6735 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6736 return -1;
6737 /* DXC may be written */
6738 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6739 return -1;
6740 break;
6741
6742 case 0xf1: /* MVO - move with offset */
6743 case 0xf2: /* PACK - pack */
6744 case 0xf3: /* UNPK - unpack */
6745 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6746 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6747 return -1;
6748 break;
6749
6750 /* 0xf4-0xf7 undefined */
6751
6752 case 0xf9: /* CP - compare decimal */
6753 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6754 return -1;
6755 /* DXC may be written */
6756 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6757 return -1;
6758 break;
6759
6760 case 0xfc: /* MP - multiply decimal */
6761 case 0xfd: /* DP - divide decimal */
6762 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6763 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6764 return -1;
6765 /* DXC may be written */
6766 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6767 return -1;
6768 break;
6769
6770 /* 0xfe-0xff undefined */
6771
6772 default:
6773 UNKNOWN_OP:
6774 gdb_printf (gdb_stdlog, "Warning: Don't know how to record %04x "
6775 "at %s.\n", insn[0], paddress (gdbarch, addr));
6776 return -1;
6777 }
6778
6779 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6780 return -1;
6781 if (record_full_arch_list_add_end ())
6782 return -1;
6783 return 0;
6784 }
6785
6786 /* Miscellaneous. */
6787
6788 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6789 "-mcmodel=large". */
6790
6791 static std::string
6792 s390_gcc_target_options (struct gdbarch *gdbarch)
6793 {
6794 return gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31";
6795 }
6796
6797 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6798 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6799 always "s390". Note that an s390x compiler supports "-m31" as
6800 well. */
6801
6802 static const char *
6803 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6804 {
6805 return "s390x?";
6806 }
6807
6808 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6809 gdbarch.h. */
6810
6811 static int
6812 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6813 {
6814 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6815 or indirection. */
6816 || *s == '%' /* Register access. */
6817 || isdigit (*s)); /* Literal number. */
6818 }
6819
6820 /* gdbarch init. */
6821
6822 /* Validate the range of registers. NAMES must be known at compile time. */
6823
6824 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6825 do \
6826 { \
6827 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6828 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6829 return false; \
6830 } \
6831 while (0)
6832
6833 /* Validate the target description. Also numbers registers contained in
6834 tdesc. */
6835
6836 static bool
6837 s390_tdesc_valid (s390_gdbarch_tdep *tdep,
6838 struct tdesc_arch_data *tdesc_data)
6839 {
6840 static const char *const psw[] = {
6841 "pswm", "pswa"
6842 };
6843 static const char *const gprs[] = {
6844 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6845 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6846 };
6847 static const char *const fprs[] = {
6848 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6849 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6850 };
6851 static const char *const acrs[] = {
6852 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6853 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6854 };
6855 static const char *const gprs_lower[] = {
6856 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6857 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6858 };
6859 static const char *const gprs_upper[] = {
6860 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6861 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6862 };
6863 static const char *const tdb_regs[] = {
6864 "tdb0", "tac", "tct", "atia",
6865 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6866 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6867 };
6868 static const char *const vxrs_low[] = {
6869 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6870 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6871 };
6872 static const char *const vxrs_high[] = {
6873 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6874 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6875 };
6876 static const char *const gs_cb[] = {
6877 "gsd", "gssm", "gsepla",
6878 };
6879 static const char *const gs_bc[] = {
6880 "bc_gsd", "bc_gssm", "bc_gsepla",
6881 };
6882
6883 const struct target_desc *tdesc = tdep->tdesc;
6884 const struct tdesc_feature *feature;
6885
6886 if (!tdesc_has_registers (tdesc))
6887 return false;
6888
6889 /* Core registers, i.e. general purpose and PSW. */
6890 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6891 if (feature == NULL)
6892 return false;
6893
6894 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6895
6896 if (tdesc_unnumbered_register (feature, "r0"))
6897 {
6898 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6899 }
6900 else
6901 {
6902 tdep->have_upper = true;
6903 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6904 gprs_lower);
6905 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6906 gprs_upper);
6907 }
6908
6909 /* Floating point registers. */
6910 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6911 if (feature == NULL)
6912 return false;
6913
6914 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6915 return false;
6916
6917 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6918
6919 /* Access control registers. */
6920 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6921 if (feature == NULL)
6922 return false;
6923
6924 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6925
6926 /* Optional GNU/Linux-specific "registers". */
6927 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6928 if (feature)
6929 {
6930 tdesc_numbered_register (feature, tdesc_data,
6931 S390_ORIG_R2_REGNUM, "orig_r2");
6932
6933 if (tdesc_numbered_register (feature, tdesc_data,
6934 S390_LAST_BREAK_REGNUM, "last_break"))
6935 tdep->have_linux_v1 = true;
6936
6937 if (tdesc_numbered_register (feature, tdesc_data,
6938 S390_SYSTEM_CALL_REGNUM, "system_call"))
6939 tdep->have_linux_v2 = true;
6940
6941 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6942 return false;
6943 }
6944
6945 /* Transaction diagnostic block. */
6946 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6947 if (feature)
6948 {
6949 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6950 tdb_regs);
6951 tdep->have_tdb = true;
6952 }
6953
6954 /* Vector registers. */
6955 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6956 if (feature)
6957 {
6958 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6959 vxrs_low);
6960 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6961 vxrs_high);
6962 tdep->have_vx = true;
6963 }
6964
6965 /* Guarded-storage registers. */
6966 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6967 if (feature)
6968 {
6969 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6970 tdep->have_gs = true;
6971 }
6972
6973 /* Guarded-storage broadcast control. */
6974 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6975 if (feature)
6976 {
6977 if (!tdep->have_gs)
6978 return false;
6979 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6980 gs_bc);
6981 }
6982
6983 return true;
6984 }
6985
6986 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6987 memory after use. */
6988
6989 static s390_gdbarch_tdep *
6990 s390_gdbarch_tdep_alloc ()
6991 {
6992 s390_gdbarch_tdep *tdep = new s390_gdbarch_tdep;
6993
6994 tdep->tdesc = NULL;
6995
6996 tdep->abi = ABI_NONE;
6997 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6998
6999 tdep->gpr_full_regnum = -1;
7000 tdep->v0_full_regnum = -1;
7001 tdep->pc_regnum = -1;
7002 tdep->cc_regnum = -1;
7003
7004 tdep->have_upper = false;
7005 tdep->have_linux_v1 = false;
7006 tdep->have_linux_v2 = false;
7007 tdep->have_tdb = false;
7008 tdep->have_vx = false;
7009 tdep->have_gs = false;
7010
7011 tdep->s390_syscall_record = NULL;
7012
7013 return tdep;
7014 }
7015
7016 /* Set up gdbarch struct. */
7017
7018 static struct gdbarch *
7019 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7020 {
7021 const struct target_desc *tdesc = info.target_desc;
7022 int first_pseudo_reg, last_pseudo_reg;
7023 static const char *const stap_register_prefixes[] = { "%", NULL };
7024 static const char *const stap_register_indirection_prefixes[] = { "(",
7025 NULL };
7026 static const char *const stap_register_indirection_suffixes[] = { ")",
7027 NULL };
7028
7029 s390_gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
7030 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
7031 tdesc_arch_data_up tdesc_data = tdesc_data_alloc ();
7032 info.tdesc_data = tdesc_data.get ();
7033
7034 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
7035 set_gdbarch_char_signed (gdbarch, 0);
7036
7037 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7038 We can safely let them default to 128-bit, since the debug info
7039 will give the size of type actually used in each case. */
7040 set_gdbarch_long_double_bit (gdbarch, 128);
7041 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_quad);
7042
7043 set_gdbarch_type_align (gdbarch, s390_type_align);
7044
7045 /* Breakpoints. */
7046 /* Amount PC must be decremented by after a breakpoint. This is
7047 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
7048 always. */
7049 set_gdbarch_decr_pc_after_break (gdbarch, 2);
7050 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
7051 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
7052
7053 /* Displaced stepping. */
7054 set_gdbarch_displaced_step_copy_insn (gdbarch,
7055 s390_displaced_step_copy_insn);
7056 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
7057 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
7058 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7059 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
7060
7061 /* Prologue analysis. */
7062 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
7063
7064 /* Register handling. */
7065 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
7066 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
7067 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
7068 set_gdbarch_guess_tracepoint_registers (gdbarch,
7069 s390_guess_tracepoint_registers);
7070 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7071 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7072 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7073
7074 /* Pseudo registers. */
7075 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7076 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7077 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7078 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7079 set_tdesc_pseudo_register_reggroup_p (gdbarch,
7080 s390_pseudo_register_reggroup_p);
7081 set_gdbarch_ax_pseudo_register_collect (gdbarch,
7082 s390_ax_pseudo_register_collect);
7083 set_gdbarch_ax_pseudo_register_push_stack
7084 (gdbarch, s390_ax_pseudo_register_push_stack);
7085 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7086
7087 /* Inferior function calls. */
7088 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
7089 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7090 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7091 set_gdbarch_return_value (gdbarch, s390_return_value);
7092
7093 /* Frame handling. */
7094 /* Stack grows downward. */
7095 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7096 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7097 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7098 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7099 dwarf2_append_unwinders (gdbarch);
7100 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7101 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7102
7103 switch (info.bfd_arch_info->mach)
7104 {
7105 case bfd_mach_s390_31:
7106 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7107 break;
7108
7109 case bfd_mach_s390_64:
7110 set_gdbarch_long_bit (gdbarch, 64);
7111 set_gdbarch_long_long_bit (gdbarch, 64);
7112 set_gdbarch_ptr_bit (gdbarch, 64);
7113 set_gdbarch_address_class_type_flags (gdbarch,
7114 s390_address_class_type_flags);
7115 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7116 s390_address_class_type_flags_to_name);
7117 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7118 s390_address_class_name_to_type_flags);
7119 break;
7120 }
7121
7122 /* SystemTap functions. */
7123 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7124 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7125 stap_register_indirection_prefixes);
7126 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7127 stap_register_indirection_suffixes);
7128
7129 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7130 set_gdbarch_valid_disassembler_options (gdbarch,
7131 disassembler_options_s390 ());
7132
7133 /* Process record-replay */
7134 set_gdbarch_process_record (gdbarch, s390_process_record);
7135
7136 /* Miscellaneous. */
7137 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7138 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7139 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7140
7141 /* Initialize the OSABI. */
7142 gdbarch_init_osabi (info, gdbarch);
7143
7144 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7145 cause GDB to crash with an internal error when the user tries to set
7146 an unsupported OSABI. */
7147 if (!tdesc_has_registers (tdesc))
7148 {
7149 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7150 tdesc = tdesc_s390_linux32;
7151 else
7152 tdesc = tdesc_s390x_linux64;
7153 }
7154 tdep->tdesc = tdesc;
7155
7156 /* Check any target description for validity. */
7157 if (!s390_tdesc_valid (tdep, tdesc_data.get ()))
7158 {
7159 delete tdep;
7160 gdbarch_free (gdbarch);
7161 return NULL;
7162 }
7163
7164 /* Determine vector ABI. */
7165 #ifdef HAVE_ELF
7166 if (tdep->have_vx
7167 && info.abfd != NULL
7168 && info.abfd->format == bfd_object
7169 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7170 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7171 Tag_GNU_S390_ABI_Vector) == 2)
7172 tdep->vector_abi = S390_VECTOR_ABI_128;
7173 #endif
7174
7175 /* Find a candidate among extant architectures. */
7176 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7177 arches != NULL;
7178 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7179 {
7180 s390_gdbarch_tdep *tmp
7181 = gdbarch_tdep<s390_gdbarch_tdep> (arches->gdbarch);
7182
7183 if (!tmp)
7184 continue;
7185
7186 /* A program can 'choose' not to use the vector registers when they
7187 are present. Leading to the same tdesc but different tdep and
7188 thereby a different gdbarch. */
7189 if (tmp->vector_abi != tdep->vector_abi)
7190 continue;
7191
7192 delete tdep;
7193 gdbarch_free (gdbarch);
7194 return arches->gdbarch;
7195 }
7196
7197 tdesc_use_registers (gdbarch, tdep->tdesc, std::move (tdesc_data));
7198 set_gdbarch_register_name (gdbarch, s390_register_name);
7199
7200 /* Assign pseudo register numbers. */
7201 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7202 last_pseudo_reg = first_pseudo_reg;
7203 if (tdep->have_upper)
7204 {
7205 tdep->gpr_full_regnum = last_pseudo_reg;
7206 last_pseudo_reg += 16;
7207 }
7208 if (tdep->have_vx)
7209 {
7210 tdep->v0_full_regnum = last_pseudo_reg;
7211 last_pseudo_reg += 16;
7212 }
7213 tdep->pc_regnum = last_pseudo_reg++;
7214 tdep->cc_regnum = last_pseudo_reg++;
7215 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7216 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7217
7218 /* Frame handling. */
7219 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7220 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7221 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7222 frame_base_set_default (gdbarch, &s390_frame_base);
7223
7224 return gdbarch;
7225 }
7226
7227 void _initialize_s390_tdep ();
7228 void
7229 _initialize_s390_tdep ()
7230 {
7231 /* Hook us into the gdbarch mechanism. */
7232 gdbarch_register (bfd_arch_s390, s390_gdbarch_init);
7233
7234 initialize_tdesc_s390_linux32 ();
7235 initialize_tdesc_s390x_linux64 ();
7236 }