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gdb: introduce displaced_step_closure_up type alias
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1 /* Target-dependent code for s390.
2
3 Copyright (C) 2001-2020 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 #include "defs.h"
21
22 #include "arch-utils.h"
23 #include "ax-gdb.h"
24 #include "dwarf2/frame.h"
25 #include "elf/s390.h"
26 #include "elf-bfd.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
29 #include "gdbarch.h"
30 #include "gdbcore.h"
31 #include "infrun.h"
32 #include "linux-tdep.h"
33 #include "objfiles.h"
34 #include "osabi.h"
35 #include "record-full.h"
36 #include "regcache.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
41 #include "value.h"
42
43 #include "features/s390-linux32.c"
44 #include "features/s390x-linux64.c"
45
46 /* Holds the current set of options to be passed to the disassembler. */
47 static char *s390_disassembler_options;
48
49 /* Breakpoints. */
50
51 constexpr gdb_byte s390_break_insn[] = { 0x0, 0x1 };
52
53 typedef BP_MANIPULATION (s390_break_insn) s390_breakpoint;
54
55 /* Types. */
56
57 /* Implement the gdbarch type alignment method. */
58
59 static ULONGEST
60 s390_type_align (gdbarch *gdbarch, struct type *t)
61 {
62 t = check_typedef (t);
63
64 if (TYPE_LENGTH (t) > 8)
65 {
66 switch (TYPE_CODE (t))
67 {
68 case TYPE_CODE_INT:
69 case TYPE_CODE_RANGE:
70 case TYPE_CODE_FLT:
71 case TYPE_CODE_ENUM:
72 case TYPE_CODE_CHAR:
73 case TYPE_CODE_BOOL:
74 case TYPE_CODE_DECFLOAT:
75 return 8;
76
77 case TYPE_CODE_ARRAY:
78 if (TYPE_VECTOR (t))
79 return 8;
80 break;
81 }
82 }
83 return 0;
84 }
85
86 /* Decoding S/390 instructions. */
87
88 /* Read a single instruction from address AT. */
89
90 static int
91 s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
92 {
93 static int s390_instrlen[] = { 2, 4, 4, 6 };
94 int instrlen;
95
96 if (target_read_memory (at, &instr[0], 2))
97 return -1;
98 instrlen = s390_instrlen[instr[0] >> 6];
99 if (instrlen > 2)
100 {
101 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
102 return -1;
103 }
104 return instrlen;
105 }
106
107 /* The functions below are for recognizing and decoding S/390
108 instructions of various formats. Each of them checks whether INSN
109 is an instruction of the given format, with the specified opcodes.
110 If it is, it sets the remaining arguments to the values of the
111 instruction's fields, and returns a non-zero value; otherwise, it
112 returns zero.
113
114 These functions' arguments appear in the order they appear in the
115 instruction, not in the machine-language form. So, opcodes always
116 come first, even though they're sometimes scattered around the
117 instructions. And displacements appear before base and extension
118 registers, as they do in the assembly syntax, not at the end, as
119 they do in the machine language.
120
121 Test for RI instruction format. */
122
123 static int
124 is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
125 {
126 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
127 {
128 *r1 = (insn[1] >> 4) & 0xf;
129 /* i2 is a 16-bit signed quantity. */
130 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
131 return 1;
132 }
133 else
134 return 0;
135 }
136
137 /* Test for RIL instruction format. See comment on is_ri for details. */
138
139 static int
140 is_ril (bfd_byte *insn, int op1, int op2,
141 unsigned int *r1, int *i2)
142 {
143 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
144 {
145 *r1 = (insn[1] >> 4) & 0xf;
146 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
147 no sign extension is necessary, but we don't want to assume
148 that. */
149 *i2 = (((insn[2] << 24)
150 | (insn[3] << 16)
151 | (insn[4] << 8)
152 | (insn[5])) ^ 0x80000000) - 0x80000000;
153 return 1;
154 }
155 else
156 return 0;
157 }
158
159 /* Test for RR instruction format. See comment on is_ri for details. */
160
161 static int
162 is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
163 {
164 if (insn[0] == op)
165 {
166 *r1 = (insn[1] >> 4) & 0xf;
167 *r2 = insn[1] & 0xf;
168 return 1;
169 }
170 else
171 return 0;
172 }
173
174 /* Test for RRE instruction format. See comment on is_ri for details. */
175
176 static int
177 is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
178 {
179 if (((insn[0] << 8) | insn[1]) == op)
180 {
181 /* Yes, insn[3]. insn[2] is unused in RRE format. */
182 *r1 = (insn[3] >> 4) & 0xf;
183 *r2 = insn[3] & 0xf;
184 return 1;
185 }
186 else
187 return 0;
188 }
189
190 /* Test for RS instruction format. See comment on is_ri for details. */
191
192 static int
193 is_rs (bfd_byte *insn, int op,
194 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
195 {
196 if (insn[0] == op)
197 {
198 *r1 = (insn[1] >> 4) & 0xf;
199 *r3 = insn[1] & 0xf;
200 *b2 = (insn[2] >> 4) & 0xf;
201 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
202 return 1;
203 }
204 else
205 return 0;
206 }
207
208 /* Test for RSY instruction format. See comment on is_ri for details. */
209
210 static int
211 is_rsy (bfd_byte *insn, int op1, int op2,
212 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
213 {
214 if (insn[0] == op1
215 && insn[5] == op2)
216 {
217 *r1 = (insn[1] >> 4) & 0xf;
218 *r3 = insn[1] & 0xf;
219 *b2 = (insn[2] >> 4) & 0xf;
220 /* The 'long displacement' is a 20-bit signed integer. */
221 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
222 ^ 0x80000) - 0x80000;
223 return 1;
224 }
225 else
226 return 0;
227 }
228
229 /* Test for RX instruction format. See comment on is_ri for details. */
230
231 static int
232 is_rx (bfd_byte *insn, int op,
233 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
234 {
235 if (insn[0] == op)
236 {
237 *r1 = (insn[1] >> 4) & 0xf;
238 *x2 = insn[1] & 0xf;
239 *b2 = (insn[2] >> 4) & 0xf;
240 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
241 return 1;
242 }
243 else
244 return 0;
245 }
246
247 /* Test for RXY instruction format. See comment on is_ri for details. */
248
249 static int
250 is_rxy (bfd_byte *insn, int op1, int op2,
251 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
252 {
253 if (insn[0] == op1
254 && insn[5] == op2)
255 {
256 *r1 = (insn[1] >> 4) & 0xf;
257 *x2 = insn[1] & 0xf;
258 *b2 = (insn[2] >> 4) & 0xf;
259 /* The 'long displacement' is a 20-bit signed integer. */
260 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
261 ^ 0x80000) - 0x80000;
262 return 1;
263 }
264 else
265 return 0;
266 }
267
268 /* A helper for s390_software_single_step, decides if an instruction
269 is a partial-execution instruction that needs to be executed until
270 completion when in record mode. If it is, returns 1 and writes
271 instruction length to a pointer. */
272
273 static int
274 s390_is_partial_instruction (struct gdbarch *gdbarch, CORE_ADDR loc, int *len)
275 {
276 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
277 uint16_t insn;
278
279 insn = read_memory_integer (loc, 2, byte_order);
280
281 switch (insn >> 8)
282 {
283 case 0xa8: /* MVCLE */
284 *len = 4;
285 return 1;
286
287 case 0xeb:
288 {
289 insn = read_memory_integer (loc + 4, 2, byte_order);
290 if ((insn & 0xff) == 0x8e)
291 {
292 /* MVCLU */
293 *len = 6;
294 return 1;
295 }
296 }
297 break;
298 }
299
300 switch (insn)
301 {
302 case 0xb255: /* MVST */
303 case 0xb263: /* CMPSC */
304 case 0xb2a5: /* TRE */
305 case 0xb2a6: /* CU21 */
306 case 0xb2a7: /* CU12 */
307 case 0xb9b0: /* CU14 */
308 case 0xb9b1: /* CU24 */
309 case 0xb9b2: /* CU41 */
310 case 0xb9b3: /* CU42 */
311 case 0xb92a: /* KMF */
312 case 0xb92b: /* KMO */
313 case 0xb92f: /* KMC */
314 case 0xb92d: /* KMCTR */
315 case 0xb92e: /* KM */
316 case 0xb93c: /* PPNO */
317 case 0xb990: /* TRTT */
318 case 0xb991: /* TRTO */
319 case 0xb992: /* TROT */
320 case 0xb993: /* TROO */
321 *len = 4;
322 return 1;
323 }
324
325 return 0;
326 }
327
328 /* Implement the "software_single_step" gdbarch method, needed to single step
329 through instructions like MVCLE in record mode, to make sure they are
330 executed to completion. Without that, record will save the full length
331 of destination buffer on every iteration, even though the CPU will only
332 process about 4kiB of it each time, leading to O(n**2) memory and time
333 complexity. */
334
335 static std::vector<CORE_ADDR>
336 s390_software_single_step (struct regcache *regcache)
337 {
338 struct gdbarch *gdbarch = regcache->arch ();
339 CORE_ADDR loc = regcache_read_pc (regcache);
340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
341 int len;
342 uint16_t insn;
343
344 /* Special handling only if recording. */
345 if (!record_full_is_used ())
346 return {};
347
348 /* First, match a partial instruction. */
349 if (!s390_is_partial_instruction (gdbarch, loc, &len))
350 return {};
351
352 loc += len;
353
354 /* Second, look for a branch back to it. */
355 insn = read_memory_integer (loc, 2, byte_order);
356 if (insn != 0xa714) /* BRC with mask 1 */
357 return {};
358
359 insn = read_memory_integer (loc + 2, 2, byte_order);
360 if (insn != (uint16_t) -(len / 2))
361 return {};
362
363 loc += 4;
364
365 /* Found it, step past the whole thing. */
366 return {loc};
367 }
368
369 /* Displaced stepping. */
370
371 /* Return true if INSN is a non-branch RIL-b or RIL-c format
372 instruction. */
373
374 static int
375 is_non_branch_ril (gdb_byte *insn)
376 {
377 gdb_byte op1 = insn[0];
378
379 if (op1 == 0xc4)
380 {
381 gdb_byte op2 = insn[1] & 0x0f;
382
383 switch (op2)
384 {
385 case 0x02: /* llhrl */
386 case 0x04: /* lghrl */
387 case 0x05: /* lhrl */
388 case 0x06: /* llghrl */
389 case 0x07: /* sthrl */
390 case 0x08: /* lgrl */
391 case 0x0b: /* stgrl */
392 case 0x0c: /* lgfrl */
393 case 0x0d: /* lrl */
394 case 0x0e: /* llgfrl */
395 case 0x0f: /* strl */
396 return 1;
397 }
398 }
399 else if (op1 == 0xc6)
400 {
401 gdb_byte op2 = insn[1] & 0x0f;
402
403 switch (op2)
404 {
405 case 0x00: /* exrl */
406 case 0x02: /* pfdrl */
407 case 0x04: /* cghrl */
408 case 0x05: /* chrl */
409 case 0x06: /* clghrl */
410 case 0x07: /* clhrl */
411 case 0x08: /* cgrl */
412 case 0x0a: /* clgrl */
413 case 0x0c: /* cgfrl */
414 case 0x0d: /* crl */
415 case 0x0e: /* clgfrl */
416 case 0x0f: /* clrl */
417 return 1;
418 }
419 }
420
421 return 0;
422 }
423
424 typedef buf_displaced_step_closure s390_displaced_step_closure;
425
426 /* Implementation of gdbarch_displaced_step_copy_insn. */
427
428 static displaced_step_closure_up
429 s390_displaced_step_copy_insn (struct gdbarch *gdbarch,
430 CORE_ADDR from, CORE_ADDR to,
431 struct regcache *regs)
432 {
433 size_t len = gdbarch_max_insn_length (gdbarch);
434 std::unique_ptr<s390_displaced_step_closure> closure
435 (new s390_displaced_step_closure (len));
436 gdb_byte *buf = closure->buf.data ();
437
438 read_memory (from, buf, len);
439
440 /* Adjust the displacement field of PC-relative RIL instructions,
441 except branches. The latter are handled in the fixup hook. */
442 if (is_non_branch_ril (buf))
443 {
444 LONGEST offset;
445
446 offset = extract_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG);
447 offset = (from - to + offset * 2) / 2;
448
449 /* If the instruction is too far from the jump pad, punt. This
450 will usually happen with instructions in shared libraries.
451 We could probably support these by rewriting them to be
452 absolute or fully emulating them. */
453 if (offset < INT32_MIN || offset > INT32_MAX)
454 {
455 /* Let the core fall back to stepping over the breakpoint
456 in-line. */
457 if (debug_displaced)
458 {
459 fprintf_unfiltered (gdb_stdlog,
460 "displaced: can't displaced step "
461 "RIL instruction: offset %s out of range\n",
462 plongest (offset));
463 }
464
465 return NULL;
466 }
467
468 store_signed_integer (buf + 2, 4, BFD_ENDIAN_BIG, offset);
469 }
470
471 write_memory (to, buf, len);
472
473 if (debug_displaced)
474 {
475 fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ",
476 paddress (gdbarch, from), paddress (gdbarch, to));
477 displaced_step_dump_bytes (gdb_stdlog, buf, len);
478 }
479
480 return closure;
481 }
482
483 /* Fix up the state of registers and memory after having single-stepped
484 a displaced instruction. */
485
486 static void
487 s390_displaced_step_fixup (struct gdbarch *gdbarch,
488 struct displaced_step_closure *closure_,
489 CORE_ADDR from, CORE_ADDR to,
490 struct regcache *regs)
491 {
492 /* Our closure is a copy of the instruction. */
493 s390_displaced_step_closure *closure
494 = (s390_displaced_step_closure *) closure_;
495 gdb_byte *insn = closure->buf.data ();
496 static int s390_instrlen[] = { 2, 4, 4, 6 };
497 int insnlen = s390_instrlen[insn[0] >> 6];
498
499 /* Fields for various kinds of instructions. */
500 unsigned int b2, r1, r2, x2, r3;
501 int i2, d2;
502
503 /* Get current PC and addressing mode bit. */
504 CORE_ADDR pc = regcache_read_pc (regs);
505 ULONGEST amode = 0;
506
507 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
508 {
509 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
510 amode &= 0x80000000;
511 }
512
513 if (debug_displaced)
514 fprintf_unfiltered (gdb_stdlog,
515 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
516 paddress (gdbarch, from), paddress (gdbarch, to),
517 paddress (gdbarch, pc), insnlen, (int) amode);
518
519 /* Handle absolute branch and save instructions. */
520 if (is_rr (insn, op_basr, &r1, &r2)
521 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
522 {
523 /* Recompute saved return address in R1. */
524 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
525 amode | (from + insnlen));
526 /* Update PC iff the instruction doesn't actually branch. */
527 if (insn[0] == op_basr && r2 == 0)
528 regcache_write_pc (regs, from + insnlen);
529 }
530
531 /* Handle absolute branch instructions. */
532 else if (is_rr (insn, op_bcr, &r1, &r2)
533 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
534 || is_rr (insn, op_bctr, &r1, &r2)
535 || is_rre (insn, op_bctgr, &r1, &r2)
536 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
537 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
538 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
539 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
540 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
541 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
542 {
543 /* Update PC iff branch was *not* taken. */
544 if (pc == to + insnlen)
545 regcache_write_pc (regs, from + insnlen);
546 }
547
548 /* Handle PC-relative branch and save instructions. */
549 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
550 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
551 {
552 /* Update PC. */
553 regcache_write_pc (regs, pc - to + from);
554 /* Recompute saved return address in R1. */
555 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
556 amode | (from + insnlen));
557 }
558
559 /* Handle LOAD ADDRESS RELATIVE LONG. */
560 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
561 {
562 /* Update PC. */
563 regcache_write_pc (regs, from + insnlen);
564 /* Recompute output address in R1. */
565 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
566 amode | (from + i2 * 2));
567 }
568
569 /* If we executed a breakpoint instruction, point PC right back at it. */
570 else if (insn[0] == 0x0 && insn[1] == 0x1)
571 regcache_write_pc (regs, from);
572
573 /* For any other insn, adjust PC by negated displacement. PC then
574 points right after the original instruction, except for PC-relative
575 branches, where it points to the adjusted branch target. */
576 else
577 regcache_write_pc (regs, pc - to + from);
578
579 if (debug_displaced)
580 fprintf_unfiltered (gdb_stdlog,
581 "displaced: (s390) pc is now %s\n",
582 paddress (gdbarch, regcache_read_pc (regs)));
583 }
584
585 /* Implement displaced_step_hw_singlestep gdbarch method. */
586
587 static int
588 s390_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
589 struct displaced_step_closure *closure)
590 {
591 return 1;
592 }
593
594 /* Prologue analysis. */
595
596 struct s390_prologue_data {
597
598 /* The stack. */
599 struct pv_area *stack;
600
601 /* The size and byte-order of a GPR or FPR. */
602 int gpr_size;
603 int fpr_size;
604 enum bfd_endian byte_order;
605
606 /* The general-purpose registers. */
607 pv_t gpr[S390_NUM_GPRS];
608
609 /* The floating-point registers. */
610 pv_t fpr[S390_NUM_FPRS];
611
612 /* The offset relative to the CFA where the incoming GPR N was saved
613 by the function prologue. 0 if not saved or unknown. */
614 int gpr_slot[S390_NUM_GPRS];
615
616 /* Likewise for FPRs. */
617 int fpr_slot[S390_NUM_FPRS];
618
619 /* Nonzero if the backchain was saved. This is assumed to be the
620 case when the incoming SP is saved at the current SP location. */
621 int back_chain_saved_p;
622 };
623
624 /* Return the effective address for an X-style instruction, like:
625
626 L R1, D2(X2, B2)
627
628 Here, X2 and B2 are registers, and D2 is a signed 20-bit
629 constant; the effective address is the sum of all three. If either
630 X2 or B2 are zero, then it doesn't contribute to the sum --- this
631 means that r0 can't be used as either X2 or B2. */
632
633 static pv_t
634 s390_addr (struct s390_prologue_data *data,
635 int d2, unsigned int x2, unsigned int b2)
636 {
637 pv_t result;
638
639 result = pv_constant (d2);
640 if (x2)
641 result = pv_add (result, data->gpr[x2]);
642 if (b2)
643 result = pv_add (result, data->gpr[b2]);
644
645 return result;
646 }
647
648 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
649
650 static void
651 s390_store (struct s390_prologue_data *data,
652 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
653 pv_t value)
654 {
655 pv_t addr = s390_addr (data, d2, x2, b2);
656 pv_t offset;
657
658 /* Check whether we are storing the backchain. */
659 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
660
661 if (pv_is_constant (offset) && offset.k == 0)
662 if (size == data->gpr_size
663 && pv_is_register_k (value, S390_SP_REGNUM, 0))
664 {
665 data->back_chain_saved_p = 1;
666 return;
667 }
668
669 /* Check whether we are storing a register into the stack. */
670 if (!data->stack->store_would_trash (addr))
671 data->stack->store (addr, size, value);
672
673 /* Note: If this is some store we cannot identify, you might think we
674 should forget our cached values, as any of those might have been hit.
675
676 However, we make the assumption that the register save areas are only
677 ever stored to once in any given function, and we do recognize these
678 stores. Thus every store we cannot recognize does not hit our data. */
679 }
680
681 /* Do a SIZE-byte load from D2(X2,B2). */
682
683 static pv_t
684 s390_load (struct s390_prologue_data *data,
685 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
686
687 {
688 pv_t addr = s390_addr (data, d2, x2, b2);
689
690 /* If it's a load from an in-line constant pool, then we can
691 simulate that, under the assumption that the code isn't
692 going to change between the time the processor actually
693 executed it creating the current frame, and the time when
694 we're analyzing the code to unwind past that frame. */
695 if (pv_is_constant (addr))
696 {
697 struct target_section *secp;
698 secp = target_section_by_addr (current_top_target (), addr.k);
699 if (secp != NULL
700 && (bfd_section_flags (secp->the_bfd_section) & SEC_READONLY))
701 return pv_constant (read_memory_integer (addr.k, size,
702 data->byte_order));
703 }
704
705 /* Check whether we are accessing one of our save slots. */
706 return data->stack->fetch (addr, size);
707 }
708
709 /* Function for finding saved registers in a 'struct pv_area'; we pass
710 this to pv_area::scan.
711
712 If VALUE is a saved register, ADDR says it was saved at a constant
713 offset from the frame base, and SIZE indicates that the whole
714 register was saved, record its offset in the reg_offset table in
715 PROLOGUE_UNTYPED. */
716
717 static void
718 s390_check_for_saved (void *data_untyped, pv_t addr,
719 CORE_ADDR size, pv_t value)
720 {
721 struct s390_prologue_data *data = (struct s390_prologue_data *) data_untyped;
722 int i, offset;
723
724 if (!pv_is_register (addr, S390_SP_REGNUM))
725 return;
726
727 offset = 16 * data->gpr_size + 32 - addr.k;
728
729 /* If we are storing the original value of a register, we want to
730 record the CFA offset. If the same register is stored multiple
731 times, the stack slot with the highest address counts. */
732
733 for (i = 0; i < S390_NUM_GPRS; i++)
734 if (size == data->gpr_size
735 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
736 if (data->gpr_slot[i] == 0
737 || data->gpr_slot[i] > offset)
738 {
739 data->gpr_slot[i] = offset;
740 return;
741 }
742
743 for (i = 0; i < S390_NUM_FPRS; i++)
744 if (size == data->fpr_size
745 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
746 if (data->fpr_slot[i] == 0
747 || data->fpr_slot[i] > offset)
748 {
749 data->fpr_slot[i] = offset;
750 return;
751 }
752 }
753
754 /* Analyze the prologue of the function starting at START_PC, continuing at
755 most until CURRENT_PC. Initialize DATA to hold all information we find
756 out about the state of the registers and stack slots. Return the address
757 of the instruction after the last one that changed the SP, FP, or back
758 chain; or zero on error. */
759
760 static CORE_ADDR
761 s390_analyze_prologue (struct gdbarch *gdbarch,
762 CORE_ADDR start_pc,
763 CORE_ADDR current_pc,
764 struct s390_prologue_data *data)
765 {
766 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
767
768 /* Our return value:
769 The address of the instruction after the last one that changed
770 the SP, FP, or back chain; zero if we got an error trying to
771 read memory. */
772 CORE_ADDR result = start_pc;
773
774 /* The current PC for our abstract interpretation. */
775 CORE_ADDR pc;
776
777 /* The address of the next instruction after that. */
778 CORE_ADDR next_pc;
779
780 pv_area stack (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
781 scoped_restore restore_stack = make_scoped_restore (&data->stack, &stack);
782
783 /* Set up everything's initial value. */
784 {
785 int i;
786
787 /* For the purpose of prologue tracking, we consider the GPR size to
788 be equal to the ABI word size, even if it is actually larger
789 (i.e. when running a 32-bit binary under a 64-bit kernel). */
790 data->gpr_size = word_size;
791 data->fpr_size = 8;
792 data->byte_order = gdbarch_byte_order (gdbarch);
793
794 for (i = 0; i < S390_NUM_GPRS; i++)
795 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
796
797 for (i = 0; i < S390_NUM_FPRS; i++)
798 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
799
800 for (i = 0; i < S390_NUM_GPRS; i++)
801 data->gpr_slot[i] = 0;
802
803 for (i = 0; i < S390_NUM_FPRS; i++)
804 data->fpr_slot[i] = 0;
805
806 data->back_chain_saved_p = 0;
807 }
808
809 /* Start interpreting instructions, until we hit the frame's
810 current PC or the first branch instruction. */
811 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
812 {
813 bfd_byte insn[S390_MAX_INSTR_SIZE];
814 int insn_len = s390_readinstruction (insn, pc);
815
816 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
817 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
818 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
819
820 /* Fields for various kinds of instructions. */
821 unsigned int b2, r1, r2, x2, r3;
822 int i2, d2;
823
824 /* The values of SP and FP before this instruction,
825 for detecting instructions that change them. */
826 pv_t pre_insn_sp, pre_insn_fp;
827 /* Likewise for the flag whether the back chain was saved. */
828 int pre_insn_back_chain_saved_p;
829
830 /* If we got an error trying to read the instruction, report it. */
831 if (insn_len < 0)
832 {
833 result = 0;
834 break;
835 }
836
837 next_pc = pc + insn_len;
838
839 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
840 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
841 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
842
843 /* LHI r1, i2 --- load halfword immediate. */
844 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
845 /* LGFI r1, i2 --- load fullword immediate. */
846 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
847 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
848 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
849 data->gpr[r1] = pv_constant (i2);
850
851 /* LR r1, r2 --- load from register. */
852 /* LGR r1, r2 --- load from register (64-bit version). */
853 else if (is_rr (insn32, op_lr, &r1, &r2)
854 || is_rre (insn64, op_lgr, &r1, &r2))
855 data->gpr[r1] = data->gpr[r2];
856
857 /* L r1, d2(x2, b2) --- load. */
858 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
859 /* LG r1, d2(x2, b2) --- load (64-bit version). */
860 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
861 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
862 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
863 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
864
865 /* ST r1, d2(x2, b2) --- store. */
866 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
867 /* STG r1, d2(x2, b2) --- store (64-bit version). */
868 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
869 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
870 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
871 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
872
873 /* STD r1, d2(x2,b2) --- store floating-point register. */
874 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
875 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
876
877 /* STM r1, r3, d2(b2) --- store multiple. */
878 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
879 version). */
880 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
881 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
882 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
883 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
884 {
885 for (; r1 <= r3; r1++, d2 += data->gpr_size)
886 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
887 }
888
889 /* AHI r1, i2 --- add halfword immediate. */
890 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
891 /* AFI r1, i2 --- add fullword immediate. */
892 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
893 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
894 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
895 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
896 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
897 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
898
899 /* ALFI r1, i2 --- add logical immediate. */
900 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
901 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
902 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
903 data->gpr[r1] = pv_add_constant (data->gpr[r1],
904 (CORE_ADDR)i2 & 0xffffffff);
905
906 /* AR r1, r2 -- add register. */
907 /* AGR r1, r2 -- add register (64-bit version). */
908 else if (is_rr (insn32, op_ar, &r1, &r2)
909 || is_rre (insn64, op_agr, &r1, &r2))
910 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
911
912 /* A r1, d2(x2, b2) -- add. */
913 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
914 /* AG r1, d2(x2, b2) -- add (64-bit version). */
915 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
916 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
917 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
918 data->gpr[r1] = pv_add (data->gpr[r1],
919 s390_load (data, d2, x2, b2, data->gpr_size));
920
921 /* SLFI r1, i2 --- subtract logical immediate. */
922 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
923 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
924 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
925 data->gpr[r1] = pv_add_constant (data->gpr[r1],
926 -((CORE_ADDR)i2 & 0xffffffff));
927
928 /* SR r1, r2 -- subtract register. */
929 /* SGR r1, r2 -- subtract register (64-bit version). */
930 else if (is_rr (insn32, op_sr, &r1, &r2)
931 || is_rre (insn64, op_sgr, &r1, &r2))
932 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
933
934 /* S r1, d2(x2, b2) -- subtract. */
935 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
936 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
937 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
938 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
939 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
940 data->gpr[r1] = pv_subtract (data->gpr[r1],
941 s390_load (data, d2, x2, b2, data->gpr_size));
942
943 /* LA r1, d2(x2, b2) --- load address. */
944 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
945 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
946 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
947 data->gpr[r1] = s390_addr (data, d2, x2, b2);
948
949 /* LARL r1, i2 --- load address relative long. */
950 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
951 data->gpr[r1] = pv_constant (pc + i2 * 2);
952
953 /* BASR r1, 0 --- branch and save.
954 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
955 else if (is_rr (insn, op_basr, &r1, &r2)
956 && r2 == 0)
957 data->gpr[r1] = pv_constant (next_pc);
958
959 /* BRAS r1, i2 --- branch relative and save. */
960 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
961 {
962 data->gpr[r1] = pv_constant (next_pc);
963 next_pc = pc + i2 * 2;
964
965 /* We'd better not interpret any backward branches. We'll
966 never terminate. */
967 if (next_pc <= pc)
968 break;
969 }
970
971 /* BRC/BRCL -- branch relative on condition. Ignore "branch
972 never", branch to following instruction, and "conditional
973 trap" (BRC +2). Otherwise terminate search. */
974 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2))
975 {
976 if (r1 != 0 && i2 != 1 && i2 != 2)
977 break;
978 }
979 else if (is_ril (insn, op1_brcl, op2_brcl, &r1, &i2))
980 {
981 if (r1 != 0 && i2 != 3)
982 break;
983 }
984
985 /* Terminate search when hitting any other branch instruction. */
986 else if (is_rr (insn, op_basr, &r1, &r2)
987 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
988 || is_rr (insn, op_bcr, &r1, &r2)
989 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
990 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
991 break;
992
993 else
994 {
995 /* An instruction we don't know how to simulate. The only
996 safe thing to do would be to set every value we're tracking
997 to 'unknown'. Instead, we'll be optimistic: we assume that
998 we *can* interpret every instruction that the compiler uses
999 to manipulate any of the data we're interested in here --
1000 then we can just ignore anything else. */
1001 }
1002
1003 /* Record the address after the last instruction that changed
1004 the FP, SP, or backlink. Ignore instructions that changed
1005 them back to their original values --- those are probably
1006 restore instructions. (The back chain is never restored,
1007 just popped.) */
1008 {
1009 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1010 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1011
1012 if ((! pv_is_identical (pre_insn_sp, sp)
1013 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1014 && sp.kind != pvk_unknown)
1015 || (! pv_is_identical (pre_insn_fp, fp)
1016 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1017 && fp.kind != pvk_unknown)
1018 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1019 result = next_pc;
1020 }
1021 }
1022
1023 /* Record where all the registers were saved. */
1024 data->stack->scan (s390_check_for_saved, data);
1025
1026 return result;
1027 }
1028
1029 /* Advance PC across any function entry prologue instructions to reach
1030 some "real" code. */
1031
1032 static CORE_ADDR
1033 s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1034 {
1035 struct s390_prologue_data data;
1036 CORE_ADDR skip_pc, func_addr;
1037
1038 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
1039 {
1040 CORE_ADDR post_prologue_pc
1041 = skip_prologue_using_sal (gdbarch, func_addr);
1042 if (post_prologue_pc != 0)
1043 return std::max (pc, post_prologue_pc);
1044 }
1045
1046 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
1047 return skip_pc ? skip_pc : pc;
1048 }
1049
1050 /* Register handling. */
1051
1052 /* ABI call-saved register information. */
1053
1054 static int
1055 s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
1056 {
1057 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1058
1059 switch (tdep->abi)
1060 {
1061 case ABI_LINUX_S390:
1062 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1063 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
1064 || regnum == S390_A0_REGNUM)
1065 return 1;
1066
1067 break;
1068
1069 case ABI_LINUX_ZSERIES:
1070 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
1071 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
1072 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
1073 return 1;
1074
1075 break;
1076 }
1077
1078 return 0;
1079 }
1080
1081 /* The "guess_tracepoint_registers" gdbarch method. */
1082
1083 static void
1084 s390_guess_tracepoint_registers (struct gdbarch *gdbarch,
1085 struct regcache *regcache,
1086 CORE_ADDR addr)
1087 {
1088 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1089 int sz = register_size (gdbarch, S390_PSWA_REGNUM);
1090 gdb_byte *reg = (gdb_byte *) alloca (sz);
1091 ULONGEST pswm, pswa;
1092
1093 /* Set PSWA from the location and a default PSWM (the only part we're
1094 unlikely to get right is the CC). */
1095 if (tdep->abi == ABI_LINUX_S390)
1096 {
1097 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1098 was in 24-bit mode). */
1099 pswa = addr | 0x80000000UL;
1100 pswm = 0x070d0000UL;
1101 }
1102 else
1103 {
1104 pswa = addr;
1105 pswm = 0x0705000180000000ULL;
1106 }
1107
1108 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswa);
1109 regcache->raw_supply (S390_PSWA_REGNUM, reg);
1110
1111 store_unsigned_integer (reg, sz, gdbarch_byte_order (gdbarch), pswm);
1112 regcache->raw_supply (S390_PSWM_REGNUM, reg);
1113 }
1114
1115 /* Return the name of register REGNO. Return the empty string for
1116 registers that shouldn't be visible. */
1117
1118 static const char *
1119 s390_register_name (struct gdbarch *gdbarch, int regnum)
1120 {
1121 if (regnum >= S390_V0_LOWER_REGNUM
1122 && regnum <= S390_V15_LOWER_REGNUM)
1123 return "";
1124 return tdesc_register_name (gdbarch, regnum);
1125 }
1126
1127 /* DWARF Register Mapping. */
1128
1129 static const short s390_dwarf_regmap[] =
1130 {
1131 /* 0-15: General Purpose Registers. */
1132 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1133 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1134 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1135 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1136
1137 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1138 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
1139 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
1140 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
1141 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
1142
1143 /* 32-47: Control Registers (not mapped). */
1144 -1, -1, -1, -1, -1, -1, -1, -1,
1145 -1, -1, -1, -1, -1, -1, -1, -1,
1146
1147 /* 48-63: Access Registers. */
1148 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
1149 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
1150 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
1151 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
1152
1153 /* 64-65: Program Status Word. */
1154 S390_PSWM_REGNUM,
1155 S390_PSWA_REGNUM,
1156
1157 /* 66-67: Reserved. */
1158 -1, -1,
1159
1160 /* 68-83: Vector Registers 16-31. */
1161 S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM,
1162 S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM,
1163 S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM,
1164 S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM,
1165
1166 /* End of "official" DWARF registers. The remainder of the map is
1167 for GDB internal use only. */
1168
1169 /* GPR Lower Half Access. */
1170 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
1171 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
1172 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
1173 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
1174 };
1175
1176 enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 };
1177
1178 /* Convert DWARF register number REG to the appropriate register
1179 number used by GDB. */
1180
1181 static int
1182 s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
1183 {
1184 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1185 int gdb_reg = -1;
1186
1187 /* In a 32-on-64 debug scenario, debug info refers to the full
1188 64-bit GPRs. Note that call frame information still refers to
1189 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1190 special register numbers to access GPRs. */
1191 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
1192 return tdep->gpr_full_regnum + reg;
1193
1194 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
1195 gdb_reg = s390_dwarf_regmap[reg];
1196
1197 if (tdep->v0_full_regnum == -1)
1198 {
1199 if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM)
1200 gdb_reg = -1;
1201 }
1202 else
1203 {
1204 if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM)
1205 gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum;
1206 }
1207
1208 return gdb_reg;
1209 }
1210
1211 /* Pseudo registers. */
1212
1213 /* Check whether REGNUM indicates a coupled general purpose register.
1214 These pseudo-registers are composed of two adjacent gprs. */
1215
1216 static int
1217 regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
1218 {
1219 return (tdep->gpr_full_regnum != -1
1220 && regnum >= tdep->gpr_full_regnum
1221 && regnum <= tdep->gpr_full_regnum + 15);
1222 }
1223
1224 /* Check whether REGNUM indicates a full vector register (v0-v15).
1225 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1226
1227 static int
1228 regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum)
1229 {
1230 return (tdep->v0_full_regnum != -1
1231 && regnum >= tdep->v0_full_regnum
1232 && regnum <= tdep->v0_full_regnum + 15);
1233 }
1234
1235 /* 'float' values are stored in the upper half of floating-point
1236 registers, even though we are otherwise a big-endian platform. The
1237 same applies to a 'float' value within a vector. */
1238
1239 static struct value *
1240 s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
1241 int regnum, struct frame_id frame_id)
1242 {
1243 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1244 struct value *value = default_value_from_register (gdbarch, type,
1245 regnum, frame_id);
1246 check_typedef (type);
1247
1248 if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
1249 && TYPE_LENGTH (type) < 8)
1250 || regnum_is_vxr_full (tdep, regnum)
1251 || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM))
1252 set_value_offset (value, 0);
1253
1254 return value;
1255 }
1256
1257 /* Implement pseudo_register_name tdesc method. */
1258
1259 static const char *
1260 s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
1261 {
1262 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1263
1264 if (regnum == tdep->pc_regnum)
1265 return "pc";
1266
1267 if (regnum == tdep->cc_regnum)
1268 return "cc";
1269
1270 if (regnum_is_gpr_full (tdep, regnum))
1271 {
1272 static const char *full_name[] = {
1273 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1274 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1275 };
1276 return full_name[regnum - tdep->gpr_full_regnum];
1277 }
1278
1279 if (regnum_is_vxr_full (tdep, regnum))
1280 {
1281 static const char *full_name[] = {
1282 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1283 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1284 };
1285 return full_name[regnum - tdep->v0_full_regnum];
1286 }
1287
1288 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1289 }
1290
1291 /* Implement pseudo_register_type tdesc method. */
1292
1293 static struct type *
1294 s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
1295 {
1296 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1297
1298 if (regnum == tdep->pc_regnum)
1299 return builtin_type (gdbarch)->builtin_func_ptr;
1300
1301 if (regnum == tdep->cc_regnum)
1302 return builtin_type (gdbarch)->builtin_int;
1303
1304 if (regnum_is_gpr_full (tdep, regnum))
1305 return builtin_type (gdbarch)->builtin_uint64;
1306
1307 /* For the "concatenated" vector registers use the same type as v16. */
1308 if (regnum_is_vxr_full (tdep, regnum))
1309 return tdesc_register_type (gdbarch, S390_V16_REGNUM);
1310
1311 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1312 }
1313
1314 /* Implement pseudo_register_read gdbarch method. */
1315
1316 static enum register_status
1317 s390_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
1318 int regnum, gdb_byte *buf)
1319 {
1320 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1321 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1322 int regsize = register_size (gdbarch, regnum);
1323 ULONGEST val;
1324
1325 if (regnum == tdep->pc_regnum)
1326 {
1327 enum register_status status;
1328
1329 status = regcache->raw_read (S390_PSWA_REGNUM, &val);
1330 if (status == REG_VALID)
1331 {
1332 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1333 val &= 0x7fffffff;
1334 store_unsigned_integer (buf, regsize, byte_order, val);
1335 }
1336 return status;
1337 }
1338
1339 if (regnum == tdep->cc_regnum)
1340 {
1341 enum register_status status;
1342
1343 status = regcache->raw_read (S390_PSWM_REGNUM, &val);
1344 if (status == REG_VALID)
1345 {
1346 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1347 val = (val >> 12) & 3;
1348 else
1349 val = (val >> 44) & 3;
1350 store_unsigned_integer (buf, regsize, byte_order, val);
1351 }
1352 return status;
1353 }
1354
1355 if (regnum_is_gpr_full (tdep, regnum))
1356 {
1357 enum register_status status;
1358 ULONGEST val_upper;
1359
1360 regnum -= tdep->gpr_full_regnum;
1361
1362 status = regcache->raw_read (S390_R0_REGNUM + regnum, &val);
1363 if (status == REG_VALID)
1364 status = regcache->raw_read (S390_R0_UPPER_REGNUM + regnum,
1365 &val_upper);
1366 if (status == REG_VALID)
1367 {
1368 val |= val_upper << 32;
1369 store_unsigned_integer (buf, regsize, byte_order, val);
1370 }
1371 return status;
1372 }
1373
1374 if (regnum_is_vxr_full (tdep, regnum))
1375 {
1376 enum register_status status;
1377
1378 regnum -= tdep->v0_full_regnum;
1379
1380 status = regcache->raw_read (S390_F0_REGNUM + regnum, buf);
1381 if (status == REG_VALID)
1382 status = regcache->raw_read (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1383 return status;
1384 }
1385
1386 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1387 }
1388
1389 /* Implement pseudo_register_write gdbarch method. */
1390
1391 static void
1392 s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
1393 int regnum, const gdb_byte *buf)
1394 {
1395 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1396 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1397 int regsize = register_size (gdbarch, regnum);
1398 ULONGEST val, psw;
1399
1400 if (regnum == tdep->pc_regnum)
1401 {
1402 val = extract_unsigned_integer (buf, regsize, byte_order);
1403 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1404 {
1405 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
1406 val = (psw & 0x80000000) | (val & 0x7fffffff);
1407 }
1408 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
1409 return;
1410 }
1411
1412 if (regnum == tdep->cc_regnum)
1413 {
1414 val = extract_unsigned_integer (buf, regsize, byte_order);
1415 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
1416 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1417 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
1418 else
1419 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
1420 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
1421 return;
1422 }
1423
1424 if (regnum_is_gpr_full (tdep, regnum))
1425 {
1426 regnum -= tdep->gpr_full_regnum;
1427 val = extract_unsigned_integer (buf, regsize, byte_order);
1428 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
1429 val & 0xffffffff);
1430 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
1431 val >> 32);
1432 return;
1433 }
1434
1435 if (regnum_is_vxr_full (tdep, regnum))
1436 {
1437 regnum -= tdep->v0_full_regnum;
1438 regcache->raw_write (S390_F0_REGNUM + regnum, buf);
1439 regcache->raw_write (S390_V0_LOWER_REGNUM + regnum, buf + 8);
1440 return;
1441 }
1442
1443 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1444 }
1445
1446 /* Register groups. */
1447
1448 /* Implement pseudo_register_reggroup_p tdesc method. */
1449
1450 static int
1451 s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
1452 struct reggroup *group)
1453 {
1454 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1455
1456 /* We usually save/restore the whole PSW, which includes PC and CC.
1457 However, some older gdbservers may not support saving/restoring
1458 the whole PSW yet, and will return an XML register description
1459 excluding those from the save/restore register groups. In those
1460 cases, we still need to explicitly save/restore PC and CC in order
1461 to push or pop frames. Since this doesn't hurt anything if we
1462 already save/restore the whole PSW (it's just redundant), we add
1463 PC and CC at this point unconditionally. */
1464 if (group == save_reggroup || group == restore_reggroup)
1465 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
1466
1467 if (group == vector_reggroup)
1468 return regnum_is_vxr_full (tdep, regnum);
1469
1470 if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum))
1471 return 0;
1472
1473 return default_register_reggroup_p (gdbarch, regnum, group);
1474 }
1475
1476 /* The "ax_pseudo_register_collect" gdbarch method. */
1477
1478 static int
1479 s390_ax_pseudo_register_collect (struct gdbarch *gdbarch,
1480 struct agent_expr *ax, int regnum)
1481 {
1482 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1483 if (regnum == tdep->pc_regnum)
1484 {
1485 ax_reg_mask (ax, S390_PSWA_REGNUM);
1486 }
1487 else if (regnum == tdep->cc_regnum)
1488 {
1489 ax_reg_mask (ax, S390_PSWM_REGNUM);
1490 }
1491 else if (regnum_is_gpr_full (tdep, regnum))
1492 {
1493 regnum -= tdep->gpr_full_regnum;
1494 ax_reg_mask (ax, S390_R0_REGNUM + regnum);
1495 ax_reg_mask (ax, S390_R0_UPPER_REGNUM + regnum);
1496 }
1497 else if (regnum_is_vxr_full (tdep, regnum))
1498 {
1499 regnum -= tdep->v0_full_regnum;
1500 ax_reg_mask (ax, S390_F0_REGNUM + regnum);
1501 ax_reg_mask (ax, S390_V0_LOWER_REGNUM + regnum);
1502 }
1503 else
1504 {
1505 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1506 }
1507 return 0;
1508 }
1509
1510 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1511
1512 static int
1513 s390_ax_pseudo_register_push_stack (struct gdbarch *gdbarch,
1514 struct agent_expr *ax, int regnum)
1515 {
1516 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1517 if (regnum == tdep->pc_regnum)
1518 {
1519 ax_reg (ax, S390_PSWA_REGNUM);
1520 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1521 {
1522 ax_zero_ext (ax, 31);
1523 }
1524 }
1525 else if (regnum == tdep->cc_regnum)
1526 {
1527 ax_reg (ax, S390_PSWM_REGNUM);
1528 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1529 ax_const_l (ax, 12);
1530 else
1531 ax_const_l (ax, 44);
1532 ax_simple (ax, aop_rsh_unsigned);
1533 ax_zero_ext (ax, 2);
1534 }
1535 else if (regnum_is_gpr_full (tdep, regnum))
1536 {
1537 regnum -= tdep->gpr_full_regnum;
1538 ax_reg (ax, S390_R0_REGNUM + regnum);
1539 ax_reg (ax, S390_R0_UPPER_REGNUM + regnum);
1540 ax_const_l (ax, 32);
1541 ax_simple (ax, aop_lsh);
1542 ax_simple (ax, aop_bit_or);
1543 }
1544 else if (regnum_is_vxr_full (tdep, regnum))
1545 {
1546 /* Too large to stuff on the stack. */
1547 return 1;
1548 }
1549 else
1550 {
1551 internal_error (__FILE__, __LINE__, _("invalid regnum"));
1552 }
1553 return 0;
1554 }
1555
1556 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1557 just a best-effort method, and we don't really have the means to run
1558 the full unwinder here, just collect the link register. */
1559
1560 static void
1561 s390_gen_return_address (struct gdbarch *gdbarch,
1562 struct agent_expr *ax, struct axs_value *value,
1563 CORE_ADDR scope)
1564 {
1565 value->type = register_type (gdbarch, S390_R14_REGNUM);
1566 value->kind = axs_lvalue_register;
1567 value->u.reg = S390_R14_REGNUM;
1568 }
1569
1570 /* Address handling. */
1571
1572 /* Implement addr_bits_remove gdbarch method.
1573 Only used for ABI_LINUX_S390. */
1574
1575 static CORE_ADDR
1576 s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
1577 {
1578 return addr & 0x7fffffff;
1579 }
1580
1581 /* Implement addr_class_type_flags gdbarch method.
1582 Only used for ABI_LINUX_ZSERIES. */
1583
1584 static int
1585 s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
1586 {
1587 if (byte_size == 4)
1588 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1589 else
1590 return 0;
1591 }
1592
1593 /* Implement addr_class_type_flags_to_name gdbarch method.
1594 Only used for ABI_LINUX_ZSERIES. */
1595
1596 static const char *
1597 s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
1598 {
1599 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
1600 return "mode32";
1601 else
1602 return NULL;
1603 }
1604
1605 /* Implement addr_class_name_to_type_flags gdbarch method.
1606 Only used for ABI_LINUX_ZSERIES. */
1607
1608 static int
1609 s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
1610 const char *name,
1611 int *type_flags_ptr)
1612 {
1613 if (strcmp (name, "mode32") == 0)
1614 {
1615 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
1616 return 1;
1617 }
1618 else
1619 return 0;
1620 }
1621
1622 /* Inferior function calls. */
1623
1624 /* Dummy function calls. */
1625
1626 /* Unwrap any single-field structs in TYPE and return the effective
1627 "inner" type. E.g., yield "float" for all these cases:
1628
1629 float x;
1630 struct { float x };
1631 struct { struct { float x; } x; };
1632 struct { struct { struct { float x; } x; } x; };
1633
1634 However, if an inner type is smaller than MIN_SIZE, abort the
1635 unwrapping. */
1636
1637 static struct type *
1638 s390_effective_inner_type (struct type *type, unsigned int min_size)
1639 {
1640 while (TYPE_CODE (type) == TYPE_CODE_STRUCT)
1641 {
1642 struct type *inner = NULL;
1643
1644 /* Find a non-static field, if any. Unless there's exactly one,
1645 abort the unwrapping. */
1646 for (int i = 0; i < TYPE_NFIELDS (type); i++)
1647 {
1648 struct field f = TYPE_FIELD (type, i);
1649
1650 if (field_is_static (&f))
1651 continue;
1652 if (inner != NULL)
1653 return type;
1654 inner = FIELD_TYPE (f);
1655 }
1656
1657 if (inner == NULL)
1658 break;
1659 inner = check_typedef (inner);
1660 if (TYPE_LENGTH (inner) < min_size)
1661 break;
1662 type = inner;
1663 }
1664
1665 return type;
1666 }
1667
1668 /* Return non-zero if TYPE should be passed like "float" or
1669 "double". */
1670
1671 static int
1672 s390_function_arg_float (struct type *type)
1673 {
1674 /* Note that long double as well as complex types are intentionally
1675 excluded. */
1676 if (TYPE_LENGTH (type) > 8)
1677 return 0;
1678
1679 /* A struct containing just a float or double is passed like a float
1680 or double. */
1681 type = s390_effective_inner_type (type, 0);
1682
1683 return (TYPE_CODE (type) == TYPE_CODE_FLT
1684 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT);
1685 }
1686
1687 /* Return non-zero if TYPE should be passed like a vector. */
1688
1689 static int
1690 s390_function_arg_vector (struct type *type)
1691 {
1692 if (TYPE_LENGTH (type) > 16)
1693 return 0;
1694
1695 /* Structs containing just a vector are passed like a vector. */
1696 type = s390_effective_inner_type (type, TYPE_LENGTH (type));
1697
1698 return TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type);
1699 }
1700
1701 /* Determine whether N is a power of two. */
1702
1703 static int
1704 is_power_of_two (unsigned int n)
1705 {
1706 return n && ((n & (n - 1)) == 0);
1707 }
1708
1709 /* For an argument whose type is TYPE and which is not passed like a
1710 float or vector, return non-zero if it should be passed like "int"
1711 or "long long". */
1712
1713 static int
1714 s390_function_arg_integer (struct type *type)
1715 {
1716 enum type_code code = TYPE_CODE (type);
1717
1718 if (TYPE_LENGTH (type) > 8)
1719 return 0;
1720
1721 if (code == TYPE_CODE_INT
1722 || code == TYPE_CODE_ENUM
1723 || code == TYPE_CODE_RANGE
1724 || code == TYPE_CODE_CHAR
1725 || code == TYPE_CODE_BOOL
1726 || code == TYPE_CODE_PTR
1727 || TYPE_IS_REFERENCE (type))
1728 return 1;
1729
1730 return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT)
1731 && is_power_of_two (TYPE_LENGTH (type)));
1732 }
1733
1734 /* Argument passing state: Internal data structure passed to helper
1735 routines of s390_push_dummy_call. */
1736
1737 struct s390_arg_state
1738 {
1739 /* Register cache, or NULL, if we are in "preparation mode". */
1740 struct regcache *regcache;
1741 /* Next available general/floating-point/vector register for
1742 argument passing. */
1743 int gr, fr, vr;
1744 /* Current pointer to copy area (grows downwards). */
1745 CORE_ADDR copy;
1746 /* Current pointer to parameter area (grows upwards). */
1747 CORE_ADDR argp;
1748 };
1749
1750 /* Prepare one argument ARG for a dummy call and update the argument
1751 passing state AS accordingly. If the regcache field in AS is set,
1752 operate in "write mode" and write ARG into the inferior. Otherwise
1753 run "preparation mode" and skip all updates to the inferior. */
1754
1755 static void
1756 s390_handle_arg (struct s390_arg_state *as, struct value *arg,
1757 struct gdbarch_tdep *tdep, int word_size,
1758 enum bfd_endian byte_order, int is_unnamed)
1759 {
1760 struct type *type = check_typedef (value_type (arg));
1761 unsigned int length = TYPE_LENGTH (type);
1762 int write_mode = as->regcache != NULL;
1763
1764 if (s390_function_arg_float (type))
1765 {
1766 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1767 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1768 6. */
1769 if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
1770 {
1771 /* When we store a single-precision value in an FP register,
1772 it occupies the leftmost bits. */
1773 if (write_mode)
1774 as->regcache->cooked_write_part (S390_F0_REGNUM + as->fr, 0, length,
1775 value_contents (arg));
1776 as->fr += 2;
1777 }
1778 else
1779 {
1780 /* When we store a single-precision value in a stack slot,
1781 it occupies the rightmost bits. */
1782 as->argp = align_up (as->argp + length, word_size);
1783 if (write_mode)
1784 write_memory (as->argp - length, value_contents (arg),
1785 length);
1786 }
1787 }
1788 else if (tdep->vector_abi == S390_VECTOR_ABI_128
1789 && s390_function_arg_vector (type))
1790 {
1791 static const char use_vr[] = {24, 26, 28, 30, 25, 27, 29, 31};
1792
1793 if (!is_unnamed && as->vr < ARRAY_SIZE (use_vr))
1794 {
1795 int regnum = S390_V24_REGNUM + use_vr[as->vr] - 24;
1796
1797 if (write_mode)
1798 as->regcache->cooked_write_part (regnum, 0, length,
1799 value_contents (arg));
1800 as->vr++;
1801 }
1802 else
1803 {
1804 if (write_mode)
1805 write_memory (as->argp, value_contents (arg), length);
1806 as->argp = align_up (as->argp + length, word_size);
1807 }
1808 }
1809 else if (s390_function_arg_integer (type) && length <= word_size)
1810 {
1811 /* Initialize it just to avoid a GCC false warning. */
1812 ULONGEST val = 0;
1813
1814 if (write_mode)
1815 {
1816 /* Place value in least significant bits of the register or
1817 memory word and sign- or zero-extend to full word size.
1818 This also applies to a struct or union. */
1819 val = TYPE_UNSIGNED (type)
1820 ? extract_unsigned_integer (value_contents (arg),
1821 length, byte_order)
1822 : extract_signed_integer (value_contents (arg),
1823 length, byte_order);
1824 }
1825
1826 if (as->gr <= 6)
1827 {
1828 if (write_mode)
1829 regcache_cooked_write_unsigned (as->regcache,
1830 S390_R0_REGNUM + as->gr,
1831 val);
1832 as->gr++;
1833 }
1834 else
1835 {
1836 if (write_mode)
1837 write_memory_unsigned_integer (as->argp, word_size,
1838 byte_order, val);
1839 as->argp += word_size;
1840 }
1841 }
1842 else if (s390_function_arg_integer (type) && length == 8)
1843 {
1844 if (as->gr <= 5)
1845 {
1846 if (write_mode)
1847 {
1848 as->regcache->cooked_write (S390_R0_REGNUM + as->gr,
1849 value_contents (arg));
1850 as->regcache->cooked_write (S390_R0_REGNUM + as->gr + 1,
1851 value_contents (arg) + word_size);
1852 }
1853 as->gr += 2;
1854 }
1855 else
1856 {
1857 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1858 in it, then don't go back and use it again later. */
1859 as->gr = 7;
1860
1861 if (write_mode)
1862 write_memory (as->argp, value_contents (arg), length);
1863 as->argp += length;
1864 }
1865 }
1866 else
1867 {
1868 /* This argument type is never passed in registers. Place the
1869 value in the copy area and pass a pointer to it. Use 8-byte
1870 alignment as a conservative assumption. */
1871 as->copy = align_down (as->copy - length, 8);
1872 if (write_mode)
1873 write_memory (as->copy, value_contents (arg), length);
1874
1875 if (as->gr <= 6)
1876 {
1877 if (write_mode)
1878 regcache_cooked_write_unsigned (as->regcache,
1879 S390_R0_REGNUM + as->gr,
1880 as->copy);
1881 as->gr++;
1882 }
1883 else
1884 {
1885 if (write_mode)
1886 write_memory_unsigned_integer (as->argp, word_size,
1887 byte_order, as->copy);
1888 as->argp += word_size;
1889 }
1890 }
1891 }
1892
1893 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1894 place to be passed to a function, as specified by the "GNU/Linux
1895 for S/390 ELF Application Binary Interface Supplement".
1896
1897 SP is the current stack pointer. We must put arguments, links,
1898 padding, etc. whereever they belong, and return the new stack
1899 pointer value.
1900
1901 If STRUCT_RETURN is non-zero, then the function we're calling is
1902 going to return a structure by value; STRUCT_ADDR is the address of
1903 a block we've allocated for it on the stack.
1904
1905 Our caller has taken care of any type promotions needed to satisfy
1906 prototypes or the old K&R argument-passing rules. */
1907
1908 static CORE_ADDR
1909 s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
1910 struct regcache *regcache, CORE_ADDR bp_addr,
1911 int nargs, struct value **args, CORE_ADDR sp,
1912 function_call_return_method return_method,
1913 CORE_ADDR struct_addr)
1914 {
1915 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1916 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1917 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1918 int i;
1919 struct s390_arg_state arg_state, arg_prep;
1920 CORE_ADDR param_area_start, new_sp;
1921 struct type *ftype = check_typedef (value_type (function));
1922
1923 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
1924 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
1925
1926 arg_prep.copy = sp;
1927 arg_prep.gr = (return_method == return_method_struct) ? 3 : 2;
1928 arg_prep.fr = 0;
1929 arg_prep.vr = 0;
1930 arg_prep.argp = 0;
1931 arg_prep.regcache = NULL;
1932
1933 /* Initialize arg_state for "preparation mode". */
1934 arg_state = arg_prep;
1935
1936 /* Update arg_state.copy with the start of the reference-to-copy area
1937 and arg_state.argp with the size of the parameter area. */
1938 for (i = 0; i < nargs; i++)
1939 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1940 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1941
1942 param_area_start = align_down (arg_state.copy - arg_state.argp, 8);
1943
1944 /* Allocate the standard frame areas: the register save area, the
1945 word reserved for the compiler, and the back chain pointer. */
1946 new_sp = param_area_start - (16 * word_size + 32);
1947
1948 /* Now we have the final stack pointer. Make sure we didn't
1949 underflow; on 31-bit, this would result in addresses with the
1950 high bit set, which causes confusion elsewhere. Note that if we
1951 error out here, stack and registers remain untouched. */
1952 if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp)
1953 error (_("Stack overflow"));
1954
1955 /* Pass the structure return address in general register 2. */
1956 if (return_method == return_method_struct)
1957 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr);
1958
1959 /* Initialize arg_state for "write mode". */
1960 arg_state = arg_prep;
1961 arg_state.argp = param_area_start;
1962 arg_state.regcache = regcache;
1963
1964 /* Write all parameters. */
1965 for (i = 0; i < nargs; i++)
1966 s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order,
1967 TYPE_VARARGS (ftype) && i >= TYPE_NFIELDS (ftype));
1968
1969 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
1970 if (word_size == 4)
1971 {
1972 ULONGEST pswa;
1973 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
1974 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
1975 }
1976 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
1977
1978 /* Store updated stack pointer. */
1979 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp);
1980
1981 /* We need to return the 'stack part' of the frame ID,
1982 which is actually the top of the register save area. */
1983 return param_area_start;
1984 }
1985
1986 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
1987 dummy frame. The frame ID's base needs to match the TOS value
1988 returned by push_dummy_call, and the PC match the dummy frame's
1989 breakpoint. */
1990
1991 static struct frame_id
1992 s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1993 {
1994 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1995 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1996 sp = gdbarch_addr_bits_remove (gdbarch, sp);
1997
1998 return frame_id_build (sp + 16*word_size + 32,
1999 get_frame_pc (this_frame));
2000 }
2001
2002 /* Implement frame_align gdbarch method. */
2003
2004 static CORE_ADDR
2005 s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2006 {
2007 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2008 always be aligned on an eight-byte boundary. */
2009 return (addr & -8);
2010 }
2011
2012 /* Helper for s390_return_value: Set or retrieve a function return
2013 value if it resides in a register. */
2014
2015 static void
2016 s390_register_return_value (struct gdbarch *gdbarch, struct type *type,
2017 struct regcache *regcache,
2018 gdb_byte *out, const gdb_byte *in)
2019 {
2020 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2021 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2022 int length = TYPE_LENGTH (type);
2023 int code = TYPE_CODE (type);
2024
2025 if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT)
2026 {
2027 /* Float-like value: left-aligned in f0. */
2028 if (in != NULL)
2029 regcache->cooked_write_part (S390_F0_REGNUM, 0, length, in);
2030 else
2031 regcache->cooked_read_part (S390_F0_REGNUM, 0, length, out);
2032 }
2033 else if (code == TYPE_CODE_ARRAY)
2034 {
2035 /* Vector: left-aligned in v24. */
2036 if (in != NULL)
2037 regcache->cooked_write_part (S390_V24_REGNUM, 0, length, in);
2038 else
2039 regcache->cooked_read_part (S390_V24_REGNUM, 0, length, out);
2040 }
2041 else if (length <= word_size)
2042 {
2043 /* Integer: zero- or sign-extended in r2. */
2044 if (out != NULL)
2045 regcache->cooked_read_part (S390_R2_REGNUM, word_size - length, length,
2046 out);
2047 else if (TYPE_UNSIGNED (type))
2048 regcache_cooked_write_unsigned
2049 (regcache, S390_R2_REGNUM,
2050 extract_unsigned_integer (in, length, byte_order));
2051 else
2052 regcache_cooked_write_signed
2053 (regcache, S390_R2_REGNUM,
2054 extract_signed_integer (in, length, byte_order));
2055 }
2056 else if (length == 2 * word_size)
2057 {
2058 /* Double word: in r2 and r3. */
2059 if (in != NULL)
2060 {
2061 regcache->cooked_write (S390_R2_REGNUM, in);
2062 regcache->cooked_write (S390_R3_REGNUM, in + word_size);
2063 }
2064 else
2065 {
2066 regcache->cooked_read (S390_R2_REGNUM, out);
2067 regcache->cooked_read (S390_R3_REGNUM, out + word_size);
2068 }
2069 }
2070 else
2071 internal_error (__FILE__, __LINE__, _("invalid return type"));
2072 }
2073
2074 /* Implement the 'return_value' gdbarch method. */
2075
2076 static enum return_value_convention
2077 s390_return_value (struct gdbarch *gdbarch, struct value *function,
2078 struct type *type, struct regcache *regcache,
2079 gdb_byte *out, const gdb_byte *in)
2080 {
2081 enum return_value_convention rvc;
2082
2083 type = check_typedef (type);
2084
2085 switch (TYPE_CODE (type))
2086 {
2087 case TYPE_CODE_STRUCT:
2088 case TYPE_CODE_UNION:
2089 case TYPE_CODE_COMPLEX:
2090 rvc = RETURN_VALUE_STRUCT_CONVENTION;
2091 break;
2092 case TYPE_CODE_ARRAY:
2093 rvc = (gdbarch_tdep (gdbarch)->vector_abi == S390_VECTOR_ABI_128
2094 && TYPE_LENGTH (type) <= 16 && TYPE_VECTOR (type))
2095 ? RETURN_VALUE_REGISTER_CONVENTION
2096 : RETURN_VALUE_STRUCT_CONVENTION;
2097 break;
2098 default:
2099 rvc = TYPE_LENGTH (type) <= 8
2100 ? RETURN_VALUE_REGISTER_CONVENTION
2101 : RETURN_VALUE_STRUCT_CONVENTION;
2102 }
2103
2104 if (in != NULL || out != NULL)
2105 {
2106 if (rvc == RETURN_VALUE_REGISTER_CONVENTION)
2107 s390_register_return_value (gdbarch, type, regcache, out, in);
2108 else if (in != NULL)
2109 error (_("Cannot set function return value."));
2110 else
2111 error (_("Function return value unknown."));
2112 }
2113
2114 return rvc;
2115 }
2116
2117 /* Frame unwinding. */
2118
2119 /* Implement the stack_frame_destroyed_p gdbarch method. */
2120
2121 static int
2122 s390_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
2123 {
2124 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2125
2126 /* In frameless functions, there's no frame to destroy and thus
2127 we don't care about the epilogue.
2128
2129 In functions with frame, the epilogue sequence is a pair of
2130 a LM-type instruction that restores (amongst others) the
2131 return register %r14 and the stack pointer %r15, followed
2132 by a branch 'br %r14' --or equivalent-- that effects the
2133 actual return.
2134
2135 In that situation, this function needs to return 'true' in
2136 exactly one case: when pc points to that branch instruction.
2137
2138 Thus we try to disassemble the one instructions immediately
2139 preceding pc and check whether it is an LM-type instruction
2140 modifying the stack pointer.
2141
2142 Note that disassembling backwards is not reliable, so there
2143 is a slight chance of false positives here ... */
2144
2145 bfd_byte insn[6];
2146 unsigned int r1, r3, b2;
2147 int d2;
2148
2149 if (word_size == 4
2150 && !target_read_memory (pc - 4, insn, 4)
2151 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
2152 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2153 return 1;
2154
2155 if (word_size == 4
2156 && !target_read_memory (pc - 6, insn, 6)
2157 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
2158 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2159 return 1;
2160
2161 if (word_size == 8
2162 && !target_read_memory (pc - 6, insn, 6)
2163 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
2164 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
2165 return 1;
2166
2167 return 0;
2168 }
2169
2170 /* Implement unwind_pc gdbarch method. */
2171
2172 static CORE_ADDR
2173 s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2174 {
2175 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2176 ULONGEST pc;
2177 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
2178 return gdbarch_addr_bits_remove (gdbarch, pc);
2179 }
2180
2181 /* Implement unwind_sp gdbarch method. */
2182
2183 static CORE_ADDR
2184 s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2185 {
2186 ULONGEST sp;
2187 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2188 return gdbarch_addr_bits_remove (gdbarch, sp);
2189 }
2190
2191 /* Helper routine to unwind pseudo registers. */
2192
2193 static struct value *
2194 s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
2195 {
2196 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2197 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2198 struct type *type = register_type (gdbarch, regnum);
2199
2200 /* Unwind PC via PSW address. */
2201 if (regnum == tdep->pc_regnum)
2202 {
2203 struct value *val;
2204
2205 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
2206 if (!value_optimized_out (val))
2207 {
2208 LONGEST pswa = value_as_long (val);
2209
2210 if (TYPE_LENGTH (type) == 4)
2211 return value_from_pointer (type, pswa & 0x7fffffff);
2212 else
2213 return value_from_pointer (type, pswa);
2214 }
2215 }
2216
2217 /* Unwind CC via PSW mask. */
2218 if (regnum == tdep->cc_regnum)
2219 {
2220 struct value *val;
2221
2222 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
2223 if (!value_optimized_out (val))
2224 {
2225 LONGEST pswm = value_as_long (val);
2226
2227 if (TYPE_LENGTH (type) == 4)
2228 return value_from_longest (type, (pswm >> 12) & 3);
2229 else
2230 return value_from_longest (type, (pswm >> 44) & 3);
2231 }
2232 }
2233
2234 /* Unwind full GPRs to show at least the lower halves (as the
2235 upper halves are undefined). */
2236 if (regnum_is_gpr_full (tdep, regnum))
2237 {
2238 int reg = regnum - tdep->gpr_full_regnum;
2239 struct value *val;
2240
2241 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
2242 if (!value_optimized_out (val))
2243 return value_cast (type, val);
2244 }
2245
2246 return allocate_optimized_out_value (type);
2247 }
2248
2249 /* Translate a .eh_frame register to DWARF register, or adjust a
2250 .debug_frame register. */
2251
2252 static int
2253 s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
2254 {
2255 /* See s390_dwarf_reg_to_regnum for comments. */
2256 return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num;
2257 }
2258
2259 /* DWARF-2 frame unwinding. */
2260
2261 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2262 s390_dwarf2_frame_init_reg. */
2263
2264 static struct value *
2265 s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2266 int regnum)
2267 {
2268 return s390_unwind_pseudo_register (this_frame, regnum);
2269 }
2270
2271 /* Implement init_reg dwarf2_frame method. */
2272
2273 static void
2274 s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2275 struct dwarf2_frame_state_reg *reg,
2276 struct frame_info *this_frame)
2277 {
2278 /* The condition code (and thus PSW mask) is call-clobbered. */
2279 if (regnum == S390_PSWM_REGNUM)
2280 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2281
2282 /* The PSW address unwinds to the return address. */
2283 else if (regnum == S390_PSWA_REGNUM)
2284 reg->how = DWARF2_FRAME_REG_RA;
2285
2286 /* Fixed registers are call-saved or call-clobbered
2287 depending on the ABI in use. */
2288 else if (regnum < S390_NUM_REGS)
2289 {
2290 if (s390_register_call_saved (gdbarch, regnum))
2291 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
2292 else
2293 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2294 }
2295
2296 /* We install a special function to unwind pseudos. */
2297 else
2298 {
2299 reg->how = DWARF2_FRAME_REG_FN;
2300 reg->loc.fn = s390_dwarf2_prev_register;
2301 }
2302 }
2303
2304 /* Frame unwinding. */
2305
2306 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2307 register translation. */
2308
2309 struct value *
2310 s390_trad_frame_prev_register (struct frame_info *this_frame,
2311 struct trad_frame_saved_reg saved_regs[],
2312 int regnum)
2313 {
2314 if (regnum < S390_NUM_REGS)
2315 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
2316 else
2317 return s390_unwind_pseudo_register (this_frame, regnum);
2318 }
2319
2320 /* Normal stack frames. */
2321
2322 struct s390_unwind_cache {
2323
2324 CORE_ADDR func;
2325 CORE_ADDR frame_base;
2326 CORE_ADDR local_base;
2327
2328 struct trad_frame_saved_reg *saved_regs;
2329 };
2330
2331 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2332 prologue analysis. Helper for s390_frame_unwind_cache. */
2333
2334 static int
2335 s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
2336 struct s390_unwind_cache *info)
2337 {
2338 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2339 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2340 struct s390_prologue_data data;
2341 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
2342 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2343 int i;
2344 CORE_ADDR cfa;
2345 CORE_ADDR func;
2346 CORE_ADDR result;
2347 ULONGEST reg;
2348 CORE_ADDR prev_sp;
2349 int frame_pointer;
2350 int size;
2351 struct frame_info *next_frame;
2352
2353 /* Try to find the function start address. If we can't find it, we don't
2354 bother searching for it -- with modern compilers this would be mostly
2355 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2356 or else a valid backchain ... */
2357 if (!get_frame_func_if_available (this_frame, &info->func))
2358 {
2359 info->func = -1;
2360 return 0;
2361 }
2362 func = info->func;
2363
2364 /* Try to analyze the prologue. */
2365 result = s390_analyze_prologue (gdbarch, func,
2366 get_frame_pc (this_frame), &data);
2367 if (!result)
2368 return 0;
2369
2370 /* If this was successful, we should have found the instruction that
2371 sets the stack pointer register to the previous value of the stack
2372 pointer minus the frame size. */
2373 if (!pv_is_register (*sp, S390_SP_REGNUM))
2374 return 0;
2375
2376 /* A frame size of zero at this point can mean either a real
2377 frameless function, or else a failure to find the prologue.
2378 Perform some sanity checks to verify we really have a
2379 frameless function. */
2380 if (sp->k == 0)
2381 {
2382 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2383 size zero. This is only possible if the next frame is a sentinel
2384 frame, a dummy frame, or a signal trampoline frame. */
2385 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2386 needed, instead the code should simpliy rely on its
2387 analysis. */
2388 next_frame = get_next_frame (this_frame);
2389 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2390 next_frame = get_next_frame (next_frame);
2391 if (next_frame
2392 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
2393 return 0;
2394
2395 /* If we really have a frameless function, %r14 must be valid
2396 -- in particular, it must point to a different function. */
2397 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
2398 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
2399 if (get_pc_function_start (reg) == func)
2400 {
2401 /* However, there is one case where it *is* valid for %r14
2402 to point to the same function -- if this is a recursive
2403 call, and we have stopped in the prologue *before* the
2404 stack frame was allocated.
2405
2406 Recognize this case by looking ahead a bit ... */
2407
2408 struct s390_prologue_data data2;
2409 pv_t *sp2 = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
2410
2411 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
2412 && pv_is_register (*sp2, S390_SP_REGNUM)
2413 && sp2->k != 0))
2414 return 0;
2415 }
2416 }
2417
2418 /* OK, we've found valid prologue data. */
2419 size = -sp->k;
2420
2421 /* If the frame pointer originally also holds the same value
2422 as the stack pointer, we're probably using it. If it holds
2423 some other value -- even a constant offset -- it is most
2424 likely used as temp register. */
2425 if (pv_is_identical (*sp, *fp))
2426 frame_pointer = S390_FRAME_REGNUM;
2427 else
2428 frame_pointer = S390_SP_REGNUM;
2429
2430 /* If we've detected a function with stack frame, we'll still have to
2431 treat it as frameless if we're currently within the function epilog
2432 code at a point where the frame pointer has already been restored.
2433 This can only happen in an innermost frame. */
2434 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2435 instead the code should simpliy rely on its analysis. */
2436 next_frame = get_next_frame (this_frame);
2437 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
2438 next_frame = get_next_frame (next_frame);
2439 if (size > 0
2440 && (next_frame == NULL
2441 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
2442 {
2443 /* See the comment in s390_stack_frame_destroyed_p on why this is
2444 not completely reliable ... */
2445 if (s390_stack_frame_destroyed_p (gdbarch, get_frame_pc (this_frame)))
2446 {
2447 memset (&data, 0, sizeof (data));
2448 size = 0;
2449 frame_pointer = S390_SP_REGNUM;
2450 }
2451 }
2452
2453 /* Once we know the frame register and the frame size, we can unwind
2454 the current value of the frame register from the next frame, and
2455 add back the frame size to arrive that the previous frame's
2456 stack pointer value. */
2457 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
2458 cfa = prev_sp + 16*word_size + 32;
2459
2460 /* Set up ABI call-saved/call-clobbered registers. */
2461 for (i = 0; i < S390_NUM_REGS; i++)
2462 if (!s390_register_call_saved (gdbarch, i))
2463 trad_frame_set_unknown (info->saved_regs, i);
2464
2465 /* CC is always call-clobbered. */
2466 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2467
2468 /* Record the addresses of all register spill slots the prologue parser
2469 has recognized. Consider only registers defined as call-saved by the
2470 ABI; for call-clobbered registers the parser may have recognized
2471 spurious stores. */
2472
2473 for (i = 0; i < 16; i++)
2474 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
2475 && data.gpr_slot[i] != 0)
2476 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
2477
2478 for (i = 0; i < 16; i++)
2479 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
2480 && data.fpr_slot[i] != 0)
2481 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
2482
2483 /* Function return will set PC to %r14. */
2484 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
2485
2486 /* In frameless functions, we unwind simply by moving the return
2487 address to the PC. However, if we actually stored to the
2488 save area, use that -- we might only think the function frameless
2489 because we're in the middle of the prologue ... */
2490 if (size == 0
2491 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2492 {
2493 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2494 }
2495
2496 /* Another sanity check: unless this is a frameless function,
2497 we should have found spill slots for SP and PC.
2498 If not, we cannot unwind further -- this happens e.g. in
2499 libc's thread_start routine. */
2500 if (size > 0)
2501 {
2502 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
2503 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
2504 prev_sp = -1;
2505 }
2506
2507 /* We use the current value of the frame register as local_base,
2508 and the top of the register save area as frame_base. */
2509 if (prev_sp != -1)
2510 {
2511 info->frame_base = prev_sp + 16*word_size + 32;
2512 info->local_base = prev_sp - size;
2513 }
2514
2515 return 1;
2516 }
2517
2518 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2519 back chain unwinding. Helper for s390_frame_unwind_cache. */
2520
2521 static void
2522 s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
2523 struct s390_unwind_cache *info)
2524 {
2525 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2526 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2527 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2528 CORE_ADDR backchain;
2529 ULONGEST reg;
2530 LONGEST sp, tmp;
2531 int i;
2532
2533 /* Set up ABI call-saved/call-clobbered registers. */
2534 for (i = 0; i < S390_NUM_REGS; i++)
2535 if (!s390_register_call_saved (gdbarch, i))
2536 trad_frame_set_unknown (info->saved_regs, i);
2537
2538 /* CC is always call-clobbered. */
2539 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
2540
2541 /* Get the backchain. */
2542 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2543 if (!safe_read_memory_integer (reg, word_size, byte_order, &tmp))
2544 tmp = 0;
2545 backchain = (CORE_ADDR) tmp;
2546
2547 /* A zero backchain terminates the frame chain. As additional
2548 sanity check, let's verify that the spill slot for SP in the
2549 save area pointed to by the backchain in fact links back to
2550 the save area. */
2551 if (backchain != 0
2552 && safe_read_memory_integer (backchain + 15*word_size,
2553 word_size, byte_order, &sp)
2554 && (CORE_ADDR)sp == backchain)
2555 {
2556 /* We don't know which registers were saved, but it will have
2557 to be at least %r14 and %r15. This will allow us to continue
2558 unwinding, but other prev-frame registers may be incorrect ... */
2559 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
2560 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
2561
2562 /* Function return will set PC to %r14. */
2563 info->saved_regs[S390_PSWA_REGNUM]
2564 = info->saved_regs[S390_RETADDR_REGNUM];
2565
2566 /* We use the current value of the frame register as local_base,
2567 and the top of the register save area as frame_base. */
2568 info->frame_base = backchain + 16*word_size + 32;
2569 info->local_base = reg;
2570 }
2571
2572 info->func = get_frame_pc (this_frame);
2573 }
2574
2575 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2576 s390_frame_unwind and s390_frame_base. */
2577
2578 static struct s390_unwind_cache *
2579 s390_frame_unwind_cache (struct frame_info *this_frame,
2580 void **this_prologue_cache)
2581 {
2582 struct s390_unwind_cache *info;
2583
2584 if (*this_prologue_cache)
2585 return (struct s390_unwind_cache *) *this_prologue_cache;
2586
2587 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2588 *this_prologue_cache = info;
2589 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2590 info->func = -1;
2591 info->frame_base = -1;
2592 info->local_base = -1;
2593
2594 try
2595 {
2596 /* Try to use prologue analysis to fill the unwind cache.
2597 If this fails, fall back to reading the stack backchain. */
2598 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2599 s390_backchain_frame_unwind_cache (this_frame, info);
2600 }
2601 catch (const gdb_exception_error &ex)
2602 {
2603 if (ex.error != NOT_AVAILABLE_ERROR)
2604 throw;
2605 }
2606
2607 return info;
2608 }
2609
2610 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2611
2612 static void
2613 s390_frame_this_id (struct frame_info *this_frame,
2614 void **this_prologue_cache,
2615 struct frame_id *this_id)
2616 {
2617 struct s390_unwind_cache *info
2618 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2619
2620 if (info->frame_base == -1)
2621 {
2622 if (info->func != -1)
2623 *this_id = frame_id_build_unavailable_stack (info->func);
2624 return;
2625 }
2626
2627 *this_id = frame_id_build (info->frame_base, info->func);
2628 }
2629
2630 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2631
2632 static struct value *
2633 s390_frame_prev_register (struct frame_info *this_frame,
2634 void **this_prologue_cache, int regnum)
2635 {
2636 struct s390_unwind_cache *info
2637 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
2638
2639 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2640 }
2641
2642 /* Default S390 frame unwinder. */
2643
2644 static const struct frame_unwind s390_frame_unwind = {
2645 NORMAL_FRAME,
2646 default_frame_unwind_stop_reason,
2647 s390_frame_this_id,
2648 s390_frame_prev_register,
2649 NULL,
2650 default_frame_sniffer
2651 };
2652
2653 /* Code stubs and their stack frames. For things like PLTs and NULL
2654 function calls (where there is no true frame and the return address
2655 is in the RETADDR register). */
2656
2657 struct s390_stub_unwind_cache
2658 {
2659 CORE_ADDR frame_base;
2660 struct trad_frame_saved_reg *saved_regs;
2661 };
2662
2663 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2664 s390_stub_frame_unwind. */
2665
2666 static struct s390_stub_unwind_cache *
2667 s390_stub_frame_unwind_cache (struct frame_info *this_frame,
2668 void **this_prologue_cache)
2669 {
2670 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2671 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2672 struct s390_stub_unwind_cache *info;
2673 ULONGEST reg;
2674
2675 if (*this_prologue_cache)
2676 return (struct s390_stub_unwind_cache *) *this_prologue_cache;
2677
2678 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
2679 *this_prologue_cache = info;
2680 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2681
2682 /* The return address is in register %r14. */
2683 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
2684
2685 /* Retrieve stack pointer and determine our frame base. */
2686 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2687 info->frame_base = reg + 16*word_size + 32;
2688
2689 return info;
2690 }
2691
2692 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2693
2694 static void
2695 s390_stub_frame_this_id (struct frame_info *this_frame,
2696 void **this_prologue_cache,
2697 struct frame_id *this_id)
2698 {
2699 struct s390_stub_unwind_cache *info
2700 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2701 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
2702 }
2703
2704 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2705
2706 static struct value *
2707 s390_stub_frame_prev_register (struct frame_info *this_frame,
2708 void **this_prologue_cache, int regnum)
2709 {
2710 struct s390_stub_unwind_cache *info
2711 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2712 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
2713 }
2714
2715 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2716
2717 static int
2718 s390_stub_frame_sniffer (const struct frame_unwind *self,
2719 struct frame_info *this_frame,
2720 void **this_prologue_cache)
2721 {
2722 CORE_ADDR addr_in_block;
2723 bfd_byte insn[S390_MAX_INSTR_SIZE];
2724
2725 /* If the current PC points to non-readable memory, we assume we
2726 have trapped due to an invalid function pointer call. We handle
2727 the non-existing current function like a PLT stub. */
2728 addr_in_block = get_frame_address_in_block (this_frame);
2729 if (in_plt_section (addr_in_block)
2730 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2731 return 1;
2732 return 0;
2733 }
2734
2735 /* S390 stub frame unwinder. */
2736
2737 static const struct frame_unwind s390_stub_frame_unwind = {
2738 NORMAL_FRAME,
2739 default_frame_unwind_stop_reason,
2740 s390_stub_frame_this_id,
2741 s390_stub_frame_prev_register,
2742 NULL,
2743 s390_stub_frame_sniffer
2744 };
2745
2746 /* Frame base handling. */
2747
2748 static CORE_ADDR
2749 s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
2750 {
2751 struct s390_unwind_cache *info
2752 = s390_frame_unwind_cache (this_frame, this_cache);
2753 return info->frame_base;
2754 }
2755
2756 static CORE_ADDR
2757 s390_local_base_address (struct frame_info *this_frame, void **this_cache)
2758 {
2759 struct s390_unwind_cache *info
2760 = s390_frame_unwind_cache (this_frame, this_cache);
2761 return info->local_base;
2762 }
2763
2764 static const struct frame_base s390_frame_base = {
2765 &s390_frame_unwind,
2766 s390_frame_base_address,
2767 s390_local_base_address,
2768 s390_local_base_address
2769 };
2770
2771 /* Process record-replay */
2772
2773 /* Takes the intermediate sum of address calculations and masks off upper
2774 bits according to current addressing mode. */
2775
2776 static CORE_ADDR
2777 s390_record_address_mask (struct gdbarch *gdbarch, struct regcache *regcache,
2778 CORE_ADDR val)
2779 {
2780 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2781 ULONGEST pswm, pswa;
2782 int am;
2783 if (tdep->abi == ABI_LINUX_S390)
2784 {
2785 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2786 am = pswa >> 31 & 1;
2787 }
2788 else
2789 {
2790 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &pswm);
2791 am = pswm >> 31 & 3;
2792 }
2793 switch (am)
2794 {
2795 case 0:
2796 return val & 0xffffff;
2797 case 1:
2798 return val & 0x7fffffff;
2799 case 3:
2800 return val;
2801 default:
2802 fprintf_unfiltered (gdb_stdlog, "Warning: Addressing mode %d used.", am);
2803 return 0;
2804 }
2805 }
2806
2807 /* Calculates memory address using pre-calculated index, raw instruction word
2808 with b and d/dl fields, and raw instruction byte with dh field. Index and
2809 dh should be set to 0 if unused. */
2810
2811 static CORE_ADDR
2812 s390_record_calc_disp_common (struct gdbarch *gdbarch, struct regcache *regcache,
2813 ULONGEST x, uint16_t bd, int8_t dh)
2814 {
2815 uint8_t rb = bd >> 12 & 0xf;
2816 int32_t d = (bd & 0xfff) | ((int32_t)dh << 12);
2817 ULONGEST b;
2818 CORE_ADDR res = d + x;
2819 if (rb)
2820 {
2821 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rb, &b);
2822 res += b;
2823 }
2824 return s390_record_address_mask (gdbarch, regcache, res);
2825 }
2826
2827 /* Calculates memory address using raw x, b + d/dl, dh fields from
2828 instruction. rx and dh should be set to 0 if unused. */
2829
2830 static CORE_ADDR
2831 s390_record_calc_disp (struct gdbarch *gdbarch, struct regcache *regcache,
2832 uint8_t rx, uint16_t bd, int8_t dh)
2833 {
2834 ULONGEST x = 0;
2835 if (rx)
2836 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + rx, &x);
2837 return s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2838 }
2839
2840 /* Calculates memory address for VSCE[GF] instructions. */
2841
2842 static int
2843 s390_record_calc_disp_vsce (struct gdbarch *gdbarch, struct regcache *regcache,
2844 uint8_t vx, uint8_t el, uint8_t es, uint16_t bd,
2845 int8_t dh, CORE_ADDR *res)
2846 {
2847 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2848 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2849 ULONGEST x;
2850 gdb_byte buf[16];
2851 if (tdep->v0_full_regnum == -1 || el * es >= 16)
2852 return -1;
2853 if (vx < 16)
2854 regcache->cooked_read (tdep->v0_full_regnum + vx, buf);
2855 else
2856 regcache->raw_read (S390_V16_REGNUM + vx - 16, buf);
2857 x = extract_unsigned_integer (buf + el * es, es, byte_order);
2858 *res = s390_record_calc_disp_common (gdbarch, regcache, x, bd, dh);
2859 return 0;
2860 }
2861
2862 /* Calculates memory address for instructions with relative long addressing. */
2863
2864 static CORE_ADDR
2865 s390_record_calc_rl (struct gdbarch *gdbarch, struct regcache *regcache,
2866 CORE_ADDR addr, uint16_t i1, uint16_t i2)
2867 {
2868 int32_t ri = i1 << 16 | i2;
2869 return s390_record_address_mask (gdbarch, regcache, addr + (LONGEST)ri * 2);
2870 }
2871
2872 /* Population count helper. */
2873
2874 static int s390_popcnt (unsigned int x) {
2875 int res = 0;
2876 while (x)
2877 {
2878 if (x & 1)
2879 res++;
2880 x >>= 1;
2881 }
2882 return res;
2883 }
2884
2885 /* Record 64-bit register. */
2886
2887 static int
2888 s390_record_gpr_g (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2889 {
2890 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2891 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2892 return -1;
2893 if (tdep->abi == ABI_LINUX_S390)
2894 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2895 return -1;
2896 return 0;
2897 }
2898
2899 /* Record high 32 bits of a register. */
2900
2901 static int
2902 s390_record_gpr_h (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2903 {
2904 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2905 if (tdep->abi == ABI_LINUX_S390)
2906 {
2907 if (record_full_arch_list_add_reg (regcache, S390_R0_UPPER_REGNUM + i))
2908 return -1;
2909 }
2910 else
2911 {
2912 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
2913 return -1;
2914 }
2915 return 0;
2916 }
2917
2918 /* Record vector register. */
2919
2920 static int
2921 s390_record_vr (struct gdbarch *gdbarch, struct regcache *regcache, int i)
2922 {
2923 if (i < 16)
2924 {
2925 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + i))
2926 return -1;
2927 if (record_full_arch_list_add_reg (regcache, S390_V0_LOWER_REGNUM + i))
2928 return -1;
2929 }
2930 else
2931 {
2932 if (record_full_arch_list_add_reg (regcache, S390_V16_REGNUM + i - 16))
2933 return -1;
2934 }
2935 return 0;
2936 }
2937
2938 /* Implement process_record gdbarch method. */
2939
2940 static int
2941 s390_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
2942 CORE_ADDR addr)
2943 {
2944 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2945 uint16_t insn[3] = {0};
2946 /* Instruction as bytes. */
2947 uint8_t ibyte[6];
2948 /* Instruction as nibbles. */
2949 uint8_t inib[12];
2950 /* Instruction vector registers. */
2951 uint8_t ivec[4];
2952 CORE_ADDR oaddr, oaddr2, oaddr3;
2953 ULONGEST tmp;
2954 int i, n;
2955 /* if EX/EXRL instruction used, here's the reg parameter */
2956 int ex = -1;
2957 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2958
2959 /* Attempting to use EX or EXRL jumps back here */
2960 ex:
2961
2962 /* Read instruction. */
2963 insn[0] = read_memory_unsigned_integer (addr, 2, byte_order);
2964 /* If execute was involved, do the adjustment. */
2965 if (ex != -1)
2966 insn[0] |= ex & 0xff;
2967 /* Two highest bits determine instruction size. */
2968 if (insn[0] >= 0x4000)
2969 insn[1] = read_memory_unsigned_integer (addr+2, 2, byte_order);
2970 else
2971 /* Not necessary, but avoids uninitialized variable warnings. */
2972 insn[1] = 0;
2973 if (insn[0] >= 0xc000)
2974 insn[2] = read_memory_unsigned_integer (addr+4, 2, byte_order);
2975 else
2976 insn[2] = 0;
2977 /* Split instruction into bytes and nibbles. */
2978 for (i = 0; i < 3; i++)
2979 {
2980 ibyte[i*2] = insn[i] >> 8 & 0xff;
2981 ibyte[i*2+1] = insn[i] & 0xff;
2982 }
2983 for (i = 0; i < 6; i++)
2984 {
2985 inib[i*2] = ibyte[i] >> 4 & 0xf;
2986 inib[i*2+1] = ibyte[i] & 0xf;
2987 }
2988 /* Compute vector registers, if applicable. */
2989 ivec[0] = (inib[9] >> 3 & 1) << 4 | inib[2];
2990 ivec[1] = (inib[9] >> 2 & 1) << 4 | inib[3];
2991 ivec[2] = (inib[9] >> 1 & 1) << 4 | inib[4];
2992 ivec[3] = (inib[9] >> 0 & 1) << 4 | inib[8];
2993
2994 switch (ibyte[0])
2995 {
2996 /* 0x00 undefined */
2997
2998 case 0x01:
2999 /* E-format instruction */
3000 switch (ibyte[1])
3001 {
3002 /* 0x00 undefined */
3003 /* 0x01 unsupported: PR - program return */
3004 /* 0x02 unsupported: UPT */
3005 /* 0x03 undefined */
3006 /* 0x04 privileged: PTFF - perform timing facility function */
3007 /* 0x05-0x06 undefined */
3008 /* 0x07 privileged: SCKPF - set clock programmable field */
3009 /* 0x08-0x09 undefined */
3010
3011 case 0x0a: /* PFPO - perform floating point operation */
3012 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3013 if (!(tmp & 0x80000000u))
3014 {
3015 uint8_t ofc = tmp >> 16 & 0xff;
3016 switch (ofc)
3017 {
3018 case 0x00: /* HFP32 */
3019 case 0x01: /* HFP64 */
3020 case 0x05: /* BFP32 */
3021 case 0x06: /* BFP64 */
3022 case 0x08: /* DFP32 */
3023 case 0x09: /* DFP64 */
3024 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3025 return -1;
3026 break;
3027 case 0x02: /* HFP128 */
3028 case 0x07: /* BFP128 */
3029 case 0x0a: /* DFP128 */
3030 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM))
3031 return -1;
3032 if (record_full_arch_list_add_reg (regcache, S390_F2_REGNUM))
3033 return -1;
3034 break;
3035 default:
3036 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PFPO OFC %02x at %s.\n",
3037 ofc, paddress (gdbarch, addr));
3038 return -1;
3039 }
3040
3041 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3042 return -1;
3043 }
3044 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3045 return -1;
3046 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3047 return -1;
3048 break;
3049
3050 case 0x0b: /* TAM - test address mode */
3051 case 0x0c: /* SAM24 - set address mode 24 */
3052 case 0x0d: /* SAM31 - set address mode 31 */
3053 case 0x0e: /* SAM64 - set address mode 64 */
3054 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3055 return -1;
3056 break;
3057
3058 /* 0x0f-0xfe undefined */
3059
3060 /* 0xff unsupported: TRAP */
3061
3062 default:
3063 goto UNKNOWN_OP;
3064 }
3065 break;
3066
3067 /* 0x02 undefined */
3068 /* 0x03 undefined */
3069
3070 case 0x04: /* SPM - set program mask */
3071 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3072 return -1;
3073 break;
3074
3075 case 0x05: /* BALR - branch and link */
3076 case 0x45: /* BAL - branch and link */
3077 case 0x06: /* BCTR - branch on count */
3078 case 0x46: /* BCT - branch on count */
3079 case 0x0d: /* BASR - branch and save */
3080 case 0x4d: /* BAS - branch and save */
3081 case 0x84: /* BRXH - branch relative on index high */
3082 case 0x85: /* BRXLE - branch relative on index low or equal */
3083 case 0x86: /* BXH - branch on index high */
3084 case 0x87: /* BXLE - branch on index low or equal */
3085 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3086 use 32-bit destination as counter. */
3087 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3088 return -1;
3089 break;
3090
3091 case 0x07: /* BCR - branch on condition */
3092 case 0x47: /* BC - branch on condition */
3093 /* No effect other than PC transfer. */
3094 break;
3095
3096 /* 0x08 undefined */
3097 /* 0x09 undefined */
3098
3099 case 0x0a:
3100 /* SVC - supervisor call */
3101 if (tdep->s390_syscall_record != NULL)
3102 {
3103 if (tdep->s390_syscall_record (regcache, ibyte[1]))
3104 return -1;
3105 }
3106 else
3107 {
3108 printf_unfiltered (_("no syscall record support\n"));
3109 return -1;
3110 }
3111 break;
3112
3113 case 0x0b: /* BSM - branch and set mode */
3114 if (inib[2])
3115 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3116 return -1;
3117 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3118 return -1;
3119 break;
3120
3121 case 0x0c: /* BASSM - branch and save and set mode */
3122 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3123 return -1;
3124 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3125 return -1;
3126 break;
3127
3128 case 0x0e: /* MVCL - move long [interruptible] */
3129 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3130 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3131 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3132 tmp &= 0xffffff;
3133 if (record_full_arch_list_add_mem (oaddr, tmp))
3134 return -1;
3135 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3136 return -1;
3137 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3138 return -1;
3139 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3140 return -1;
3141 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3142 return -1;
3143 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3144 return -1;
3145 break;
3146
3147 case 0x0f: /* CLCL - compare logical long [interruptible] */
3148 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3149 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3150 return -1;
3151 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3152 return -1;
3153 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3154 return -1;
3155 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3156 return -1;
3157 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3158 return -1;
3159 break;
3160
3161 case 0x10: /* LPR - load positive */
3162 case 0x11: /* LNR - load negative */
3163 case 0x12: /* LTR - load and test */
3164 case 0x13: /* LCR - load complement */
3165 case 0x14: /* NR - and */
3166 case 0x16: /* OR - or */
3167 case 0x17: /* XR - xor */
3168 case 0x1a: /* AR - add */
3169 case 0x1b: /* SR - subtract */
3170 case 0x1e: /* ALR - add logical */
3171 case 0x1f: /* SLR - subtract logical */
3172 case 0x54: /* N - and */
3173 case 0x56: /* O - or */
3174 case 0x57: /* X - xor */
3175 case 0x5a: /* A - add */
3176 case 0x5b: /* S - subtract */
3177 case 0x5e: /* AL - add logical */
3178 case 0x5f: /* SL - subtract logical */
3179 case 0x4a: /* AH - add halfword */
3180 case 0x4b: /* SH - subtract halfword */
3181 case 0x8a: /* SRA - shift right single */
3182 case 0x8b: /* SLA - shift left single */
3183 case 0xbf: /* ICM - insert characters under mask */
3184 /* 32-bit destination + flags */
3185 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3186 return -1;
3187 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3188 return -1;
3189 break;
3190
3191 case 0x15: /* CLR - compare logical */
3192 case 0x55: /* CL - compare logical */
3193 case 0x19: /* CR - compare */
3194 case 0x29: /* CDR - compare */
3195 case 0x39: /* CER - compare */
3196 case 0x49: /* CH - compare halfword */
3197 case 0x59: /* C - compare */
3198 case 0x69: /* CD - compare */
3199 case 0x79: /* CE - compare */
3200 case 0x91: /* TM - test under mask */
3201 case 0x95: /* CLI - compare logical */
3202 case 0xbd: /* CLM - compare logical under mask */
3203 case 0xd5: /* CLC - compare logical */
3204 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3205 return -1;
3206 break;
3207
3208 case 0x18: /* LR - load */
3209 case 0x48: /* LH - load halfword */
3210 case 0x58: /* L - load */
3211 case 0x41: /* LA - load address */
3212 case 0x43: /* IC - insert character */
3213 case 0x4c: /* MH - multiply halfword */
3214 case 0x71: /* MS - multiply single */
3215 case 0x88: /* SRL - shift right single logical */
3216 case 0x89: /* SLL - shift left single logical */
3217 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3218 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3219 return -1;
3220 break;
3221
3222 case 0x1c: /* MR - multiply */
3223 case 0x5c: /* M - multiply */
3224 case 0x1d: /* DR - divide */
3225 case 0x5d: /* D - divide */
3226 case 0x8c: /* SRDL - shift right double logical */
3227 case 0x8d: /* SLDL - shift left double logical */
3228 /* 32-bit pair destination, no flags */
3229 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3230 return -1;
3231 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3232 return -1;
3233 break;
3234
3235 case 0x20: /* LPDR - load positive */
3236 case 0x30: /* LPER - load positive */
3237 case 0x21: /* LNDR - load negative */
3238 case 0x31: /* LNER - load negative */
3239 case 0x22: /* LTDR - load and test */
3240 case 0x32: /* LTER - load and test */
3241 case 0x23: /* LCDR - load complement */
3242 case 0x33: /* LCER - load complement */
3243 case 0x2a: /* ADR - add */
3244 case 0x3a: /* AER - add */
3245 case 0x6a: /* AD - add */
3246 case 0x7a: /* AE - add */
3247 case 0x2b: /* SDR - subtract */
3248 case 0x3b: /* SER - subtract */
3249 case 0x6b: /* SD - subtract */
3250 case 0x7b: /* SE - subtract */
3251 case 0x2e: /* AWR - add unnormalized */
3252 case 0x3e: /* AUR - add unnormalized */
3253 case 0x6e: /* AW - add unnormalized */
3254 case 0x7e: /* AU - add unnormalized */
3255 case 0x2f: /* SWR - subtract unnormalized */
3256 case 0x3f: /* SUR - subtract unnormalized */
3257 case 0x6f: /* SW - subtract unnormalized */
3258 case 0x7f: /* SU - subtract unnormalized */
3259 /* float destination + flags */
3260 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3261 return -1;
3262 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3263 return -1;
3264 break;
3265
3266 case 0x24: /* HDR - halve */
3267 case 0x34: /* HER - halve */
3268 case 0x25: /* LDXR - load rounded */
3269 case 0x35: /* LEDR - load rounded */
3270 case 0x28: /* LDR - load */
3271 case 0x38: /* LER - load */
3272 case 0x68: /* LD - load */
3273 case 0x78: /* LE - load */
3274 case 0x2c: /* MDR - multiply */
3275 case 0x3c: /* MDER - multiply */
3276 case 0x6c: /* MD - multiply */
3277 case 0x7c: /* MDE - multiply */
3278 case 0x2d: /* DDR - divide */
3279 case 0x3d: /* DER - divide */
3280 case 0x6d: /* DD - divide */
3281 case 0x7d: /* DE - divide */
3282 /* float destination, no flags */
3283 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3284 return -1;
3285 break;
3286
3287 case 0x26: /* MXR - multiply */
3288 case 0x27: /* MXDR - multiply */
3289 case 0x67: /* MXD - multiply */
3290 /* float pair destination, no flags */
3291 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3292 return -1;
3293 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3294 return -1;
3295 break;
3296
3297 case 0x36: /* AXR - add */
3298 case 0x37: /* SXR - subtract */
3299 /* float pair destination + flags */
3300 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
3301 return -1;
3302 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
3303 return -1;
3304 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3305 return -1;
3306 break;
3307
3308 case 0x40: /* STH - store halfword */
3309 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3310 if (record_full_arch_list_add_mem (oaddr, 2))
3311 return -1;
3312 break;
3313
3314 case 0x42: /* STC - store character */
3315 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3316 if (record_full_arch_list_add_mem (oaddr, 1))
3317 return -1;
3318 break;
3319
3320 case 0x44: /* EX - execute */
3321 if (ex != -1)
3322 {
3323 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
3324 paddress (gdbarch, addr));
3325 return -1;
3326 }
3327 addr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3328 if (inib[2])
3329 {
3330 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3331 ex = tmp & 0xff;
3332 }
3333 else
3334 {
3335 ex = 0;
3336 }
3337 goto ex;
3338
3339 case 0x4e: /* CVD - convert to decimal */
3340 case 0x60: /* STD - store */
3341 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3342 if (record_full_arch_list_add_mem (oaddr, 8))
3343 return -1;
3344 break;
3345
3346 case 0x4f: /* CVB - convert to binary */
3347 /* 32-bit gpr destination + FPC (DXC write) */
3348 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3349 return -1;
3350 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3351 return -1;
3352 break;
3353
3354 case 0x50: /* ST - store */
3355 case 0x70: /* STE - store */
3356 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
3357 if (record_full_arch_list_add_mem (oaddr, 4))
3358 return -1;
3359 break;
3360
3361 case 0x51: /* LAE - load address extended */
3362 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3363 return -1;
3364 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
3365 return -1;
3366 break;
3367
3368 /* 0x52 undefined */
3369 /* 0x53 undefined */
3370
3371 /* 0x61-0x66 undefined */
3372
3373 /* 0x72-0x77 undefined */
3374
3375 /* 0x80 privileged: SSM - set system mask */
3376 /* 0x81 undefined */
3377 /* 0x82 privileged: LPSW - load PSW */
3378 /* 0x83 privileged: diagnose */
3379
3380 case 0x8e: /* SRDA - shift right double */
3381 case 0x8f: /* SLDA - shift left double */
3382 /* 32-bit pair destination + flags */
3383 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3384 return -1;
3385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3386 return -1;
3387 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3388 return -1;
3389 break;
3390
3391 case 0x90: /* STM - store multiple */
3392 case 0x9b: /* STAM - store access multiple */
3393 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3394 if (inib[2] <= inib[3])
3395 n = inib[3] - inib[2] + 1;
3396 else
3397 n = inib[3] + 0x10 - inib[2] + 1;
3398 if (record_full_arch_list_add_mem (oaddr, n * 4))
3399 return -1;
3400 break;
3401
3402 case 0x92: /* MVI - move */
3403 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3404 if (record_full_arch_list_add_mem (oaddr, 1))
3405 return -1;
3406 break;
3407
3408 case 0x93: /* TS - test and set */
3409 case 0x94: /* NI - and */
3410 case 0x96: /* OI - or */
3411 case 0x97: /* XI - xor */
3412 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3413 if (record_full_arch_list_add_mem (oaddr, 1))
3414 return -1;
3415 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3416 return -1;
3417 break;
3418
3419 case 0x98: /* LM - load multiple */
3420 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3421 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
3422 return -1;
3423 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3424 return -1;
3425 break;
3426
3427 /* 0x99 privileged: TRACE */
3428
3429 case 0x9a: /* LAM - load access multiple */
3430 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
3431 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
3432 return -1;
3433 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
3434 return -1;
3435 break;
3436
3437 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3438 /* 0xa0-0xa4 undefined */
3439
3440 case 0xa5:
3441 case 0xa7:
3442 /* RI-format instruction */
3443 switch (ibyte[0] << 4 | inib[3])
3444 {
3445 case 0xa50: /* IIHH - insert immediate */
3446 case 0xa51: /* IIHL - insert immediate */
3447 /* high 32-bit destination */
3448 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3449 return -1;
3450 break;
3451
3452 case 0xa52: /* IILH - insert immediate */
3453 case 0xa53: /* IILL - insert immediate */
3454 case 0xa75: /* BRAS - branch relative and save */
3455 case 0xa76: /* BRCT - branch relative on count */
3456 case 0xa78: /* LHI - load halfword immediate */
3457 case 0xa7c: /* MHI - multiply halfword immediate */
3458 /* 32-bit or native destination */
3459 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3460 return -1;
3461 break;
3462
3463 case 0xa54: /* NIHH - and immediate */
3464 case 0xa55: /* NIHL - and immediate */
3465 case 0xa58: /* OIHH - or immediate */
3466 case 0xa59: /* OIHL - or immediate */
3467 /* high 32-bit destination + flags */
3468 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
3469 return -1;
3470 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3471 return -1;
3472 break;
3473
3474 case 0xa56: /* NILH - and immediate */
3475 case 0xa57: /* NILL - and immediate */
3476 case 0xa5a: /* OILH - or immediate */
3477 case 0xa5b: /* OILL - or immediate */
3478 case 0xa7a: /* AHI - add halfword immediate */
3479 /* 32-bit destination + flags */
3480 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3481 return -1;
3482 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3483 return -1;
3484 break;
3485
3486 case 0xa5c: /* LLIHH - load logical immediate */
3487 case 0xa5d: /* LLIHL - load logical immediate */
3488 case 0xa5e: /* LLILH - load logical immediate */
3489 case 0xa5f: /* LLILL - load logical immediate */
3490 case 0xa77: /* BRCTG - branch relative on count */
3491 case 0xa79: /* LGHI - load halfword immediate */
3492 case 0xa7d: /* MGHI - multiply halfword immediate */
3493 /* 64-bit destination */
3494 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3495 return -1;
3496 break;
3497
3498 case 0xa70: /* TMLH - test under mask */
3499 case 0xa71: /* TMLL - test under mask */
3500 case 0xa72: /* TMHH - test under mask */
3501 case 0xa73: /* TMHL - test under mask */
3502 case 0xa7e: /* CHI - compare halfword immediate */
3503 case 0xa7f: /* CGHI - compare halfword immediate */
3504 /* flags only */
3505 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3506 return -1;
3507 break;
3508
3509 case 0xa74: /* BRC - branch relative on condition */
3510 /* no register change */
3511 break;
3512
3513 case 0xa7b: /* AGHI - add halfword immediate */
3514 /* 64-bit destination + flags */
3515 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
3516 return -1;
3517 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3518 return -1;
3519 break;
3520
3521 default:
3522 goto UNKNOWN_OP;
3523 }
3524 break;
3525
3526 /* 0xa6 undefined */
3527
3528 case 0xa8: /* MVCLE - move long extended [partial] */
3529 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
3530 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3531 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
3532 if (record_full_arch_list_add_mem (oaddr, tmp))
3533 return -1;
3534 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
3535 return -1;
3536 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
3537 return -1;
3538 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
3539 return -1;
3540 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
3541 return -1;
3542 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3543 return -1;
3544 break;
3545
3546 /* 0xaa-0xab undefined */
3547 /* 0xac privileged: STNSM - store then and system mask */
3548 /* 0xad privileged: STOSM - store then or system mask */
3549 /* 0xae privileged: SIGP - signal processor */
3550 /* 0xaf unsupported: MC - monitor call */
3551 /* 0xb0 undefined */
3552 /* 0xb1 privileged: LRA - load real address */
3553
3554 case 0xb2:
3555 case 0xb3:
3556 case 0xb9:
3557 /* S/RRD/RRE/RRF/IE-format instruction */
3558 switch (insn[0])
3559 {
3560 /* 0xb200-0xb204 undefined or privileged */
3561
3562 case 0xb205: /* STCK - store clock */
3563 case 0xb27c: /* STCKF - store clock fast */
3564 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3565 if (record_full_arch_list_add_mem (oaddr, 8))
3566 return -1;
3567 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3568 return -1;
3569 break;
3570
3571 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3572 /* 0xb21a unsupported: CFC */
3573 /* 0xb21b-0xb221 undefined or privileged */
3574
3575 case 0xb222: /* IPM - insert program mask */
3576 case 0xb24f: /* EAR - extract access */
3577 case 0xb252: /* MSR - multiply single */
3578 case 0xb2ec: /* ETND - extract transaction nesting depth */
3579 case 0xb38c: /* EFPC - extract fpc */
3580 case 0xb91f: /* LRVR - load reversed */
3581 case 0xb926: /* LBR - load byte */
3582 case 0xb927: /* LHR - load halfword */
3583 case 0xb994: /* LLCR - load logical character */
3584 case 0xb995: /* LLHR - load logical halfword */
3585 case 0xb9f2: /* LOCR - load on condition */
3586 /* 32-bit gpr destination */
3587 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3588 return -1;
3589 break;
3590
3591 /* 0xb223-0xb22c privileged or unsupported */
3592
3593 case 0xb22d: /* DXR - divide */
3594 case 0xb325: /* LXDR - load lengthened */
3595 case 0xb326: /* LXER - load lengthened */
3596 case 0xb336: /* SQXR - square root */
3597 case 0xb365: /* LXR - load */
3598 case 0xb367: /* FIXR - load fp integer */
3599 case 0xb376: /* LZXR - load zero */
3600 case 0xb3b6: /* CXFR - convert from fixed */
3601 case 0xb3c6: /* CXGR - convert from fixed */
3602 case 0xb3fe: /* IEXTR - insert biased exponent */
3603 /* float pair destination */
3604 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3605 return -1;
3606 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3607 return -1;
3608 break;
3609
3610 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3611
3612 case 0xb241: /* CKSM - checksum [partial] */
3613 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3614 return -1;
3615 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3616 return -1;
3617 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3618 return -1;
3619 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3620 return -1;
3621 break;
3622
3623 /* 0xb242-0xb243 undefined */
3624
3625 case 0xb244: /* SQDR - square root */
3626 case 0xb245: /* SQER - square root */
3627 case 0xb324: /* LDER - load lengthened */
3628 case 0xb337: /* MEER - multiply */
3629 case 0xb366: /* LEXR - load rounded */
3630 case 0xb370: /* LPDFR - load positive */
3631 case 0xb371: /* LNDFR - load negative */
3632 case 0xb372: /* CSDFR - copy sign */
3633 case 0xb373: /* LCDFR - load complement */
3634 case 0xb374: /* LZER - load zero */
3635 case 0xb375: /* LZDR - load zero */
3636 case 0xb377: /* FIER - load fp integer */
3637 case 0xb37f: /* FIDR - load fp integer */
3638 case 0xb3b4: /* CEFR - convert from fixed */
3639 case 0xb3b5: /* CDFR - convert from fixed */
3640 case 0xb3c1: /* LDGR - load fpr from gr */
3641 case 0xb3c4: /* CEGR - convert from fixed */
3642 case 0xb3c5: /* CDGR - convert from fixed */
3643 case 0xb3f6: /* IEDTR - insert biased exponent */
3644 /* float destination */
3645 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3646 return -1;
3647 break;
3648
3649 /* 0xb246-0xb24c: privileged or unsupported */
3650
3651 case 0xb24d: /* CPYA - copy access */
3652 case 0xb24e: /* SAR - set access */
3653 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[6]))
3654 return -1;
3655 break;
3656
3657 /* 0xb250-0xb251 undefined or privileged */
3658 /* 0xb253-0xb254 undefined or privileged */
3659
3660 case 0xb255: /* MVST - move string [partial] */
3661 {
3662 uint8_t end;
3663 gdb_byte cur;
3664 ULONGEST num = 0;
3665 /* Read ending byte. */
3666 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3667 end = tmp & 0xff;
3668 /* Get address of second operand. */
3669 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[7], &tmp);
3670 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3671 /* Search for ending byte and compute length. */
3672 do {
3673 num++;
3674 if (target_read_memory (oaddr, &cur, 1))
3675 return -1;
3676 oaddr++;
3677 } while (cur != end);
3678 /* Get address of first operand and record it. */
3679 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3680 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3681 if (record_full_arch_list_add_mem (oaddr, num))
3682 return -1;
3683 /* Record the registers. */
3684 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3685 return -1;
3686 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3687 return -1;
3688 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3689 return -1;
3690 }
3691 break;
3692
3693 /* 0xb256 undefined */
3694
3695 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3696 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3697 return -1;
3698 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3699 return -1;
3700 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3701 return -1;
3702 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3703 return -1;
3704 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3705 return -1;
3706 break;
3707
3708 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3709
3710 case 0xb25d: /* CLST - compare logical string [partial] */
3711 case 0xb25e: /* SRST - search string [partial] */
3712 case 0xb9be: /* SRSTU - search string unicode [partial] */
3713 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3714 return -1;
3715 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3716 return -1;
3717 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3718 return -1;
3719 break;
3720
3721 /* 0xb25f-0xb262 undefined */
3722
3723 case 0xb263: /* CMPSC - compression call [interruptible] */
3724 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3725 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3726 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3727 if (record_full_arch_list_add_mem (oaddr, tmp))
3728 return -1;
3729 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3730 return -1;
3731 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3732 return -1;
3733 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3734 return -1;
3735 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3736 return -1;
3737 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
3738 return -1;
3739 /* DXC may be written */
3740 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3741 return -1;
3742 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3743 return -1;
3744 break;
3745
3746 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3747
3748 case 0xb278: /* STCKE - store clock extended */
3749 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3750 if (record_full_arch_list_add_mem (oaddr, 16))
3751 return -1;
3752 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3753 return -1;
3754 break;
3755
3756 /* 0xb279-0xb27b undefined or unsupported */
3757 /* 0xb27d-0xb298 undefined or privileged */
3758
3759 case 0xb299: /* SRNM - set rounding mode */
3760 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3761 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3762 case 0xb29d: /* LFPC - load fpc */
3763 case 0xb2bd: /* LFAS - load fpc and signal */
3764 case 0xb384: /* SFPC - set fpc */
3765 case 0xb385: /* SFASR - set fpc and signal */
3766 case 0xb960: /* CGRT - compare and trap */
3767 case 0xb961: /* CLGRT - compare logical and trap */
3768 case 0xb972: /* CRT - compare and trap */
3769 case 0xb973: /* CLRT - compare logical and trap */
3770 /* fpc only - including possible DXC write for trapping insns */
3771 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3772 return -1;
3773 break;
3774
3775 /* 0xb29a-0xb29b undefined */
3776
3777 case 0xb29c: /* STFPC - store fpc */
3778 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3779 if (record_full_arch_list_add_mem (oaddr, 4))
3780 return -1;
3781 break;
3782
3783 /* 0xb29e-0xb2a4 undefined */
3784
3785 case 0xb2a5: /* TRE - translate extended [partial] */
3786 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3787 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3788 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3789 if (record_full_arch_list_add_mem (oaddr, tmp))
3790 return -1;
3791 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3792 return -1;
3793 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3794 return -1;
3795 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3796 return -1;
3797 break;
3798
3799 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3800 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3801 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3802 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3803 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3804 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3805 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
3806 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
3807 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
3808 if (record_full_arch_list_add_mem (oaddr, tmp))
3809 return -1;
3810 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
3811 return -1;
3812 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
3813 return -1;
3814 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
3815 return -1;
3816 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
3817 return -1;
3818 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3819 return -1;
3820 break;
3821
3822 /* 0xb2a8-0xb2af undefined */
3823
3824 case 0xb2b0: /* STFLE - store facility list extended */
3825 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
3826 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
3827 tmp &= 0xff;
3828 if (record_full_arch_list_add_mem (oaddr, 8 * (tmp + 1)))
3829 return -1;
3830 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM))
3831 return -1;
3832 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3833 return -1;
3834 break;
3835
3836 /* 0xb2b1-0xb2b7 undefined or privileged */
3837 /* 0xb2ba-0xb2bc undefined */
3838 /* 0xb2be-0xb2e7 undefined */
3839 /* 0xb2e9-0xb2eb undefined */
3840 /* 0xb2ed-0xb2f7 undefined */
3841 /* 0xb2f8 unsupported: TEND */
3842 /* 0xb2f9 undefined */
3843
3844 case 0xb2e8: /* PPA - perform processor assist */
3845 case 0xb2fa: /* NIAI - next instruction access intent */
3846 /* no visible effects */
3847 break;
3848
3849 /* 0xb2fb undefined */
3850 /* 0xb2fc unsupported: TABORT */
3851 /* 0xb2fd-0xb2fe undefined */
3852 /* 0xb2ff unsupported: TRAP */
3853
3854 case 0xb300: /* LPEBR - load positive */
3855 case 0xb301: /* LNEBR - load negative */
3856 case 0xb303: /* LCEBR - load complement */
3857 case 0xb310: /* LPDBR - load positive */
3858 case 0xb311: /* LNDBR - load negative */
3859 case 0xb313: /* LCDBR - load complement */
3860 case 0xb350: /* TBEDR - convert hfp to bfp */
3861 case 0xb351: /* TBDR - convert hfp to bfp */
3862 case 0xb358: /* THDER - convert bfp to hfp */
3863 case 0xb359: /* THDR - convert bfp to hfp */
3864 /* float destination + flags */
3865 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3866 return -1;
3867 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3868 return -1;
3869 break;
3870
3871 case 0xb304: /* LDEBR - load lengthened */
3872 case 0xb30c: /* MDEBR - multiply */
3873 case 0xb30d: /* DEBR - divide */
3874 case 0xb314: /* SQEBR - square root */
3875 case 0xb315: /* SQDBR - square root */
3876 case 0xb317: /* MEEBR - multiply */
3877 case 0xb31c: /* MDBR - multiply */
3878 case 0xb31d: /* DDBR - divide */
3879 case 0xb344: /* LEDBRA - load rounded */
3880 case 0xb345: /* LDXBRA - load rounded */
3881 case 0xb346: /* LEXBRA - load rounded */
3882 case 0xb357: /* FIEBRA - load fp integer */
3883 case 0xb35f: /* FIDBRA - load fp integer */
3884 case 0xb390: /* CELFBR - convert from logical */
3885 case 0xb391: /* CDLFBR - convert from logical */
3886 case 0xb394: /* CEFBR - convert from fixed */
3887 case 0xb395: /* CDFBR - convert from fixed */
3888 case 0xb3a0: /* CELGBR - convert from logical */
3889 case 0xb3a1: /* CDLGBR - convert from logical */
3890 case 0xb3a4: /* CEGBR - convert from fixed */
3891 case 0xb3a5: /* CDGBR - convert from fixed */
3892 case 0xb3d0: /* MDTR - multiply */
3893 case 0xb3d1: /* DDTR - divide */
3894 case 0xb3d4: /* LDETR - load lengthened */
3895 case 0xb3d5: /* LEDTR - load lengthened */
3896 case 0xb3d7: /* FIDTR - load fp integer */
3897 case 0xb3dd: /* LDXTR - load lengthened */
3898 case 0xb3f1: /* CDGTR - convert from fixed */
3899 case 0xb3f2: /* CDUTR - convert from unsigned packed */
3900 case 0xb3f3: /* CDSTR - convert from signed packed */
3901 case 0xb3f5: /* QADTR - quantize */
3902 case 0xb3f7: /* RRDTR - reround */
3903 case 0xb951: /* CDFTR - convert from fixed */
3904 case 0xb952: /* CDLGTR - convert from logical */
3905 case 0xb953: /* CDLFTR - convert from logical */
3906 /* float destination + fpc */
3907 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3908 return -1;
3909 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3910 return -1;
3911 break;
3912
3913 case 0xb305: /* LXDBR - load lengthened */
3914 case 0xb306: /* LXEBR - load lengthened */
3915 case 0xb307: /* MXDBR - multiply */
3916 case 0xb316: /* SQXBR - square root */
3917 case 0xb34c: /* MXBR - multiply */
3918 case 0xb34d: /* DXBR - divide */
3919 case 0xb347: /* FIXBRA - load fp integer */
3920 case 0xb392: /* CXLFBR - convert from logical */
3921 case 0xb396: /* CXFBR - convert from fixed */
3922 case 0xb3a2: /* CXLGBR - convert from logical */
3923 case 0xb3a6: /* CXGBR - convert from fixed */
3924 case 0xb3d8: /* MXTR - multiply */
3925 case 0xb3d9: /* DXTR - divide */
3926 case 0xb3dc: /* LXDTR - load lengthened */
3927 case 0xb3df: /* FIXTR - load fp integer */
3928 case 0xb3f9: /* CXGTR - convert from fixed */
3929 case 0xb3fa: /* CXUTR - convert from unsigned packed */
3930 case 0xb3fb: /* CXSTR - convert from signed packed */
3931 case 0xb3fd: /* QAXTR - quantize */
3932 case 0xb3ff: /* RRXTR - reround */
3933 case 0xb959: /* CXFTR - convert from fixed */
3934 case 0xb95a: /* CXLGTR - convert from logical */
3935 case 0xb95b: /* CXLFTR - convert from logical */
3936 /* float pair destination + fpc */
3937 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3938 return -1;
3939 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
3940 return -1;
3941 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3942 return -1;
3943 break;
3944
3945 case 0xb308: /* KEBR - compare and signal */
3946 case 0xb309: /* CEBR - compare */
3947 case 0xb318: /* KDBR - compare and signal */
3948 case 0xb319: /* CDBR - compare */
3949 case 0xb348: /* KXBR - compare and signal */
3950 case 0xb349: /* CXBR - compare */
3951 case 0xb3e0: /* KDTR - compare and signal */
3952 case 0xb3e4: /* CDTR - compare */
3953 case 0xb3e8: /* KXTR - compare and signal */
3954 case 0xb3ec: /* CXTR - compare */
3955 /* flags + fpc only */
3956 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3957 return -1;
3958 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3959 return -1;
3960 break;
3961
3962 case 0xb302: /* LTEBR - load and test */
3963 case 0xb312: /* LTDBR - load and test */
3964 case 0xb30a: /* AEBR - add */
3965 case 0xb30b: /* SEBR - subtract */
3966 case 0xb31a: /* ADBR - add */
3967 case 0xb31b: /* SDBR - subtract */
3968 case 0xb3d2: /* ADTR - add */
3969 case 0xb3d3: /* SDTR - subtract */
3970 case 0xb3d6: /* LTDTR - load and test */
3971 /* float destination + flags + fpc */
3972 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
3973 return -1;
3974 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
3975 return -1;
3976 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3977 return -1;
3978 break;
3979
3980 case 0xb30e: /* MAEBR - multiply and add */
3981 case 0xb30f: /* MSEBR - multiply and subtract */
3982 case 0xb31e: /* MADBR - multiply and add */
3983 case 0xb31f: /* MSDBR - multiply and subtract */
3984 /* float destination [RRD] + fpc */
3985 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
3986 return -1;
3987 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
3988 return -1;
3989 break;
3990
3991 /* 0xb320-0xb323 undefined */
3992 /* 0xb327-0xb32d undefined */
3993
3994 case 0xb32e: /* MAER - multiply and add */
3995 case 0xb32f: /* MSER - multiply and subtract */
3996 case 0xb338: /* MAYLR - multiply and add unnormalized */
3997 case 0xb339: /* MYLR - multiply unnormalized */
3998 case 0xb33c: /* MAYHR - multiply and add unnormalized */
3999 case 0xb33d: /* MYHR - multiply unnormalized */
4000 case 0xb33e: /* MADR - multiply and add */
4001 case 0xb33f: /* MSDR - multiply and subtract */
4002 /* float destination [RRD] */
4003 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4004 return -1;
4005 break;
4006
4007 /* 0xb330-0xb335 undefined */
4008
4009 case 0xb33a: /* MAYR - multiply and add unnormalized */
4010 case 0xb33b: /* MYR - multiply unnormalized */
4011 /* float pair destination [RRD] */
4012 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4013 return -1;
4014 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[4] | 2)))
4015 return -1;
4016 break;
4017
4018 case 0xb340: /* LPXBR - load positive */
4019 case 0xb341: /* LNXBR - load negative */
4020 case 0xb343: /* LCXBR - load complement */
4021 case 0xb360: /* LPXR - load positive */
4022 case 0xb361: /* LNXR - load negative */
4023 case 0xb362: /* LTXR - load and test */
4024 case 0xb363: /* LCXR - load complement */
4025 /* float pair destination + flags */
4026 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4027 return -1;
4028 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4029 return -1;
4030 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4031 return -1;
4032 break;
4033
4034 case 0xb342: /* LTXBR - load and test */
4035 case 0xb34a: /* AXBR - add */
4036 case 0xb34b: /* SXBR - subtract */
4037 case 0xb3da: /* AXTR - add */
4038 case 0xb3db: /* SXTR - subtract */
4039 case 0xb3de: /* LTXTR - load and test */
4040 /* float pair destination + flags + fpc */
4041 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4042 return -1;
4043 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[6] | 2)))
4044 return -1;
4045 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4046 return -1;
4047 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4048 return -1;
4049 break;
4050
4051 /* 0xb34e-0xb34f undefined */
4052 /* 0xb352 undefined */
4053
4054 case 0xb353: /* DIEBR - divide to integer */
4055 case 0xb35b: /* DIDBR - divide to integer */
4056 /* two float destinations + flags + fpc */
4057 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[4]))
4058 return -1;
4059 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[6]))
4060 return -1;
4061 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4062 return -1;
4063 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4064 return -1;
4065 break;
4066
4067 /* 0xb354-0xb356 undefined */
4068 /* 0xb35a undefined */
4069
4070 /* 0xb35c-0xb35e undefined */
4071 /* 0xb364 undefined */
4072 /* 0xb368 undefined */
4073
4074 case 0xb369: /* CXR - compare */
4075 case 0xb3f4: /* CEDTR - compare biased exponent */
4076 case 0xb3fc: /* CEXTR - compare biased exponent */
4077 case 0xb920: /* CGR - compare */
4078 case 0xb921: /* CLGR - compare logical */
4079 case 0xb930: /* CGFR - compare */
4080 case 0xb931: /* CLGFR - compare logical */
4081 case 0xb9cd: /* CHHR - compare high */
4082 case 0xb9cf: /* CLHHR - compare logical high */
4083 case 0xb9dd: /* CHLR - compare high */
4084 case 0xb9df: /* CLHLR - compare logical high */
4085 /* flags only */
4086 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4087 return -1;
4088 break;
4089
4090 /* 0xb36a-0xb36f undefined */
4091 /* 0xb377-0xb37e undefined */
4092 /* 0xb380-0xb383 undefined */
4093 /* 0xb386-0xb38b undefined */
4094 /* 0xb38d-0xb38f undefined */
4095 /* 0xb393 undefined */
4096 /* 0xb397 undefined */
4097
4098 case 0xb398: /* CFEBR - convert to fixed */
4099 case 0xb399: /* CFDBR - convert to fixed */
4100 case 0xb39a: /* CFXBR - convert to fixed */
4101 case 0xb39c: /* CLFEBR - convert to logical */
4102 case 0xb39d: /* CLFDBR - convert to logical */
4103 case 0xb39e: /* CLFXBR - convert to logical */
4104 case 0xb941: /* CFDTR - convert to fixed */
4105 case 0xb949: /* CFXTR - convert to fixed */
4106 case 0xb943: /* CLFDTR - convert to logical */
4107 case 0xb94b: /* CLFXTR - convert to logical */
4108 /* 32-bit gpr destination + flags + fpc */
4109 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4110 return -1;
4111 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4112 return -1;
4113 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4114 return -1;
4115 break;
4116
4117 /* 0xb39b undefined */
4118 /* 0xb39f undefined */
4119
4120 /* 0xb3a3 undefined */
4121 /* 0xb3a7 undefined */
4122
4123 case 0xb3a8: /* CGEBR - convert to fixed */
4124 case 0xb3a9: /* CGDBR - convert to fixed */
4125 case 0xb3aa: /* CGXBR - convert to fixed */
4126 case 0xb3ac: /* CLGEBR - convert to logical */
4127 case 0xb3ad: /* CLGDBR - convert to logical */
4128 case 0xb3ae: /* CLGXBR - convert to logical */
4129 case 0xb3e1: /* CGDTR - convert to fixed */
4130 case 0xb3e9: /* CGXTR - convert to fixed */
4131 case 0xb942: /* CLGDTR - convert to logical */
4132 case 0xb94a: /* CLGXTR - convert to logical */
4133 /* 64-bit gpr destination + flags + fpc */
4134 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4135 return -1;
4136 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4137 return -1;
4138 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4139 return -1;
4140 break;
4141
4142 /* 0xb3ab undefined */
4143 /* 0xb3af-0xb3b3 undefined */
4144 /* 0xb3b7 undefined */
4145
4146 case 0xb3b8: /* CFER - convert to fixed */
4147 case 0xb3b9: /* CFDR - convert to fixed */
4148 case 0xb3ba: /* CFXR - convert to fixed */
4149 case 0xb998: /* ALCR - add logical with carry */
4150 case 0xb999: /* SLBR - subtract logical with borrow */
4151 case 0xb9f4: /* NRK - and */
4152 case 0xb9f5: /* NCRK - and with complement */
4153 case 0xb9f6: /* ORK - or */
4154 case 0xb9f7: /* XRK - xor */
4155 case 0xb9f8: /* ARK - add */
4156 case 0xb9f9: /* SRK - subtract */
4157 case 0xb9fa: /* ALRK - add logical */
4158 case 0xb9fb: /* SLRK - subtract logical */
4159 /* 32-bit gpr destination + flags */
4160 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4161 return -1;
4162 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4163 return -1;
4164 break;
4165
4166 case 0xb3c8: /* CGER - convert to fixed */
4167 case 0xb3c9: /* CGDR - convert to fixed */
4168 case 0xb3ca: /* CGXR - convert to fixed */
4169 case 0xb900: /* LPGR - load positive */
4170 case 0xb901: /* LNGR - load negative */
4171 case 0xb902: /* LTGR - load and test */
4172 case 0xb903: /* LCGR - load complement */
4173 case 0xb908: /* AGR - add */
4174 case 0xb909: /* SGR - subtract */
4175 case 0xb90a: /* ALGR - add logical */
4176 case 0xb90b: /* SLGR - subtract logical */
4177 case 0xb910: /* LPGFR - load positive */
4178 case 0xb911: /* LNGFR - load negative */
4179 case 0xb912: /* LTGFR - load and test */
4180 case 0xb913: /* LCGFR - load complement */
4181 case 0xb918: /* AGFR - add */
4182 case 0xb919: /* SGFR - subtract */
4183 case 0xb91a: /* ALGFR - add logical */
4184 case 0xb91b: /* SLGFR - subtract logical */
4185 case 0xb964: /* NNGRK - and 64 bit */
4186 case 0xb965: /* OCGRK - or with complement 64 bit */
4187 case 0xb966: /* NOGRK - or 64 bit */
4188 case 0xb967: /* NXGRK - not exclusive or 64 bit */
4189 case 0xb974: /* NNRK - and 32 bit */
4190 case 0xb975: /* OCRK - or with complement 32 bit */
4191 case 0xb976: /* NORK - or 32 bit */
4192 case 0xb977: /* NXRK - not exclusive or 32 bit */
4193 case 0xb980: /* NGR - and */
4194 case 0xb981: /* OGR - or */
4195 case 0xb982: /* XGR - xor */
4196 case 0xb988: /* ALCGR - add logical with carry */
4197 case 0xb989: /* SLBGR - subtract logical with borrow */
4198 case 0xb9c0: /* SELFHR - select high */
4199 case 0xb9e1: /* POPCNT - population count */
4200 case 0xb9e4: /* NGRK - and */
4201 case 0xb9e5: /* NCGRK - and with complement */
4202 case 0xb9e6: /* OGRK - or */
4203 case 0xb9e7: /* XGRK - xor */
4204 case 0xb9e8: /* AGRK - add */
4205 case 0xb9e9: /* SGRK - subtract */
4206 case 0xb9ea: /* ALGRK - add logical */
4207 case 0xb9e3: /* SELGR - select 64 bit */
4208 case 0xb9eb: /* SLGRK - subtract logical */
4209 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4210 case 0xb9f0: /* SELR - select 32 bit */
4211 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4212 /* 64-bit gpr destination + flags */
4213 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4214 return -1;
4215 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4216 return -1;
4217 break;
4218
4219 /* 0xb3bb-0xb3c0 undefined */
4220 /* 0xb3c2-0xb3c3 undefined */
4221 /* 0xb3c7 undefined */
4222 /* 0xb3cb-0xb3cc undefined */
4223
4224 case 0xb3cd: /* LGDR - load gr from fpr */
4225 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4226 case 0xb3e3: /* CSDTR - convert to signed packed */
4227 case 0xb3e5: /* EEDTR - extract biased exponent */
4228 case 0xb3e7: /* ESDTR - extract significance */
4229 case 0xb3ed: /* EEXTR - extract biased exponent */
4230 case 0xb3ef: /* ESXTR - extract significance */
4231 case 0xb904: /* LGR - load */
4232 case 0xb906: /* LGBR - load byte */
4233 case 0xb907: /* LGHR - load halfword */
4234 case 0xb90c: /* MSGR - multiply single */
4235 case 0xb90f: /* LRVGR - load reversed */
4236 case 0xb914: /* LGFR - load */
4237 case 0xb916: /* LLGFR - load logical */
4238 case 0xb917: /* LLGTR - load logical thirty one bits */
4239 case 0xb91c: /* MSGFR - multiply single 64<32 */
4240 case 0xb946: /* BCTGR - branch on count */
4241 case 0xb984: /* LLGCR - load logical character */
4242 case 0xb985: /* LLGHR - load logical halfword */
4243 case 0xb9e2: /* LOCGR - load on condition */
4244 /* 64-bit gpr destination */
4245 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4246 return -1;
4247 break;
4248
4249 /* 0xb3ce-0xb3cf undefined */
4250 /* 0xb3e6 undefined */
4251
4252 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4253 case 0xb3eb: /* CSXTR - convert to signed packed */
4254 case 0xb90d: /* DSGR - divide single */
4255 case 0xb91d: /* DSGFR - divide single */
4256 case 0xb986: /* MLGR - multiply logical */
4257 case 0xb987: /* DLGR - divide logical */
4258 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4259 /* 64-bit gpr pair destination */
4260 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4261 return -1;
4262 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4263 return -1;
4264 break;
4265
4266 /* 0xb3ee undefined */
4267 /* 0xb3f0 undefined */
4268 /* 0xb3f8 undefined */
4269
4270 /* 0xb905 privileged */
4271
4272 /* 0xb90e unsupported: EREGG */
4273
4274 /* 0xb915 undefined */
4275
4276 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4277 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4278 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4279 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4280 tmp &= 0xff;
4281 switch (tmp)
4282 {
4283 case 0x00: /* KMAC-Query */
4284 if (record_full_arch_list_add_mem (oaddr, 16))
4285 return -1;
4286 break;
4287
4288 case 0x01: /* KMAC-DEA */
4289 case 0x02: /* KMAC-TDEA-128 */
4290 case 0x03: /* KMAC-TDEA-192 */
4291 case 0x09: /* KMAC-Encrypted-DEA */
4292 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4293 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4294 if (record_full_arch_list_add_mem (oaddr, 8))
4295 return -1;
4296 break;
4297
4298 case 0x12: /* KMAC-AES-128 */
4299 case 0x13: /* KMAC-AES-192 */
4300 case 0x14: /* KMAC-AES-256 */
4301 case 0x1a: /* KMAC-Encrypted-AES-128 */
4302 case 0x1b: /* KMAC-Encrypted-AES-192 */
4303 case 0x1c: /* KMAC-Encrypted-AES-256 */
4304 if (record_full_arch_list_add_mem (oaddr, 16))
4305 return -1;
4306 break;
4307
4308 default:
4309 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4310 (int)tmp, paddress (gdbarch, addr));
4311 return -1;
4312 }
4313 if (tmp != 0)
4314 {
4315 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4316 return -1;
4317 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4318 return -1;
4319 }
4320 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4321 return -1;
4322 break;
4323
4324 /* 0xb922-0xb924 undefined */
4325 /* 0xb925 privileged */
4326 /* 0xb928 privileged */
4327
4328 case 0xb929: /* KMA - cipher message with authentication */
4329 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4330 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4331 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4332 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4333 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4334 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4335 tmp &= 0x7f;
4336 switch (tmp)
4337 {
4338 case 0x00: /* KM*-Query */
4339 if (record_full_arch_list_add_mem (oaddr, 16))
4340 return -1;
4341 break;
4342
4343 case 0x01: /* KM*-DEA */
4344 case 0x02: /* KM*-TDEA-128 */
4345 case 0x03: /* KM*-TDEA-192 */
4346 case 0x09: /* KM*-Encrypted-DEA */
4347 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4348 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4349 if (record_full_arch_list_add_mem (oaddr, 8))
4350 return -1;
4351 break;
4352
4353 case 0x12: /* KM*-AES-128 */
4354 case 0x13: /* KM*-AES-192 */
4355 case 0x14: /* KM*-AES-256 */
4356 case 0x1a: /* KM*-Encrypted-AES-128 */
4357 case 0x1b: /* KM*-Encrypted-AES-192 */
4358 case 0x1c: /* KM*-Encrypted-AES-256 */
4359 if (record_full_arch_list_add_mem (oaddr, 16))
4360 return -1;
4361 break;
4362
4363 case 0x43: /* KMC-PRNG */
4364 /* Only valid for KMC. */
4365 if (insn[0] == 0xb92f)
4366 {
4367 if (record_full_arch_list_add_mem (oaddr, 8))
4368 return -1;
4369 break;
4370 }
4371 /* For other instructions... */
4372 /* Fall through. */
4373 default:
4374 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM* function %02x at %s.\n",
4375 (int)tmp, paddress (gdbarch, addr));
4376 return -1;
4377 }
4378 if (tmp != 0)
4379 {
4380 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4381 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4382 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4383 if (record_full_arch_list_add_mem (oaddr2, tmp))
4384 return -1;
4385 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4386 return -1;
4387 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4388 return -1;
4389 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4390 return -1;
4391 }
4392 if (tmp != 0 && insn[0] == 0xb929)
4393 {
4394 if (record_full_arch_list_add_reg (regcache,
4395 S390_R0_REGNUM + inib[4]))
4396 return -1;
4397 if (record_full_arch_list_add_reg (regcache,
4398 S390_R0_REGNUM + (inib[4] | 1)))
4399 return -1;
4400 }
4401 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4402 return -1;
4403 break;
4404
4405 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4406 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4407 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4408 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4409 tmp &= 0x7f;
4410 switch (tmp)
4411 {
4412 case 0x00: /* PCC-Query */
4413 if (record_full_arch_list_add_mem (oaddr, 16))
4414 return -1;
4415 break;
4416
4417 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4418 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4419 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4420 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4421 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4422 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4423 if (record_full_arch_list_add_mem (oaddr + 0x10, 8))
4424 return -1;
4425 break;
4426
4427 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4428 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4429 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4430 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4431 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4432 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4433 if (record_full_arch_list_add_mem (oaddr + 0x18, 16))
4434 return -1;
4435 break;
4436
4437 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4438 if (record_full_arch_list_add_mem (oaddr + 0x30, 32))
4439 return -1;
4440 break;
4441
4442 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4443 if (record_full_arch_list_add_mem (oaddr + 0x40, 32))
4444 return -1;
4445 break;
4446
4447 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4448 if (record_full_arch_list_add_mem (oaddr + 0x50, 32))
4449 return -1;
4450 break;
4451
4452 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4453 if (record_full_arch_list_add_mem (oaddr + 0x60, 32))
4454 return -1;
4455 break;
4456
4457 default:
4458 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PCC function %02x at %s.\n",
4459 (int)tmp, paddress (gdbarch, addr));
4460 return -1;
4461 }
4462 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4463 return -1;
4464 break;
4465
4466 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4467 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4468 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4469 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4470 tmp &= 0x7f;
4471 switch (tmp)
4472 {
4473 case 0x00: /* KMCTR-Query */
4474 if (record_full_arch_list_add_mem (oaddr, 16))
4475 return -1;
4476 break;
4477
4478 case 0x01: /* KMCTR-DEA */
4479 case 0x02: /* KMCTR-TDEA-128 */
4480 case 0x03: /* KMCTR-TDEA-192 */
4481 case 0x09: /* KMCTR-Encrypted-DEA */
4482 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4483 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4484 case 0x12: /* KMCTR-AES-128 */
4485 case 0x13: /* KMCTR-AES-192 */
4486 case 0x14: /* KMCTR-AES-256 */
4487 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4488 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4489 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4490 break;
4491
4492 default:
4493 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMCTR function %02x at %s.\n",
4494 (int)tmp, paddress (gdbarch, addr));
4495 return -1;
4496 }
4497 if (tmp != 0)
4498 {
4499 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4500 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4501 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4502 if (record_full_arch_list_add_mem (oaddr2, tmp))
4503 return -1;
4504 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4505 return -1;
4506 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4507 return -1;
4508 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4509 return -1;
4510 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[4]))
4511 return -1;
4512 }
4513 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4514 return -1;
4515 break;
4516
4517 case 0xb92e: /* KM - cipher message [partial] */
4518 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4519 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4520 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4521 tmp &= 0x7f;
4522 switch (tmp)
4523 {
4524 case 0x00: /* KM-Query */
4525 if (record_full_arch_list_add_mem (oaddr, 16))
4526 return -1;
4527 break;
4528
4529 case 0x01: /* KM-DEA */
4530 case 0x02: /* KM-TDEA-128 */
4531 case 0x03: /* KM-TDEA-192 */
4532 case 0x09: /* KM-Encrypted-DEA */
4533 case 0x0a: /* KM-Encrypted-TDEA-128 */
4534 case 0x0b: /* KM-Encrypted-TDEA-192 */
4535 case 0x12: /* KM-AES-128 */
4536 case 0x13: /* KM-AES-192 */
4537 case 0x14: /* KM-AES-256 */
4538 case 0x1a: /* KM-Encrypted-AES-128 */
4539 case 0x1b: /* KM-Encrypted-AES-192 */
4540 case 0x1c: /* KM-Encrypted-AES-256 */
4541 break;
4542
4543 case 0x32: /* KM-XTS-AES-128 */
4544 if (record_full_arch_list_add_mem (oaddr + 0x10, 16))
4545 return -1;
4546 break;
4547
4548 case 0x34: /* KM-XTS-AES-256 */
4549 if (record_full_arch_list_add_mem (oaddr + 0x20, 16))
4550 return -1;
4551 break;
4552
4553 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4554 if (record_full_arch_list_add_mem (oaddr + 0x30, 16))
4555 return -1;
4556 break;
4557
4558 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4559 if (record_full_arch_list_add_mem (oaddr + 0x40, 16))
4560 return -1;
4561 break;
4562
4563 default:
4564 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KM function %02x at %s.\n",
4565 (int)tmp, paddress (gdbarch, addr));
4566 return -1;
4567 }
4568 if (tmp != 0)
4569 {
4570 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4571 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4572 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[7] | 1), &tmp);
4573 if (record_full_arch_list_add_mem (oaddr2, tmp))
4574 return -1;
4575 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4576 return -1;
4577 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4578 return -1;
4579 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4580 return -1;
4581 }
4582 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4583 return -1;
4584 break;
4585
4586 /* 0xb932-0xb937 undefined */
4587
4588 /* 0xb938 unsupported: SORTL - sort lists */
4589 /* 0xb939 unsupported: DFLTCC - deflate conversion call */
4590 /* 0xb93a unsupported: KDSA - compute dig. signature auth. */
4591
4592 /* 0xb93b undefined */
4593
4594 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4595 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4596 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4597 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4598 tmp &= 0xff;
4599 switch (tmp)
4600 {
4601 case 0x00: /* PPNO-Query */
4602 case 0x80: /* PPNO-Query */
4603 if (record_full_arch_list_add_mem (oaddr, 16))
4604 return -1;
4605 break;
4606
4607 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4608 if (record_full_arch_list_add_mem (oaddr, 240))
4609 return -1;
4610 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4611 oaddr2 = s390_record_address_mask (gdbarch, regcache, tmp);
4612 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4613 if (record_full_arch_list_add_mem (oaddr2, tmp))
4614 return -1;
4615 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4616 return -1;
4617 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4618 return -1;
4619 break;
4620
4621 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4622 if (record_full_arch_list_add_mem (oaddr, 240))
4623 return -1;
4624 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4625 return -1;
4626 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4627 return -1;
4628 break;
4629
4630 default:
4631 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PPNO function %02x at %s.\n",
4632 (int)tmp, paddress (gdbarch, addr));
4633 return -1;
4634 }
4635 /* DXC may be written */
4636 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
4637 return -1;
4638 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4639 return -1;
4640 break;
4641
4642 /* 0xb93d undefined */
4643
4644 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4645 case 0xb93f: /* KLMD - compute last message digest [partial] */
4646 regcache_raw_read_unsigned (regcache, S390_R1_REGNUM, &tmp);
4647 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4648 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
4649 tmp &= 0xff;
4650 switch (tmp)
4651 {
4652 case 0x00: /* K*MD-Query */
4653 if (record_full_arch_list_add_mem (oaddr, 16))
4654 return -1;
4655 break;
4656
4657 case 0x01: /* K*MD-SHA-1 */
4658 if (record_full_arch_list_add_mem (oaddr, 20))
4659 return -1;
4660 break;
4661
4662 case 0x02: /* K*MD-SHA-256 */
4663 if (record_full_arch_list_add_mem (oaddr, 32))
4664 return -1;
4665 break;
4666
4667 case 0x03: /* K*MD-SHA-512 */
4668 if (record_full_arch_list_add_mem (oaddr, 64))
4669 return -1;
4670 break;
4671
4672 case 0x41: /* KIMD-GHASH */
4673 /* Only valid for KIMD. */
4674 if (insn[0] == 0xb93e)
4675 {
4676 if (record_full_arch_list_add_mem (oaddr, 16))
4677 return -1;
4678 break;
4679 }
4680 /* For KLMD... */
4681 /* Fall through. */
4682 default:
4683 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown KMAC function %02x at %s.\n",
4684 (int)tmp, paddress (gdbarch, addr));
4685 return -1;
4686 }
4687 if (tmp != 0)
4688 {
4689 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4690 return -1;
4691 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[7] | 1)))
4692 return -1;
4693 }
4694 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4695 return -1;
4696 break;
4697
4698 /* 0xb940 undefined */
4699 /* 0xb944-0xb945 undefined */
4700 /* 0xb947-0xb948 undefined */
4701 /* 0xb94c-0xb950 undefined */
4702 /* 0xb954-0xb958 undefined */
4703 /* 0xb95c-0xb95f undefined */
4704 /* 0xb962-0xb971 undefined */
4705 /* 0xb974-0xb97f undefined */
4706
4707 case 0xb983: /* FLOGR - find leftmost one */
4708 /* 64-bit gpr pair destination + flags */
4709 if (s390_record_gpr_g (gdbarch, regcache, inib[6]))
4710 return -1;
4711 if (s390_record_gpr_g (gdbarch, regcache, inib[6] | 1))
4712 return -1;
4713 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4714 return -1;
4715 break;
4716
4717 /* 0xb98a privileged */
4718 /* 0xb98b-0xb98c undefined */
4719
4720 case 0xb98d: /* EPSW - extract psw */
4721 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4722 return -1;
4723 if (inib[7])
4724 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4725 return -1;
4726 break;
4727
4728 /* 0xb98e-0xb98f privileged */
4729
4730 case 0xb990: /* TRTT - translate two to two [partial] */
4731 case 0xb991: /* TRTO - translate two to one [partial] */
4732 case 0xb992: /* TROT - translate one to two [partial] */
4733 case 0xb993: /* TROO - translate one to one [partial] */
4734 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[6], &tmp);
4735 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
4736 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[6] | 1), &tmp);
4737 /* tmp is source length, we want destination length. Adjust. */
4738 if (insn[0] == 0xb991)
4739 tmp >>= 1;
4740 if (insn[0] == 0xb992)
4741 tmp <<= 1;
4742 if (record_full_arch_list_add_mem (oaddr, tmp))
4743 return -1;
4744 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4745 return -1;
4746 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4747 return -1;
4748 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4749 return -1;
4750 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4751 return -1;
4752 break;
4753
4754 case 0xb996: /* MLR - multiply logical */
4755 case 0xb997: /* DLR - divide logical */
4756 /* 32-bit gpr pair destination */
4757 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4758 return -1;
4759 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4760 return -1;
4761 break;
4762
4763 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4764 /* 0xb9b4-0xb9bc undefined */
4765
4766 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4767 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4768 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[6]))
4769 return -1;
4770 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[6] | 1)))
4771 return -1;
4772 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[7]))
4773 return -1;
4774 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4775 return -1;
4776 break;
4777
4778 /* 0xb9c0-0xb9c7 undefined */
4779
4780 case 0xb9c8: /* AHHHR - add high */
4781 case 0xb9c9: /* SHHHR - subtract high */
4782 case 0xb9ca: /* ALHHHR - add logical high */
4783 case 0xb9cb: /* SLHHHR - subtract logical high */
4784 case 0xb9d8: /* AHHLR - add high */
4785 case 0xb9d9: /* SHHLR - subtract high */
4786 case 0xb9da: /* ALHHLR - add logical high */
4787 case 0xb9db: /* SLHHLR - subtract logical high */
4788 /* 32-bit high gpr destination + flags */
4789 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4790 return -1;
4791 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4792 return -1;
4793 break;
4794
4795 /* 0xb9cc undefined */
4796 /* 0xb9ce undefined */
4797 /* 0xb9d0-0xb9d7 undefined */
4798 /* 0xb9dc undefined */
4799 /* 0xb9de undefined */
4800
4801 case 0xb9e0: /* LOCFHR - load high on condition */
4802 /* 32-bit high gpr destination */
4803 if (s390_record_gpr_h (gdbarch, regcache, inib[6]))
4804 return -1;
4805 break;
4806
4807 /* 0xb9e3 undefined */
4808 /* 0xb9e5 undefined */
4809 /* 0xb9ee-0xb9f1 undefined */
4810 /* 0xb9f3 undefined */
4811 /* 0xb9f5 undefined */
4812 /* 0xb9fc undefined */
4813 /* 0xb9fe -0xb9ff undefined */
4814
4815 default:
4816 goto UNKNOWN_OP;
4817 }
4818 break;
4819
4820 /* 0xb4-0xb5 undefined */
4821 /* 0xb6 privileged: STCTL - store control */
4822 /* 0xb7 privileged: LCTL - load control */
4823 /* 0xb8 undefined */
4824
4825 case 0xba: /* CS - compare and swap */
4826 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4827 if (record_full_arch_list_add_mem (oaddr, 4))
4828 return -1;
4829 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4830 return -1;
4831 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4832 return -1;
4833 break;
4834
4835 case 0xbb: /* CDS - compare double and swap */
4836 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4837 if (record_full_arch_list_add_mem (oaddr, 8))
4838 return -1;
4839 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4840 return -1;
4841 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
4842 return -1;
4843 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4844 return -1;
4845 break;
4846
4847 /* 0xbc undefined */
4848
4849 case 0xbe: /* STCM - store characters under mask */
4850 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
4851 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
4852 return -1;
4853 break;
4854
4855 case 0xc0:
4856 case 0xc2:
4857 case 0xc4:
4858 case 0xc6:
4859 case 0xcc:
4860 /* RIL-format instruction */
4861 switch (ibyte[0] << 4 | inib[3])
4862 {
4863 case 0xc00: /* LARL - load address relative long */
4864 case 0xc05: /* BRASL - branch relative and save long */
4865 case 0xc09: /* IILF - insert immediate */
4866 case 0xc21: /* MSFI - multiply single immediate */
4867 case 0xc42: /* LLHRL - load logical halfword relative long */
4868 case 0xc45: /* LHRL - load halfword relative long */
4869 case 0xc4d: /* LRL - load relative long */
4870 /* 32-bit or native gpr destination */
4871 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4872 return -1;
4873 break;
4874
4875 case 0xc01: /* LGFI - load immediate */
4876 case 0xc0e: /* LLIHF - load logical immediate */
4877 case 0xc0f: /* LLILF - load logical immediate */
4878 case 0xc20: /* MSGFI - multiply single immediate */
4879 case 0xc44: /* LGHRL - load halfword relative long */
4880 case 0xc46: /* LLGHRL - load logical halfword relative long */
4881 case 0xc48: /* LGRL - load relative long */
4882 case 0xc4c: /* LGFRL - load relative long */
4883 case 0xc4e: /* LLGFRL - load logical relative long */
4884 /* 64-bit gpr destination */
4885 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4886 return -1;
4887 break;
4888
4889 /* 0xc02-0xc03 undefined */
4890
4891 case 0xc04: /* BRCL - branch relative on condition long */
4892 case 0xc62: /* PFDRL - prefetch data relative long */
4893 break;
4894
4895 case 0xc06: /* XIHF - xor immediate */
4896 case 0xc0a: /* NIHF - and immediate */
4897 case 0xc0c: /* OIHF - or immediate */
4898 case 0xcc8: /* AIH - add immediate high */
4899 case 0xcca: /* ALSIH - add logical with signed immediate high */
4900 /* 32-bit high gpr destination + flags */
4901 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4902 return -1;
4903 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4904 return -1;
4905 break;
4906
4907 case 0xc07: /* XILF - xor immediate */
4908 case 0xc0b: /* NILF - and immediate */
4909 case 0xc0d: /* OILF - or immediate */
4910 case 0xc25: /* SLFI - subtract logical immediate */
4911 case 0xc29: /* AFI - add immediate */
4912 case 0xc2b: /* ALFI - add logical immediate */
4913 /* 32-bit gpr destination + flags */
4914 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
4915 return -1;
4916 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4917 return -1;
4918 break;
4919
4920 case 0xc08: /* IIHF - insert immediate */
4921 case 0xcc6: /* BRCTH - branch relative on count high */
4922 case 0xccb: /* ALSIHN - add logical with signed immediate high */
4923 /* 32-bit high gpr destination */
4924 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
4925 return -1;
4926 break;
4927
4928 /* 0xc22-0xc23 undefined */
4929
4930 case 0xc24: /* SLGFI - subtract logical immediate */
4931 case 0xc28: /* AGFI - add immediate */
4932 case 0xc2a: /* ALGFI - add logical immediate */
4933 /* 64-bit gpr destination + flags */
4934 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
4935 return -1;
4936 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4937 return -1;
4938 break;
4939
4940 /* 0xc26-0xc27 undefined */
4941
4942 case 0xc2c: /* CGFI - compare immediate */
4943 case 0xc2d: /* CFI - compare immediate */
4944 case 0xc2e: /* CLGFI - compare logical immediate */
4945 case 0xc2f: /* CLFI - compare logical immediate */
4946 case 0xc64: /* CGHRL - compare halfword relative long */
4947 case 0xc65: /* CHRL - compare halfword relative long */
4948 case 0xc66: /* CLGHRL - compare logical halfword relative long */
4949 case 0xc67: /* CLHRL - compare logical halfword relative long */
4950 case 0xc68: /* CGRL - compare relative long */
4951 case 0xc6a: /* CLGRL - compare logical relative long */
4952 case 0xc6c: /* CGFRL - compare relative long */
4953 case 0xc6d: /* CRL - compare relative long */
4954 case 0xc6e: /* CLGFRL - compare logical relative long */
4955 case 0xc6f: /* CLRL - compare logical relative long */
4956 case 0xccd: /* CIH - compare immediate high */
4957 case 0xccf: /* CLIH - compare logical immediate high */
4958 /* flags only */
4959 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
4960 return -1;
4961 break;
4962
4963 /* 0xc40-0xc41 undefined */
4964 /* 0xc43 undefined */
4965
4966 case 0xc47: /* STHRL - store halfword relative long */
4967 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4968 if (record_full_arch_list_add_mem (oaddr, 2))
4969 return -1;
4970 break;
4971
4972 /* 0xc49-0xc4a undefined */
4973
4974 case 0xc4b: /* STGRL - store relative long */
4975 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4976 if (record_full_arch_list_add_mem (oaddr, 8))
4977 return -1;
4978 break;
4979
4980 case 0xc4f: /* STRL - store relative long */
4981 oaddr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4982 if (record_full_arch_list_add_mem (oaddr, 4))
4983 return -1;
4984 break;
4985
4986 case 0xc60: /* EXRL - execute relative long */
4987 if (ex != -1)
4988 {
4989 fprintf_unfiltered (gdb_stdlog, "Warning: Double execute at %s.\n",
4990 paddress (gdbarch, addr));
4991 return -1;
4992 }
4993 addr = s390_record_calc_rl (gdbarch, regcache, addr, insn[1], insn[2]);
4994 if (inib[2])
4995 {
4996 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
4997 ex = tmp & 0xff;
4998 }
4999 else
5000 {
5001 ex = 0;
5002 }
5003 goto ex;
5004
5005 /* 0xc61 undefined */
5006 /* 0xc63 undefined */
5007 /* 0xc69 undefined */
5008 /* 0xc6b undefined */
5009 /* 0xcc0-0xcc5 undefined */
5010 /* 0xcc7 undefined */
5011 /* 0xcc9 undefined */
5012 /* 0xccc undefined */
5013 /* 0xcce undefined */
5014
5015 default:
5016 goto UNKNOWN_OP;
5017 }
5018 break;
5019
5020 /* 0xc1 undefined */
5021 /* 0xc3 undefined */
5022
5023 case 0xc5: /* BPRP - branch prediction relative preload */
5024 case 0xc7: /* BPP - branch prediction preload */
5025 /* no visible effect */
5026 break;
5027
5028 case 0xc8:
5029 /* SSF-format instruction */
5030 switch (ibyte[0] << 4 | inib[3])
5031 {
5032 /* 0xc80 unsupported */
5033
5034 case 0xc81: /* ECTG - extract cpu time */
5035 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5036 return -1;
5037 if (s390_record_gpr_g (gdbarch, regcache, 0))
5038 return -1;
5039 if (s390_record_gpr_g (gdbarch, regcache, 1))
5040 return -1;
5041 break;
5042
5043 case 0xc82: /* CSST - compare and swap and store */
5044 {
5045 uint8_t fc, sc;
5046 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
5047 fc = tmp & 0xff;
5048 sc = tmp >> 8 & 0xff;
5049
5050 /* First and third operands. */
5051 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5052 switch (fc)
5053 {
5054 case 0x00: /* 32-bit */
5055 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5056 return -1;
5057 if (record_full_arch_list_add_mem (oaddr, 4))
5058 return -1;
5059 break;
5060
5061 case 0x01: /* 64-bit */
5062 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5063 return -1;
5064 if (record_full_arch_list_add_mem (oaddr, 8))
5065 return -1;
5066 break;
5067
5068 case 0x02: /* 128-bit */
5069 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5070 return -1;
5071 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5072 return -1;
5073 if (record_full_arch_list_add_mem (oaddr, 16))
5074 return -1;
5075 break;
5076
5077 default:
5078 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5079 fc, paddress (gdbarch, addr));
5080 return -1;
5081 }
5082
5083 /* Second operand. */
5084 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
5085 if (sc > 4)
5086 {
5087 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown CSST FC %02x at %s.\n",
5088 sc, paddress (gdbarch, addr));
5089 return -1;
5090 }
5091
5092 if (record_full_arch_list_add_mem (oaddr2, 1 << sc))
5093 return -1;
5094
5095 /* Flags. */
5096 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5097 return -1;
5098 }
5099 break;
5100
5101 /* 0xc83 undefined */
5102
5103 case 0xc84: /* LPD - load pair disjoint */
5104 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5105 return -1;
5106 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5107 return -1;
5108 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5109 return -1;
5110 break;
5111
5112 case 0xc85: /* LPDG - load pair disjoint */
5113 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5114 return -1;
5115 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5116 return -1;
5117 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5118 return -1;
5119 break;
5120
5121 /* 0xc86-0xc8f undefined */
5122
5123 default:
5124 goto UNKNOWN_OP;
5125 }
5126 break;
5127
5128 /* 0xc9-0xcb undefined */
5129 /* 0xcd-0xcf undefined */
5130
5131 case 0xd0: /* TRTR - translate and test reversed */
5132 case 0xdd: /* TRT - translate and test */
5133 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5134 return -1;
5135 if (record_full_arch_list_add_reg (regcache, S390_R2_REGNUM))
5136 return -1;
5137 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5138 return -1;
5139 break;
5140
5141 case 0xd1: /* MVN - move numbers */
5142 case 0xd2: /* MVC - move */
5143 case 0xd3: /* MVZ - move zones */
5144 case 0xdc: /* TR - translate */
5145 case 0xe8: /* MVCIN - move inverse */
5146 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5147 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5148 return -1;
5149 break;
5150
5151 case 0xd4: /* NC - and */
5152 case 0xd6: /* OC - or*/
5153 case 0xd7: /* XC - xor */
5154 case 0xe2: /* UNPKU - unpack unicode */
5155 case 0xea: /* UNPKA - unpack ASCII */
5156 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5157 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5158 return -1;
5159 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5160 return -1;
5161 break;
5162
5163 case 0xde: /* ED - edit */
5164 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5165 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5166 return -1;
5167 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5168 return -1;
5169 /* DXC may be written */
5170 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5171 return -1;
5172 break;
5173
5174 case 0xdf: /* EDMK - edit and mark */
5175 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5176 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
5177 return -1;
5178 if (record_full_arch_list_add_reg (regcache, S390_R1_REGNUM))
5179 return -1;
5180 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5181 return -1;
5182 /* DXC may be written */
5183 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5184 return -1;
5185 break;
5186
5187 /* 0xd8 undefined */
5188 /* 0xd9 unsupported: MVCK - move with key */
5189 /* 0xda unsupported: MVCP - move to primary */
5190 /* 0xdb unsupported: MVCS - move to secondary */
5191 /* 0xe0 undefined */
5192
5193 case 0xe1: /* PKU - pack unicode */
5194 case 0xe9: /* PKA - pack ASCII */
5195 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5196 if (record_full_arch_list_add_mem (oaddr, 16))
5197 return -1;
5198 break;
5199
5200 case 0xe3:
5201 case 0xe6:
5202 case 0xe7:
5203 case 0xeb:
5204 case 0xed:
5205 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5206 switch (ibyte[0] << 8 | ibyte[5])
5207 {
5208 /* 0xe300-0xe301 undefined */
5209
5210 case 0xe302: /* LTG - load and test */
5211 case 0xe308: /* AG - add */
5212 case 0xe309: /* SG - subtract */
5213 case 0xe30a: /* ALG - add logical */
5214 case 0xe30b: /* SLG - subtract logical */
5215 case 0xe318: /* AGF - add */
5216 case 0xe319: /* SGF - subtract */
5217 case 0xe31a: /* ALGF - add logical */
5218 case 0xe31b: /* SLGF - subtract logical */
5219 case 0xe332: /* LTGF - load and test */
5220 case 0xe380: /* NG - and */
5221 case 0xe381: /* OG - or */
5222 case 0xe382: /* XG - xor */
5223 case 0xe388: /* ALCG - add logical with carry */
5224 case 0xe389: /* SLBG - subtract logical with borrow */
5225 case 0xeb0a: /* SRAG - shift right single */
5226 case 0xeb0b: /* SLAG - shift left single */
5227 /* 64-bit gpr destination + flags */
5228 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5229 return -1;
5230 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5231 return -1;
5232 break;
5233
5234 /* 0xe303 privileged */
5235
5236 case 0xe304: /* LG - load */
5237 case 0xe30c: /* MSG - multiply single */
5238 case 0xe30f: /* LRVG - load reversed */
5239 case 0xe314: /* LGF - load */
5240 case 0xe315: /* LGH - load halfword */
5241 case 0xe316: /* LLGF - load logical */
5242 case 0xe317: /* LLGT - load logical thirty one bits */
5243 case 0xe31c: /* MSGF - multiply single */
5244 case 0xe32a: /* LZRG - load and zero rightmost byte */
5245 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5246 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5247 case 0xe346: /* BCTG - branch on count */
5248 case 0xe377: /* LGB - load byte */
5249 case 0xe390: /* LLGC - load logical character */
5250 case 0xe391: /* LLGH - load logical halfword */
5251 case 0xeb0c: /* SRLG - shift right single logical */
5252 case 0xeb0d: /* SLLG - shift left single logical */
5253 case 0xeb1c: /* RLLG - rotate left single logical */
5254 case 0xeb44: /* BXHG - branch on index high */
5255 case 0xeb45: /* BXLEG - branch on index low or equal */
5256 case 0xeb4c: /* ECAG - extract cpu attribute */
5257 case 0xebe2: /* LOCG - load on condition */
5258 /* 64-bit gpr destination */
5259 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5260 return -1;
5261 break;
5262
5263 /* 0xe305 undefined */
5264
5265 case 0xe306: /* CVBY - convert to binary */
5266 /* 32-bit or native gpr destination + FPC (DXC write) */
5267 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5268 return -1;
5269 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5270 return -1;
5271 break;
5272
5273 /* 0xe307 undefined */
5274
5275 case 0xe30d: /* DSG - divide single */
5276 case 0xe31d: /* DSGF - divide single */
5277 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5278 case 0xe386: /* MLG - multiply logical */
5279 case 0xe387: /* DLG - divide logical */
5280 case 0xe38f: /* LPQ - load pair from quadword */
5281 /* 64-bit gpr pair destination */
5282 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5283 return -1;
5284 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
5285 return -1;
5286 break;
5287
5288 case 0xe30e: /* CVBG - convert to binary */
5289 /* 64-bit gpr destination + FPC (DXC write) */
5290 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5291 return -1;
5292 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5293 return -1;
5294 break;
5295
5296 /* 0xe310-0xe311 undefined */
5297
5298 case 0xe312: /* LT - load and test */
5299 case 0xe338: /* AGH - add halfword to 64 bit value */
5300 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5301 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5302 case 0xe354: /* NY - and */
5303 case 0xe356: /* OY - or */
5304 case 0xe357: /* XY - xor */
5305 case 0xe35a: /* AY - add */
5306 case 0xe35b: /* SY - subtract */
5307 case 0xe35e: /* ALY - add logical */
5308 case 0xe35f: /* SLY - subtract logical */
5309 case 0xe37a: /* AHY - add halfword */
5310 case 0xe37b: /* SHY - subtract halfword */
5311 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5312 case 0xe398: /* ALC - add logical with carry */
5313 case 0xe399: /* SLB - subtract logical with borrow */
5314 case 0xe727: /* LCBB - load count to block boundary */
5315 case 0xeb81: /* ICMY - insert characters under mask */
5316 case 0xebdc: /* SRAK - shift left single */
5317 case 0xebdd: /* SLAK - shift left single */
5318 /* 32/64-bit gpr destination + flags */
5319 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5320 return -1;
5321 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5322 return -1;
5323 break;
5324
5325 /* 0xe313 privileged */
5326
5327 case 0xe31e: /* LRV - load reversed */
5328 case 0xe31f: /* LRVH - load reversed */
5329 case 0xe33b: /* LZRF - load and zero rightmost byte */
5330 case 0xe351: /* MSY - multiply single */
5331 case 0xe358: /* LY - load */
5332 case 0xe371: /* LAY - load address */
5333 case 0xe373: /* ICY - insert character */
5334 case 0xe376: /* LB - load byte */
5335 case 0xe378: /* LHY - load */
5336 case 0xe37c: /* MHY - multiply halfword */
5337 case 0xe394: /* LLC - load logical character */
5338 case 0xe395: /* LLH - load logical halfword */
5339 case 0xeb1d: /* RLL - rotate left single logical */
5340 case 0xebde: /* SRLK - shift left single logical */
5341 case 0xebdf: /* SLLK - shift left single logical */
5342 case 0xebf2: /* LOC - load on condition */
5343 /* 32-bit or native gpr destination */
5344 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5345 return -1;
5346 break;
5347
5348 case 0xe320: /* CG - compare */
5349 case 0xe321: /* CLG - compare logical */
5350 case 0xe330: /* CGF - compare */
5351 case 0xe331: /* CLGF - compare logical */
5352 case 0xe334: /* CGH - compare halfword */
5353 case 0xe355: /* CLY - compare logical */
5354 case 0xe359: /* CY - compare */
5355 case 0xe379: /* CHY - compare halfword */
5356 case 0xe3cd: /* CHF - compare high */
5357 case 0xe3cf: /* CLHF - compare logical high */
5358 case 0xeb20: /* CLMH - compare logical under mask high */
5359 case 0xeb21: /* CLMY - compare logical under mask */
5360 case 0xeb51: /* TMY - test under mask */
5361 case 0xeb55: /* CLIY - compare logical */
5362 case 0xebc0: /* TP - test decimal */
5363 case 0xed10: /* TCEB - test data class */
5364 case 0xed11: /* TCDB - test data class */
5365 case 0xed12: /* TCXB - test data class */
5366 case 0xed50: /* TDCET - test data class */
5367 case 0xed51: /* TDGET - test data group */
5368 case 0xed54: /* TDCDT - test data class */
5369 case 0xed55: /* TDGDT - test data group */
5370 case 0xed58: /* TDCXT - test data class */
5371 case 0xed59: /* TDGXT - test data group */
5372 /* flags only */
5373 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5374 return -1;
5375 break;
5376
5377 /* 0xe322-0xe323 undefined */
5378
5379 case 0xe324: /* STG - store */
5380 case 0xe325: /* NTSTG - nontransactional store */
5381 case 0xe326: /* CVDY - convert to decimal */
5382 case 0xe32f: /* STRVG - store reversed */
5383 case 0xebe3: /* STOCG - store on condition */
5384 case 0xed67: /* STDY - store */
5385 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5386 if (record_full_arch_list_add_mem (oaddr, 8))
5387 return -1;
5388 break;
5389
5390 /* 0xe327-0xe329 undefined */
5391 /* 0xe32b-0xe32d undefined */
5392
5393 case 0xe32e: /* CVDG - convert to decimal */
5394 case 0xe38e: /* STPQ - store pair to quadword */
5395 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5396 if (record_full_arch_list_add_mem (oaddr, 16))
5397 return -1;
5398 break;
5399
5400 /* 0xe333 undefined */
5401 /* 0xe335 undefined */
5402
5403 case 0xe336: /* PFD - prefetch data */
5404 break;
5405
5406 /* 0xe337 undefined */
5407 /* 0xe33c-0xe33d undefined */
5408
5409 case 0xe33e: /* STRV - store reversed */
5410 case 0xe350: /* STY - store */
5411 case 0xe3cb: /* STFH - store high */
5412 case 0xebe1: /* STOCFH - store high on condition */
5413 case 0xebf3: /* STOC - store on condition */
5414 case 0xed66: /* STEY - store */
5415 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5416 if (record_full_arch_list_add_mem (oaddr, 4))
5417 return -1;
5418 break;
5419
5420 case 0xe33f: /* STRVH - store reversed */
5421 case 0xe370: /* STHY - store halfword */
5422 case 0xe3c7: /* STHH - store halfword high */
5423 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5424 if (record_full_arch_list_add_mem (oaddr, 2))
5425 return -1;
5426 break;
5427
5428 /* 0xe340-0xe345 undefined */
5429
5430 case 0xe347: /* BIC - branch indirect on condition */
5431 break;
5432
5433 /* 0xe348-0xe34f undefined */
5434 /* 0xe352 undefined */
5435
5436 case 0xe35c: /* MFY - multiply */
5437 case 0xe396: /* ML - multiply logical */
5438 case 0xe397: /* DL - divide logical */
5439 /* 32-bit gpr pair destination */
5440 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5441 return -1;
5442 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5443 return -1;
5444 break;
5445
5446 /* 0xe35d undefined */
5447 /* 0xe360-0xe36f undefined */
5448
5449 case 0xe372: /* STCY - store character */
5450 case 0xe3c3: /* STCH - store character high */
5451 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], ibyte[4]);
5452 if (record_full_arch_list_add_mem (oaddr, 1))
5453 return -1;
5454 break;
5455
5456 /* 0xe374 undefined */
5457
5458 case 0xe375: /* LAEY - load address extended */
5459 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5460 return -1;
5461 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[2]))
5462 return -1;
5463 break;
5464
5465 /* 0xe37d-0xe37f undefined */
5466
5467 case 0xe385: /* LGAT - load and trap */
5468 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5469 case 0xe39d: /* LLGFAT - load logical and trap */
5470 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5471 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5472 case 0xe721: /* VLGV - vector load gr from vr element */
5473 /* 64-bit gpr destination + fpc for possible DXC write */
5474 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5475 return -1;
5476 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5477 return -1;
5478 break;
5479
5480 /* 0xe38a-0xe38d undefined */
5481 /* 0xe392-0xe393 undefined */
5482 /* 0xe39a-0xe39b undefined */
5483 /* 0xe39e undefined */
5484
5485 case 0xe39f: /* LAT - load and trap */
5486 /* 32-bit gpr destination + fpc for possible DXC write */
5487 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5488 return -1;
5489 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5490 return -1;
5491 break;
5492
5493 /* 0xe3a0-0xe3bf undefined */
5494
5495 case 0xe3c0: /* LBH - load byte high */
5496 case 0xe3c2: /* LLCH - load logical character high */
5497 case 0xe3c4: /* LHH - load halfword high */
5498 case 0xe3c6: /* LLHH - load logical halfword high */
5499 case 0xe3ca: /* LFH - load high */
5500 case 0xebe0: /* LOCFH - load high on condition */
5501 /* 32-bit high gpr destination */
5502 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5503 return -1;
5504 break;
5505
5506 /* 0xe3c1 undefined */
5507 /* 0xe3c5 undefined */
5508
5509 case 0xe3c8: /* LFHAT - load high and trap */
5510 /* 32-bit high gpr destination + fpc for possible DXC write */
5511 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
5512 return -1;
5513 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5514 return -1;
5515 break;
5516
5517 /* 0xe3c9 undefined */
5518 /* 0xe3cc undefined */
5519 /* 0xe3ce undefined */
5520 /* 0xe3d0-0xe3ff undefined */
5521
5522 case 0xe601: /* VLEBRH - vector load byte reversed element */
5523 case 0xe602: /* VLEBRG - vector load byte reversed element */
5524 case 0xe603: /* VLEBRF - vector load byte reversed element */
5525 case 0xe604: /* VLLEBRZ - vector load byte rev. el. and zero */
5526 case 0xe605: /* VLBRREP - vector load byte rev. el. and replicate */
5527 case 0xe606: /* VLBR - vector load byte reversed elements */
5528 case 0xe607: /* VLER - vector load elements reversed */
5529 case 0xe634: /* VPKZ - vector pack zoned */
5530 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5531 case 0xe637: /* VLRLR - vector load rightmost with length */
5532 case 0xe649: /* VLIP - vector load immediate decimal */
5533 case 0xe700: /* VLEB - vector load element */
5534 case 0xe701: /* VLEH - vector load element */
5535 case 0xe702: /* VLEG - vector load element */
5536 case 0xe703: /* VLEF - vector load element */
5537 case 0xe704: /* VLLEZ - vector load logical element and zero */
5538 case 0xe705: /* VLREP - vector load and replicate */
5539 case 0xe706: /* VL - vector load */
5540 case 0xe707: /* VLBB - vector load to block boundary */
5541 case 0xe712: /* VGEG - vector gather element */
5542 case 0xe713: /* VGEF - vector gather element */
5543 case 0xe722: /* VLVG - vector load vr element from gr */
5544 case 0xe730: /* VESL - vector element shift left */
5545 case 0xe733: /* VERLL - vector element rotate left logical */
5546 case 0xe737: /* VLL - vector load with length */
5547 case 0xe738: /* VESRL - vector element shift right logical */
5548 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5549 case 0xe740: /* VLEIB - vector load element immediate */
5550 case 0xe741: /* VLEIH - vector load element immediate */
5551 case 0xe742: /* VLEIG - vector load element immediate */
5552 case 0xe743: /* VLEIF - vector load element immediate */
5553 case 0xe744: /* VGBM - vector generate byte mask */
5554 case 0xe745: /* VREPI - vector replicate immediate */
5555 case 0xe746: /* VGM - vector generate mask */
5556 case 0xe74d: /* VREP - vector replicate */
5557 case 0xe750: /* VPOPCT - vector population count */
5558 case 0xe752: /* VCTZ - vector count trailing zeros */
5559 case 0xe753: /* VCLZ - vector count leading zeros */
5560 case 0xe756: /* VLR - vector load */
5561 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5562 case 0xe760: /* VMRL - vector merge low */
5563 case 0xe761: /* VMRH - vector merge high */
5564 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5565 case 0xe764: /* VSUM - vector sum across word */
5566 case 0xe765: /* VSUMG - vector sum across doubleword */
5567 case 0xe766: /* VCKSM - vector checksum */
5568 case 0xe767: /* VSUMQ - vector sum across quadword */
5569 case 0xe768: /* VN - vector and */
5570 case 0xe769: /* VNC - vector and with complement */
5571 case 0xe76a: /* VO - vector or */
5572 case 0xe76b: /* VNO - vector nor */
5573 case 0xe76c: /* VNX - vector not exclusive or */
5574 case 0xe76d: /* VX - vector xor */
5575 case 0xe76e: /* VNN - vector nand */
5576 case 0xe76f: /* VOC - vector or with complement */
5577 case 0xe770: /* VESLV - vector element shift left */
5578 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5579 case 0xe773: /* VERLLV - vector element rotate left logical */
5580 case 0xe774: /* VSL - vector shift left */
5581 case 0xe775: /* VSLB - vector shift left by byte */
5582 case 0xe777: /* VSLDB - vector shift left double by byte */
5583 case 0xe778: /* VESRLV - vector element shift right logical */
5584 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5585 case 0xe77c: /* VSRL - vector shift right logical */
5586 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5587 case 0xe77e: /* VSRA - vector shift right arithmetic */
5588 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5589 case 0xe784: /* VPDI - vector permute doubleword immediate */
5590 case 0xe785: /* VBPERM - vector bit permute */
5591 case 0xe786: /* VSLD - vector shift left double by bit */
5592 case 0xe787: /* VSRD - vector shift right double by bit */
5593 case 0xe78b: /* VSTRS - vector string search */
5594 case 0xe78c: /* VPERM - vector permute */
5595 case 0xe78d: /* VSEL - vector select */
5596 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5597 case 0xe78f: /* VFMA - vector fp multiply and add */
5598 case 0xe794: /* VPK - vector pack */
5599 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5600 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5601 case 0xe7a1: /* VMLH - vector multiply logical high */
5602 case 0xe7a2: /* VML - vector multiply low */
5603 case 0xe7a3: /* VMH - vector multiply high */
5604 case 0xe7a4: /* VMLE - vector multiply logical even */
5605 case 0xe7a5: /* VMLO - vector multiply logical odd */
5606 case 0xe7a6: /* VME - vector multiply even */
5607 case 0xe7a7: /* VMO - vector multiply odd */
5608 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5609 case 0xe7aa: /* VMAL - vector multiply and add low */
5610 case 0xe7ab: /* VMAH - vector multiply and add high */
5611 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5612 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5613 case 0xe7ae: /* VMAE - vector multiply and add even */
5614 case 0xe7af: /* VMAO - vector multiply and add odd */
5615 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5616 case 0xe7b8: /* VMSL - vector multiply sum logical */
5617 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5618 case 0xe7bb: /* VAC - vector add with carry */
5619 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5620 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5621 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5622 case 0xe7c0: /* VCLFP - vector fp convert to logical */
5623 case 0xe7c1: /* VCFPL - vector fp convert from logical */
5624 case 0xe7c2: /* VCSFP - vector fp convert to fixed */
5625 case 0xe7c3: /* VCFPS - vector fp convert from fixed */
5626 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5627 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5628 case 0xe7c7: /* VFI - vector load fp integer */
5629 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5630 case 0xe7ce: /* VFSQ - vector fp square root */
5631 case 0xe7d4: /* VUPLL - vector unpack logical low */
5632 case 0xe7d6: /* VUPL - vector unpack low */
5633 case 0xe7d5: /* VUPLH - vector unpack logical high */
5634 case 0xe7d7: /* VUPH - vector unpack high */
5635 case 0xe7de: /* VLC - vector load complement */
5636 case 0xe7df: /* VLP - vector load positive */
5637 case 0xe7e2: /* VFA - vector fp subtract */
5638 case 0xe7e3: /* VFA - vector fp add */
5639 case 0xe7e5: /* VFD - vector fp divide */
5640 case 0xe7e7: /* VFM - vector fp multiply */
5641 case 0xe7ee: /* VFMIN - vector fp minimum */
5642 case 0xe7ef: /* VFMAX - vector fp maximum */
5643 case 0xe7f0: /* VAVGL - vector average logical */
5644 case 0xe7f1: /* VACC - vector add and compute carry */
5645 case 0xe7f2: /* VAVG - vector average */
5646 case 0xe7f3: /* VA - vector add */
5647 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5648 case 0xe7f7: /* VS - vector subtract */
5649 case 0xe7fc: /* VMNL - vector minimum logical */
5650 case 0xe7fd: /* VMXL - vector maximum logical */
5651 case 0xe7fe: /* VMN - vector minimum */
5652 case 0xe7ff: /* VMX - vector maximum */
5653 /* vector destination + FPC */
5654 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5655 return -1;
5656 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5657 return -1;
5658 break;
5659
5660 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5661 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5662 if (record_full_arch_list_add_mem (oaddr, inib[3] + 1))
5663 return -1;
5664 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5665 return -1;
5666 break;
5667
5668 case 0xe708: /* VSTEB - vector store element */
5669 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5670 if (record_full_arch_list_add_mem (oaddr, 1))
5671 return -1;
5672 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5673 return -1;
5674 break;
5675
5676 case 0xe609: /* VSTEBRH - vector store byte reversed element */
5677 case 0xe709: /* VSTEH - vector store element */
5678 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5679 if (record_full_arch_list_add_mem (oaddr, 2))
5680 return -1;
5681 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5682 return -1;
5683 break;
5684
5685 case 0xe60a: /* VSTEBRG - vector store byte reversed element */
5686 case 0xe70a: /* VSTEG - vector store element */
5687 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5688 if (record_full_arch_list_add_mem (oaddr, 8))
5689 return -1;
5690 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5691 return -1;
5692 break;
5693
5694 case 0xe60b: /* VSTEBRF - vector store byte reversed element */
5695 case 0xe70b: /* VSTEF - vector store element */
5696 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5697 if (record_full_arch_list_add_mem (oaddr, 4))
5698 return -1;
5699 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5700 return -1;
5701 break;
5702
5703 /* 0xe70c-0xe70d undefined */
5704
5705 case 0xe60e: /* VSTBR - vector store byte reversed elements */
5706 case 0xe60f: /* VSTER - vector store elements reversed */
5707 case 0xe70e: /* VST - vector store */
5708 oaddr = s390_record_calc_disp (gdbarch, regcache, inib[3], insn[1], 0);
5709 if (record_full_arch_list_add_mem (oaddr, 16))
5710 return -1;
5711 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5712 return -1;
5713 break;
5714
5715 /* 0xe70f-0xe711 undefined */
5716 /* 0xe714-0xe719 undefined */
5717
5718 case 0xe71a: /* VSCEG - vector scatter element */
5719 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 8, insn[1], 0, &oaddr))
5720 return -1;
5721 if (record_full_arch_list_add_mem (oaddr, 8))
5722 return -1;
5723 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5724 return -1;
5725 break;
5726
5727 case 0xe71b: /* VSCEF - vector scatter element */
5728 if (s390_record_calc_disp_vsce (gdbarch, regcache, ivec[1], inib[8], 4, insn[1], 0, &oaddr))
5729 return -1;
5730 if (record_full_arch_list_add_mem (oaddr, 4))
5731 return -1;
5732 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5733 return -1;
5734 break;
5735
5736 /* 0xe71c-0xe720 undefined */
5737 /* 0xe723-0xe726 undefined */
5738 /* 0xe728-0xe72f undefined */
5739 /* 0xe731-0xe732 undefined */
5740 /* 0xe734-0xe735 undefined */
5741
5742 case 0xe736: /* VLM - vector load multiple */
5743 for (i = ivec[0]; i != ivec[1]; i++, i &= 0x1f)
5744 if (s390_record_vr (gdbarch, regcache, i))
5745 return -1;
5746 if (s390_record_vr (gdbarch, regcache, ivec[1]))
5747 return -1;
5748 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5749 return -1;
5750 break;
5751
5752 /* 0xe739 undefined */
5753 /* 0xe73b-0xe73d undefined */
5754
5755 case 0xe73e: /* VSTM - vector store multiple */
5756 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5757 if (ivec[0] <= ivec[1])
5758 n = ivec[1] - ivec[0] + 1;
5759 else
5760 n = ivec[1] + 0x20 - ivec[0] + 1;
5761 if (record_full_arch_list_add_mem (oaddr, n * 16))
5762 return -1;
5763 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5764 return -1;
5765 break;
5766
5767 case 0xe63c: /* VUPKZ - vector unpack zoned */
5768 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5769 if (record_full_arch_list_add_mem (oaddr, (ibyte[1] + 1) & 31))
5770 return -1;
5771 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5772 return -1;
5773 break;
5774
5775 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5776 case 0xe73f: /* VSTL - vector store with length */
5777 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
5778 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[3], &tmp);
5779 tmp &= 0xffffffffu;
5780 if (tmp > 15)
5781 tmp = 15;
5782 if (record_full_arch_list_add_mem (oaddr, tmp + 1))
5783 return -1;
5784 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5785 return -1;
5786 break;
5787
5788 /* 0xe747-0xe749 undefined */
5789
5790 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5791 case 0xe659: /* VSRP - vector shift and round decimal */
5792 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5793 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5794 case 0xe671: /* VAP - vector add decimal */
5795 case 0xe673: /* VSP - vector subtract decimal */
5796 case 0xe678: /* VMP - vector multiply decimal */
5797 case 0xe679: /* VMSP - vector multiply decimal */
5798 case 0xe67a: /* VDP - vector divide decimal */
5799 case 0xe67b: /* VRP - vector remainder decimal */
5800 case 0xe67e: /* VSDP - vector shift and divide decimal */
5801 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5802 case 0xe75c: /* VISTR - vector isolate string */
5803 case 0xe780: /* VFEE - vector find element equal */
5804 case 0xe781: /* VFENE - vector find element not equal */
5805 case 0xe782: /* VFA - vector find any element equal */
5806 case 0xe78a: /* VSTRC - vector string range compare */
5807 case 0xe795: /* VPKLS - vector pack logical saturate */
5808 case 0xe797: /* VPKS - vector pack saturate */
5809 case 0xe7e8: /* VFCE - vector fp compare equal */
5810 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
5811 case 0xe7eb: /* VFCH - vector fp compare high */
5812 case 0xe7f8: /* VCEQ - vector compare equal */
5813 case 0xe7f9: /* VCHL - vector compare high logical */
5814 case 0xe7fb: /* VCH - vector compare high */
5815 /* vector destination + flags + FPC */
5816 if (s390_record_vr (gdbarch, regcache, ivec[0]))
5817 return -1;
5818 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5819 return -1;
5820 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5821 return -1;
5822 break;
5823
5824 case 0xe65f: /* VTP - vector test decimal */
5825 /* flags + FPC */
5826 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5827 return -1;
5828 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5829 return -1;
5830 break;
5831
5832 /* 0xe74b-0xe74c undefined */
5833 /* 0xe74e-0xe74f undefined */
5834 /* 0xe751 undefined */
5835 /* 0xe754-0xe755 undefined */
5836 /* 0xe757-0xe75b undefined */
5837 /* 0xe75d-0xe75e undefined */
5838 /* 0xe763 undefined */
5839 /* 0xe771 undefined */
5840 /* 0xe776 undefined */
5841 /* 0xe779 undefined */
5842 /* 0xe77b undefined */
5843 /* 0xe783 undefined */
5844 /* 0xe786-0xe789 undefined */
5845 /* 0xe78b undefined */
5846 /* 0xe790-0xe793 undefined */
5847 /* 0xe796 undefined */
5848 /* 0xe798-0xe79d undefined */
5849 /* 0xe7a0 undefined */
5850 /* 0xe7a8 undefined */
5851 /* 0xe7b0-0xe7b3 undefined */
5852 /* 0xe7b5-0xe7b7 undefined */
5853 /* 0xe7ba undefined */
5854 /* 0xe7be undefined */
5855 /* 0xe7c6 undefined */
5856 /* 0xe7c8-0xe7c9 undefined */
5857
5858 case 0xe677: /* VCP - vector compare decimal */
5859 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
5860 case 0xe7cb: /* WFC - vector fp compare scalar */
5861 case 0xe7d8: /* VTM - vector test under mask */
5862 case 0xe7d9: /* VECL - vector element compare logical */
5863 case 0xe7db: /* VEC - vector element compare */
5864 case 0xed08: /* KEB - compare and signal */
5865 case 0xed09: /* CEB - compare */
5866 case 0xed18: /* KDB - compare and signal */
5867 case 0xed19: /* CDB - compare */
5868 /* flags + fpc only */
5869 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5870 return -1;
5871 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5872 return -1;
5873 break;
5874
5875 /* 0xe7cd undefined */
5876 /* 0xe7cf-0xe7d3 undefined */
5877 /* 0xe7da undefined */
5878 /* 0xe7dc-0xe7dd undefined */
5879 /* 0xe7e0-0xe7e1 undefined */
5880 /* 0xe7e4 undefined */
5881 /* 0xe7e6 undefined */
5882 /* 0xe7e9 undefined */
5883 /* 0xe7ec-0xe7ed undefined */
5884 /* 0xe7f4 undefined */
5885 /* 0xe7f6 undefined */
5886 /* 0xe7fa undefined */
5887
5888 /* 0xeb00-0xeb03 undefined */
5889
5890 case 0xeb04: /* LMG - load multiple */
5891 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
5892 if (s390_record_gpr_g (gdbarch, regcache, i))
5893 return -1;
5894 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
5895 return -1;
5896 break;
5897
5898 /* 0xeb05-0xeb09 undefined */
5899 /* 0xeb0e undefined */
5900 /* 0xeb0f privileged: TRACG */
5901 /* 0xeb10-0xeb13 undefined */
5902
5903 case 0xeb14: /* CSY - compare and swap */
5904 case 0xebf4: /* LAN - load and and */
5905 case 0xebf6: /* LAO - load and or */
5906 case 0xebf7: /* LAX - load and xor */
5907 case 0xebf8: /* LAA - load and add */
5908 case 0xebfa: /* LAAL - load and add logical */
5909 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5910 if (record_full_arch_list_add_mem (oaddr, 4))
5911 return -1;
5912 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5913 return -1;
5914 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5915 return -1;
5916 break;
5917
5918 /* 0xeb15-0xeb1b undefined */
5919 /* 0xeb1e-0xeb1f undefined */
5920 /* 0xeb22 undefined */
5921
5922 case 0xeb23: /* CLT - compare logical and trap */
5923 case 0xeb2b: /* CLGT - compare logical and trap */
5924 /* fpc only - including possible DXC write for trapping insns */
5925 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
5926 return -1;
5927 break;
5928
5929 case 0xeb24: /* STMG - store multiple */
5930 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5931 if (inib[2] <= inib[3])
5932 n = inib[3] - inib[2] + 1;
5933 else
5934 n = inib[3] + 0x10 - inib[2] + 1;
5935 if (record_full_arch_list_add_mem (oaddr, n * 8))
5936 return -1;
5937 break;
5938
5939 /* 0xeb25 privileged */
5940
5941 case 0xeb26: /* STMH - store multiple high */
5942 case 0xeb90: /* STMY - store multiple */
5943 case 0xeb9b: /* STAMY - store access multiple */
5944 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5945 if (inib[2] <= inib[3])
5946 n = inib[3] - inib[2] + 1;
5947 else
5948 n = inib[3] + 0x10 - inib[2] + 1;
5949 if (record_full_arch_list_add_mem (oaddr, n * 4))
5950 return -1;
5951 break;
5952
5953 /* 0xeb27-0xeb2a undefined */
5954
5955 case 0xeb2c: /* STCMH - store characters under mask */
5956 case 0xeb2d: /* STCMY - store characters under mask */
5957 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5958 if (record_full_arch_list_add_mem (oaddr, s390_popcnt (inib[3])))
5959 return -1;
5960 break;
5961
5962 /* 0xeb2e undefined */
5963 /* 0xeb2f privileged */
5964
5965 case 0xeb30: /* CSG - compare and swap */
5966 case 0xebe4: /* LANG - load and and */
5967 case 0xebe6: /* LAOG - load and or */
5968 case 0xebe7: /* LAXG - load and xor */
5969 case 0xebe8: /* LAAG - load and add */
5970 case 0xebea: /* LAALG - load and add logical */
5971 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5972 if (record_full_arch_list_add_mem (oaddr, 8))
5973 return -1;
5974 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5975 return -1;
5976 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5977 return -1;
5978 break;
5979
5980 case 0xeb31: /* CDSY - compare double and swap */
5981 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5982 if (record_full_arch_list_add_mem (oaddr, 8))
5983 return -1;
5984 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
5985 return -1;
5986 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
5987 return -1;
5988 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
5989 return -1;
5990 break;
5991
5992 /* 0xeb32-0xeb3d undefined */
5993
5994 case 0xeb3e: /* CDSG - compare double and swap */
5995 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
5996 if (record_full_arch_list_add_mem (oaddr, 16))
5997 return -1;
5998 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
5999 return -1;
6000 if (s390_record_gpr_g (gdbarch, regcache, inib[2] | 1))
6001 return -1;
6002 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6003 return -1;
6004 break;
6005
6006 /* 0xeb3f-0xeb43 undefined */
6007 /* 0xeb46-0xeb4b undefined */
6008 /* 0xeb4d-0xeb50 undefined */
6009
6010 case 0xeb52: /* MVIY - move */
6011 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6012 if (record_full_arch_list_add_mem (oaddr, 1))
6013 return -1;
6014 break;
6015
6016 case 0xeb54: /* NIY - and */
6017 case 0xeb56: /* OIY - or */
6018 case 0xeb57: /* XIY - xor */
6019 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6020 if (record_full_arch_list_add_mem (oaddr, 1))
6021 return -1;
6022 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6023 return -1;
6024 break;
6025
6026 /* 0xeb53 undefined */
6027 /* 0xeb58-0xeb69 undefined */
6028
6029 case 0xeb6a: /* ASI - add immediate */
6030 case 0xeb6e: /* ALSI - add immediate */
6031 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6032 if (record_full_arch_list_add_mem (oaddr, 4))
6033 return -1;
6034 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6035 return -1;
6036 break;
6037
6038 /* 0xeb6b-0xeb6d undefined */
6039 /* 0xeb6f-0xeb79 undefined */
6040
6041 case 0xeb7a: /* AGSI - add immediate */
6042 case 0xeb7e: /* ALGSI - add immediate */
6043 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], ibyte[4]);
6044 if (record_full_arch_list_add_mem (oaddr, 8))
6045 return -1;
6046 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6047 return -1;
6048 break;
6049
6050 /* 0xeb7b-0xeb7d undefined */
6051 /* 0xeb7f undefined */
6052
6053 case 0xeb80: /* ICMH - insert characters under mask */
6054 /* 32-bit high gpr destination + flags */
6055 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6056 return -1;
6057 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6058 return -1;
6059 break;
6060
6061 /* 0xeb82-0xeb8d undefined */
6062
6063 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6064 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + inib[2], &tmp);
6065 oaddr = s390_record_address_mask (gdbarch, regcache, tmp);
6066 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + (inib[2] | 1), &tmp);
6067 if (record_full_arch_list_add_mem (oaddr, tmp))
6068 return -1;
6069 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6070 return -1;
6071 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6072 return -1;
6073 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6074 return -1;
6075 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6076 return -1;
6077 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6078 return -1;
6079 break;
6080
6081 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6082 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6083 return -1;
6084 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[2] | 1)))
6085 return -1;
6086 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6087 return -1;
6088 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + (inib[3] | 1)))
6089 return -1;
6090 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6091 return -1;
6092 break;
6093
6094 /* 0xeb91-0xeb95 undefined */
6095
6096 case 0xeb96: /* LMH - load multiple high */
6097 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6098 if (s390_record_gpr_h (gdbarch, regcache, i))
6099 return -1;
6100 if (s390_record_gpr_h (gdbarch, regcache, inib[3]))
6101 return -1;
6102 break;
6103
6104 /* 0xeb97 undefined */
6105
6106 case 0xeb98: /* LMY - load multiple */
6107 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6108 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + i))
6109 return -1;
6110 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6111 return -1;
6112 break;
6113
6114 /* 0xeb99 undefined */
6115
6116 case 0xeb9a: /* LAMY - load access multiple */
6117 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6118 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + i))
6119 return -1;
6120 if (record_full_arch_list_add_reg (regcache, S390_A0_REGNUM + inib[3]))
6121 return -1;
6122 break;
6123
6124 /* 0xeb9c-0xebbf undefined */
6125 /* 0xebc1-0xebdb undefined */
6126 /* 0xebe5 undefined */
6127 /* 0xebe9 undefined */
6128 /* 0xebeb-0xebf1 undefined */
6129 /* 0xebf5 undefined */
6130 /* 0xebf9 undefined */
6131 /* 0xebfb-0xebff undefined */
6132
6133 /* 0xed00-0xed03 undefined */
6134
6135 case 0xed04: /* LDEB - load lengthened */
6136 case 0xed0c: /* MDEB - multiply */
6137 case 0xed0d: /* DEB - divide */
6138 case 0xed14: /* SQEB - square root */
6139 case 0xed15: /* SQDB - square root */
6140 case 0xed17: /* MEEB - multiply */
6141 case 0xed1c: /* MDB - multiply */
6142 case 0xed1d: /* DDB - divide */
6143 /* float destination + fpc */
6144 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6145 return -1;
6146 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6147 return -1;
6148 break;
6149
6150 case 0xed05: /* LXDB - load lengthened */
6151 case 0xed06: /* LXEB - load lengthened */
6152 case 0xed07: /* MXDB - multiply */
6153 /* float pair destination + fpc */
6154 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6155 return -1;
6156 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6157 return -1;
6158 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6159 return -1;
6160 break;
6161
6162 case 0xed0a: /* AEB - add */
6163 case 0xed0b: /* SEB - subtract */
6164 case 0xed1a: /* ADB - add */
6165 case 0xed1b: /* SDB - subtract */
6166 /* float destination + flags + fpc */
6167 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6168 return -1;
6169 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6170 return -1;
6171 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6172 return -1;
6173 break;
6174
6175 case 0xed0e: /* MAEB - multiply and add */
6176 case 0xed0f: /* MSEB - multiply and subtract */
6177 case 0xed1e: /* MADB - multiply and add */
6178 case 0xed1f: /* MSDB - multiply and subtract */
6179 case 0xed40: /* SLDT - shift significand left */
6180 case 0xed41: /* SRDT - shift significand right */
6181 case 0xedaa: /* CDZT - convert from zoned */
6182 case 0xedae: /* CDPT - convert from packed */
6183 /* float destination [RXF] + fpc */
6184 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6185 return -1;
6186 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6187 return -1;
6188 break;
6189
6190 /* 0xed13 undefined */
6191 /* 0xed16 undefined */
6192 /* 0xed20-0xed23 undefined */
6193
6194 case 0xed24: /* LDE - load lengthened */
6195 case 0xed34: /* SQE - square root */
6196 case 0xed35: /* SQD - square root */
6197 case 0xed37: /* MEE - multiply */
6198 case 0xed64: /* LEY - load */
6199 case 0xed65: /* LDY - load */
6200 /* float destination */
6201 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6202 return -1;
6203 break;
6204
6205 case 0xed25: /* LXD - load lengthened */
6206 case 0xed26: /* LXE - load lengthened */
6207 /* float pair destination */
6208 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[2]))
6209 return -1;
6210 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[2] | 2)))
6211 return -1;
6212 break;
6213
6214 /* 0xed27-0xed2d undefined */
6215
6216 case 0xed2e: /* MAE - multiply and add */
6217 case 0xed2f: /* MSE - multiply and subtract */
6218 case 0xed38: /* MAYL - multiply and add unnormalized */
6219 case 0xed39: /* MYL - multiply unnormalized */
6220 case 0xed3c: /* MAYH - multiply and add unnormalized */
6221 case 0xed3d: /* MYH - multiply unnormalized */
6222 case 0xed3e: /* MAD - multiply and add */
6223 case 0xed3f: /* MSD - multiply and subtract */
6224 /* float destination [RXF] */
6225 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6226 return -1;
6227 break;
6228
6229 /* 0xed30-0xed33 undefined */
6230 /* 0xed36 undefined */
6231
6232 case 0xed3a: /* MAY - multiply and add unnormalized */
6233 case 0xed3b: /* MY - multiply unnormalized */
6234 /* float pair destination [RXF] */
6235 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6236 return -1;
6237 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6238 return -1;
6239 break;
6240
6241 /* 0xed42-0xed47 undefined */
6242
6243 case 0xed48: /* SLXT - shift significand left */
6244 case 0xed49: /* SRXT - shift significand right */
6245 case 0xedab: /* CXZT - convert from zoned */
6246 case 0xedaf: /* CXPT - convert from packed */
6247 /* float pair destination [RXF] + fpc */
6248 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + inib[8]))
6249 return -1;
6250 if (record_full_arch_list_add_reg (regcache, S390_F0_REGNUM + (inib[8] | 2)))
6251 return -1;
6252 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6253 return -1;
6254 break;
6255
6256 /* 0xed4a-0xed4f undefined */
6257 /* 0xed52-0xed53 undefined */
6258 /* 0xed56-0xed57 undefined */
6259 /* 0xed5a-0xed63 undefined */
6260 /* 0xed68-0xeda7 undefined */
6261
6262 case 0xeda8: /* CZDT - convert to zoned */
6263 case 0xeda9: /* CZXT - convert to zoned */
6264 case 0xedac: /* CPDT - convert to packed */
6265 case 0xedad: /* CPXT - convert to packed */
6266 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6267 if (record_full_arch_list_add_mem (oaddr, ibyte[1] + 1))
6268 return -1;
6269 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6270 return -1;
6271 break;
6272
6273 /* 0xedb0-0xedff undefined */
6274
6275 default:
6276 goto UNKNOWN_OP;
6277 }
6278 break;
6279
6280 /* 0xe4 undefined */
6281
6282 case 0xe5:
6283 /* SSE/SIL-format instruction */
6284 switch (insn[0])
6285 {
6286 /* 0xe500-0xe509 undefined, privileged, or unsupported */
6287
6288 case 0xe50a: /* MVCRL - move right to left */
6289 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6290 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6291 if (record_full_arch_list_add_mem (oaddr, (tmp & 0xff) + 1))
6292 return -1;
6293 break;
6294
6295 /* 0xe50b-0xe543 undefined, privileged, or unsupported */
6296
6297 case 0xe544: /* MVHHI - move */
6298 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6299 if (record_full_arch_list_add_mem (oaddr, 2))
6300 return -1;
6301 break;
6302
6303 /* 0xe545-0xe547 undefined */
6304
6305 case 0xe548: /* MVGHI - move */
6306 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6307 if (record_full_arch_list_add_mem (oaddr, 8))
6308 return -1;
6309 break;
6310
6311 /* 0xe549-0xe54b undefined */
6312
6313 case 0xe54c: /* MVHI - move */
6314 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6315 if (record_full_arch_list_add_mem (oaddr, 4))
6316 return -1;
6317 break;
6318
6319 /* 0xe54d-0xe553 undefined */
6320
6321 case 0xe554: /* CHHSI - compare halfword immediate */
6322 case 0xe555: /* CLHHSI - compare logical immediate */
6323 case 0xe558: /* CGHSI - compare halfword immediate */
6324 case 0xe559: /* CLGHSI - compare logical immediate */
6325 case 0xe55c: /* CHSI - compare halfword immediate */
6326 case 0xe55d: /* CLFHSI - compare logical immediate */
6327 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6328 return -1;
6329 break;
6330
6331 /* 0xe556-0xe557 undefined */
6332 /* 0xe55a-0xe55b undefined */
6333 /* 0xe55e-0xe55f undefined */
6334
6335 case 0xe560: /* TBEGIN - transaction begin */
6336 /* The transaction will be immediately aborted after this
6337 instruction, due to single-stepping. This instruction is
6338 only supported so that the program can fail a few times
6339 and go to the non-transactional fallback. */
6340 if (inib[4])
6341 {
6342 /* Transaction diagnostic block - user. */
6343 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6344 if (record_full_arch_list_add_mem (oaddr, 256))
6345 return -1;
6346 }
6347 /* Transaction diagnostic block - supervisor. */
6348 if (record_full_arch_list_add_reg (regcache, S390_TDB_DWORD0_REGNUM))
6349 return -1;
6350 if (record_full_arch_list_add_reg (regcache, S390_TDB_ABORT_CODE_REGNUM))
6351 return -1;
6352 if (record_full_arch_list_add_reg (regcache, S390_TDB_CONFLICT_TOKEN_REGNUM))
6353 return -1;
6354 if (record_full_arch_list_add_reg (regcache, S390_TDB_ATIA_REGNUM))
6355 return -1;
6356 for (i = 0; i < 16; i++)
6357 if (record_full_arch_list_add_reg (regcache, S390_TDB_R0_REGNUM + i))
6358 return -1;
6359 /* And flags. */
6360 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6361 return -1;
6362 break;
6363
6364 /* 0xe561 unsupported: TBEGINC */
6365 /* 0xe562-0xe5ff undefined */
6366
6367 default:
6368 goto UNKNOWN_OP;
6369 }
6370 break;
6371
6372 case 0xec:
6373 /* RIE/RIS/RRS-format instruction */
6374 switch (ibyte[0] << 8 | ibyte[5])
6375 {
6376 /* 0xec00-0xec41 undefined */
6377
6378 case 0xec42: /* LOCHI - load halfword immediate on condition */
6379 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6380 /* 32-bit or native gpr destination */
6381 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6382 return -1;
6383 break;
6384
6385 /* 0xec43 undefined */
6386
6387 case 0xec44: /* BRXHG - branch relative on index high */
6388 case 0xec45: /* BRXLG - branch relative on index low or equal */
6389 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6390 case 0xec59: /* RISBGN - rotate then insert selected bits */
6391 /* 64-bit gpr destination */
6392 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6393 return -1;
6394 break;
6395
6396 /* 0xec47-0xec4d undefined */
6397
6398 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6399 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6400 /* 32-bit high gpr destination */
6401 if (s390_record_gpr_h (gdbarch, regcache, inib[2]))
6402 return -1;
6403 break;
6404
6405 /* 0xec4f-0xec50 undefined */
6406 /* 0xec52-0xec53 undefined */
6407
6408 case 0xec54: /* RNSBG - rotate then and selected bits */
6409 case 0xec55: /* RISBG - rotate then insert selected bits */
6410 case 0xec56: /* ROSBG - rotate then or selected bits */
6411 case 0xec57: /* RXSBG - rotate then xor selected bits */
6412 case 0xecd9: /* AGHIK - add immediate */
6413 case 0xecdb: /* ALGHSIK - add logical immediate */
6414 /* 64-bit gpr destination + flags */
6415 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6416 return -1;
6417 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6418 return -1;
6419 break;
6420
6421 /* 0xec58 undefined */
6422 /* 0xec5a-0xec5c undefined */
6423 /* 0xec5e-0xec63 undefined */
6424
6425 case 0xec64: /* CGRJ - compare and branch relative */
6426 case 0xec65: /* CLGRJ - compare logical and branch relative */
6427 case 0xec76: /* CRJ - compare and branch relative */
6428 case 0xec77: /* CLRJ - compare logical and branch relative */
6429 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6430 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6431 case 0xec7e: /* CIJ - compare immediate and branch relative */
6432 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6433 case 0xece4: /* CGRB - compare and branch */
6434 case 0xece5: /* CLGRB - compare logical and branch */
6435 case 0xecf6: /* CRB - compare and branch */
6436 case 0xecf7: /* CLRB - compare logical and branch */
6437 case 0xecfc: /* CGIB - compare immediate and branch */
6438 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6439 case 0xecfe: /* CIB - compare immediate and branch */
6440 case 0xecff: /* CLIB - compare logical immediate and branch */
6441 break;
6442
6443 /* 0xec66-0xec6f undefined */
6444
6445 case 0xec70: /* CGIT - compare immediate and trap */
6446 case 0xec71: /* CLGIT - compare logical immediate and trap */
6447 case 0xec72: /* CIT - compare immediate and trap */
6448 case 0xec73: /* CLFIT - compare logical immediate and trap */
6449 /* fpc only - including possible DXC write for trapping insns */
6450 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6451 return -1;
6452 break;
6453
6454 /* 0xec74-0xec75 undefined */
6455 /* 0xec78-0xec7b undefined */
6456
6457 /* 0xec80-0xecd7 undefined */
6458
6459 case 0xecd8: /* AHIK - add immediate */
6460 case 0xecda: /* ALHSIK - add logical immediate */
6461 /* 32-bit gpr destination + flags */
6462 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6463 return -1;
6464 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6465 return -1;
6466 break;
6467
6468 /* 0xecdc-0xece3 undefined */
6469 /* 0xece6-0xecf5 undefined */
6470 /* 0xecf8-0xecfb undefined */
6471
6472 default:
6473 goto UNKNOWN_OP;
6474 }
6475 break;
6476
6477 case 0xee: /* PLO - perform locked operation */
6478 regcache_raw_read_unsigned (regcache, S390_R0_REGNUM, &tmp);
6479 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6480 oaddr2 = s390_record_calc_disp (gdbarch, regcache, 0, insn[2], 0);
6481 if (!(tmp & 0x100))
6482 {
6483 uint8_t fc = tmp & 0xff;
6484 gdb_byte buf[8];
6485 switch (fc)
6486 {
6487 case 0x00: /* CL */
6488 /* op1c */
6489 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6490 return -1;
6491 /* op3 */
6492 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6493 return -1;
6494 break;
6495
6496 case 0x01: /* CLG */
6497 /* op1c */
6498 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6499 return -1;
6500 /* op3 */
6501 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6502 return -1;
6503 break;
6504
6505 case 0x02: /* CLGR */
6506 /* op1c */
6507 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6508 return -1;
6509 /* op3 */
6510 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6511 return -1;
6512 break;
6513
6514 case 0x03: /* CLX */
6515 /* op1c */
6516 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6517 return -1;
6518 /* op3 */
6519 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6520 return -1;
6521 break;
6522
6523 case 0x08: /* DCS */
6524 /* op3c */
6525 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[3]))
6526 return -1;
6527 /* fallthru */
6528 case 0x0c: /* CSST */
6529 /* op4 */
6530 if (record_full_arch_list_add_mem (oaddr2, 4))
6531 return -1;
6532 goto CS;
6533
6534 case 0x14: /* CSTST */
6535 /* op8 */
6536 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6537 return -1;
6538 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6539 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6540 if (record_full_arch_list_add_mem (oaddr3, 4))
6541 return -1;
6542 /* fallthru */
6543 case 0x10: /* CSDST */
6544 /* op6 */
6545 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6546 return -1;
6547 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6548 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6549 if (record_full_arch_list_add_mem (oaddr3, 4))
6550 return -1;
6551 /* op4 */
6552 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6553 return -1;
6554 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6555 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6556 if (record_full_arch_list_add_mem (oaddr3, 4))
6557 return -1;
6558 /* fallthru */
6559 case 0x04: /* CS */
6560 CS:
6561 /* op1c */
6562 if (record_full_arch_list_add_reg (regcache, S390_R0_REGNUM + inib[2]))
6563 return -1;
6564 /* op2 */
6565 if (record_full_arch_list_add_mem (oaddr, 4))
6566 return -1;
6567 break;
6568
6569 case 0x09: /* DCSG */
6570 /* op3c */
6571 if (record_full_arch_list_add_mem (oaddr2 + 0x28, 8))
6572 return -1;
6573 goto CSSTG;
6574
6575 case 0x15: /* CSTSTG */
6576 /* op8 */
6577 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6578 return -1;
6579 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6580 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6581 if (record_full_arch_list_add_mem (oaddr3, 8))
6582 return -1;
6583 /* fallthru */
6584 case 0x11: /* CSDSTG */
6585 /* op6 */
6586 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6587 return -1;
6588 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6589 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6590 if (record_full_arch_list_add_mem (oaddr3, 8))
6591 return -1;
6592 /* fallthru */
6593 case 0x0d: /* CSSTG */
6594 CSSTG:
6595 /* op4 */
6596 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6597 return -1;
6598 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6599 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6600 if (record_full_arch_list_add_mem (oaddr3, 8))
6601 return -1;
6602 /* fallthru */
6603 case 0x05: /* CSG */
6604 /* op1c */
6605 if (record_full_arch_list_add_mem (oaddr2 + 0x08, 8))
6606 return -1;
6607 /* op2 */
6608 if (record_full_arch_list_add_mem (oaddr, 8))
6609 return -1;
6610 break;
6611
6612 case 0x0a: /* DCSGR */
6613 /* op3c */
6614 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6615 return -1;
6616 /* fallthru */
6617 case 0x0e: /* CSSTGR */
6618 /* op4 */
6619 if (record_full_arch_list_add_mem (oaddr2, 8))
6620 return -1;
6621 goto CSGR;
6622
6623 case 0x16: /* CSTSTGR */
6624 /* op8 */
6625 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6626 return -1;
6627 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6628 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6629 if (record_full_arch_list_add_mem (oaddr3, 8))
6630 return -1;
6631 /* fallthru */
6632 case 0x12: /* CSDSTGR */
6633 /* op6 */
6634 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6635 return -1;
6636 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6637 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6638 if (record_full_arch_list_add_mem (oaddr3, 8))
6639 return -1;
6640 /* op4 */
6641 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6642 return -1;
6643 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6644 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6645 if (record_full_arch_list_add_mem (oaddr3, 8))
6646 return -1;
6647 /* fallthru */
6648 case 0x06: /* CSGR */
6649 CSGR:
6650 /* op1c */
6651 if (s390_record_gpr_g (gdbarch, regcache, inib[2]))
6652 return -1;
6653 /* op2 */
6654 if (record_full_arch_list_add_mem (oaddr, 8))
6655 return -1;
6656 break;
6657
6658 case 0x0b: /* DCSX */
6659 /* op3c */
6660 if (record_full_arch_list_add_mem (oaddr2 + 0x20, 16))
6661 return -1;
6662 goto CSSTX;
6663
6664 case 0x17: /* CSTSTX */
6665 /* op8 */
6666 if (target_read_memory (oaddr2 + 0x88, buf, 8))
6667 return -1;
6668 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6669 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6670 if (record_full_arch_list_add_mem (oaddr3, 16))
6671 return -1;
6672 /* fallthru */
6673 case 0x13: /* CSDSTX */
6674 /* op6 */
6675 if (target_read_memory (oaddr2 + 0x68, buf, 8))
6676 return -1;
6677 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6678 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6679 if (record_full_arch_list_add_mem (oaddr3, 16))
6680 return -1;
6681 /* fallthru */
6682 case 0x0f: /* CSSTX */
6683 CSSTX:
6684 /* op4 */
6685 if (target_read_memory (oaddr2 + 0x48, buf, 8))
6686 return -1;
6687 oaddr3 = extract_unsigned_integer (buf, 8, byte_order);
6688 oaddr3 = s390_record_address_mask (gdbarch, regcache, oaddr3);
6689 if (record_full_arch_list_add_mem (oaddr3, 16))
6690 return -1;
6691 /* fallthru */
6692 case 0x07: /* CSX */
6693 /* op1c */
6694 if (record_full_arch_list_add_mem (oaddr2 + 0x00, 16))
6695 return -1;
6696 /* op2 */
6697 if (record_full_arch_list_add_mem (oaddr, 16))
6698 return -1;
6699 break;
6700
6701 default:
6702 fprintf_unfiltered (gdb_stdlog, "Warning: Unknown PLO FC %02x at %s.\n",
6703 fc, paddress (gdbarch, addr));
6704 return -1;
6705 }
6706 }
6707 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6708 return -1;
6709 break;
6710
6711 case 0xef: /* LMD - load multiple disjoint */
6712 for (i = inib[2]; i != inib[3]; i++, i &= 0xf)
6713 if (s390_record_gpr_g (gdbarch, regcache, i))
6714 return -1;
6715 if (s390_record_gpr_g (gdbarch, regcache, inib[3]))
6716 return -1;
6717 break;
6718
6719 case 0xf0: /* SRP - shift and round decimal */
6720 case 0xf8: /* ZAP - zero and add */
6721 case 0xfa: /* AP - add decimal */
6722 case 0xfb: /* SP - subtract decimal */
6723 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6724 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6725 return -1;
6726 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6727 return -1;
6728 /* DXC may be written */
6729 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6730 return -1;
6731 break;
6732
6733 case 0xf1: /* MVO - move with offset */
6734 case 0xf2: /* PACK - pack */
6735 case 0xf3: /* UNPK - unpack */
6736 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6737 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6738 return -1;
6739 break;
6740
6741 /* 0xf4-0xf7 undefined */
6742
6743 case 0xf9: /* CP - compare decimal */
6744 if (record_full_arch_list_add_reg (regcache, S390_PSWM_REGNUM))
6745 return -1;
6746 /* DXC may be written */
6747 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6748 return -1;
6749 break;
6750
6751 case 0xfc: /* MP - multiply decimal */
6752 case 0xfd: /* DP - divide decimal */
6753 oaddr = s390_record_calc_disp (gdbarch, regcache, 0, insn[1], 0);
6754 if (record_full_arch_list_add_mem (oaddr, inib[2] + 1))
6755 return -1;
6756 /* DXC may be written */
6757 if (record_full_arch_list_add_reg (regcache, S390_FPC_REGNUM))
6758 return -1;
6759 break;
6760
6761 /* 0xfe-0xff undefined */
6762
6763 default:
6764 UNKNOWN_OP:
6765 fprintf_unfiltered (gdb_stdlog, "Warning: Don't know how to record %04x "
6766 "at %s.\n", insn[0], paddress (gdbarch, addr));
6767 return -1;
6768 }
6769
6770 if (record_full_arch_list_add_reg (regcache, S390_PSWA_REGNUM))
6771 return -1;
6772 if (record_full_arch_list_add_end ())
6773 return -1;
6774 return 0;
6775 }
6776
6777 /* Miscellaneous. */
6778
6779 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
6780 "-mcmodel=large". */
6781
6782 static std::string
6783 s390_gcc_target_options (struct gdbarch *gdbarch)
6784 {
6785 return gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31";
6786 }
6787
6788 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
6789 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
6790 always "s390". Note that an s390x compiler supports "-m31" as
6791 well. */
6792
6793 static const char *
6794 s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
6795 {
6796 return "s390x?";
6797 }
6798
6799 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
6800 gdbarch.h. */
6801
6802 static int
6803 s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
6804 {
6805 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
6806 or indirection. */
6807 || *s == '%' /* Register access. */
6808 || isdigit (*s)); /* Literal number. */
6809 }
6810
6811 /* gdbarch init. */
6812
6813 /* Validate the range of registers. NAMES must be known at compile time. */
6814
6815 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
6816 do \
6817 { \
6818 for (int i = 0; i < ARRAY_SIZE (names); i++) \
6819 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
6820 return false; \
6821 } \
6822 while (0)
6823
6824 /* Validate the target description. Also numbers registers contained in
6825 tdesc. */
6826
6827 static bool
6828 s390_tdesc_valid (struct gdbarch_tdep *tdep,
6829 struct tdesc_arch_data *tdesc_data)
6830 {
6831 static const char *const psw[] = {
6832 "pswm", "pswa"
6833 };
6834 static const char *const gprs[] = {
6835 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
6836 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6837 };
6838 static const char *const fprs[] = {
6839 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
6840 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
6841 };
6842 static const char *const acrs[] = {
6843 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
6844 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
6845 };
6846 static const char *const gprs_lower[] = {
6847 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
6848 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
6849 };
6850 static const char *const gprs_upper[] = {
6851 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
6852 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
6853 };
6854 static const char *const tdb_regs[] = {
6855 "tdb0", "tac", "tct", "atia",
6856 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
6857 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
6858 };
6859 static const char *const vxrs_low[] = {
6860 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
6861 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
6862 };
6863 static const char *const vxrs_high[] = {
6864 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
6865 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
6866 };
6867 static const char *const gs_cb[] = {
6868 "gsd", "gssm", "gsepla",
6869 };
6870 static const char *const gs_bc[] = {
6871 "bc_gsd", "bc_gssm", "bc_gsepla",
6872 };
6873
6874 const struct target_desc *tdesc = tdep->tdesc;
6875 const struct tdesc_feature *feature;
6876
6877 if (!tdesc_has_registers (tdesc))
6878 return false;
6879
6880 /* Core registers, i.e. general purpose and PSW. */
6881 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
6882 if (feature == NULL)
6883 return false;
6884
6885 s390_validate_reg_range (feature, tdesc_data, S390_PSWM_REGNUM, psw);
6886
6887 if (tdesc_unnumbered_register (feature, "r0"))
6888 {
6889 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM, gprs);
6890 }
6891 else
6892 {
6893 tdep->have_upper = true;
6894 s390_validate_reg_range (feature, tdesc_data, S390_R0_REGNUM,
6895 gprs_lower);
6896 s390_validate_reg_range (feature, tdesc_data, S390_R0_UPPER_REGNUM,
6897 gprs_upper);
6898 }
6899
6900 /* Floating point registers. */
6901 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
6902 if (feature == NULL)
6903 return false;
6904
6905 if (!tdesc_numbered_register (feature, tdesc_data, S390_FPC_REGNUM, "fpc"))
6906 return false;
6907
6908 s390_validate_reg_range (feature, tdesc_data, S390_F0_REGNUM, fprs);
6909
6910 /* Access control registers. */
6911 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
6912 if (feature == NULL)
6913 return false;
6914
6915 s390_validate_reg_range (feature, tdesc_data, S390_A0_REGNUM, acrs);
6916
6917 /* Optional GNU/Linux-specific "registers". */
6918 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
6919 if (feature)
6920 {
6921 tdesc_numbered_register (feature, tdesc_data,
6922 S390_ORIG_R2_REGNUM, "orig_r2");
6923
6924 if (tdesc_numbered_register (feature, tdesc_data,
6925 S390_LAST_BREAK_REGNUM, "last_break"))
6926 tdep->have_linux_v1 = true;
6927
6928 if (tdesc_numbered_register (feature, tdesc_data,
6929 S390_SYSTEM_CALL_REGNUM, "system_call"))
6930 tdep->have_linux_v2 = true;
6931
6932 if (tdep->have_linux_v2 && !tdep->have_linux_v1)
6933 return false;
6934 }
6935
6936 /* Transaction diagnostic block. */
6937 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
6938 if (feature)
6939 {
6940 s390_validate_reg_range (feature, tdesc_data, S390_TDB_DWORD0_REGNUM,
6941 tdb_regs);
6942 tdep->have_tdb = true;
6943 }
6944
6945 /* Vector registers. */
6946 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx");
6947 if (feature)
6948 {
6949 s390_validate_reg_range (feature, tdesc_data, S390_V0_LOWER_REGNUM,
6950 vxrs_low);
6951 s390_validate_reg_range (feature, tdesc_data, S390_V16_REGNUM,
6952 vxrs_high);
6953 tdep->have_vx = true;
6954 }
6955
6956 /* Guarded-storage registers. */
6957 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gs");
6958 if (feature)
6959 {
6960 s390_validate_reg_range (feature, tdesc_data, S390_GSD_REGNUM, gs_cb);
6961 tdep->have_gs = true;
6962 }
6963
6964 /* Guarded-storage broadcast control. */
6965 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.gsbc");
6966 if (feature)
6967 {
6968 if (!tdep->have_gs)
6969 return false;
6970 s390_validate_reg_range (feature, tdesc_data, S390_BC_GSD_REGNUM,
6971 gs_bc);
6972 }
6973
6974 return true;
6975 }
6976
6977 /* Allocate and initialize new gdbarch_tdep. Caller is responsible to free
6978 memory after use. */
6979
6980 static struct gdbarch_tdep *
6981 s390_gdbarch_tdep_alloc ()
6982 {
6983 struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
6984
6985 tdep->tdesc = NULL;
6986
6987 tdep->abi = ABI_NONE;
6988 tdep->vector_abi = S390_VECTOR_ABI_NONE;
6989
6990 tdep->gpr_full_regnum = -1;
6991 tdep->v0_full_regnum = -1;
6992 tdep->pc_regnum = -1;
6993 tdep->cc_regnum = -1;
6994
6995 tdep->have_upper = false;
6996 tdep->have_linux_v1 = false;
6997 tdep->have_linux_v2 = false;
6998 tdep->have_tdb = false;
6999 tdep->have_vx = false;
7000 tdep->have_gs = false;
7001
7002 tdep->s390_syscall_record = NULL;
7003
7004 return tdep;
7005 }
7006
7007 /* Set up gdbarch struct. */
7008
7009 static struct gdbarch *
7010 s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
7011 {
7012 const struct target_desc *tdesc = info.target_desc;
7013 int first_pseudo_reg, last_pseudo_reg;
7014 static const char *const stap_register_prefixes[] = { "%", NULL };
7015 static const char *const stap_register_indirection_prefixes[] = { "(",
7016 NULL };
7017 static const char *const stap_register_indirection_suffixes[] = { ")",
7018 NULL };
7019
7020 struct gdbarch_tdep *tdep = s390_gdbarch_tdep_alloc ();
7021 struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
7022 struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
7023 info.tdesc_data = tdesc_data;
7024
7025 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
7026 set_gdbarch_char_signed (gdbarch, 0);
7027
7028 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7029 We can safely let them default to 128-bit, since the debug info
7030 will give the size of type actually used in each case. */
7031 set_gdbarch_long_double_bit (gdbarch, 128);
7032 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
7033
7034 set_gdbarch_type_align (gdbarch, s390_type_align);
7035
7036 /* Breakpoints. */
7037 /* Amount PC must be decremented by after a breakpoint. This is
7038 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
7039 always. */
7040 set_gdbarch_decr_pc_after_break (gdbarch, 2);
7041 set_gdbarch_breakpoint_kind_from_pc (gdbarch, s390_breakpoint::kind_from_pc);
7042 set_gdbarch_sw_breakpoint_from_kind (gdbarch, s390_breakpoint::bp_from_kind);
7043
7044 /* Displaced stepping. */
7045 set_gdbarch_displaced_step_copy_insn (gdbarch,
7046 s390_displaced_step_copy_insn);
7047 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
7048 set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location);
7049 set_gdbarch_displaced_step_hw_singlestep (gdbarch, s390_displaced_step_hw_singlestep);
7050 set_gdbarch_software_single_step (gdbarch, s390_software_single_step);
7051 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
7052
7053 /* Prologue analysis. */
7054 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
7055
7056 /* Register handling. */
7057 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
7058 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
7059 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
7060 set_gdbarch_guess_tracepoint_registers (gdbarch,
7061 s390_guess_tracepoint_registers);
7062 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7063 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
7064 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7065
7066 /* Pseudo registers. */
7067 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
7068 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
7069 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
7070 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
7071 set_tdesc_pseudo_register_reggroup_p (gdbarch,
7072 s390_pseudo_register_reggroup_p);
7073 set_gdbarch_ax_pseudo_register_collect (gdbarch,
7074 s390_ax_pseudo_register_collect);
7075 set_gdbarch_ax_pseudo_register_push_stack
7076 (gdbarch, s390_ax_pseudo_register_push_stack);
7077 set_gdbarch_gen_return_address (gdbarch, s390_gen_return_address);
7078
7079 /* Inferior function calls. */
7080 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
7081 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
7082 set_gdbarch_frame_align (gdbarch, s390_frame_align);
7083 set_gdbarch_return_value (gdbarch, s390_return_value);
7084
7085 /* Frame handling. */
7086 /* Stack grows downward. */
7087 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
7088 set_gdbarch_stack_frame_destroyed_p (gdbarch, s390_stack_frame_destroyed_p);
7089 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7090 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
7091 dwarf2_append_unwinders (gdbarch);
7092 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
7093 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
7094
7095 switch (info.bfd_arch_info->mach)
7096 {
7097 case bfd_mach_s390_31:
7098 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
7099 break;
7100
7101 case bfd_mach_s390_64:
7102 set_gdbarch_long_bit (gdbarch, 64);
7103 set_gdbarch_long_long_bit (gdbarch, 64);
7104 set_gdbarch_ptr_bit (gdbarch, 64);
7105 set_gdbarch_address_class_type_flags (gdbarch,
7106 s390_address_class_type_flags);
7107 set_gdbarch_address_class_type_flags_to_name (gdbarch,
7108 s390_address_class_type_flags_to_name);
7109 set_gdbarch_address_class_name_to_type_flags (gdbarch,
7110 s390_address_class_name_to_type_flags);
7111 break;
7112 }
7113
7114 /* SystemTap functions. */
7115 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
7116 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
7117 stap_register_indirection_prefixes);
7118 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
7119 stap_register_indirection_suffixes);
7120
7121 set_gdbarch_disassembler_options (gdbarch, &s390_disassembler_options);
7122 set_gdbarch_valid_disassembler_options (gdbarch,
7123 disassembler_options_s390 ());
7124
7125 /* Process record-replay */
7126 set_gdbarch_process_record (gdbarch, s390_process_record);
7127
7128 /* Miscellaneous. */
7129 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
7130 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
7131 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
7132
7133 /* Initialize the OSABI. */
7134 gdbarch_init_osabi (info, gdbarch);
7135
7136 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7137 cause GDB to crash with an internal error when the user tries to set
7138 an unsupported OSABI. */
7139 if (!tdesc_has_registers (tdesc))
7140 {
7141 if (info.bfd_arch_info->mach == bfd_mach_s390_31)
7142 tdesc = tdesc_s390_linux32;
7143 else
7144 tdesc = tdesc_s390x_linux64;
7145 }
7146 tdep->tdesc = tdesc;
7147
7148 /* Check any target description for validity. */
7149 if (!s390_tdesc_valid (tdep, tdesc_data))
7150 {
7151 tdesc_data_cleanup (tdesc_data);
7152 xfree (tdep);
7153 gdbarch_free (gdbarch);
7154 return NULL;
7155 }
7156
7157 /* Determine vector ABI. */
7158 #ifdef HAVE_ELF
7159 if (tdep->have_vx
7160 && info.abfd != NULL
7161 && info.abfd->format == bfd_object
7162 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
7163 && bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
7164 Tag_GNU_S390_ABI_Vector) == 2)
7165 tdep->vector_abi = S390_VECTOR_ABI_128;
7166 #endif
7167
7168 /* Find a candidate among extant architectures. */
7169 for (arches = gdbarch_list_lookup_by_info (arches, &info);
7170 arches != NULL;
7171 arches = gdbarch_list_lookup_by_info (arches->next, &info))
7172 {
7173 struct gdbarch_tdep *tmp = gdbarch_tdep (arches->gdbarch);
7174 if (!tmp)
7175 continue;
7176 /* A program can 'choose' not to use the vector registers when they
7177 are present. Leading to the same tdesc but different tdep and
7178 thereby a different gdbarch. */
7179 if (tmp->vector_abi != tdep->vector_abi)
7180 continue;
7181
7182 tdesc_data_cleanup (tdesc_data);
7183 xfree (tdep);
7184 gdbarch_free (gdbarch);
7185 return arches->gdbarch;
7186 }
7187
7188 tdesc_use_registers (gdbarch, tdep->tdesc, tdesc_data);
7189 set_gdbarch_register_name (gdbarch, s390_register_name);
7190
7191 /* Assign pseudo register numbers. */
7192 first_pseudo_reg = gdbarch_num_regs (gdbarch);
7193 last_pseudo_reg = first_pseudo_reg;
7194 if (tdep->have_upper)
7195 {
7196 tdep->gpr_full_regnum = last_pseudo_reg;
7197 last_pseudo_reg += 16;
7198 }
7199 if (tdep->have_vx)
7200 {
7201 tdep->v0_full_regnum = last_pseudo_reg;
7202 last_pseudo_reg += 16;
7203 }
7204 tdep->pc_regnum = last_pseudo_reg++;
7205 tdep->cc_regnum = last_pseudo_reg++;
7206 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
7207 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
7208
7209 /* Frame handling. */
7210 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
7211 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
7212 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
7213 frame_base_set_default (gdbarch, &s390_frame_base);
7214
7215 return gdbarch;
7216 }
7217
7218 void _initialize_s390_tdep ();
7219 void
7220 _initialize_s390_tdep ()
7221 {
7222 /* Hook us into the gdbarch mechanism. */
7223 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7224
7225 initialize_tdesc_s390_linux32 ();
7226 initialize_tdesc_s390x_linux64 ();
7227 }