1 2016-10-17 Nick Clifton <nickc@redhat.com>
3 * elf/common.h (DT_SYMTAB_SHNDX): Define.
4 (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
5 (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
6 (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
7 (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
8 (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
9 (ELFOSABI_OPENVOS): Define.
10 (GRP_MASKOS, GRP_MASKPROC): Define.
12 2016-10-14 Pedro Alves <palves@redhat.com>
14 * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
15 OVERRIDE): Define as empty.
16 [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
18 [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
21 2016-10-14 Pedro Alves <palves@redhat.com>
23 * ansidecl.h (GCC_FINAL): Delete.
24 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
26 2016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
28 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
30 2016-09-29 Alan Modra <amodra@gmail.com>
32 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
34 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
36 * opcode/arc.h (insn_class_t): Add two new classes.
38 2016-09-26 Alan Modra <amodra@gmail.com>
40 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
42 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
44 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
46 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
48 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
49 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
50 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
51 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
53 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
55 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
56 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
57 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
60 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
62 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
63 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
64 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
66 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
68 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
69 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
70 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
72 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
74 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
75 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
76 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
77 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
78 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
79 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
80 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
81 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
82 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
83 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
84 (aarch64_sve_dupm_mov_immediate_p): Declare.
86 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
88 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
89 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
90 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
91 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
92 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
94 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
96 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
97 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
98 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
99 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
100 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
101 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
102 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
103 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
104 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
105 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
106 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
107 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
108 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
109 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
110 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
111 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
114 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
116 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
118 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
119 (aarch64_opnd_info): Make shifter.amount an int64_t and
120 rearrange the fields.
122 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
124 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
125 (AARCH64_OPND_SVE_PRFOP): Likewise.
126 (aarch64_sve_pattern_array): Declare.
127 (aarch64_sve_prfop_array): Likewise.
129 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
131 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
132 (AARCH64_OPND_QLF_P_M): Likewise.
134 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
136 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
137 aarch64_operand_class.
138 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
139 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
140 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
141 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
142 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
143 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
144 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
145 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
147 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
149 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
150 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
152 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
154 * opcode/aarch64.h (F_STRICT): New flag.
156 2016-09-07 Richard Earnshaw <rearnsha@arm.com>
158 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
160 2016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
161 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
162 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
163 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
166 2016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
168 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
169 (ARM_SET_SYM_CMSE_SPCL): Likewise.
171 2016-08-01 Andrew Jenner <andrew@codesourcery.com>
173 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
175 2016-07-29 Aldy Hernandez <aldyh@redhat.com>
177 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
179 2016-07-27 Graham Markall <graham.markall@embecosm.com>
181 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
182 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
184 * opcode/arc.h: Add BMU to insn_class_t enum.
185 * opcode/arc.h: Add PMU to insn_class_t enum.
187 2016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
189 * dis-asm.h: Declare print_arc_disassembler_options.
191 2016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
193 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
194 out_implib_bfd fields.
196 2016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
198 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
200 2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
202 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
203 (SHF_ARM_PURECODE): ... this.
205 2016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
207 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
208 (AARCH64_CPU_HAS_ANY_FEATURES): New.
209 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
210 (AARCH64_OPCODE_HAS_FEATURE): Remove.
212 2016-06-30 Matthew Wahab <matthew.wahab@arm.com>
214 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
215 of enabled FPU features.
217 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
219 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
220 SPARC_OPCODE_ARCH_MAX into the enum.
222 2016-06-28 Richard Sandiford <richard.sandiford@arm.com>
224 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
226 2016-06-28 Maciej W. Rozycki <macro@imgtec.com>
228 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
230 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
232 * elf/xtensa.h (xtensa_make_property_section): New prototype.
234 2016-06-24 John Baldwin <jhb@FreeBSD.org>
236 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
237 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
238 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
239 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
241 2016-06-23 Graham Markall <graham.markall@embecosm.com>
243 * opcode/arc.h: Make insn_class_t alphabetical again.
245 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
247 * elf/dlx.h: Wrap in extern C.
248 * elf/xtensa.h: Likewise.
249 * opcode/arc.h: Likewise.
251 2016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
253 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
256 2016-06-21 Graham Markall <graham.markall@embecosm.com>
258 * opcode/arc.h: Add nps400 extension and instruction
260 Remove ARC_OPCODE_NPS400
261 * elf/arc.h: Remove E_ARC_MACH_NPS400
263 2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
265 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
266 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
267 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
268 SPARC_OPCODE_ARCH_V9M.
270 2016-06-14 John Baldwin <jhb@FreeBSD.org>
272 * opcode/msp430-decode.h (MSP430_Size): Remove.
273 (Msp430_Opcode_Decoded): Change type of size to int.
275 2016-06-11 Alan Modra <amodra@gmail.com>
277 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
279 2016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
281 * opcode/sparc.h: Add missing documentation for hyperprivileged
282 registers in rd (%) and rs1 ($).
284 2016-06-07 Alan Modra <amodra@gmail.com>
286 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
287 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
288 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
289 PPC_APUINFO_VLE: Define.
291 2016-06-07 Matthew Wahab <matthew.wahab@arm.com>
293 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
295 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
297 2016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
299 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
300 (struct arc_long_opcode): New structure.
301 (arc_long_opcodes): Declare.
302 (arc_num_long_opcodes): Declare.
304 2016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
306 * elf/mips.h: Add extern "C".
307 * elf/sh.h: Likewise.
308 * opcode/d10v.h: Likewise.
309 * opcode/d30v.h: Likewise.
310 * opcode/ia64.h: Likewise.
311 * opcode/mips.h: Likewise.
312 * opcode/ppc.h: Likewise.
313 * opcode/sparc.h: Likewise.
314 * opcode/tic6x.h: Likewise.
315 * opcode/v850.h: Likewise.
317 2016-05-28 Alan Modra <amodra@gmail.com>
319 * bfdlink.h (struct bfd_link_callbacks): Update comments.
320 Return void from multiple_definition, multiple_common,
321 add_to_set, constructor, warning, undefined_symbol,
322 reloc_overflow, reloc_dangerous and unattached_reloc.
324 2016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
326 * opcode/metag.h: wrap declarations in extern "C".
328 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
330 * opcode/arc.h (insn_subclass_t): Add COND.
331 (flag_class_t): Add F_CLASS_EXTEND.
333 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
335 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
337 (struct arc_flag_class): Renamed attribute class to flag_class.
339 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
341 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
344 2016-04-29 Tom Tromey <tom@tromey.com>
346 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
347 DW_LANG_Rust_old>: New constants.
349 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
351 * elf/mips.h (AFL_ASE_DSPR3): New macro.
352 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
353 * opcode/mips.h (ASE_DSPR3): New macro.
355 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
356 Nick Clifton <nickc@redhat.com>
358 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
360 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
361 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
362 (ARM_SYM_BRANCH_TYPE): Replace by ...
363 (ARM_GET_SYM_BRANCH_TYPE): This and ...
364 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
365 BFD_ASSERT is defined or not.
367 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
369 * elf/arm.h (Tag_DSP_extension): Define.
371 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
373 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
375 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
377 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
378 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
379 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
380 for the high core bits.
382 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
384 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
385 (ARC_SYNTAX_NOP): Likewsie.
386 (ARC_OP1_MUST_BE_IMM): Update defined value.
387 (ARC_OP1_IMM_IMPLIED): Likewise.
388 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
390 2016-04-28 Nick Clifton <nickc@redhat.com>
393 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
395 2016-04-27 Alan Modra <amodra@gmail.com>
397 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
400 2016-04-21 Nick Clifton <nickc@redhat.com>
402 * bfdlink.h: Add prototype for bfd_link_check_relocs.
404 2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
406 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
408 2016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
410 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
412 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
414 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
416 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
418 * opcode/arc.h (insn_class_t): Add NET and ACL class.
420 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
422 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
423 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
425 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
427 * opcode/arc.h (flag_class_t): Update.
428 (ARC_OPCODE_NONE): Define.
429 (ARC_OPCODE_ARCALL): Likewise.
430 (ARC_OPCODE_ARCFPX): Likewise.
431 (ARC_REGISTER_READONLY): Likewise.
432 (ARC_REGISTER_WRITEONLY): Likewise.
433 (ARC_REGISTER_NOSHORT_CUT): Likewise.
434 (arc_aux_reg): Add cpu.
436 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
438 * opcode/arc.h (arc_num_opcodes): Remove.
439 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
440 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
441 (ARC_SUFFIX_FLAG): Define.
442 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
443 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
444 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
445 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
446 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
447 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
448 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
449 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
450 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
451 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
453 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
455 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
457 (arc_aux_reg): Add new field.
459 2016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
461 * opcode/arc-func.h (replace_bits24): Changed.
462 (replace_bits24_be): Created.
464 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
466 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
467 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
468 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
469 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
470 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
471 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
472 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
473 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
474 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
475 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
476 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
477 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
478 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
479 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
481 2016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
483 * opcode/i960.h: Add const qualifiers.
484 * opcode/tic4x.h (struct tic4x_inst): Likewise.
486 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
488 * opcodes/arc.h (insn_class_t): Add BITOP type.
490 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
492 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
495 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
497 * elf/arc.h (E_ARC_MACH_NPS400): Define.
498 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
500 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
502 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
504 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
506 * elf/arc.h (EF_ARC_MACH): Delete.
507 (EF_ARC_MACH_MSK): Remove out of date comment.
509 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
511 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
513 2016-03-15 H.J. Lu <hongjiu.lu@intel.com>
516 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
518 2016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
519 Andrew Burgess <andrew.burgess@embecosm.com>
521 * elf/arc-reloc.def: Add a call to ME within the formula for each
522 relocation that requires middle-endian correction.
524 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
526 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
527 * opcode/h8300.h (struct h8_opcode): Likewise.
528 * opcode/hppa.h (struct pa_opcode): Likewise.
529 * opcode/msp430.h: Likewise.
530 * opcode/spu.h (struct spu_opcode): Likewise.
531 * opcode/tic30.h (struct _register): Likewise.
532 * opcode/tic4x.h (struct tic4x_register): Likewise.
533 (struct tic4x_cond): Likewise.
534 (struct tic4x_indirect): Likewise.
535 (struct tic4x_inst): Likewise.
536 * opcode/visium.h (struct reg_entry): Likewise.
538 2016-03-04 Matthew Wahab <matthew.wahab@arm.com>
540 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
541 (ARM_CPU_HAS_FEATURE): Add comment.
543 2016-03-03 Than McIntosh <thanm@google.com>
545 * plugin-api.h: Add new hooks to the plugin transfer vector to
546 to support querying section alignment and section size.
547 (ld_plugin_get_input_section_alignment): New hook.
548 (ld_plugin_get_input_section_size): New hook.
549 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
550 and LDPT_GET_INPUT_SECTION_SIZE.
551 (ld_plugin_tv): Add tv_get_input_section_alignment and
552 tv_get_input_section_size.
554 2016-03-03 Evgenii Stepanov <eugenis@google.com>
556 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
558 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
561 * bfdlink.h (bfd_link_elf_stt_common): New enum.
562 (bfd_link_info): Add elf_stt_common.
564 2016-02-26 H.J. Lu <hongjiu.lu@intel.com>
569 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
571 2016-02-19 Matthew Wahab <matthew.wahab@arm.com>
572 Jiong Wang <jiong.wang@arm.com>
574 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
576 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
577 Janek van Oirschot <jvanoirs@synopsys.com>
579 * opcode/arc.h (arc_opcode arc_relax_opcodes)
580 (arc_num_relax_opcodes): Declare.
582 2016-02-09 Nick Clifton <nickc@redhat.com>
584 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
585 * opcode/nds32.h (nds32_r45map): Likewise.
586 (nds32_r54map): Likewise.
587 * opcode/visium.h (gen_reg_table): Likewise.
588 (fp_reg_table, cc_table, opcode_table): Likewise.
590 2016-02-09 Alan Modra <amodra@gmail.com>
593 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
595 2016-02-04 Nick Clifton <nickc@redhat.com>
598 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
599 (RRUX): Synthesise using case 2 rather than 7.
601 2016-01-19 John Baldwin <jhb@FreeBSD.org>
603 * elf/common.h (NT_FREEBSD_THRMISC): Define.
604 (NT_FREEBSD_PROCSTAT_PROC): Define.
605 (NT_FREEBSD_PROCSTAT_FILES): Define.
606 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
607 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
608 (NT_FREEBSD_PROCSTAT_UMASK): Define.
609 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
610 (NT_FREEBSD_PROCSTAT_OSREL): Define.
611 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
612 (NT_FREEBSD_PROCSTAT_AUXV): Define.
614 2016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
615 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
617 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
618 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
619 (ARC_TLS_LE_32): Fixed formula.
620 (ARC_TLS_GD_LD): Use new special function.
621 * opcode/arc-func.h: Changed all the replacement
622 functions to clear the patching bits before doing an or it with the value
625 2016-01-18 Nick Clifton <nickc@redhat.com>
628 * coff/internal.h (internal_syment): Use int to hold section
630 (N_UNDEF): Cast to int not short.
636 2016-01-11 Nick Clifton <nickc@redhat.com>
638 Import this change from GCC mainline:
640 2016-01-07 Mike Frysinger <vapier@gentoo.org>
642 * longlong.h: Change !__SHMEDIA__ to
643 (!defined (__SHMEDIA__) || !__SHMEDIA__).
644 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
646 2016-01-06 Maciej W. Rozycki <macro@imgtec.com>
648 * opcode/mips.h: Add a summary of MIPS16 operand codes.
650 2016-01-05 Mike Frysinger <vapier@gentoo.org>
652 * libiberty.h (dupargv): Change arg to char * const *.
653 (writeargv, countargv): Likewise.
655 2016-01-01 Alan Modra <amodra@gmail.com>
657 Update year range in copyright notice of all files.
659 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
660 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
661 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
662 som/ChangeLog-1015, and vms/ChangeLog-1015
664 Copyright (C) 2016 Free Software Foundation, Inc.
666 Copying and distribution of this file, with or without modification,
667 are permitted in any medium without royalty provided the copyright
668 notice and this notice are preserved.
674 version-control: never