include/ChangeLog

   1 2016-12-20  Andrew Waterman  <andrew@sifive.com>
   2
   3         * elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
   4         (EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
   5         (EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
   6         (EF_RISCV_FLOAT_ABI_QUAD): Define.
   7
   8 2016-12-20  Andrew Waterman  <andrew@sifive.com>
   9             Kuan-Lin Chen  <kuanlinchentw@gmail.com>
  10
  11         * elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
  12
  13 2016-12-16  fincs  <fincs.alt1@gmail.com>
  14
  15         * bfdlink.h (struct bfd_link_info): Add gc_keep_exported.
  16
  17 2016-12-14  Maciej W. Rozycki  <macro@imgtec.com>
  18
  19         * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
  20         typedef as `elf_internal_abiflags_v0'.
  21
  22 2016-12-13 Renlin Li <renlin.li@arm.com>
  23
  24         * opcode/aarch64.h (aarch64_operand_class): Remove
  25         AARCH64_OPND_CLASS_CP_REG.
  26         (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn,
  27         AARCH64_OPND_Cm to AARCH64_OPND_CRm.
  28         (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier.
  29
  30 2016-12-09  Maciej W. Rozycki  <macro@imgtec.com>
  31
  32         * opcode/mips.h: Remove references to `>' operand code.
  33
  34 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  35
  36         * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use.
  37
  38 2016-12-07  Maciej W. Rozycki  <macro@imgtec.com>
  39
  40         * opcode/mips.h (ASE_DSPR3): Add a comment.
  41
  42 2016-12-05  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  43
  44         * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New.
  45         (ARM_ARCH_V8_3A): New.
  46
  47 2016-11-29  Claudiu Zissulescu  <claziss@synopsys.com>
  48
  49         * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE
  50         instruction classes.
  51
  52 2016-11-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
  53
  54         * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and
  55         hwcaps2.
  56
  57 2016-11-22  Alan Modra  <amodra@gmail.com>
  58
  59         PR 20744
  60         * opcode/ppc.h: Define VLE insns using 16A and 16D relocs.
  61
  62 2016-11-03  David Tolnay <dtolnay@gmail.com>
  63             Mark Wielaard  <mark@klomp.org>
  64
  65         * demangle.h (DMGL_RUST): New macro.
  66         (DMGL_STYLE_MASK): Add DMGL_RUST.
  67         (demangling_styles): Add dlang_rust.
  68         (RUST_DEMANGLING_STYLE_STRING): New macro.
  69         (RUST_DEMANGLING): New macro.
  70         (rust_demangle): New prototype.
  71         (rust_is_mangled): Likewise.
  72         (rust_demangle_sym): Likewise.
  73
  74 2016-11-07  Jason Merrill  <jason@redhat.com>
  75
  76         * demangle.h (enum demangle_component_type): Add
  77         DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC.
  78
  79 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  80
  81         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,
  82         AARCH64_OPND_IMM_ROT2, AARCH64_OPND_IMM_ROT3.
  83         (enum aarch64_op): Add OP_FCMLA_ELEM.
  84
  85 2016-11-18  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  86
  87         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_ADDR_SIMM10.
  88         (enum aarch64_insn_class): Add ldst_imm10.
  89
  90 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  91
  92         * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rm_SP.
  93
  94 2016-11-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>
  95
  96         * opcode/aarch64.h (AARCH64_FEATURE_V8_3): Define.
  97         (AARCH64_ARCH_V8_3): Define.
  98         (AARCH64_ARCH_V8_1, AARCH64_ARCH_V8_2): Simplify.
  99
 100 2016-11-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 101
 102         * opcode/arm.h (ARM_AEXT_V8M_MAIN_DSP): Define.
 103         (ARM_AEXT2_V8M_MAIN_DSP): Likewise.
 104         (ARM_ARCH_V8M_MAIN_DSP): Likewise.
 105
 106 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 107
 108         * opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
 109
 110 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
 111
 112         * opcode/arc.h (struct arc_opcode): Change type of opcode and mask
 113         fields.
 114         (struct arc_long_opcode): Delete.
 115         (struct arc_operand): Change types for insert and extract
 116         handlers.
 117
 118 2016-11-03  Andrew Burgess  <andrew.burgess@embecosm.com>
 119
 120         * opcode/arc.h: Make macros 64-bit safe.
 121
 122 2016-11-03  Graham Markall  <graham.markall@embecosm.com>
 123
 124         * opcode/arc.h (arc_opcode_len): Declare.
 125         (ARC_SHORT): Delete.
 126
 127 2016-11-01  Palmer Dabbelt  <palmer@dabbelt.com>
 128             Andrew Waterman <andrew@sifive.com>
 129
 130         Add support for RISC-V architecture.
 131         * dis-asm.h: Add prototypes for print_insn_riscv and
 132         print_riscv_disassembler_options.
 133         * elf/riscv.h: New file.
 134         * opcode/riscv-opc.h: New file.
 135         * opcode/riscv.h: New file.
 136
 137 2016-10-17  Nick Clifton  <nickc@redhat.com>
 138
 139         * elf/common.h (DT_SYMTAB_SHNDX): Define.
 140         (EM_CLOUDSHIELD, EM_COREA_1ST, EM_COREA_2ND, EM_OPEN8): Define.
 141         (EM_VIDEOCORE5, EM_56800EX, EM_BA1, EM_BA2, EM_XCORE): Define.
 142         (EM_MCHP_PIC, EM_KM32, EM_KMX32, EM_KMX16, EM_KMX8): Define.
 143         (EM_KVARC, EM_CDP, EM_COGE, EM_COOL, EM_NORC): Define.
 144         (EM_CSR_KALIMBA, EM_Z80, EM_AMDGPU, EM_RISCV): Define.
 145         (ELFOSABI_OPENVOS): Define.
 146         (GRP_MASKOS, GRP_MASKPROC): Define.
 147
 148 2016-10-14  Pedro Alves  <palves@redhat.com>
 149
 150         * ansidecl.h [__cplusplus >= 201103 && GCC_VERSION < 4007] (FINAL,
 151         OVERRIDE): Define as empty.
 152         [__cplusplus < 201103 && GCC_VERSION < 4007] (FINAL): Define as
 153         __final.
 154         [__cplusplus < 201103 && GCC_VERSION >= 4007] (OVERRIDE): Define as
 155         empty.
 156
 157 2016-10-14  Pedro Alves  <palves@redhat.com>
 158
 159         * ansidecl.h (GCC_FINAL): Delete.
 160         (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
 161
 162 2016-10-14  Claudiu Zissulescu  <claziss@synopsys.com>
 163
 164         * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
 165
 166 2016-09-29  Alan Modra  <amodra@gmail.com>
 167
 168         * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
 169
 170 2016-09-26  Claudiu Zissulescu  <claziss@synopsys.com>
 171
 172         * opcode/arc.h (insn_class_t): Add two new classes.
 173
 174 2016-09-26  Alan Modra  <amodra@gmail.com>
 175
 176         * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
 177
 178 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 179
 180         * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
 181
 182 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 183
 184         * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
 185         (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
 186         (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
 187         (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
 188
 189 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 190
 191         * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
 192         (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
 193         (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
 194         aarch64_insn_classes.
 195
 196 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 197
 198         * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
 199         (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
 200         (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
 201
 202 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 203
 204         * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
 205         (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
 206         (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
 207
 208 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 209
 210         * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
 211         (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
 212         (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
 213         (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
 214         (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
 215         (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
 216         (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
 217         (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
 218         (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
 219         (AARCH64_OPND_SVE_UIMM8_53): Likewise.
 220         (aarch64_sve_dupm_mov_immediate_p): Declare.
 221
 222 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 223
 224         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
 225         (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
 226         (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
 227         (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
 228         (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
 229
 230 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 231
 232         * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
 233         (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
 234         (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
 235         (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
 236         (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
 237         (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
 238         (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
 239         (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
 240         (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
 241         (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
 242         (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
 243         (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
 244         (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
 245         (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
 246         (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
 247         (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
 248         Likewise.
 249
 250 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 251
 252         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
 253         aarch64_opnd.
 254         (AARCH64_MOD_MUL): New aarch64_modifier_kind.
 255         (aarch64_opnd_info): Make shifter.amount an int64_t and
 256         rearrange the fields.
 257
 258 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 259
 260         * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
 261         (AARCH64_OPND_SVE_PRFOP): Likewise.
 262         (aarch64_sve_pattern_array): Declare.
 263         (aarch64_sve_prfop_array): Likewise.
 264
 265 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 266
 267         * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
 268         (AARCH64_OPND_QLF_P_M): Likewise.
 269
 270 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 271
 272         * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
 273         aarch64_operand_class.
 274         (AARCH64_OPND_CLASS_PRED_REG): Likewise.
 275         (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
 276         (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
 277         (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
 278         (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
 279         (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
 280         (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
 281         (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
 282
 283 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 284
 285         * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
 286         (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
 287
 288 2016-09-21  Richard Sandiford  <richard.sandiford@arm.com>
 289
 290         * opcode/aarch64.h (F_STRICT): New flag.
 291
 292 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 293
 294         * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
 295
 296 2016-08-26  Cupertino Miranda  <cmiranda@synopsys.com>
 297         * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
 298         SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
 299         * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
 300         relocation.
 301
 302 2016-08-04  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 303
 304         * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
 305         (ARM_SET_SYM_CMSE_SPCL): Likewise.
 306
 307 2016-08-01  Andrew Jenner  <andrew@codesourcery.com>
 308
 309         * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
 310
 311 2016-07-29  Aldy Hernandez  <aldyh@redhat.com>
 312
 313         * libiberty.h (MAX_ALLOCA_SIZE): New macro.
 314
 315 2016-07-27  Graham Markall  <graham.markall@embecosm.com>
 316
 317         * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
 318         ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
 319         ARC_NUM_ADDRTYPES.
 320         * opcode/arc.h: Add BMU to insn_class_t enum.
 321         * opcode/arc.h: Add PMU to insn_class_t enum.
 322
 323 2016-07-20  Claudiu Zissulescu  <claziss@synopsys.com>
 324
 325         * dis-asm.h: Declare print_arc_disassembler_options.
 326
 327 2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 328
 329         * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
 330         out_implib_bfd fields.
 331
 332 2016-07-14  Claudiu Zissulescu  <claziss@synopsys.com>
 333
 334         * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
 335
 336 2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>
 337
 338         * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
 339         (SHF_ARM_PURECODE): ... this.
 340
 341 2016-07-01  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 342
 343         * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
 344         (AARCH64_CPU_HAS_ANY_FEATURES): New.
 345         (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
 346         (AARCH64_OPCODE_HAS_FEATURE): Remove.
 347
 348 2016-06-30  Matthew Wahab  <matthew.wahab@arm.com>
 349
 350         * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
 351         of enabled FPU features.
 352
 353 2016-06-29  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 354
 355         * opcode/sparc.h (enum sparc_opcode_arch_val): Move
 356         SPARC_OPCODE_ARCH_MAX into the enum.
 357
 358 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
 359
 360         * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
 361
 362 2016-06-28  Maciej W. Rozycki  <macro@imgtec.com>
 363
 364         * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
 365
 366 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 367
 368         * elf/xtensa.h (xtensa_make_property_section): New prototype.
 369
 370 2016-06-24  John Baldwin  <jhb@FreeBSD.org>
 371
 372         * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
 373         (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
 374         (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
 375         (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
 376
 377 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
 378
 379         * opcode/arc.h: Make insn_class_t alphabetical again.
 380
 381 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 382
 383         * elf/dlx.h: Wrap in extern C.
 384         * elf/xtensa.h: Likewise.
 385         * opcode/arc.h: Likewise.
 386
 387 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 388
 389         * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
 390         tilegx_pipeline.
 391
 392 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
 393
 394         * opcode/arc.h: Add nps400 extension and instruction
 395         subclass.
 396         Remove ARC_OPCODE_NPS400
 397         * elf/arc.h: Remove E_ARC_MACH_NPS400
 398
 399 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 400
 401         * opcode/sparc.h (enum sparc_opcode_arch_val): Add
 402         SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
 403         SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
 404         SPARC_OPCODE_ARCH_V9M.
 405
 406 2016-06-14  John Baldwin  <jhb@FreeBSD.org>
 407
 408         * opcode/msp430-decode.h (MSP430_Size): Remove.
 409         (Msp430_Opcode_Decoded): Change type of size to int.
 410
 411 2016-06-11  Alan Modra  <amodra@gmail.com>
 412
 413         * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
 414
 415 2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>
 416
 417         * opcode/sparc.h: Add missing documentation for hyperprivileged
 418         registers in rd (%) and rs1 ($).
 419
 420 2016-06-07  Alan Modra  <amodra@gmail.com>
 421
 422         * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
 423         PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
 424         PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
 425         PPC_APUINFO_VLE: Define.
 426
 427 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 428
 429         * opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
 430         entries.
 431         (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
 432
 433 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 434
 435         * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
 436         (struct arc_long_opcode): New structure.
 437         (arc_long_opcodes): Declare.
 438         (arc_num_long_opcodes): Declare.
 439
 440 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 441
 442         * elf/mips.h: Add extern "C".
 443         * elf/sh.h: Likewise.
 444         * opcode/d10v.h: Likewise.
 445         * opcode/d30v.h: Likewise.
 446         * opcode/ia64.h: Likewise.
 447         * opcode/mips.h: Likewise.
 448         * opcode/ppc.h: Likewise.
 449         * opcode/sparc.h: Likewise.
 450         * opcode/tic6x.h: Likewise.
 451         * opcode/v850.h: Likewise.
 452
 453 2016-05-28  Alan Modra  <amodra@gmail.com>
 454
 455         * bfdlink.h (struct bfd_link_callbacks): Update comments.
 456         Return void from multiple_definition, multiple_common,
 457         add_to_set, constructor, warning, undefined_symbol,
 458         reloc_overflow, reloc_dangerous and unattached_reloc.
 459
 460 2016-05-26  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 461
 462         * opcode/metag.h: wrap declarations in extern "C".
 463
 464 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 465
 466         * opcode/arc.h (insn_subclass_t): Add COND.
 467         (flag_class_t): Add F_CLASS_EXTEND.
 468
 469 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 470
 471         * opcode/arc.h (struct arc_opcode): Renamed attribute class to
 472         insn_class.
 473         (struct arc_flag_class): Renamed attribute class to flag_class.
 474
 475 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 476
 477         * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
 478         plain symbol.
 479
 480 2016-04-29  Tom Tromey  <tom@tromey.com>
 481
 482         * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
 483         DW_LANG_Rust_old>: New constants.
 484
 485 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 486
 487         * elf/mips.h (AFL_ASE_DSPR3): New macro.
 488         (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
 489         * opcode/mips.h (ASE_DSPR3): New macro.
 490
 491 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 492             Nick Clifton  <nickc@redhat.com>
 493
 494         * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
 495         enumerator.
 496         (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
 497         (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
 498         (ARM_SYM_BRANCH_TYPE): Replace by ...
 499         (ARM_GET_SYM_BRANCH_TYPE): This and ...
 500         (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
 501         BFD_ASSERT is defined or not.
 502
 503 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 504
 505         * elf/arm.h (Tag_DSP_extension): Define.
 506
 507 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 508
 509         * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
 510
 511 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 512
 513         * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
 514         (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
 515         (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
 516         for the high core bits.
 517
 518 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 519
 520         * opcode/arc.h (ARC_SYNTAX_1OP): Declare
 521         (ARC_SYNTAX_NOP): Likewsie.
 522         (ARC_OP1_MUST_BE_IMM): Update defined value.
 523         (ARC_OP1_IMM_IMPLIED): Likewise.
 524         (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
 525
 526 2016-04-28  Nick Clifton  <nickc@redhat.com>
 527
 528         PR target/19722
 529         * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
 530
 531 2016-04-27  Alan Modra  <amodra@gmail.com>
 532
 533         * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
 534         undef.  Formatting.
 535
 536 2016-04-21  Nick Clifton  <nickc@redhat.com>
 537
 538         * bfdlink.h: Add prototype for bfd_link_check_relocs.
 539
 540 2016-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 541
 542         * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
 543
 544 2016-04-20  Andrew Burgess  <andrew.burgess@embecosm.com>
 545
 546         * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
 547
 548 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 549
 550         * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
 551
 552 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 553
 554         * opcode/arc.h (insn_class_t): Add NET and ACL class.
 555
 556 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 557
 558         * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
 559         * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
 560
 561 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 562
 563         * opcode/arc.h (flag_class_t): Update.
 564         (ARC_OPCODE_NONE): Define.
 565         (ARC_OPCODE_ARCALL): Likewise.
 566         (ARC_OPCODE_ARCFPX): Likewise.
 567         (ARC_REGISTER_READONLY): Likewise.
 568         (ARC_REGISTER_WRITEONLY): Likewise.
 569         (ARC_REGISTER_NOSHORT_CUT): Likewise.
 570         (arc_aux_reg): Add cpu.
 571
 572 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 573
 574         * opcode/arc.h (arc_num_opcodes): Remove.
 575         (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
 576         (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
 577         (ARC_SUFFIX_FLAG): Define.
 578         (flags_none, flags_f, flags_cc, flags_ccf): Declare.
 579         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 580         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 581         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 582         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 583         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 584         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 585         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 586         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 587         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 588
 589 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 590
 591         * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
 592         (ARC_FPUDA): Define.
 593         (arc_aux_reg): Add new field.
 594
 595 2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>
 596
 597         * opcode/arc-func.h (replace_bits24): Changed.
 598         (replace_bits24_be): Created.
 599
 600 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 601
 602         * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
 603         (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
 604         (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
 605         (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
 606         (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
 607         (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
 608         (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
 609         (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
 610         (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
 611         (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
 612         (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
 613         (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
 614         (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
 615         (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
 616
 617 2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 618
 619         * opcode/i960.h: Add const qualifiers.
 620         * opcode/tic4x.h (struct tic4x_inst): Likewise.
 621
 622 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 623
 624         * opcodes/arc.h (insn_class_t): Add BITOP type.
 625
 626 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 627
 628         * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
 629         new classes instead.
 630
 631 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 632
 633         * elf/arc.h (E_ARC_MACH_NPS400): Define.
 634         * opcode/arc.h (ARC_OPCODE_NPS400): Define.
 635
 636 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 637
 638         * elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
 639
 640 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 641
 642         * elf/arc.h (EF_ARC_MACH): Delete.
 643         (EF_ARC_MACH_MSK): Remove out of date comment.
 644
 645 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 646
 647         * opcode/arc.h (ARC_OPCODE_BASE): Delete.
 648
 649 2016-03-15  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         PR ld/19807
 652         * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
 653
 654 2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
 655             Andrew Burgess  <andrew.burgess@embecosm.com>
 656
 657         * elf/arc-reloc.def: Add a call to ME within the formula for each
 658         relocation that requires middle-endian correction.
 659
 660 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 661
 662         * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
 663         * opcode/h8300.h (struct h8_opcode): Likewise.
 664         * opcode/hppa.h (struct pa_opcode): Likewise.
 665         * opcode/msp430.h: Likewise.
 666         * opcode/spu.h (struct spu_opcode): Likewise.
 667         * opcode/tic30.h (struct _register): Likewise.
 668         * opcode/tic4x.h (struct tic4x_register): Likewise.
 669         (struct tic4x_cond): Likewise.
 670         (struct tic4x_indirect): Likewise.
 671         (struct tic4x_inst): Likewise.
 672         * opcode/visium.h (struct reg_entry): Likewise.
 673
 674 2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>
 675
 676         * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
 677         (ARM_CPU_HAS_FEATURE): Add comment.
 678
 679 2016-03-03  Than McIntosh <thanm@google.com>
 680
 681         * plugin-api.h: Add new hooks to the plugin transfer vector to
 682         to support querying section alignment and section size.
 683         (ld_plugin_get_input_section_alignment): New hook.
 684         (ld_plugin_get_input_section_size): New hook.
 685         (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
 686         and LDPT_GET_INPUT_SECTION_SIZE.
 687         (ld_plugin_tv): Add tv_get_input_section_alignment and
 688         tv_get_input_section_size.
 689
 690 2016-03-03  Evgenii Stepanov  <eugenis@google.com>
 691
 692         * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
 693
 694 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 695
 696         PR ld/19645
 697         * bfdlink.h (bfd_link_elf_stt_common): New enum.
 698         (bfd_link_info): Add elf_stt_common.
 699
 700 2016-02-26  H.J. Lu  <hongjiu.lu@intel.com>
 701
 702         PR ld/19636
 703         PR ld/19704
 704         PR ld/19719
 705         * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
 706
 707 2016-02-19  Matthew Wahab  <matthew.wahab@arm.com>
 708             Jiong Wang  <jiong.wang@arm.com>
 709
 710         * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
 711
 712 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 713             Janek van Oirschot  <jvanoirs@synopsys.com>
 714
 715         * opcode/arc.h (arc_opcode arc_relax_opcodes)
 716         (arc_num_relax_opcodes): Declare.
 717
 718 2016-02-09  Nick Clifton  <nickc@redhat.com>
 719
 720         * opcode/metag.h (metag_scondtab): Mark as possibly unused.
 721         * opcode/nds32.h (nds32_r45map): Likewise.
 722         (nds32_r54map): Likewise.
 723         * opcode/visium.h (gen_reg_table): Likewise.
 724         (fp_reg_table, cc_table, opcode_table): Likewise.
 725
 726 2016-02-09  Alan Modra  <amodra@gmail.com>
 727
 728         PR 16583
 729         * elf/common.h (AT_SUN_HWCAP): Undef before defining.
 730
 731 2016-02-04  Nick Clifton  <nickc@redhat.com>
 732
 733         PR target/19561
 734         * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
 735         (RRUX): Synthesise using case 2 rather than 7.
 736
 737 2016-01-19  John Baldwin  <jhb@FreeBSD.org>
 738
 739         * elf/common.h (NT_FREEBSD_THRMISC): Define.
 740         (NT_FREEBSD_PROCSTAT_PROC): Define.
 741         (NT_FREEBSD_PROCSTAT_FILES): Define.
 742         (NT_FREEBSD_PROCSTAT_VMMAP): Define.
 743         (NT_FREEBSD_PROCSTAT_GROUPS): Define.
 744         (NT_FREEBSD_PROCSTAT_UMASK): Define.
 745         (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
 746         (NT_FREEBSD_PROCSTAT_OSREL): Define.
 747         (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
 748         (NT_FREEBSD_PROCSTAT_AUXV): Define.
 749
 750 2016-01-18  Miranda Cupertino  <Cupertino.Miranda@synopsys.com>
 751             Zissulescu Claudiu  <Claudiu.Zissulescu@synopsys.com>
 752
 753         * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
 754         (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
 755         (ARC_TLS_LE_32): Fixed formula.
 756         (ARC_TLS_GD_LD): Use new special function.
 757         * opcode/arc-func.h: Changed all the replacement
 758         functions to clear the patching bits before doing an or it with the value
 759         argument.
 760
 761 2016-01-18  Nick Clifton  <nickc@redhat.com>
 762
 763         PR ld/19440
 764         * coff/internal.h (internal_syment): Use int to hold section
 765         number.
 766         (N_UNDEF): Cast to int not short.
 767         (N_ABS): Likewise.
 768         (N_DEBUG): Likewise.
 769         (N_TV): Likewise.
 770         (P_TV): Likewise.
 771
 772 2016-01-11  Nick Clifton  <nickc@redhat.com>
 773
 774         Import this change from GCC mainline:
 775
 776         2016-01-07  Mike Frysinger  <vapier@gentoo.org>
 777
 778         * longlong.h: Change !__SHMEDIA__ to
 779         (!defined (__SHMEDIA__) || !__SHMEDIA__).
 780         Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
 781
 782 2016-01-06  Maciej W. Rozycki  <macro@imgtec.com>
 783
 784         * opcode/mips.h: Add a summary of MIPS16 operand codes.
 785
 786 2016-01-05  Mike Frysinger  <vapier@gentoo.org>
 787
 788         * libiberty.h (dupargv): Change arg to char * const *.
 789         (writeargv, countargv): Likewise.
 790
 791 2016-01-01  Alan Modra  <amodra@gmail.com>
 792
 793         Update year range in copyright notice of all files.
 794
 795 For older changes see ChangeLog-0415, aout/ChangeLog-9115,
 796 cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
 797 mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
 798 som/ChangeLog-1015, and vms/ChangeLog-1015
 799 \f
 800 Copyright (C) 2016 Free Software Foundation, Inc.
 801
 802 Copying and distribution of this file, with or without modification,
 803 are permitted in any medium without royalty provided the copyright
 804 notice and this notice are preserved.
 805
 806 Local Variables:
 807 mode: change-log
 808 left-margin: 8
 809 fill-column: 74
 810 version-control: never
 811 End: