include/elf/mips.h

   1 /* MIPS ELF support for BFD.
   2    Copyright (C) 1993-2018 Free Software Foundation, Inc.
   3
   4    By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
   5    information in the System V Application Binary Interface, MIPS
   6    Processor Supplement.
   7
   8    This file is part of BFD, the Binary File Descriptor library.
   9
  10    This program is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 3 of the License, or
  13    (at your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful,
  16    but WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18    GNU General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  23    MA 02110-1301, USA.  */
  24
  25 /* This file holds definitions specific to the MIPS ELF ABI.  Note
  26    that most of this is not actually implemented by BFD.  */
  27
  28 #ifndef _ELF_MIPS_H
  29 #define _ELF_MIPS_H
  30
  31 #include "elf/reloc-macros.h"
  32
  33 #ifdef __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 /* Relocation types.  */
  38 START_RELOC_NUMBERS (elf_mips_reloc_type)
  39   RELOC_NUMBER (R_MIPS_NONE, 0)
  40   RELOC_NUMBER (R_MIPS_16, 1)
  41   RELOC_NUMBER (R_MIPS_32, 2)           /* In Elf 64: alias R_MIPS_ADD */
  42   RELOC_NUMBER (R_MIPS_REL32, 3)        /* In Elf 64: alias R_MIPS_REL */
  43   RELOC_NUMBER (R_MIPS_26, 4)
  44   RELOC_NUMBER (R_MIPS_HI16, 5)
  45   RELOC_NUMBER (R_MIPS_LO16, 6)
  46   RELOC_NUMBER (R_MIPS_GPREL16, 7)      /* In Elf 64: alias R_MIPS_GPREL */
  47   RELOC_NUMBER (R_MIPS_LITERAL, 8)
  48   RELOC_NUMBER (R_MIPS_GOT16, 9)        /* In Elf 64: alias R_MIPS_GOT */
  49   RELOC_NUMBER (R_MIPS_PC16, 10)
  50   RELOC_NUMBER (R_MIPS_CALL16, 11)      /* In Elf 64: alias R_MIPS_CALL */
  51   RELOC_NUMBER (R_MIPS_GPREL32, 12)
  52   /* The remaining relocs are defined on Irix, although they are not
  53      in the MIPS ELF ABI.  */
  54   RELOC_NUMBER (R_MIPS_UNUSED1, 13)
  55   RELOC_NUMBER (R_MIPS_UNUSED2, 14)
  56   RELOC_NUMBER (R_MIPS_UNUSED3, 15)
  57   RELOC_NUMBER (R_MIPS_SHIFT5, 16)
  58   RELOC_NUMBER (R_MIPS_SHIFT6, 17)
  59   RELOC_NUMBER (R_MIPS_64, 18)
  60   RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
  61   RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
  62   RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
  63   RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
  64   RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
  65   RELOC_NUMBER (R_MIPS_SUB, 24)
  66   RELOC_NUMBER (R_MIPS_INSERT_A, 25)
  67   RELOC_NUMBER (R_MIPS_INSERT_B, 26)
  68   RELOC_NUMBER (R_MIPS_DELETE, 27)
  69   RELOC_NUMBER (R_MIPS_HIGHER, 28)
  70   RELOC_NUMBER (R_MIPS_HIGHEST, 29)
  71   RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
  72   RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
  73   RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
  74   RELOC_NUMBER (R_MIPS_REL16, 33)
  75   RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
  76   RELOC_NUMBER (R_MIPS_PJUMP, 35)
  77   RELOC_NUMBER (R_MIPS_RELGOT, 36)
  78   RELOC_NUMBER (R_MIPS_JALR, 37)
  79   /* TLS relocations.  */
  80   RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
  81   RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
  82   RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
  83   RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
  84   RELOC_NUMBER (R_MIPS_TLS_GD, 42)
  85   RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
  86   RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
  87   RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
  88   RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
  89   RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
  90   RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
  91   RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
  92   RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
  93   RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
  94   /* Space to grow */
  95   RELOC_NUMBER (R_MIPS_PC21_S2, 60)
  96   RELOC_NUMBER (R_MIPS_PC26_S2, 61)
  97   RELOC_NUMBER (R_MIPS_PC18_S3, 62)
  98   RELOC_NUMBER (R_MIPS_PC19_S2, 63)
  99   RELOC_NUMBER (R_MIPS_PCHI16, 64)
 100   RELOC_NUMBER (R_MIPS_PCLO16, 65)
 101   FAKE_RELOC (R_MIPS_max, 66)
 102   /* These relocs are used for the mips16.  */
 103   FAKE_RELOC (R_MIPS16_min, 100)
 104   RELOC_NUMBER (R_MIPS16_26, 100)
 105   RELOC_NUMBER (R_MIPS16_GPREL, 101)
 106   RELOC_NUMBER (R_MIPS16_GOT16, 102)
 107   RELOC_NUMBER (R_MIPS16_CALL16, 103)
 108   RELOC_NUMBER (R_MIPS16_HI16, 104)
 109   RELOC_NUMBER (R_MIPS16_LO16, 105)
 110   RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
 111   RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
 112   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
 113   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
 114   RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
 115   RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
 116   RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
 117   RELOC_NUMBER (R_MIPS16_PC16_S1, 113)
 118   FAKE_RELOC (R_MIPS16_max, 114)
 119   /* These relocations are specific to VxWorks.  */
 120   RELOC_NUMBER (R_MIPS_COPY, 126)
 121   RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
 122
 123   /* These relocations are specific to microMIPS.  */
 124   FAKE_RELOC (R_MICROMIPS_min, 130)
 125   RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
 126   RELOC_NUMBER (R_MICROMIPS_HI16, 134)
 127   RELOC_NUMBER (R_MICROMIPS_LO16, 135)
 128   RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)       /* In Elf 64:
 129                                                    alias R_MICROMIPS_GPREL */
 130   RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
 131   RELOC_NUMBER (R_MICROMIPS_GOT16, 138)         /* In Elf 64:
 132                                                    alias R_MICROMIPS_GOT */
 133   RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
 134   RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
 135   RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
 136   RELOC_NUMBER (R_MICROMIPS_CALL16, 142)        /* In Elf 64:
 137                                                    alias R_MICROMIPS_CALL */
 138   RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
 139   RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
 140   RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
 141   RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
 142   RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
 143   RELOC_NUMBER (R_MICROMIPS_SUB, 150)
 144   RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
 145   RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
 146   RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
 147   RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
 148   RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
 149   RELOC_NUMBER (R_MICROMIPS_JALR, 156)
 150   RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
 151   /* TLS relocations.  */
 152   RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
 153   RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
 154   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
 155   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
 156   RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
 157   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
 158   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
 159   /* microMIPS GP- and PC-relative relocations. */
 160   RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
 161   RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
 162   FAKE_RELOC (R_MICROMIPS_max, 174)
 163
 164   /* This was a GNU extension used by embedded-PIC.  It was co-opted by
 165      mips-linux for exception-handling data.  GCC stopped using it in
 166      May, 2004, then started using it again for compact unwind tables.  */
 167   RELOC_NUMBER (R_MIPS_PC32, 248)
 168   RELOC_NUMBER (R_MIPS_EH, 249)
 169   /* FIXME: this relocation is used internally by gas.  */
 170   RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
 171   /* These are GNU extensions to enable C++ vtable garbage collection.  */
 172   RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
 173   RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
 174 END_RELOC_NUMBERS (R_MIPS_maxext)
 175
 176 /* Processor specific flags for the ELF header e_flags field.  */
 177
 178 /* At least one .noreorder directive appears in the source.  */
 179 #define EF_MIPS_NOREORDER       0x00000001
 180
 181 /* File contains position independent code.  */
 182 #define EF_MIPS_PIC             0x00000002
 183
 184 /* Code in file uses the standard calling sequence for calling
 185    position independent code.  */
 186 #define EF_MIPS_CPIC            0x00000004
 187
 188 /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
 189 #define EF_MIPS_XGOT            0x00000008
 190
 191 /* Code in file uses UCODE (obsolete) */
 192 #define EF_MIPS_UCODE           0x00000010
 193
 194 /* Code in file uses new ABI (-n32 on Irix 6).  */
 195 #define EF_MIPS_ABI2            0x00000020
 196
 197 /* Process the .MIPS.options section first by ld */
 198 #define EF_MIPS_OPTIONS_FIRST   0x00000080
 199
 200 /* Indicates code compiled for a 64-bit machine in 32-bit mode
 201    (regs are 32-bits wide).  */
 202 #define EF_MIPS_32BITMODE       0x00000100
 203
 204 /* 32-bit machine but FP registers are 64 bit (-mfp64).  */
 205 #define EF_MIPS_FP64            0x00000200
 206
 207 /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
 208 #define EF_MIPS_NAN2008         0x00000400
 209
 210 /* Architectural Extensions used by this file */
 211 #define EF_MIPS_ARCH_ASE        0x0f000000
 212
 213 /* Use MDMX multimedia extensions */
 214 #define EF_MIPS_ARCH_ASE_MDMX   0x08000000
 215
 216 /* Use MIPS-16 ISA extensions */
 217 #define EF_MIPS_ARCH_ASE_M16    0x04000000
 218
 219 /* Use MICROMIPS ISA extensions.  */
 220 #define EF_MIPS_ARCH_ASE_MICROMIPS      0x02000000
 221
 222 /* Four bit MIPS architecture field.  */
 223 #define EF_MIPS_ARCH            0xf0000000
 224
 225 /* -mips1 code.  */
 226 #define E_MIPS_ARCH_1           0x00000000
 227
 228 /* -mips2 code.  */
 229 #define E_MIPS_ARCH_2           0x10000000
 230
 231 /* -mips3 code.  */
 232 #define E_MIPS_ARCH_3           0x20000000
 233
 234 /* -mips4 code.  */
 235 #define E_MIPS_ARCH_4           0x30000000
 236
 237 /* -mips5 code.  */
 238 #define E_MIPS_ARCH_5           0x40000000
 239
 240 /* -mips32 code.  */
 241 #define E_MIPS_ARCH_32          0x50000000
 242
 243 /* -mips64 code.  */
 244 #define E_MIPS_ARCH_64          0x60000000
 245
 246 /* -mips32r2 code.  */
 247 #define E_MIPS_ARCH_32R2        0x70000000
 248
 249 /* -mips64r2 code.  */
 250 #define E_MIPS_ARCH_64R2        0x80000000
 251
 252 /* -mips32r6 code.  */
 253 #define E_MIPS_ARCH_32R6        0x90000000
 254
 255 /* -mips64r6 code.  */
 256 #define E_MIPS_ARCH_64R6        0xa0000000
 257
 258 /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
 259 #define EF_MIPS_ABI             0x0000F000
 260
 261 /* The original o32 abi. */
 262 #define E_MIPS_ABI_O32          0x00001000
 263
 264 /* O32 extended to work on 64 bit architectures */
 265 #define E_MIPS_ABI_O64          0x00002000
 266
 267 /* EABI in 32 bit mode */
 268 #define E_MIPS_ABI_EABI32       0x00003000
 269
 270 /* EABI in 64 bit mode */
 271 #define E_MIPS_ABI_EABI64       0x00004000
 272
 273
 274 /* Machine variant if we know it.  This field was invented at Cygnus,
 275    but it is hoped that other vendors will adopt it.  If some standard
 276    is developed, this code should be changed to follow it. */
 277
 278 #define EF_MIPS_MACH            0x00FF0000
 279
 280 /* Cygnus is choosing values between 80 and 9F;
 281    00 - 7F should be left for a future standard;
 282    the rest are open. */
 283
 284 #define E_MIPS_MACH_3900        0x00810000
 285 #define E_MIPS_MACH_4010        0x00820000
 286 #define E_MIPS_MACH_4100        0x00830000
 287 #define E_MIPS_MACH_4650        0x00850000
 288 #define E_MIPS_MACH_4120        0x00870000
 289 #define E_MIPS_MACH_4111        0x00880000
 290 #define E_MIPS_MACH_SB1         0x008a0000
 291 #define E_MIPS_MACH_OCTEON      0x008b0000
 292 #define E_MIPS_MACH_XLR         0x008c0000
 293 #define E_MIPS_MACH_OCTEON2     0x008d0000
 294 #define E_MIPS_MACH_OCTEON3     0x008e0000
 295 #define E_MIPS_MACH_5400        0x00910000
 296 #define E_MIPS_MACH_5900        0x00920000
 297 #define E_MIPS_MACH_IAMR2       0x00930000
 298 #define E_MIPS_MACH_5500        0x00980000
 299 #define E_MIPS_MACH_9000        0x00990000
 300 #define E_MIPS_MACH_LS2E        0x00A00000
 301 #define E_MIPS_MACH_LS2F        0x00A10000
 302 #define E_MIPS_MACH_LS3A        0x00A20000
 303 \f
 304 /* Processor specific section indices.  These sections do not actually
 305    exist.  Symbols with a st_shndx field corresponding to one of these
 306    values have a special meaning.  */
 307
 308 /* Defined and allocated common symbol.  Value is virtual address.  If
 309    relocated, alignment must be preserved.  */
 310 #define SHN_MIPS_ACOMMON        SHN_LORESERVE
 311
 312 /* Defined and allocated text symbol.  Value is virtual address.
 313    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
 314 #define SHN_MIPS_TEXT           (SHN_LORESERVE + 1)
 315
 316 /* Defined and allocated data symbol.  Value is virtual address.
 317    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
 318 #define SHN_MIPS_DATA           (SHN_LORESERVE + 2)
 319
 320 /* Small common symbol.  */
 321 #define SHN_MIPS_SCOMMON        (SHN_LORESERVE + 3)
 322
 323 /* Small undefined symbol.  */
 324 #define SHN_MIPS_SUNDEFINED     (SHN_LORESERVE + 4)
 325 \f
 326 /* Processor specific section types.  */
 327
 328 /* Section contains the set of dynamic shared objects used when
 329    statically linking.  */
 330 #define SHT_MIPS_LIBLIST        0x70000000
 331
 332 /* I'm not sure what this is, but it's used on Irix 5.  */
 333 #define SHT_MIPS_MSYM           0x70000001
 334
 335 /* Section contains list of symbols whose definitions conflict with
 336    symbols defined in shared objects.  */
 337 #define SHT_MIPS_CONFLICT       0x70000002
 338
 339 /* Section contains the global pointer table.  */
 340 #define SHT_MIPS_GPTAB          0x70000003
 341
 342 /* Section contains microcode information.  The exact format is
 343    unspecified.  */
 344 #define SHT_MIPS_UCODE          0x70000004
 345
 346 /* Section contains some sort of debugging information.  The exact
 347    format is unspecified.  It's probably ECOFF symbols.  */
 348 #define SHT_MIPS_DEBUG          0x70000005
 349
 350 /* Section contains register usage information.  */
 351 #define SHT_MIPS_REGINFO        0x70000006
 352
 353 /* ??? */
 354 #define SHT_MIPS_PACKAGE        0x70000007
 355
 356 /* ??? */
 357 #define SHT_MIPS_PACKSYM        0x70000008
 358
 359 /* ??? */
 360 #define SHT_MIPS_RELD           0x70000009
 361
 362 /* Section contains interface information.  */
 363 #define SHT_MIPS_IFACE          0x7000000b
 364
 365 /* Section contains description of contents of another section.  */
 366 #define SHT_MIPS_CONTENT        0x7000000c
 367
 368 /* Section contains miscellaneous options.  */
 369 #define SHT_MIPS_OPTIONS        0x7000000d
 370
 371 /* ??? */
 372 #define SHT_MIPS_SHDR           0x70000010
 373
 374 /* ??? */
 375 #define SHT_MIPS_FDESC          0x70000011
 376
 377 /* ??? */
 378 #define SHT_MIPS_EXTSYM         0x70000012
 379
 380 /* ??? */
 381 #define SHT_MIPS_DENSE          0x70000013
 382
 383 /* ??? */
 384 #define SHT_MIPS_PDESC          0x70000014
 385
 386 /* ??? */
 387 #define SHT_MIPS_LOCSYM         0x70000015
 388
 389 /* ??? */
 390 #define SHT_MIPS_AUXSYM         0x70000016
 391
 392 /* ??? */
 393 #define SHT_MIPS_OPTSYM         0x70000017
 394
 395 /* ??? */
 396 #define SHT_MIPS_LOCSTR         0x70000018
 397
 398 /* ??? */
 399 #define SHT_MIPS_LINE           0x70000019
 400
 401 /* ??? */
 402 #define SHT_MIPS_RFDESC         0x7000001a
 403
 404 /* Delta C++: symbol table */
 405 #define SHT_MIPS_DELTASYM       0x7000001b
 406
 407 /* Delta C++: instance table */
 408 #define SHT_MIPS_DELTAINST      0x7000001c
 409
 410 /* Delta C++: class table */
 411 #define SHT_MIPS_DELTACLASS     0x7000001d
 412
 413 /* DWARF debugging section.  */
 414 #define SHT_MIPS_DWARF          0x7000001e
 415
 416 /* Delta C++: declarations */
 417 #define SHT_MIPS_DELTADECL      0x7000001f
 418
 419 /* List of libraries the binary depends on.  Includes a time stamp, version
 420    number.  */
 421 #define SHT_MIPS_SYMBOL_LIB     0x70000020
 422
 423 /* Events section.  */
 424 #define SHT_MIPS_EVENTS         0x70000021
 425
 426 /* ??? */
 427 #define SHT_MIPS_TRANSLATE      0x70000022
 428
 429 /* Special pixie sections */
 430 #define SHT_MIPS_PIXIE          0x70000023
 431
 432 /* Address translation table (for debug info) */
 433 #define SHT_MIPS_XLATE          0x70000024
 434
 435 /* SGI internal address translation table (for debug info) */
 436 #define SHT_MIPS_XLATE_DEBUG    0x70000025
 437
 438 /* Intermediate code */
 439 #define SHT_MIPS_WHIRL          0x70000026
 440
 441 /* C++ exception handling region info */
 442 #define SHT_MIPS_EH_REGION      0x70000027
 443
 444 /* Obsolete address translation table (for debug info) */
 445 #define SHT_MIPS_XLATE_OLD      0x70000028
 446
 447 /* Runtime procedure descriptor table exception information (ucode) ??? */
 448 #define SHT_MIPS_PDR_EXCEPTION  0x70000029
 449
 450 /* ABI related flags section.  */
 451 #define SHT_MIPS_ABIFLAGS       0x7000002a
 452
 453 /* A section of type SHT_MIPS_LIBLIST contains an array of the
 454    following structure.  The sh_link field is the section index of the
 455    string table.  The sh_info field is the number of entries in the
 456    section.  */
 457 typedef struct
 458 {
 459   /* String table index for name of shared object.  */
 460   unsigned long l_name;
 461   /* Time stamp.  */
 462   unsigned long l_time_stamp;
 463   /* Checksum of symbol names and common sizes.  */
 464   unsigned long l_checksum;
 465   /* String table index for version.  */
 466   unsigned long l_version;
 467   /* Flags.  */
 468   unsigned long l_flags;
 469 } Elf32_Lib;
 470
 471 /* The external version of Elf32_Lib.  */
 472 typedef struct
 473 {
 474   unsigned char l_name[4];
 475   unsigned char l_time_stamp[4];
 476   unsigned char l_checksum[4];
 477   unsigned char l_version[4];
 478   unsigned char l_flags[4];
 479 } Elf32_External_Lib;
 480
 481 /* The l_flags field of an Elf32_Lib structure may contain the
 482    following flags.  */
 483
 484 /* Require an exact match at runtime.  */
 485 #define LL_EXACT_MATCH          0x00000001
 486
 487 /* Ignore version incompatibilities at runtime.  */
 488 #define LL_IGNORE_INT_VER       0x00000002
 489
 490 /* Require matching minor version number.  */
 491 #define LL_REQUIRE_MINOR        0x00000004
 492
 493 /* ??? */
 494 #define LL_EXPORTS              0x00000008
 495
 496 /* Delay loading of this library until really needed.  */
 497 #define LL_DELAY_LOAD           0x00000010
 498
 499 /* ??? Delta C++ stuff ??? */
 500 #define LL_DELTA                0x00000020
 501
 502
 503 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
 504    .dynsym section.  Each element has the following type.  */
 505 typedef unsigned long Elf32_Conflict;
 506 typedef unsigned char Elf32_External_Conflict[4];
 507
 508 typedef unsigned long Elf64_Conflict;
 509 typedef unsigned char Elf64_External_Conflict[8];
 510
 511 /* A section of type SHT_MIPS_GPTAB contains information about how
 512    much GP space would be required for different -G arguments.  This
 513    information is only used so that the linker can provide informative
 514    suggestions as to the best -G value to use.  The sh_info field is
 515    the index of the section for which this information applies.  The
 516    contents of the section are an array of the following union.  The
 517    first element uses the gt_header field.  The remaining elements use
 518    the gt_entry field.  */
 519 typedef union
 520 {
 521   struct
 522     {
 523       /* -G value actually used for this object file.  */
 524       unsigned long gt_current_g_value;
 525       /* Unused.  */
 526       unsigned long gt_unused;
 527     } gt_header;
 528   struct
 529     {
 530       /* If this -G argument has been used...  */
 531       unsigned long gt_g_value;
 532       /* ...this many GP section bytes would be required.  */
 533       unsigned long gt_bytes;
 534     } gt_entry;
 535 } Elf32_gptab;
 536
 537 /* The external version of Elf32_gptab.  */
 538
 539 typedef union
 540 {
 541   struct
 542     {
 543       unsigned char gt_current_g_value[4];
 544       unsigned char gt_unused[4];
 545     } gt_header;
 546   struct
 547     {
 548       unsigned char gt_g_value[4];
 549       unsigned char gt_bytes[4];
 550     } gt_entry;
 551 } Elf32_External_gptab;
 552
 553 /* A section of type SHT_MIPS_REGINFO contains the following
 554    structure.  */
 555 typedef struct
 556 {
 557   /* Mask of general purpose registers used.  */
 558   unsigned long ri_gprmask;
 559   /* Mask of co-processor registers used.  */
 560   unsigned long ri_cprmask[4];
 561   /* GP register value for this object file.  */
 562   long ri_gp_value;
 563 } Elf32_RegInfo;
 564
 565 /* The external version of the Elf_RegInfo structure.  */
 566 typedef struct
 567 {
 568   unsigned char ri_gprmask[4];
 569   unsigned char ri_cprmask[4][4];
 570   unsigned char ri_gp_value[4];
 571 } Elf32_External_RegInfo;
 572
 573 /* MIPS ELF .reginfo swapping routines.  */
 574 extern void bfd_mips_elf32_swap_reginfo_in
 575   (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
 576 extern void bfd_mips_elf32_swap_reginfo_out
 577   (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
 578 \f
 579 /* Processor specific section flags.  */
 580
 581 /* This section must be in the global data area.  */
 582 #define SHF_MIPS_GPREL          0x10000000
 583
 584 /* This section should be merged.  */
 585 #define SHF_MIPS_MERGE          0x20000000
 586
 587 /* This section contains address data of size implied by section
 588    element size.  */
 589 #define SHF_MIPS_ADDR           0x40000000
 590
 591 /* This section contains string data.  */
 592 #define SHF_MIPS_STRING         0x80000000
 593
 594 /* This section may not be stripped.  */
 595 #define SHF_MIPS_NOSTRIP        0x08000000
 596
 597 /* This section is local to threads.  */
 598 #define SHF_MIPS_LOCAL          0x04000000
 599
 600 /* Linker should generate implicit weak names for this section.  */
 601 #define SHF_MIPS_NAMES          0x02000000
 602
 603 /* Section contais text/data which may be replicated in other sections.
 604    Linker should retain only one copy.  */
 605 #define SHF_MIPS_NODUPES        0x01000000
 606 \f
 607 /* Processor specific program header types.  */
 608
 609 /* Register usage information.  Identifies one .reginfo section.  */
 610 #define PT_MIPS_REGINFO         0x70000000
 611
 612 /* Runtime procedure table.  */
 613 #define PT_MIPS_RTPROC          0x70000001
 614
 615 /* .MIPS.options section.  */
 616 #define PT_MIPS_OPTIONS         0x70000002
 617
 618 /* Records ABI related flags.  */
 619 #define PT_MIPS_ABIFLAGS        0x70000003
 620 \f
 621 /* Processor specific dynamic array tags.  */
 622
 623 /* 32 bit version number for runtime linker interface.  */
 624 #define DT_MIPS_RLD_VERSION     0x70000001
 625
 626 /* Time stamp.  */
 627 #define DT_MIPS_TIME_STAMP      0x70000002
 628
 629 /* Checksum of external strings and common sizes.  */
 630 #define DT_MIPS_ICHECKSUM       0x70000003
 631
 632 /* Index of version string in string table.  */
 633 #define DT_MIPS_IVERSION        0x70000004
 634
 635 /* 32 bits of flags.  */
 636 #define DT_MIPS_FLAGS           0x70000005
 637
 638 /* Base address of the segment.  */
 639 #define DT_MIPS_BASE_ADDRESS    0x70000006
 640
 641 /* ??? */
 642 #define DT_MIPS_MSYM            0x70000007
 643
 644 /* Address of .conflict section.  */
 645 #define DT_MIPS_CONFLICT        0x70000008
 646
 647 /* Address of .liblist section.  */
 648 #define DT_MIPS_LIBLIST         0x70000009
 649
 650 /* Number of local global offset table entries.  */
 651 #define DT_MIPS_LOCAL_GOTNO     0x7000000a
 652
 653 /* Number of entries in the .conflict section.  */
 654 #define DT_MIPS_CONFLICTNO      0x7000000b
 655
 656 /* Number of entries in the .liblist section.  */
 657 #define DT_MIPS_LIBLISTNO       0x70000010
 658
 659 /* Number of entries in the .dynsym section.  */
 660 #define DT_MIPS_SYMTABNO        0x70000011
 661
 662 /* Index of first external dynamic symbol not referenced locally.  */
 663 #define DT_MIPS_UNREFEXTNO      0x70000012
 664
 665 /* Index of first dynamic symbol in global offset table.  */
 666 #define DT_MIPS_GOTSYM          0x70000013
 667
 668 /* Number of page table entries in global offset table.  */
 669 #define DT_MIPS_HIPAGENO        0x70000014
 670
 671 /* Address of run time loader map, used for debugging.  */
 672 #define DT_MIPS_RLD_MAP         0x70000016
 673
 674 /* Delta C++ class definition.  */
 675 #define DT_MIPS_DELTA_CLASS     0x70000017
 676
 677 /* Number of entries in DT_MIPS_DELTA_CLASS.  */
 678 #define DT_MIPS_DELTA_CLASS_NO  0x70000018
 679
 680 /* Delta C++ class instances.  */
 681 #define DT_MIPS_DELTA_INSTANCE  0x70000019
 682
 683 /* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
 684 #define DT_MIPS_DELTA_INSTANCE_NO       0x7000001a
 685
 686 /* Delta relocations.  */
 687 #define DT_MIPS_DELTA_RELOC     0x7000001b
 688
 689 /* Number of entries in DT_MIPS_DELTA_RELOC.  */
 690 #define DT_MIPS_DELTA_RELOC_NO  0x7000001c
 691
 692 /* Delta symbols that Delta relocations refer to.  */
 693 #define DT_MIPS_DELTA_SYM       0x7000001d
 694
 695 /* Number of entries in DT_MIPS_DELTA_SYM.  */
 696 #define DT_MIPS_DELTA_SYM_NO    0x7000001e
 697
 698 /* Delta symbols that hold class declarations.  */
 699 #define DT_MIPS_DELTA_CLASSSYM  0x70000020
 700
 701 /* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
 702 #define DT_MIPS_DELTA_CLASSSYM_NO       0x70000021
 703
 704 /* Flags indicating information about C++ flavor.  */
 705 #define DT_MIPS_CXX_FLAGS       0x70000022
 706
 707 /* Pixie information (???).  */
 708 #define DT_MIPS_PIXIE_INIT      0x70000023
 709
 710 /* Address of .MIPS.symlib */
 711 #define DT_MIPS_SYMBOL_LIB      0x70000024
 712
 713 /* The GOT index of the first PTE for a segment */
 714 #define DT_MIPS_LOCALPAGE_GOTIDX        0x70000025
 715
 716 /* The GOT index of the first PTE for a local symbol */
 717 #define DT_MIPS_LOCAL_GOTIDX    0x70000026
 718
 719 /* The GOT index of the first PTE for a hidden symbol */
 720 #define DT_MIPS_HIDDEN_GOTIDX   0x70000027
 721
 722 /* The GOT index of the first PTE for a protected symbol */
 723 #define DT_MIPS_PROTECTED_GOTIDX        0x70000028
 724
 725 /* Address of `.MIPS.options'.  */
 726 #define DT_MIPS_OPTIONS         0x70000029
 727
 728 /* Address of `.interface'.  */
 729 #define DT_MIPS_INTERFACE       0x7000002a
 730
 731 /* ??? */
 732 #define DT_MIPS_DYNSTR_ALIGN    0x7000002b
 733
 734 /* Size of the .interface section.  */
 735 #define DT_MIPS_INTERFACE_SIZE  0x7000002c
 736
 737 /* Size of rld_text_resolve function stored in the GOT.  */
 738 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR   0x7000002d
 739
 740 /* Default suffix of DSO to be added by rld on dlopen() calls.  */
 741 #define DT_MIPS_PERF_SUFFIX     0x7000002e
 742
 743 /* Size of compact relocation section (O32).  */
 744 #define DT_MIPS_COMPACT_SIZE    0x7000002f
 745
 746 /* GP value for auxiliary GOTs.  */
 747 #define DT_MIPS_GP_VALUE        0x70000030
 748
 749 /* Address of auxiliary .dynamic.  */
 750 #define DT_MIPS_AUX_DYNAMIC     0x70000031
 751
 752 /* Address of the base of the PLTGOT.  */
 753 #define DT_MIPS_PLTGOT         0x70000032
 754
 755 /* Points to the base of a writable PLT.  */
 756 #define DT_MIPS_RWPLT          0x70000034
 757
 758 /* Relative offset of run time loader map, used for debugging.  */
 759 #define DT_MIPS_RLD_MAP_REL    0x70000035
 760 \f
 761 /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
 762
 763 /* No flags.  */
 764 #define RHF_NONE                0x00000000
 765
 766 /* Uses shortcut pointers.  */
 767 #define RHF_QUICKSTART          0x00000001
 768
 769 /* Hash size is not a power of two.  */
 770 #define RHF_NOTPOT              0x00000002
 771
 772 /* Ignore LD_LIBRARY_PATH.  */
 773 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
 774
 775 /* DSO address may not be relocated. */
 776 #define RHF_NO_MOVE             0x00000008
 777
 778 /* SGI specific features. */
 779 #define RHF_SGI_ONLY            0x00000010
 780
 781 /* Guarantee that .init will finish executing before any non-init
 782    code in DSO is called. */
 783 #define RHF_GUARANTEE_INIT         0x00000020
 784
 785 /* Contains Delta C++ code. */
 786 #define RHF_DELTA_C_PLUS_PLUS      0x00000040
 787
 788 /* Guarantee that .init will start executing before any non-init
 789    code in DSO is called. */
 790 #define RHF_GUARANTEE_START_INIT   0x00000080
 791
 792 /* Generated by pixie. */
 793 #define RHF_PIXIE                  0x00000100
 794
 795 /* Delay-load DSO by default. */
 796 #define RHF_DEFAULT_DELAY_LOAD     0x00000200
 797
 798 /* Object may be requickstarted */
 799 #define RHF_REQUICKSTART           0x00000400
 800
 801 /* Object has been requickstarted */
 802 #define RHF_REQUICKSTARTED         0x00000800
 803
 804 /* Generated by cord. */
 805 #define RHF_CORD                   0x00001000
 806
 807 /* Object contains no unresolved undef symbols. */
 808 #define RHF_NO_UNRES_UNDEF         0x00002000
 809
 810 /* Symbol table is in a safe order. */
 811 #define RHF_RLD_ORDER_SAFE         0x00004000
 812 \f
 813 /* Special values for the st_other field in the symbol table.  These
 814    are used in an Irix 5 dynamic symbol table.  */
 815
 816 #define STO_DEFAULT             STV_DEFAULT
 817 #define STO_INTERNAL            STV_INTERNAL
 818 #define STO_HIDDEN              STV_HIDDEN
 819 #define STO_PROTECTED           STV_PROTECTED
 820
 821 /* Two topmost bits denote the MIPS ISA for .text symbols:
 822    + 00 -- standard MIPS code,
 823    + 10 -- microMIPS code,
 824    + 11 -- MIPS16 code; requires the following two bits to be set too.
 825    Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
 826    for details.  */
 827 #define STO_MIPS_ISA            (3 << 6)
 828
 829 /* The mask spanning the rest of MIPS psABI flags.  At most one is expected
 830    to be set except for STO_MIPS16.  */
 831 #define STO_MIPS_FLAGS          (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
 832
 833 /* The MIPS psABI was updated in 2008 with support for PLTs and copy
 834    relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
 835    PLT entries and traditional MIPS lazy binding stubs.  We mark the former
 836    with STO_MIPS_PLT to distinguish them from the latter.  */
 837 #define STO_MIPS_PLT            0x8
 838 #define ELF_ST_IS_MIPS_PLT(other)                                       \
 839   ((ELF_ST_IS_MIPS16 (other)                                            \
 840     ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))                        \
 841     : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
 842 #define ELF_ST_SET_MIPS_PLT(other)                                      \
 843   ((ELF_ST_IS_MIPS16 (other)                                            \
 844     ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))                        \
 845     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
 846
 847 /* This value is used to mark PIC functions in an object that mixes
 848    PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
 849    although MIPS16 symbols are never considered to be MIPS_PIC.  */
 850 #define STO_MIPS_PIC            0x20
 851 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
 852 #define ELF_ST_SET_MIPS_PIC(other)                                      \
 853   ((ELF_ST_IS_MIPS16 (other)                                            \
 854     ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))                        \
 855     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
 856
 857 /* This value is used for a mips16 .text symbol.  */
 858 #define STO_MIPS16              0xf0
 859 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
 860 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
 861
 862 /* This value is used for a microMIPS .text symbol.  To distinguish from
 863    STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
 864    mask is STO_MIPS_ISA.  */
 865 #define STO_MICROMIPS           (2 << 6)
 866 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
 867 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
 868
 869 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
 870    has been indicated for a .text symbol.  */
 871 #define ELF_ST_IS_COMPRESSED(other) \
 872   (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
 873
 874 /* This bit is used on Irix to indicate a symbol whose definition
 875    is optional - if, at final link time, it cannot be found, no
 876    error message should be produced.  */
 877 #define STO_OPTIONAL            (1 << 2)
 878 /* A macro to examine the STO_OPTIONAL bit.  */
 879 #define ELF_MIPS_IS_OPTIONAL(other)     ((other) & STO_OPTIONAL)
 880 \f
 881 /* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
 882    relocation entry specifies up to three actual relocations, all at
 883    the same address.  The first relocation which required a symbol
 884    uses the symbol in the r_sym field.  The second relocation which
 885    requires a symbol uses the symbol in the r_ssym field.  If all
 886    three relocations require a symbol, the third one uses a zero
 887    value.  */
 888
 889 /* An entry in a 64 bit SHT_REL section.  */
 890
 891 typedef struct
 892 {
 893   /* Address of relocation.  */
 894   unsigned char r_offset[8];
 895   /* Symbol index.  */
 896   unsigned char r_sym[4];
 897   /* Special symbol.  */
 898   unsigned char r_ssym[1];
 899   /* Third relocation.  */
 900   unsigned char r_type3[1];
 901   /* Second relocation.  */
 902   unsigned char r_type2[1];
 903   /* First relocation.  */
 904   unsigned char r_type[1];
 905 } Elf64_Mips_External_Rel;
 906
 907 typedef struct
 908 {
 909   /* Address of relocation.  */
 910   bfd_vma r_offset;
 911   /* Symbol index.  */
 912   unsigned long r_sym;
 913   /* Special symbol.  */
 914   unsigned char r_ssym;
 915   /* Third relocation.  */
 916   unsigned char r_type3;
 917   /* Second relocation.  */
 918   unsigned char r_type2;
 919   /* First relocation.  */
 920   unsigned char r_type;
 921 } Elf64_Mips_Internal_Rel;
 922
 923 /* An entry in a 64 bit SHT_RELA section.  */
 924
 925 typedef struct
 926 {
 927   /* Address of relocation.  */
 928   unsigned char r_offset[8];
 929   /* Symbol index.  */
 930   unsigned char r_sym[4];
 931   /* Special symbol.  */
 932   unsigned char r_ssym[1];
 933   /* Third relocation.  */
 934   unsigned char r_type3[1];
 935   /* Second relocation.  */
 936   unsigned char r_type2[1];
 937   /* First relocation.  */
 938   unsigned char r_type[1];
 939   /* Addend.  */
 940   unsigned char r_addend[8];
 941 } Elf64_Mips_External_Rela;
 942
 943 typedef struct
 944 {
 945   /* Address of relocation.  */
 946   bfd_vma r_offset;
 947   /* Symbol index.  */
 948   unsigned long r_sym;
 949   /* Special symbol.  */
 950   unsigned char r_ssym;
 951   /* Third relocation.  */
 952   unsigned char r_type3;
 953   /* Second relocation.  */
 954   unsigned char r_type2;
 955   /* First relocation.  */
 956   unsigned char r_type;
 957   /* Addend.  */
 958   bfd_signed_vma r_addend;
 959 } Elf64_Mips_Internal_Rela;
 960
 961 /* MIPS ELF 64 relocation info access macros.  */
 962 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
 963 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
 964 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
 965 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
 966
 967 /* Values found in the r_ssym field of a relocation entry.  */
 968
 969 /* No relocation.  */
 970 #define RSS_UNDEF       0
 971
 972 /* Value of GP.  */
 973 #define RSS_GP          1
 974
 975 /* Value of GP in object being relocated.  */
 976 #define RSS_GP0         2
 977
 978 /* Address of location being relocated.  */
 979 #define RSS_LOC         3
 980 \f
 981 /* A SHT_MIPS_OPTIONS section contains a series of options, each of
 982    which starts with this header.  */
 983
 984 typedef struct
 985 {
 986   /* Type of option.  */
 987   unsigned char kind[1];
 988   /* Size of option descriptor, including header.  */
 989   unsigned char size[1];
 990   /* Section index of affected section, or 0 for global option.  */
 991   unsigned char section[2];
 992   /* Information specific to this kind of option.  */
 993   unsigned char info[4];
 994 } Elf_External_Options;
 995
 996 typedef struct
 997 {
 998   /* Type of option.  */
 999   unsigned char kind;
1000   /* Size of option descriptor, including header.  */
1001   unsigned char size;
1002   /* Section index of affected section, or 0 for global option.  */
1003   unsigned short section;
1004   /* Information specific to this kind of option.  */
1005   unsigned long info;
1006 } Elf_Internal_Options;
1007
1008 /* MIPS ELF option header swapping routines.  */
1009 extern void bfd_mips_elf_swap_options_in
1010   (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1011 extern void bfd_mips_elf_swap_options_out
1012   (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1013
1014 /* Values which may appear in the kind field of an Elf_Options
1015    structure.  */
1016
1017 /* Undefined.  */
1018 #define ODK_NULL        0
1019
1020 /* Register usage and GP value.  */
1021 #define ODK_REGINFO     1
1022
1023 /* Exception processing information.  */
1024 #define ODK_EXCEPTIONS  2
1025
1026 /* Section padding information.  */
1027 #define ODK_PAD         3
1028
1029 /* Hardware workarounds performed.  */
1030 #define ODK_HWPATCH     4
1031
1032 /* Fill value used by the linker.  */
1033 #define ODK_FILL        5
1034
1035 /* Reserved space for desktop tools.  */
1036 #define ODK_TAGS        6
1037
1038 /* Hardware workarounds, AND bits when merging.  */
1039 #define ODK_HWAND       7
1040
1041 /* Hardware workarounds, OR bits when merging.  */
1042 #define ODK_HWOR        8
1043
1044 /* GP group to use for text/data sections.  */
1045 #define ODK_GP_GROUP    9
1046
1047 /* ID information.  */
1048 #define ODK_IDENT       10
1049
1050 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1051    structure.  In the 64 bit ABI, it is the following structure.  The
1052    info field of the options header is not used.  */
1053
1054 typedef struct
1055 {
1056   /* Mask of general purpose registers used.  */
1057   unsigned char ri_gprmask[4];
1058   /* Padding.  */
1059   unsigned char ri_pad[4];
1060   /* Mask of co-processor registers used.  */
1061   unsigned char ri_cprmask[4][4];
1062   /* GP register value for this object file.  */
1063   unsigned char ri_gp_value[8];
1064 } Elf64_External_RegInfo;
1065
1066 typedef struct
1067 {
1068   /* Mask of general purpose registers used.  */
1069   unsigned long ri_gprmask;
1070   /* Padding.  */
1071   unsigned long ri_pad;
1072   /* Mask of co-processor registers used.  */
1073   unsigned long ri_cprmask[4];
1074   /* GP register value for this object file.  */
1075   bfd_vma ri_gp_value;
1076 } Elf64_Internal_RegInfo;
1077
1078 /* ABI Flags structure version 0.  */
1079
1080 typedef struct
1081 {
1082   /* Version of flags structure.  */
1083   unsigned char version[2];
1084   /* The level of the ISA: 1-5, 32, 64.  */
1085   unsigned char isa_level[1];
1086   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1087   unsigned char isa_rev[1];
1088   /* The size of general purpose registers.  */
1089   unsigned char gpr_size[1];
1090   /* The size of co-processor 1 registers.  */
1091   unsigned char cpr1_size[1];
1092   /* The size of co-processor 2 registers.  */
1093   unsigned char cpr2_size[1];
1094   /* The floating-point ABI.  */
1095   unsigned char fp_abi[1];
1096   /* Processor-specific extension.  */
1097   unsigned char isa_ext[4];
1098   /* Mask of ASEs used.  */
1099   unsigned char ases[4];
1100   /* Mask of general flags.  */
1101   unsigned char flags1[4];
1102   unsigned char flags2[4];
1103 } Elf_External_ABIFlags_v0;
1104
1105 typedef struct elf_internal_abiflags_v0
1106 {
1107   /* Version of flags structure.  */
1108   unsigned short version;
1109   /* The level of the ISA: 1-5, 32, 64.  */
1110   unsigned char isa_level;
1111   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1112   unsigned char isa_rev;
1113   /* The size of general purpose registers.  */
1114   unsigned char gpr_size;
1115   /* The size of co-processor 1 registers.  */
1116   unsigned char cpr1_size;
1117   /* The size of co-processor 2 registers.  */
1118   unsigned char cpr2_size;
1119   /* The floating-point ABI.  */
1120   unsigned char fp_abi;
1121   /* Processor-specific extension.  */
1122   unsigned long isa_ext;
1123   /* Mask of ASEs used.  */
1124   unsigned long ases;
1125   /* Mask of general flags.  */
1126   unsigned long flags1;
1127   unsigned long flags2;
1128 } Elf_Internal_ABIFlags_v0;
1129
1130 typedef struct
1131 {
1132   /* The hash value computed from the name of the corresponding
1133      dynamic symbol.  */
1134   unsigned char ms_hash_value[4];
1135   /* Contains both the dynamic relocation index and the symbol flags
1136      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1137      to access the individual values.  The dynamic relocation index
1138      identifies the first entry in the .rel.dyn section that
1139      references the dynamic symbol corresponding to this msym entry.
1140      If the index is 0, no dynamic relocations are associated with the
1141      symbol.  The symbol flags field is reserved for future use.  */
1142   unsigned char ms_info[4];
1143 } Elf32_External_Msym;
1144
1145 typedef struct
1146 {
1147   /* The hash value computed from the name of the corresponding
1148      dynamic symbol.  */
1149   unsigned long ms_hash_value;
1150   /* Contains both the dynamic relocation index and the symbol flags
1151      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1152      to access the individual values.  The dynamic relocation index
1153      identifies the first entry in the .rel.dyn section that
1154      references the dynamic symbol corresponding to this msym entry.
1155      If the index is 0, no dynamic relocations are associated with the
1156      symbol.  The symbol flags field is reserved for future use.  */
1157   unsigned long ms_info;
1158 } Elf32_Internal_Msym;
1159
1160 #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1161 #define ELF32_MS_FLAGS(i)     (i) & 0xff)
1162 #define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
1163
1164 /* MIPS ELF reginfo swapping routines.  */
1165 extern void bfd_mips_elf64_swap_reginfo_in
1166   (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1167 extern void bfd_mips_elf64_swap_reginfo_out
1168   (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1169
1170 /* MIPS ELF flags swapping routines.  */
1171 extern void bfd_mips_elf_swap_abiflags_v0_in
1172   (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1173 extern void bfd_mips_elf_swap_abiflags_v0_out
1174   (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1175
1176 /* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
1177 #define OEX_FPU_MIN     0x1f    /* FPEs which must be enabled.  */
1178 #define OEX_FPU_MAX     0x1f00  /* FPEs which may be enabled.  */
1179 #define OEX_PAGE0       0x10000 /* Page zero must be mapped.  */
1180 #define OEX_SMM         0x20000 /* Force sequential memory mode.  */
1181 #define OEX_FPDBUG      0x40000 /* Force precise floating-point
1182                                    exceptions (debug mode).  */
1183 #define OEX_DISMISS     0x80000 /* Dismiss invalid address faults.  */
1184
1185 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
1186 #define OEX_FPU_INVAL   0x10    /* Invalid operation exception.  */
1187 #define OEX_FPU_DIV0    0x08    /* Division by zero exception.  */
1188 #define OEX_FPU_OFLO    0x04    /* Overflow exception.  */
1189 #define OEX_FPU_UFLO    0x02    /* Underflow exception.  */
1190 #define OEX_FPU_INEX    0x01    /* Inexact exception.  */
1191
1192 /* Masks for the info word of an ODK_PAD descriptor.  */
1193 #define OPAD_PREFIX     0x01
1194 #define OPAD_POSTFIX    0x02
1195 #define OPAD_SYMBOL     0x04
1196
1197 /* Masks for the info word of an ODK_HWPATCH descriptor.  */
1198 #define OHW_R4KEOP      0x00000001      /* R4000 end-of-page patch.  */
1199 #define OHW_R8KPFETCH   0x00000002      /* May need R8000 prefetch patch.  */
1200 #define OHW_R5KEOP      0x00000004      /* R5000 end-of-page patch.  */
1201 #define OHW_R5KCVTL     0x00000008      /* R5000 cvt.[ds].l bug
1202                                            (clean == 1).  */
1203 #define OHW_R10KLDL     0x00000010      /* Needs R10K misaligned
1204                                            load patch. */
1205
1206 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
1207 #define OGP_GROUP       0x0000ffff      /* GP group number.  */
1208 #define OGP_SELF        0xffff0000      /* Self-contained GP groups.  */
1209
1210 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
1211 #define OHWA0_R4KEOP_CHECKED    0x00000001
1212 #define OHWA0_R4KEOP_CLEAN      0x00000002
1213
1214 /* Values for the xxx_size bytes of an ABI flags structure.  */
1215
1216 #define AFL_REG_NONE         0x00       /* No registers.  */
1217 #define AFL_REG_32           0x01       /* 32-bit registers.  */
1218 #define AFL_REG_64           0x02       /* 64-bit registers.  */
1219 #define AFL_REG_128          0x03       /* 128-bit registers.  */
1220
1221 /* Masks for the ases word of an ABI flags structure.  */
1222
1223 #define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
1224 #define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
1225 #define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
1226 #define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
1227 #define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
1228 #define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
1229 #define AFL_ASE_MT           0x00000040 /* MT ASE.  */
1230 #define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
1231 #define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
1232 #define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
1233 #define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
1234 #define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
1235 #define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
1236 #define AFL_ASE_DSPR3        0x00002000 /* DSP R3 ASE.  */
1237 #define AFL_ASE_MIPS16E2     0x00004000 /* MIPS16e2 ASE.  */
1238 #define AFL_ASE_CRC          0x00008000 /* CRC ASE.  */
1239 #define AFL_ASE_MASK         0x0000ffff /* All ASEs.  */
1240
1241 /* Values for the isa_ext word of an ABI flags structure.  */
1242
1243 #define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
1244 #define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
1245 #define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
1246 #define AFL_EXT_LOONGSON_3A   4  /* Loongson 3A.  */
1247 #define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
1248 #define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
1249 #define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
1250 #define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
1251 #define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
1252 #define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
1253 #define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
1254 #define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
1255 #define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
1256 #define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
1257 #define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
1258 #define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
1259 #define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
1260 #define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
1261 #define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
1262 #define AFL_EXT_INTERAPTIV_MR2 20  /* Imagination interAptiv MR2.  */
1263
1264 /* Masks for the flags1 word of an ABI flags structure.  */
1265 #define AFL_FLAGS1_ODDSPREG   1  /* Uses odd single-precision registers.  */
1266
1267 extern unsigned int bfd_mips_isa_ext (bfd *);
1268 \f
1269
1270 /* Object attribute tags.  */
1271 enum
1272 {
1273   /* 0-3 are generic.  */
1274
1275   /* Floating-point ABI used by this object file.  */
1276   Tag_GNU_MIPS_ABI_FP = 4,
1277
1278   /* MSA ABI used by this object file.  */
1279   Tag_GNU_MIPS_ABI_MSA = 8,
1280 };
1281
1282 /* Object attribute values.  */
1283 enum
1284 {
1285   /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
1286
1287   /* Not tagged or not using any ABIs affected by the differences.  */
1288   Val_GNU_MIPS_ABI_FP_ANY = 0,
1289
1290   /* Using hard-float -mdouble-float.  */
1291   Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1292
1293   /* Using hard-float -msingle-float.  */
1294   Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1295
1296   /* Using soft-float.  */
1297   Val_GNU_MIPS_ABI_FP_SOFT = 3,
1298
1299   /* Using -mips32r2 -mfp64.  */
1300   Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1301
1302   /* Using -mfpxx */
1303   Val_GNU_MIPS_ABI_FP_XX = 5,
1304
1305   /* Using -mips32r2 -mfp64.  */
1306   Val_GNU_MIPS_ABI_FP_64 = 6,
1307
1308   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
1309   Val_GNU_MIPS_ABI_FP_64A = 7,
1310
1311   /* This is reserved for backward-compatibility with an earlier
1312      implementation of the MIPS NaN2008 functionality.  */
1313   Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1314
1315   /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
1316
1317   /* Not tagged or not using any ABIs affected by the differences.  */
1318   Val_GNU_MIPS_ABI_MSA_ANY = 0,
1319
1320   /* Using 128-bit MSA.  */
1321   Val_GNU_MIPS_ABI_MSA_128 = 1,
1322 };
1323
1324 #ifdef __cplusplus
1325 }
1326 #endif
1327
1328 #endif /* _ELF_MIPS_H */