include/opcode/rl78.h

   1 /* Opcode decoder for the Renesas RL78
   2    Copyright (C) 2011-2015 Free Software Foundation, Inc.
   3    Written by DJ Delorie <dj@redhat.com>
   4
   5    This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
  20    02110-1301, USA.  */
  21
  22 /* The RL78 decoder in libopcodes is used by the simulator, gdb's
  23    analyzer, and the disassembler.  Given an opcode data source, it
  24    decodes the next opcode into the following structures.  */
  25
  26 #ifndef RL78_OPCODES_H_INCLUDED
  27 #define RL78_OPCODES_H_INCLUDED
  28
  29 #ifdef __cplusplus
  30 extern "C" {
  31 #endif
  32
  33 /* For the purposes of these structures, the RL78 registers are as
  34    follows, despite most of these being memory-mapped and
  35    bank-switched:  */
  36 typedef enum {
  37   RL78_Reg_None,
  38   /* The order of these matches the encodings.  */
  39   RL78_Reg_X,
  40   RL78_Reg_A,
  41   RL78_Reg_C,
  42   RL78_Reg_B,
  43   RL78_Reg_E,
  44   RL78_Reg_D,
  45   RL78_Reg_L,
  46   RL78_Reg_H,
  47   /* The order of these matches the encodings.  */
  48   RL78_Reg_AX,
  49   RL78_Reg_BC,
  50   RL78_Reg_DE,
  51   RL78_Reg_HL,
  52   /* Unordered.  */
  53   RL78_Reg_SP,
  54   RL78_Reg_PSW,
  55   RL78_Reg_CS,
  56   RL78_Reg_ES,
  57   RL78_Reg_PMC,
  58   RL78_Reg_MEM
  59 } RL78_Register;
  60
  61 typedef enum
  62 {
  63   RL78_Byte = 0,
  64   RL78_Word
  65 } RL78_Size;
  66
  67 typedef enum {
  68   RL78_Condition_T,
  69   RL78_Condition_F,
  70   RL78_Condition_C,
  71   RL78_Condition_NC,
  72   RL78_Condition_H,
  73   RL78_Condition_NH,
  74   RL78_Condition_Z,
  75   RL78_Condition_NZ
  76 } RL78_Condition;
  77
  78 typedef enum {
  79   RL78_Operand_None = 0,
  80   RL78_Operand_Immediate,       /* #addend */
  81   RL78_Operand_Register,        /* reg */
  82   RL78_Operand_Indirect,        /* [reg + reg2 + addend] */
  83   RL78_Operand_Bit,             /* reg.bit */
  84   RL78_Operand_BitIndirect,     /* [reg+reg2+addend].bit */
  85   RL78_Operand_PreDec,          /* [--reg] = push */
  86   RL78_Operand_PostInc          /* [reg++] = pop */
  87 } RL78_Operand_Type;
  88
  89 typedef enum
  90 {
  91   RLO_unknown,
  92   RLO_add,                      /* d += s */
  93   RLO_addc,                     /* d += s + CY */
  94   RLO_and,                      /* d &= s (byte, word, bit) */
  95   RLO_branch,                   /* pc = d */
  96   RLO_branch_cond,              /* pc = d if cond(src) */
  97   RLO_branch_cond_clear,        /* pc = d if cond(src), and clear(src) */
  98   RLO_break,                    /* BRK */
  99   RLO_call,                     /* call */
 100   RLO_cmp,                      /* cmp d, s */
 101   RLO_divhu,                    /* DIVHU */
 102   RLO_divwu,                    /* DIVWU */
 103   RLO_halt,                     /* HALT */
 104   RLO_mov,                      /* d = s */
 105   RLO_mach,                     /* MACH */
 106   RLO_machu,                    /* MACHU */
 107   RLO_mulu,                     /* MULU */
 108   RLO_mulh,                     /* MULH */
 109   RLO_mulhu,                    /* MULHU */
 110   RLO_nop,                      /* NOP */
 111   RLO_or,                       /* d |= s */
 112   RLO_ret,                      /* RET */
 113   RLO_reti,                     /* RETI */
 114   RLO_rol,                      /* d <<= s, MSB to LSB and CY */
 115   RLO_rolc,                     /* d <<= s, MSB to CY, CY, to LSB */
 116   RLO_ror,                      /* d >>= s, LSB to MSB and CY */
 117   RLO_rorc,                     /* d >>= s, LSB to CY, CY, to MSB */
 118   RLO_sar,                      /* d >>= s, signed */
 119   RLO_sel,                      /* rb = s */
 120   RLO_shr,                      /* d >>= s, unsigned */
 121   RLO_shl,                      /* d <<= s */
 122   RLO_skip,                     /* skip next insn is cond(s) */
 123   RLO_stop,                     /* STOP */
 124   RLO_sub,                      /* d -= s */
 125   RLO_subc,                     /* d -= s - CY */
 126   RLO_xch,                      /* swap d, s  */
 127   RLO_xor,                      /* d ^= s */
 128 } RL78_Opcode_ID;
 129
 130 typedef struct {
 131   RL78_Operand_Type  type;
 132   int              addend;
 133   RL78_Register    reg : 8;
 134   RL78_Register    reg2 : 8;
 135   unsigned char    bit_number : 4;
 136   unsigned char    condition : 3;
 137   unsigned char    use_es : 1;
 138 } RL78_Opcode_Operand;
 139
 140 /* PSW flag bits */
 141 #define RL78_PSW_IE     0x80
 142 #define RL78_PSW_Z      0x40
 143 #define RL78_PSW_RBS1   0x20
 144 #define RL78_PSW_AC     0x10
 145 #define RL78_PSW_RBS0   0x08
 146 #define RL78_PSW_ISP1   0x04
 147 #define RL78_PSW_ISP0   0x02
 148 #define RL78_PSW_CY     0x01
 149
 150 #define RL78_SFR_SP     0xffff8
 151 #define RL78_SFR_PSW    0xffffa
 152 #define RL78_SFR_CS     0xffffc
 153 #define RL78_SFR_ES     0xffffd
 154 #define RL78_SFR_PMC    0xffffe
 155 #define RL78_SFR_MEM    0xfffff
 156
 157 typedef struct
 158 {
 159   int lineno;
 160   RL78_Opcode_ID        id:24;
 161   unsigned              flags:8; /* PSW mask, for side effects only */
 162   int                   n_bytes;
 163   char *                syntax;
 164   RL78_Size             size;
 165   /* By convention, these are destination, source.  */
 166   RL78_Opcode_Operand   op[2];
 167 } RL78_Opcode_Decoded;
 168
 169 int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
 170
 171 #ifdef __cplusplus
 172 }
 173 #endif
 174
 175 #endif