include/opcode/v850.h

   1 /* v850.h -- Header file for NEC V850 opcode table
   2    Copyright 1996 Free Software Foundation, Inc.
   3    Written by J.T. Conklin, Cygnus Support
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 1, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef V850_H
  22 #define V850_H
  23
  24 /* The opcode table is an array of struct v850_opcode.  */
  25
  26 struct v850_opcode
  27 {
  28   /* The opcode name.  */
  29   const char *name;
  30
  31   /* The opcode itself.  Those bits which will be filled in with
  32      operands are zeroes.  */
  33   unsigned long opcode;
  34
  35   /* The opcode mask.  This is used by the disassembler.  This is a
  36      mask containing ones indicating those bits which must match the
  37      opcode field, and zeroes indicating those bits which need not
  38      match (and are presumably filled in by operands).  */
  39   unsigned long mask;
  40
  41   /* An array of operand codes.  Each code is an index into the
  42      operand table.  They appear in the order which the operands must
  43      appear in assembly code, and are terminated by a zero.  */
  44   unsigned char operands[8];
  45
  46   /* Which (if any) operand is a memory operand.  */
  47   unsigned int memop;
  48
  49   /* Target processor(s).  A bit field of processors which support
  50      this instruction.  Note a bit field is used as some instructions
  51      are available on multiple, different processor types, whereas
  52      other instructions are only available on one specific type.  */
  53   unsigned int processors;
  54 };
  55
  56 /* Values for the processors field in the v850_opcode structure.  */
  57 #define PROCESSOR_V850          (1 << 0)                /* Just the V850.  */
  58 #define PROCESSOR_ALL           -1                      /* Any processor.  */
  59 /* start-sanitize-v850e */
  60 #define PROCESSOR_V850E         (1 << 1)                /* Just the V850E. */
  61 #define PROCESSOR_NOT_V850      (~ PROCESSOR_V850)      /* Any processor except the V850.  */
  62 /* end-sanitize-v850e */
  63 /* start-sanitize-v850eq */
  64 #define PROCESSOR_V850EQ        (1 << 2)                /* Just the V850EQ. */
  65 /* end-sanitize-v850eq */
  66
  67 /* The table itself is sorted by major opcode number, and is otherwise
  68    in the order in which the disassembler should consider
  69    instructions.  */
  70 extern const struct v850_opcode v850_opcodes[];
  71 extern const int v850_num_opcodes;
  72
  73 \f
  74 /* The operands table is an array of struct v850_operand.  */
  75
  76 struct v850_operand
  77 {
  78   /* The number of bits in the operand.  */
  79   /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */
  80   int bits;
  81
  82   /* (bits >= 0):  How far the operand is left shifted in the instruction.  */
  83   /* (bits == -1): Bit mask of the bits in the operand.  */
  84   int shift;
  85
  86   /* Insertion function.  This is used by the assembler.  To insert an
  87      operand value into an instruction, check this field.
  88
  89      If it is NULL, execute
  90          i |= (op & ((1 << o->bits) - 1)) << o->shift;
  91      (i is the instruction which we are filling in, o is a pointer to
  92      this structure, and op is the opcode value; this assumes twos
  93      complement arithmetic).
  94
  95      If this field is not NULL, then simply call it with the
  96      instruction and the operand value.  It will return the new value
  97      of the instruction.  If the ERRMSG argument is not NULL, then if
  98      the operand value is illegal, *ERRMSG will be set to a warning
  99      string (the operand will be inserted in any case).  If the
 100      operand value is legal, *ERRMSG will be unchanged (most operands
 101      can accept any value).  */
 102   unsigned long (* insert) PARAMS ((unsigned long instruction, long op,
 103                                    const char ** errmsg));
 104
 105   /* Extraction function.  This is used by the disassembler.  To
 106      extract this operand type from an instruction, check this field.
 107
 108      If it is NULL, compute
 109          op = o->bits == -1 ? ((i) & o->shift) : ((i) >> o->shift) & ((1 << o->bits) - 1);
 110          if (o->flags & V850_OPERAND_SIGNED)
 111              op = (op << (32 - o->bits)) >> (32 - o->bits);
 112      (i is the instruction, o is a pointer to this structure, and op
 113      is the result; this assumes twos complement arithmetic).
 114
 115      If this field is not NULL, then simply call it with the
 116      instruction value.  It will return the value of the operand.  If
 117      the INVALID argument is not NULL, *INVALID will be set to
 118      non-zero if this operand type can not actually be extracted from
 119      this operand (i.e., the instruction does not match).  If the
 120      operand is valid, *INVALID will not be changed.  */
 121   unsigned long (* extract) PARAMS ((unsigned long instruction, int * invalid));
 122
 123   /* One bit syntax flags.  */
 124   int flags;
 125 };
 126
 127 /* Elements in the table are retrieved by indexing with values from
 128    the operands field of the v850_opcodes table.  */
 129
 130 extern const struct v850_operand v850_operands[];
 131
 132 /* Values defined for the flags field of a struct v850_operand.  */
 133
 134 /* This operand names a general purpose register */
 135 #define V850_OPERAND_REG        0x01
 136
 137 /* This operand names a system register */
 138 #define V850_OPERAND_SRG        0x02
 139
 140 /* This operand names a condition code used in the setf instruction */
 141 #define V850_OPERAND_CC         0x04
 142
 143 /* This operand takes signed values */
 144 #define V850_OPERAND_SIGNED     0x08
 145
 146 /* This operand is the ep register.  */
 147 #define V850_OPERAND_EP         0x10
 148
 149 /* This operand is a PC displacement */
 150 #define V850_OPERAND_DISP       0x20
 151
 152 /* This is a relaxable operand.   Only used for D9->D22 branch relaxing
 153    right now.  We may need others in the future (or maybe handle them like
 154    promoted operands on the mn10300?)  */
 155 #define V850_OPERAND_RELAX      0x40
 156
 157 /* The register specified must not be r0 */
 158 #define V850_NOT_R0             0x80
 159
 160 /* start-sanitize-v850e */
 161 /* push/pop type instruction, V850E specific.  */
 162 #define V850E_PUSH_POP          0x100
 163
 164 /* 16 bit immediate follows instruction, V850E specific.  */
 165 #define V850E_IMMEDIATE16       0x200
 166
 167 /* 32 bit immediate follows instruction, V850E specific.  */
 168 #define V850E_IMMEDIATE32       0x400
 169 /* end-sanitize-v850e */
 170
 171 #endif /* V850_H */