1 2020-08-11 Alan Modra <amodra@gmail.com>
3 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
5 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
7 * aarch64-opc.c (aarch64_print_operand):
8 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
9 (aarch64_sys_reg_supported_p): Function removed.
10 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
11 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
14 2020-08-10 Alan Modra <amodra@gmail.com>
16 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
19 2020-08-10 Alan Modra <amodra@gmail.com>
21 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
22 Enable icbt for power5, miso for power8.
24 2020-08-10 Alan Modra <amodra@gmail.com>
26 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
27 mtvsrd, and similarly for mfvsrd.
29 2020-08-04 Christian Groessler <chris@groessler.org>
30 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
32 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
33 opcodes (special "out" to absolute address).
34 * z8k-opc.h: Regenerate.
36 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
39 * i386-opc.h (Prefix_Disp8): New.
40 (Prefix_Disp16): Likewise.
41 (Prefix_Disp32): Likewise.
42 (Prefix_Load): Likewise.
43 (Prefix_Store): Likewise.
44 (Prefix_VEX): Likewise.
45 (Prefix_VEX3): Likewise.
46 (Prefix_EVEX): Likewise.
47 (Prefix_REX): Likewise.
48 (Prefix_NoOptimize): Likewise.
49 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
50 * i386-tbl.h: Regenerated.
52 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
54 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
55 default case with abort() instead of printing an error message and
56 continuing, to avoid a maybe-uninitialized warning.
58 2020-07-24 Nick Clifton <nickc@redhat.com>
60 * po/de.po: Updated German translation.
62 2020-07-21 Jan Beulich <jbeulich@suse.com>
64 * i386-dis.c (OP_E_memory): Revert previous change.
66 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
69 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
70 without base nor index registers.
72 2020-07-15 Jan Beulich <jbeulich@suse.com>
74 * i386-dis.c (putop): Move 'V' and 'W' handling.
76 2020-07-15 Jan Beulich <jbeulich@suse.com>
78 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
79 construct for push/pop of register.
80 (putop): Honor cond when handling 'P'. Drop handling of plain
83 2020-07-15 Jan Beulich <jbeulich@suse.com>
85 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
86 description. Drop '&' description. Use P for push of immediate,
87 pushf/popf, enter, and leave. Use %LP for lret/retf.
88 (dis386_twobyte): Use P for push/pop of fs/gs.
89 (reg_table): Use P for push/pop. Use @ for near call/jmp.
90 (x86_64_table): Use P for far call/jmp.
91 (putop): Drop handling of 'U' and '&'. Move and adjust handling
92 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
94 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
95 and dqw_mode (unconditional).
97 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
100 * i386-dis.c (OP_E_memory): Without base nor index registers,
101 32-bit displacement to 64 bits.
103 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
105 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
106 faulty double register pair is detected.
108 2020-07-14 Jan Beulich <jbeulich@suse.com>
110 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
112 2020-07-14 Jan Beulich <jbeulich@suse.com>
114 * i386-dis.c (OP_R, Rm): Delete.
115 (MOD_0F24, MOD_0F26): Rename to ...
116 (X86_64_0F24, X86_64_0F26): ... respectively.
117 (dis386): Update 'L' and 'Z' comments.
118 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
120 (mod_table): Move opcode 0F24 and 0F26 entries ...
121 (x86_64_table): ... here.
122 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
125 2020-07-14 Jan Beulich <jbeulich@suse.com>
127 * i386-dis.c (Rd, Rdq, MaskR): Delete.
128 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
129 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
130 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
131 MOD_EVEX_0F387C): New enumerators.
132 (reg_table): Use Edq for rdssp.
133 (prefix_table): Use Edq for incssp.
134 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
135 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
136 ktest*, and kshift*. Use Edq / MaskE for kmov*.
137 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
138 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
139 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
140 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
141 0F3828_P_1 and 0F3838_P_1.
142 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
143 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
145 2020-07-14 Jan Beulich <jbeulich@suse.com>
147 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
148 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
149 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
150 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
151 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
152 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
153 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
154 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
155 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
156 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
157 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
158 (reg_table, prefix_table, three_byte_table, vex_table,
159 vex_len_table, mod_table, rm_table): Replace / remove respective
161 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
162 of PREFIX_DATA in used_prefixes.
164 2020-07-14 Jan Beulich <jbeulich@suse.com>
166 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
167 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
168 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
169 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
170 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
171 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
172 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
173 VEX_W_0F3A33_L_0): Delete.
174 (dis386): Adjust "BW" description.
175 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
176 0F3A31, 0F3A32, and 0F3A33.
177 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
179 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
182 2020-07-14 Jan Beulich <jbeulich@suse.com>
184 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
185 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
186 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
187 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
188 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
189 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
190 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
191 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
192 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
193 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
194 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
195 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
196 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
197 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
198 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
199 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
200 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
201 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
202 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
203 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
204 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
205 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
206 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
207 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
208 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
209 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
210 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
211 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
212 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
213 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
214 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
215 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
216 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
217 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
218 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
219 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
220 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
221 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
222 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
223 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
224 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
225 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
226 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
227 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
228 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
229 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
230 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
231 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
232 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
233 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
234 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
235 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
236 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
237 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
238 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
239 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
240 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
241 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
242 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
243 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
244 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
245 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
246 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
247 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
248 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
249 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
250 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
251 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
252 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
253 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
254 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
255 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
256 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
257 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
258 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
259 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
260 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
261 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
262 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
263 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
264 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
265 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
266 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
267 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
268 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
269 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
270 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
271 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
272 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
273 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
274 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
275 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
276 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
277 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
278 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
279 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
280 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
281 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
282 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
283 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
284 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
285 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
286 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
287 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
288 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
289 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
290 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
291 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
292 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
293 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
294 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
295 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
296 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
297 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
298 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
299 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
300 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
301 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
302 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
303 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
304 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
305 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
306 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
307 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
308 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
309 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
310 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
311 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
312 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
313 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
314 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
315 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
316 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
317 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
318 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
319 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
320 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
321 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
322 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
323 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
324 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
325 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
326 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
327 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
328 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
329 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
330 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
331 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
332 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
333 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
334 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
335 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
336 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
337 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
338 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
339 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
340 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
341 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
342 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
343 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
344 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
345 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
346 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
347 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
348 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
349 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
350 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
351 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
352 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
353 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
354 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
355 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
356 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
357 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
358 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
359 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
360 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
361 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
362 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
363 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
364 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
365 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
366 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
367 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
368 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
369 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
370 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
371 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
372 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
373 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
374 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
375 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
376 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
377 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
378 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
379 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
380 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
381 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
382 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
383 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
384 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
385 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
386 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
387 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
388 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
389 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
390 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
391 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
392 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
393 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
394 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
395 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
396 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
397 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
398 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
399 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
400 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
401 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
402 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
403 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
404 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
405 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
406 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
407 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
408 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
409 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
410 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
411 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
412 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
413 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
414 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
415 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
416 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
417 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
418 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
419 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
420 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
421 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
422 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
423 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
424 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
425 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
426 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
427 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
428 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
429 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
430 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
431 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
432 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
433 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
434 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
435 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
436 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
437 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
438 EVEX_W_0F3A72_P_2): Rename to ...
439 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
440 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
441 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
442 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
443 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
444 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
445 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
446 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
447 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
448 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
449 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
450 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
451 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
452 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
453 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
454 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
455 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
456 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
457 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
458 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
459 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
460 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
461 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
462 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
463 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
464 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
465 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
466 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
467 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
468 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
469 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
470 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
471 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
472 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
473 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
474 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
475 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
476 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
477 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
478 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
479 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
480 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
481 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
482 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
483 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
484 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
485 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
486 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
487 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
488 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
489 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
490 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
491 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
492 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
493 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
494 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
495 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
496 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
497 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
498 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
499 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
500 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
501 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
502 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
503 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
504 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
505 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
506 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
507 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
508 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
509 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
510 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
512 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
513 vex_w_table, mod_table): Replace / remove respective entries.
514 (print_insn): Move up dp->prefix_requirement handling. Handle
516 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
517 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
518 Replace / remove respective entries.
520 2020-07-14 Jan Beulich <jbeulich@suse.com>
522 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
523 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
524 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
525 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
526 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
528 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
529 0F2C, 0F2D, 0F2E, and 0F2F.
530 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
533 2020-07-14 Jan Beulich <jbeulich@suse.com>
535 * i386-dis.c (OP_VexR, VexScalarR): New.
536 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
537 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
538 need_vex_reg): Delete.
539 (prefix_table): Replace VexScalar by VexScalarR and
540 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
541 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
542 (vex_len_table): Replace EXqVexScalarS by EXqS.
543 (get_valid_dis386): Don't set need_vex_reg.
544 (print_insn): Don't initialize need_vex_reg.
545 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
546 q_scalar_swap_mode cases.
547 (OP_EX): Don't check for d_scalar_swap_mode and
549 (OP_VEX): Done check need_vex_reg.
550 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
551 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
552 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
554 2020-07-14 Jan Beulich <jbeulich@suse.com>
556 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
557 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
558 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
559 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
560 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
561 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
562 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
563 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
564 (vex_table): Replace Vex128 by Vex.
565 (vex_len_table): Likewise. Adjust referenced enum names.
566 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
567 referenced enum names.
568 (OP_VEX): Drop vex128_mode and vex256_mode cases.
569 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
571 2020-07-14 Jan Beulich <jbeulich@suse.com>
573 * i386-dis.c (dis386): "LW" description now applies to "DQ".
574 (putop): Handle "DQ". Don't handle "LW" anymore.
575 (prefix_table, mod_table): Replace %LW by %DQ.
576 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
578 2020-07-14 Jan Beulich <jbeulich@suse.com>
580 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
581 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
582 d_scalar_swap_mode case handling. Move shift adjsutment into
583 the case its applicable to.
585 2020-07-14 Jan Beulich <jbeulich@suse.com>
587 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
588 (EXbScalar, EXwScalar): Fold to ...
589 (EXbwUnit): ... this.
590 (b_scalar_mode, w_scalar_mode): Fold to ...
591 (bw_unit_mode): ... this.
592 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
593 w_scalar_mode handling by bw_unit_mode one.
594 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
596 * i386-dis-evex-prefix.h: ... here.
598 2020-07-14 Jan Beulich <jbeulich@suse.com>
600 * i386-dis.c (PCMPESTR_Fixup): Delete.
601 (dis386): Adjust "LQ" description.
602 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
603 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
604 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
605 vpcmpestrm, and vpcmpestri.
606 (putop): Honor "cond" when handling LQ.
607 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
608 vcvtsi2ss and vcvtusi2ss.
609 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
610 vcvtsi2sd and vcvtusi2sd.
612 2020-07-14 Jan Beulich <jbeulich@suse.com>
614 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
615 (simd_cmp_op): Add const.
616 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
617 (CMP_Fixup): Handle VEX case.
618 (prefix_table): Replace VCMP by CMP.
619 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
621 2020-07-14 Jan Beulich <jbeulich@suse.com>
623 * i386-dis.c (MOVBE_Fixup): Delete.
625 (prefix_table): Use Mv for movbe entries.
627 2020-07-14 Jan Beulich <jbeulich@suse.com>
629 * i386-dis.c (CRC32_Fixup): Delete.
630 (prefix_table): Use Eb/Ev for crc32 entries.
632 2020-07-14 Jan Beulich <jbeulich@suse.com>
634 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
635 Conditionalize invocations of "USED_REX (0)".
637 2020-07-14 Jan Beulich <jbeulich@suse.com>
639 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
640 CH, DH, BH, AX, DX): Delete.
641 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
642 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
643 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
645 2020-07-10 Lili Cui <lili.cui@intel.com>
647 * i386-dis.c (TMM): New.
650 (MVexSIBMEM): Likewise.
651 (tmm_mode): Likewise.
652 (vex_sibmem_mode): Likewise.
653 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
654 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
655 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
656 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
657 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
658 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
659 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
660 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
661 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
662 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
663 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
664 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
665 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
666 (PREFIX_VEX_0F3849_X86_64): Likewise.
667 (PREFIX_VEX_0F384B_X86_64): Likewise.
668 (PREFIX_VEX_0F385C_X86_64): Likewise.
669 (PREFIX_VEX_0F385E_X86_64): Likewise.
670 (X86_64_VEX_0F3849): Likewise.
671 (X86_64_VEX_0F384B): Likewise.
672 (X86_64_VEX_0F385C): Likewise.
673 (X86_64_VEX_0F385E): Likewise.
674 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
675 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
676 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
677 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
678 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
679 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
680 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
681 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
682 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
683 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
684 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
685 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
686 (VEX_W_0F3849_X86_64_P_0): Likewise.
687 (VEX_W_0F3849_X86_64_P_2): Likewise.
688 (VEX_W_0F3849_X86_64_P_3): Likewise.
689 (VEX_W_0F384B_X86_64_P_1): Likewise.
690 (VEX_W_0F384B_X86_64_P_2): Likewise.
691 (VEX_W_0F384B_X86_64_P_3): Likewise.
692 (VEX_W_0F385C_X86_64_P_1): Likewise.
693 (VEX_W_0F385E_X86_64_P_0): Likewise.
694 (VEX_W_0F385E_X86_64_P_1): Likewise.
695 (VEX_W_0F385E_X86_64_P_2): Likewise.
696 (VEX_W_0F385E_X86_64_P_3): Likewise.
697 (names_tmm): Likewise.
698 (att_names_tmm): Likewise.
699 (intel_operand_size): Handle void_mode.
700 (OP_XMM): Handle tmm_mode.
703 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
704 CpuAMX_BF16 and CpuAMX_TILE.
705 (operand_type_shorthands): Add RegTMM.
706 (operand_type_init): Likewise.
707 (operand_types): Add Tmmword.
708 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
709 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
710 * i386-opc.h (CpuAMX_INT8): New.
711 (CpuAMX_BF16): Likewise.
712 (CpuAMX_TILE): Likewise.
715 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
716 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
717 (i386_operand_type): Add tmmword.
718 * i386-opc.tbl: Add AMX instructions.
719 * i386-reg.tbl: Add AMX registers.
720 * i386-init.h: Regenerated.
721 * i386-tbl.h: Likewise.
723 2020-07-08 Jan Beulich <jbeulich@suse.com>
725 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
726 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
728 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
729 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
731 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
732 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
733 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
734 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
735 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
736 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
737 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
738 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
739 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
740 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
741 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
742 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
743 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
744 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
745 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
746 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
747 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
748 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
749 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
750 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
751 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
752 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
753 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
754 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
755 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
756 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
757 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
758 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
759 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
760 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
761 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
762 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
763 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
764 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
765 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
766 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
767 (reg_table): Re-order XOP entries. Adjust their operands.
768 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
769 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
770 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
771 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
772 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
773 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
774 entries by references ...
775 (vex_len_table): ... to resepctive new entries here. For several
776 new and existing entries reference ...
777 (vex_w_table): ... new entries here.
778 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
780 2020-07-08 Jan Beulich <jbeulich@suse.com>
782 * i386-dis.c (XMVexScalarI4): Define.
783 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
784 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
785 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
786 (vex_len_table): Move scalar FMA4 entries ...
787 (prefix_table): ... here.
788 (OP_REG_VexI4): Handle scalar_mode.
789 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
790 * i386-tbl.h: Re-generate.
792 2020-07-08 Jan Beulich <jbeulich@suse.com>
794 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
796 (OP_VexW, VexW): New.
797 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
798 for shifts and rotates by register.
800 2020-07-08 Jan Beulich <jbeulich@suse.com>
802 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
803 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
804 OP_EX_VexReg): Delete.
805 (OP_VexI4, VexI4): New.
806 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
807 (prefix_table): ... here.
808 (print_insn): Drop setting of vex_w_done.
810 2020-07-08 Jan Beulich <jbeulich@suse.com>
812 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
813 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
814 (xop_table): Replace operands of 4-operand insns.
815 (OP_REG_VexI4): Move VEX.W based operand swaping here.
817 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
819 * arc-opc.c (insert_rbd): New function.
822 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
825 2020-07-07 Jan Beulich <jbeulich@suse.com>
827 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
828 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
829 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
830 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
832 (putop): Handle "BW".
833 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
834 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
836 * i386-dis-evex-prefix.h: ... here.
838 2020-07-06 Jan Beulich <jbeulich@suse.com>
840 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
841 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
842 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
843 VEX_W_0FXOP_09_83): New enumerators.
844 (xop_table): Reference the above.
845 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
846 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
847 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
848 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
850 2020-07-06 Jan Beulich <jbeulich@suse.com>
852 * i386-dis.c (EVEX_W_0F3838_P_1,
853 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
854 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
855 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
856 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
857 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
858 (putop): Centralize management of last[]. Delete SAVE_LAST.
859 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
860 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
861 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
862 * i386-dis-evex-prefix.h: here.
864 2020-07-06 Jan Beulich <jbeulich@suse.com>
866 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
867 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
868 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
869 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
871 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
872 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
873 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
874 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
875 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
876 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
877 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
878 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
880 * i386-dis-evex-len.h: Adjust comments.
881 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
882 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
883 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
884 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
885 MOD_EVEX_0F385B_P_2_W_1 table entries.
886 * i386-dis-evex-w.h: Reference mod_table[] for
887 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
890 2020-07-06 Jan Beulich <jbeulich@suse.com>
892 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
893 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
895 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
896 Likewise. Mark 256-bit entries invalid.
898 2020-07-06 Jan Beulich <jbeulich@suse.com>
900 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
901 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
902 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
903 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
904 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
905 PREFIX_EVEX_0F382B): Delete.
906 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
907 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
908 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
909 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
910 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
912 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
913 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
914 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
915 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
917 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
918 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
919 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
920 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
921 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
922 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
923 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
924 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
925 PREFIX_EVEX_0F382B): Remove table entries.
926 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
927 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
928 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
930 2020-07-06 Jan Beulich <jbeulich@suse.com>
932 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
933 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
935 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
936 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
937 EVEX_LEN_0F3A01_P_2_W_1 table entries.
938 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
941 2020-07-06 Jan Beulich <jbeulich@suse.com>
943 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
944 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
945 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
946 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
947 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
948 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
949 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
950 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
951 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
954 2020-07-06 Jan Beulich <jbeulich@suse.com>
956 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
957 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
958 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
960 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
962 * i386-dis-evex.h (evex_table): Reference VEX table entry for
964 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
966 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
968 2020-07-06 Jan Beulich <jbeulich@suse.com>
970 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
971 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
972 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
973 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
974 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
975 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
976 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
977 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
978 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
979 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
980 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
981 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
982 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
983 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
984 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
985 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
986 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
987 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
988 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
989 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
990 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
991 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
992 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
993 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
994 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
995 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
996 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
997 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
998 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
999 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1000 (prefix_table): Add EXxEVexR to FMA table entries.
1001 (OP_Rounding): Move abort() invocation.
1002 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1003 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1004 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1005 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1006 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1007 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1008 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1009 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1010 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1011 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1013 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1014 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1015 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1016 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1017 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1018 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1019 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1020 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1021 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1022 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1023 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1024 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1025 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1026 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1027 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1028 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1029 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1030 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1031 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1032 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1033 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1034 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1035 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1036 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1037 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1038 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1039 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1040 Delete table entries.
1041 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1042 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1043 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1046 2020-07-06 Jan Beulich <jbeulich@suse.com>
1048 * i386-dis.c (EXqScalarS): Delete.
1049 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1050 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1052 2020-07-06 Jan Beulich <jbeulich@suse.com>
1054 * i386-dis.c (safe-ctype.h): Include.
1055 (EXdScalar, EXqScalar): Delete.
1056 (d_scalar_mode, q_scalar_mode): Delete.
1057 (prefix_table, vex_len_table): Use EXxmm_md in place of
1058 EXdScalar and EXxmm_mq in place of EXqScalar.
1059 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1060 d_scalar_mode and q_scalar_mode.
1061 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1062 (vmovsd): Use EXxmm_mq.
1064 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1067 * arc-dis.c: Fix spelling mistake.
1068 * po/opcodes.pot: Regenerate.
1070 2020-07-06 Nick Clifton <nickc@redhat.com>
1072 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1073 * po/uk.po: Updated Ukranian translation.
1075 2020-07-04 Nick Clifton <nickc@redhat.com>
1077 * configure: Regenerate.
1078 * po/opcodes.pot: Regenerate.
1080 2020-07-04 Nick Clifton <nickc@redhat.com>
1082 Binutils 2.35 branch created.
1084 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1086 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1087 * i386-opc.h (VexSwapSources): New.
1088 (i386_opcode_modifier): Add vexswapsources.
1089 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1090 with two source operands swapped.
1091 * i386-tbl.h: Regenerated.
1093 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1095 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1096 unprivileged CSR can also be initialized.
1098 2020-06-29 Alan Modra <amodra@gmail.com>
1100 * arm-dis.c: Use C style comments.
1101 * cr16-opc.c: Likewise.
1102 * ft32-dis.c: Likewise.
1103 * moxie-opc.c: Likewise.
1104 * tic54x-dis.c: Likewise.
1105 * s12z-opc.c: Remove useless comment.
1106 * xgate-dis.c: Likewise.
1108 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1110 * i386-opc.tbl: Add a blank line.
1112 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1114 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1115 (VecSIB128): Renamed to ...
1117 (VecSIB256): Renamed to ...
1119 (VecSIB512): Renamed to ...
1121 (VecSIB): Renamed to ...
1123 (i386_opcode_modifier): Replace vecsib with sib.
1124 * i386-opc.tbl (VecSIB128): New.
1125 (VecSIB256): Likewise.
1126 (VecSIB512): Likewise.
1127 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1128 and VecSIB512, respectively.
1130 2020-06-26 Jan Beulich <jbeulich@suse.com>
1132 * i386-dis.c: Adjust description of I macro.
1133 (x86_64_table): Drop use of I.
1134 (float_mem): Replace use of I.
1135 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1137 2020-06-26 Jan Beulich <jbeulich@suse.com>
1139 * i386-dis.c: (print_insn): Avoid straight assignment to
1140 priv.orig_sizeflag when processing -M sub-options.
1142 2020-06-25 Jan Beulich <jbeulich@suse.com>
1144 * i386-dis.c: Adjust description of J macro.
1145 (dis386, x86_64_table, mod_table): Replace J.
1146 (putop): Remove handling of J.
1148 2020-06-25 Jan Beulich <jbeulich@suse.com>
1150 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1152 2020-06-25 Jan Beulich <jbeulich@suse.com>
1154 * i386-dis.c: Adjust description of "LQ" macro.
1155 (dis386_twobyte): Use LQ for sysret.
1156 (putop): Adjust handling of LQ.
1158 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1160 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1161 * riscv-dis.c: Include elfxx-riscv.h.
1163 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1165 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1167 2020-06-17 Lili Cui <lili.cui@intel.com>
1169 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1171 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1174 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1175 * i386-opc.tbl: Likewise.
1176 * i386-tbl.h: Regenerated.
1178 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1180 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1182 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1184 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1185 (SR_CORE): Likewise.
1186 (SR_FEAT): Likewise.
1188 (SR_V8_1): Likewise.
1189 (SR_V8_2): Likewise.
1190 (SR_V8_3): Likewise.
1191 (SR_V8_4): Likewise.
1194 (SR_SSBS): Likewise.
1196 (SR_ID_PFR2): Likewise.
1197 (SR_PROFILE): Likewise.
1198 (SR_MEMTAG): Likewise.
1199 (SR_SCXTNUM): Likewise.
1200 (aarch64_sys_regs): Refactor to store feature information in the table.
1201 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1202 that now describe their own features.
1203 (aarch64_pstatefield_supported_p): Likewise.
1205 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1207 * i386-dis.c (prefix_table): Fix a typo in comments.
1209 2020-06-09 Jan Beulich <jbeulich@suse.com>
1211 * i386-dis.c (rex_ignored): Delete.
1212 (ckprefix): Drop rex_ignored initialization.
1213 (get_valid_dis386): Drop setting of rex_ignored.
1214 (print_insn): Drop checking of rex_ignored. Don't record data
1215 size prefix as used with VEX-and-alike encodings.
1217 2020-06-09 Jan Beulich <jbeulich@suse.com>
1219 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1220 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1221 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1222 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1223 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1224 VEX_0F12, and VEX_0F16.
1225 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1226 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1227 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1228 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1229 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1230 MOD_VEX_0F16_PREFIX_2 entries.
1232 2020-06-09 Jan Beulich <jbeulich@suse.com>
1234 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1235 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1236 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1237 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1238 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1239 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1240 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1241 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1242 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1243 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1244 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1245 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1246 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1247 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1248 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1249 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1250 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1251 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1252 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1253 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1254 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1255 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1256 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1257 EVEX_W_0FC6_P_2): Delete.
1258 (print_insn): Add EVEX.W vs embedded prefix consistency check
1259 to prefix validation.
1260 * i386-dis-evex.h (evex_table): Don't further descend for
1261 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1262 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1264 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1265 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1266 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1267 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1268 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1269 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1270 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1271 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1272 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1273 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1274 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1275 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1276 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1277 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1278 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1279 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1280 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1281 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1282 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1283 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1284 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1285 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1286 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1287 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1288 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1289 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1290 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1292 2020-06-09 Jan Beulich <jbeulich@suse.com>
1294 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1295 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1296 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1298 (print_insn): Drop pointless check against bad_opcode. Split
1299 prefix validation into legacy and VEX-and-alike parts.
1300 (putop): Re-work 'X' macro handling.
1302 2020-06-09 Jan Beulich <jbeulich@suse.com>
1304 * i386-dis.c (MOD_0F51): Rename to ...
1305 (MOD_0F50): ... this.
1307 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1309 * arm-dis.c (arm_opcodes): Add dfb.
1310 (thumb32_opcodes): Add dfb.
1312 2020-06-08 Jan Beulich <jbeulich@suse.com>
1314 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1316 2020-06-06 Alan Modra <amodra@gmail.com>
1318 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1320 2020-06-05 Alan Modra <amodra@gmail.com>
1322 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1323 size is large enough.
1325 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1327 * disassemble.c (disassemble_init_for_target): Set endian_code for
1329 * bpf-desc.c: Regenerate.
1330 * bpf-opc.c: Likewise.
1331 * bpf-dis.c: Likewise.
1333 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1335 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1336 (cgen_put_insn_value): Likewise.
1337 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1338 * cgen-dis.in (print_insn): Likewise.
1339 * cgen-ibld.in (insert_1): Likewise.
1340 (insert_1): Likewise.
1341 (insert_insn_normal): Likewise.
1342 (extract_1): Likewise.
1343 * bpf-dis.c: Regenerate.
1344 * bpf-ibld.c: Likewise.
1345 * bpf-ibld.c: Likewise.
1346 * cgen-dis.in: Likewise.
1347 * cgen-ibld.in: Likewise.
1348 * cgen-opc.c: Likewise.
1349 * epiphany-dis.c: Likewise.
1350 * epiphany-ibld.c: Likewise.
1351 * fr30-dis.c: Likewise.
1352 * fr30-ibld.c: Likewise.
1353 * frv-dis.c: Likewise.
1354 * frv-ibld.c: Likewise.
1355 * ip2k-dis.c: Likewise.
1356 * ip2k-ibld.c: Likewise.
1357 * iq2000-dis.c: Likewise.
1358 * iq2000-ibld.c: Likewise.
1359 * lm32-dis.c: Likewise.
1360 * lm32-ibld.c: Likewise.
1361 * m32c-dis.c: Likewise.
1362 * m32c-ibld.c: Likewise.
1363 * m32r-dis.c: Likewise.
1364 * m32r-ibld.c: Likewise.
1365 * mep-dis.c: Likewise.
1366 * mep-ibld.c: Likewise.
1367 * mt-dis.c: Likewise.
1368 * mt-ibld.c: Likewise.
1369 * or1k-dis.c: Likewise.
1370 * or1k-ibld.c: Likewise.
1371 * xc16x-dis.c: Likewise.
1372 * xc16x-ibld.c: Likewise.
1373 * xstormy16-dis.c: Likewise.
1374 * xstormy16-ibld.c: Likewise.
1376 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1378 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1379 (print_insn_): Handle instruction endian.
1380 * bpf-dis.c: Regenerate.
1381 * bpf-desc.c: Regenerate.
1382 * epiphany-dis.c: Likewise.
1383 * epiphany-desc.c: Likewise.
1384 * fr30-dis.c: Likewise.
1385 * fr30-desc.c: Likewise.
1386 * frv-dis.c: Likewise.
1387 * frv-desc.c: Likewise.
1388 * ip2k-dis.c: Likewise.
1389 * ip2k-desc.c: Likewise.
1390 * iq2000-dis.c: Likewise.
1391 * iq2000-desc.c: Likewise.
1392 * lm32-dis.c: Likewise.
1393 * lm32-desc.c: Likewise.
1394 * m32c-dis.c: Likewise.
1395 * m32c-desc.c: Likewise.
1396 * m32r-dis.c: Likewise.
1397 * m32r-desc.c: Likewise.
1398 * mep-dis.c: Likewise.
1399 * mep-desc.c: Likewise.
1400 * mt-dis.c: Likewise.
1401 * mt-desc.c: Likewise.
1402 * or1k-dis.c: Likewise.
1403 * or1k-desc.c: Likewise.
1404 * xc16x-dis.c: Likewise.
1405 * xc16x-desc.c: Likewise.
1406 * xstormy16-dis.c: Likewise.
1407 * xstormy16-desc.c: Likewise.
1409 2020-06-03 Nick Clifton <nickc@redhat.com>
1411 * po/sr.po: Updated Serbian translation.
1413 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1415 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1416 (riscv_get_priv_spec_class): Likewise.
1418 2020-06-01 Alan Modra <amodra@gmail.com>
1420 * bpf-desc.c: Regenerate.
1422 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1423 David Faust <david.faust@oracle.com>
1425 * bpf-desc.c: Regenerate.
1426 * bpf-opc.h: Likewise.
1427 * bpf-opc.c: Likewise.
1428 * bpf-dis.c: Likewise.
1430 2020-05-28 Alan Modra <amodra@gmail.com>
1432 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1435 2020-05-28 Alan Modra <amodra@gmail.com>
1437 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1439 (print_insn_ns32k): Revert last change.
1441 2020-05-28 Nick Clifton <nickc@redhat.com>
1443 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1446 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1448 Fix extraction of signed constants in nios2 disassembler (again).
1450 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1451 extractions of signed fields.
1453 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1455 * s390-opc.txt: Relocate vector load/store instructions with
1456 additional alignment parameter and change architecture level
1457 constraint from z14 to z13.
1459 2020-05-21 Alan Modra <amodra@gmail.com>
1461 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1462 * sparc-dis.c: Likewise.
1463 * tic4x-dis.c: Likewise.
1464 * xtensa-dis.c: Likewise.
1465 * bpf-desc.c: Regenerate.
1466 * epiphany-desc.c: Regenerate.
1467 * fr30-desc.c: Regenerate.
1468 * frv-desc.c: Regenerate.
1469 * ip2k-desc.c: Regenerate.
1470 * iq2000-desc.c: Regenerate.
1471 * lm32-desc.c: Regenerate.
1472 * m32c-desc.c: Regenerate.
1473 * m32r-desc.c: Regenerate.
1474 * mep-asm.c: Regenerate.
1475 * mep-desc.c: Regenerate.
1476 * mt-desc.c: Regenerate.
1477 * or1k-desc.c: Regenerate.
1478 * xc16x-desc.c: Regenerate.
1479 * xstormy16-desc.c: Regenerate.
1481 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1483 * riscv-opc.c (riscv_ext_version_table): The table used to store
1484 all information about the supported spec and the corresponding ISA
1485 versions. Currently, only Zicsr is supported to verify the
1486 correctness of Z sub extension settings. Others will be supported
1487 in the future patches.
1488 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1489 classes and the corresponding strings.
1490 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1491 spec class by giving a ISA spec string.
1492 * riscv-opc.c (struct priv_spec_t): New structure.
1493 (struct priv_spec_t priv_specs): List for all supported privilege spec
1494 classes and the corresponding strings.
1495 (riscv_get_priv_spec_class): New function. Get the corresponding
1496 privilege spec class by giving a spec string.
1497 (riscv_get_priv_spec_name): New function. Get the corresponding
1498 privilege spec string by giving a CSR version class.
1499 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1500 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1501 according to the chosen version. Build a hash table riscv_csr_hash to
1502 store the valid CSR for the chosen pirv verison. Dump the direct
1503 CSR address rather than it's name if it is invalid.
1504 (parse_riscv_dis_option_without_args): New function. Parse the options
1506 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1507 parse the options without arguments first, and then handle the options
1508 with arguments. Add the new option -Mpriv-spec, which has argument.
1509 * riscv-dis.c (print_riscv_disassembler_options): Add description
1510 about the new OBJDUMP option.
1512 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1514 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1515 WC values on POWER10 sync, dcbf and wait instructions.
1516 (insert_pl, extract_pl): New functions.
1517 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1518 (LS3): New , 3-bit L for sync.
1519 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1520 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1521 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1522 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1523 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1524 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1525 <wait>: Enable PL operand on POWER10.
1526 <dcbf>: Enable L3OPT operand on POWER10.
1527 <sync>: Enable SC2 operand on POWER10.
1529 2020-05-19 Stafford Horne <shorne@gmail.com>
1532 * or1k-asm.c: Regenerate.
1533 * or1k-desc.c: Regenerate.
1534 * or1k-desc.h: Regenerate.
1535 * or1k-dis.c: Regenerate.
1536 * or1k-ibld.c: Regenerate.
1537 * or1k-opc.c: Regenerate.
1538 * or1k-opc.h: Regenerate.
1539 * or1k-opinst.c: Regenerate.
1541 2020-05-11 Alan Modra <amodra@gmail.com>
1543 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1546 2020-05-11 Alan Modra <amodra@gmail.com>
1548 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1549 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1551 2020-05-11 Alan Modra <amodra@gmail.com>
1553 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1555 2020-05-11 Alan Modra <amodra@gmail.com>
1557 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1558 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1560 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1562 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1565 2020-05-11 Alan Modra <amodra@gmail.com>
1567 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1568 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1569 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1570 (prefix_opcodes): Add xxeval.
1572 2020-05-11 Alan Modra <amodra@gmail.com>
1574 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1575 xxgenpcvwm, xxgenpcvdm.
1577 2020-05-11 Alan Modra <amodra@gmail.com>
1579 * ppc-opc.c (MP, VXVAM_MASK): Define.
1580 (VXVAPS_MASK): Use VXVA_MASK.
1581 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1582 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1583 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1584 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1586 2020-05-11 Alan Modra <amodra@gmail.com>
1587 Peter Bergner <bergner@linux.ibm.com>
1589 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1591 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1592 YMSK2, XA6a, XA6ap, XB6a entries.
1593 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1594 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1596 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1597 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1598 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1599 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1600 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1601 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1602 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1603 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1604 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1605 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1606 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1607 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1608 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1609 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1611 2020-05-11 Alan Modra <amodra@gmail.com>
1613 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1614 (insert_xts, extract_xts): New functions.
1615 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1616 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1617 (VXRC_MASK, VXSH_MASK): Define.
1618 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1619 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1620 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1621 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1622 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1623 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1624 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1626 2020-05-11 Alan Modra <amodra@gmail.com>
1628 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1629 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1630 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1631 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1632 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1634 2020-05-11 Alan Modra <amodra@gmail.com>
1636 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1637 (XTP, DQXP, DQXP_MASK): Define.
1638 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1639 (prefix_opcodes): Add plxvp and pstxvp.
1641 2020-05-11 Alan Modra <amodra@gmail.com>
1643 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1644 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1645 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1647 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1649 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1651 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1653 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1655 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1657 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1659 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1661 2020-05-11 Alan Modra <amodra@gmail.com>
1663 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1665 2020-05-11 Alan Modra <amodra@gmail.com>
1667 * ppc-dis.c (ppc_opts): Add "power10" entry.
1668 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1669 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1671 2020-05-11 Nick Clifton <nickc@redhat.com>
1673 * po/fr.po: Updated French translation.
1675 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1677 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1678 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1679 (operand_general_constraint_met_p): validate
1680 AARCH64_OPND_UNDEFINED.
1681 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1683 * aarch64-asm-2.c: Regenerated.
1684 * aarch64-dis-2.c: Regenerated.
1685 * aarch64-opc-2.c: Regenerated.
1687 2020-04-29 Nick Clifton <nickc@redhat.com>
1690 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1693 2020-04-29 Nick Clifton <nickc@redhat.com>
1695 * po/sv.po: Updated Swedish translation.
1697 2020-04-29 Nick Clifton <nickc@redhat.com>
1700 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1701 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1702 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1705 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1708 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1709 cmpi only on m68020up and cpu32.
1711 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1713 * aarch64-asm.c (aarch64_ins_none): New.
1714 * aarch64-asm.h (ins_none): New declaration.
1715 * aarch64-dis.c (aarch64_ext_none): New.
1716 * aarch64-dis.h (ext_none): New declaration.
1717 * aarch64-opc.c (aarch64_print_operand): Update case for
1718 AARCH64_OPND_BARRIER_PSB.
1719 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1720 (AARCH64_OPERANDS): Update inserter/extracter for
1721 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1722 * aarch64-asm-2.c: Regenerated.
1723 * aarch64-dis-2.c: Regenerated.
1724 * aarch64-opc-2.c: Regenerated.
1726 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1728 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1729 (aarch64_feature_ras, RAS): Likewise.
1730 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1731 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1732 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1733 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1734 * aarch64-asm-2.c: Regenerated.
1735 * aarch64-dis-2.c: Regenerated.
1736 * aarch64-opc-2.c: Regenerated.
1738 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1740 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1741 (print_insn_neon): Support disassembly of conditional
1744 2020-02-16 David Faust <david.faust@oracle.com>
1746 * bpf-desc.c: Regenerate.
1747 * bpf-desc.h: Likewise.
1748 * bpf-opc.c: Regenerate.
1749 * bpf-opc.h: Likewise.
1751 2020-04-07 Lili Cui <lili.cui@intel.com>
1753 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1754 (prefix_table): New instructions (see prefixes above).
1755 (rm_table): Likewise
1756 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1757 CPU_ANY_TSXLDTRK_FLAGS.
1758 (cpu_flags): Add CpuTSXLDTRK.
1759 * i386-opc.h (enum): Add CpuTSXLDTRK.
1760 (i386_cpu_flags): Add cputsxldtrk.
1761 * i386-opc.tbl: Add XSUSPLDTRK insns.
1762 * i386-init.h: Regenerate.
1763 * i386-tbl.h: Likewise.
1765 2020-04-02 Lili Cui <lili.cui@intel.com>
1767 * i386-dis.c (prefix_table): New instructions serialize.
1768 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1769 CPU_ANY_SERIALIZE_FLAGS.
1770 (cpu_flags): Add CpuSERIALIZE.
1771 * i386-opc.h (enum): Add CpuSERIALIZE.
1772 (i386_cpu_flags): Add cpuserialize.
1773 * i386-opc.tbl: Add SERIALIZE insns.
1774 * i386-init.h: Regenerate.
1775 * i386-tbl.h: Likewise.
1777 2020-03-26 Alan Modra <amodra@gmail.com>
1779 * disassemble.h (opcodes_assert): Declare.
1780 (OPCODES_ASSERT): Define.
1781 * disassemble.c: Don't include assert.h. Include opintl.h.
1782 (opcodes_assert): New function.
1783 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1784 (bfd_h8_disassemble): Reduce size of data array. Correctly
1785 calculate maxlen. Omit insn decoding when insn length exceeds
1786 maxlen. Exit from nibble loop when looking for E, before
1787 accessing next data byte. Move processing of E outside loop.
1788 Replace tests of maxlen in loop with assertions.
1790 2020-03-26 Alan Modra <amodra@gmail.com>
1792 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1794 2020-03-25 Alan Modra <amodra@gmail.com>
1796 * z80-dis.c (suffix): Init mybuf.
1798 2020-03-22 Alan Modra <amodra@gmail.com>
1800 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1801 successflly read from section.
1803 2020-03-22 Alan Modra <amodra@gmail.com>
1805 * arc-dis.c (find_format): Use ISO C string concatenation rather
1806 than line continuation within a string. Don't access needs_limm
1807 before testing opcode != NULL.
1809 2020-03-22 Alan Modra <amodra@gmail.com>
1811 * ns32k-dis.c (print_insn_arg): Update comment.
1812 (print_insn_ns32k): Reduce size of index_offset array, and
1813 initialize, passing -1 to print_insn_arg for args that are not
1814 an index. Don't exit arg loop early. Abort on bad arg number.
1816 2020-03-22 Alan Modra <amodra@gmail.com>
1818 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1819 * s12z-opc.c: Formatting.
1820 (operands_f): Return an int.
1821 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1822 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1823 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1824 (exg_sex_discrim): Likewise.
1825 (create_immediate_operand, create_bitfield_operand),
1826 (create_register_operand_with_size, create_register_all_operand),
1827 (create_register_all16_operand, create_simple_memory_operand),
1828 (create_memory_operand, create_memory_auto_operand): Don't
1829 segfault on malloc failure.
1830 (z_ext24_decode): Return an int status, negative on fail, zero
1832 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1833 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1834 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1835 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1836 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1837 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1838 (loop_primitive_decode, shift_decode, psh_pul_decode),
1839 (bit_field_decode): Similarly.
1840 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1841 to return value, update callers.
1842 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1843 Don't segfault on NULL operand.
1844 (decode_operation): Return OP_INVALID on first fail.
1845 (decode_s12z): Check all reads, returning -1 on fail.
1847 2020-03-20 Alan Modra <amodra@gmail.com>
1849 * metag-dis.c (print_insn_metag): Don't ignore status from
1852 2020-03-20 Alan Modra <amodra@gmail.com>
1854 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1855 Initialize parts of buffer not written when handling a possible
1856 2-byte insn at end of section. Don't attempt decoding of such
1857 an insn by the 4-byte machinery.
1859 2020-03-20 Alan Modra <amodra@gmail.com>
1861 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1862 partially filled buffer. Prevent lookup of 4-byte insns when
1863 only VLE 2-byte insns are possible due to section size. Print
1864 ".word" rather than ".long" for 2-byte leftovers.
1866 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1869 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1871 2020-03-13 Jan Beulich <jbeulich@suse.com>
1873 * i386-dis.c (X86_64_0D): Rename to ...
1874 (X86_64_0E): ... this.
1876 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1878 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1879 * Makefile.in: Regenerated.
1881 2020-03-09 Jan Beulich <jbeulich@suse.com>
1883 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1885 * i386-tbl.h: Re-generate.
1887 2020-03-09 Jan Beulich <jbeulich@suse.com>
1889 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1890 vprot*, vpsha*, and vpshl*.
1891 * i386-tbl.h: Re-generate.
1893 2020-03-09 Jan Beulich <jbeulich@suse.com>
1895 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1896 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1897 * i386-tbl.h: Re-generate.
1899 2020-03-09 Jan Beulich <jbeulich@suse.com>
1901 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1902 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1903 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1904 * i386-tbl.h: Re-generate.
1906 2020-03-09 Jan Beulich <jbeulich@suse.com>
1908 * i386-gen.c (struct template_arg, struct template_instance,
1909 struct template_param, struct template, templates,
1910 parse_template, expand_templates): New.
1911 (process_i386_opcodes): Various local variables moved to
1912 expand_templates. Call parse_template and expand_templates.
1913 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1914 * i386-tbl.h: Re-generate.
1916 2020-03-06 Jan Beulich <jbeulich@suse.com>
1918 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1919 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1920 register and memory source templates. Replace VexW= by VexW*
1922 * i386-tbl.h: Re-generate.
1924 2020-03-06 Jan Beulich <jbeulich@suse.com>
1926 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1927 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1928 * i386-tbl.h: Re-generate.
1930 2020-03-06 Jan Beulich <jbeulich@suse.com>
1932 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1933 * i386-tbl.h: Re-generate.
1935 2020-03-06 Jan Beulich <jbeulich@suse.com>
1937 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1938 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1939 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1940 VexW0 on SSE2AVX variants.
1941 (vmovq): Drop NoRex64 from XMM/XMM variants.
1942 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1943 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1944 applicable use VexW0.
1945 * i386-tbl.h: Re-generate.
1947 2020-03-06 Jan Beulich <jbeulich@suse.com>
1949 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1950 * i386-opc.h (Rex64): Delete.
1951 (struct i386_opcode_modifier): Remove rex64 field.
1952 * i386-opc.tbl (crc32): Drop Rex64.
1953 Replace Rex64 with Size64 everywhere else.
1954 * i386-tbl.h: Re-generate.
1956 2020-03-06 Jan Beulich <jbeulich@suse.com>
1958 * i386-dis.c (OP_E_memory): Exclude recording of used address
1959 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1960 addressed memory operands for MPX insns.
1962 2020-03-06 Jan Beulich <jbeulich@suse.com>
1964 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1965 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1966 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1967 (ptwrite): Split into non-64-bit and 64-bit forms.
1968 * i386-tbl.h: Re-generate.
1970 2020-03-06 Jan Beulich <jbeulich@suse.com>
1972 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1974 * i386-tbl.h: Re-generate.
1976 2020-03-04 Jan Beulich <jbeulich@suse.com>
1978 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1979 (prefix_table): Move vmmcall here. Add vmgexit.
1980 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1981 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1982 (cpu_flags): Add CpuSEV_ES entry.
1983 * i386-opc.h (CpuSEV_ES): New.
1984 (union i386_cpu_flags): Add cpusev_es field.
1985 * i386-opc.tbl (vmgexit): New.
1986 * i386-init.h, i386-tbl.h: Re-generate.
1988 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1990 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1992 * i386-opc.h (IGNORESIZE): New.
1993 (DEFAULTSIZE): Likewise.
1994 (IgnoreSize): Removed.
1995 (DefaultSize): Likewise.
1996 (MnemonicSize): New.
1997 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1999 * i386-opc.tbl (IgnoreSize): New.
2000 (DefaultSize): Likewise.
2001 * i386-tbl.h: Regenerated.
2003 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2006 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2009 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2012 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2013 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2014 * i386-tbl.h: Regenerated.
2016 2020-02-26 Alan Modra <amodra@gmail.com>
2018 * aarch64-asm.c: Indent labels correctly.
2019 * aarch64-dis.c: Likewise.
2020 * aarch64-gen.c: Likewise.
2021 * aarch64-opc.c: Likewise.
2022 * alpha-dis.c: Likewise.
2023 * i386-dis.c: Likewise.
2024 * nds32-asm.c: Likewise.
2025 * nfp-dis.c: Likewise.
2026 * visium-dis.c: Likewise.
2028 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2030 * arc-regs.h (int_vector_base): Make it available for all ARC
2033 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2035 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2038 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2040 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2041 c.mv/c.li if rs1 is zero.
2043 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2045 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2046 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2048 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2049 * i386-opc.h (CpuABM): Removed.
2051 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2052 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2053 popcnt. Remove CpuABM from lzcnt.
2054 * i386-init.h: Regenerated.
2055 * i386-tbl.h: Likewise.
2057 2020-02-17 Jan Beulich <jbeulich@suse.com>
2059 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2060 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2061 VexW1 instead of open-coding them.
2062 * i386-tbl.h: Re-generate.
2064 2020-02-17 Jan Beulich <jbeulich@suse.com>
2066 * i386-opc.tbl (AddrPrefixOpReg): Define.
2067 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2068 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2069 templates. Drop NoRex64.
2070 * i386-tbl.h: Re-generate.
2072 2020-02-17 Jan Beulich <jbeulich@suse.com>
2075 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2076 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2077 into Intel syntax instance (with Unpsecified) and AT&T one
2079 (vcvtneps2bf16): Likewise, along with folding the two so far
2081 * i386-tbl.h: Re-generate.
2083 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2085 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2086 CPU_ANY_SSE4A_FLAGS.
2088 2020-02-17 Alan Modra <amodra@gmail.com>
2090 * i386-gen.c (cpu_flag_init): Correct last change.
2092 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2094 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2097 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2099 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2102 2020-02-14 Jan Beulich <jbeulich@suse.com>
2105 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2106 destination for Cpu64-only variant.
2107 (movzx): Fold patterns.
2108 * i386-tbl.h: Re-generate.
2110 2020-02-13 Jan Beulich <jbeulich@suse.com>
2112 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2113 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2114 CPU_ANY_SSE4_FLAGS entry.
2115 * i386-init.h: Re-generate.
2117 2020-02-12 Jan Beulich <jbeulich@suse.com>
2119 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2120 with Unspecified, making the present one AT&T syntax only.
2121 * i386-tbl.h: Re-generate.
2123 2020-02-12 Jan Beulich <jbeulich@suse.com>
2125 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2126 * i386-tbl.h: Re-generate.
2128 2020-02-12 Jan Beulich <jbeulich@suse.com>
2131 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2132 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2133 Amd64 and Intel64 templates.
2134 (call, jmp): Likewise for far indirect variants. Dro
2136 * i386-tbl.h: Re-generate.
2138 2020-02-11 Jan Beulich <jbeulich@suse.com>
2140 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2141 * i386-opc.h (ShortForm): Delete.
2142 (struct i386_opcode_modifier): Remove shortform field.
2143 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2144 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2145 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2146 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2148 * i386-tbl.h: Re-generate.
2150 2020-02-11 Jan Beulich <jbeulich@suse.com>
2152 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2153 fucompi): Drop ShortForm from operand-less templates.
2154 * i386-tbl.h: Re-generate.
2156 2020-02-11 Alan Modra <amodra@gmail.com>
2158 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2159 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2160 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2161 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2162 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2164 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2166 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2167 (cde_opcodes): Add VCX* instructions.
2169 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2170 Matthew Malcomson <matthew.malcomson@arm.com>
2172 * arm-dis.c (struct cdeopcode32): New.
2173 (CDE_OPCODE): New macro.
2174 (cde_opcodes): New disassembly table.
2175 (regnames): New option to table.
2176 (cde_coprocs): New global variable.
2177 (print_insn_cde): New
2178 (print_insn_thumb32): Use print_insn_cde.
2179 (parse_arm_disassembler_options): Parse coprocN args.
2181 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2184 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2186 * i386-opc.h (AMD64): Removed.
2187 (Intel64): Likewose.
2189 (INTEL64): Likewise.
2190 (INTEL64ONLY): Likewise.
2191 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2192 * i386-opc.tbl (Amd64): New.
2193 (Intel64): Likewise.
2194 (Intel64Only): Likewise.
2195 Replace AMD64 with Amd64. Update sysenter/sysenter with
2196 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2197 * i386-tbl.h: Regenerated.
2199 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2202 * z80-dis.c: Add support for GBZ80 opcodes.
2204 2020-02-04 Alan Modra <amodra@gmail.com>
2206 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2208 2020-02-03 Alan Modra <amodra@gmail.com>
2210 * m32c-ibld.c: Regenerate.
2212 2020-02-01 Alan Modra <amodra@gmail.com>
2214 * frv-ibld.c: Regenerate.
2216 2020-01-31 Jan Beulich <jbeulich@suse.com>
2218 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2219 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2220 (OP_E_memory): Replace xmm_mdq_mode case label by
2221 vex_scalar_w_dq_mode one.
2222 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2224 2020-01-31 Jan Beulich <jbeulich@suse.com>
2226 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2227 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2228 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2229 (intel_operand_size): Drop vex_w_dq_mode case label.
2231 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2233 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2234 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2236 2020-01-30 Alan Modra <amodra@gmail.com>
2238 * m32c-ibld.c: Regenerate.
2240 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2242 * bpf-opc.c: Regenerate.
2244 2020-01-30 Jan Beulich <jbeulich@suse.com>
2246 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2247 (dis386): Use them to replace C2/C3 table entries.
2248 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2249 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2250 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2251 * i386-tbl.h: Re-generate.
2253 2020-01-30 Jan Beulich <jbeulich@suse.com>
2255 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2257 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2259 * i386-tbl.h: Re-generate.
2261 2020-01-30 Alan Modra <amodra@gmail.com>
2263 * tic4x-dis.c (tic4x_dp): Make unsigned.
2265 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2266 Jan Beulich <jbeulich@suse.com>
2269 * i386-dis.c (MOVSXD_Fixup): New function.
2270 (movsxd_mode): New enum.
2271 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2272 (intel_operand_size): Handle movsxd_mode.
2273 (OP_E_register): Likewise.
2275 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2276 register on movsxd. Add movsxd with 16-bit destination register
2277 for AMD64 and Intel64 ISAs.
2278 * i386-tbl.h: Regenerated.
2280 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2283 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2284 * aarch64-asm-2.c: Regenerate
2285 * aarch64-dis-2.c: Likewise.
2286 * aarch64-opc-2.c: Likewise.
2288 2020-01-21 Jan Beulich <jbeulich@suse.com>
2290 * i386-opc.tbl (sysret): Drop DefaultSize.
2291 * i386-tbl.h: Re-generate.
2293 2020-01-21 Jan Beulich <jbeulich@suse.com>
2295 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2297 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2298 * i386-tbl.h: Re-generate.
2300 2020-01-20 Nick Clifton <nickc@redhat.com>
2302 * po/de.po: Updated German translation.
2303 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2304 * po/uk.po: Updated Ukranian translation.
2306 2020-01-20 Alan Modra <amodra@gmail.com>
2308 * hppa-dis.c (fput_const): Remove useless cast.
2310 2020-01-20 Alan Modra <amodra@gmail.com>
2312 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2314 2020-01-18 Nick Clifton <nickc@redhat.com>
2316 * configure: Regenerate.
2317 * po/opcodes.pot: Regenerate.
2319 2020-01-18 Nick Clifton <nickc@redhat.com>
2321 Binutils 2.34 branch created.
2323 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2325 * opintl.h: Fix spelling error (seperate).
2327 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2329 * i386-opc.tbl: Add {vex} pseudo prefix.
2330 * i386-tbl.h: Regenerated.
2332 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2335 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2336 (neon_opcodes): Likewise.
2337 (select_arm_features): Make sure we enable MVE bits when selecting
2338 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2341 2020-01-16 Jan Beulich <jbeulich@suse.com>
2343 * i386-opc.tbl: Drop stale comment from XOP section.
2345 2020-01-16 Jan Beulich <jbeulich@suse.com>
2347 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2348 (extractps): Add VexWIG to SSE2AVX forms.
2349 * i386-tbl.h: Re-generate.
2351 2020-01-16 Jan Beulich <jbeulich@suse.com>
2353 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2354 Size64 from and use VexW1 on SSE2AVX forms.
2355 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2356 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2357 * i386-tbl.h: Re-generate.
2359 2020-01-15 Alan Modra <amodra@gmail.com>
2361 * tic4x-dis.c (tic4x_version): Make unsigned long.
2362 (optab, optab_special, registernames): New file scope vars.
2363 (tic4x_print_register): Set up registernames rather than
2364 malloc'd registertable.
2365 (tic4x_disassemble): Delete optable and optable_special. Use
2366 optab and optab_special instead. Throw away old optab,
2367 optab_special and registernames when info->mach changes.
2369 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2372 * z80-dis.c (suffix): Use .db instruction to generate double
2375 2020-01-14 Alan Modra <amodra@gmail.com>
2377 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2378 values to unsigned before shifting.
2380 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2382 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2384 (print_insn_thumb16, print_insn_thumb32): Likewise.
2385 (print_insn): Initialize the insn info.
2386 * i386-dis.c (print_insn): Initialize the insn info fields, and
2389 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2391 * arc-opc.c (C_NE): Make it required.
2393 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2395 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2396 reserved register name.
2398 2020-01-13 Alan Modra <amodra@gmail.com>
2400 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2401 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2403 2020-01-13 Alan Modra <amodra@gmail.com>
2405 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2406 result of wasm_read_leb128 in a uint64_t and check that bits
2407 are not lost when copying to other locals. Use uint32_t for
2408 most locals. Use PRId64 when printing int64_t.
2410 2020-01-13 Alan Modra <amodra@gmail.com>
2412 * score-dis.c: Formatting.
2413 * score7-dis.c: Formatting.
2415 2020-01-13 Alan Modra <amodra@gmail.com>
2417 * score-dis.c (print_insn_score48): Use unsigned variables for
2418 unsigned values. Don't left shift negative values.
2419 (print_insn_score32): Likewise.
2420 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2422 2020-01-13 Alan Modra <amodra@gmail.com>
2424 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2426 2020-01-13 Alan Modra <amodra@gmail.com>
2428 * fr30-ibld.c: Regenerate.
2430 2020-01-13 Alan Modra <amodra@gmail.com>
2432 * xgate-dis.c (print_insn): Don't left shift signed value.
2433 (ripBits): Formatting, use 1u.
2435 2020-01-10 Alan Modra <amodra@gmail.com>
2437 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2438 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2440 2020-01-10 Alan Modra <amodra@gmail.com>
2442 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2443 and XRREG value earlier to avoid a shift with negative exponent.
2444 * m10200-dis.c (disassemble): Similarly.
2446 2020-01-09 Nick Clifton <nickc@redhat.com>
2449 * z80-dis.c (ld_ii_ii): Use correct cast.
2451 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2454 * z80-dis.c (ld_ii_ii): Use character constant when checking
2457 2020-01-09 Jan Beulich <jbeulich@suse.com>
2459 * i386-dis.c (SEP_Fixup): New.
2461 (dis386_twobyte): Use it for sysenter/sysexit.
2462 (enum x86_64_isa): Change amd64 enumerator to value 1.
2463 (OP_J): Compare isa64 against intel64 instead of amd64.
2464 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2466 * i386-tbl.h: Re-generate.
2468 2020-01-08 Alan Modra <amodra@gmail.com>
2470 * z8k-dis.c: Include libiberty.h
2471 (instr_data_s): Make max_fetched unsigned.
2472 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2473 Don't exceed byte_info bounds.
2474 (output_instr): Make num_bytes unsigned.
2475 (unpack_instr): Likewise for nibl_count and loop.
2476 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2478 * z8k-opc.h: Regenerate.
2480 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2482 * arc-tbl.h (llock): Use 'LLOCK' as class.
2484 (scond): Use 'SCOND' as class.
2486 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2489 2020-01-06 Alan Modra <amodra@gmail.com>
2491 * m32c-ibld.c: Regenerate.
2493 2020-01-06 Alan Modra <amodra@gmail.com>
2496 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2497 Peek at next byte to prevent recursion on repeated prefix bytes.
2498 Ensure uninitialised "mybuf" is not accessed.
2499 (print_insn_z80): Don't zero n_fetch and n_used here,..
2500 (print_insn_z80_buf): ..do it here instead.
2502 2020-01-04 Alan Modra <amodra@gmail.com>
2504 * m32r-ibld.c: Regenerate.
2506 2020-01-04 Alan Modra <amodra@gmail.com>
2508 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2510 2020-01-04 Alan Modra <amodra@gmail.com>
2512 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2514 2020-01-04 Alan Modra <amodra@gmail.com>
2516 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2518 2020-01-03 Jan Beulich <jbeulich@suse.com>
2520 * aarch64-tbl.h (aarch64_opcode_table): Use
2521 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2523 2020-01-03 Jan Beulich <jbeulich@suse.com>
2525 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2526 forms of SUDOT and USDOT.
2528 2020-01-03 Jan Beulich <jbeulich@suse.com>
2530 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2532 * opcodes/aarch64-dis-2.c: Re-generate.
2534 2020-01-03 Jan Beulich <jbeulich@suse.com>
2536 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2538 * opcodes/aarch64-dis-2.c: Re-generate.
2540 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2542 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2544 2020-01-01 Alan Modra <amodra@gmail.com>
2546 Update year range in copyright notice of all files.
2548 For older changes see ChangeLog-2019
2550 Copyright (C) 2020 Free Software Foundation, Inc.
2552 Copying and distribution of this file, with or without modification,
2553 are permitted in any medium without royalty provided the copyright
2554 notice and this notice are preserved.
2560 version-control: never
projects / thirdparty / binutils-gdb.git / blob