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opcodes: discriminate endianness and insn-endianness in CGEN ports
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1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Disassembler interface for targets using CGEN. -*- C -*-
3 CGEN: Cpu tools GENerator
4
5 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 - the resultant file is machine generated, cgen-dis.in isn't
7
8 Copyright (C) 1996-2020 Free Software Foundation, Inc.
9
10 This file is part of libopcodes.
11
12 This library is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 3, or (at your option)
15 any later version.
16
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "disassemble.h"
33 #include "bfd.h"
34 #include "symcat.h"
35 #include "libiberty.h"
36 #include "bpf-desc.h"
37 #include "bpf-opc.h"
38 #include "opintl.h"
39
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
42
43 static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45 static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47 static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49 static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51 static int print_insn
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55 static int read_insn
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57 unsigned long *);
58 \f
59 /* -- disassembler routines inserted here. */
60
61 /* -- dis.c */
62
63 /* We need to customize the disassembler a bit:
64 - Use 8 bytes per line by default.
65 */
66
67 #define CGEN_PRINT_INSN bpf_print_insn
68
69 static int
70 bpf_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
71 {
72 bfd_byte buf[CGEN_MAX_INSN_SIZE];
73 int buflen;
74 int status;
75
76 info->bytes_per_chunk = 1;
77 info->bytes_per_line = 8;
78 info->endian_code = BFD_ENDIAN_BIG;
79
80 /* Attempt to read the base part of the insn. */
81 buflen = cd->base_insn_bitsize / 8;
82 status = (*info->read_memory_func) (pc, buf, buflen, info);
83
84 /* Try again with the minimum part, if min < base. */
85 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
86 {
87 buflen = cd->min_insn_bitsize / 8;
88 status = (*info->read_memory_func) (pc, buf, buflen, info);
89 }
90
91 if (status != 0)
92 {
93 (*info->memory_error_func) (status, pc, info);
94 return -1;
95 }
96
97 return print_insn (cd, pc, info, buf, buflen);
98 }
99
100 /* Signed immediates should be printed in hexadecimal. */
101
102 static void
103 print_immediate (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
104 void *dis_info,
105 int64_t value,
106 unsigned int attrs ATTRIBUTE_UNUSED,
107 bfd_vma pc ATTRIBUTE_UNUSED,
108 int length ATTRIBUTE_UNUSED)
109 {
110 disassemble_info *info = (disassemble_info *) dis_info;
111
112 if (value <= 9)
113 (*info->fprintf_func) (info->stream, "%" PRId64, value);
114 else
115 (*info->fprintf_func) (info->stream, "%#" PRIx64, value);
116
117 /* This is to avoid -Wunused-function for print_normal. */
118 if (0)
119 print_normal (cd, dis_info, value, attrs, pc, length);
120 }
121
122 /* Endianness bit sizes should be printed in decimal. */
123
124 static void
125 print_endsize (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
126 void *dis_info,
127 unsigned long value,
128 unsigned int attrs ATTRIBUTE_UNUSED,
129 bfd_vma pc ATTRIBUTE_UNUSED,
130 int length ATTRIBUTE_UNUSED)
131 {
132 disassemble_info *info = (disassemble_info *) dis_info;
133 (*info->fprintf_func) (info->stream, "%lu", value);
134 }
135
136 \f
137 /* -- */
138
139 void bpf_cgen_print_operand
140 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
141
142 /* Main entry point for printing operands.
143 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
144 of dis-asm.h on cgen.h.
145
146 This function is basically just a big switch statement. Earlier versions
147 used tables to look up the function to use, but
148 - if the table contains both assembler and disassembler functions then
149 the disassembler contains much of the assembler and vice-versa,
150 - there's a lot of inlining possibilities as things grow,
151 - using a switch statement avoids the function call overhead.
152
153 This function could be moved into `print_insn_normal', but keeping it
154 separate makes clear the interface between `print_insn_normal' and each of
155 the handlers. */
156
157 void
158 bpf_cgen_print_operand (CGEN_CPU_DESC cd,
159 int opindex,
160 void * xinfo,
161 CGEN_FIELDS *fields,
162 void const *attrs ATTRIBUTE_UNUSED,
163 bfd_vma pc,
164 int length)
165 {
166 disassemble_info *info = (disassemble_info *) xinfo;
167
168 switch (opindex)
169 {
170 case BPF_OPERAND_DISP16 :
171 print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
172 break;
173 case BPF_OPERAND_DISP32 :
174 print_normal (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
175 break;
176 case BPF_OPERAND_DSTBE :
177 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstbe, 0);
178 break;
179 case BPF_OPERAND_DSTLE :
180 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstle, 0);
181 break;
182 case BPF_OPERAND_ENDSIZE :
183 print_endsize (cd, info, fields->f_imm32, 0, pc, length);
184 break;
185 case BPF_OPERAND_IMM32 :
186 print_immediate (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
187 break;
188 case BPF_OPERAND_IMM64 :
189 print_immediate (cd, info, fields->f_imm64, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
190 break;
191 case BPF_OPERAND_OFFSET16 :
192 print_immediate (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
193 break;
194 case BPF_OPERAND_SRCBE :
195 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcbe, 0);
196 break;
197 case BPF_OPERAND_SRCLE :
198 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcle, 0);
199 break;
200
201 default :
202 /* xgettext:c-format */
203 opcodes_error_handler
204 (_("internal error: unrecognized field %d while printing insn"),
205 opindex);
206 abort ();
207 }
208 }
209
210 cgen_print_fn * const bpf_cgen_print_handlers[] =
211 {
212 print_insn_normal,
213 };
214
215
216 void
217 bpf_cgen_init_dis (CGEN_CPU_DESC cd)
218 {
219 bpf_cgen_init_opcode_table (cd);
220 bpf_cgen_init_ibld_table (cd);
221 cd->print_handlers = & bpf_cgen_print_handlers[0];
222 cd->print_operand = bpf_cgen_print_operand;
223 }
224
225 \f
226 /* Default print handler. */
227
228 static void
229 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
230 void *dis_info,
231 long value,
232 unsigned int attrs,
233 bfd_vma pc ATTRIBUTE_UNUSED,
234 int length ATTRIBUTE_UNUSED)
235 {
236 disassemble_info *info = (disassemble_info *) dis_info;
237
238 /* Print the operand as directed by the attributes. */
239 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
240 ; /* nothing to do */
241 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
242 (*info->fprintf_func) (info->stream, "%ld", value);
243 else
244 (*info->fprintf_func) (info->stream, "0x%lx", value);
245 }
246
247 /* Default address handler. */
248
249 static void
250 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
251 void *dis_info,
252 bfd_vma value,
253 unsigned int attrs,
254 bfd_vma pc ATTRIBUTE_UNUSED,
255 int length ATTRIBUTE_UNUSED)
256 {
257 disassemble_info *info = (disassemble_info *) dis_info;
258
259 /* Print the operand as directed by the attributes. */
260 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
261 ; /* Nothing to do. */
262 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
263 (*info->print_address_func) (value, info);
264 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
265 (*info->print_address_func) (value, info);
266 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
267 (*info->fprintf_func) (info->stream, "%ld", (long) value);
268 else
269 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
270 }
271
272 /* Keyword print handler. */
273
274 static void
275 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
276 void *dis_info,
277 CGEN_KEYWORD *keyword_table,
278 long value,
279 unsigned int attrs ATTRIBUTE_UNUSED)
280 {
281 disassemble_info *info = (disassemble_info *) dis_info;
282 const CGEN_KEYWORD_ENTRY *ke;
283
284 ke = cgen_keyword_lookup_value (keyword_table, value);
285 if (ke != NULL)
286 (*info->fprintf_func) (info->stream, "%s", ke->name);
287 else
288 (*info->fprintf_func) (info->stream, "???");
289 }
290 \f
291 /* Default insn printer.
292
293 DIS_INFO is defined as `void *' so the disassembler needn't know anything
294 about disassemble_info. */
295
296 static void
297 print_insn_normal (CGEN_CPU_DESC cd,
298 void *dis_info,
299 const CGEN_INSN *insn,
300 CGEN_FIELDS *fields,
301 bfd_vma pc,
302 int length)
303 {
304 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
305 disassemble_info *info = (disassemble_info *) dis_info;
306 const CGEN_SYNTAX_CHAR_TYPE *syn;
307
308 CGEN_INIT_PRINT (cd);
309
310 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
311 {
312 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
313 {
314 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
315 continue;
316 }
317 if (CGEN_SYNTAX_CHAR_P (*syn))
318 {
319 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
320 continue;
321 }
322
323 /* We have an operand. */
324 bpf_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
325 fields, CGEN_INSN_ATTRS (insn), pc, length);
326 }
327 }
328 \f
329 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
330 the extract info.
331 Returns 0 if all is well, non-zero otherwise. */
332
333 static int
334 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
335 bfd_vma pc,
336 disassemble_info *info,
337 bfd_byte *buf,
338 int buflen,
339 CGEN_EXTRACT_INFO *ex_info,
340 unsigned long *insn_value)
341 {
342 int status = (*info->read_memory_func) (pc, buf, buflen, info);
343
344 if (status != 0)
345 {
346 (*info->memory_error_func) (status, pc, info);
347 return -1;
348 }
349
350 ex_info->dis_info = info;
351 ex_info->valid = (1 << buflen) - 1;
352 ex_info->insn_bytes = buf;
353
354 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
355 return 0;
356 }
357
358 /* Utility to print an insn.
359 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
360 The result is the size of the insn in bytes or zero for an unknown insn
361 or -1 if an error occurs fetching data (memory_error_func will have
362 been called). */
363
364 static int
365 print_insn (CGEN_CPU_DESC cd,
366 bfd_vma pc,
367 disassemble_info *info,
368 bfd_byte *buf,
369 unsigned int buflen)
370 {
371 CGEN_INSN_INT insn_value;
372 const CGEN_INSN_LIST *insn_list;
373 CGEN_EXTRACT_INFO ex_info;
374 int basesize;
375
376 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
377 basesize = cd->base_insn_bitsize < buflen * 8 ?
378 cd->base_insn_bitsize : buflen * 8;
379 insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
380
381
382 /* Fill in ex_info fields like read_insn would. Don't actually call
383 read_insn, since the incoming buffer is already read (and possibly
384 modified a la m32r). */
385 ex_info.valid = (1 << buflen) - 1;
386 ex_info.dis_info = info;
387 ex_info.insn_bytes = buf;
388
389 /* The instructions are stored in hash lists.
390 Pick the first one and keep trying until we find the right one. */
391
392 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
393 while (insn_list != NULL)
394 {
395 const CGEN_INSN *insn = insn_list->insn;
396 CGEN_FIELDS fields;
397 int length;
398 unsigned long insn_value_cropped;
399
400 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
401 /* Not needed as insn shouldn't be in hash lists if not supported. */
402 /* Supported by this cpu? */
403 if (! bpf_cgen_insn_supported (cd, insn))
404 {
405 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
406 continue;
407 }
408 #endif
409
410 /* Basic bit mask must be correct. */
411 /* ??? May wish to allow target to defer this check until the extract
412 handler. */
413
414 /* Base size may exceed this instruction's size. Extract the
415 relevant part from the buffer. */
416 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
417 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
418 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
419 info->endian == BFD_ENDIAN_BIG);
420 else
421 insn_value_cropped = insn_value;
422
423 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
424 == CGEN_INSN_BASE_VALUE (insn))
425 {
426 /* Printing is handled in two passes. The first pass parses the
427 machine insn and extracts the fields. The second pass prints
428 them. */
429
430 /* Make sure the entire insn is loaded into insn_value, if it
431 can fit. */
432 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
433 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
434 {
435 unsigned long full_insn_value;
436 int rc = read_insn (cd, pc, info, buf,
437 CGEN_INSN_BITSIZE (insn) / 8,
438 & ex_info, & full_insn_value);
439 if (rc != 0)
440 return rc;
441 length = CGEN_EXTRACT_FN (cd, insn)
442 (cd, insn, &ex_info, full_insn_value, &fields, pc);
443 }
444 else
445 length = CGEN_EXTRACT_FN (cd, insn)
446 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
447
448 /* Length < 0 -> error. */
449 if (length < 0)
450 return length;
451 if (length > 0)
452 {
453 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
454 /* Length is in bits, result is in bytes. */
455 return length / 8;
456 }
457 }
458
459 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
460 }
461
462 return 0;
463 }
464
465 /* Default value for CGEN_PRINT_INSN.
466 The result is the size of the insn in bytes or zero for an unknown insn
467 or -1 if an error occured fetching bytes. */
468
469 #ifndef CGEN_PRINT_INSN
470 #define CGEN_PRINT_INSN default_print_insn
471 #endif
472
473 static int
474 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
475 {
476 bfd_byte buf[CGEN_MAX_INSN_SIZE];
477 int buflen;
478 int status;
479
480 /* Attempt to read the base part of the insn. */
481 buflen = cd->base_insn_bitsize / 8;
482 status = (*info->read_memory_func) (pc, buf, buflen, info);
483
484 /* Try again with the minimum part, if min < base. */
485 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
486 {
487 buflen = cd->min_insn_bitsize / 8;
488 status = (*info->read_memory_func) (pc, buf, buflen, info);
489 }
490
491 if (status != 0)
492 {
493 (*info->memory_error_func) (status, pc, info);
494 return -1;
495 }
496
497 return print_insn (cd, pc, info, buf, buflen);
498 }
499
500 /* Main entry point.
501 Print one instruction from PC on INFO->STREAM.
502 Return the size of the instruction (in bytes). */
503
504 typedef struct cpu_desc_list
505 {
506 struct cpu_desc_list *next;
507 CGEN_BITSET *isa;
508 int mach;
509 int endian;
510 int insn_endian;
511 CGEN_CPU_DESC cd;
512 } cpu_desc_list;
513
514 int
515 print_insn_bpf (bfd_vma pc, disassemble_info *info)
516 {
517 static cpu_desc_list *cd_list = 0;
518 cpu_desc_list *cl = 0;
519 static CGEN_CPU_DESC cd = 0;
520 static CGEN_BITSET *prev_isa;
521 static int prev_mach;
522 static int prev_endian;
523 static int prev_insn_endian;
524 int length;
525 CGEN_BITSET *isa;
526 int mach;
527 int endian = (info->endian == BFD_ENDIAN_BIG
528 ? CGEN_ENDIAN_BIG
529 : CGEN_ENDIAN_LITTLE);
530 int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
531 ? CGEN_ENDIAN_BIG
532 : CGEN_ENDIAN_LITTLE);
533 enum bfd_architecture arch;
534
535 /* ??? gdb will set mach but leave the architecture as "unknown" */
536 #ifndef CGEN_BFD_ARCH
537 #define CGEN_BFD_ARCH bfd_arch_bpf
538 #endif
539 arch = info->arch;
540 if (arch == bfd_arch_unknown)
541 arch = CGEN_BFD_ARCH;
542
543 /* There's no standard way to compute the machine or isa number
544 so we leave it to the target. */
545 #ifdef CGEN_COMPUTE_MACH
546 mach = CGEN_COMPUTE_MACH (info);
547 #else
548 mach = info->mach;
549 #endif
550
551 #ifdef CGEN_COMPUTE_ISA
552 {
553 static CGEN_BITSET *permanent_isa;
554
555 if (!permanent_isa)
556 permanent_isa = cgen_bitset_create (MAX_ISAS);
557 isa = permanent_isa;
558 cgen_bitset_clear (isa);
559 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
560 }
561 #else
562 isa = info->private_data;
563 #endif
564
565 /* If we've switched cpu's, try to find a handle we've used before */
566 if (cd
567 && (cgen_bitset_compare (isa, prev_isa) != 0
568 || mach != prev_mach
569 || endian != prev_endian))
570 {
571 cd = 0;
572 for (cl = cd_list; cl; cl = cl->next)
573 {
574 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
575 cl->mach == mach &&
576 cl->endian == endian)
577 {
578 cd = cl->cd;
579 prev_isa = cd->isas;
580 break;
581 }
582 }
583 }
584
585 /* If we haven't initialized yet, initialize the opcode table. */
586 if (! cd)
587 {
588 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
589 const char *mach_name;
590
591 if (!arch_type)
592 abort ();
593 mach_name = arch_type->printable_name;
594
595 prev_isa = cgen_bitset_copy (isa);
596 prev_mach = mach;
597 prev_endian = endian;
598 prev_insn_endian = insn_endian;
599 cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
600 CGEN_CPU_OPEN_BFDMACH, mach_name,
601 CGEN_CPU_OPEN_ENDIAN, prev_endian,
602 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
603 CGEN_CPU_OPEN_END);
604 if (!cd)
605 abort ();
606
607 /* Save this away for future reference. */
608 cl = xmalloc (sizeof (struct cpu_desc_list));
609 cl->cd = cd;
610 cl->isa = prev_isa;
611 cl->mach = mach;
612 cl->endian = endian;
613 cl->next = cd_list;
614 cd_list = cl;
615
616 bpf_cgen_init_dis (cd);
617 }
618
619 /* We try to have as much common code as possible.
620 But at this point some targets need to take over. */
621 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
622 but if not possible try to move this hook elsewhere rather than
623 have two hooks. */
624 length = CGEN_PRINT_INSN (cd, pc, info);
625 if (length > 0)
626 return length;
627 if (length < 0)
628 return -1;
629
630 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
631 return cd->default_insn_bitsize / 8;
632 }