opcodes/bpf-opc.c

   1 /* DO NOT EDIT!  -*- buffer-read-only: t -*- vi:set ro:  */
   2 /* Instruction opcode table for bpf.
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5
   6 Copyright (C) 1996-2021 Free Software Foundation, Inc.
   7
   8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   9
  10    This file is free software; you can redistribute it and/or modify
  11    it under the terms of the GNU General Public License as published by
  12    the Free Software Foundation; either version 3, or (at your option)
  13    any later version.
  14
  15    It is distributed in the hope that it will be useful, but WITHOUT
  16    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  17    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  18    License for more details.
  19
  20    You should have received a copy of the GNU General Public License along
  21    with this program; if not, write to the Free Software Foundation, Inc.,
  22    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  23
  24 */
  25
  26 #include "sysdep.h"
  27 #include "ansidecl.h"
  28 #include "bfd.h"
  29 #include "symcat.h"
  30 #include "bpf-desc.h"
  31 #include "bpf-opc.h"
  32 #include "libiberty.h"
  33
  34 /* -- opc.c */
  35 \f
  36 /* -- asm.c */
  37 /* The hash functions are recorded here to help keep assembler code out of
  38    the disassembler and vice versa.  */
  39
  40 static int asm_hash_insn_p        (const CGEN_INSN *);
  41 static unsigned int asm_hash_insn (const char *);
  42 static int dis_hash_insn_p        (const CGEN_INSN *);
  43 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
  44
  45 /* Instruction formats.  */
  46
  47 #define F(f) & bpf_cgen_ifld_table[BPF_##f]
  48 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
  49   0, 0, 0x0, { { 0 } }
  50 };
  51
  52 static const CGEN_IFMT ifmt_addile ATTRIBUTE_UNUSED = {
  53   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  54 };
  55
  56 static const CGEN_IFMT ifmt_addrle ATTRIBUTE_UNUSED = {
  57   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  58 };
  59
  60 static const CGEN_IFMT ifmt_negle ATTRIBUTE_UNUSED = {
  61   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  62 };
  63
  64 static const CGEN_IFMT ifmt_addibe ATTRIBUTE_UNUSED = {
  65   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  66 };
  67
  68 static const CGEN_IFMT ifmt_addrbe ATTRIBUTE_UNUSED = {
  69   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  70 };
  71
  72 static const CGEN_IFMT ifmt_negbe ATTRIBUTE_UNUSED = {
  73   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  74 };
  75
  76 static const CGEN_IFMT ifmt_endlele ATTRIBUTE_UNUSED = {
  77   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  78 };
  79
  80 static const CGEN_IFMT ifmt_endlebe ATTRIBUTE_UNUSED = {
  81   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
  82 };
  83
  84 static const CGEN_IFMT ifmt_lddwle ATTRIBUTE_UNUSED = {
  85   64, 128, 0xff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
  86 };
  87
  88 static const CGEN_IFMT ifmt_lddwbe ATTRIBUTE_UNUSED = {
  89   64, 128, 0xff, { { F (F_IMM64) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
  90 };
  91
  92 static const CGEN_IFMT ifmt_ldabsw ATTRIBUTE_UNUSED = {
  93   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_OP_CLASS) }, { 0 } }
  94 };
  95
  96 static const CGEN_IFMT ifmt_ldindwle ATTRIBUTE_UNUSED = {
  97   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
  98 };
  99
 100 static const CGEN_IFMT ifmt_ldindwbe ATTRIBUTE_UNUSED = {
 101   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
 102 };
 103
 104 static const CGEN_IFMT ifmt_ldxwle ATTRIBUTE_UNUSED = {
 105   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
 106 };
 107
 108 static const CGEN_IFMT ifmt_ldxwbe ATTRIBUTE_UNUSED = {
 109   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
 110 };
 111
 112 static const CGEN_IFMT ifmt_stble ATTRIBUTE_UNUSED = {
 113   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_DSTLE) }, { F (F_OP_CLASS) }, { 0 } }
 114 };
 115
 116 static const CGEN_IFMT ifmt_stbbe ATTRIBUTE_UNUSED = {
 117   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_MODE) }, { F (F_OP_SIZE) }, { F (F_SRCBE) }, { F (F_OP_CLASS) }, { 0 } }
 118 };
 119
 120 static const CGEN_IFMT ifmt_jeqile ATTRIBUTE_UNUSED = {
 121   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 122 };
 123
 124 static const CGEN_IFMT ifmt_jeqrle ATTRIBUTE_UNUSED = {
 125   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 126 };
 127
 128 static const CGEN_IFMT ifmt_jeqibe ATTRIBUTE_UNUSED = {
 129   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 130 };
 131
 132 static const CGEN_IFMT ifmt_jeqrbe ATTRIBUTE_UNUSED = {
 133   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_DSTBE) }, { F (F_OP_CODE) }, { F (F_SRCBE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 134 };
 135
 136 static const CGEN_IFMT ifmt_callle ATTRIBUTE_UNUSED = {
 137   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 138 };
 139
 140 static const CGEN_IFMT ifmt_ja ATTRIBUTE_UNUSED = {
 141   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 142 };
 143
 144 static const CGEN_IFMT ifmt_exit ATTRIBUTE_UNUSED = {
 145   64, 64, 0xff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_REGS) }, { F (F_OP_CODE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
 146 };
 147
 148 #undef F
 149
 150 #define A(a) (1 << CGEN_INSN_##a)
 151 #define OPERAND(op) BPF_OPERAND_##op
 152 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 153 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 154
 155 /* The instruction table.  */
 156
 157 static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] =
 158 {
 159   /* Special null first entry.
 160      A `num' value of zero is thus invalid.
 161      Also, the special `invalid' insn resides here.  */
 162   { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
 163 /* add $dstle,$imm32 */
 164   {
 165     { 0, 0, 0, 0 },
 166     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 167     & ifmt_addile, { 0x7 }
 168   },
 169 /* add $dstle,$srcle */
 170   {
 171     { 0, 0, 0, 0 },
 172     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 173     & ifmt_addrle, { 0xf }
 174   },
 175 /* add32 $dstle,$imm32 */
 176   {
 177     { 0, 0, 0, 0 },
 178     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 179     & ifmt_addile, { 0x4 }
 180   },
 181 /* add32 $dstle,$srcle */
 182   {
 183     { 0, 0, 0, 0 },
 184     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 185     & ifmt_addrle, { 0xc }
 186   },
 187 /* sub $dstle,$imm32 */
 188   {
 189     { 0, 0, 0, 0 },
 190     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 191     & ifmt_addile, { 0x17 }
 192   },
 193 /* sub $dstle,$srcle */
 194   {
 195     { 0, 0, 0, 0 },
 196     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 197     & ifmt_addrle, { 0x1f }
 198   },
 199 /* sub32 $dstle,$imm32 */
 200   {
 201     { 0, 0, 0, 0 },
 202     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 203     & ifmt_addile, { 0x14 }
 204   },
 205 /* sub32 $dstle,$srcle */
 206   {
 207     { 0, 0, 0, 0 },
 208     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 209     & ifmt_addrle, { 0x1c }
 210   },
 211 /* mul $dstle,$imm32 */
 212   {
 213     { 0, 0, 0, 0 },
 214     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 215     & ifmt_addile, { 0x27 }
 216   },
 217 /* mul $dstle,$srcle */
 218   {
 219     { 0, 0, 0, 0 },
 220     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 221     & ifmt_addrle, { 0x2f }
 222   },
 223 /* mul32 $dstle,$imm32 */
 224   {
 225     { 0, 0, 0, 0 },
 226     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 227     & ifmt_addile, { 0x24 }
 228   },
 229 /* mul32 $dstle,$srcle */
 230   {
 231     { 0, 0, 0, 0 },
 232     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 233     & ifmt_addrle, { 0x2c }
 234   },
 235 /* div $dstle,$imm32 */
 236   {
 237     { 0, 0, 0, 0 },
 238     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 239     & ifmt_addile, { 0x37 }
 240   },
 241 /* div $dstle,$srcle */
 242   {
 243     { 0, 0, 0, 0 },
 244     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 245     & ifmt_addrle, { 0x3f }
 246   },
 247 /* div32 $dstle,$imm32 */
 248   {
 249     { 0, 0, 0, 0 },
 250     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 251     & ifmt_addile, { 0x34 }
 252   },
 253 /* div32 $dstle,$srcle */
 254   {
 255     { 0, 0, 0, 0 },
 256     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 257     & ifmt_addrle, { 0x3c }
 258   },
 259 /* or $dstle,$imm32 */
 260   {
 261     { 0, 0, 0, 0 },
 262     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 263     & ifmt_addile, { 0x47 }
 264   },
 265 /* or $dstle,$srcle */
 266   {
 267     { 0, 0, 0, 0 },
 268     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 269     & ifmt_addrle, { 0x4f }
 270   },
 271 /* or32 $dstle,$imm32 */
 272   {
 273     { 0, 0, 0, 0 },
 274     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 275     & ifmt_addile, { 0x44 }
 276   },
 277 /* or32 $dstle,$srcle */
 278   {
 279     { 0, 0, 0, 0 },
 280     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 281     & ifmt_addrle, { 0x4c }
 282   },
 283 /* and $dstle,$imm32 */
 284   {
 285     { 0, 0, 0, 0 },
 286     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 287     & ifmt_addile, { 0x57 }
 288   },
 289 /* and $dstle,$srcle */
 290   {
 291     { 0, 0, 0, 0 },
 292     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 293     & ifmt_addrle, { 0x5f }
 294   },
 295 /* and32 $dstle,$imm32 */
 296   {
 297     { 0, 0, 0, 0 },
 298     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 299     & ifmt_addile, { 0x54 }
 300   },
 301 /* and32 $dstle,$srcle */
 302   {
 303     { 0, 0, 0, 0 },
 304     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 305     & ifmt_addrle, { 0x5c }
 306   },
 307 /* lsh $dstle,$imm32 */
 308   {
 309     { 0, 0, 0, 0 },
 310     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 311     & ifmt_addile, { 0x67 }
 312   },
 313 /* lsh $dstle,$srcle */
 314   {
 315     { 0, 0, 0, 0 },
 316     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 317     & ifmt_addrle, { 0x6f }
 318   },
 319 /* lsh32 $dstle,$imm32 */
 320   {
 321     { 0, 0, 0, 0 },
 322     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 323     & ifmt_addile, { 0x64 }
 324   },
 325 /* lsh32 $dstle,$srcle */
 326   {
 327     { 0, 0, 0, 0 },
 328     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 329     & ifmt_addrle, { 0x6c }
 330   },
 331 /* rsh $dstle,$imm32 */
 332   {
 333     { 0, 0, 0, 0 },
 334     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 335     & ifmt_addile, { 0x77 }
 336   },
 337 /* rsh $dstle,$srcle */
 338   {
 339     { 0, 0, 0, 0 },
 340     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 341     & ifmt_addrle, { 0x7f }
 342   },
 343 /* rsh32 $dstle,$imm32 */
 344   {
 345     { 0, 0, 0, 0 },
 346     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 347     & ifmt_addile, { 0x74 }
 348   },
 349 /* rsh32 $dstle,$srcle */
 350   {
 351     { 0, 0, 0, 0 },
 352     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 353     & ifmt_addrle, { 0x7c }
 354   },
 355 /* mod $dstle,$imm32 */
 356   {
 357     { 0, 0, 0, 0 },
 358     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 359     & ifmt_addile, { 0x97 }
 360   },
 361 /* mod $dstle,$srcle */
 362   {
 363     { 0, 0, 0, 0 },
 364     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 365     & ifmt_addrle, { 0x9f }
 366   },
 367 /* mod32 $dstle,$imm32 */
 368   {
 369     { 0, 0, 0, 0 },
 370     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 371     & ifmt_addile, { 0x94 }
 372   },
 373 /* mod32 $dstle,$srcle */
 374   {
 375     { 0, 0, 0, 0 },
 376     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 377     & ifmt_addrle, { 0x9c }
 378   },
 379 /* xor $dstle,$imm32 */
 380   {
 381     { 0, 0, 0, 0 },
 382     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 383     & ifmt_addile, { 0xa7 }
 384   },
 385 /* xor $dstle,$srcle */
 386   {
 387     { 0, 0, 0, 0 },
 388     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 389     & ifmt_addrle, { 0xaf }
 390   },
 391 /* xor32 $dstle,$imm32 */
 392   {
 393     { 0, 0, 0, 0 },
 394     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 395     & ifmt_addile, { 0xa4 }
 396   },
 397 /* xor32 $dstle,$srcle */
 398   {
 399     { 0, 0, 0, 0 },
 400     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 401     & ifmt_addrle, { 0xac }
 402   },
 403 /* arsh $dstle,$imm32 */
 404   {
 405     { 0, 0, 0, 0 },
 406     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 407     & ifmt_addile, { 0xc7 }
 408   },
 409 /* arsh $dstle,$srcle */
 410   {
 411     { 0, 0, 0, 0 },
 412     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 413     & ifmt_addrle, { 0xcf }
 414   },
 415 /* arsh32 $dstle,$imm32 */
 416   {
 417     { 0, 0, 0, 0 },
 418     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 419     & ifmt_addile, { 0xc4 }
 420   },
 421 /* arsh32 $dstle,$srcle */
 422   {
 423     { 0, 0, 0, 0 },
 424     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 425     & ifmt_addrle, { 0xcc }
 426   },
 427 /* sdiv $dstle,$imm32 */
 428   {
 429     { 0, 0, 0, 0 },
 430     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 431     & ifmt_addile, { 0xe7 }
 432   },
 433 /* sdiv $dstle,$srcle */
 434   {
 435     { 0, 0, 0, 0 },
 436     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 437     & ifmt_addrle, { 0xef }
 438   },
 439 /* sdiv32 $dstle,$imm32 */
 440   {
 441     { 0, 0, 0, 0 },
 442     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 443     & ifmt_addile, { 0xe4 }
 444   },
 445 /* sdiv32 $dstle,$srcle */
 446   {
 447     { 0, 0, 0, 0 },
 448     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 449     & ifmt_addrle, { 0xec }
 450   },
 451 /* smod $dstle,$imm32 */
 452   {
 453     { 0, 0, 0, 0 },
 454     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 455     & ifmt_addile, { 0xf7 }
 456   },
 457 /* smod $dstle,$srcle */
 458   {
 459     { 0, 0, 0, 0 },
 460     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 461     & ifmt_addrle, { 0xff }
 462   },
 463 /* smod32 $dstle,$imm32 */
 464   {
 465     { 0, 0, 0, 0 },
 466     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 467     & ifmt_addile, { 0xf4 }
 468   },
 469 /* smod32 $dstle,$srcle */
 470   {
 471     { 0, 0, 0, 0 },
 472     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 473     & ifmt_addrle, { 0xfc }
 474   },
 475 /* neg $dstle */
 476   {
 477     { 0, 0, 0, 0 },
 478     { { MNEM, ' ', OP (DSTLE), 0 } },
 479     & ifmt_negle, { 0x87 }
 480   },
 481 /* neg32 $dstle */
 482   {
 483     { 0, 0, 0, 0 },
 484     { { MNEM, ' ', OP (DSTLE), 0 } },
 485     & ifmt_negle, { 0x84 }
 486   },
 487 /* mov $dstle,$imm32 */
 488   {
 489     { 0, 0, 0, 0 },
 490     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 491     & ifmt_addile, { 0xb7 }
 492   },
 493 /* mov $dstle,$srcle */
 494   {
 495     { 0, 0, 0, 0 },
 496     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 497     & ifmt_addrle, { 0xbf }
 498   },
 499 /* mov32 $dstle,$imm32 */
 500   {
 501     { 0, 0, 0, 0 },
 502     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), 0 } },
 503     & ifmt_addile, { 0xb4 }
 504   },
 505 /* mov32 $dstle,$srcle */
 506   {
 507     { 0, 0, 0, 0 },
 508     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), 0 } },
 509     & ifmt_addrle, { 0xbc }
 510   },
 511 /* add $dstbe,$imm32 */
 512   {
 513     { 0, 0, 0, 0 },
 514     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 515     & ifmt_addibe, { 0x7 }
 516   },
 517 /* add $dstbe,$srcbe */
 518   {
 519     { 0, 0, 0, 0 },
 520     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 521     & ifmt_addrbe, { 0xf }
 522   },
 523 /* add32 $dstbe,$imm32 */
 524   {
 525     { 0, 0, 0, 0 },
 526     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 527     & ifmt_addibe, { 0x4 }
 528   },
 529 /* add32 $dstbe,$srcbe */
 530   {
 531     { 0, 0, 0, 0 },
 532     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 533     & ifmt_addrbe, { 0xc }
 534   },
 535 /* sub $dstbe,$imm32 */
 536   {
 537     { 0, 0, 0, 0 },
 538     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 539     & ifmt_addibe, { 0x17 }
 540   },
 541 /* sub $dstbe,$srcbe */
 542   {
 543     { 0, 0, 0, 0 },
 544     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 545     & ifmt_addrbe, { 0x1f }
 546   },
 547 /* sub32 $dstbe,$imm32 */
 548   {
 549     { 0, 0, 0, 0 },
 550     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 551     & ifmt_addibe, { 0x14 }
 552   },
 553 /* sub32 $dstbe,$srcbe */
 554   {
 555     { 0, 0, 0, 0 },
 556     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 557     & ifmt_addrbe, { 0x1c }
 558   },
 559 /* mul $dstbe,$imm32 */
 560   {
 561     { 0, 0, 0, 0 },
 562     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 563     & ifmt_addibe, { 0x27 }
 564   },
 565 /* mul $dstbe,$srcbe */
 566   {
 567     { 0, 0, 0, 0 },
 568     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 569     & ifmt_addrbe, { 0x2f }
 570   },
 571 /* mul32 $dstbe,$imm32 */
 572   {
 573     { 0, 0, 0, 0 },
 574     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 575     & ifmt_addibe, { 0x24 }
 576   },
 577 /* mul32 $dstbe,$srcbe */
 578   {
 579     { 0, 0, 0, 0 },
 580     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 581     & ifmt_addrbe, { 0x2c }
 582   },
 583 /* div $dstbe,$imm32 */
 584   {
 585     { 0, 0, 0, 0 },
 586     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 587     & ifmt_addibe, { 0x37 }
 588   },
 589 /* div $dstbe,$srcbe */
 590   {
 591     { 0, 0, 0, 0 },
 592     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 593     & ifmt_addrbe, { 0x3f }
 594   },
 595 /* div32 $dstbe,$imm32 */
 596   {
 597     { 0, 0, 0, 0 },
 598     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 599     & ifmt_addibe, { 0x34 }
 600   },
 601 /* div32 $dstbe,$srcbe */
 602   {
 603     { 0, 0, 0, 0 },
 604     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 605     & ifmt_addrbe, { 0x3c }
 606   },
 607 /* or $dstbe,$imm32 */
 608   {
 609     { 0, 0, 0, 0 },
 610     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 611     & ifmt_addibe, { 0x47 }
 612   },
 613 /* or $dstbe,$srcbe */
 614   {
 615     { 0, 0, 0, 0 },
 616     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 617     & ifmt_addrbe, { 0x4f }
 618   },
 619 /* or32 $dstbe,$imm32 */
 620   {
 621     { 0, 0, 0, 0 },
 622     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 623     & ifmt_addibe, { 0x44 }
 624   },
 625 /* or32 $dstbe,$srcbe */
 626   {
 627     { 0, 0, 0, 0 },
 628     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 629     & ifmt_addrbe, { 0x4c }
 630   },
 631 /* and $dstbe,$imm32 */
 632   {
 633     { 0, 0, 0, 0 },
 634     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 635     & ifmt_addibe, { 0x57 }
 636   },
 637 /* and $dstbe,$srcbe */
 638   {
 639     { 0, 0, 0, 0 },
 640     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 641     & ifmt_addrbe, { 0x5f }
 642   },
 643 /* and32 $dstbe,$imm32 */
 644   {
 645     { 0, 0, 0, 0 },
 646     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 647     & ifmt_addibe, { 0x54 }
 648   },
 649 /* and32 $dstbe,$srcbe */
 650   {
 651     { 0, 0, 0, 0 },
 652     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 653     & ifmt_addrbe, { 0x5c }
 654   },
 655 /* lsh $dstbe,$imm32 */
 656   {
 657     { 0, 0, 0, 0 },
 658     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 659     & ifmt_addibe, { 0x67 }
 660   },
 661 /* lsh $dstbe,$srcbe */
 662   {
 663     { 0, 0, 0, 0 },
 664     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 665     & ifmt_addrbe, { 0x6f }
 666   },
 667 /* lsh32 $dstbe,$imm32 */
 668   {
 669     { 0, 0, 0, 0 },
 670     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 671     & ifmt_addibe, { 0x64 }
 672   },
 673 /* lsh32 $dstbe,$srcbe */
 674   {
 675     { 0, 0, 0, 0 },
 676     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 677     & ifmt_addrbe, { 0x6c }
 678   },
 679 /* rsh $dstbe,$imm32 */
 680   {
 681     { 0, 0, 0, 0 },
 682     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 683     & ifmt_addibe, { 0x77 }
 684   },
 685 /* rsh $dstbe,$srcbe */
 686   {
 687     { 0, 0, 0, 0 },
 688     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 689     & ifmt_addrbe, { 0x7f }
 690   },
 691 /* rsh32 $dstbe,$imm32 */
 692   {
 693     { 0, 0, 0, 0 },
 694     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 695     & ifmt_addibe, { 0x74 }
 696   },
 697 /* rsh32 $dstbe,$srcbe */
 698   {
 699     { 0, 0, 0, 0 },
 700     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 701     & ifmt_addrbe, { 0x7c }
 702   },
 703 /* mod $dstbe,$imm32 */
 704   {
 705     { 0, 0, 0, 0 },
 706     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 707     & ifmt_addibe, { 0x97 }
 708   },
 709 /* mod $dstbe,$srcbe */
 710   {
 711     { 0, 0, 0, 0 },
 712     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 713     & ifmt_addrbe, { 0x9f }
 714   },
 715 /* mod32 $dstbe,$imm32 */
 716   {
 717     { 0, 0, 0, 0 },
 718     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 719     & ifmt_addibe, { 0x94 }
 720   },
 721 /* mod32 $dstbe,$srcbe */
 722   {
 723     { 0, 0, 0, 0 },
 724     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 725     & ifmt_addrbe, { 0x9c }
 726   },
 727 /* xor $dstbe,$imm32 */
 728   {
 729     { 0, 0, 0, 0 },
 730     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 731     & ifmt_addibe, { 0xa7 }
 732   },
 733 /* xor $dstbe,$srcbe */
 734   {
 735     { 0, 0, 0, 0 },
 736     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 737     & ifmt_addrbe, { 0xaf }
 738   },
 739 /* xor32 $dstbe,$imm32 */
 740   {
 741     { 0, 0, 0, 0 },
 742     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 743     & ifmt_addibe, { 0xa4 }
 744   },
 745 /* xor32 $dstbe,$srcbe */
 746   {
 747     { 0, 0, 0, 0 },
 748     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 749     & ifmt_addrbe, { 0xac }
 750   },
 751 /* arsh $dstbe,$imm32 */
 752   {
 753     { 0, 0, 0, 0 },
 754     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 755     & ifmt_addibe, { 0xc7 }
 756   },
 757 /* arsh $dstbe,$srcbe */
 758   {
 759     { 0, 0, 0, 0 },
 760     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 761     & ifmt_addrbe, { 0xcf }
 762   },
 763 /* arsh32 $dstbe,$imm32 */
 764   {
 765     { 0, 0, 0, 0 },
 766     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 767     & ifmt_addibe, { 0xc4 }
 768   },
 769 /* arsh32 $dstbe,$srcbe */
 770   {
 771     { 0, 0, 0, 0 },
 772     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 773     & ifmt_addrbe, { 0xcc }
 774   },
 775 /* sdiv $dstbe,$imm32 */
 776   {
 777     { 0, 0, 0, 0 },
 778     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 779     & ifmt_addibe, { 0xe7 }
 780   },
 781 /* sdiv $dstbe,$srcbe */
 782   {
 783     { 0, 0, 0, 0 },
 784     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 785     & ifmt_addrbe, { 0xef }
 786   },
 787 /* sdiv32 $dstbe,$imm32 */
 788   {
 789     { 0, 0, 0, 0 },
 790     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 791     & ifmt_addibe, { 0xe4 }
 792   },
 793 /* sdiv32 $dstbe,$srcbe */
 794   {
 795     { 0, 0, 0, 0 },
 796     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 797     & ifmt_addrbe, { 0xec }
 798   },
 799 /* smod $dstbe,$imm32 */
 800   {
 801     { 0, 0, 0, 0 },
 802     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 803     & ifmt_addibe, { 0xf7 }
 804   },
 805 /* smod $dstbe,$srcbe */
 806   {
 807     { 0, 0, 0, 0 },
 808     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 809     & ifmt_addrbe, { 0xff }
 810   },
 811 /* smod32 $dstbe,$imm32 */
 812   {
 813     { 0, 0, 0, 0 },
 814     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 815     & ifmt_addibe, { 0xf4 }
 816   },
 817 /* smod32 $dstbe,$srcbe */
 818   {
 819     { 0, 0, 0, 0 },
 820     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 821     & ifmt_addrbe, { 0xfc }
 822   },
 823 /* neg $dstbe */
 824   {
 825     { 0, 0, 0, 0 },
 826     { { MNEM, ' ', OP (DSTBE), 0 } },
 827     & ifmt_negbe, { 0x87 }
 828   },
 829 /* neg32 $dstbe */
 830   {
 831     { 0, 0, 0, 0 },
 832     { { MNEM, ' ', OP (DSTBE), 0 } },
 833     & ifmt_negbe, { 0x84 }
 834   },
 835 /* mov $dstbe,$imm32 */
 836   {
 837     { 0, 0, 0, 0 },
 838     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 839     & ifmt_addibe, { 0xb7 }
 840   },
 841 /* mov $dstbe,$srcbe */
 842   {
 843     { 0, 0, 0, 0 },
 844     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 845     & ifmt_addrbe, { 0xbf }
 846   },
 847 /* mov32 $dstbe,$imm32 */
 848   {
 849     { 0, 0, 0, 0 },
 850     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), 0 } },
 851     & ifmt_addibe, { 0xb4 }
 852   },
 853 /* mov32 $dstbe,$srcbe */
 854   {
 855     { 0, 0, 0, 0 },
 856     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), 0 } },
 857     & ifmt_addrbe, { 0xbc }
 858   },
 859 /* endle $dstle,$endsize */
 860   {
 861     { 0, 0, 0, 0 },
 862     { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } },
 863     & ifmt_endlele, { 0xd4 }
 864   },
 865 /* endbe $dstle,$endsize */
 866   {
 867     { 0, 0, 0, 0 },
 868     { { MNEM, ' ', OP (DSTLE), ',', OP (ENDSIZE), 0 } },
 869     & ifmt_endlele, { 0xdc }
 870   },
 871 /* endle $dstbe,$endsize */
 872   {
 873     { 0, 0, 0, 0 },
 874     { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } },
 875     & ifmt_endlebe, { 0xd4 }
 876   },
 877 /* endbe $dstbe,$endsize */
 878   {
 879     { 0, 0, 0, 0 },
 880     { { MNEM, ' ', OP (DSTBE), ',', OP (ENDSIZE), 0 } },
 881     & ifmt_endlebe, { 0xdc }
 882   },
 883 /* lddw $dstle,$imm64 */
 884   {
 885     { 0, 0, 0, 0 },
 886     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM64), 0 } },
 887     & ifmt_lddwle, { 0x18 }
 888   },
 889 /* lddw $dstbe,$imm64 */
 890   {
 891     { 0, 0, 0, 0 },
 892     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM64), 0 } },
 893     & ifmt_lddwbe, { 0x18 }
 894   },
 895 /* ldabsw $imm32 */
 896   {
 897     { 0, 0, 0, 0 },
 898     { { MNEM, ' ', OP (IMM32), 0 } },
 899     & ifmt_ldabsw, { 0x20 }
 900   },
 901 /* ldabsh $imm32 */
 902   {
 903     { 0, 0, 0, 0 },
 904     { { MNEM, ' ', OP (IMM32), 0 } },
 905     & ifmt_ldabsw, { 0x28 }
 906   },
 907 /* ldabsb $imm32 */
 908   {
 909     { 0, 0, 0, 0 },
 910     { { MNEM, ' ', OP (IMM32), 0 } },
 911     & ifmt_ldabsw, { 0x30 }
 912   },
 913 /* ldabsdw $imm32 */
 914   {
 915     { 0, 0, 0, 0 },
 916     { { MNEM, ' ', OP (IMM32), 0 } },
 917     & ifmt_ldabsw, { 0x38 }
 918   },
 919 /* ldindw $srcle,$imm32 */
 920   {
 921     { 0, 0, 0, 0 },
 922     { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
 923     & ifmt_ldindwle, { 0x40 }
 924   },
 925 /* ldindh $srcle,$imm32 */
 926   {
 927     { 0, 0, 0, 0 },
 928     { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
 929     & ifmt_ldindwle, { 0x48 }
 930   },
 931 /* ldindb $srcle,$imm32 */
 932   {
 933     { 0, 0, 0, 0 },
 934     { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
 935     & ifmt_ldindwle, { 0x50 }
 936   },
 937 /* ldinddw $srcle,$imm32 */
 938   {
 939     { 0, 0, 0, 0 },
 940     { { MNEM, ' ', OP (SRCLE), ',', OP (IMM32), 0 } },
 941     & ifmt_ldindwle, { 0x58 }
 942   },
 943 /* ldindw $srcbe,$imm32 */
 944   {
 945     { 0, 0, 0, 0 },
 946     { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
 947     & ifmt_ldindwbe, { 0x40 }
 948   },
 949 /* ldindh $srcbe,$imm32 */
 950   {
 951     { 0, 0, 0, 0 },
 952     { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
 953     & ifmt_ldindwbe, { 0x48 }
 954   },
 955 /* ldindb $srcbe,$imm32 */
 956   {
 957     { 0, 0, 0, 0 },
 958     { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
 959     & ifmt_ldindwbe, { 0x50 }
 960   },
 961 /* ldinddw $srcbe,$imm32 */
 962   {
 963     { 0, 0, 0, 0 },
 964     { { MNEM, ' ', OP (SRCBE), ',', OP (IMM32), 0 } },
 965     & ifmt_ldindwbe, { 0x58 }
 966   },
 967 /* ldxw $dstle,[$srcle+$offset16] */
 968   {
 969     { 0, 0, 0, 0 },
 970     { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
 971     & ifmt_ldxwle, { 0x61 }
 972   },
 973 /* ldxh $dstle,[$srcle+$offset16] */
 974   {
 975     { 0, 0, 0, 0 },
 976     { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
 977     & ifmt_ldxwle, { 0x69 }
 978   },
 979 /* ldxb $dstle,[$srcle+$offset16] */
 980   {
 981     { 0, 0, 0, 0 },
 982     { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
 983     & ifmt_ldxwle, { 0x71 }
 984   },
 985 /* ldxdw $dstle,[$srcle+$offset16] */
 986   {
 987     { 0, 0, 0, 0 },
 988     { { MNEM, ' ', OP (DSTLE), ',', '[', OP (SRCLE), '+', OP (OFFSET16), ']', 0 } },
 989     & ifmt_ldxwle, { 0x79 }
 990   },
 991 /* stxw [$dstle+$offset16],$srcle */
 992   {
 993     { 0, 0, 0, 0 },
 994     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
 995     & ifmt_ldxwle, { 0x63 }
 996   },
 997 /* stxh [$dstle+$offset16],$srcle */
 998   {
 999     { 0, 0, 0, 0 },
1000     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1001     & ifmt_ldxwle, { 0x6b }
1002   },
1003 /* stxb [$dstle+$offset16],$srcle */
1004   {
1005     { 0, 0, 0, 0 },
1006     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1007     & ifmt_ldxwle, { 0x73 }
1008   },
1009 /* stxdw [$dstle+$offset16],$srcle */
1010   {
1011     { 0, 0, 0, 0 },
1012     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1013     & ifmt_ldxwle, { 0x7b }
1014   },
1015 /* ldxw $dstbe,[$srcbe+$offset16] */
1016   {
1017     { 0, 0, 0, 0 },
1018     { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
1019     & ifmt_ldxwbe, { 0x61 }
1020   },
1021 /* ldxh $dstbe,[$srcbe+$offset16] */
1022   {
1023     { 0, 0, 0, 0 },
1024     { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
1025     & ifmt_ldxwbe, { 0x69 }
1026   },
1027 /* ldxb $dstbe,[$srcbe+$offset16] */
1028   {
1029     { 0, 0, 0, 0 },
1030     { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
1031     & ifmt_ldxwbe, { 0x71 }
1032   },
1033 /* ldxdw $dstbe,[$srcbe+$offset16] */
1034   {
1035     { 0, 0, 0, 0 },
1036     { { MNEM, ' ', OP (DSTBE), ',', '[', OP (SRCBE), '+', OP (OFFSET16), ']', 0 } },
1037     & ifmt_ldxwbe, { 0x79 }
1038   },
1039 /* stxw [$dstbe+$offset16],$srcbe */
1040   {
1041     { 0, 0, 0, 0 },
1042     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1043     & ifmt_ldxwbe, { 0x63 }
1044   },
1045 /* stxh [$dstbe+$offset16],$srcbe */
1046   {
1047     { 0, 0, 0, 0 },
1048     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1049     & ifmt_ldxwbe, { 0x6b }
1050   },
1051 /* stxb [$dstbe+$offset16],$srcbe */
1052   {
1053     { 0, 0, 0, 0 },
1054     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1055     & ifmt_ldxwbe, { 0x73 }
1056   },
1057 /* stxdw [$dstbe+$offset16],$srcbe */
1058   {
1059     { 0, 0, 0, 0 },
1060     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1061     & ifmt_ldxwbe, { 0x7b }
1062   },
1063 /* stb [$dstle+$offset16],$imm32 */
1064   {
1065     { 0, 0, 0, 0 },
1066     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1067     & ifmt_stble, { 0x72 }
1068   },
1069 /* sth [$dstle+$offset16],$imm32 */
1070   {
1071     { 0, 0, 0, 0 },
1072     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1073     & ifmt_stble, { 0x6a }
1074   },
1075 /* stw [$dstle+$offset16],$imm32 */
1076   {
1077     { 0, 0, 0, 0 },
1078     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1079     & ifmt_stble, { 0x62 }
1080   },
1081 /* stdw [$dstle+$offset16],$imm32 */
1082   {
1083     { 0, 0, 0, 0 },
1084     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1085     & ifmt_stble, { 0x7a }
1086   },
1087 /* stb [$dstbe+$offset16],$imm32 */
1088   {
1089     { 0, 0, 0, 0 },
1090     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1091     & ifmt_stbbe, { 0x72 }
1092   },
1093 /* sth [$dstbe+$offset16],$imm32 */
1094   {
1095     { 0, 0, 0, 0 },
1096     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1097     & ifmt_stbbe, { 0x6a }
1098   },
1099 /* stw [$dstbe+$offset16],$imm32 */
1100   {
1101     { 0, 0, 0, 0 },
1102     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1103     & ifmt_stbbe, { 0x62 }
1104   },
1105 /* stdw [$dstbe+$offset16],$imm32 */
1106   {
1107     { 0, 0, 0, 0 },
1108     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (IMM32), 0 } },
1109     & ifmt_stbbe, { 0x7a }
1110   },
1111 /* jeq $dstle,$imm32,$disp16 */
1112   {
1113     { 0, 0, 0, 0 },
1114     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1115     & ifmt_jeqile, { 0x15 }
1116   },
1117 /* jeq $dstle,$srcle,$disp16 */
1118   {
1119     { 0, 0, 0, 0 },
1120     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1121     & ifmt_jeqrle, { 0x1d }
1122   },
1123 /* jeq32 $dstle,$imm32,$disp16 */
1124   {
1125     { 0, 0, 0, 0 },
1126     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1127     & ifmt_jeqile, { 0x16 }
1128   },
1129 /* jeq32 $dstle,$srcle,$disp16 */
1130   {
1131     { 0, 0, 0, 0 },
1132     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1133     & ifmt_jeqrle, { 0x1e }
1134   },
1135 /* jgt $dstle,$imm32,$disp16 */
1136   {
1137     { 0, 0, 0, 0 },
1138     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1139     & ifmt_jeqile, { 0x25 }
1140   },
1141 /* jgt $dstle,$srcle,$disp16 */
1142   {
1143     { 0, 0, 0, 0 },
1144     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1145     & ifmt_jeqrle, { 0x2d }
1146   },
1147 /* jgt32 $dstle,$imm32,$disp16 */
1148   {
1149     { 0, 0, 0, 0 },
1150     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1151     & ifmt_jeqile, { 0x26 }
1152   },
1153 /* jgt32 $dstle,$srcle,$disp16 */
1154   {
1155     { 0, 0, 0, 0 },
1156     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1157     & ifmt_jeqrle, { 0x2e }
1158   },
1159 /* jge $dstle,$imm32,$disp16 */
1160   {
1161     { 0, 0, 0, 0 },
1162     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1163     & ifmt_jeqile, { 0x35 }
1164   },
1165 /* jge $dstle,$srcle,$disp16 */
1166   {
1167     { 0, 0, 0, 0 },
1168     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1169     & ifmt_jeqrle, { 0x3d }
1170   },
1171 /* jge32 $dstle,$imm32,$disp16 */
1172   {
1173     { 0, 0, 0, 0 },
1174     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1175     & ifmt_jeqile, { 0x36 }
1176   },
1177 /* jge32 $dstle,$srcle,$disp16 */
1178   {
1179     { 0, 0, 0, 0 },
1180     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1181     & ifmt_jeqrle, { 0x3e }
1182   },
1183 /* jlt $dstle,$imm32,$disp16 */
1184   {
1185     { 0, 0, 0, 0 },
1186     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1187     & ifmt_jeqile, { 0xa5 }
1188   },
1189 /* jlt $dstle,$srcle,$disp16 */
1190   {
1191     { 0, 0, 0, 0 },
1192     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1193     & ifmt_jeqrle, { 0xad }
1194   },
1195 /* jlt32 $dstle,$imm32,$disp16 */
1196   {
1197     { 0, 0, 0, 0 },
1198     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1199     & ifmt_jeqile, { 0xa6 }
1200   },
1201 /* jlt32 $dstle,$srcle,$disp16 */
1202   {
1203     { 0, 0, 0, 0 },
1204     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1205     & ifmt_jeqrle, { 0xae }
1206   },
1207 /* jle $dstle,$imm32,$disp16 */
1208   {
1209     { 0, 0, 0, 0 },
1210     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1211     & ifmt_jeqile, { 0xb5 }
1212   },
1213 /* jle $dstle,$srcle,$disp16 */
1214   {
1215     { 0, 0, 0, 0 },
1216     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1217     & ifmt_jeqrle, { 0xbd }
1218   },
1219 /* jle32 $dstle,$imm32,$disp16 */
1220   {
1221     { 0, 0, 0, 0 },
1222     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1223     & ifmt_jeqile, { 0xb6 }
1224   },
1225 /* jle32 $dstle,$srcle,$disp16 */
1226   {
1227     { 0, 0, 0, 0 },
1228     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1229     & ifmt_jeqrle, { 0xbe }
1230   },
1231 /* jset $dstle,$imm32,$disp16 */
1232   {
1233     { 0, 0, 0, 0 },
1234     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1235     & ifmt_jeqile, { 0x45 }
1236   },
1237 /* jset $dstle,$srcle,$disp16 */
1238   {
1239     { 0, 0, 0, 0 },
1240     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1241     & ifmt_jeqrle, { 0x4d }
1242   },
1243 /* jset32 $dstle,$imm32,$disp16 */
1244   {
1245     { 0, 0, 0, 0 },
1246     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1247     & ifmt_jeqile, { 0x46 }
1248   },
1249 /* jset32 $dstle,$srcle,$disp16 */
1250   {
1251     { 0, 0, 0, 0 },
1252     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1253     & ifmt_jeqrle, { 0x4e }
1254   },
1255 /* jne $dstle,$imm32,$disp16 */
1256   {
1257     { 0, 0, 0, 0 },
1258     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1259     & ifmt_jeqile, { 0x55 }
1260   },
1261 /* jne $dstle,$srcle,$disp16 */
1262   {
1263     { 0, 0, 0, 0 },
1264     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1265     & ifmt_jeqrle, { 0x5d }
1266   },
1267 /* jne32 $dstle,$imm32,$disp16 */
1268   {
1269     { 0, 0, 0, 0 },
1270     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1271     & ifmt_jeqile, { 0x56 }
1272   },
1273 /* jne32 $dstle,$srcle,$disp16 */
1274   {
1275     { 0, 0, 0, 0 },
1276     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1277     & ifmt_jeqrle, { 0x5e }
1278   },
1279 /* jsgt $dstle,$imm32,$disp16 */
1280   {
1281     { 0, 0, 0, 0 },
1282     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1283     & ifmt_jeqile, { 0x65 }
1284   },
1285 /* jsgt $dstle,$srcle,$disp16 */
1286   {
1287     { 0, 0, 0, 0 },
1288     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1289     & ifmt_jeqrle, { 0x6d }
1290   },
1291 /* jsgt32 $dstle,$imm32,$disp16 */
1292   {
1293     { 0, 0, 0, 0 },
1294     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1295     & ifmt_jeqile, { 0x66 }
1296   },
1297 /* jsgt32 $dstle,$srcle,$disp16 */
1298   {
1299     { 0, 0, 0, 0 },
1300     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1301     & ifmt_jeqrle, { 0x6e }
1302   },
1303 /* jsge $dstle,$imm32,$disp16 */
1304   {
1305     { 0, 0, 0, 0 },
1306     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1307     & ifmt_jeqile, { 0x75 }
1308   },
1309 /* jsge $dstle,$srcle,$disp16 */
1310   {
1311     { 0, 0, 0, 0 },
1312     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1313     & ifmt_jeqrle, { 0x7d }
1314   },
1315 /* jsge32 $dstle,$imm32,$disp16 */
1316   {
1317     { 0, 0, 0, 0 },
1318     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1319     & ifmt_jeqile, { 0x76 }
1320   },
1321 /* jsge32 $dstle,$srcle,$disp16 */
1322   {
1323     { 0, 0, 0, 0 },
1324     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1325     & ifmt_jeqrle, { 0x7e }
1326   },
1327 /* jslt $dstle,$imm32,$disp16 */
1328   {
1329     { 0, 0, 0, 0 },
1330     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1331     & ifmt_jeqile, { 0xc5 }
1332   },
1333 /* jslt $dstle,$srcle,$disp16 */
1334   {
1335     { 0, 0, 0, 0 },
1336     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1337     & ifmt_jeqrle, { 0xcd }
1338   },
1339 /* jslt32 $dstle,$imm32,$disp16 */
1340   {
1341     { 0, 0, 0, 0 },
1342     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1343     & ifmt_jeqile, { 0xc6 }
1344   },
1345 /* jslt32 $dstle,$srcle,$disp16 */
1346   {
1347     { 0, 0, 0, 0 },
1348     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1349     & ifmt_jeqrle, { 0xce }
1350   },
1351 /* jsle $dstle,$imm32,$disp16 */
1352   {
1353     { 0, 0, 0, 0 },
1354     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1355     & ifmt_jeqile, { 0xd5 }
1356   },
1357 /* jsle $dstle,$srcle,$disp16 */
1358   {
1359     { 0, 0, 0, 0 },
1360     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1361     & ifmt_jeqrle, { 0xdd }
1362   },
1363 /* jsle32 $dstle,$imm32,$disp16 */
1364   {
1365     { 0, 0, 0, 0 },
1366     { { MNEM, ' ', OP (DSTLE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1367     & ifmt_jeqile, { 0xd6 }
1368   },
1369 /* jsle32 $dstle,$srcle,$disp16 */
1370   {
1371     { 0, 0, 0, 0 },
1372     { { MNEM, ' ', OP (DSTLE), ',', OP (SRCLE), ',', OP (DISP16), 0 } },
1373     & ifmt_jeqrle, { 0xde }
1374   },
1375 /* jeq $dstbe,$imm32,$disp16 */
1376   {
1377     { 0, 0, 0, 0 },
1378     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1379     & ifmt_jeqibe, { 0x15 }
1380   },
1381 /* jeq $dstbe,$srcbe,$disp16 */
1382   {
1383     { 0, 0, 0, 0 },
1384     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1385     & ifmt_jeqrbe, { 0x1d }
1386   },
1387 /* jeq32 $dstbe,$imm32,$disp16 */
1388   {
1389     { 0, 0, 0, 0 },
1390     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1391     & ifmt_jeqibe, { 0x16 }
1392   },
1393 /* jeq32 $dstbe,$srcbe,$disp16 */
1394   {
1395     { 0, 0, 0, 0 },
1396     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1397     & ifmt_jeqrbe, { 0x1e }
1398   },
1399 /* jgt $dstbe,$imm32,$disp16 */
1400   {
1401     { 0, 0, 0, 0 },
1402     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1403     & ifmt_jeqibe, { 0x25 }
1404   },
1405 /* jgt $dstbe,$srcbe,$disp16 */
1406   {
1407     { 0, 0, 0, 0 },
1408     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1409     & ifmt_jeqrbe, { 0x2d }
1410   },
1411 /* jgt32 $dstbe,$imm32,$disp16 */
1412   {
1413     { 0, 0, 0, 0 },
1414     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1415     & ifmt_jeqibe, { 0x26 }
1416   },
1417 /* jgt32 $dstbe,$srcbe,$disp16 */
1418   {
1419     { 0, 0, 0, 0 },
1420     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1421     & ifmt_jeqrbe, { 0x2e }
1422   },
1423 /* jge $dstbe,$imm32,$disp16 */
1424   {
1425     { 0, 0, 0, 0 },
1426     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1427     & ifmt_jeqibe, { 0x35 }
1428   },
1429 /* jge $dstbe,$srcbe,$disp16 */
1430   {
1431     { 0, 0, 0, 0 },
1432     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1433     & ifmt_jeqrbe, { 0x3d }
1434   },
1435 /* jge32 $dstbe,$imm32,$disp16 */
1436   {
1437     { 0, 0, 0, 0 },
1438     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1439     & ifmt_jeqibe, { 0x36 }
1440   },
1441 /* jge32 $dstbe,$srcbe,$disp16 */
1442   {
1443     { 0, 0, 0, 0 },
1444     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1445     & ifmt_jeqrbe, { 0x3e }
1446   },
1447 /* jlt $dstbe,$imm32,$disp16 */
1448   {
1449     { 0, 0, 0, 0 },
1450     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1451     & ifmt_jeqibe, { 0xa5 }
1452   },
1453 /* jlt $dstbe,$srcbe,$disp16 */
1454   {
1455     { 0, 0, 0, 0 },
1456     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1457     & ifmt_jeqrbe, { 0xad }
1458   },
1459 /* jlt32 $dstbe,$imm32,$disp16 */
1460   {
1461     { 0, 0, 0, 0 },
1462     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1463     & ifmt_jeqibe, { 0xa6 }
1464   },
1465 /* jlt32 $dstbe,$srcbe,$disp16 */
1466   {
1467     { 0, 0, 0, 0 },
1468     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1469     & ifmt_jeqrbe, { 0xae }
1470   },
1471 /* jle $dstbe,$imm32,$disp16 */
1472   {
1473     { 0, 0, 0, 0 },
1474     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1475     & ifmt_jeqibe, { 0xb5 }
1476   },
1477 /* jle $dstbe,$srcbe,$disp16 */
1478   {
1479     { 0, 0, 0, 0 },
1480     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1481     & ifmt_jeqrbe, { 0xbd }
1482   },
1483 /* jle32 $dstbe,$imm32,$disp16 */
1484   {
1485     { 0, 0, 0, 0 },
1486     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1487     & ifmt_jeqibe, { 0xb6 }
1488   },
1489 /* jle32 $dstbe,$srcbe,$disp16 */
1490   {
1491     { 0, 0, 0, 0 },
1492     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1493     & ifmt_jeqrbe, { 0xbe }
1494   },
1495 /* jset $dstbe,$imm32,$disp16 */
1496   {
1497     { 0, 0, 0, 0 },
1498     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1499     & ifmt_jeqibe, { 0x45 }
1500   },
1501 /* jset $dstbe,$srcbe,$disp16 */
1502   {
1503     { 0, 0, 0, 0 },
1504     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1505     & ifmt_jeqrbe, { 0x4d }
1506   },
1507 /* jset32 $dstbe,$imm32,$disp16 */
1508   {
1509     { 0, 0, 0, 0 },
1510     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1511     & ifmt_jeqibe, { 0x46 }
1512   },
1513 /* jset32 $dstbe,$srcbe,$disp16 */
1514   {
1515     { 0, 0, 0, 0 },
1516     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1517     & ifmt_jeqrbe, { 0x4e }
1518   },
1519 /* jne $dstbe,$imm32,$disp16 */
1520   {
1521     { 0, 0, 0, 0 },
1522     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1523     & ifmt_jeqibe, { 0x55 }
1524   },
1525 /* jne $dstbe,$srcbe,$disp16 */
1526   {
1527     { 0, 0, 0, 0 },
1528     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1529     & ifmt_jeqrbe, { 0x5d }
1530   },
1531 /* jne32 $dstbe,$imm32,$disp16 */
1532   {
1533     { 0, 0, 0, 0 },
1534     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1535     & ifmt_jeqibe, { 0x56 }
1536   },
1537 /* jne32 $dstbe,$srcbe,$disp16 */
1538   {
1539     { 0, 0, 0, 0 },
1540     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1541     & ifmt_jeqrbe, { 0x5e }
1542   },
1543 /* jsgt $dstbe,$imm32,$disp16 */
1544   {
1545     { 0, 0, 0, 0 },
1546     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1547     & ifmt_jeqibe, { 0x65 }
1548   },
1549 /* jsgt $dstbe,$srcbe,$disp16 */
1550   {
1551     { 0, 0, 0, 0 },
1552     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1553     & ifmt_jeqrbe, { 0x6d }
1554   },
1555 /* jsgt32 $dstbe,$imm32,$disp16 */
1556   {
1557     { 0, 0, 0, 0 },
1558     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1559     & ifmt_jeqibe, { 0x66 }
1560   },
1561 /* jsgt32 $dstbe,$srcbe,$disp16 */
1562   {
1563     { 0, 0, 0, 0 },
1564     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1565     & ifmt_jeqrbe, { 0x6e }
1566   },
1567 /* jsge $dstbe,$imm32,$disp16 */
1568   {
1569     { 0, 0, 0, 0 },
1570     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1571     & ifmt_jeqibe, { 0x75 }
1572   },
1573 /* jsge $dstbe,$srcbe,$disp16 */
1574   {
1575     { 0, 0, 0, 0 },
1576     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1577     & ifmt_jeqrbe, { 0x7d }
1578   },
1579 /* jsge32 $dstbe,$imm32,$disp16 */
1580   {
1581     { 0, 0, 0, 0 },
1582     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1583     & ifmt_jeqibe, { 0x76 }
1584   },
1585 /* jsge32 $dstbe,$srcbe,$disp16 */
1586   {
1587     { 0, 0, 0, 0 },
1588     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1589     & ifmt_jeqrbe, { 0x7e }
1590   },
1591 /* jslt $dstbe,$imm32,$disp16 */
1592   {
1593     { 0, 0, 0, 0 },
1594     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1595     & ifmt_jeqibe, { 0xc5 }
1596   },
1597 /* jslt $dstbe,$srcbe,$disp16 */
1598   {
1599     { 0, 0, 0, 0 },
1600     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1601     & ifmt_jeqrbe, { 0xcd }
1602   },
1603 /* jslt32 $dstbe,$imm32,$disp16 */
1604   {
1605     { 0, 0, 0, 0 },
1606     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1607     & ifmt_jeqibe, { 0xc6 }
1608   },
1609 /* jslt32 $dstbe,$srcbe,$disp16 */
1610   {
1611     { 0, 0, 0, 0 },
1612     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1613     & ifmt_jeqrbe, { 0xce }
1614   },
1615 /* jsle $dstbe,$imm32,$disp16 */
1616   {
1617     { 0, 0, 0, 0 },
1618     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1619     & ifmt_jeqibe, { 0xd5 }
1620   },
1621 /* jsle $dstbe,$srcbe,$disp16 */
1622   {
1623     { 0, 0, 0, 0 },
1624     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1625     & ifmt_jeqrbe, { 0xdd }
1626   },
1627 /* jsle32 $dstbe,$imm32,$disp16 */
1628   {
1629     { 0, 0, 0, 0 },
1630     { { MNEM, ' ', OP (DSTBE), ',', OP (IMM32), ',', OP (DISP16), 0 } },
1631     & ifmt_jeqibe, { 0xd6 }
1632   },
1633 /* jsle32 $dstbe,$srcbe,$disp16 */
1634   {
1635     { 0, 0, 0, 0 },
1636     { { MNEM, ' ', OP (DSTBE), ',', OP (SRCBE), ',', OP (DISP16), 0 } },
1637     & ifmt_jeqrbe, { 0xde }
1638   },
1639 /* call $disp32 */
1640   {
1641     { 0, 0, 0, 0 },
1642     { { MNEM, ' ', OP (DISP32), 0 } },
1643     & ifmt_callle, { 0x85 }
1644   },
1645 /* call $disp32 */
1646   {
1647     { 0, 0, 0, 0 },
1648     { { MNEM, ' ', OP (DISP32), 0 } },
1649     & ifmt_callle, { 0x85 }
1650   },
1651 /* call $dstle */
1652   {
1653     { 0, 0, 0, 0 },
1654     { { MNEM, ' ', OP (DSTLE), 0 } },
1655     & ifmt_negle, { 0x8d }
1656   },
1657 /* call $dstbe */
1658   {
1659     { 0, 0, 0, 0 },
1660     { { MNEM, ' ', OP (DSTBE), 0 } },
1661     & ifmt_negbe, { 0x8d }
1662   },
1663 /* ja $disp16 */
1664   {
1665     { 0, 0, 0, 0 },
1666     { { MNEM, ' ', OP (DISP16), 0 } },
1667     & ifmt_ja, { 0x5 }
1668   },
1669 /* exit */
1670   {
1671     { 0, 0, 0, 0 },
1672     { { MNEM, 0 } },
1673     & ifmt_exit, { 0x95 }
1674   },
1675 /* xadddw [$dstle+$offset16],$srcle */
1676   {
1677     { 0, 0, 0, 0 },
1678     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1679     & ifmt_ldxwle, { 0xdb }
1680   },
1681 /* xaddw [$dstle+$offset16],$srcle */
1682   {
1683     { 0, 0, 0, 0 },
1684     { { MNEM, ' ', '[', OP (DSTLE), '+', OP (OFFSET16), ']', ',', OP (SRCLE), 0 } },
1685     & ifmt_ldxwle, { 0xc3 }
1686   },
1687 /* xadddw [$dstbe+$offset16],$srcbe */
1688   {
1689     { 0, 0, 0, 0 },
1690     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1691     & ifmt_ldxwbe, { 0xdb }
1692   },
1693 /* xaddw [$dstbe+$offset16],$srcbe */
1694   {
1695     { 0, 0, 0, 0 },
1696     { { MNEM, ' ', '[', OP (DSTBE), '+', OP (OFFSET16), ']', ',', OP (SRCBE), 0 } },
1697     & ifmt_ldxwbe, { 0xc3 }
1698   },
1699 /* brkpt */
1700   {
1701     { 0, 0, 0, 0 },
1702     { { MNEM, 0 } },
1703     & ifmt_exit, { 0x8c }
1704   },
1705 };
1706
1707 #undef A
1708 #undef OPERAND
1709 #undef MNEM
1710 #undef OP
1711
1712 /* Formats for ALIAS macro-insns.  */
1713
1714 #define F(f) & bpf_cgen_ifld_table[BPF_##f]
1715 #undef F
1716
1717 /* Each non-simple macro entry points to an array of expansion possibilities.  */
1718
1719 #define A(a) (1 << CGEN_INSN_##a)
1720 #define OPERAND(op) BPF_OPERAND_##op
1721 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1722 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1723
1724 /* The macro instruction table.  */
1725
1726 static const CGEN_IBASE bpf_cgen_macro_insn_table[] =
1727 {
1728 };
1729
1730 /* The macro instruction opcode table.  */
1731
1732 static const CGEN_OPCODE bpf_cgen_macro_insn_opcode_table[] =
1733 {
1734 };
1735
1736 #undef A
1737 #undef OPERAND
1738 #undef MNEM
1739 #undef OP
1740
1741 #ifndef CGEN_ASM_HASH_P
1742 #define CGEN_ASM_HASH_P(insn) 1
1743 #endif
1744
1745 #ifndef CGEN_DIS_HASH_P
1746 #define CGEN_DIS_HASH_P(insn) 1
1747 #endif
1748
1749 /* Return non-zero if INSN is to be added to the hash table.
1750    Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
1751
1752 static int
1753 asm_hash_insn_p (const CGEN_INSN *insn ATTRIBUTE_UNUSED)
1754 {
1755   return CGEN_ASM_HASH_P (insn);
1756 }
1757
1758 static int
1759 dis_hash_insn_p (const CGEN_INSN *insn)
1760 {
1761   /* If building the hash table and the NO-DIS attribute is present,
1762      ignore.  */
1763   if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1764     return 0;
1765   return CGEN_DIS_HASH_P (insn);
1766 }
1767
1768 #ifndef CGEN_ASM_HASH
1769 #define CGEN_ASM_HASH_SIZE 127
1770 #ifdef CGEN_MNEMONIC_OPERANDS
1771 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1772 #else
1773 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1774 #endif
1775 #endif
1776
1777 /* It doesn't make much sense to provide a default here,
1778    but while this is under development we do.
1779    BUFFER is a pointer to the bytes of the insn, target order.
1780    VALUE is the first base_insn_bitsize bits as an int in host order.  */
1781
1782 #ifndef CGEN_DIS_HASH
1783 #define CGEN_DIS_HASH_SIZE 256
1784 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1785 #endif
1786
1787 /* The result is the hash value of the insn.
1788    Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
1789
1790 static unsigned int
1791 asm_hash_insn (const char *mnem)
1792 {
1793   return CGEN_ASM_HASH (mnem);
1794 }
1795
1796 /* BUF is a pointer to the bytes of the insn, target order.
1797    VALUE is the first base_insn_bitsize bits as an int in host order.  */
1798
1799 static unsigned int
1800 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED,
1801                      CGEN_INSN_INT value ATTRIBUTE_UNUSED)
1802 {
1803   return CGEN_DIS_HASH (buf, value);
1804 }
1805
1806 /* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
1807
1808 static void
1809 set_fields_bitsize (CGEN_FIELDS *fields, int size)
1810 {
1811   CGEN_FIELDS_BITSIZE (fields) = size;
1812 }
1813
1814 /* Function to call before using the operand instance table.
1815    This plugs the opcode entries and macro instructions into the cpu table.  */
1816
1817 void
1818 bpf_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1819 {
1820   int i;
1821   int num_macros = (sizeof (bpf_cgen_macro_insn_table) /
1822                     sizeof (bpf_cgen_macro_insn_table[0]));
1823   const CGEN_IBASE *ib = & bpf_cgen_macro_insn_table[0];
1824   const CGEN_OPCODE *oc = & bpf_cgen_macro_insn_opcode_table[0];
1825   CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1826
1827   /* This test has been added to avoid a warning generated
1828      if memset is called with a third argument of value zero.  */
1829   if (num_macros >= 1)
1830     memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1831   for (i = 0; i < num_macros; ++i)
1832     {
1833       insns[i].base = &ib[i];
1834       insns[i].opcode = &oc[i];
1835       bpf_cgen_build_insn_regex (& insns[i]);
1836     }
1837   cd->macro_insn_table.init_entries = insns;
1838   cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1839   cd->macro_insn_table.num_init_entries = num_macros;
1840
1841   oc = & bpf_cgen_insn_opcode_table[0];
1842   insns = (CGEN_INSN *) cd->insn_table.init_entries;
1843   for (i = 0; i < MAX_INSNS; ++i)
1844     {
1845       insns[i].opcode = &oc[i];
1846       bpf_cgen_build_insn_regex (& insns[i]);
1847     }
1848
1849   cd->sizeof_fields = sizeof (CGEN_FIELDS);
1850   cd->set_fields_bitsize = set_fields_bitsize;
1851
1852   cd->asm_hash_p = asm_hash_insn_p;
1853   cd->asm_hash = asm_hash_insn;
1854   cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1855
1856   cd->dis_hash_p = dis_hash_insn_p;
1857   cd->dis_hash = dis_hash_insn;
1858   cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
1859 }