1 # SOME DESCRIPTIVE TITLE.
2 # Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER
3 # This file is distributed under the same license as the PACKAGE package.
4 # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR.
9 "Project-Id-Version: PACKAGE VERSION\n"
10 "Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
11 "POT-Creation-Date: 2023-07-03 11:41+0100\n"
12 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
13 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
14 "Language-Team: LANGUAGE <LL@li.org>\n"
16 "Content-Type: text/plain; charset=CHARSET\n"
17 "Content-Transfer-Encoding: 8bit\n"
20 msgid "specified register cannot be read from"
24 msgid "specified register cannot be written to"
28 #: aarch64-dis.c:103 arc-dis.c:807 arm-dis.c:12303
30 msgid "unrecognised disassembler option: %s"
35 msgid "this `%s' should have an immediately preceding `%s'"
40 msgid "expected `%s' after previous `%s'"
47 "The following AARCH64 specific disassembler options are supported for use\n"
48 "with the -M switch (multiple options should be separated by commas):\n"
55 " no-aliases Don't print instruction aliases.\n"
62 " aliases Do print instruction aliases.\n"
69 " no-notes Don't print instruction notes.\n"
76 " notes Do print instruction notes.\n"
83 " debug_dump Temp switch for debug trace.\n"
86 #: aarch64-dis.c:4177 arc-dis.c:1607 arc-dis.c:1630 arc-dis.c:1633
87 #: loongarch-dis.c:332 mips-dis.c:2903 mips-dis.c:2915 mips-dis.c:2918
88 #: nfp-dis.c:2995 riscv-dis.c:1362 riscv-dis.c:1365
94 msgid "immediate value"
98 msgid "immediate offset"
101 #: aarch64-opc.c:1451
102 msgid "register number"
105 #: aarch64-opc.c:1461
106 msgid "register element index"
109 #: aarch64-opc.c:1471
113 #: aarch64-opc.c:1483
117 #: aarch64-opc.c:1602
118 msgid "expected a selection register in the range w12-w15"
121 #: aarch64-opc.c:1606
122 msgid "expected a selection register in the range w8-w11"
125 #: aarch64-opc.c:1625
126 msgid "starting offset is not a multiple of 2"
129 #: aarch64-opc.c:1626
130 msgid "starting offset is not a multiple of 4"
133 #: aarch64-opc.c:1634
134 msgid "expected a single offset rather than a range"
137 #: aarch64-opc.c:1638
138 msgid "expected a range of two offsets"
141 #: aarch64-opc.c:1641
142 msgid "expected a range of four offsets"
145 #: aarch64-opc.c:1700
146 msgid "reg pair must start from even reg"
149 #: aarch64-opc.c:1706
150 msgid "reg pair must be contiguous"
153 #: aarch64-opc.c:1720
154 msgid "extraneous register"
157 #: aarch64-opc.c:1726
158 msgid "missing register"
161 #: aarch64-opc.c:1737
162 msgid "stack pointer register expected"
165 #: aarch64-opc.c:1840 aarch64-opc.c:1856
166 msgid "start register out of range"
169 #: aarch64-opc.c:1985 aarch64-opc.c:1993
170 msgid "unexpected address writeback"
173 #: aarch64-opc.c:2004
174 msgid "address writeback expected"
177 #: aarch64-opc.c:2051
178 msgid "negative or unaligned offset expected"
181 #: aarch64-opc.c:2108
182 msgid "invalid register offset"
185 #: aarch64-opc.c:2130
186 msgid "invalid post-increment amount"
189 #: aarch64-opc.c:2146 aarch64-opc.c:2665
190 msgid "invalid shift amount"
193 #: aarch64-opc.c:2159
194 msgid "invalid extend/shift operator"
197 #: aarch64-opc.c:2205 aarch64-opc.c:2465 aarch64-opc.c:2500 aarch64-opc.c:2519
198 #: aarch64-opc.c:2527 aarch64-opc.c:2618 aarch64-opc.c:2795 aarch64-opc.c:2895
199 #: aarch64-opc.c:2908
200 msgid "immediate out of range"
203 #: aarch64-opc.c:2235 aarch64-opc.c:2277 aarch64-opc.c:2340 aarch64-opc.c:2374
204 msgid "invalid addressing mode"
207 #: aarch64-opc.c:2332
208 msgid "index register xzr is not allowed"
211 #: aarch64-opc.c:2453 aarch64-opc.c:2475 aarch64-opc.c:2698 aarch64-opc.c:2706
212 #: aarch64-opc.c:2772 aarch64-opc.c:2801
213 msgid "invalid shift operator"
216 #: aarch64-opc.c:2459
217 msgid "shift amount must be 0 or 12"
220 #: aarch64-opc.c:2482
221 msgid "shift amount must be a multiple of 16"
224 #: aarch64-opc.c:2494
225 msgid "negative immediate value not allowed"
228 #: aarch64-opc.c:2629
229 msgid "immediate zero expected"
232 #: aarch64-opc.c:2643
233 msgid "rotate expected to be 0, 90, 180 or 270"
236 #: aarch64-opc.c:2654
237 msgid "rotate expected to be 90 or 270"
240 #: aarch64-opc.c:2714
241 msgid "shift is not permitted"
244 #: aarch64-opc.c:2739
245 msgid "invalid value for immediate"
248 #: aarch64-opc.c:2764
249 msgid "shift amount must be 0 or 16"
252 #: aarch64-opc.c:2785
253 msgid "floating-point immediate expected"
256 #: aarch64-opc.c:2819
257 msgid "no shift amount allowed for 8-bit constants"
260 #: aarch64-opc.c:2829
261 msgid "shift amount must be 0 or 8"
264 #: aarch64-opc.c:2842
265 msgid "immediate too big for element size"
268 #: aarch64-opc.c:2849
269 msgid "invalid arithmetic immediate"
272 #: aarch64-opc.c:2863
273 msgid "floating-point value must be 0.5 or 1.0"
276 #: aarch64-opc.c:2873
277 msgid "floating-point value must be 0.5 or 2.0"
280 #: aarch64-opc.c:2883
281 msgid "floating-point value must be 0.0 or 1.0"
284 #: aarch64-opc.c:2914
285 msgid "invalid replicated MOV immediate"
288 #: aarch64-opc.c:2972
289 msgid "byte index must be a multiple of 8"
292 #: aarch64-opc.c:3002
294 "the register-index form of PRFM does not accept opcodes in the range 24-31"
297 #: aarch64-opc.c:3055
298 msgid "extend operator expected"
301 #: aarch64-opc.c:3068
302 msgid "missing extend operator"
305 #: aarch64-opc.c:3074
306 msgid "'LSL' operator not allowed"
309 #: aarch64-opc.c:3095
310 msgid "W register expected"
313 #: aarch64-opc.c:3106
314 msgid "shift operator expected"
317 #: aarch64-opc.c:3113
318 msgid "'ROR' operator not allowed"
321 #: aarch64-opc.c:4525
322 msgid "reading from a write-only register"
325 #: aarch64-opc.c:4527
326 msgid "writing to a read-only register"
329 #: aarch64-opc.c:6166
330 msgid "the three register operands must be distinct from one another"
333 #: aarch64-opc.c:6277
334 msgid "destination register differs from preceding instruction"
337 #: aarch64-opc.c:6280
338 msgid "source register differs from preceding instruction"
341 #: aarch64-opc.c:6283
342 msgid "size register differs from preceding instruction"
345 #: aarch64-opc.c:6331
346 msgid "instruction opens new dependency sequence without ending previous one"
349 #: aarch64-opc.c:6360
350 msgid "previous `movprfx' sequence not closed"
353 #: aarch64-opc.c:6379
354 msgid "SVE instruction expected after `movprfx'"
357 #: aarch64-opc.c:6392
358 msgid "SVE `movprfx' compatible instruction expected"
361 #: aarch64-opc.c:6480
362 msgid "predicated instruction expected after `movprfx'"
365 #: aarch64-opc.c:6492
366 msgid "merging predicate expected due to preceding `movprfx'"
369 #: aarch64-opc.c:6504
370 msgid "predicate register differs from that in preceding `movprfx'"
373 #: aarch64-opc.c:6523
374 msgid "output register of preceding `movprfx' not used in current instruction"
377 #: aarch64-opc.c:6536
378 msgid "output register of preceding `movprfx' expected as output"
381 #: aarch64-opc.c:6548
382 msgid "output register of preceding `movprfx' used as input"
385 #: aarch64-opc.c:6564
386 msgid "register size not compatible with previous `movprfx'"
390 msgid "branch operand unaligned"
393 #: alpha-opc.c:170 alpha-opc.c:186
394 msgid "jump hint unaligned"
400 "Warning: disassembly may be wrong due to guessed opcode class choice.\n"
401 "Use -M<class[,class]> to select the correct opcode class(es).\n"
406 msgid "An error occurred while generating the extension instruction operations"
411 msgid "unrecognised disassembler CPU option: %s"
417 "Warning: illegal use of double register pair.\n"
421 msgid "Enforce the designated architecture while decoding."
425 msgid "Recognize DSP instructions."
429 msgid "Recognize FPX SP instructions."
433 msgid "Recognize FPX DP instructions."
437 msgid "Recognize FPU QuarkSE-EM instructions."
441 msgid "Recognize double assist FPU instructions."
445 msgid "Recognize single precision FPU instructions."
449 msgid "Recognize double precision FPU instructions."
453 msgid "Recognize NPS400 instructions."
457 msgid "Use only hexadecimal number to print immediates."
464 "The following ARC specific disassembler options are supported for use \n"
465 "with the -M switch (multiple options should be separated by commas):\n"
468 #: arc-dis.c:1616 mips-dis.c:2910 riscv-dis.c:1357
472 " For the options above, the following values are supported for \"%s\":\n"
483 #: arc-opc.c:41 arc-opc.c:64 arc-opc.c:90 arc-opc.c:114
484 msgid "LP_COUNT register cannot be used as destination register"
488 msgid "cannot use odd number destination register"
491 #: arc-opc.c:101 arc-opc.c:112
492 msgid "cannot use odd number source register"
496 msgid "operand is not zero"
500 msgid "register R30 is a limm indicator"
504 msgid "register out of range"
508 msgid "register must be R0"
512 msgid "register must be R1"
516 msgid "register must be R2"
520 msgid "register must be R3"
524 msgid "register must be SP"
528 msgid "register must be GP"
532 msgid "register must be PCL"
536 msgid "register must be BLINK"
540 msgid "register must be ILINK1"
544 msgid "register must be ILINK2"
547 #. ARC NPS400 Support: See comment near head of file.
548 #: arc-opc.c:392 arc-opc.c:430 arc-opc.c:468 arc-opc.c:737
549 msgid "register must be either r0-r3 or r12-r15"
553 msgid "accepted values are from -1 to 6"
557 msgid "first register of the range should be r13"
561 msgid "last register of the range doesn't fit"
564 #: arc-opc.c:570 arc-opc.c:585
565 msgid "invalid register number, should be fp"
569 msgid "invalid register number, should be blink"
573 msgid "invalid register number, should be pcl"
577 msgid "invalid size, should be 1, 2, 4, or 8"
581 msgid "invalid immediate, must be 1, 2, or 4"
585 msgid "invalid value for CMEM ld/st immediate"
589 msgid "invalid position, should be 0, 16, 32, 48 or 64."
593 msgid "invalid position, should be 16, 32, 64 or 128."
597 msgid "invalid size value must be on range 1-64."
601 msgid "invalid position, should be 0, 8, 16, or 24"
605 msgid "invalid size, value must be "
609 msgid "value out of range 1 - 256"
613 msgid "value must be power of 2"
617 msgid "value must be in the range 0 to 28"
621 msgid "value must be in the range 1 to "
625 msgid "value must be in the range 0 to 240"
629 msgid "value must be a multiple of 16"
633 msgid "invalid address type for operand"
637 msgid "value must be in the range 0 to 31"
641 msgid "invalid position, should be one of: 0,4,8,...124."
645 msgid "Select raw register names"
649 msgid "Select register names used by GCC"
653 msgid "Select register names used in ARM's ISA documentation"
657 msgid "Assume all insns are Thumb insns"
661 msgid "Examine preceding label to determine an insn's type"
665 msgid "Select register names used in the APCS"
669 msgid "Select register names used in the ATPCS"
673 msgid "Select special register names used in the ATPCS"
677 msgid "Enable CDE extensions for coprocessor N space"
681 msgid "<illegal precision>"
686 msgid "unrecognised register name set: %s"
691 msgid "cde coprocessor not between 0-7: %s"
696 msgid "coproc must have an argument: %s"
701 msgid "coprocN argument takes options \"generic\", \"cde\", or \"CDE\": %s"
708 "The following ARM specific disassembler options are supported for use with\n"
712 #: avr-dis.c:130 avr-dis.c:152
719 msgid "internal disassembler error"
724 msgid "unknown constraint `%c'"
728 msgid "expected 16, 32 or 64 in"
731 #: bpf-asm.c:181 epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264
732 #: ip2k-asm.c:512 iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585
733 #: m32r-asm.c:329 mep-asm.c:1286 mt-asm.c:596 or1k-asm.c:576
734 #: xstormy16-asm.c:277
736 msgid "internal error: unrecognized field %d while parsing"
739 #: bpf-asm.c:233 epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316
740 #: ip2k-asm.c:564 iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637
741 #: m32r-asm.c:381 mep-asm.c:1338 mt-asm.c:648 or1k-asm.c:628
742 #: xstormy16-asm.c:329
743 msgid "missing mnemonic in syntax string"
746 #. We couldn't parse it.
747 #: bpf-asm.c:368 bpf-asm.c:372 bpf-asm.c:461 bpf-asm.c:568 epiphany-asm.c:643
748 #: epiphany-asm.c:647 epiphany-asm.c:736 epiphany-asm.c:843 fr30-asm.c:498
749 #: fr30-asm.c:502 fr30-asm.c:591 fr30-asm.c:698 frv-asm.c:1451 frv-asm.c:1455
750 #: frv-asm.c:1544 frv-asm.c:1651 ip2k-asm.c:699 ip2k-asm.c:703 ip2k-asm.c:792
751 #: ip2k-asm.c:899 iq2000-asm.c:647 iq2000-asm.c:651 iq2000-asm.c:740
752 #: iq2000-asm.c:847 lm32-asm.c:537 lm32-asm.c:541 lm32-asm.c:630
753 #: lm32-asm.c:737 m32c-asm.c:1772 m32c-asm.c:1776 m32c-asm.c:1865
754 #: m32c-asm.c:1972 m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609 m32r-asm.c:716
755 #: mep-asm.c:1473 mep-asm.c:1477 mep-asm.c:1566 mep-asm.c:1673 mt-asm.c:783
756 #: mt-asm.c:787 mt-asm.c:876 mt-asm.c:983 or1k-asm.c:763 or1k-asm.c:767
757 #: or1k-asm.c:856 or1k-asm.c:963 xstormy16-asm.c:464 xstormy16-asm.c:468
758 #: xstormy16-asm.c:557 xstormy16-asm.c:664
759 msgid "unrecognized instruction"
762 #: bpf-asm.c:415 epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498
763 #: ip2k-asm.c:746 iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819
764 #: m32r-asm.c:563 mep-asm.c:1520 mt-asm.c:830 or1k-asm.c:810
765 #: xstormy16-asm.c:511
767 msgid "syntax error (expected char `%c', found `%c')"
770 #: bpf-asm.c:425 epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508
771 #: ip2k-asm.c:756 iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829
772 #: m32r-asm.c:573 mep-asm.c:1530 mt-asm.c:840 or1k-asm.c:820
773 #: xstormy16-asm.c:521
775 msgid "syntax error (expected char `%c', found end of instruction)"
778 #: bpf-asm.c:455 epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538
779 #: ip2k-asm.c:786 iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859
780 #: m32r-asm.c:603 mep-asm.c:1560 mt-asm.c:870 or1k-asm.c:850
781 #: xstormy16-asm.c:551
782 msgid "junk at end of line"
785 #: bpf-asm.c:567 epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650
786 #: ip2k-asm.c:898 iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971
787 #: m32r-asm.c:715 mep-asm.c:1672 mt-asm.c:982 or1k-asm.c:962
788 #: xstormy16-asm.c:663
789 msgid "unrecognized form of instruction"
792 #: bpf-asm.c:581 epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664
793 #: ip2k-asm.c:912 iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985
794 #: m32r-asm.c:729 mep-asm.c:1686 mt-asm.c:996 or1k-asm.c:976
795 #: xstormy16-asm.c:677
797 msgid "bad instruction `%.50s...'"
800 #: bpf-asm.c:584 epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667
801 #: ip2k-asm.c:915 iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988
802 #: m32r-asm.c:732 mep-asm.c:1689 mt-asm.c:999 or1k-asm.c:979
803 #: xstormy16-asm.c:680
805 msgid "bad instruction `%.50s'"
811 "internal error: bpf_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
812 "values: `%d' vs. `%d'"
817 msgid "internal error: bpf_cgen_cpu_open: unsupported argument `%d'"
822 msgid "internal error: bpf_cgen_cpu_open: no endianness specified"
825 #. Default text to print if an instruction isn't recognized.
826 #: bpf-dis.c:41 epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41
827 #: iq2000-dis.c:41 lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41
828 #: mmix-dis.c:293 mt-dis.c:41 nds32-dis.c:64 or1k-dis.c:41 xstormy16-dis.c:41
832 #: bpf-dis.c:203 epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397
833 #: ip2k-dis.c:289 iq2000-dis.c:190 lm32-dis.c:148 m32c-dis.c:892
834 #: m32r-dis.c:280 mep-dis.c:1202 mt-dis.c:288 or1k-dis.c:175
835 #: xstormy16-dis.c:169
837 msgid "internal error: unrecognized field %d while printing insn"
840 #: bpf-ibld.c:166 epiphany-ibld.c:166 fr30-ibld.c:166 frv-ibld.c:166
841 #: ip2k-ibld.c:166 iq2000-ibld.c:166 lm32-ibld.c:166 m32c-ibld.c:166
842 #: m32r-ibld.c:166 mep-ibld.c:166 mt-ibld.c:166 or1k-ibld.c:166
843 #: xstormy16-ibld.c:166
845 msgid "operand out of range (%ld not between %ld and %lu)"
848 #: bpf-ibld.c:187 epiphany-ibld.c:187 fr30-ibld.c:187 frv-ibld.c:187
849 #: ip2k-ibld.c:187 iq2000-ibld.c:187 lm32-ibld.c:187 m32c-ibld.c:187
850 #: m32r-ibld.c:187 mep-ibld.c:187 mt-ibld.c:187 or1k-ibld.c:187
851 #: xstormy16-ibld.c:187
853 msgid "operand out of range (0x%lx not between 0 and 0x%lx)"
856 #: bpf-ibld.c:203 cgen-asm.c:351 epiphany-ibld.c:203 fr30-ibld.c:203
857 #: frv-ibld.c:203 ip2k-ibld.c:203 iq2000-ibld.c:203 lm32-ibld.c:203
858 #: m32c-ibld.c:203 m32r-ibld.c:203 mep-ibld.c:203 mt-ibld.c:203
859 #: or1k-ibld.c:203 xstormy16-ibld.c:203
861 msgid "operand out of range (%ld not between %ld and %ld)"
864 #: bpf-ibld.c:630 epiphany-ibld.c:885 fr30-ibld.c:740 frv-ibld.c:866
865 #: ip2k-ibld.c:617 iq2000-ibld.c:723 lm32-ibld.c:644 m32c-ibld.c:1741
866 #: m32r-ibld.c:675 mep-ibld.c:1218 mt-ibld.c:759 or1k-ibld.c:738
867 #: xstormy16-ibld.c:688
869 msgid "internal error: unrecognized field %d while building insn"
872 #: bpf-ibld.c:714 epiphany-ibld.c:1180 fr30-ibld.c:946 frv-ibld.c:1184
873 #: ip2k-ibld.c:693 iq2000-ibld.c:899 lm32-ibld.c:749 m32c-ibld.c:2903
874 #: m32r-ibld.c:813 mep-ibld.c:1818 mt-ibld.c:980 or1k-ibld.c:897
875 #: xstormy16-ibld.c:835
877 msgid "internal error: unrecognized field %d while decoding insn"
880 #: bpf-ibld.c:783 epiphany-ibld.c:1324 fr30-ibld.c:1093 frv-ibld.c:1463
881 #: ip2k-ibld.c:768 iq2000-ibld.c:1031 lm32-ibld.c:839 m32c-ibld.c:3521
882 #: m32r-ibld.c:927 mep-ibld.c:2289 mt-ibld.c:1181 or1k-ibld.c:993
883 #: xstormy16-ibld.c:946
885 msgid "internal error: unrecognized field %d while getting int operand"
888 #: bpf-ibld.c:834 epiphany-ibld.c:1450 fr30-ibld.c:1222 frv-ibld.c:1724
889 #: ip2k-ibld.c:825 iq2000-ibld.c:1145 lm32-ibld.c:911 m32c-ibld.c:4121
890 #: m32r-ibld.c:1023 mep-ibld.c:2742 mt-ibld.c:1364 or1k-ibld.c:1071
891 #: xstormy16-ibld.c:1039
893 msgid "internal error: unrecognized field %d while getting vma operand"
896 #: bpf-ibld.c:892 epiphany-ibld.c:1583 fr30-ibld.c:1354 frv-ibld.c:1992
897 #: ip2k-ibld.c:885 iq2000-ibld.c:1266 lm32-ibld.c:990 m32c-ibld.c:4709
898 #: m32r-ibld.c:1125 mep-ibld.c:3156 mt-ibld.c:1554 or1k-ibld.c:1156
899 #: xstormy16-ibld.c:1139
901 msgid "internal error: unrecognized field %d while setting int operand"
904 #: bpf-ibld.c:940 epiphany-ibld.c:1706 fr30-ibld.c:1476 frv-ibld.c:2250
905 #: ip2k-ibld.c:935 iq2000-ibld.c:1377 lm32-ibld.c:1059 m32c-ibld.c:5287
906 #: m32r-ibld.c:1217 mep-ibld.c:3560 mt-ibld.c:1734 or1k-ibld.c:1231
907 #: xstormy16-ibld.c:1229
909 msgid "internal error: unrecognized field %d while setting vma operand"
914 msgid "operand out of range (%lu not between %lu and %lu)"
920 "internal error: cris_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
921 "values: `%d' vs. `%d'"
926 msgid "internal error: cris_cgen_cpu_open: unsupported argument `%d'"
931 msgid "internal error: cris_cgen_cpu_open: no endianness specified"
936 msgid "illegal id (%d)"
941 msgid "<unknown register %d>"
947 msgid "Unknown error %d\n"
952 msgid "Address 0x%<PRIx64> is out of bounds.\n"
957 msgid "assertion fail %s:%d"
961 msgid "Please report this bug"
965 msgid "register unavailable for short instructions"
968 #: epiphany-asm.c:115
969 msgid "register name used as immediate value"
972 #. Don't treat "mov ip,ip" as a move-immediate.
973 #: epiphany-asm.c:178 epiphany-asm.c:234
974 msgid "register source in immediate move"
977 #: epiphany-asm.c:187
978 msgid "byte relocation unsupported"
981 #. -- assembler routines inserted here.
983 #: epiphany-asm.c:193 frv-asm.c:972 iq2000-asm.c:56 lm32-asm.c:95
984 #: lm32-asm.c:127 lm32-asm.c:157 lm32-asm.c:187 lm32-asm.c:217 lm32-asm.c:247
985 #: m32c-asm.c:140 m32c-asm.c:235 m32c-asm.c:276 m32c-asm.c:334 m32c-asm.c:355
986 #: m32r-asm.c:53 mep-asm.c:241 mep-asm.c:259 mep-asm.c:274 mep-asm.c:289
987 #: mep-asm.c:301 or1k-asm.c:54
991 #: epiphany-asm.c:270
992 msgid "ABORT: unknown operand"
995 #: epiphany-asm.c:296
996 msgid "Not a pc-relative address."
999 #: epiphany-desc.c:2110
1002 "internal error: epiphany_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1003 "values: `%d' vs. `%d'"
1006 #: epiphany-desc.c:2198
1008 msgid "internal error: epiphany_cgen_cpu_open: unsupported argument `%d'"
1011 #: epiphany-desc.c:2217
1013 msgid "internal error: epiphany_cgen_cpu_open: no endianness specified"
1016 #: fr30-asm.c:93 m32c-asm.c:872 m32c-asm.c:879
1017 msgid "Register number is not valid"
1021 msgid "Register must be between r0 and r7"
1025 msgid "Register must be between r8 and r15"
1028 #: fr30-asm.c:116 m32c-asm.c:910
1029 msgid "Register list is not valid"
1035 "internal error: fr30_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1036 "values: `%d' vs. `%d'"
1041 msgid "internal error: fr30_cgen_cpu_open: unsupported argument `%d'"
1046 msgid "internal error: fr30_cgen_cpu_open: no endianness specified"
1053 #: frv-asm.c:611 frv-asm.c:621
1054 msgid "Special purpose register number is out of range"
1058 msgid "Value of A operand must be 0 or 1"
1062 msgid "register number must be even"
1068 "internal error: frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1069 "values: `%d' vs. `%d'"
1074 msgid "internal error: frv_cgen_cpu_open: unsupported argument `%d'"
1079 msgid "internal error: frv_cgen_cpu_open: no endianness specified"
1084 msgid "internal error: bad vliw->next_slot value"
1089 msgid "internal error: bad major code"
1094 msgid "internal error: bad insn unit"
1104 msgid "Don't understand 0x%x \n"
1108 msgid "<internal disassembler error>"
1115 "The following i386/x86-64 specific disassembler options are supported for "
1117 "with the -M switch (multiple options should be separated by commas):\n"
1122 msgid " x86-64 Disassemble in 64bit mode\n"
1127 msgid " i386 Disassemble in 32bit mode\n"
1132 msgid " i8086 Disassemble in 16bit mode\n"
1137 msgid " att Display instruction in AT&T syntax\n"
1142 msgid " intel Display instruction in Intel syntax\n"
1149 " Display instruction in AT&T mnemonic\n"
1156 " Display instruction in Intel mnemonic\n"
1161 msgid " addr64 Assume 64bit address size\n"
1166 msgid " addr32 Assume 32bit address size\n"
1171 msgid " addr16 Assume 16bit address size\n"
1176 msgid " data32 Assume 32bit data size\n"
1181 msgid " data16 Assume 16bit data size\n"
1186 msgid " suffix Always display instruction suffix in AT&T syntax\n"
1191 msgid " amd64 Display instruction in AMD64 ISA\n"
1196 msgid " intel64 Display instruction in Intel64 ISA\n"
1200 msgid "64-bit address is disabled"
1203 #. We've been passed a w. Return with an error message so that
1204 #. cgen will try the next parsing option.
1206 msgid "W keyword invalid in FR operand slot."
1209 #. Invalid offset present.
1211 msgid "offset(IP) is not a valid form"
1214 #. Found something there in front of (DP) but it's out
1217 msgid "(DP) offset out of range."
1220 #. Found something there in front of (SP) but it's out
1223 msgid "(SP) offset out of range."
1227 msgid "illegal use of parentheses"
1231 msgid "operand out of range (not between 1 and 255)"
1234 #. Something is very wrong. opindex has to be one of the above.
1236 msgid "parse_addr16: invalid opindex."
1240 msgid "Byte address required. - must be even."
1244 msgid "cgen_parse_address returned a symbol. Literal required."
1248 msgid "percent-operator operand is not a symbol"
1252 msgid "Attempt to find bit index of 0"
1258 "internal error: ip2k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1259 "values: `%d' vs. `%d'"
1264 msgid "internal error: ip2k_cgen_cpu_open: unsupported argument `%d'"
1269 msgid "internal error: ip2k_cgen_cpu_open: no endianness specified"
1272 #: iq2000-asm.c:112 iq2000-asm.c:142
1273 msgid "immediate value cannot be register"
1276 #: iq2000-asm.c:123 iq2000-asm.c:153 lm32-asm.c:70
1277 msgid "immediate value out of range"
1281 msgid "21-bit offset out of range"
1284 #: iq2000-desc.c:2021
1287 "internal error: iq2000_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1288 "values: `%d' vs. `%d'"
1291 #: iq2000-desc.c:2109
1293 msgid "internal error: iq2000_cgen_cpu_open: unsupported argument `%d'"
1296 #: iq2000-desc.c:2128
1298 msgid "internal error: iq2000_cgen_cpu_open: no endianness specified"
1302 msgid "expecting gp relative address: gp(symbol)"
1306 msgid "expecting got relative address: got(symbol)"
1310 msgid "expecting got relative address: gotoffhi16(symbol)"
1314 msgid "expecting got relative address: gotofflo16(symbol)"
1320 "internal error: lm32_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1321 "values: `%d' vs. `%d'"
1326 msgid "internal error: lm32_cgen_cpu_open: unsupported argument `%d'"
1331 msgid "internal error: lm32_cgen_cpu_open: no endianness specified"
1334 #: loongarch-dis.c:324
1338 "The following LoongArch disassembler options are supported for use\n"
1339 "with the -M switch (multiple options should be separated by commas):\n"
1342 #: loongarch-dis.c:328
1346 " no-aliases Use canonical instruction forms.\n"
1349 #: loongarch-dis.c:330
1353 " numeric Print numeric register names, rather than ABI names.\n"
1356 #: m10200-dis.c:151 m10300-dis.c:574
1358 msgid "unknown\t0x%04lx"
1363 msgid "unknown\t0x%02lx"
1367 msgid "imm:6 immediate is out of range"
1372 msgid "%dsp8() takes a symbolic address, not a number"
1375 #: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:253
1376 msgid "dsp:8 immediate is out of range"
1379 #: m32c-asm.c:184 m32c-asm.c:188
1380 msgid "Immediate is out of range -8 to 7"
1383 #: m32c-asm.c:209 m32c-asm.c:213
1384 msgid "Immediate is out of range -7 to 8"
1389 msgid "%dsp16() takes a symbolic address, not a number"
1392 #: m32c-asm.c:305 m32c-asm.c:312 m32c-asm.c:373
1393 msgid "dsp:16 immediate is out of range"
1397 msgid "dsp:20 immediate is out of range"
1400 #: m32c-asm.c:425 m32c-asm.c:445
1401 msgid "dsp:24 immediate is out of range"
1405 msgid "immediate is out of range 1-2"
1409 msgid "immediate is out of range 1-8"
1413 msgid "immediate is out of range 0-7"
1417 msgid "immediate is out of range 2-9"
1421 msgid "Bit number for indexing general register is out of range 0-15"
1424 #: m32c-asm.c:606 m32c-asm.c:662
1425 msgid "bit,base is out of range"
1428 #: m32c-asm.c:613 m32c-asm.c:618 m32c-asm.c:666
1429 msgid "bit,base out of range for symbol"
1433 msgid "not a valid r0l/r0h pair"
1437 msgid "Invalid size specifier"
1440 #: m32c-desc.c:63034
1443 "internal error: m32c_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1444 "values: `%d' vs. `%d'"
1447 #: m32c-desc.c:63122
1449 msgid "internal error: m32c_cgen_cpu_open: unsupported argument `%d'"
1452 #: m32c-desc.c:63141
1454 msgid "internal error: m32c_cgen_cpu_open: no endianness specified"
1460 "internal error: m32r_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1461 "values: `%d' vs. `%d'"
1466 msgid "internal error: m32r_cgen_cpu_open: unsupported argument `%d'"
1471 msgid "internal error: m32r_cgen_cpu_open: no endianness specified"
1476 msgid "<function code %d>"
1481 msgid "<internal error in opcode table: %s %s>\n"
1485 msgid "Only $tp or $13 allowed for this opcode"
1489 msgid "Only $sp or $15 allowed for this opcode"
1492 #: mep-asm.c:308 mep-asm.c:504
1494 msgid "invalid %function() here"
1498 msgid "Immediate is out of range -32768 to 32767"
1502 msgid "Immediate is out of range 0 to 65535"
1505 #: mep-asm.c:549 mep-asm.c:562
1506 msgid "Immediate is out of range -512 to 511"
1509 #: mep-asm.c:554 mep-asm.c:563
1510 msgid "Immediate is out of range -128 to 127"
1514 msgid "Value is not aligned enough"
1520 "internal error: mep_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1521 "values: `%d' vs. `%d'"
1526 msgid "internal error: mep_cgen_cpu_open: unsupported argument `%d'"
1531 msgid "internal error: mep_cgen_cpu_open: no endianness specified"
1536 msgid "illegal MEP INDEX setting '%x' in ELF header e_flags field"
1539 #: mips-dis.c:1907 mips-dis.c:2140
1541 msgid "# internal error, undefined operand in `%s %s'"
1545 msgid "Use canonical instruction forms.\n"
1549 msgid "Recognize MSA instructions.\n"
1553 msgid "Recognize the virtualization ASE instructions.\n"
1558 "Recognize the eXtended Physical Address (XPA) ASE\n"
1563 msgid "Recognize the Global INValidate (GINV) ASE instructions.\n"
1568 "Recognize the Loongson MultiMedia extensions Instructions (MMI) ASE "
1573 msgid "Recognize the Loongson Content Address Memory (CAM) instructions.\n"
1577 msgid "Recognize the Loongson EXTensions (EXT) instructions.\n"
1581 msgid "Recognize the Loongson EXTensions R2 (EXT2) instructions.\n"
1586 "Print GPR names according to specified ABI.\n"
1587 " Default: based on binary being disassembled.\n"
1592 "Print FPR names according to specified ABI.\n"
1593 " Default: numeric.\n"
1598 "Print CP0 register names according to specified architecture.\n"
1599 " Default: based on binary being disassembled.\n"
1604 "Print HWR names according to specified architecture.\n"
1605 " Default: based on binary being disassembled.\n"
1609 msgid "Print GPR and FPR names according to specified ABI.\n"
1614 "Print CP0 register and HWR names according to specified\n"
1622 "The following MIPS specific disassembler options are supported for use\n"
1623 "with the -M switch (multiple options should be separated by commas):\n"
1629 msgid "bad case %d (%s) in %s:%d"
1634 msgid "internal: non-debugged code (test-case missing): %s:%d"
1641 #: mmix-dis.c:247 mmix-dis.c:255
1647 msgid "*unknown operands type: %d*"
1650 #: msp430-decode.opc:145 rl78-decode.opc:106
1652 msgid "internal error: immediate() called with invalid byte count %d"
1657 msgid "Warning: disassembly unreliable - not enough bytes available"
1662 msgid "Error: read from memory failed"
1666 msgid "Warning: illegal as emulation instr"
1669 #. R2/R3 are illegal as dest: may be data section.
1671 msgid "Warning: illegal as 2-op instr"
1674 #: msp430-dis.c:1002
1675 msgid "Warning: unrecognised CALLA addressing mode"
1678 #: msp430-dis.c:1303 msp430-dis.c:1324 msp430-dis.c:1345
1680 msgid "Warning: reserved use of A/L and B/W bits detected"
1683 #: mt-asm.c:110 mt-asm.c:190
1684 msgid "Operand out of range. Must be between -32768 and 32767."
1688 msgid "Biiiig Trouble in parse_imm16!"
1692 msgid "The percent-operator's operand is not a symbol"
1696 msgid "invalid operand. type may have values 0,1,2 only."
1702 "internal error: mt_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1703 "values: `%d' vs. `%d'"
1708 msgid "internal error: mt_cgen_cpu_open: unsupported argument `%d'"
1713 msgid "internal error: mt_cgen_cpu_open: no endianness specified"
1718 msgid "internal error: unknown operand, %s"
1723 msgid "internal error: don't know how to handle parsing results"
1728 msgid "internal error: unknown hardware resource"
1732 msgid "insufficient data to decode instruction"
1736 msgid "<invalid_instruction>:"
1740 msgid ", <invalid CRC operator>, "
1744 msgid "<invalid branch>["
1747 #: nfp-dis.c:2055 nfp-dis.c:2326
1749 msgid "<invalid cmd target %d:%d:%d>[]"
1752 #: nfp-dis.c:2066 nfp-dis.c:2337
1754 msgid "<invalid cmd action %d:%d:%d>[]"
1758 msgid "File has no ME-Config section."
1762 msgid "File has invalid ME-Config section."
1767 msgid "Error processing section %u "
1772 msgid "Invalid NFP option: %s"
1779 "The following NFP specific disassembler options are supported for use\n"
1780 "with the -M switch (multiple options should be separated by commas):\n"
1787 " no-pc\t\t Don't print program counter prefix.\n"
1788 " ctx4\t\t Force disassembly using 4-context mode.\n"
1789 " ctx8\t\t Force 8-context mode, takes precedence."
1794 msgid "out of memory"
1799 msgid "internal error: broken opcode descriptor for `%s %s'"
1802 #. I and Z are output operands and can`t be immediate
1803 #. A is an address and we can`t have the address of
1804 #. an immediate either. We don't know how much to increase
1805 #. aoffsetp by since whatever generated this is broken
1809 msgid "$<undefined>"
1813 msgid "relocation invalid for store"
1817 msgid "internal relocation type invalid"
1823 "internal error: or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1824 "values: `%d' vs. `%d'"
1829 msgid "internal error: or1k_cgen_cpu_open: unsupported argument `%d'"
1834 msgid "internal error: or1k_cgen_cpu_open: no endianness specified"
1839 msgid "warning: ignoring unknown -M%s option"
1846 "The following PPC specific disassembler options are supported for use with\n"
1850 #: ppc-opc.c:52 ppc-opc.c:75 ppc-opc.c:101 ppc-opc.c:131
1851 msgid "invalid register"
1855 msgid "invalid conditional option"
1859 msgid "invalid counter access"
1863 msgid "BO value implies no branch hint, when using + or - modifier"
1867 msgid "attempt to set y bit when using + or - modifier"
1871 msgid "attempt to set 'at' bits when using + or - modifier"
1875 msgid "invalid offset: must be in the range [-512, -8] and be a multiple of 8"
1879 msgid "invalid R operand"
1883 msgid "invalid mask field"
1887 msgid "invalid mfcr mask"
1890 #: ppc-opc.c:902 ppc-opc.c:920
1891 msgid "illegal L operand value"
1895 msgid "illegal WC operand value"
1899 msgid "incompatible L operand value"
1902 #: ppc-opc.c:1239 ppc-opc.c:1274
1903 msgid "illegal bitmask"
1907 msgid "address register in load range"
1911 msgid "illegal PL operand value"
1915 msgid "index register in load range"
1918 #: ppc-opc.c:1568 ppc-opc.c:1654
1919 msgid "source and target register operands must be different"
1923 msgid "invalid register operand when updating"
1927 msgid "illegal immediate value"
1931 msgid "invalid bat number"
1935 msgid "invalid sprg number"
1939 msgid "invalid tbr number"
1942 #: ppc-opc.c:2203 ppc-opc.c:2271
1943 msgid "VSR overlaps ACC operand"
1947 msgid "invalid constant"
1950 #: ppc-opc.c:2482 ppc-opc.c:2505 ppc-opc.c:2528 ppc-opc.c:2551
1951 msgid "UIMM = 00000 is illegal"
1955 msgid "UIMM values >7 are illegal"
1959 msgid "UIMM values >15 are illegal"
1963 msgid "GPR odd is illegal"
1966 #: ppc-opc.c:2643 ppc-opc.c:2666
1967 msgid "invalid offset"
1971 msgid "invalid Ddd value"
1974 #: ppc-opc.c:2742 ppc-opc.c:2769
1975 msgid "invalid TH value"
1978 #. The option without '=' should be defined above.
1979 #: riscv-dis.c:120 riscv-dis.c:157
1981 msgid "unrecognized disassembler option: %s"
1984 #. Invalid options with '=', no option name before '=',
1985 #. and no value after '='.
1988 msgid "unrecognized disassembler option with '=': %s"
1993 msgid "unknown privileged spec set by %s=%s"
1999 "mis-matched privilege spec set by %s=%s, the elf privilege attribute is %s"
2004 msgid "# internal error, undefined modifier (%c)"
2008 msgid "Print numeric register names, rather than ABI names."
2012 msgid "Disassemble only into canonical instructions."
2016 msgid "Print the CSR according to the chosen privilege spec."
2023 "The following RISC-V specific disassembler options are supported for use\n"
2024 "with the -M switch (multiple options should be separated by commas):\n"
2027 #: rx-dis.c:139 rx-dis.c:163 rx-dis.c:171 rx-dis.c:179 rx-dis.c:187
2028 msgid "<invalid register number>"
2031 #: rx-dis.c:147 rx-dis.c:195
2032 msgid "<invalid condition code>"
2036 msgid "<invalid flag>"
2040 msgid "<invalid opsize>"
2044 msgid "<invalid size>"
2047 #: s12z-dis.c:239 s12z-dis.c:296 s12z-dis.c:307
2048 msgid "<illegal reg num>"
2060 msgid "Disassemble in ESA architecture mode"
2064 msgid "Disassemble in z/Architecture mode"
2068 msgid "Print unknown instructions according to length from first two bits"
2073 msgid "unknown S/390 disassembler option: %s"
2080 "The following S/390 specific disassembler options are supported for use\n"
2081 "with the -M switch (multiple options should be separated by commas):\n"
2084 #: score-dis.c:653 score-dis.c:871 score-dis.c:1032 score-dis.c:1138
2085 #: score-dis.c:1146 score-dis.c:1153 score7-dis.c:691 score7-dis.c:854
2086 msgid "<illegal instruction>"
2089 #: sparc-dis.c:308 sparc-dis.c:318
2091 msgid "internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
2096 msgid "internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
2099 #. Mark as non-valid instruction.
2105 msgid "<invalid s-reg number>"
2109 msgid "<invalid reg number>"
2113 msgid "<invalid v-reg number>"
2117 msgid "<invalid CC-reg number>"
2121 msgid "<invalid float-CC-reg number>"
2125 msgid "<invalid cacheop number>"
2129 msgid "<invalid prefop number>"
2134 msgid "unknown operand shift: %x"
2139 msgid "unknown reg: %d"
2142 #. The functions used to insert and extract complicated operands.
2143 #. Note: There is a conspiracy between these functions and
2144 #. v850_insert_operand() in gas/config/tc-v850.c. Error messages
2145 #. containing the string 'out of range' will be ignored unless a
2146 #. specific command line option is given to GAS.
2148 msgid "displacement value is not in range and is not aligned"
2152 msgid "displacement value is out of range"
2156 msgid "displacement value is not aligned"
2160 msgid "immediate value is out of range"
2164 msgid "branch value out of range"
2168 msgid "branch value not in range and to odd offset"
2172 msgid "branch to odd offset"
2176 msgid "position value is out of range"
2180 msgid "width value is out of range"
2184 msgid "SelID is out of range"
2188 msgid "vector8 is out of range"
2192 msgid "vector5 is out of range"
2196 msgid "imm10 is out of range"
2200 msgid "SR/SelID is out of range"
2204 msgid "invalid register for stack adjustment"
2208 msgid "invalid register name"
2212 msgid "Disassemble \"register\" names"
2216 msgid "Name well-known globals"
2222 "The following WebAssembly-specific disassembler options are supported for "
2224 "with the -M switch:\n"
2227 #: xstormy16-asm.c:71
2228 msgid "Bad register in preincrement"
2231 #: xstormy16-asm.c:76
2232 msgid "Bad register in postincrement"
2235 #: xstormy16-asm.c:78
2236 msgid "Bad register name"
2239 #: xstormy16-asm.c:82
2240 msgid "Label conflicts with register name"
2243 #: xstormy16-asm.c:86
2244 msgid "Label conflicts with `Rx'"
2247 #: xstormy16-asm.c:88
2248 msgid "Bad immediate expression"
2251 #: xstormy16-asm.c:109
2252 msgid "No relocation for small immediate"
2255 #: xstormy16-asm.c:119
2256 msgid "Small operand was not an immediate number"
2259 #: xstormy16-asm.c:157
2260 msgid "Operand is not a symbol"
2263 #: xstormy16-asm.c:165
2264 msgid "Syntax error: No trailing ')'"
2267 #: xstormy16-desc.c:1318
2270 "internal error: xstormy16_cgen_rebuild_tables: conflicting insn-chunk-"
2271 "bitsize values: `%d' vs. `%d'"
2274 #: xstormy16-desc.c:1406
2276 msgid "internal error: xstormy16_cgen_cpu_open: unsupported argument `%d'"
2279 #: xstormy16-desc.c:1425
2281 msgid "internal error: xstormy16_cgen_cpu_open: no endianness specified"