2 Copyright (C) 2011-2022 Free Software Foundation, Inc.
4 Contributed by Andrew Waterman (andrew@sifive.com).
7 This file is part of the GNU opcodes library.
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING3. If not,
21 see <http://www.gnu.org/licenses/>. */
24 #include "disassemble.h"
25 #include "libiberty.h"
26 #include "opcode/riscv.h"
29 #include "elf/riscv.h"
30 #include "elfxx-riscv.h"
35 /* Current XLEN for the disassembler. */
36 static unsigned xlen
= 0;
38 /* Default ISA specification version (constant as of now). */
39 static enum riscv_spec_class default_isa_spec
= ISA_SPEC_CLASS_DRAFT
- 1;
41 /* Default privileged specification
42 (as specified by the ELF attributes or the `priv-spec' option). */
43 static enum riscv_spec_class default_priv_spec
= PRIV_SPEC_CLASS_NONE
;
45 static riscv_subset_list_t riscv_subsets
;
46 static riscv_parse_subset_t riscv_rps_dis
=
48 &riscv_subsets
, /* subset_list. */
49 opcodes_error_handler
,/* error_handler. */
51 &default_isa_spec
, /* isa_spec. */
52 false, /* check_unknown_prefixed_ext. */
55 struct riscv_private_data
59 bfd_vma hi_addr
[OP_MASK_RD
+ 1];
64 /* Used for mapping symbols. */
65 static int last_map_symbol
= -1;
66 static bfd_vma last_stop_offset
= 0;
68 /* Register names as used by the disassembler. */
69 static const char * const *riscv_gpr_names
;
70 static const char * const *riscv_fpr_names
;
72 /* If set, disassemble as most general instruction. */
73 static bool no_aliases
= false;
76 /* Set default RISC-V disassembler options. */
79 set_default_riscv_dis_options (void)
81 riscv_gpr_names
= riscv_gpr_names_abi
;
82 riscv_fpr_names
= riscv_fpr_names_abi
;
86 /* Parse RISC-V disassembler option (without arguments). */
89 parse_riscv_dis_option_without_args (const char *option
)
91 if (strcmp (option
, "no-aliases") == 0)
93 else if (strcmp (option
, "numeric") == 0)
95 riscv_gpr_names
= riscv_gpr_names_numeric
;
96 riscv_fpr_names
= riscv_fpr_names_numeric
;
103 /* Parse RISC-V disassembler option (possibly with arguments). */
106 parse_riscv_dis_option (const char *option
)
110 if (parse_riscv_dis_option_without_args (option
))
113 equal
= strchr (option
, '=');
116 /* The option without '=' should be defined above. */
117 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
121 || *(equal
+ 1) == '\0')
123 /* Invalid options with '=', no option name before '=',
124 and no value after '='. */
125 opcodes_error_handler (_("unrecognized disassembler option with '=': %s"),
132 if (strcmp (option
, "priv-spec") == 0)
134 enum riscv_spec_class priv_spec
= PRIV_SPEC_CLASS_NONE
;
135 const char *name
= NULL
;
137 RISCV_GET_PRIV_SPEC_CLASS (value
, priv_spec
);
138 if (priv_spec
== PRIV_SPEC_CLASS_NONE
)
139 opcodes_error_handler (_("unknown privileged spec set by %s=%s"),
141 else if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
142 default_priv_spec
= priv_spec
;
143 else if (default_priv_spec
!= priv_spec
)
145 RISCV_GET_PRIV_SPEC_NAME (name
, default_priv_spec
);
146 opcodes_error_handler (_("mis-matched privilege spec set by %s=%s, "
147 "the elf privilege attribute is %s"),
148 option
, value
, name
);
153 /* xgettext:c-format */
154 opcodes_error_handler (_("unrecognized disassembler option: %s"), option
);
158 /* Parse RISC-V disassembler options. */
161 parse_riscv_dis_options (const char *opts_in
)
163 char *opts
= xstrdup (opts_in
), *opt
= opts
, *opt_end
= opts
;
165 set_default_riscv_dis_options ();
167 for ( ; opt_end
!= NULL
; opt
= opt_end
+ 1)
169 if ((opt_end
= strchr (opt
, ',')) != NULL
)
171 parse_riscv_dis_option (opt
);
177 /* Print one argument from an array. */
180 arg_print (struct disassemble_info
*info
, unsigned long val
,
181 const char* const* array
, size_t size
)
183 const char *s
= val
>= size
|| array
[val
] == NULL
? "unknown" : array
[val
];
184 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "%s", s
);
187 /* If we need to print an address, set its value and state. */
190 maybe_print_address (struct riscv_private_data
*pd
, int base_reg
, int offset
,
193 if (pd
->hi_addr
[base_reg
] != (bfd_vma
)-1)
195 pd
->print_addr
= (base_reg
!= 0 ? pd
->hi_addr
[base_reg
] : 0) + offset
;
196 pd
->hi_addr
[base_reg
] = -1;
198 else if (base_reg
== X_GP
&& pd
->has_gp
)
199 pd
->print_addr
= pd
->gp
+ offset
;
200 else if (base_reg
== X_TP
|| base_reg
== 0)
201 pd
->print_addr
= offset
;
203 return; /* Don't print the address. */
204 pd
->to_print_addr
= true;
206 /* Sign-extend a 32-bit value to a 64-bit value. */
208 pd
->print_addr
= (bfd_vma
)(int32_t) pd
->print_addr
;
210 /* Fit into a 32-bit value on RV32. */
212 pd
->print_addr
= (bfd_vma
)(uint32_t)pd
->print_addr
;
215 /* Print insn arguments for 32/64-bit code. */
218 print_insn_args (const char *oparg
, insn_t l
, bfd_vma pc
, disassemble_info
*info
)
220 struct riscv_private_data
*pd
= info
->private_data
;
221 int rs1
= (l
>> OP_SH_RS1
) & OP_MASK_RS1
;
222 int rd
= (l
>> OP_SH_RD
) & OP_MASK_RD
;
223 fprintf_styled_ftype print
= info
->fprintf_styled_func
;
224 const char *opargStart
;
227 print (info
->stream
, dis_style_text
, "\t");
229 for (; *oparg
!= '\0'; oparg
++)
237 case 's': /* RS1 x8-x15. */
238 case 'w': /* RS1 x8-x15. */
239 print (info
->stream
, dis_style_register
, "%s",
240 riscv_gpr_names
[EXTRACT_OPERAND (CRS1S
, l
) + 8]);
242 case 't': /* RS2 x8-x15. */
243 case 'x': /* RS2 x8-x15. */
244 print (info
->stream
, dis_style_register
, "%s",
245 riscv_gpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
247 case 'U': /* RS1, constrained to equal RD. */
248 print (info
->stream
, dis_style_register
,
249 "%s", riscv_gpr_names
[rd
]);
251 case 'c': /* RS1, constrained to equal sp. */
252 print (info
->stream
, dis_style_register
, "%s",
253 riscv_gpr_names
[X_SP
]);
256 print (info
->stream
, dis_style_register
, "%s",
257 riscv_gpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
261 if (((l
& MASK_C_ADDI
) == MATCH_C_ADDI
) && rd
!= 0)
262 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 0);
263 if (info
->mach
== bfd_mach_riscv64
264 && ((l
& MASK_C_ADDIW
) == MATCH_C_ADDIW
) && rd
!= 0)
265 maybe_print_address (pd
, rd
, EXTRACT_CITYPE_IMM (l
), 1);
266 print (info
->stream
, dis_style_immediate
, "%d",
267 (int)EXTRACT_CITYPE_IMM (l
));
270 print (info
->stream
, dis_style_address_offset
, "%d",
271 (int)EXTRACT_CLTYPE_LW_IMM (l
));
274 print (info
->stream
, dis_style_address_offset
, "%d",
275 (int)EXTRACT_CLTYPE_LD_IMM (l
));
278 print (info
->stream
, dis_style_address_offset
, "%d",
279 (int)EXTRACT_CITYPE_LWSP_IMM (l
));
282 print (info
->stream
, dis_style_address_offset
, "%d",
283 (int)EXTRACT_CITYPE_LDSP_IMM (l
));
286 print (info
->stream
, dis_style_immediate
, "%d",
287 (int)EXTRACT_CIWTYPE_ADDI4SPN_IMM (l
));
290 print (info
->stream
, dis_style_immediate
, "%d",
291 (int)EXTRACT_CITYPE_ADDI16SP_IMM (l
));
294 print (info
->stream
, dis_style_address_offset
, "%d",
295 (int)EXTRACT_CSSTYPE_SWSP_IMM (l
));
298 print (info
->stream
, dis_style_address_offset
, "%d",
299 (int)EXTRACT_CSSTYPE_SDSP_IMM (l
));
302 info
->target
= EXTRACT_CBTYPE_IMM (l
) + pc
;
303 (*info
->print_address_func
) (info
->target
, info
);
306 info
->target
= EXTRACT_CJTYPE_IMM (l
) + pc
;
307 (*info
->print_address_func
) (info
->target
, info
);
310 print (info
->stream
, dis_style_immediate
, "0x%x",
311 (unsigned)(EXTRACT_CITYPE_IMM (l
) & (RISCV_BIGIMM_REACH
-1)));
314 print (info
->stream
, dis_style_immediate
, "0x%x",
315 (unsigned)EXTRACT_CITYPE_IMM (l
) & 0x3f);
318 print (info
->stream
, dis_style_immediate
, "0x%x",
319 (unsigned)EXTRACT_CITYPE_IMM (l
) & 0x1f);
321 case 'T': /* Floating-point RS2. */
322 print (info
->stream
, dis_style_register
, "%s",
323 riscv_fpr_names
[EXTRACT_OPERAND (CRS2
, l
)]);
325 case 'D': /* Floating-point RS2 x8-x15. */
326 print (info
->stream
, dis_style_register
, "%s",
327 riscv_fpr_names
[EXTRACT_OPERAND (CRS2S
, l
) + 8]);
337 print (info
->stream
, dis_style_register
, "%s",
338 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VD
, l
)]);
341 if (!EXTRACT_OPERAND (VWD
, l
))
342 print (info
->stream
, dis_style_register
, "%s",
345 print (info
->stream
, dis_style_register
, "%s",
346 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VD
, l
)]);
349 print (info
->stream
, dis_style_register
, "%s",
350 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VS1
, l
)]);
353 case 'u': /* VS1 == VS2 already verified at this point. */
354 case 'v': /* VD == VS1 == VS2 already verified at this point. */
355 print (info
->stream
, dis_style_register
, "%s",
356 riscv_vecr_names_numeric
[EXTRACT_OPERAND (VS2
, l
)]);
359 print (info
->stream
, dis_style_register
, "%s",
360 riscv_vecr_names_numeric
[0]);
365 int imm
= (*oparg
== 'b') ? EXTRACT_RVV_VB_IMM (l
)
366 : EXTRACT_RVV_VC_IMM (l
);
367 unsigned int imm_vlmul
= EXTRACT_OPERAND (VLMUL
, imm
);
368 unsigned int imm_vsew
= EXTRACT_OPERAND (VSEW
, imm
);
369 unsigned int imm_vta
= EXTRACT_OPERAND (VTA
, imm
);
370 unsigned int imm_vma
= EXTRACT_OPERAND (VMA
, imm
);
371 unsigned int imm_vtype_res
= (imm
>> 8);
373 if (imm_vsew
< ARRAY_SIZE (riscv_vsew
)
374 && imm_vlmul
< ARRAY_SIZE (riscv_vlmul
)
375 && imm_vta
< ARRAY_SIZE (riscv_vta
)
376 && imm_vma
< ARRAY_SIZE (riscv_vma
)
378 && riscv_vsew
[imm_vsew
] != NULL
379 && riscv_vlmul
[imm_vlmul
] != NULL
)
380 print (info
->stream
, dis_style_text
, "%s,%s,%s,%s",
381 riscv_vsew
[imm_vsew
],
382 riscv_vlmul
[imm_vlmul
], riscv_vta
[imm_vta
],
385 print (info
->stream
, dis_style_immediate
, "%d", imm
);
389 print (info
->stream
, dis_style_immediate
, "%d",
390 (int)EXTRACT_RVV_VI_IMM (l
));
393 print (info
->stream
, dis_style_immediate
, "%d",
394 (int)EXTRACT_RVV_VI_UIMM (l
));
397 print (info
->stream
, dis_style_immediate
, "%d",
398 (int)EXTRACT_RVV_OFFSET (l
));
401 if (!EXTRACT_OPERAND (VMASK
, l
))
403 print (info
->stream
, dis_style_text
, ",");
404 print (info
->stream
, dis_style_register
, "%s",
405 riscv_vecm_names_numeric
[0]);
416 print (info
->stream
, dis_style_text
, "%c", *oparg
);
420 /* Only print constant 0 if it is the last argument. */
422 print (info
->stream
, dis_style_immediate
, "0");
426 if ((l
& MASK_JALR
) == MATCH_JALR
)
427 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
428 print (info
->stream
, dis_style_register
, "%s", riscv_gpr_names
[rs1
]);
432 print (info
->stream
, dis_style_register
, "%s",
433 riscv_gpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
437 print (info
->stream
, dis_style_immediate
, "0x%x",
438 (unsigned)EXTRACT_UTYPE_IMM (l
) >> RISCV_IMM_BITS
);
442 arg_print (info
, EXTRACT_OPERAND (RM
, l
),
443 riscv_rm
, ARRAY_SIZE (riscv_rm
));
447 arg_print (info
, EXTRACT_OPERAND (PRED
, l
),
448 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
452 arg_print (info
, EXTRACT_OPERAND (SUCC
, l
),
453 riscv_pred_succ
, ARRAY_SIZE (riscv_pred_succ
));
457 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
460 if (((l
& MASK_ADDI
) == MATCH_ADDI
&& rs1
!= 0)
461 || (l
& MASK_JALR
) == MATCH_JALR
)
462 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 0);
463 if (info
->mach
== bfd_mach_riscv64
464 && ((l
& MASK_ADDIW
) == MATCH_ADDIW
) && rs1
!= 0)
465 maybe_print_address (pd
, rs1
, EXTRACT_ITYPE_IMM (l
), 1);
466 print (info
->stream
, dis_style_immediate
, "%d",
467 (int)EXTRACT_ITYPE_IMM (l
));
471 maybe_print_address (pd
, rs1
, EXTRACT_STYPE_IMM (l
), 0);
472 print (info
->stream
, dis_style_address_offset
, "%d",
473 (int)EXTRACT_STYPE_IMM (l
));
477 print (info
->stream
, dis_style_address_offset
, "%d",
478 (int)EXTRACT_STYPE_IMM (l
));
482 info
->target
= EXTRACT_JTYPE_IMM (l
) + pc
;
483 (*info
->print_address_func
) (info
->target
, info
);
487 info
->target
= EXTRACT_BTYPE_IMM (l
) + pc
;
488 (*info
->print_address_func
) (info
->target
, info
);
492 if ((l
& MASK_AUIPC
) == MATCH_AUIPC
)
493 pd
->hi_addr
[rd
] = pc
+ EXTRACT_UTYPE_IMM (l
);
494 else if ((l
& MASK_LUI
) == MATCH_LUI
)
495 pd
->hi_addr
[rd
] = EXTRACT_UTYPE_IMM (l
);
496 else if ((l
& MASK_C_LUI
) == MATCH_C_LUI
)
497 pd
->hi_addr
[rd
] = EXTRACT_CITYPE_LUI_IMM (l
);
498 print (info
->stream
, dis_style_register
, "%s", riscv_gpr_names
[rd
]);
502 print (info
->stream
, dis_style_immediate
, "0x%x",
503 (unsigned)EXTRACT_OPERAND (BS
, l
));
507 print (info
->stream
, dis_style_register
, "%s", riscv_gpr_names
[0]);
511 print (info
->stream
, dis_style_immediate
, "0x%x",
512 (unsigned)EXTRACT_OPERAND (SHAMT
, l
));
516 print (info
->stream
, dis_style_immediate
, "0x%x",
517 (unsigned)EXTRACT_OPERAND (SHAMTW
, l
));
522 print (info
->stream
, dis_style_register
, "%s", riscv_fpr_names
[rs1
]);
526 print (info
->stream
, dis_style_register
, "%s",
527 riscv_fpr_names
[EXTRACT_OPERAND (RS2
, l
)]);
531 print (info
->stream
, dis_style_register
, "%s", riscv_fpr_names
[rd
]);
535 print (info
->stream
, dis_style_register
, "%s",
536 riscv_fpr_names
[EXTRACT_OPERAND (RS3
, l
)]);
541 static const char *riscv_csr_hash
[4096]; /* Total 2^12 CSRs. */
542 static bool init_csr
= false;
543 unsigned int csr
= EXTRACT_OPERAND (CSR
, l
);
548 for (i
= 0; i
< 4096; i
++)
549 riscv_csr_hash
[i
] = NULL
;
551 /* Set to the newest privileged version. */
552 if (default_priv_spec
== PRIV_SPEC_CLASS_NONE
)
553 default_priv_spec
= PRIV_SPEC_CLASS_DRAFT
- 1;
555 #define DECLARE_CSR(name, num, class, define_version, abort_version) \
556 if (riscv_csr_hash[num] == NULL \
557 && ((define_version == PRIV_SPEC_CLASS_NONE \
558 && abort_version == PRIV_SPEC_CLASS_NONE) \
559 || (default_priv_spec >= define_version \
560 && default_priv_spec < abort_version))) \
561 riscv_csr_hash[num] = #name;
562 #define DECLARE_CSR_ALIAS(name, num, class, define_version, abort_version) \
563 DECLARE_CSR (name, num, class, define_version, abort_version)
564 #include "opcode/riscv-opc.h"
568 if (riscv_csr_hash
[csr
] != NULL
)
569 print (info
->stream
, dis_style_register
, "%s",
570 riscv_csr_hash
[csr
]);
572 print (info
->stream
, dis_style_immediate
, "0x%x", csr
);
577 print (info
->stream
, dis_style_immediate
, "0x%x",
578 (unsigned) EXTRACT_OPERAND (RNUM
, l
));
582 print (info
->stream
, dis_style_immediate
, "%d", rs1
);
585 case 'X': /* Integer immediate. */
593 case 'l': /* Literal. */
595 while (*oparg
&& *oparg
!= ',')
597 print (info
->stream
, dis_style_immediate
, "%c", *oparg
);
602 case 's': /* 'XsN@S' ... N-bit signed immediate at bit S. */
605 case 'u': /* 'XuN@S' ... N-bit unsigned immediate at bit S. */
609 n
= strtol (oparg
+ 1, (char **)&oparg
, 10);
611 goto undefined_modifier
;
612 s
= strtol (oparg
+ 1, (char **)&oparg
, 10);
616 print (info
->stream
, dis_style_immediate
, "%lu",
617 (unsigned long)EXTRACT_U_IMM (n
, s
, l
));
619 print (info
->stream
, dis_style_immediate
, "%li",
620 (signed long)EXTRACT_S_IMM (n
, s
, l
));
623 goto undefined_modifier
;
629 /* xgettext:c-format */
630 print (info
->stream
, dis_style_text
,
631 _("# internal error, undefined modifier (%c)"),
638 /* Print the RISC-V instruction at address MEMADDR in debugged memory,
639 on using INFO. Returns length of the instruction, in bytes.
640 BIGENDIAN must be 1 if this is big-endian code, 0 if
641 this is little-endian code. */
644 riscv_disassemble_insn (bfd_vma memaddr
,
646 const bfd_byte
*packet
,
647 disassemble_info
*info
)
649 const struct riscv_opcode
*op
;
650 static bool init
= false;
651 static const struct riscv_opcode
*riscv_hash
[OP_MASK_OP
+ 1];
652 struct riscv_private_data
*pd
;
655 #define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
657 /* Build a hash table to shorten the search time. */
660 for (op
= riscv_opcodes
; op
->name
; op
++)
661 if (!riscv_hash
[OP_HASH_IDX (op
->match
)])
662 riscv_hash
[OP_HASH_IDX (op
->match
)] = op
;
667 if (info
->private_data
== NULL
)
671 pd
= info
->private_data
= xcalloc (1, sizeof (struct riscv_private_data
));
674 for (i
= 0; i
< (int)ARRAY_SIZE (pd
->hi_addr
); i
++)
676 pd
->to_print_addr
= false;
679 for (i
= 0; i
< info
->symtab_size
; i
++)
680 if (strcmp (bfd_asymbol_name (info
->symtab
[i
]), RISCV_GP_SYMBOL
) == 0)
682 pd
->gp
= bfd_asymbol_value (info
->symtab
[i
]);
687 pd
= info
->private_data
;
689 insnlen
= riscv_insn_length (word
);
691 /* RISC-V instructions are always little-endian. */
692 info
->endian_code
= BFD_ENDIAN_LITTLE
;
694 info
->bytes_per_chunk
= insnlen
% 4 == 0 ? 4 : 2;
695 info
->bytes_per_line
= 8;
696 /* We don't support constant pools, so this must be code. */
697 info
->display_endian
= info
->endian_code
;
698 info
->insn_info_valid
= 1;
699 info
->branch_delay_insns
= 0;
701 info
->insn_type
= dis_nonbranch
;
705 op
= riscv_hash
[OP_HASH_IDX (word
)];
708 /* If XLEN is not known, get its value from the ELF class. */
709 if (info
->mach
== bfd_mach_riscv64
)
711 else if (info
->mach
== bfd_mach_riscv32
)
713 else if (info
->section
!= NULL
)
715 Elf_Internal_Ehdr
*ehdr
= elf_elfheader (info
->section
->owner
);
716 xlen
= ehdr
->e_ident
[EI_CLASS
] == ELFCLASS64
? 64 : 32;
719 /* If arch has the Zfinx extension, replace FPR with GPR. */
720 if (riscv_subset_supports (&riscv_rps_dis
, "zfinx"))
721 riscv_fpr_names
= riscv_gpr_names
;
723 riscv_fpr_names
= riscv_gpr_names
== riscv_gpr_names_abi
?
724 riscv_fpr_names_abi
: riscv_fpr_names_numeric
;
726 for (; op
->name
; op
++)
728 /* Does the opcode match? */
729 if (! (op
->match_func
) (op
, word
))
731 /* Is this a pseudo-instruction and may we print it as such? */
732 if (no_aliases
&& (op
->pinfo
& INSN_ALIAS
))
734 /* Is this instruction restricted to a certain value of XLEN? */
735 if ((op
->xlen_requirement
!= 0) && (op
->xlen_requirement
!= xlen
))
737 /* Is this instruction supported by the current architecture? */
738 if (!riscv_multi_subset_supports (&riscv_rps_dis
, op
->insn_class
))
742 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_mnemonic
,
744 print_insn_args (op
->args
, word
, memaddr
, info
);
746 /* Try to disassemble multi-instruction addressing sequences. */
747 if (pd
->to_print_addr
)
749 info
->target
= pd
->print_addr
;
750 (*info
->fprintf_styled_func
)
751 (info
->stream
, dis_style_comment_start
, " # ");
752 (*info
->print_address_func
) (info
->target
, info
);
753 pd
->to_print_addr
= false;
756 /* Finish filling out insn_info fields. */
757 switch (op
->pinfo
& INSN_TYPE
)
760 info
->insn_type
= dis_branch
;
762 case INSN_CONDBRANCH
:
763 info
->insn_type
= dis_condbranch
;
766 info
->insn_type
= dis_jsr
;
769 info
->insn_type
= dis_dref
;
775 if (op
->pinfo
& INSN_DATA_SIZE
)
777 int size
= ((op
->pinfo
& INSN_DATA_SIZE
)
778 >> INSN_DATA_SIZE_SHIFT
);
779 info
->data_size
= 1 << (size
- 1);
786 /* We did not find a match, so just print the instruction bits. */
787 info
->insn_type
= dis_noninsn
;
793 (*info
->fprintf_styled_func
)
794 (info
->stream
, dis_style_assembler_directive
, ".%dbyte", insnlen
);
795 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
796 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
797 "0x%llx", (unsigned long long) word
);
802 (*info
->fprintf_styled_func
)
803 (info
->stream
, dis_style_assembler_directive
, ".byte");
804 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
805 for (i
= 0; i
< insnlen
; ++i
)
808 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
810 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
812 (unsigned int) (*packet
++));
820 /* Return true if we find the suitable mapping symbol,
821 and also update the STATE. Otherwise, return false. */
824 riscv_get_map_state (int n
,
825 enum riscv_seg_mstate
*state
,
826 struct disassemble_info
*info
)
830 /* If the symbol is in a different section, ignore it. */
831 if (info
->section
!= NULL
832 && info
->section
!= info
->symtab
[n
]->section
)
835 name
= bfd_asymbol_name(info
->symtab
[n
]);
836 if (strcmp (name
, "$x") == 0)
838 else if (strcmp (name
, "$d") == 0)
840 else if (strncmp (name
, "$xrv", 4) == 0)
843 riscv_release_subset_list (&riscv_subsets
);
844 riscv_parse_subset (&riscv_rps_dis
, name
+ 2);
852 /* Check the sorted symbol table (sorted by the symbol value), find the
853 suitable mapping symbols. */
855 static enum riscv_seg_mstate
856 riscv_search_mapping_symbol (bfd_vma memaddr
,
857 struct disassemble_info
*info
)
859 enum riscv_seg_mstate mstate
;
860 bool from_last_map_symbol
;
865 /* Decide whether to print the data or instruction by default, in case
866 we can not find the corresponding mapping symbols. */
869 && info
->section
->flags
& SEC_CODE
)
873 if (info
->symtab_size
== 0
874 || bfd_asymbol_flavour (*info
->symtab
) != bfd_target_elf_flavour
)
877 /* Reset the last_map_symbol if we start to dump a new section. */
879 last_map_symbol
= -1;
881 /* If the last stop offset is different from the current one, then
882 don't use the last_map_symbol to search. We usually reset the
883 info->stop_offset when handling a new section. */
884 from_last_map_symbol
= (last_map_symbol
>= 0
885 && info
->stop_offset
== last_stop_offset
);
887 /* Start scanning at the start of the function, or wherever
888 we finished last time. */
889 n
= info
->symtab_pos
+ 1;
890 if (from_last_map_symbol
&& n
>= last_map_symbol
)
893 /* Find the suitable mapping symbol to dump. */
894 for (; n
< info
->symtab_size
; n
++)
896 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
897 /* We have searched all possible symbols in the range. */
900 if (riscv_get_map_state (n
, &mstate
, info
))
904 /* Do not stop searching, in case there are some mapping
905 symbols have the same value, but have different names.
910 /* We can not find the suitable mapping symbol above. Therefore, we
911 look forwards and try to find it again, but don't go pass the start
912 of the section. Otherwise a data section without mapping symbols
913 can pick up a text mapping symbol of a preceeding section. */
916 n
= info
->symtab_pos
;
917 if (from_last_map_symbol
&& n
>= last_map_symbol
)
922 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
923 /* We have searched all possible symbols in the range. */
924 if (addr
< (info
->section
? info
->section
->vma
: 0))
926 /* Stop searching once we find the closed mapping symbol. */
927 if (riscv_get_map_state (n
, &mstate
, info
))
936 /* Save the information for next use. */
937 last_map_symbol
= symbol
;
938 last_stop_offset
= info
->stop_offset
;
943 /* Decide which data size we should print. */
946 riscv_data_length (bfd_vma memaddr
,
947 disassemble_info
*info
)
953 if (info
->symtab_size
!= 0
954 && bfd_asymbol_flavour (*info
->symtab
) == bfd_target_elf_flavour
955 && last_map_symbol
>= 0)
958 enum riscv_seg_mstate m
= MAP_NONE
;
959 for (n
= last_map_symbol
+ 1; n
< info
->symtab_size
; n
++)
961 bfd_vma addr
= bfd_asymbol_value (info
->symtab
[n
]);
963 && riscv_get_map_state (n
, &m
, info
))
965 if (addr
- memaddr
< length
)
966 length
= addr
- memaddr
;
974 /* Do not set the length which exceeds the section size. */
975 bfd_vma offset
= info
->section
->vma
+ info
->section
->size
;
977 length
= (offset
< length
) ? offset
: length
;
979 length
= length
== 3 ? 2 : length
;
983 /* Dump the data contents. */
986 riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED
,
988 const bfd_byte
*packet ATTRIBUTE_UNUSED
,
989 disassemble_info
*info
)
991 info
->display_endian
= info
->endian
;
993 switch (info
->bytes_per_chunk
)
996 info
->bytes_per_line
= 6;
997 (*info
->fprintf_styled_func
)
998 (info
->stream
, dis_style_assembler_directive
, ".byte");
999 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
1000 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1001 "0x%02x", (unsigned)data
);
1004 info
->bytes_per_line
= 8;
1005 (*info
->fprintf_styled_func
)
1006 (info
->stream
, dis_style_assembler_directive
, ".short");
1007 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
1008 (*info
->fprintf_styled_func
)
1009 (info
->stream
, dis_style_immediate
, "0x%04x", (unsigned) data
);
1012 info
->bytes_per_line
= 8;
1013 (*info
->fprintf_styled_func
)
1014 (info
->stream
, dis_style_assembler_directive
, ".word");
1015 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
1016 (*info
->fprintf_styled_func
)
1017 (info
->stream
, dis_style_immediate
, "0x%08lx",
1018 (unsigned long) data
);
1021 info
->bytes_per_line
= 8;
1022 (*info
->fprintf_styled_func
)
1023 (info
->stream
, dis_style_assembler_directive
, ".dword");
1024 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "\t");
1025 (*info
->fprintf_styled_func
)
1026 (info
->stream
, dis_style_immediate
, "0x%016llx",
1027 (unsigned long long) data
);
1032 return info
->bytes_per_chunk
;
1036 print_insn_riscv (bfd_vma memaddr
, struct disassemble_info
*info
)
1038 bfd_byte packet
[RISCV_MAX_INSN_LEN
];
1042 enum riscv_seg_mstate mstate
;
1043 int (*riscv_disassembler
) (bfd_vma
, insn_t
, const bfd_byte
*,
1044 struct disassemble_info
*);
1046 if (info
->disassembler_options
!= NULL
)
1048 parse_riscv_dis_options (info
->disassembler_options
);
1049 /* Avoid repeatedly parsing the options. */
1050 info
->disassembler_options
= NULL
;
1052 else if (riscv_gpr_names
== NULL
)
1053 set_default_riscv_dis_options ();
1055 mstate
= riscv_search_mapping_symbol (memaddr
, info
);
1057 /* Set the size to dump. */
1058 if (mstate
== MAP_DATA
1059 && (info
->flags
& DISASSEMBLE_DATA
) == 0)
1061 dump_size
= riscv_data_length (memaddr
, info
);
1062 info
->bytes_per_chunk
= dump_size
;
1063 riscv_disassembler
= riscv_disassemble_data
;
1067 /* Get the first 2-bytes to check the lenghth of instruction. */
1068 status
= (*info
->read_memory_func
) (memaddr
, packet
, 2, info
);
1071 (*info
->memory_error_func
) (status
, memaddr
, info
);
1074 insn
= (insn_t
) bfd_getl16 (packet
);
1075 dump_size
= riscv_insn_length (insn
);
1076 riscv_disassembler
= riscv_disassemble_insn
;
1079 /* Fetch the instruction to dump. */
1080 status
= (*info
->read_memory_func
) (memaddr
, packet
, dump_size
, info
);
1083 (*info
->memory_error_func
) (status
, memaddr
, info
);
1086 insn
= (insn_t
) bfd_get_bits (packet
, dump_size
* 8, false);
1088 return (*riscv_disassembler
) (memaddr
, insn
, packet
, info
);
1092 riscv_get_disassembler (bfd
*abfd
)
1094 const char *default_arch
= "rv64gc";
1096 if (abfd
&& bfd_get_flavour (abfd
) == bfd_target_elf_flavour
)
1098 const char *sec_name
= get_elf_backend_data (abfd
)->obj_attrs_section
;
1099 if (bfd_get_section_by_name (abfd
, sec_name
) != NULL
)
1101 obj_attribute
*attr
= elf_known_obj_attributes_proc (abfd
);
1102 unsigned int Tag_a
= Tag_RISCV_priv_spec
;
1103 unsigned int Tag_b
= Tag_RISCV_priv_spec_minor
;
1104 unsigned int Tag_c
= Tag_RISCV_priv_spec_revision
;
1105 riscv_get_priv_spec_class_from_numbers (attr
[Tag_a
].i
,
1108 &default_priv_spec
);
1109 default_arch
= attr
[Tag_RISCV_arch
].s
;
1113 riscv_release_subset_list (&riscv_subsets
);
1114 riscv_parse_subset (&riscv_rps_dis
, default_arch
);
1115 return print_insn_riscv
;
1118 /* Prevent use of the fake labels that are generated as part of the DWARF
1119 and for relaxable relocations in the assembler. */
1122 riscv_symbol_is_valid (asymbol
* sym
,
1123 struct disassemble_info
* info ATTRIBUTE_UNUSED
)
1130 name
= bfd_asymbol_name (sym
);
1132 return (strcmp (name
, RISCV_FAKE_LABEL_NAME
) != 0
1133 && !riscv_elf_is_mapping_symbols (name
));
1137 /* Indices into option argument vector for options accepting an argument.
1138 Use RISCV_OPTION_ARG_NONE for options accepting no argument. */
1142 RISCV_OPTION_ARG_NONE
= -1,
1143 RISCV_OPTION_ARG_PRIV_SPEC
,
1145 RISCV_OPTION_ARG_COUNT
1146 } riscv_option_arg_t
;
1148 /* Valid RISCV disassembler options. */
1153 const char *description
;
1154 riscv_option_arg_t arg
;
1158 N_("Print numeric register names, rather than ABI names."),
1159 RISCV_OPTION_ARG_NONE
},
1161 N_("Disassemble only into canonical instructions."),
1162 RISCV_OPTION_ARG_NONE
},
1164 N_("Print the CSR according to the chosen privilege spec."),
1165 RISCV_OPTION_ARG_PRIV_SPEC
}
1168 /* Build the structure representing valid RISCV disassembler options.
1169 This is done dynamically for maintenance ease purpose; a static
1170 initializer would be unreadable. */
1172 const disasm_options_and_args_t
*
1173 disassembler_options_riscv (void)
1175 static disasm_options_and_args_t
*opts_and_args
;
1177 if (opts_and_args
== NULL
)
1179 size_t num_options
= ARRAY_SIZE (riscv_options
);
1180 size_t num_args
= RISCV_OPTION_ARG_COUNT
;
1181 disasm_option_arg_t
*args
;
1182 disasm_options_t
*opts
;
1183 size_t i
, priv_spec_count
;
1185 args
= XNEWVEC (disasm_option_arg_t
, num_args
+ 1);
1187 args
[RISCV_OPTION_ARG_PRIV_SPEC
].name
= "SPEC";
1188 priv_spec_count
= PRIV_SPEC_CLASS_DRAFT
- PRIV_SPEC_CLASS_NONE
- 1;
1189 args
[RISCV_OPTION_ARG_PRIV_SPEC
].values
1190 = XNEWVEC (const char *, priv_spec_count
+ 1);
1191 for (i
= 0; i
< priv_spec_count
; i
++)
1192 args
[RISCV_OPTION_ARG_PRIV_SPEC
].values
[i
]
1193 = riscv_priv_specs
[i
].name
;
1194 /* The array we return must be NULL terminated. */
1195 args
[RISCV_OPTION_ARG_PRIV_SPEC
].values
[i
] = NULL
;
1197 /* The array we return must be NULL terminated. */
1198 args
[num_args
].name
= NULL
;
1199 args
[num_args
].values
= NULL
;
1201 opts_and_args
= XNEW (disasm_options_and_args_t
);
1202 opts_and_args
->args
= args
;
1204 opts
= &opts_and_args
->options
;
1205 opts
->name
= XNEWVEC (const char *, num_options
+ 1);
1206 opts
->description
= XNEWVEC (const char *, num_options
+ 1);
1207 opts
->arg
= XNEWVEC (const disasm_option_arg_t
*, num_options
+ 1);
1208 for (i
= 0; i
< num_options
; i
++)
1210 opts
->name
[i
] = riscv_options
[i
].name
;
1211 opts
->description
[i
] = _(riscv_options
[i
].description
);
1212 if (riscv_options
[i
].arg
!= RISCV_OPTION_ARG_NONE
)
1213 opts
->arg
[i
] = &args
[riscv_options
[i
].arg
];
1215 opts
->arg
[i
] = NULL
;
1217 /* The array we return must be NULL terminated. */
1218 opts
->name
[i
] = NULL
;
1219 opts
->description
[i
] = NULL
;
1220 opts
->arg
[i
] = NULL
;
1223 return opts_and_args
;
1227 print_riscv_disassembler_options (FILE *stream
)
1229 const disasm_options_and_args_t
*opts_and_args
;
1230 const disasm_option_arg_t
*args
;
1231 const disasm_options_t
*opts
;
1236 opts_and_args
= disassembler_options_riscv ();
1237 opts
= &opts_and_args
->options
;
1238 args
= opts_and_args
->args
;
1240 fprintf (stream
, _("\n\
1241 The following RISC-V specific disassembler options are supported for use\n\
1242 with the -M switch (multiple options should be separated by commas):\n"));
1243 fprintf (stream
, "\n");
1245 /* Compute the length of the longest option name. */
1246 for (i
= 0; opts
->name
[i
] != NULL
; i
++)
1248 size_t len
= strlen (opts
->name
[i
]);
1250 if (opts
->arg
[i
] != NULL
)
1251 len
+= strlen (opts
->arg
[i
]->name
);
1256 for (i
= 0, max_len
++; opts
->name
[i
] != NULL
; i
++)
1258 fprintf (stream
, " %s", opts
->name
[i
]);
1259 if (opts
->arg
[i
] != NULL
)
1260 fprintf (stream
, "%s", opts
->arg
[i
]->name
);
1261 if (opts
->description
[i
] != NULL
)
1263 size_t len
= strlen (opts
->name
[i
]);
1265 if (opts
->arg
!= NULL
&& opts
->arg
[i
] != NULL
)
1266 len
+= strlen (opts
->arg
[i
]->name
);
1267 fprintf (stream
, "%*c %s", (int) (max_len
- len
), ' ',
1268 opts
->description
[i
]);
1270 fprintf (stream
, "\n");
1273 for (i
= 0; args
[i
].name
!= NULL
; i
++)
1275 if (args
[i
].values
== NULL
)
1277 fprintf (stream
, _("\n\
1278 For the options above, the following values are supported for \"%s\":\n "),
1280 for (j
= 0; args
[i
].values
[j
] != NULL
; j
++)
1281 fprintf (stream
, " %s", args
[i
].values
[j
]);
1282 fprintf (stream
, _("\n"));
1285 fprintf (stream
, _("\n"));