sim/bfin/sim-main.h

   1 /* Simulator for Analog Devices Blackfin processors.
   2
   3    Copyright (C) 2005-2013 Free Software Foundation, Inc.
   4    Contributed by Analog Devices, Inc.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef _BFIN_MAIN_SIM_H_
  22 #define _BFIN_MAIN_SIM_H_
  23
  24 #include "sim-basics.h"
  25 #include "sim-signal.h"
  26
  27 typedef unsigned32 sim_cia;
  28
  29 #define CIA_GET(cpu)     CPU_PC_GET (cpu)
  30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
  31
  32 typedef struct _sim_cpu SIM_CPU;
  33
  34 #include "bfin-sim.h"
  35
  36 #include "machs.h"
  37
  38 #include "sim-base.h"
  39
  40 struct _sim_cpu {
  41   /* ... simulator specific members ... */
  42   struct bfin_cpu_state state;
  43   sim_cpu_base base;
  44 };
  45 #define BFIN_CPU_STATE ((cpu)->state)
  46
  47 struct sim_state {
  48   sim_cpu *cpu[MAX_NR_PROCESSORS];
  49 #if (WITH_SMP)
  50 #define STATE_CPU(sd,n) ((sd)->cpu[n])
  51 #else
  52 #define STATE_CPU(sd,n) ((sd)->cpu[0])
  53 #endif
  54   /* ... simulator specific members ... */
  55   struct bfin_board_data board;
  56 #define STATE_BOARD_DATA(sd) (&(sd)->board)
  57   sim_state_base base;
  58 };
  59
  60 #include "sim-config.h"
  61 #include "sim-types.h"
  62 #include "sim-engine.h"
  63 #include "sim-options.h"
  64 #include "run-sim.h"
  65 #include "dv-bfin_trace.h"
  66
  67 #undef MAX
  68 #undef MIN
  69 #undef CLAMP
  70 #undef ALIGN
  71 #define MAX(a, b) ((a) > (b) ? (a) : (b))
  72 #define MIN(a, b) ((a) < (b) ? (a) : (b))
  73 #define CLAMP(a, b, c) MIN (MAX (a, b), c)
  74 #define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
  75
  76 #define MAYBE_TRACE(type, cpu, fmt, ...) \
  77   do { \
  78     if (TRACE_##type##_P (cpu)) \
  79       trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
  80                      fmt, ## __VA_ARGS__); \
  81   } while (0)
  82 #define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
  83 #define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
  84 #define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
  85 #define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
  86 #define TRACE_CORE(cpu, addr, size, map, val) \
  87   do { \
  88     MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
  89                  map == exec_map ? 'I' : 'D', \
  90                  map == write_map ? "STORE" : "FETCH", \
  91                  size, addr, size * 2, val); \
  92     PROFILE_COUNT_CORE (cpu, addr, size, map); \
  93   } while (0)
  94 #define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
  95 #define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
  96   do { \
  97     MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
  98     if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
  99       bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
 100   } while (0)
 101
 102 extern void trace_register PARAMS ((SIM_DESC sd,
 103                                     sim_cpu *cpu,
 104                                     const char *fmt,
 105                                     ...))
 106      __attribute__((format (printf, 3, 4)));
 107 #define TRACE_REGISTER(cpu, fmt, ...) \
 108   do { \
 109     if (TRACE_CORE_P (cpu)) \
 110       trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
 111   } while (0)
 112 #define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)
 113
 114 /* Default memory size.  */
 115 #define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
 116
 117 #endif