sim/common/cgen-trace.c

   1 /* Tracing support for CGEN-based simulators.
   2    Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #include <errno.h>
  22 #include "dis-asm.h"
  23 #include "bfd.h"
  24 #include "sim-main.h"
  25
  26 #undef min
  27 #define min(a,b) ((a) < (b) ? (a) : (b))
  28
  29 #ifndef SIZE_INSTRUCTION
  30 #define SIZE_INSTRUCTION 16
  31 #endif
  32
  33 #ifndef SIZE_LOCATION
  34 #define SIZE_LOCATION 20
  35 #endif
  36
  37 #ifndef SIZE_PC
  38 #define SIZE_PC 6
  39 #endif
  40
  41 #ifndef SIZE_LINE_NUMBER
  42 #define SIZE_LINE_NUMBER 4
  43 #endif
  44
  45 #ifndef SIZE_CYCLE_COUNT
  46 #define SIZE_CYCLE_COUNT 2
  47 #endif
  48
  49 #ifndef SIZE_TOTAL_CYCLE_COUNT
  50 #define SIZE_TOTAL_CYCLE_COUNT 9
  51 #endif
  52
  53 #ifndef SIZE_TRACE_BUF
  54 #define SIZE_TRACE_BUF 256
  55 #endif
  56
  57 static void
  58 disassemble_insn (SIM_CPU *, const CGEN_INSN *,
  59                   const struct argbuf *, IADDR, char *);
  60
  61 /* Text is queued in TRACE_BUF because we want to output the insn's cycle
  62    count first but that isn't known until after the insn has executed.
  63    This also handles the queueing of trace results, TRACE_RESULT may be
  64    called multiple times for one insn.  */
  65 static char trace_buf[SIZE_TRACE_BUF];
  66 /* If NULL, output to stdout directly.  */
  67 static char *bufptr;
  68
  69 /* Non-zero if this is the first insn in a set of parallel insns.  */
  70 static int first_insn_p;
  71
  72 /* For communication between trace_insn and trace_result.  */
  73 static int printed_result_p;
  74
  75 /* Insn and its extracted fields.
  76    Set by trace_insn, used by trace_insn_fini.
  77    ??? Move to SIM_CPU to support heterogeneous multi-cpu case.  */
  78 static const struct cgen_insn *current_insn;
  79 static const struct argbuf *current_abuf;
  80
  81 void
  82 trace_insn_init (SIM_CPU *cpu, int first_p)
  83 {
  84   bufptr = trace_buf;
  85   *bufptr = 0;
  86   first_insn_p = first_p;
  87
  88   /* Set to NULL so trace_insn_fini can know if trace_insn was called.  */
  89   current_insn = NULL;
  90   current_abuf = NULL;
  91 }
  92
  93 void
  94 trace_insn_fini (SIM_CPU *cpu, const struct argbuf *abuf, int last_p)
  95 {
  96   SIM_DESC sd = CPU_STATE (cpu);
  97
  98   /* Was insn traced?  It might not be if trace ranges are in effect.  */
  99   if (current_insn == NULL)
 100     return;
 101
 102   /* The first thing printed is current and total cycle counts.  */
 103
 104   if (PROFILE_MODEL_P (cpu)
 105       && ARGBUF_PROFILE_P (current_abuf))
 106     {
 107       unsigned long total = PROFILE_MODEL_TOTAL_CYCLES (CPU_PROFILE_DATA (cpu));
 108       unsigned long this_insn = PROFILE_MODEL_CUR_INSN_CYCLES (CPU_PROFILE_DATA (cpu));
 109
 110       if (last_p)
 111         {
 112           trace_printf (sd, cpu, "%-*ld %-*ld ",
 113                         SIZE_CYCLE_COUNT, this_insn,
 114                         SIZE_TOTAL_CYCLE_COUNT, total);
 115         }
 116       else
 117         {
 118           trace_printf (sd, cpu, "%-*ld %-*s ",
 119                         SIZE_CYCLE_COUNT, this_insn,
 120                         SIZE_TOTAL_CYCLE_COUNT, "---");
 121         }
 122     }
 123
 124   /* Print the disassembled insn.  */
 125
 126   trace_printf (sd, cpu, "%s", TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
 127
 128 #if 0
 129   /* Print insn results.  */
 130   {
 131     const CGEN_OPINST *opinst = CGEN_INSN_OPERANDS (current_insn);
 132
 133     if (opinst)
 134       {
 135         int i;
 136         int indices[MAX_OPERAND_INSTANCES];
 137
 138         /* Fetch the operands used by the insn.  */
 139         /* FIXME: Add fn ptr to CGEN_CPU_DESC.  */
 140         CGEN_SYM (get_insn_operands) (CPU_CPU_DESC (cpu), current_insn,
 141                                       0, CGEN_FIELDS_BITSIZE (&insn_fields),
 142                                       indices);
 143
 144         for (i = 0;
 145              CGEN_OPINST_TYPE (opinst) != CGEN_OPINST_END;
 146              ++i, ++opinst)
 147           {
 148             if (CGEN_OPINST_TYPE (opinst) == CGEN_OPINST_OUTPUT)
 149               trace_result (cpu, current_insn, opinst, indices[i]);
 150           }
 151       }
 152   }
 153 #endif
 154
 155   /* Print anything else requested.  */
 156
 157   if (*trace_buf)
 158     trace_printf (sd, cpu, " %s\n", trace_buf);
 159   else
 160     trace_printf (sd, cpu, "\n");
 161 }
 162
 163 void
 164 trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
 165             const struct argbuf *abuf, IADDR pc)
 166 {
 167   char disasm_buf[50];
 168
 169   printed_result_p = 0;
 170   current_insn = opcode;
 171   current_abuf = abuf;
 172
 173   if (CGEN_INSN_VIRTUAL_P (opcode))
 174     {
 175       trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, 0,
 176                     NULL, 0, CGEN_INSN_NAME (opcode));
 177       return;
 178     }
 179
 180   CPU_DISASSEMBLER (cpu) (cpu, opcode, abuf, pc, disasm_buf);
 181   trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu),
 182                 NULL, 0,
 183                 "%s%-*s",
 184                 first_insn_p ? " " : "|",
 185                 SIZE_INSTRUCTION, disasm_buf);
 186 }
 187
 188 void
 189 trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
 190 {
 191   va_list args;
 192   int printed_one_p = 0;
 193   char *fmt;
 194
 195   va_start (args, name);
 196
 197   trace_printf (CPU_STATE (cpu), cpu, "Extract: 0x%.*lx: %s ",
 198                 SIZE_PC, pc, name);
 199
 200   do {
 201     int type,ival;
 202
 203     fmt = va_arg (args, char *);
 204
 205     if (fmt)
 206       {
 207         if (printed_one_p)
 208           trace_printf (CPU_STATE (cpu), cpu, ", ");
 209         printed_one_p = 1;
 210         type = va_arg (args, int);
 211         switch (type)
 212           {
 213           case 'x' :
 214             ival = va_arg (args, int);
 215             trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
 216             break;
 217           default :
 218             abort ();
 219           }
 220       }
 221   } while (fmt);
 222
 223   va_end (args);
 224   trace_printf (CPU_STATE (cpu), cpu, "\n");
 225 }
 226
 227 void
 228 trace_result (SIM_CPU *cpu, char *name, int type, ...)
 229 {
 230   va_list args;
 231
 232   va_start (args, type);
 233   if (printed_result_p)
 234     cgen_trace_printf (cpu, ", ");
 235
 236   switch (type)
 237     {
 238     case 'x' :
 239     default :
 240       cgen_trace_printf (cpu, "%s <- 0x%x", name, va_arg (args, int));
 241       break;
 242     case 'D' :
 243       {
 244         DI di;
 245         /* this is separated from previous line for sunos cc */
 246         di = va_arg (args, DI);
 247         cgen_trace_printf (cpu, "%s <- 0x%x%08x", name,
 248                            GETHIDI(di), GETLODI (di));
 249         break;
 250       }
 251     }
 252
 253   printed_result_p = 1;
 254   va_end (args);
 255 }
 256
 257 /* Print trace output to BUFPTR if active, otherwise print normally.
 258    This is only for tracing semantic code.  */
 259
 260 void
 261 cgen_trace_printf (SIM_CPU *cpu, char *fmt, ...)
 262 {
 263   va_list args;
 264
 265   va_start (args, fmt);
 266
 267   if (bufptr == NULL)
 268     {
 269       if (TRACE_FILE (CPU_TRACE_DATA (cpu)) == NULL)
 270         (* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
 271           (STATE_CALLBACK (CPU_STATE (cpu)), fmt, args);
 272       else
 273         vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, args);
 274     }
 275   else
 276     {
 277       vsprintf (bufptr, fmt, args);
 278       bufptr += strlen (bufptr);
 279       /* ??? Need version of SIM_ASSERT that is always enabled.  */
 280       if (bufptr - trace_buf > SIZE_TRACE_BUF)
 281         abort ();
 282     }
 283
 284   va_end (args);
 285 }
 286 \f
 287 /* Disassembly support.  */
 288
 289 /* sprintf to a "stream" */
 290
 291 int
 292 sim_disasm_sprintf VPARAMS ((SFILE *f, const char *format, ...))
 293 {
 294 #ifndef __STDC__
 295   SFILE *f;
 296   const char *format;
 297 #endif
 298   int n;
 299   va_list args;
 300
 301   VA_START (args, format);
 302 #ifndef __STDC__
 303   f = va_arg (args, SFILE *);
 304   format = va_arg (args, char *);
 305 #endif
 306   vsprintf (f->current, format, args);
 307   f->current += n = strlen (f->current);
 308   va_end (args);
 309   return n;
 310 }
 311
 312 /* Memory read support for an opcodes disassembler.  */
 313
 314 int
 315 sim_disasm_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
 316                         struct disassemble_info *info)
 317 {
 318   SIM_CPU *cpu = (SIM_CPU *) info->application_data;
 319   SIM_DESC sd = CPU_STATE (cpu);
 320   int length_read;
 321
 322   length_read = sim_core_read_buffer (sd, cpu, read_map, myaddr, memaddr,
 323                                       length);
 324   if (length_read != length)
 325     return EIO;
 326   return 0;
 327 }
 328
 329 /* Memory error support for an opcodes disassembler.  */
 330
 331 void
 332 sim_disasm_perror_memory (int status, bfd_vma memaddr,
 333                           struct disassemble_info *info)
 334 {
 335   if (status != EIO)
 336     /* Can't happen.  */
 337     info->fprintf_func (info->stream, "Unknown error %d.", status);
 338   else
 339     /* Actually, address between memaddr and memaddr + len was
 340        out of bounds.  */
 341     info->fprintf_func (info->stream,
 342                         "Address 0x%x is out of bounds.",
 343                         (int) memaddr);
 344 }
 345
 346 /* Disassemble using the CGEN opcode table.
 347    ??? While executing an instruction, the insn has been decoded and all its
 348    fields have been extracted.  It is certainly possible to do the disassembly
 349    with that data.  This seems simpler, but maybe in the future the already
 350    extracted fields will be used.  */
 351
 352 void
 353 sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
 354                            const ARGBUF *abuf, IADDR pc, char *buf)
 355 {
 356   unsigned int length;
 357   unsigned long insn_value;
 358   struct disassemble_info disasm_info;
 359   SFILE sfile;
 360   union {
 361     unsigned8 bytes[CGEN_MAX_INSN_SIZE];
 362     unsigned16 shorts[8];
 363     unsigned32 words[4];
 364   } insn_buf;
 365   SIM_DESC sd = CPU_STATE (cpu);
 366   CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu);
 367   CGEN_EXTRACT_INFO ex_info;
 368   CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
 369   int insn_bit_length = CGEN_INSN_BITSIZE (insn);
 370   int insn_length = insn_bit_length / 8;
 371
 372   sfile.buffer = sfile.current = buf;
 373   INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
 374                          (fprintf_ftype) sim_disasm_sprintf);
 375   disasm_info.endian =
 376     (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
 377      : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
 378      : BFD_ENDIAN_UNKNOWN);
 379
 380   length = sim_core_read_buffer (sd, cpu, read_map, &insn_buf, pc,
 381                                  insn_length);
 382
 383   switch (min (CGEN_BASE_INSN_SIZE, insn_length))
 384     {
 385     case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
 386     case 1 : insn_value = insn_buf.bytes[0]; break;
 387     case 2 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
 388     case 4 : insn_value = T2H_4 (insn_buf.words[0]); break;
 389     default: abort ();
 390     }
 391
 392   disasm_info.buffer_vma = pc;
 393   disasm_info.buffer = insn_buf.bytes;
 394   disasm_info.buffer_length = length;
 395
 396   ex_info.dis_info = (PTR) &disasm_info;
 397   ex_info.valid = (1 << length) - 1;
 398   ex_info.insn_bytes = insn_buf.bytes;
 399
 400   length = (*CGEN_EXTRACT_FN (cd, insn)) (cd, insn, &ex_info, insn_value, fields, pc);
 401   /* Result of extract fn is in bits.  */
 402   /* ??? This assumes that each instruction has a fixed length (and thus
 403      for insns with multiple versions of variable lengths they would each
 404      have their own table entry).  */
 405   if (length == insn_bit_length)
 406     {
 407       (*CGEN_PRINT_FN (cd, insn)) (cd, &disasm_info, insn, fields, pc, length);
 408     }
 409   else
 410     {
 411       /* This shouldn't happen, but aborting is too drastic.  */
 412       strcpy (buf, "***unknown***");
 413     }
 414 }