sim/d30v/sim-calls.c

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
   4     Copyright (C) 1997, Free Software Foundation
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19
  20     */
  21
  22
  23 #include <stdarg.h>
  24 #include <ctype.h>
  25
  26 #include "sim-main.h"
  27 #include "sim-options.h"
  28
  29 #include "bfd.h"
  30 #include "sim-utils.h"
  31
  32 #ifdef HAVE_STDLIB_H
  33 #include <stdlib.h>
  34 #endif
  35
  36 static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */
  37
  38 static const char * get_insn_name (sim_cpu *, int);
  39
  40 #define SIM_ADDR unsigned
  41
  42
  43 #define OPTION_TRACE_CALL       200
  44 #define OPTION_TRACE_TRAPDUMP   201
  45 #define OPTION_EXTMEM_SIZE      202
  46
  47 static SIM_RC
  48 d30v_option_handler (SIM_DESC sd,
  49                      sim_cpu *cpu,
  50                      int opt,
  51                      char *arg,
  52                      int command_p)
  53 {
  54   char *suffix;
  55
  56   switch (opt)
  57     {
  58     default:
  59       break;
  60
  61     case OPTION_TRACE_CALL:
  62       if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
  63         TRACE_CALL_P = 1;
  64       else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
  65         TRACE_CALL_P = 0;
  66       else
  67         {
  68           sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
  69           return SIM_RC_FAIL;
  70         }
  71       return SIM_RC_OK;
  72
  73     case OPTION_TRACE_TRAPDUMP:
  74       if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
  75         TRACE_TRAP_P = 1;
  76       else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
  77         TRACE_TRAP_P = 0;
  78       else
  79         {
  80           sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
  81           return SIM_RC_FAIL;
  82         }
  83       return SIM_RC_OK;
  84
  85     case OPTION_EXTMEM_SIZE:
  86       if (arg == NULL || !isdigit (*arg))
  87         {
  88           sim_io_eprintf (sd, "Invalid memory size `%s'", arg);
  89           return SIM_RC_FAIL;
  90         }
  91
  92       suffix = arg;
  93       extmem_size = strtol (arg, &suffix, 0);
  94       if (*suffix == 'm' || *suffix == 'M')
  95         extmem_size <<= 20;
  96       else if (*suffix == 'k' || *suffix == 'K')
  97         extmem_size <<= 10;
  98       sim_do_commandf (sd, "memory delete 0x80000000");
  99       sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
 100
 101       return SIM_RC_OK;
 102     }
 103
 104   sim_io_eprintf (sd, "Unknown option (%d)\n", opt);
 105   return SIM_RC_FAIL;
 106 }
 107
 108 static const OPTION d30v_options[] =
 109 {
 110   { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL},
 111       '\0', "on|off", "Enable tracing of calls and returns, checking saved registers",
 112       d30v_option_handler },
 113   { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP},
 114       '\0', "on|off",
 115 #if TRAPDUMP
 116     "Traps 0..30 dump out all of the registers (defaults on)",
 117 #else
 118     "Traps 0..30 dump out all of the registers",
 119 #endif
 120       d30v_option_handler },
 121   { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE},
 122     '\0', "size", "Change size of external memory, default 8 meg",
 123     d30v_option_handler },
 124   { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
 125 };
 126
 127 /* Return name of an insn, used by insn profiling.  */
 128
 129 static const char *
 130 get_insn_name (sim_cpu *cpu, int i)
 131 {
 132   return itable[i].name;
 133 }
 134
 135 /* Structures used by the simulator, for gdb just have static structures */
 136
 137 SIM_DESC
 138 sim_open (SIM_OPEN_KIND kind,
 139           host_callback *callback,
 140           struct _bfd *abfd,
 141           char **argv)
 142 {
 143   SIM_DESC sd = sim_state_alloc (kind, callback);
 144
 145   /* FIXME: watchpoints code shouldn't need this */
 146   STATE_WATCHPOINTS (sd)->pc = &(PC);
 147   STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
 148   STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event;
 149
 150   /* Initialize the mechanism for doing insn profiling.  */
 151   CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
 152   CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
 153
 154 #ifdef TRAPDUMP
 155   TRACE_TRAP_P = TRAPDUMP;
 156 #endif
 157
 158   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
 159     return 0;
 160   sim_add_option_table (sd, NULL, d30v_options);
 161
 162   /* Memory and EEPROM */
 163   /* internal instruction RAM - fixed */
 164   sim_do_commandf (sd, "memory region 0,0x10000");
 165   /* internal data RAM - fixed */
 166   sim_do_commandf (sd, "memory region 0x20000000,0x8000");
 167   /* control register dummy area */
 168   sim_do_commandf (sd, "memory region 0x40000000,0x10000");
 169   /* external RAM */
 170   sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
 171   /* EIT RAM */
 172   sim_do_commandf (sd, "memory region 0xfffff000,0x1000");
 173
 174   /* getopt will print the error message so we just have to exit if this fails.
 175      FIXME: Hmmm...  in the case of gdb we need getopt to call
 176      print_filtered.  */
 177   if (sim_parse_args (sd, argv) != SIM_RC_OK)
 178     {
 179       /* Uninstall the modules to avoid memory leaks,
 180          file descriptor leaks, etc.  */
 181       sim_module_uninstall (sd);
 182       return 0;
 183     }
 184
 185   /* check for/establish the a reference program image */
 186   if (sim_analyze_program (sd,
 187                            (STATE_PROG_ARGV (sd) != NULL
 188                             ? *STATE_PROG_ARGV (sd)
 189                             : NULL),
 190                            abfd) != SIM_RC_OK)
 191     {
 192       sim_module_uninstall (sd);
 193       return 0;
 194     }
 195
 196   /* establish any remaining configuration options */
 197   if (sim_config (sd) != SIM_RC_OK)
 198     {
 199       sim_module_uninstall (sd);
 200       return 0;
 201     }
 202
 203   if (sim_post_argv_init (sd) != SIM_RC_OK)
 204     {
 205       /* Uninstall the modules to avoid memory leaks,
 206          file descriptor leaks, etc.  */
 207       sim_module_uninstall (sd);
 208       return 0;
 209     }
 210
 211   return sd;
 212 }
 213
 214
 215 void
 216 sim_close (SIM_DESC sd, int quitting)
 217 {
 218   /* Uninstall the modules to avoid memory leaks,
 219      file descriptor leaks, etc.  */
 220   sim_module_uninstall (sd);
 221 }
 222
 223
 224 SIM_RC
 225 sim_create_inferior (SIM_DESC sd,
 226                      struct _bfd *abfd,
 227                      char **argv,
 228                      char **envp)
 229 {
 230   /* clear all registers */
 231   memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs));
 232   EIT_VB = EIT_VB_DEFAULT;
 233   STATE_CPU (sd, 0)->unit = any_unit;
 234   sim_module_init (sd);
 235   if (abfd != NULL)
 236     PC = bfd_get_start_address (abfd);
 237   else
 238     PC = 0xfffff000; /* reset value */
 239   return SIM_RC_OK;
 240 }
 241
 242 void
 243 sim_do_command (SIM_DESC sd, char *cmd)
 244 {
 245   if (sim_args_command (sd, cmd) != SIM_RC_OK)
 246     sim_io_printf (sd, "Unknown command `%s'\n", cmd);
 247 }
 248
 249 /* The following register definitions were ripped off from
 250    gdb/config/tm-d30v.h.  If any of those defs changes, this table needs to
 251    be updated.  */
 252
 253 #define NUM_REGS 86
 254
 255 #define R0_REGNUM       0
 256 #define FP_REGNUM       11
 257 #define LR_REGNUM       62
 258 #define SP_REGNUM       63
 259 #define SPI_REGNUM      64      /* Interrupt stack pointer */
 260 #define SPU_REGNUM      65      /* User stack pointer */
 261 #define CREGS_START     66
 262
 263 #define PSW_REGNUM      (CREGS_START + 0) /* psw, bpsw, or dpsw??? */
 264 #define    PSW_SM 0x80000000    /* Stack mode: 0 == interrupt (SPI),
 265                                                1 == user (SPU) */
 266 #define BPSW_REGNUM     (CREGS_START + 1) /* Backup PSW (on interrupt) */
 267 #define PC_REGNUM       (CREGS_START + 2) /* pc, bpc, or dpc??? */
 268 #define BPC_REGNUM      (CREGS_START + 3) /* Backup PC (on interrupt) */
 269 #define DPSW_REGNUM     (CREGS_START + 4) /* Backup PSW (on debug trap) */
 270 #define DPC_REGNUM      (CREGS_START + 5) /* Backup PC (on debug trap) */
 271 #define RPT_C_REGNUM    (CREGS_START + 7) /* Loop count */
 272 #define RPT_S_REGNUM    (CREGS_START + 8) /* Loop start address*/
 273 #define RPT_E_REGNUM    (CREGS_START + 9) /* Loop end address */
 274 #define MOD_S_REGNUM    (CREGS_START + 10)
 275 #define MOD_E_REGNUM    (CREGS_START + 11)
 276 #define IBA_REGNUM      (CREGS_START + 14) /* Instruction break address */
 277 #define EIT_VB_REGNUM   (CREGS_START + 15) /* Vector base address */
 278 #define INT_S_REGNUM    (CREGS_START + 16) /* Interrupt status */
 279 #define INT_M_REGNUM    (CREGS_START + 17) /* Interrupt mask */
 280 #define A0_REGNUM       84
 281 #define A1_REGNUM       85
 282
 283 int
 284 sim_fetch_register (sd, regno, buf, length)
 285      SIM_DESC sd;
 286      int regno;
 287      unsigned char *buf;
 288      int length;
 289 {
 290   if (regno < A0_REGNUM)
 291     {
 292       unsigned32 reg;
 293
 294       if (regno <= R0_REGNUM + 63)
 295         reg = sd->cpu[0].regs.general_purpose[regno];
 296       else if (regno <= SPU_REGNUM)
 297         reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM];
 298       else
 299         reg = sd->cpu[0].regs.control[regno - CREGS_START];
 300
 301       buf[0] = reg >> 24;
 302       buf[1] = reg >> 16;
 303       buf[2] = reg >> 8;
 304       buf[3] = reg;
 305     }
 306   else if (regno < NUM_REGS)
 307     {
 308       unsigned32 reg;
 309
 310       reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32;
 311
 312       buf[0] = reg >> 24;
 313       buf[1] = reg >> 16;
 314       buf[2] = reg >> 8;
 315       buf[3] = reg;
 316
 317       reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM];
 318
 319       buf[4] = reg >> 24;
 320       buf[5] = reg >> 16;
 321       buf[6] = reg >> 8;
 322       buf[7] = reg;
 323     }
 324   else
 325     abort ();
 326   return -1;
 327 }
 328
 329 int
 330 sim_store_register (sd, regno, buf, length)
 331      SIM_DESC sd;
 332      int regno;
 333      unsigned char *buf;
 334      int length;
 335 {
 336   if (regno < A0_REGNUM)
 337     {
 338       unsigned32 reg;
 339
 340       reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
 341
 342       if (regno <= R0_REGNUM + 63)
 343         sd->cpu[0].regs.general_purpose[regno] = reg;
 344       else if (regno <= SPU_REGNUM)
 345         sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg;
 346       else
 347         sd->cpu[0].regs.control[regno - CREGS_START] = reg;
 348     }
 349   else if (regno < NUM_REGS)
 350     {
 351       unsigned32 reg;
 352
 353       reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
 354
 355       sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32;
 356
 357       reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7];
 358
 359       sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg;
 360     }
 361   else
 362     abort ();
 363   return -1;
 364 }