sim/fr30/fr30-sim.h

   1 /* collection of junk waiting time to sort out
   2    Copyright (C) 1998, 1999 Free Software Foundation, Inc.
   3    Contributed by Cygnus Solutions.
   4
   5 This file is part of the GNU Simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef FR30_SIM_H
  22 #define FR30_SIM_H
  23
  24 /* gdb register numbers */
  25 #define PC_REGNUM       16
  26 #define PS_REGNUM       17
  27 #define TBR_REGNUM      18
  28 #define RP_REGNUM       19
  29 #define SSP_REGNUM      20
  30 #define USP_REGNUM      21
  31 #define MDH_REGNUM      22
  32 #define MDL_REGNUM      23
  33
  34 extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
  35 extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
  36 #define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu)
  37 #define SET_H_SBIT(val) fr30bf_h_sbit_set_handler (current_cpu, (val))
  38
  39 extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
  40 extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
  41 #define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu)
  42 #define SET_H_CCR(val) fr30bf_h_ccr_set_handler (current_cpu, (val))
  43
  44 extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
  45 extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
  46 #define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu)
  47 #define SET_H_SCR(val) fr30bf_h_scr_set_handler (current_cpu, (val))
  48
  49 extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
  50 extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
  51 #define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu)
  52 #define SET_H_ILM(val) fr30bf_h_ilm_set_handler (current_cpu, (val))
  53
  54 extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
  55 extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
  56 #define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu)
  57 #define SET_H_PS(val) fr30bf_h_ps_set_handler (current_cpu, (val))
  58
  59 extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
  60 extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
  61 #define GET_H_DR(regno) fr30bf_h_dr_get_handler (current_cpu, (regno))
  62 #define SET_H_DR(regno, val) fr30bf_h_dr_set_handler (current_cpu, (regno), (val))
  63 \f
  64 #define GETTWI GETTSI
  65 #define SETTWI SETTSI
  66 \f
  67 /* Hardware/device support.
  68    ??? Will eventually want to move device stuff to config files.  */
  69
  70 /* Special purpose traps.  */
  71 #define TRAP_SYSCALL    10
  72 #define TRAP_BREAKPOINT 9
  73
  74 /* Support for the MCCR register (Cache Control Register) is needed in order
  75    for overlays to work correctly with the scache: cached instructions need
  76    to be flushed when the instruction space is changed at runtime.  */
  77
  78 /* Cache Control Register */
  79 #define MCCR_ADDR 0xffffffff
  80 #define MCCR_CP 0x80
  81 /* not supported */
  82 #define MCCR_CM0 2
  83 #define MCCR_CM1 1
  84
  85 /* Serial device addresses.  */
  86 /* These are the values for the MSA2000 board.
  87    ??? Will eventually need to move this to a config file.  */
  88 #define UART_INCHAR_ADDR        0xff004009
  89 #define UART_OUTCHAR_ADDR       0xff004007
  90 #define UART_STATUS_ADDR        0xff004002
  91
  92 #define UART_INPUT_READY        0x4
  93 #define UART_OUTPUT_READY       0x1
  94
  95 /* Start address and length of all device support.  */
  96 #define FR30_DEVICE_ADDR        0xff000000
  97 #define FR30_DEVICE_LEN         0x00ffffff
  98
  99 /* sim_core_attach device argument.  */
 100 extern device fr30_devices;
 101
 102 /* FIXME: Temporary, until device support ready.  */
 103 struct _device { int foo; };
 104
 105 /* Handle the trap insn.  */
 106 USI fr30_int (SIM_CPU *, PCADDR, int);
 107
 108 #endif /* FR30_SIM_H */