sim/fr30/mloop.in

   1 # Simulator main loop for fr30. -*- C -*-
   2 # Copyright (C) 1998, 1999 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Solutions.
   4 #
   5 # This file is part of the GNU Simulators.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 2, or (at your option)
  10 # any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License along
  18 # with this program; if not, write to the Free Software Foundation, Inc.,
  19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20
  21 # Syntax:
  22 # /bin/sh mainloop.in command
  23 #
  24 # Command is one of:
  25 #
  26 # init
  27 # support
  28 # extract-{simple,scache,pbb}
  29 # {full,fast}-exec-{simple,scache,pbb}
  30 #
  31 # A target need only provide a "full" version of one of simple,scache,pbb.
  32 # If the target wants it can also provide a fast version of same.
  33 # It can't provide more than this, however for illustration's sake the FR30
  34 # port provides examples of all.
  35
  36 # ??? After a few more ports are done, revisit.
  37 # Will eventually need to machine generate a lot of this.
  38
  39 case "x$1" in
  40
  41 xsupport)
  42
  43 cat <<EOF
  44
  45 static INLINE const IDESC *
  46 extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
  47          int fast_p)
  48 {
  49   const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf);
  50   @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
  51   if (! fast_p)
  52     {
  53       int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
  54       int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
  55       @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
  56     }
  57   return id;
  58 }
  59
  60 static INLINE SEM_PC
  61 execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
  62 {
  63   SEM_PC vpc;
  64
  65   if (fast_p)
  66     {
  67 #if ! WITH_SEM_SWITCH_FAST
  68 #if WITH_SCACHE
  69       vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
  70 #else
  71       vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
  72 #endif
  73 #else
  74       abort ();
  75 #endif /* WITH_SEM_SWITCH_FAST */
  76     }
  77   else
  78     {
  79 #if ! WITH_SEM_SWITCH_FULL
  80       ARGBUF *abuf = &sc->argbuf;
  81       const IDESC *idesc = abuf->idesc;
  82 #if WITH_SCACHE_PBB
  83       int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
  84 #else
  85       int virtual_p = 0;
  86 #endif
  87
  88       if (! virtual_p)
  89         {
  90           /* FIXME: call x-before */
  91           if (ARGBUF_PROFILE_P (abuf))
  92             PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
  93           /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}.  */
  94           if (PROFILE_MODEL_P (current_cpu)
  95               && ARGBUF_PROFILE_P (abuf))
  96             @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
  97           TRACE_INSN_INIT (current_cpu, abuf, 1);
  98           TRACE_INSN (current_cpu, idesc->idata,
  99                       (const struct argbuf *) abuf, abuf->addr);
 100         }
 101 #if WITH_SCACHE
 102       vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
 103 #else
 104       vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
 105 #endif
 106       if (! virtual_p)
 107         {
 108           /* FIXME: call x-after */
 109           if (PROFILE_MODEL_P (current_cpu)
 110               && ARGBUF_PROFILE_P (abuf))
 111             {
 112               int cycles;
 113
 114               cycles = (*idesc->timing->model_fn) (current_cpu, sc);
 115               @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
 116             }
 117           TRACE_INSN_FINI (current_cpu, abuf, 1);
 118         }
 119 #else
 120       abort ();
 121 #endif /* WITH_SEM_SWITCH_FULL */
 122     }
 123
 124   return vpc;
 125 }
 126
 127 EOF
 128
 129 ;;
 130
 131 xinit)
 132
 133 cat <<EOF
 134 /*xxxinit*/
 135 EOF
 136
 137 ;;
 138
 139 xextract-simple | xextract-scache)
 140
 141 # Inputs:  current_cpu, vpc, sc, FAST_P
 142 # Outputs: sc filled in
 143
 144 cat <<EOF
 145 {
 146   CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
 147   extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
 148 }
 149 EOF
 150
 151 ;;
 152
 153 xextract-pbb)
 154
 155 # Inputs:  current_cpu, pc, sc, max_insns, FAST_P
 156 # Outputs: sc, pc
 157 # sc must be left pointing past the last created entry.
 158 # pc must be left pointing past the last created entry.
 159 # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
 160 # to record the vpc of the cti insn.
 161 # SET_INSN_COUNT(n) must be called to record number of real insns.
 162
 163 cat <<EOF
 164 {
 165   const IDESC *idesc;
 166   int icount = 0;
 167
 168   while (max_insns > 0)
 169     {
 170       UHI insn = GETIMEMUHI (current_cpu, pc);
 171       idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
 172       ++sc;
 173       --max_insns;
 174       ++icount;
 175       pc += idesc->length;
 176       if (IDESC_CTI_P (idesc))
 177         {
 178           SET_CTI_VPC (sc - 1);
 179
 180           /* Delay slot? */
 181           /* ??? breakpoints in delay slots */
 182           if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
 183             {
 184               UHI insn = GETIMEMUHI (current_cpu, pc);
 185               idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
 186               if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT))
 187                 {
 188                   /* malformed program */
 189                   sim_io_eprintf (CPU_STATE (current_cpu),
 190                                   "malformed program, \`%s' insn in delay slot\n",
 191                                   CGEN_INSN_NAME (idesc->idata));
 192                 }
 193               else
 194                 {
 195                   ++sc;
 196                   --max_insns;
 197                   ++icount;
 198                   pc += idesc->length;
 199                 }
 200             }
 201           break;
 202         }
 203     }
 204
 205  Finish:
 206   SET_INSN_COUNT (icount);
 207 }
 208 EOF
 209
 210 ;;
 211
 212 xfull-exec-* | xfast-exec-*)
 213
 214 # Inputs: current_cpu, sc, FAST_P
 215 # Outputs: vpc
 216 # vpc contains the address of the next insn to execute
 217
 218 cat <<EOF
 219 {
 220 #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
 221 #define DEFINE_SWITCH
 222 #include "sem-switch.c"
 223 #else
 224   vpc = execute (current_cpu, vpc, FAST_P);
 225 #endif
 226 }
 227 EOF
 228
 229 ;;
 230
 231 *)
 232   echo "Invalid argument to mainloop.in: $1" >&2
 233   exit 1
 234   ;;
 235
 236 esac