sim/h8500/compile.c

   1 /* Simulator for the Hitachi H8/500 architecture.
   2
   3    Written by Steve Chamberlain of Cygnus Support.
   4    sac@cygnus.com
   5
   6    This file is part of H8/500 sim
   7
   8
   9                 THIS SOFTWARE IS NOT COPYRIGHTED
  10
  11    Cygnus offers the following for use in the public domain.  Cygnus
  12    makes no warranty with regard to the software or it's performance
  13    and the user accepts the software "AS IS" with all faults.
  14
  15    CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
  16    THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17    MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  18
  19 */
  20
  21 #include "config.h"
  22
  23 #include <signal.h>
  24 #ifdef HAVE_STDLIB_H
  25 #include <stdlib.h>
  26 #endif
  27 #ifdef HAVE_TIME_H
  28 #include <time.h>
  29 #endif
  30 #include <sys/param.h>
  31 #include <setjmp.h>
  32 #include "ansidecl.h"
  33 #include "bfd.h"
  34 #include "callback.h"
  35 #include "remote-sim.h"
  36
  37 #define O_RECOMPILE 85
  38 #define DEFINE_TABLE
  39 #define DISASSEMBLER_TABLE
  40
  41 /* FIXME: Needs to live in header file.
  42    This header should also include the things in remote-sim.h.
  43    One could move this to remote-sim.h but this function isn't needed
  44    by gdb.  */
  45 void sim_set_simcache_size PARAMS ((int));
  46
  47 int debug;
  48
  49 host_callback *sim_callback;
  50
  51 static SIM_OPEN_KIND sim_kind;
  52 static char *myname;
  53
  54 /* This code can be compiled with any old C compiler, in which case
  55    four or five switch statements will be executed for each
  56    instruction simulated.  It can be compiled with GCC, then the
  57    simulated instructions thread through the code fragments, and
  58    everything goes much faster.
  59
  60    These definitions make the code work either way
  61 */
  62 #ifdef __GNUC__
  63 #define DISPATCH(X) goto *(X); do
  64 #define LABEL(X) X##_L
  65 #define LABELN(X,N) X##_L##N
  66 #define LABEL_REF(X) &&X##_L
  67 #define LABEL_REFN(X,N) &&X##_L##N
  68 #define ENDDISPATCH while (0);
  69 #define fastref void *
  70
  71 #define DEFAULT ;
  72 #define INLINE __inline__
  73 #else
  74 #define DEFAULT default :
  75 #define DISPATCH(X) switch (X)
  76 #define LABEL(X) case X
  77 #define LABELN(X,N) case X
  78 #define LABEL_REF(X) X
  79 #define LABEL_REFN(X,N) X
  80 #define ENDDISPATCH
  81 #define fastref int
  82
  83
  84
  85 #define INLINE
  86 #define STORE_REG_B     1
  87 #define STORE_REG_W     2
  88 #define STORE_INC_B     3
  89 #define STORE_INC_W     4
  90 #define STORE_DEC_B     5
  91 #define STORE_DEC_W     6
  92 #define STORE_DISP_B    7
  93 #define STORE_DISP_W    8
  94 #define STORE_CRB       9
  95 #define STORE_CRW       10
  96 #define STORE_REG_L     11
  97 #define STORE_NOP       12
  98
  99 #define FETCH_NOP       9
 100 #define FETCH_REG_B     10
 101 #define FETCH_REG_W     11
 102 #define FETCH_INC_B     12
 103 #define FETCH_INC_W     13
 104 #define FETCH_DEC_B     14
 105 #define FETCH_DEC_W     15
 106 #define FETCH_DISP_B    16
 107 #define FETCH_DISP_W    17
 108 #define FETCH_IMM       18
 109 #define FETCH_CRB       19
 110 #define FETCH_CRW       20
 111 #define FETCH_LVAL      21
 112 #define FETCH_LVAL24    22
 113 #define FETCH_REG_L     23
 114
 115 #define FLAG_m          20
 116 #define FLAG_M          21
 117 #define FLAG_A          22
 118 #define FLAG_NONE       23
 119 #define FLAG_NOSTORE    24
 120 #define FLAG_CLEAR      25
 121 #define FLAG_a          26
 122 #define FLAG_BRANCH     27
 123 #define FLAG_special    28
 124
 125 #define FLAG_shiftword  29
 126 #define FLAG_shiftbyte  30
 127
 128 #define FLAG_multword   31
 129 #define FLAG_multbyte   32
 130 #endif
 131
 132
 133 #define h8500_table h8500_compile_table
 134 #include "../opcodes/h8500-opc.h"
 135
 136 #include "inst.h"
 137
 138 #define LOW_BYTE(x) ((x) & 0xff)
 139 #define HIGH_BYTE(x) (((x)>>8) & 0xff)
 140 #define NORMAL_CP ((cpu.regs[R_CP].c - cpu.memory)>>16)
 141 #define NORMAL_DP ((cpu.regs[R_DP].c - cpu.memory)>>16)
 142 #define NORMAL_EP ((cpu.regs[R_EP].c - cpu.memory)>>16)
 143 #define NORMAL_TP ((cpu.regs[R_TP].c - cpu.memory)>>16)
 144 #define SET_NORMREG(x,y) ((cpu.regs[x].l = (y)))
 145 #define GET_NORMREG(x) (cpu.regs[x].l)
 146 #define SET_SEGREG(x,y) { cpu.regs[x].c = ((y) & 0xff0000) + cpu.memory;}
 147 #define GET_SEGREG(x)  ( (cpu.regs[x].c  - cpu.memory ) >> 16)
 148 #define SET_NORMAL_CPPC(x) { pc = (x) & 0xffff; SET_SEGREG(R_CP, (x));}
 149 #define NORMAL_SR ((N<<3)|(Z<<2)|(V<<1)|(C))
 150 #define P(X,Y) ((X<<8) | Y)
 151
 152 #define BUILDSR()   cpu.regs[R_SR].s[LOW] = (N << 3) | (Z << 2) | (V<<1) | C;
 153
 154 #define GETSR()             \
 155   C = (cpu.regs[R_SR].s[LOW] >> 0) & 1;\
 156   V = (cpu.regs[R_SR].s[LOW] >> 1) & 1;\
 157   Z = (cpu.regs[R_SR].s[LOW] >> 2) & 1;\
 158   N = (cpu.regs[R_SR].s[LOW] >> 3) & 1;
 159
 160 #ifdef __CHAR_IS_SIGNED__
 161 #define SEXTCHAR(x) ((char)(x))
 162 #endif
 163
 164 #ifndef SEXTCHAR
 165 #define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff):x)
 166 #endif
 167
 168 #define SEXTSHORT(x) ((short)(x))
 169
 170 /* Which segment registers go with which pointer registers */
 171 static unsigned char **segmap[R_LAST];
 172 static unsigned char *(regptr[R_LAST][3]);
 173 static unsigned char *(segregptr[R_LAST][3]);
 174 static cpu_state_type cpu;
 175
 176 static int segforreg[] = {R_DP, R_DP, R_DP, R_DP,
 177                             R_EP, R_EP, R_TP, R_TP,
 178                             R_DP, R_DP, R_DP, R_DP,
 179                             R_EP, R_EP, R_TP, R_TP};
 180 int LOW;
 181 int HIGH;
 182
 183 /* routines for getting and storing args */
 184 #define elval(struct, lit) \
 185  (((*(struct.reg.wptr) + lit) & 0xffff) + (*(struct.r2.segreg)))
 186
 187 #define displval(s) elval((s),(s).literal)
 188
 189 #define ireglval(struct) elval(struct, 0)
 190 #define wordat(x) (((x)[0] << 8) | (x)[1])
 191 #define longat(x) ((wordat((x))<<16)|(wordat((x)+2)))
 192 #define byteat(x) ((x)[0])
 193
 194 #define setwordat(x,y) {x[0] =( y)>>8; x[1] = y;}
 195 #define setbyteat(x,y) {x[0] = y;}
 196
 197 /*#define setalignedwordat(x,y) {((short *)x)[0] =y;}*/
 198 /*
 199 statics
 200 */
 201
 202 ea_type rd;
 203 ea_type rs;
 204 ea_type imm;
 205 ea_type cr;
 206 ea_type ea;
 207 ea_type nop;
 208 ea_type lval;
 209 ea_type lval24;
 210
 211 ea_type eavector[2];
 212
 213 int disp;
 214
 215 #define JBYTE 0
 216 #define JWORD 1
 217 #define JLONG 2
 218
 219 typedef union
 220 {
 221   struct
 222     {
 223       fastref srcabyte;
 224       fastref srcaword;
 225       fastref srcalong;
 226
 227       fastref srcbbyte;
 228       fastref srcbword;
 229       fastref srcblong;
 230
 231       fastref dstbyte;
 232       fastref dstword;
 233       fastref dstlong;
 234     } s;
 235   struct
 236     {
 237       fastref byte;
 238       fastref word;
 239       fastref lon;
 240     } a[3];
 241
 242   fastref j[9];
 243 } size_ptr;
 244
 245 union
 246 {
 247   struct ea_struct
 248     {
 249       size_ptr ea_nop;
 250       size_ptr ea_reg;
 251       size_ptr ea_inc;
 252       size_ptr ea_dec;
 253       size_ptr ea_disp;
 254
 255       size_ptr ea_imm;
 256       size_ptr ea_cr;
 257       size_ptr ea_lval;
 258       size_ptr ea_lval24;
 259     } s;
 260 #define N_EATYPES (sizeof(struct ea_struct) / sizeof(size_ptr))
 261   size_ptr a[N_EATYPES];
 262 } eas;
 263
 264 /* This function takes an ea structure filled in for the 1st source
 265  operand and modifies it to be for either the 1st, 2nd or dst operand */
 266
 267 static void
 268 howto_workout (encoded, semiencoded, n)
 269      ea_type *encoded;
 270      ea_type *semiencoded;
 271      int n;
 272 {
 273   int i;
 274   *encoded = *semiencoded;
 275
 276   for (i = 0; i < N_EATYPES; i++)
 277     {
 278       if (encoded->type == eas.a[i].s.srcabyte)
 279         {
 280           encoded->type = eas.a[i].a[n].byte;
 281           return;
 282         }
 283       else if (encoded->type == eas.a[i].s.srcaword)
 284         {
 285           encoded->type = eas.a[i].a[n].word;
 286           return;
 287         }
 288       else if (encoded->type == eas.a[i].s.srcalong)
 289         {
 290           encoded->type = eas.a[i].a[n].lon;
 291           return;
 292         }
 293     }
 294
 295   abort ();
 296 }
 297
 298 fastref flag_shiftword;
 299 fastref flag_shiftbyte;
 300 fastref flag_multword;
 301 fastref flag_multbyte;
 302 fastref flag_mp;
 303 fastref flag_special;
 304 fastref flag_Mp;
 305 fastref flag_ap;
 306 fastref flag_Ap;
 307 fastref flag_nonep;
 308 fastref flag_nostorep;
 309 fastref flag_clearp;
 310 fastref flag_branch;
 311 fastref exec_dispatch[100];
 312
 313 static int
 314 get_now ()
 315 {
 316   return time (0);
 317 }
 318
 319 static int
 320 now_persec ()
 321 {
 322   return 1;
 323 }
 324
 325 static void
 326 gotcr (ptr, n)
 327      ea_type *ptr;
 328      int n;
 329 {
 330   int size;
 331   n &= 0x7;
 332   if (n == 0)
 333     {
 334       abort ();
 335     }
 336   else
 337     {
 338       ptr->type = eas.s.ea_cr.j[JBYTE];
 339       ptr->reg.bptr = segregptr[n][JLONG];
 340     }
 341 }
 342 static void
 343 gotreg (ptr, n, size)
 344      ea_type *ptr;
 345      int n;
 346      int size;
 347 {
 348   n &= 0x7;
 349   ptr->type = eas.s.ea_reg.j[size];
 350   ptr->reg.bptr = regptr[n][size];
 351 }
 352
 353 static void
 354 gotinc (ptr, n, inc, size)
 355      ea_type *ptr;
 356      int n;
 357      int size;
 358 {
 359   n &= 0x7;
 360   if (inc > 0)
 361     {
 362       ptr->type = eas.s.ea_inc.j[size];
 363     }
 364   else
 365     {
 366       ptr->type = eas.s.ea_dec.j[size];
 367     }
 368   ptr->reg.bptr = regptr[n][JWORD];
 369   ptr->r2.segreg = segmap[n];
 370 }
 371
 372
 373 static void
 374 gotabs (ptr, disp, reg, size)
 375      ea_type *ptr;
 376      int disp;
 377      int reg;
 378      int size;
 379 {
 380   ptr->type = eas.s.ea_disp.j[size];
 381   ptr->reg.bptr = regptr[reg][JWORD];
 382   ptr->r2.segreg = segmap[reg];
 383   ptr->literal = disp;
 384 }
 385
 386 static void
 387 gotind (ptr, disp, reg, size)
 388      ea_type *ptr;
 389      int disp;
 390      int reg;
 391      int size;
 392 {
 393   gotabs (ptr, disp, reg & 0x7, size);
 394 }
 395
 396 static void
 397 gotimm (ptr, val)
 398      ea_type *ptr;
 399      int val;
 400 {
 401   ptr->type = eas.s.ea_imm.j[0];
 402   ptr->literal = val;
 403 }
 404
 405 static void
 406 indoff (ptr)
 407      ea_type *ptr;
 408 {
 409   int i;
 410   for (i = 0; i < 6; i++)
 411     {
 412       if (ptr->type == eas.s.ea_disp.j[i])
 413         {
 414           ptr->type = eas.s.ea_lval.j[i];
 415           return;
 416         }
 417     }
 418 }
 419
 420 thinkabout_shifts (d, bytesized)
 421      decoded_inst *d;
 422      int bytesized;
 423 {
 424   if (bytesized)
 425     {
 426       /* Got a byte shift, fake up second arg */
 427       d->srcb.type = eas.s.ea_imm.s.srcbword;
 428       d->srcb.literal = 8;
 429     }
 430   else
 431     {
 432       /* got a word shift, fake up second arg */
 433       d->srcb.type = eas.s.ea_imm.s.srcbword;
 434       d->srcb.literal = 16;
 435     }
 436 }
 437
 438 /* Calculate the number of cycles required to run this
 439    instruction
 440 */
 441 static void
 442 compcycles (dst, opcode)
 443      decoded_inst *dst;
 444      h8500_opcode_info *opcode;
 445 {
 446   int cycles = 0;
 447   /* Guess for the time being - 1 cycle for the first two bytes in the
 448      opcode - to fecth the operand, and 3 cycles for all the rest of
 449      the bytes, since they mean that there is probably an operand to
 450      fetch */
 451
 452   switch (opcode->length)
 453     {
 454     case 1:
 455     case 2:
 456       cycles += opcode->length;
 457       break;
 458     default:
 459       cycles += opcode->length * 3;
 460       break;
 461     }
 462
 463   dst->cycles = cycles;
 464 }
 465
 466 static void
 467 translate (ptr, from, to)
 468      ea_type *ptr;
 469      fastref from;
 470      fastref to;
 471 {
 472   if (ptr->reg.wptr == &cpu.regs[7].s[LOW]
 473       && ptr->type == from)
 474     {
 475       ptr->type = to;
 476     }
 477 }
 478
 479 static
 480 void
 481 fix_incdecs (dst)
 482      decoded_inst *dst;
 483 {
 484   if (dst->dst.type == eas.s.ea_inc.s.dstbyte
 485       && (dst->srca.type == eas.s.ea_inc.s.srcabyte
 486           || dst->srcb.type == eas.s.ea_inc.s.srcbbyte))
 487     {
 488       dst->dst.type = eas.s.ea_disp.s.dstbyte;
 489     }
 490
 491   if (dst->dst.type == eas.s.ea_inc.s.dstword
 492       && (dst->srca.type == eas.s.ea_inc.s.srcaword
 493           || dst->srcb.type == eas.s.ea_inc.s.srcbword))
 494     {
 495       dst->dst.type = eas.s.ea_disp.s.dstword;
 496     }
 497
 498   if (dst->dst.type == eas.s.ea_dec.s.dstbyte
 499       || dst->dst.type == eas.s.ea_dec.s.dstword)
 500     {
 501       if (dst->srca.type == eas.s.ea_dec.s.srcabyte)
 502         {
 503           dst->srca.type = eas.s.ea_disp.s.srcabyte;
 504         }
 505       else if (dst->srca.type == eas.s.ea_dec.s.srcaword)
 506         {
 507           dst->srca.type = eas.s.ea_disp.s.srcaword;
 508         }
 509       else if (dst->srcb.type == eas.s.ea_dec.s.srcbbyte)
 510         {
 511           dst->srcb.type = eas.s.ea_disp.s.srcbbyte;
 512         }
 513       else if (dst->srcb.type == eas.s.ea_dec.s.srcbword)
 514         {
 515           dst->srcb.type = eas.s.ea_disp.s.srcbword;
 516         }
 517     }
 518
 519
 520   /* Turn a byte ops from the sp into word ops */
 521   translate (&dst->dst, eas.s.ea_dec.s.dstbyte, eas.s.ea_dec.s.dstword);
 522   translate (&dst->dst, eas.s.ea_inc.s.dstbyte, eas.s.ea_inc.s.dstword);
 523
 524   translate (&dst->srca, eas.s.ea_dec.s.srcabyte, eas.s.ea_dec.s.srcaword);
 525   translate (&dst->srca, eas.s.ea_inc.s.srcabyte, eas.s.ea_inc.s.srcaword);
 526
 527   translate (&dst->srcb, eas.s.ea_dec.s.srcbbyte, eas.s.ea_dec.s.srcbword);
 528   translate (&dst->srcb, eas.s.ea_inc.s.srcbbyte, eas.s.ea_inc.s.srcbword);
 529
 530
 531 }
 532
 533
 534 static void
 535 find (pc, buffer, dst)
 536      int pc;
 537      unsigned char *buffer;
 538      decoded_inst *dst;
 539 {
 540   h8500_opcode_info *opcode;
 541   int i;
 542   int idx;
 543   int hadimm = 0;
 544   dst->srca.reg.rptr = 0;
 545
 546   /* Run down the table to find the one which matches */
 547   for (opcode = h8500_table; opcode->name; opcode++)
 548     {
 549       int byte;
 550       int rn;
 551       int rd;
 552       int rs;
 553       int disp;
 554       int abs;
 555       int imm;
 556       int pcrel;
 557       int qim;
 558       int i;
 559       int cr;
 560
 561
 562       dst->opcode = exec_dispatch[opcode->flavor & 0x7f];
 563
 564       for (byte = 0; byte < opcode->length; byte++)
 565         {
 566           if ((buffer[byte] & opcode->bytes[byte].mask)
 567               != (opcode->bytes[byte].contents))
 568             {
 569               goto next;
 570             }
 571           else
 572             {
 573               /* extract any info parts */
 574               switch (opcode->bytes[byte].insert)
 575                 {
 576                 case 0:
 577                 case FP:
 578                   break;
 579                 default:
 580                   abort ();
 581                   break;
 582                 case RN:
 583                   rn = buffer[byte] & 0x7;
 584                   break;
 585                 case RS:
 586                   rs = buffer[byte] & 0x7;
 587                   break;
 588                 case CRB:
 589                   cr = buffer[byte] & 0x7;
 590                   if (cr == 0)
 591                     goto next;
 592                   break;
 593                 case CRW:
 594                   cr = buffer[byte] & 0x7;
 595                   if (cr != 0)
 596                     goto next;
 597                   break;
 598                 case DISP16:
 599                   disp = (buffer[byte] << 8) | (buffer[byte + 1]);
 600                   break;
 601                 case FPIND_D8:
 602                 case DISP8:
 603                   disp = ((char) (buffer[byte]));
 604                   break;
 605                 case RD:
 606                 case RDIND:
 607                   rd = buffer[byte] & 0x7;
 608                   break;
 609                 case ABS24:
 610                   abs =
 611                     (buffer[byte] << 16)
 612                       | (buffer[byte + 1] << 8)
 613                         | (buffer[byte + 2]);
 614                   break;
 615                 case ABS16:
 616                   abs = (buffer[byte] << 8) | (buffer[byte + 1]);
 617                   break;
 618                 case ABS8:
 619                   abs = (buffer[byte]);
 620                   break;
 621                 case IMM16:
 622                   imm = (buffer[byte] << 8) | (buffer[byte + 1]);
 623                   break;
 624                 case IMM4:
 625                   imm = (buffer[byte]) & 0xf;
 626                   break;
 627                 case IMM8:
 628                 case RLIST:
 629                   imm = SEXTCHAR (buffer[byte]);
 630                   break;
 631                 case PCREL16:
 632                   pcrel = SEXTSHORT ((buffer[byte] << 8) | (buffer[byte + 1]));
 633                   break;
 634                 case PCREL8:
 635                   pcrel = SEXTCHAR ((buffer[byte]));
 636                   break;
 637                 case QIM:
 638                   switch (buffer[byte] & 0x7)
 639                     {
 640                     case 0:
 641                       imm = 1;
 642                       break;
 643                     case 1:
 644                       imm = 2;
 645                       break;
 646                     case 4:
 647                       imm = -1;
 648                       break;
 649                     case 5:
 650                       imm = -2;
 651                       break;
 652                     }
 653                   break;
 654
 655                 }
 656             }
 657         }
 658       if (opcode->flavor & O_BYTE)
 659         {
 660           idx = 0;
 661           switch (opcode->flags)
 662             {
 663             case 'h':
 664               dst->flags = flag_shiftbyte;
 665               break;
 666             case 'p':
 667               dst->flags = flag_multbyte;
 668               break;
 669             case 'B':
 670               dst->flags = flag_branch;
 671               break;
 672             case 'm':
 673               dst->flags = flag_mp;
 674               break;
 675             case 'a':
 676               dst->flags = flag_ap;
 677               break;
 678             case '-':
 679               dst->flags = flag_nonep;
 680               break;
 681             case 0:
 682               dst->flags = flag_nostorep;
 683               break;
 684             case 'c':
 685               dst->flags = flag_clearp;
 686               break;
 687             case 's':
 688               /* special */
 689               dst->flags = flag_special;
 690             }
 691         }
 692       else
 693         {
 694           idx = 1;
 695           switch (opcode->flags)
 696             {
 697             case 'h':
 698               dst->flags = flag_shiftword;
 699               break;
 700             case 'p':
 701               dst->flags = flag_multword;
 702               break;
 703             case 'B':
 704               dst->flags = flag_branch;
 705               break;
 706             case 'm':
 707               dst->flags = flag_Mp;
 708               break;
 709             case 'a':
 710               dst->flags = flag_Ap;
 711               break;
 712             case '-':
 713               dst->flags = flag_nonep;
 714               break;
 715             case 0:
 716               dst->flags = flag_nostorep;
 717               break;
 718             case 'c':
 719               dst->flags = flag_clearp;
 720               break;
 721             case 's':
 722               /* special */
 723               dst->flags = flag_special;
 724               break;
 725             }
 726         }
 727
 728       for (i = 0; i < opcode->nargs; i++)
 729         {
 730           ea_type *p = eavector + i;
 731
 732           switch (opcode->arg_type[i])
 733             {
 734             default:
 735               abort ();
 736
 737             case FP:
 738               gotreg (p, 6, idx);
 739               break;
 740             case RNIND:
 741               disp = 0;
 742             case RNIND_D16:
 743             case RNIND_D8:
 744               gotind (p, disp, rn, idx);
 745               break;
 746               break;
 747             case RDIND:
 748               disp = 0;
 749             case RDIND_D16:
 750             case RDIND_D8:
 751               gotind (p, disp, rd, idx);
 752               break;
 753             case FPIND_D8:
 754               gotind (p, disp, 6, idx);
 755               break;
 756             case CRB:
 757             case CRW:
 758               gotcr (p, cr);
 759               break;
 760             case RN:
 761               gotreg (p, rn, idx);
 762               break;
 763             case RD:
 764               gotreg (p, rd, idx);
 765               break;
 766             case RS:
 767               gotreg (p, rs, idx);
 768               break;
 769             case RNDEC:
 770               gotinc (p, rn, -1, idx);
 771               break;
 772             case RNINC:
 773               gotinc (p, rn, 1, idx);
 774               break;
 775             case SPINC:
 776               gotinc (p, 7, 1, idx);
 777               break;
 778             case SPDEC:
 779               gotinc (p, 7, -1, idx);
 780               break;
 781             case ABS24:
 782             case ABS16:
 783               gotabs (p, abs, R_HARD_0, idx);
 784               break;
 785             case ABS8:
 786               gotabs (p, abs, R_HARD8_0, idx);
 787               break;
 788             case IMM16:
 789             case RLIST:
 790             case QIM:
 791             case IMM4:
 792             case IMM8:
 793               gotimm (p, imm);
 794               break;
 795             case PCREL16:
 796             case PCREL8:
 797               gotimm (p,
 798                       ((pcrel + pc + opcode->length) & 0xffff) | (pc & 0xff0000),
 799                       R_HARD_0, JLONG);
 800
 801             }
 802         }
 803
 804       /* Finished and done - turn from two operand stuff into three */
 805
 806       dst->srca.type = eas.s.ea_nop.s.srcabyte;
 807       dst->srcb.type = eas.s.ea_nop.s.srcbbyte;
 808       dst->dst.type = eas.s.ea_nop.s.dstbyte;
 809
 810       if (opcode->nargs)
 811         {
 812           switch (opcode->nargs)
 813             {
 814             case 1:
 815               howto_workout (&dst->srca, &eavector[0], 0);
 816               if (opcode->dst != '!')
 817                 howto_workout (&dst->dst, &eavector[0], 2);
 818               break;
 819             case 2:
 820               if (opcode->src2 == '!')
 821                 {
 822                   howto_workout (&dst->srca, &eavector[0], 0);
 823                   howto_workout (&dst->dst, &eavector[1], 2);
 824                 }
 825               else
 826                 {
 827                   howto_workout (&dst->srca, &eavector[0], 0);
 828                   howto_workout (&dst->srcb, &eavector[1], 1);
 829                   if (opcode->dst != '!')
 830                     {
 831                       howto_workout (&dst->dst, &eavector[1], 2);
 832                     }
 833                 }
 834               break;
 835             }
 836
 837
 838
 839           /* Some extra stuff with pre inc and post dec,
 840              make sure that if the same ea is there twice, only one of the
 841              ops is auto inc/dec */
 842
 843           fix_incdecs (dst);
 844
 845
 846           /* Some special cases */
 847           if (dst->opcode == exec_dispatch[O_PJSR]
 848               || dst->opcode == exec_dispatch[O_PJMP])
 849             {
 850               /* Both the @abs:24 and @rn turn into a disp word,
 851                  chose the right a mode since  @abs:24 is 4 bytes
 852                  long */
 853
 854               if (opcode->length == 4)
 855                 {
 856                   dst->srca.type = eas.s.ea_lval24.s.srcabyte;
 857                 }
 858               else
 859                 {
 860                   dst->srca.type = eas.s.ea_reg.s.srcalong;
 861                 }
 862
 863               dst->srca.r2.rptr = &cpu.regs[R_HARD_0];
 864
 865               /* For [P]JSR, keep return address precomputed */
 866               dst->srcb.literal = pc + opcode->length;
 867               dst->srcb.type = eas.s.ea_imm.s.srcbword;
 868             }
 869           else if (dst->opcode == exec_dispatch[O_MULXU])
 870             {
 871               /* This is a multiply -fix the destination op */
 872               if (dst->dst.type == eas.s.ea_reg.s.dstword)
 873                 {
 874                   dst->dst.type = eas.s.ea_reg.s.dstlong;
 875                 }
 876               else
 877                 {
 878                   dst->dst.type = eas.s.ea_reg.s.dstword;
 879                 }
 880               dst->dst.reg.bptr = regptr[rd][JWORD];
 881             }
 882           else if (dst->opcode == exec_dispatch[O_DIVXU])
 883             {
 884               /* This is a wider than normal, fix the source operand */
 885               dst->srcb.type
 886                 = (dst->srcb.type == eas.s.ea_reg.s.srcbword)
 887                   ? eas.s.ea_reg.s.srcblong
 888                     : eas.s.ea_reg.s.srcbword;
 889
 890               dst->dst.type
 891                 = (dst->dst.type == eas.s.ea_reg.s.dstword)
 892                   ? eas.s.ea_reg.s.dstlong
 893                     : eas.s.ea_reg.s.dstword;
 894
 895             }
 896
 897           else if (dst->opcode == exec_dispatch[O_LDM])
 898             {
 899               /* Turn of the stack ref */
 900               dst->srca.type = eas.s.ea_nop.s.srcabyte;
 901             }
 902           else if (dst->opcode == exec_dispatch[O_STM])
 903             {
 904               /* Turn of the stack ref */
 905               dst->srcb.type = eas.s.ea_nop.s.srcbbyte;
 906             }
 907
 908
 909           /* extends read one size and write another */
 910           else if (dst->opcode == exec_dispatch[O_EXTS]
 911                    || dst->opcode == exec_dispatch[O_EXTU])
 912             {
 913               dst->dst.type = eas.s.ea_reg.s.dstword;
 914               dst->dst.reg.bptr = regptr[rd][JWORD];
 915               dst->flags = flag_Ap;
 916             }
 917
 918
 919           if (opcode->flags == 'h')
 920             thinkabout_shifts (dst, opcode->flavor & O_BYTE);
 921
 922
 923           /* For a branch, turn off one level of indirection */
 924           if (opcode->src1 == 'B')
 925             {
 926               indoff (&dst->srca, 0);
 927             }
 928
 929         }
 930       dst->next_pc = pc + opcode->length;
 931
 932       compcycles (dst, opcode);
 933
 934       return;
 935
 936
 937     next:;
 938     }
 939
 940   /* Couldn't understand anything */
 941   dst->opcode = exec_dispatch[O_TRAPA];
 942   dst->next_pc = pc + 1;
 943
 944 }
 945
 946 compile (pc)
 947 {
 948   int idx;
 949
 950   /* find the next cache entry to use */
 951
 952   idx = cpu.cache_top + 1;
 953   cpu.compiles++;
 954   if (idx >= cpu.csize)
 955     {
 956       idx = 1;
 957     }
 958   cpu.cache_top = idx;
 959
 960   /* Throw away its old meaning */
 961   cpu.cache_idx[cpu.cache[idx].oldpc] = 0;
 962
 963   /* set to new address */
 964   cpu.cache[idx].oldpc = pc;
 965
 966   /* fill in instruction info */
 967   find (pc, cpu.memory + pc, cpu.cache + idx);
 968
 969   /* point to new cache entry */
 970   cpu.cache_idx[pc] = idx;
 971 }
 972
 973 baddefault (x)
 974 {
 975   printf ("bad default %d\n", x);
 976 }
 977
 978 static int fetch_l (arg)
 979      ea_type *arg;
 980 {
 981   int l, r;
 982
 983   int h = *(arg->reg.wptr);
 984   r = (union rtype *) (arg->reg.wptr) - &cpu.regs[0];
 985   r++;
 986
 987   l = cpu.regs[r].s[LOW];
 988   return (h << 16) | l;
 989
 990 }
 991
 992 #define FETCH(dst, arg, n)  \
 993 { \
 994  int r; unsigned char*lval; \
 995  DISPATCH((arg).type) \
 996  { LABELN(FETCH_NOP,n): \
 997  dst= 0; \
 998  break; \
 999  DEFAULT baddefault((arg).type); break; \
1000  LABELN(FETCH_LVAL,n):  \
1001  dst = (*(((arg).reg.wptr)) + (arg.literal)) ; \
1002  break; \
1003  LABELN(FETCH_LVAL24,n):  \
1004  dst = (*(((arg).reg.wptr)) + *(((arg).r2.wptr)) + (arg.literal)) &0xffffff; \
1005  break; \
1006  LABELN(FETCH_CRB,n):  \
1007  dst = (*((arg).reg.segptr) - cpu.memory)>>16; \
1008  break; \
1009  LABELN(FETCH_CRW,n):  \
1010   dst = BUILDSR();\
1011  break; \
1012  LABELN(FETCH_REG_B,n): \
1013  dst = *((arg).reg.bptr); \
1014  break; \
1015  LABELN(FETCH_REG_W,n): \
1016  dst = *((arg).reg.wptr); \
1017  break; \
1018  LABELN(FETCH_REG_L,n): \
1019  dst = fetch_l(&(arg));\
1020  break; \
1021  LABELN(FETCH_INC_B,n): \
1022  lval = elval ((arg), 0); \
1023  dst = byteat (lval); \
1024  (*((arg).reg.wptr))++; \
1025  break; \
1026  LABELN(FETCH_INC_W,n): \
1027  lval = elval ((arg), 0); \
1028  dst = wordat (lval); \
1029  (*(((arg).reg.wptr))) += 2; \
1030  break; \
1031  LABELN(FETCH_DEC_B, n): \
1032  (*(arg).reg.wptr)--; \
1033  lval = elval ((arg), 0); \
1034  r = byteat (lval); \
1035  dst = r; \
1036  break; \
1037  LABELN(FETCH_DEC_W, n): \
1038  (*((arg).reg.wptr)) -= 2; \
1039  lval = elval ((arg), 0); \
1040  r = wordat (lval); \
1041  dst = r; \
1042  break; \
1043  LABELN(FETCH_DISP_B,n): \
1044  lval = displval ((arg)); \
1045  dst = byteat (lval); \
1046  break; \
1047  LABELN(FETCH_DISP_W,n): \
1048  lval = displval ((arg)); \
1049  dst = wordat (lval); \
1050  break; \
1051  LABELN(FETCH_IMM, n): \
1052  dst = (arg).literal; \
1053  break; \
1054  } \
1055  ENDDISPATCH; \
1056 }
1057
1058 static union
1059 {
1060   short int i;
1061   struct
1062     {
1063       char low;
1064       char high;
1065     }
1066   u;
1067 }
1068
1069 littleendian;
1070
1071 static
1072 void
1073 init_pointers ()
1074 {
1075   static int init;
1076
1077   if (!init)
1078     {
1079       int i;
1080
1081       init = 1;
1082       littleendian.i = 1;
1083
1084       for (i = 0; i < (int) R_LAST; i++)
1085         {
1086           if (littleendian.u.high)
1087             {
1088               /* big endian host */
1089
1090
1091               LOW = 1;
1092               HIGH = 0;
1093
1094               regptr[i][0] = ((unsigned char *) (cpu.regs + i)) + 3;
1095               regptr[i][1] = ((unsigned char *) (cpu.regs + i)) + 2;
1096             }
1097           else
1098             {
1099               LOW = 0;
1100               HIGH = 1;
1101
1102               regptr[i][0] = (unsigned char *) &(cpu.regs[i]);
1103               regptr[i][1] = (unsigned char *) (&(cpu.regs[i]));
1104             }
1105
1106           regptr[i][2] = (unsigned char *) &(cpu.regs[i]);
1107         }
1108
1109       memcpy (segregptr + 0, regptr + R_SR, sizeof (segregptr[0]));
1110       memcpy (segregptr + 1, regptr + R_TP, sizeof (segregptr[1]));
1111       memcpy (segregptr + 3, regptr + R_BR, sizeof (segregptr[3]));
1112       memcpy (segregptr + 4, regptr + R_EP, sizeof (segregptr[4]));
1113       memcpy (segregptr + 5, regptr + R_DP, sizeof (segregptr[5]));
1114       memcpy (segregptr + 6, regptr + R_CP, sizeof (segregptr[6]));
1115       memcpy (segregptr + 7, regptr + R_TP, sizeof (segregptr[7]));
1116
1117       /* Pointers to into the cpu state for the seg registers */
1118
1119       segmap[R0] = &cpu.regs[R_DP].c;
1120       segmap[R1] = &cpu.regs[R_DP].c;
1121       segmap[R2] = &cpu.regs[R_DP].c;
1122       segmap[R3] = &cpu.regs[R_DP].c;
1123       segmap[R4] = &cpu.regs[R_EP].c;
1124       segmap[R5] = &cpu.regs[R_EP].c;
1125       segmap[R6] = &cpu.regs[R_TP].c;
1126       segmap[R7] = &cpu.regs[R_TP].c;
1127       segmap[R_HARD_0] = &cpu.regs[R_DP].c;
1128       segmap[R_HARD8_0] = &cpu.regs[R_BP].c;
1129
1130       cpu.memory = (unsigned char *) calloc (sizeof (char), H8500_MSIZE);
1131       cpu.cache_idx = (unsigned short *) calloc (sizeof (short), H8500_MSIZE);
1132
1133       /* initialize the seg registers */
1134
1135       cpu.regs[R_DP].c = cpu.memory;
1136       cpu.regs[R_TP].c = cpu.memory;
1137       cpu.regs[R_CP].c = cpu.memory;
1138       cpu.regs[R_BP].c = cpu.memory;
1139       cpu.regs[R_EP].c = cpu.memory;
1140       cpu.regs[R7].s[LOW] = 0xfffe;
1141       cpu.regs[R6].s[LOW] = 0xfffe;
1142       if (!cpu.cache)
1143         sim_set_simcache_size (CSIZE);
1144     }
1145 }
1146
1147 #define PUSHWORD(x)                             \
1148 {                                               \
1149   int sp = cpu.regs[R7].s[LOW];                 \
1150   unsigned char *p;                             \
1151                                                 \
1152   sp -= 2;                                      \
1153   p = (sp & 0xffff) + (cpu.regs[R_TP].c);       \
1154   cpu.regs[R7].s[LOW] = sp;                     \
1155   setwordat (p, x);                             \
1156 }                                               \
1157
1158 #define POPWORD(d)                              \
1159 {                                               \
1160   int spx= cpu.regs[R7].s[LOW];                 \
1161   unsigned char *p;                             \
1162                                                 \
1163   p = (spx& 0xffff) + (cpu.regs[R_TP].c);       \
1164   spx+= 2;                                      \
1165   cpu.regs[R7].s[LOW] = spx;                    \
1166   d = wordat (p);                               \
1167 }                                               \
1168
1169 /* simulate a monitor trap */
1170 trap ()
1171 {
1172   switch (cpu.regs[R3].s[LOW] & 0xff)
1173     {
1174     case 33:
1175       /* exit */
1176       cpu.exception = SIGQUIT;
1177       break;
1178     case 34:
1179       /* abort */
1180       cpu.exception = SIGABRT;
1181       break;
1182     case 6:
1183       /* print char in r0 */
1184       printf ("%c", cpu.regs[R0].s[LOW]);
1185       break;
1186     }
1187 }
1188 void
1189 control_c (sig, code, scp, addr)
1190      int sig;
1191      int code;
1192      char *scp;
1193      char *addr;
1194 {
1195   cpu.exception = SIGINT;
1196 }
1197
1198 static jmp_buf jbuf;
1199 static void
1200 segv ()
1201 {
1202   cpu.exception = SIGSEGV;
1203   longjmp (jbuf, 1);
1204 }
1205
1206 int
1207 sim_stop (sd)
1208      SIM_DESC sd;
1209 {
1210   cpu.exception = SIGINT;
1211   return 1;
1212 }
1213
1214 void
1215 sim_resume (sd, step, siggnal)
1216      SIM_DESC sd;
1217 {
1218   static int init1;
1219   int res;
1220   int tmp;
1221   int arga;
1222   int argb;
1223   int bit;
1224   int pc;
1225   int C, Z, V, N;
1226   int cycles = 0;
1227   int insts = 0;
1228   int tick_start = get_now ();
1229   void (*prev) ();
1230   void (*prev_seg) ();
1231
1232   if (!init1)
1233     {
1234       int i;
1235
1236       init1 = 1;
1237       init_pointers ();
1238
1239       for (i = 0; i < N_EATYPES; i++)
1240         {
1241           eas.a[i].s.srcabyte = LABEL_REFN (FETCH_NOP, 0);
1242           eas.a[i].s.srcaword = LABEL_REFN (FETCH_NOP, 0);
1243           eas.a[i].s.srcalong = LABEL_REFN (FETCH_NOP, 0);
1244
1245           eas.a[i].s.srcbbyte = LABEL_REFN (FETCH_NOP, 1);
1246           eas.a[i].s.srcbword = LABEL_REFN (FETCH_NOP, 1);
1247           eas.a[i].s.srcblong = LABEL_REFN (FETCH_NOP, 1);
1248
1249           eas.a[i].s.dstbyte = LABEL_REF (STORE_NOP);
1250           eas.a[i].s.dstword = LABEL_REF (STORE_NOP);
1251           eas.a[i].s.dstlong = LABEL_REF (STORE_NOP);
1252         }
1253
1254       eas.s.ea_lval.s.srcabyte = LABEL_REFN (FETCH_LVAL, 0);
1255       eas.s.ea_lval.s.srcaword = LABEL_REFN (FETCH_LVAL, 0);
1256       eas.s.ea_lval24.s.srcabyte = LABEL_REFN (FETCH_LVAL24, 0);
1257       eas.s.ea_lval24.s.srcaword = LABEL_REFN (FETCH_LVAL24, 0);
1258
1259       eas.s.ea_nop.s.srcabyte = LABEL_REFN (FETCH_NOP, 0);
1260       eas.s.ea_nop.s.srcaword = LABEL_REFN (FETCH_NOP, 0);
1261       eas.s.ea_nop.s.srcbbyte = LABEL_REFN (FETCH_NOP, 1);
1262       eas.s.ea_nop.s.srcbword = LABEL_REFN (FETCH_NOP, 1);
1263       eas.s.ea_nop.s.dstbyte = LABEL_REF (STORE_NOP);
1264       eas.s.ea_nop.s.dstword = LABEL_REF (STORE_NOP);
1265
1266       eas.s.ea_cr.s.srcabyte = LABEL_REFN (FETCH_CRB, 0);
1267       eas.s.ea_cr.s.srcaword = LABEL_REFN (FETCH_CRW, 0);
1268
1269       eas.s.ea_cr.s.srcbbyte = LABEL_REFN (FETCH_CRB, 1);
1270       eas.s.ea_cr.s.srcbword = LABEL_REFN (FETCH_CRW, 1);
1271
1272       eas.s.ea_cr.s.dstbyte = LABEL_REF (STORE_CRB);
1273       eas.s.ea_cr.s.dstword = LABEL_REF (STORE_CRW);
1274
1275       eas.s.ea_reg.s.srcabyte = LABEL_REFN (FETCH_REG_B, 0);
1276       eas.s.ea_reg.s.srcaword = LABEL_REFN (FETCH_REG_W, 0);
1277       eas.s.ea_reg.s.srcalong = LABEL_REFN (FETCH_REG_L, 0);
1278
1279       eas.s.ea_reg.s.srcbbyte = LABEL_REFN (FETCH_REG_B, 1);
1280       eas.s.ea_reg.s.srcbword = LABEL_REFN (FETCH_REG_W, 1);
1281       eas.s.ea_reg.s.srcblong = LABEL_REFN (FETCH_REG_L, 1);
1282
1283       eas.s.ea_reg.s.dstbyte = LABEL_REF (STORE_REG_B);
1284       eas.s.ea_reg.s.dstword = LABEL_REF (STORE_REG_W);
1285       eas.s.ea_reg.s.dstlong = LABEL_REF (STORE_REG_L);
1286
1287       eas.s.ea_inc.s.srcabyte = LABEL_REFN (FETCH_INC_B, 0);
1288       eas.s.ea_inc.s.srcaword = LABEL_REFN (FETCH_INC_W, 0);
1289       eas.s.ea_inc.s.srcbbyte = LABEL_REFN (FETCH_INC_B, 1);
1290       eas.s.ea_inc.s.srcbword = LABEL_REFN (FETCH_INC_W, 1);
1291       eas.s.ea_inc.s.dstbyte = LABEL_REF (STORE_INC_B);
1292       eas.s.ea_inc.s.dstword = LABEL_REF (STORE_INC_W);
1293
1294       eas.s.ea_dec.s.srcabyte = LABEL_REFN (FETCH_DEC_B, 0);
1295       eas.s.ea_dec.s.srcaword = LABEL_REFN (FETCH_DEC_W, 0);
1296       eas.s.ea_dec.s.srcbbyte = LABEL_REFN (FETCH_DEC_B, 1);
1297       eas.s.ea_dec.s.srcbword = LABEL_REFN (FETCH_DEC_W, 1);
1298       eas.s.ea_dec.s.dstbyte = LABEL_REF (STORE_DEC_B);
1299       eas.s.ea_dec.s.dstword = LABEL_REF (STORE_DEC_W);
1300
1301       eas.s.ea_disp.s.srcabyte = LABEL_REFN (FETCH_DISP_B, 0);
1302       eas.s.ea_disp.s.srcaword = LABEL_REFN (FETCH_DISP_W, 0);
1303       eas.s.ea_disp.s.srcbbyte = LABEL_REFN (FETCH_DISP_B, 1);
1304       eas.s.ea_disp.s.srcbword = LABEL_REFN (FETCH_DISP_W, 1);
1305       eas.s.ea_disp.s.dstbyte = LABEL_REF (STORE_DISP_B);
1306       eas.s.ea_disp.s.dstword = LABEL_REF (STORE_DISP_W);
1307
1308       eas.s.ea_imm.s.srcabyte = LABEL_REFN (FETCH_IMM, 0);
1309       eas.s.ea_imm.s.srcaword = LABEL_REFN (FETCH_IMM, 0);
1310       eas.s.ea_imm.s.srcbbyte = LABEL_REFN (FETCH_IMM, 1);
1311       eas.s.ea_imm.s.srcbword = LABEL_REFN (FETCH_IMM, 1);
1312
1313       flag_special = LABEL_REF (FLAG_special);
1314       flag_mp = LABEL_REF (FLAG_m);
1315       flag_Mp = LABEL_REF (FLAG_M);
1316       flag_ap = LABEL_REF (FLAG_a);
1317       flag_Ap = LABEL_REF (FLAG_A);
1318       flag_nonep = LABEL_REF (FLAG_NONE);
1319       flag_nostorep = LABEL_REF (FLAG_NOSTORE);
1320       flag_clearp = LABEL_REF (FLAG_CLEAR);
1321       flag_shiftbyte = LABEL_REF (FLAG_shiftbyte);
1322       flag_shiftword = LABEL_REF (FLAG_shiftword);
1323       flag_multbyte = LABEL_REF (FLAG_multbyte);
1324       flag_multword = LABEL_REF (FLAG_multword);
1325
1326
1327       exec_dispatch[O_ADDS] = LABEL_REF (O_ADDS);
1328       exec_dispatch[O_ADDX] = LABEL_REF (O_ADDX);
1329       exec_dispatch[O_ADD] = LABEL_REF (O_ADD);
1330       exec_dispatch[O_ANDC] = LABEL_REF (O_ANDC);
1331       exec_dispatch[O_AND] = LABEL_REF (O_AND);
1332       exec_dispatch[O_BCC] = LABEL_REF (O_BCC);
1333       exec_dispatch[O_BCLR] = LABEL_REF (O_BCLR);
1334       exec_dispatch[O_BCS] = LABEL_REF (O_BCS);
1335       exec_dispatch[O_BEQ] = LABEL_REF (O_BEQ);
1336       exec_dispatch[O_BF] = LABEL_REF (O_BF);
1337       exec_dispatch[O_BGE] = LABEL_REF (O_BGE);
1338       exec_dispatch[O_BGT] = LABEL_REF (O_BGT);
1339       exec_dispatch[O_BHI] = LABEL_REF (O_BHI);
1340       exec_dispatch[O_BHS] = LABEL_REF (O_BHS);
1341       exec_dispatch[O_BLE] = LABEL_REF (O_BLE);
1342       exec_dispatch[O_BLO] = LABEL_REF (O_BLO);
1343       exec_dispatch[O_BLS] = LABEL_REF (O_BLS);
1344       exec_dispatch[O_BLT] = LABEL_REF (O_BLT);
1345       exec_dispatch[O_BMI] = LABEL_REF (O_BMI);
1346       exec_dispatch[O_BNE] = LABEL_REF (O_BNE);
1347       exec_dispatch[O_BNOT] = LABEL_REF (O_BNOT);
1348       exec_dispatch[O_BPL] = LABEL_REF (O_BPL);
1349       exec_dispatch[O_BPT] = LABEL_REF (O_BPT);
1350       exec_dispatch[O_BRA] = LABEL_REF (O_BRA);
1351       exec_dispatch[O_BRN] = LABEL_REF (O_BRN);
1352       exec_dispatch[O_BSET] = LABEL_REF (O_BSET);
1353       exec_dispatch[O_BSR] = LABEL_REF (O_BSR);
1354       exec_dispatch[O_BTST] = LABEL_REF (O_BTST);
1355       exec_dispatch[O_BT] = LABEL_REF (O_BT);
1356       exec_dispatch[O_BVC] = LABEL_REF (O_BVC);
1357       exec_dispatch[O_BVS] = LABEL_REF (O_BVS);
1358       exec_dispatch[O_CLR] = LABEL_REF (O_CLR);
1359       exec_dispatch[O_CMP] = LABEL_REF (O_CMP);
1360       exec_dispatch[O_DADD] = LABEL_REF (O_DADD);
1361       exec_dispatch[O_DIVXU] = LABEL_REF (O_DIVXU);
1362       exec_dispatch[O_DSUB] = LABEL_REF (O_DSUB);
1363       exec_dispatch[O_EXTS] = LABEL_REF (O_EXTS);
1364       exec_dispatch[O_EXTU] = LABEL_REF (O_EXTU);
1365       exec_dispatch[O_JMP] = LABEL_REF (O_JMP);
1366       exec_dispatch[O_JSR] = LABEL_REF (O_JSR);
1367       exec_dispatch[O_LDC] = LABEL_REF (O_LDC);
1368       exec_dispatch[O_LDM] = LABEL_REF (O_LDM);
1369       exec_dispatch[O_LINK] = LABEL_REF (O_LINK);
1370       exec_dispatch[O_MOVFPE] = LABEL_REF (O_MOVFPE);
1371       exec_dispatch[O_MOVTPE] = LABEL_REF (O_MOVTPE);
1372       exec_dispatch[O_MOV] = LABEL_REF (O_MOV);
1373       exec_dispatch[O_MULXU] = LABEL_REF (O_MULXU);
1374       exec_dispatch[O_NEG] = LABEL_REF (O_NEG);
1375       exec_dispatch[O_NOP] = LABEL_REF (O_NOP);
1376       exec_dispatch[O_NOT] = LABEL_REF (O_NOT);
1377       exec_dispatch[O_ORC] = LABEL_REF (O_ORC);
1378       exec_dispatch[O_OR] = LABEL_REF (O_OR);
1379       exec_dispatch[O_PJMP] = LABEL_REF (O_PJMP);
1380       exec_dispatch[O_PJSR] = LABEL_REF (O_PJSR);
1381       exec_dispatch[O_PRTD] = LABEL_REF (O_PRTD);
1382       exec_dispatch[O_PRTS] = LABEL_REF (O_PRTS);
1383       exec_dispatch[O_RECOMPILE] = LABEL_REF (O_RECOMPILE);
1384
1385       exec_dispatch[O_ROTL] = LABEL_REF (O_ROTL);
1386       exec_dispatch[O_ROTR] = LABEL_REF (O_ROTR);
1387       exec_dispatch[O_ROTXL] = LABEL_REF (O_ROTXL);
1388       exec_dispatch[O_ROTXR] = LABEL_REF (O_ROTXR);
1389
1390       exec_dispatch[O_RTD] = LABEL_REF (O_RTD);
1391       exec_dispatch[O_RTS] = LABEL_REF (O_RTS);
1392       exec_dispatch[O_SCB_EQ] = LABEL_REF (O_SCB_EQ);
1393       exec_dispatch[O_SCB_F] = LABEL_REF (O_SCB_F);
1394       exec_dispatch[O_SCB_NE] = LABEL_REF (O_SCB_NE);
1395       exec_dispatch[O_SHAL] = LABEL_REF (O_SHAL);
1396       exec_dispatch[O_SHAR] = LABEL_REF (O_SHAR);
1397       exec_dispatch[O_SHLL] = LABEL_REF (O_SHLL);
1398       exec_dispatch[O_SHLR] = LABEL_REF (O_SHLR);
1399
1400       exec_dispatch[O_SLEEP] = LABEL_REF (O_SLEEP);
1401       exec_dispatch[O_STC] = LABEL_REF (O_STC);
1402       exec_dispatch[O_STM] = LABEL_REF (O_STM);
1403       exec_dispatch[O_SUBS] = LABEL_REF (O_SUBS);
1404       exec_dispatch[O_SUBX] = LABEL_REF (O_SUBX);
1405       exec_dispatch[O_SUB] = LABEL_REF (O_SUB);
1406       exec_dispatch[O_SWAP] = LABEL_REF (O_SWAP);
1407       exec_dispatch[O_TAS] = LABEL_REF (O_TAS);
1408       exec_dispatch[O_TRAPA] = LABEL_REF (O_TRAPA);
1409       exec_dispatch[O_TRAP_VS] = LABEL_REF (O_TRAP_VS);
1410       exec_dispatch[O_TST] = LABEL_REF (O_TST);
1411       exec_dispatch[O_UNLK] = LABEL_REF (O_UNLK);
1412       exec_dispatch[O_XCH] = LABEL_REF (O_XCH);
1413       exec_dispatch[O_XORC] = LABEL_REF (O_XORC);
1414       exec_dispatch[O_XOR] = LABEL_REF (O_XOR);
1415       nop.type = eas.s.ea_nop.s.srcabyte;
1416       cpu.cache[0].opcode = exec_dispatch[O_RECOMPILE];
1417       cpu.cache[0].srca.type = eas.s.ea_nop.s.srcabyte;
1418       cpu.cache[0].srcb.type = eas.s.ea_nop.s.srcbbyte;
1419     }
1420
1421   prev = signal (SIGINT, control_c);
1422   prev_seg = signal (SIGSEGV, segv);
1423
1424   if (step)
1425     {
1426       cpu.exception = SIGTRAP;
1427     }
1428   else
1429     {
1430       cpu.exception = 0;
1431     }
1432
1433   pc = cpu.regs[R_PC].s[LOW] + (NORMAL_CP << 16);
1434
1435   GETSR ();
1436
1437   if (setjmp (jbuf) == 0) {
1438     do
1439       {
1440         int cidx;
1441         decoded_inst *code;
1442
1443       top:
1444         cidx = cpu.cache_idx[pc];
1445         code = cpu.cache + cidx;
1446
1447         FETCH (arga, code->srca, 0);
1448         FETCH (argb, code->srcb, 1);
1449
1450
1451
1452 #ifdef DEBUG
1453         if (debug)
1454           {
1455             printf ("%x %d %s\n", pc, code->opcode,
1456                     code->op ? code->op->name : "**");
1457           }
1458 #endif
1459
1460         cycles += code->cycles;
1461         insts++;
1462         DISPATCH (code->opcode)
1463           {
1464             LABEL (O_RECOMPILE):
1465             /* This opcode is a fake for when we get to an instruction which
1466                hasn't been compiled */
1467             compile (pc);
1468             goto top;
1469             break;
1470             LABEL (O_NEG):
1471             arga = -arga;
1472             argb = 0;
1473             res = arga + argb;
1474             break;
1475             LABEL (O_SUBX):
1476             arga += C;
1477             LABEL (O_SUB):
1478             LABEL (O_SUBS):
1479             arga = -arga;
1480             LABEL (O_ADD):
1481             LABEL (O_ADDS):
1482             res = arga + argb;
1483             break;
1484
1485             LABEL (O_ADDX):
1486             res = arga + argb + C;
1487             break;
1488
1489             LABEL (O_AND):
1490             LABEL (O_ANDC):
1491             res = arga & argb;
1492             break;
1493             break;
1494
1495             LABEL (O_BCLR):
1496             arga &= 0xf;
1497             bit = (argb & (1 << arga));
1498             res = argb & ~(1 << arga);
1499             goto bitop;
1500
1501
1502             LABEL (O_BRA):
1503             LABEL (O_BT):
1504             if (1)
1505               goto condtrue;
1506
1507             LABEL (O_BRN):
1508             LABEL (O_BF):
1509             if (0)
1510               goto condtrue;
1511             break;
1512
1513             LABEL (O_BHI):
1514             if ((C || Z) == 0)
1515               goto condtrue;
1516             break;
1517
1518             LABEL (O_BLS):
1519             if ((C || Z))
1520               goto condtrue;
1521             break;
1522
1523             LABEL (O_BCS):
1524             LABEL (O_BLO):
1525             if ((C == 1))
1526               goto condtrue;
1527             break;
1528
1529             LABEL (O_BCC):
1530             LABEL (O_BHS):
1531             if ((C == 0))
1532               goto condtrue;
1533             break;
1534
1535             LABEL (O_BEQ):
1536             if (Z)
1537               goto condtrue;
1538             break;
1539             LABEL (O_BGT):
1540             if (((Z || (N ^ V)) == 0))
1541               goto condtrue;
1542             break;
1543
1544
1545             LABEL (O_BLE):
1546             if (((Z || (N ^ V)) == 1))
1547               goto condtrue;
1548             break;
1549
1550             LABEL (O_BGE):
1551             if ((N ^ V) == 0)
1552               goto condtrue;
1553             break;
1554             LABEL (O_BLT):
1555             if ((N ^ V))
1556               goto condtrue;
1557             break;
1558             LABEL (O_BMI):
1559             if ((N))
1560               goto condtrue;
1561             break;
1562             LABEL (O_BNE):
1563             if ((Z == 0))
1564               goto condtrue;
1565             break;
1566             LABEL (O_BPL):
1567             if (N == 0)
1568               goto condtrue;
1569             break;
1570             break;
1571             LABEL (O_BVC):
1572             if ((V == 0))
1573               goto condtrue;
1574             break;
1575             LABEL (O_BVS):
1576             if ((V == 1))
1577               goto condtrue;
1578             break;
1579
1580             LABEL (O_BNOT):
1581             bit = argb & (1<<(arga & 0xf));
1582             res = argb ^ (1<<(arga & 0xf));
1583             goto bitop;
1584             break;
1585
1586             LABEL (O_BSET):
1587             arga = 1 << (arga & 0xf);
1588             bit = argb & arga;
1589             res = argb | arga;
1590             goto bitop;
1591             break;
1592
1593             LABEL (O_PJMP):
1594             pc = arga;
1595             goto next;
1596
1597             LABEL (O_UNLK):
1598             {
1599               int t;
1600               SET_NORMREG (R7, GET_NORMREG (R6));
1601               POPWORD (t);
1602               SET_NORMREG (R6, t);
1603               pc = code->next_pc;
1604               goto next;
1605             }
1606
1607             LABEL (O_RTS):
1608             {
1609               int cp = pc & 0xff0000;
1610               POPWORD (pc);
1611               pc |= cp;
1612               goto next;
1613             }
1614             break;
1615
1616             LABEL (O_PRTS):
1617             {
1618               int cp;
1619               int off;
1620               POPWORD (cp);
1621               POPWORD (off);
1622               cp <<= 16;
1623               SET_SEGREG (R_CP, cp);
1624               pc = cp + off;
1625             }
1626             goto next;
1627
1628             LABEL (O_PJSR):
1629             PUSHWORD (argb & 0xffff);
1630             PUSHWORD (argb >> 16);
1631             pc = (arga & 0xffffff);
1632             goto next;
1633
1634             LABEL (O_BSR):
1635             LABEL (O_JSR):
1636             PUSHWORD (code->next_pc);
1637             pc = arga | (pc & 0xff0000);
1638             goto next;
1639
1640             LABEL (O_BTST):
1641             Z = (((argb >> (arga & 0xf)) & 1) == 0);
1642             pc = code->next_pc;
1643             goto next;
1644
1645             LABEL (O_CLR):
1646             res = 0;
1647             break;
1648
1649             LABEL (O_CMP):
1650             arga = -arga;
1651             res = arga + argb;
1652             break;
1653
1654             LABEL (O_DADD):
1655             res = arga + argb + C;
1656             if (res > 99)
1657               {
1658                 res -= 100;
1659                 C = 1;
1660               }
1661             else
1662               {
1663                 C = 0;
1664               }
1665             Z = Z && (res == 0);
1666             break;
1667
1668
1669             LABEL (O_DSUB):
1670             res = argb - arga - C;
1671             if (res < 0)
1672               {
1673                 res += 100;
1674                 C = 1;
1675               }
1676             else
1677               {
1678                 C = 0;
1679               }
1680             Z = Z && (res == 0);
1681             break;
1682
1683             LABEL (O_EXTS):
1684             res = SEXTCHAR (arga);
1685             break;
1686
1687             LABEL (O_EXTU):
1688             res = (unsigned char) arga;
1689             break;
1690
1691             LABEL (O_JMP):
1692             pc = arga | (pc & 0xff0000);
1693             goto next;
1694             break;
1695
1696             LABEL (O_LDM):
1697
1698             for (tmp = 0; tmp < 7; tmp++)
1699               {
1700                 if (argb & (1 << tmp))
1701                   {
1702                     POPWORD (cpu.regs[tmp].s[LOW]);
1703                   }
1704               }
1705             if (argb & 0x80)
1706               POPWORD (tmp);    /* dummy ready for sp */
1707             goto nextpc;
1708             break;
1709
1710             LABEL (O_LINK):
1711             PUSHWORD (cpu.regs[R6].s[LOW]);
1712             cpu.regs[R6].s[LOW] = cpu.regs[R7].s[LOW];
1713             cpu.regs[R7].s[LOW] += argb;
1714             goto nextpc;
1715
1716             LABEL (O_STC):
1717             LABEL (O_LDC):
1718             LABEL (O_MOVFPE):
1719             LABEL (O_MOVTPE):
1720             LABEL (O_MOV):
1721             LABEL (O_TST):
1722             res = arga;
1723             break;
1724
1725             LABEL (O_TRAPA):
1726             if (arga == 15)
1727               {
1728                 trap ();
1729               }
1730             else
1731               {
1732                 PUSHWORD (pc & 0xffff);
1733                 if (cpu.maximum)
1734                   {
1735                     PUSHWORD (NORMAL_CP);
1736                   }
1737                 PUSHWORD (NORMAL_SR);
1738                 if (cpu.maximum)
1739                   {
1740                     arga = arga * 4 + 0x40;
1741                     SET_NORMAL_CPPC (longat (cpu.memory + arga));
1742                   }
1743                 else
1744                   {
1745                     arga = arga * 2 + 0x20;
1746                     SET_NORMAL_CPPC (wordat (cpu.memory + arga));
1747                   }
1748               }
1749             break;
1750
1751             LABEL (O_OR):
1752             LABEL (O_ORC):
1753             res = arga | argb;
1754             break;
1755
1756             LABEL (O_XOR):
1757             LABEL (O_XORC):
1758             res = arga ^ argb;
1759             break;
1760
1761             LABEL (O_SCB_F):
1762             {
1763             scb_f:
1764               res = arga - 1;
1765               code->srca.reg.wptr[0] = res;
1766               if (res != -1)
1767                 {
1768                   pc = argb;
1769                   goto next;
1770                 }
1771             }
1772             break;
1773
1774             LABEL (O_SCB_EQ):
1775             if (Z == 1)
1776               break;
1777             else
1778               goto scb_f;
1779
1780             LABEL (O_SCB_NE):
1781             if (Z == 0)
1782               break;
1783             else
1784               goto scb_f;
1785
1786             LABEL (O_NOP):
1787             /* If only they were all as simple as this */
1788             break;
1789
1790             LABEL (O_ROTL):
1791             res = arga << 1;
1792             C = (res >> argb) & 1;
1793             res |= C;
1794             break;
1795
1796
1797             LABEL (O_ROTR):
1798             C = arga & 1;
1799             res = arga >> 1;
1800             res |= (C << (argb - 1));
1801             break;
1802
1803             LABEL (O_ROTXL):
1804             res = arga << 1;
1805             res |= C;
1806             C = (res >> argb) & 1;
1807             break;
1808
1809             LABEL (O_ROTXR):
1810             res = arga >> 1;
1811             res |= (C << (argb - 1));
1812             C = arga & 1;
1813             break;
1814
1815             LABEL (O_SHAL):
1816             res = arga << 1;
1817             if (argb == 16)
1818               {
1819                 C = (res >> (16)) & 1;
1820                 Z = ((res & 0xffff) == 0);
1821                 N = ((res & 0x8000) != 0);
1822               }
1823
1824             else
1825               {
1826                 C = (res >> (8)) & 1;
1827                 Z = ((res & 0xff) == 0);
1828                 N = ((res & 0x80) != 0);
1829
1830               }
1831             V = C ^ N;
1832             goto none;
1833
1834             LABEL (O_SHAR):
1835             C = arga & 1;
1836             if (argb == 16)
1837               {
1838                 res = ((short) arga) >> 1;
1839               }
1840             else
1841               {
1842                 res = (SEXTCHAR (arga)) >> 1;
1843               }
1844             break;
1845
1846             LABEL (O_SHLL):
1847             res = arga << 1;
1848             C = (res >> argb) & 1;
1849             break;
1850
1851             LABEL (O_SHLR):
1852             C = arga & 1;
1853             res = arga >> 1;
1854             break;
1855
1856             LABEL (O_DIVXU):
1857             if (arga == 0)
1858               {
1859                 N = V = C = 0;
1860                 Z = 1;
1861                 cpu.exception = SIGILL;
1862               }
1863             else
1864               {
1865                 int d = argb / arga;
1866                 int m = argb % arga;
1867                 if (code->dst.type == eas.s.ea_reg.s.dstlong)
1868                   {
1869                     res = (m << 16) | (d & 0xffff);
1870                   }
1871                 else
1872                   {
1873                     res = (m << 8) | (d & 0xff);
1874                   }
1875
1876               }
1877             break;
1878
1879             LABEL (O_MULXU):
1880             res = arga * argb;
1881             break;
1882
1883             LABEL (O_NOT):
1884             res = ~arga;
1885             break;
1886
1887             LABEL (O_SWAP):
1888             res = ((arga >> 8) & 0xff) | ((arga << 8) & 0xff00);
1889             break;
1890
1891
1892             LABEL (O_STM):
1893             for (tmp = 7; tmp >= 0; tmp--)
1894               {
1895                 if (arga & (1 << tmp))
1896                   {
1897                     PUSHWORD (cpu.regs[tmp].s[LOW]);
1898                   }
1899               }
1900             goto nextpc;
1901
1902             LABEL (O_TAS):
1903             C = 0;
1904             V = 0;
1905             Z = arga == 0;
1906             N = arga < 0;
1907             res = arga | 0x80;
1908             goto none;
1909
1910             LABEL (O_PRTD):
1911             LABEL (O_XCH):
1912             LABEL (O_RTD):
1913             cpu.exception = SIGILL;
1914             goto next;
1915
1916             LABEL (O_TRAP_VS):
1917             LABEL (O_SLEEP):
1918             LABEL (O_BPT):
1919             cpu.exception = SIGTRAP;
1920             goto next;
1921             break;
1922           }
1923
1924         ENDDISPATCH;
1925
1926         DISPATCH (code->flags)
1927           {
1928           bitop:
1929             Z = (res & bit) == 0;
1930             pc = code->next_pc;
1931             break;
1932             LABEL (FLAG_multword):
1933             Z = (res & 0xffff) == 0;
1934             N = (res & 0x8000) != 0;
1935             V = 0;
1936             C = 0;
1937             pc = code->next_pc;
1938             break;
1939
1940             LABEL (FLAG_multbyte):
1941             /* 8*8 -> 16 */
1942             Z = (res & 0xff) == 0;
1943             N = (res & 0x80) != 0;
1944             V = 0;
1945             C = 0;
1946             pc = code->next_pc;
1947             break;
1948
1949             LABEL (FLAG_shiftword):
1950             N = (res & 0x8000) != 0;
1951             Z = (res & 0xffff) == 0;
1952             V = 0;
1953             pc = code->next_pc;
1954             break;
1955
1956             LABEL (FLAG_shiftbyte):
1957             N = (res & 0x80) != 0;
1958             Z = (res & 0xff) == 0;
1959             V = 0;
1960             pc = code->next_pc;
1961             break;
1962
1963             LABEL (FLAG_special):
1964             pc = code->next_pc;
1965             break;
1966
1967             LABEL (FLAG_m):
1968             /* Move byte flags */
1969             /* after a logical instruction */
1970             N = (res & 0x80) != 0;
1971             Z = (res & 0xff) == 0;
1972             V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
1973             pc = code->next_pc;
1974             break;
1975
1976             LABEL (FLAG_M):
1977             /* Move word flags */
1978             /* after a logical instruction */
1979             N = (res & 0x8000) != 0;
1980             Z = (res & 0xffff) == 0;
1981             V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
1982             pc = code->next_pc;
1983             break;
1984
1985             LABEL (FLAG_a):
1986             /* after byte sized arith */
1987             C = (res & 0x100) != 0;
1988             N = (res & 0x80) != 0;
1989             Z = (res & 0xff) == 0;
1990             V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
1991             pc = code->next_pc;
1992             break;
1993
1994             LABEL (FLAG_A):
1995             /* after word sized arith */
1996             C = (res & 0x10000) != 0;
1997             N = (res & 0x8000) != 0;
1998             Z = (res & 0xffff) == 0;
1999             V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
2000             pc = code->next_pc;
2001             break;
2002
2003             LABEL (FLAG_NONE):
2004           none:;
2005             /* no flags but store */
2006             pc = code->next_pc;
2007             break;
2008             LABEL (FLAG_NOSTORE):
2009             /* no flags and no store */
2010             pc = code->next_pc;
2011             break;
2012             LABEL (FLAG_CLEAR):
2013             /* clear flags */
2014             N = 0;
2015             Z = 1;
2016             V = 0;
2017             C = 0;
2018             pc = code->next_pc;
2019             break;
2020           condtrue:
2021             pc = arga;
2022             goto next;
2023           }
2024         ENDDISPATCH;
2025
2026         DISPATCH (code->dst.type)
2027           {
2028             unsigned char *lval;
2029
2030             LABEL (STORE_CRB):
2031             (*(code->dst.reg.segptr)) = cpu.memory + (res << 16);
2032             break;
2033
2034             LABEL (STORE_NOP):
2035             break;
2036
2037             LABEL (STORE_REG_B):
2038             (*(code->dst.reg.bptr)) = res;
2039             break;
2040
2041             LABEL (STORE_REG_W):
2042             (*(code->dst.reg.wptr)) = res;
2043             break;
2044
2045             LABEL (STORE_REG_L):
2046             {
2047               int l, r;
2048
2049               r = (union rtype *) (code->dst.reg.wptr) - &cpu.regs[0];
2050               r++;
2051               *(code->dst.reg.wptr) = res >> 16;
2052               cpu.regs[r].s[LOW] = res & 0xffff;
2053
2054             }
2055
2056             break;
2057
2058             LABEL (STORE_DISP_W):
2059             lval = displval (code->dst);
2060             setwordat (lval, res);
2061             break;
2062
2063             LABEL (STORE_DISP_B):
2064             lval = displval (code->dst);
2065             setbyteat (lval, res);
2066             break;
2067
2068             LABEL (STORE_INC_B):
2069             lval = elval (code->dst, 0);
2070             setbyteat (lval, res);
2071             (*(code->dst.reg.wptr))++;
2072             break;
2073
2074             LABEL (STORE_INC_W):
2075             lval = elval (code->dst, 0);
2076             setwordat (lval, res);
2077             (*(code->dst.reg.wptr)) += 2;
2078             break;
2079
2080             LABEL (STORE_DEC_B):
2081             (*(code->dst.reg.wptr))--;
2082             lval = elval (code->dst, 0);
2083             setbyteat (lval, res);
2084             break;
2085
2086             LABEL (STORE_CRW):
2087             /* Make an up to date sr from the flag state */
2088             cpu.regs[R_SR].s[LOW] = res;
2089             GETSR ();
2090             break;
2091
2092             LABEL (STORE_DEC_W):
2093             (*(code->dst.reg.wptr)) -= 2;
2094             lval = elval (code->dst, 0);
2095             setwordat (lval, res);
2096
2097             break;
2098
2099           nextpc:
2100             pc = code->next_pc;
2101
2102           }
2103         ENDDISPATCH;
2104       next:;
2105       }
2106     while (!cpu.exception);
2107   }
2108
2109   cpu.ticks += get_now () - tick_start;
2110   cpu.cycles += cycles;
2111   cpu.insts += insts;
2112   cpu.regs[R_PC].s[LOW] = pc;
2113   BUILDSR ();
2114
2115   signal (SIGINT, prev);
2116   signal (SIGSEGV, prev_seg);
2117 }
2118
2119
2120
2121
2122 int
2123 sim_write (sd, addr, buffer, size)
2124      SIM_DESC sd;
2125      SIM_ADDR addr;
2126      unsigned char *buffer;
2127      int size;
2128 {
2129   int i;
2130
2131   init_pointers ();
2132   if (addr < 0 || addr + size > H8500_MSIZE)
2133     return 0;
2134   for (i = 0; i < size; i++)
2135     {
2136       cpu.memory[addr + i] = buffer[i];
2137       cpu.cache_idx[addr + i] = 0;
2138     }
2139   return size;
2140 }
2141
2142 int
2143 sim_read (sd, addr, buffer, size)
2144      SIM_DESC sd;
2145      SIM_ADDR addr;
2146      unsigned char *buffer;
2147      int size;
2148 {
2149   init_pointers ();
2150   if (addr < 0 || addr + size > H8500_MSIZE)
2151     return 0;
2152   memcpy (buffer, cpu.memory + addr, size);
2153   return size;
2154 }
2155
2156 /* Ripped off from tm-h8500.h */
2157
2158 #define R0_REGNUM       0
2159 #define R1_REGNUM       1
2160 #define R2_REGNUM       2
2161 #define R3_REGNUM       3
2162 #define R4_REGNUM       4
2163 #define R5_REGNUM       5
2164 #define R6_REGNUM       6
2165 #define R7_REGNUM       7
2166
2167 /* As above, but with correct seg register glued on */
2168 #define PR0_REGNUM      8
2169 #define PR1_REGNUM      9
2170 #define PR2_REGNUM      10
2171 #define PR3_REGNUM      11
2172 #define PR4_REGNUM      12
2173 #define PR5_REGNUM      13
2174 #define PR6_REGNUM      14
2175 #define PR7_REGNUM      15
2176
2177 #define SP_REGNUM       PR7_REGNUM      /* Contains address of top of stack */
2178 #define FP_REGNUM       PR6_REGNUM      /* Contains address of executing stack frame */
2179
2180
2181 #define SEG_C_REGNUM    16      /* Segment registers */
2182 #define SEG_D_REGNUM    17
2183 #define SEG_E_REGNUM    18
2184 #define SEG_T_REGNUM    19
2185
2186 #define CCR_REGNUM      20      /* Contains processor status */
2187 #define PC_REGNUM       21      /* Contains program counter */
2188
2189 #define CYCLE_REGNUM    22
2190 #define INST_REGNUM     23
2191 #define TICK_REGNUM     24
2192
2193 int
2194 sim_store_register (sd, rn, value, length)
2195      SIM_DESC sd;
2196      int rn;
2197      unsigned char *value;
2198      int length;
2199 {
2200   int seg = 0;
2201   int reg = -1;
2202
2203   init_pointers ();
2204   switch (rn)
2205     {
2206     case PC_REGNUM:
2207       SET_SEGREG (R_CP, (value[1]<<16));
2208       cpu.regs[R_PC].s[LOW] = (value[2] << 8) | value[3];
2209       break;
2210     case SEG_C_REGNUM:
2211     case SEG_D_REGNUM:
2212     case SEG_E_REGNUM:
2213     case SEG_T_REGNUM:
2214       seg = rn - SEG_C_REGNUM + R_CP;
2215       reg = -1;
2216       break;
2217     default:
2218       abort ();
2219     case R0_REGNUM:
2220     case R1_REGNUM:
2221     case R2_REGNUM:
2222     case R3_REGNUM:
2223     case R4_REGNUM:
2224     case R5_REGNUM:
2225     case R6_REGNUM:
2226     case R7_REGNUM:
2227       seg = 0;
2228       reg = rn - R0_REGNUM;
2229       break;
2230     case CCR_REGNUM:
2231       seg = 0;
2232       reg = R_SR;
2233       break;
2234     case CYCLE_REGNUM:
2235       cpu.cycles = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
2236       return;
2237     case INST_REGNUM:
2238       cpu.insts = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
2239       return;
2240     case TICK_REGNUM:
2241       cpu.ticks = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
2242       return;
2243     case PR0_REGNUM:
2244     case PR1_REGNUM:
2245     case PR2_REGNUM:
2246     case PR3_REGNUM:
2247     case PR4_REGNUM:
2248     case PR5_REGNUM:
2249     case PR6_REGNUM:
2250     case PR7_REGNUM:
2251       SET_SEGREG (segforreg[rn], value[1]);
2252       reg = rn - PR0_REGNUM;
2253       cpu.regs[reg].s[LOW] = (value[2] << 8) | value[3];
2254       return;
2255     }
2256
2257   if (seg)
2258     SET_SEGREG (seg, value[0] << 16);
2259
2260   if (reg > 0)
2261     {
2262       cpu.regs[reg].s[LOW] = (value[0] << 8) | value[1];
2263     }
2264   return -1;
2265 }
2266
2267 int
2268 sim_fetch_register (sd, rn, buf, length)
2269      SIM_DESC sd;
2270      int rn;
2271      unsigned char *buf;
2272      int length;
2273 {
2274   init_pointers ();
2275
2276   switch (rn)
2277     {
2278     default:
2279       abort ();
2280     case SEG_C_REGNUM:
2281     case SEG_D_REGNUM:
2282     case SEG_E_REGNUM:
2283     case SEG_T_REGNUM:
2284       buf[0] = GET_SEGREG(rn - SEG_C_REGNUM + R_CP);
2285       break;
2286     case CCR_REGNUM:
2287       buf[0] = cpu.regs[R_SR].s[HIGH];
2288       buf[1] = cpu.regs[R_SR].s[LOW];
2289       break;
2290     case PC_REGNUM:
2291       buf[0] = 0;
2292       buf[1] = GET_SEGREG(R_CP);
2293       buf[2] = HIGH_BYTE (cpu.regs[R_PC].s[LOW]);
2294       buf[3] = LOW_BYTE (cpu.regs[R_PC].s[LOW]);
2295       break;
2296
2297     case PR0_REGNUM:
2298     case PR1_REGNUM:
2299     case PR2_REGNUM:
2300     case PR3_REGNUM:
2301     case PR4_REGNUM:
2302     case PR5_REGNUM:
2303     case PR6_REGNUM:
2304     case PR7_REGNUM:
2305       rn -= PR0_REGNUM;
2306       buf[0] = 0;
2307       buf[1] = GET_SEGREG(segforreg[rn]);
2308       buf[2] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
2309       buf[3] = LOW_BYTE (cpu.regs[rn].s[LOW]);
2310       break;
2311     case R0_REGNUM:
2312     case R1_REGNUM:
2313     case R2_REGNUM:
2314     case R3_REGNUM:
2315     case R4_REGNUM:
2316     case R5_REGNUM:
2317     case R6_REGNUM:
2318     case R7_REGNUM:
2319       buf[0] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
2320       buf[1] = LOW_BYTE (cpu.regs[rn].s[LOW]);
2321       break;
2322     case CYCLE_REGNUM:
2323       buf[0] = cpu.cycles >> 24;
2324       buf[1] = cpu.cycles >> 16;
2325       buf[2] = cpu.cycles >> 8;
2326       buf[3] = cpu.cycles >> 0;
2327       break;
2328
2329     case TICK_REGNUM:
2330       buf[0] = cpu.ticks >> 24;
2331       buf[1] = cpu.ticks >> 16;
2332       buf[2] = cpu.ticks >> 8;
2333       buf[3] = cpu.ticks >> 0;
2334       break;
2335
2336     case INST_REGNUM:
2337       buf[0] = cpu.insts >> 24;
2338       buf[1] = cpu.insts >> 16;
2339       buf[2] = cpu.insts >> 8;
2340       buf[3] = cpu.insts >> 0;
2341       break;
2342     }
2343   return -1;
2344 }
2345
2346 int
2347 sim_trace (sd)
2348      SIM_DESC sd;
2349 {
2350
2351   int i;
2352
2353   for (i = 0; i < 12; i += 2)
2354     {
2355       unsigned char *p = cpu.regs[R_TP].c + ((cpu.regs[R6].s[LOW] + i) & 0xffff);
2356       unsigned short *j = (unsigned short *) p;
2357
2358       printf ("%04x ", *j);
2359     }
2360   printf ("\n");
2361   printf ("%02x %02x %02x %02x:%04x %04x %04x %04x %04x %04x %04x %04x %04x\n",
2362           NORMAL_DP,
2363           NORMAL_EP,
2364           NORMAL_TP,
2365           NORMAL_CP,
2366           cpu.regs[R_PC].s[LOW],
2367           cpu.regs[0].s[LOW],
2368           cpu.regs[1].s[LOW],
2369           cpu.regs[2].s[LOW],
2370           cpu.regs[3].s[LOW],
2371           cpu.regs[4].s[LOW],
2372           cpu.regs[5].s[LOW],
2373           cpu.regs[6].s[LOW],
2374           cpu.regs[7].s[LOW]);
2375   sim_resume (sd, 1, 0);
2376   return 0;
2377 }
2378
2379 void
2380 sim_stop_reason (sd, reason, sigrc)
2381      SIM_DESC sd;
2382      enum sim_stop *reason;
2383      int *sigrc;
2384 {
2385   *reason = sim_stopped;
2386   *sigrc = cpu.exception;
2387 }
2388
2389 void
2390 sim_set_simcache_size (n)
2391 {
2392   if (cpu.cache)
2393     free (cpu.cache);
2394   if (n < 2)
2395     n = 2;
2396   cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
2397   cpu.csize = n;
2398 }
2399
2400 void
2401 sim_size (n)
2402      int n;
2403 {
2404   /* Fixed size.  */
2405 }
2406
2407 void
2408 sim_info (sd, verbose)
2409      SIM_DESC sd;
2410      int verbose;
2411 {
2412   double timetaken = (double) cpu.ticks / (double) now_persec ();
2413   double virttime = cpu.cycles / 10.0e6;
2414
2415   (*sim_callback->printf_filtered) (sim_callback,
2416                                     "\n\ninstructions executed  %10d\n",
2417                                     cpu.insts);
2418   (*sim_callback->printf_filtered) (sim_callback,
2419                                     "cycles (v approximate) %10d\n",
2420                                     cpu.cycles);
2421   (*sim_callback->printf_filtered) (sim_callback,
2422                                     "real time taken        %10.4f\n",
2423                                     timetaken);
2424   (*sim_callback->printf_filtered) (sim_callback,
2425                                     "virtual time taked     %10.4f\n",
2426                                     virttime);
2427   if (timetaken)
2428     {
2429       (*sim_callback->printf_filtered) (sim_callback,
2430                                         "simulation ratio       %10.4f\n",
2431                                         virttime / timetaken);
2432     }
2433
2434   (*sim_callback->printf_filtered) (sim_callback,
2435                                     "compiles               %10d\n",
2436                                     cpu.compiles);
2437   (*sim_callback->printf_filtered) (sim_callback,
2438                                     "cache size             %10d\n",
2439                                     cpu.csize);
2440 }
2441
2442 SIM_DESC
2443 sim_open (kind, cb, abfd, argv)
2444      SIM_OPEN_KIND kind;
2445      host_callback *cb;
2446      struct _bfd *abfd;
2447      char **argv;
2448 {
2449   sim_kind = kind;
2450   myname = argv[0];
2451   sim_callback = cb;
2452   /* fudge our descriptor */
2453   return (SIM_DESC) 1;
2454 }
2455
2456 void
2457 sim_close (sd, quitting)
2458      SIM_DESC sd;
2459      int quitting;
2460 {
2461   /* nothing to do */
2462 }
2463
2464 SIM_RC
2465 sim_load (sd, prog, abfd, from_tty)
2466      SIM_DESC sd;
2467      char *prog;
2468      bfd *abfd;
2469      int from_tty;
2470 {
2471   extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
2472   bfd *prog_bfd;
2473
2474   prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
2475                             sim_kind == SIM_OPEN_DEBUG,
2476                             0, sim_write);
2477   if (prog_bfd == NULL)
2478     return SIM_RC_FAIL;
2479   if (abfd == NULL)
2480     bfd_close (prog_bfd);
2481   return SIM_RC_OK;
2482 }
2483
2484 SIM_RC
2485 sim_create_inferior (sd, abfd, argv, env)
2486      SIM_DESC sd;
2487      struct _bfd *abfd;
2488      char **argv;
2489      char **env;
2490 {
2491   int pc;
2492   bfd_vma start_address;
2493   if (abfd != NULL)
2494     start_address = bfd_get_start_address (abfd);
2495   else
2496     start_address = 0;
2497
2498   /* ??? We assume this is a 4 byte quantity.  */
2499   pc = start_address;
2500
2501   sim_store_register (sd, PC_REGNUM, (unsigned char *) &pc, 4);
2502   return SIM_RC_OK;
2503 }
2504
2505 void
2506 sim_do_command (sd, cmd)
2507      SIM_DESC sd;
2508      char *cmd;
2509 {
2510   (*sim_callback->printf_filtered) (sim_callback,
2511                                     "This simulator does not accept any commands.\n");
2512 }
2513
2514 void
2515 sim_set_callbacks (ptr)
2516      struct host_callback_struct *ptr;
2517 {
2518   sim_callback = ptr;
2519 }