sim/i960/decode.h

   1 /* Decode header for i960base.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifndef I960BASE_DECODE_H
  26 #define I960BASE_DECODE_H
  27
  28 extern const IDESC *i960base_decode (SIM_CPU *, IADDR,
  29                                   CGEN_INSN_INT,
  30                                   ARGBUF *);
  31 extern void i960base_init_idesc_table (SIM_CPU *);
  32
  33 /* Enum declaration for instructions in cpu family i960base.  */
  34 typedef enum i960base_insn_type {
  35   I960BASE_INSN_X_INVALID, I960BASE_INSN_X_AFTER, I960BASE_INSN_X_BEFORE, I960BASE_INSN_X_CTI_CHAIN
  36  , I960BASE_INSN_X_CHAIN, I960BASE_INSN_X_BEGIN, I960BASE_INSN_MULO, I960BASE_INSN_MULO1
  37  , I960BASE_INSN_MULO2, I960BASE_INSN_MULO3, I960BASE_INSN_REMO, I960BASE_INSN_REMO1
  38  , I960BASE_INSN_REMO2, I960BASE_INSN_REMO3, I960BASE_INSN_DIVO, I960BASE_INSN_DIVO1
  39  , I960BASE_INSN_DIVO2, I960BASE_INSN_DIVO3, I960BASE_INSN_REMI, I960BASE_INSN_REMI1
  40  , I960BASE_INSN_REMI2, I960BASE_INSN_REMI3, I960BASE_INSN_DIVI, I960BASE_INSN_DIVI1
  41  , I960BASE_INSN_DIVI2, I960BASE_INSN_DIVI3, I960BASE_INSN_ADDO, I960BASE_INSN_ADDO1
  42  , I960BASE_INSN_ADDO2, I960BASE_INSN_ADDO3, I960BASE_INSN_SUBO, I960BASE_INSN_SUBO1
  43  , I960BASE_INSN_SUBO2, I960BASE_INSN_SUBO3, I960BASE_INSN_NOTBIT, I960BASE_INSN_NOTBIT1
  44  , I960BASE_INSN_NOTBIT2, I960BASE_INSN_NOTBIT3, I960BASE_INSN_AND, I960BASE_INSN_AND1
  45  , I960BASE_INSN_AND2, I960BASE_INSN_AND3, I960BASE_INSN_ANDNOT, I960BASE_INSN_ANDNOT1
  46  , I960BASE_INSN_ANDNOT2, I960BASE_INSN_ANDNOT3, I960BASE_INSN_SETBIT, I960BASE_INSN_SETBIT1
  47  , I960BASE_INSN_SETBIT2, I960BASE_INSN_SETBIT3, I960BASE_INSN_NOTAND, I960BASE_INSN_NOTAND1
  48  , I960BASE_INSN_NOTAND2, I960BASE_INSN_NOTAND3, I960BASE_INSN_XOR, I960BASE_INSN_XOR1
  49  , I960BASE_INSN_XOR2, I960BASE_INSN_XOR3, I960BASE_INSN_OR, I960BASE_INSN_OR1
  50  , I960BASE_INSN_OR2, I960BASE_INSN_OR3, I960BASE_INSN_NOR, I960BASE_INSN_NOR1
  51  , I960BASE_INSN_NOR2, I960BASE_INSN_NOR3, I960BASE_INSN_NOT, I960BASE_INSN_NOT1
  52  , I960BASE_INSN_NOT2, I960BASE_INSN_NOT3, I960BASE_INSN_CLRBIT, I960BASE_INSN_CLRBIT1
  53  , I960BASE_INSN_CLRBIT2, I960BASE_INSN_CLRBIT3, I960BASE_INSN_SHLO, I960BASE_INSN_SHLO1
  54  , I960BASE_INSN_SHLO2, I960BASE_INSN_SHLO3, I960BASE_INSN_SHRO, I960BASE_INSN_SHRO1
  55  , I960BASE_INSN_SHRO2, I960BASE_INSN_SHRO3, I960BASE_INSN_SHLI, I960BASE_INSN_SHLI1
  56  , I960BASE_INSN_SHLI2, I960BASE_INSN_SHLI3, I960BASE_INSN_SHRI, I960BASE_INSN_SHRI1
  57  , I960BASE_INSN_SHRI2, I960BASE_INSN_SHRI3, I960BASE_INSN_EMUL, I960BASE_INSN_EMUL1
  58  , I960BASE_INSN_EMUL2, I960BASE_INSN_EMUL3, I960BASE_INSN_MOV, I960BASE_INSN_MOV1
  59  , I960BASE_INSN_MOVL, I960BASE_INSN_MOVL1, I960BASE_INSN_MOVT, I960BASE_INSN_MOVT1
  60  , I960BASE_INSN_MOVQ, I960BASE_INSN_MOVQ1, I960BASE_INSN_MODPC, I960BASE_INSN_MODAC
  61  , I960BASE_INSN_LDA_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT_INDEX
  62  , I960BASE_INSN_LDA_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP
  63  , I960BASE_INSN_LD_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT_INDEX
  64  , I960BASE_INSN_LD_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP
  65  , I960BASE_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT_INDEX
  66  , I960BASE_INSN_LDOB_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP
  67  , I960BASE_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT_INDEX
  68  , I960BASE_INSN_LDOS_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP
  69  , I960BASE_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT_INDEX
  70  , I960BASE_INSN_LDIB_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP
  71  , I960BASE_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT_INDEX
  72  , I960BASE_INSN_LDIS_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP
  73  , I960BASE_INSN_LDL_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT_INDEX
  74  , I960BASE_INSN_LDL_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP
  75  , I960BASE_INSN_LDT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT_INDEX
  76  , I960BASE_INSN_LDT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP
  77  , I960BASE_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT_INDEX
  78  , I960BASE_INSN_LDQ_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP
  79  , I960BASE_INSN_ST_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT_INDEX
  80  , I960BASE_INSN_ST_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP
  81  , I960BASE_INSN_STOB_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT_INDEX
  82  , I960BASE_INSN_STOB_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP
  83  , I960BASE_INSN_STOS_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT_INDEX
  84  , I960BASE_INSN_STOS_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP
  85  , I960BASE_INSN_STL_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT_INDEX
  86  , I960BASE_INSN_STL_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP
  87  , I960BASE_INSN_STT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT_INDEX
  88  , I960BASE_INSN_STT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP
  89  , I960BASE_INSN_STQ_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT_INDEX
  90  , I960BASE_INSN_STQ_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP
  91  , I960BASE_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_LIT
  92  , I960BASE_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_LIT
  93  , I960BASE_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_LIT
  94  , I960BASE_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_LIT
  95  , I960BASE_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_LIT
  96  , I960BASE_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_LIT
  97  , I960BASE_INSN_BBC_REG, I960BASE_INSN_BBC_LIT, I960BASE_INSN_BBS_REG, I960BASE_INSN_BBS_LIT
  98  , I960BASE_INSN_CMPI, I960BASE_INSN_CMPI1, I960BASE_INSN_CMPI2, I960BASE_INSN_CMPI3
  99  , I960BASE_INSN_CMPO, I960BASE_INSN_CMPO1, I960BASE_INSN_CMPO2, I960BASE_INSN_CMPO3
 100  , I960BASE_INSN_TESTNO_REG, I960BASE_INSN_TESTG_REG, I960BASE_INSN_TESTE_REG, I960BASE_INSN_TESTGE_REG
 101  , I960BASE_INSN_TESTL_REG, I960BASE_INSN_TESTNE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_INSN_TESTO_REG
 102  , I960BASE_INSN_BNO, I960BASE_INSN_BG, I960BASE_INSN_BE, I960BASE_INSN_BGE
 103  , I960BASE_INSN_BL, I960BASE_INSN_BNE, I960BASE_INSN_BLE, I960BASE_INSN_BO
 104  , I960BASE_INSN_B, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT_INDEX
 105  , I960BASE_INSN_BX_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_INSN_CALLX_INDIRECT
 106  , I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_RET, I960BASE_INSN_CALLS, I960BASE_INSN_FMARK
 107  , I960BASE_INSN_FLUSHREG, I960BASE_INSN_MAX
 108 } I960BASE_INSN_TYPE;
 109
 110 #if ! WITH_SEM_SWITCH_FULL
 111 #define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (i960base,_sem_,fn);
 112 #else
 113 #define SEMFULL(fn)
 114 #endif
 115
 116 #if ! WITH_SEM_SWITCH_FAST
 117 #define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (i960base,_semf_,fn);
 118 #else
 119 #define SEMFAST(fn)
 120 #endif
 121
 122 #define SEM(fn) SEMFULL (fn) SEMFAST (fn)
 123
 124 /* The function version of the before/after handlers is always needed,
 125    so we always want the SEMFULL declaration of them.  */
 126 extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_before);
 127 extern SEMANTIC_FN CONCAT3 (i960base,_sem_,x_after);
 128
 129 SEM (x_invalid)
 130 SEM (x_after)
 131 SEM (x_before)
 132 SEM (x_cti_chain)
 133 SEM (x_chain)
 134 SEM (x_begin)
 135 SEM (mulo)
 136 SEM (mulo1)
 137 SEM (mulo2)
 138 SEM (mulo3)
 139 SEM (remo)
 140 SEM (remo1)
 141 SEM (remo2)
 142 SEM (remo3)
 143 SEM (divo)
 144 SEM (divo1)
 145 SEM (divo2)
 146 SEM (divo3)
 147 SEM (remi)
 148 SEM (remi1)
 149 SEM (remi2)
 150 SEM (remi3)
 151 SEM (divi)
 152 SEM (divi1)
 153 SEM (divi2)
 154 SEM (divi3)
 155 SEM (addo)
 156 SEM (addo1)
 157 SEM (addo2)
 158 SEM (addo3)
 159 SEM (subo)
 160 SEM (subo1)
 161 SEM (subo2)
 162 SEM (subo3)
 163 SEM (notbit)
 164 SEM (notbit1)
 165 SEM (notbit2)
 166 SEM (notbit3)
 167 SEM (and)
 168 SEM (and1)
 169 SEM (and2)
 170 SEM (and3)
 171 SEM (andnot)
 172 SEM (andnot1)
 173 SEM (andnot2)
 174 SEM (andnot3)
 175 SEM (setbit)
 176 SEM (setbit1)
 177 SEM (setbit2)
 178 SEM (setbit3)
 179 SEM (notand)
 180 SEM (notand1)
 181 SEM (notand2)
 182 SEM (notand3)
 183 SEM (xor)
 184 SEM (xor1)
 185 SEM (xor2)
 186 SEM (xor3)
 187 SEM (or)
 188 SEM (or1)
 189 SEM (or2)
 190 SEM (or3)
 191 SEM (nor)
 192 SEM (nor1)
 193 SEM (nor2)
 194 SEM (nor3)
 195 SEM (not)
 196 SEM (not1)
 197 SEM (not2)
 198 SEM (not3)
 199 SEM (clrbit)
 200 SEM (clrbit1)
 201 SEM (clrbit2)
 202 SEM (clrbit3)
 203 SEM (shlo)
 204 SEM (shlo1)
 205 SEM (shlo2)
 206 SEM (shlo3)
 207 SEM (shro)
 208 SEM (shro1)
 209 SEM (shro2)
 210 SEM (shro3)
 211 SEM (shli)
 212 SEM (shli1)
 213 SEM (shli2)
 214 SEM (shli3)
 215 SEM (shri)
 216 SEM (shri1)
 217 SEM (shri2)
 218 SEM (shri3)
 219 SEM (emul)
 220 SEM (emul1)
 221 SEM (emul2)
 222 SEM (emul3)
 223 SEM (mov)
 224 SEM (mov1)
 225 SEM (movl)
 226 SEM (movl1)
 227 SEM (movt)
 228 SEM (movt1)
 229 SEM (movq)
 230 SEM (movq1)
 231 SEM (modpc)
 232 SEM (modac)
 233 SEM (lda_offset)
 234 SEM (lda_indirect_offset)
 235 SEM (lda_indirect)
 236 SEM (lda_indirect_index)
 237 SEM (lda_disp)
 238 SEM (lda_indirect_disp)
 239 SEM (lda_index_disp)
 240 SEM (lda_indirect_index_disp)
 241 SEM (ld_offset)
 242 SEM (ld_indirect_offset)
 243 SEM (ld_indirect)
 244 SEM (ld_indirect_index)
 245 SEM (ld_disp)
 246 SEM (ld_indirect_disp)
 247 SEM (ld_index_disp)
 248 SEM (ld_indirect_index_disp)
 249 SEM (ldob_offset)
 250 SEM (ldob_indirect_offset)
 251 SEM (ldob_indirect)
 252 SEM (ldob_indirect_index)
 253 SEM (ldob_disp)
 254 SEM (ldob_indirect_disp)
 255 SEM (ldob_index_disp)
 256 SEM (ldob_indirect_index_disp)
 257 SEM (ldos_offset)
 258 SEM (ldos_indirect_offset)
 259 SEM (ldos_indirect)
 260 SEM (ldos_indirect_index)
 261 SEM (ldos_disp)
 262 SEM (ldos_indirect_disp)
 263 SEM (ldos_index_disp)
 264 SEM (ldos_indirect_index_disp)
 265 SEM (ldib_offset)
 266 SEM (ldib_indirect_offset)
 267 SEM (ldib_indirect)
 268 SEM (ldib_indirect_index)
 269 SEM (ldib_disp)
 270 SEM (ldib_indirect_disp)
 271 SEM (ldib_index_disp)
 272 SEM (ldib_indirect_index_disp)
 273 SEM (ldis_offset)
 274 SEM (ldis_indirect_offset)
 275 SEM (ldis_indirect)
 276 SEM (ldis_indirect_index)
 277 SEM (ldis_disp)
 278 SEM (ldis_indirect_disp)
 279 SEM (ldis_index_disp)
 280 SEM (ldis_indirect_index_disp)
 281 SEM (ldl_offset)
 282 SEM (ldl_indirect_offset)
 283 SEM (ldl_indirect)
 284 SEM (ldl_indirect_index)
 285 SEM (ldl_disp)
 286 SEM (ldl_indirect_disp)
 287 SEM (ldl_index_disp)
 288 SEM (ldl_indirect_index_disp)
 289 SEM (ldt_offset)
 290 SEM (ldt_indirect_offset)
 291 SEM (ldt_indirect)
 292 SEM (ldt_indirect_index)
 293 SEM (ldt_disp)
 294 SEM (ldt_indirect_disp)
 295 SEM (ldt_index_disp)
 296 SEM (ldt_indirect_index_disp)
 297 SEM (ldq_offset)
 298 SEM (ldq_indirect_offset)
 299 SEM (ldq_indirect)
 300 SEM (ldq_indirect_index)
 301 SEM (ldq_disp)
 302 SEM (ldq_indirect_disp)
 303 SEM (ldq_index_disp)
 304 SEM (ldq_indirect_index_disp)
 305 SEM (st_offset)
 306 SEM (st_indirect_offset)
 307 SEM (st_indirect)
 308 SEM (st_indirect_index)
 309 SEM (st_disp)
 310 SEM (st_indirect_disp)
 311 SEM (st_index_disp)
 312 SEM (st_indirect_index_disp)
 313 SEM (stob_offset)
 314 SEM (stob_indirect_offset)
 315 SEM (stob_indirect)
 316 SEM (stob_indirect_index)
 317 SEM (stob_disp)
 318 SEM (stob_indirect_disp)
 319 SEM (stob_index_disp)
 320 SEM (stob_indirect_index_disp)
 321 SEM (stos_offset)
 322 SEM (stos_indirect_offset)
 323 SEM (stos_indirect)
 324 SEM (stos_indirect_index)
 325 SEM (stos_disp)
 326 SEM (stos_indirect_disp)
 327 SEM (stos_index_disp)
 328 SEM (stos_indirect_index_disp)
 329 SEM (stl_offset)
 330 SEM (stl_indirect_offset)
 331 SEM (stl_indirect)
 332 SEM (stl_indirect_index)
 333 SEM (stl_disp)
 334 SEM (stl_indirect_disp)
 335 SEM (stl_index_disp)
 336 SEM (stl_indirect_index_disp)
 337 SEM (stt_offset)
 338 SEM (stt_indirect_offset)
 339 SEM (stt_indirect)
 340 SEM (stt_indirect_index)
 341 SEM (stt_disp)
 342 SEM (stt_indirect_disp)
 343 SEM (stt_index_disp)
 344 SEM (stt_indirect_index_disp)
 345 SEM (stq_offset)
 346 SEM (stq_indirect_offset)
 347 SEM (stq_indirect)
 348 SEM (stq_indirect_index)
 349 SEM (stq_disp)
 350 SEM (stq_indirect_disp)
 351 SEM (stq_index_disp)
 352 SEM (stq_indirect_index_disp)
 353 SEM (cmpobe_reg)
 354 SEM (cmpobe_lit)
 355 SEM (cmpobne_reg)
 356 SEM (cmpobne_lit)
 357 SEM (cmpobl_reg)
 358 SEM (cmpobl_lit)
 359 SEM (cmpoble_reg)
 360 SEM (cmpoble_lit)
 361 SEM (cmpobg_reg)
 362 SEM (cmpobg_lit)
 363 SEM (cmpobge_reg)
 364 SEM (cmpobge_lit)
 365 SEM (cmpibe_reg)
 366 SEM (cmpibe_lit)
 367 SEM (cmpibne_reg)
 368 SEM (cmpibne_lit)
 369 SEM (cmpibl_reg)
 370 SEM (cmpibl_lit)
 371 SEM (cmpible_reg)
 372 SEM (cmpible_lit)
 373 SEM (cmpibg_reg)
 374 SEM (cmpibg_lit)
 375 SEM (cmpibge_reg)
 376 SEM (cmpibge_lit)
 377 SEM (bbc_reg)
 378 SEM (bbc_lit)
 379 SEM (bbs_reg)
 380 SEM (bbs_lit)
 381 SEM (cmpi)
 382 SEM (cmpi1)
 383 SEM (cmpi2)
 384 SEM (cmpi3)
 385 SEM (cmpo)
 386 SEM (cmpo1)
 387 SEM (cmpo2)
 388 SEM (cmpo3)
 389 SEM (testno_reg)
 390 SEM (testg_reg)
 391 SEM (teste_reg)
 392 SEM (testge_reg)
 393 SEM (testl_reg)
 394 SEM (testne_reg)
 395 SEM (testle_reg)
 396 SEM (testo_reg)
 397 SEM (bno)
 398 SEM (bg)
 399 SEM (be)
 400 SEM (bge)
 401 SEM (bl)
 402 SEM (bne)
 403 SEM (ble)
 404 SEM (bo)
 405 SEM (b)
 406 SEM (bx_indirect_offset)
 407 SEM (bx_indirect)
 408 SEM (bx_indirect_index)
 409 SEM (bx_disp)
 410 SEM (bx_indirect_disp)
 411 SEM (callx_disp)
 412 SEM (callx_indirect)
 413 SEM (callx_indirect_offset)
 414 SEM (ret)
 415 SEM (calls)
 416 SEM (fmark)
 417 SEM (flushreg)
 418
 419 #undef SEMFULL
 420 #undef SEMFAST
 421 #undef SEM
 422
 423 /* Function unit handlers (user written).  */
 424
 425 extern int i960base_model_i960KA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 426 extern int i960base_model_i960CA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
 427
 428 /* Profiling before/after handlers (user written) */
 429
 430 extern void i960base_model_insn_before (SIM_CPU *, int /*first_p*/);
 431 extern void i960base_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
 432
 433 #endif /* I960BASE_DECODE_H */