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1 /* I960 target configuration file. -*- C -*- */
2
3 /* See sim-hload.c. We properly handle LMA. */
4 #define SIM_HANDLES_LMA 1
5
6 /* For MSPR support. FIXME: revisit. */
7 #define WITH_DEVICES 1
8
9 /* FIXME: Revisit. */
10 #ifdef HAVE_DV_SOCKSER
11 MODULE_INSTALL_FN dv_sockser_install;
12 #define MODULE_LIST dv_sockser_install,
13 #endif
14
15 #if 0
16 /* Enable watchpoints. */
17 #define WITH_WATCHPOINTS 1
18 #endif
19
20 /* ??? Temporary hack until model support unified. */
21 #define SIM_HAVE_MODEL
22
23 /* Define this to enable the intrinsic breakpoint mechanism. */
24 /* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially
25 duplicates ifdef SIM_BREAKPOINT (right?) */
26 #if 0
27 #define SIM_HAVE_BREAKPOINTS
28 #define SIM_BREAKPOINT { 0x10, 0xf1 }
29 #define SIM_BREAKPOINT_SIZE 2
30 #endif
31
32 /* This is a global setting. Different cpu families can't mix-n-match -scache
33 and -pbb. However some cpu families may use -simple while others use
34 one of -scache/-pbb. */
35 #define WITH_SCACHE_PBB 1
36
37 #if 0
38 /* ??? This was obsoleted by the PBB code. */
39 /* The semantic code should probably always use a switch().
40 However, in case that's not possible in some circumstance, we allow
41 the target to choose. Perhaps this can be autoconf'd on whether the
42 switch is too big? I can't (yet) think of a reason for allowing the
43 user to choose, though the developer may certainly wish to. */
44 #ifdef WANT_CPU_I960BASE
45 #define WITH_FAST 1
46 #define WITH_SEM_SWITCH_FULL 0
47 #define WITH_SEM_SWITCH_FAST 1
48 #endif
49 #endif