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Add multi-sim support to simulator.
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1 /* This file is part of the program psim.
2
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
19 */
20
21
22
23 #include <getopt.h>
24
25 #include "misc.h"
26 #include "lf.h"
27 #include "table.h"
28 #include "config.h"
29 #include "filter.h"
30
31 #include "igen.h"
32
33 #include "ld-insn.h"
34 #include "ld-decode.h"
35 #include "ld-cache.h"
36
37 #include "gen.h"
38
39 #include "gen-model.h"
40 #include "gen-icache.h"
41 #include "gen-itable.h"
42 #include "gen-idecode.h"
43 #include "gen-semantics.h"
44 #include "gen-engine.h"
45 #include "gen-support.h"
46 #include "gen-engine.h"
47
48
49 /****************************************************************/
50
51
52 /* Semantic functions */
53
54 int
55 print_semantic_function_formal (lf *file,
56 int nr_prefetched_words)
57 {
58 int nr = 0;
59 int word_nr;
60 if (options.gen.icache || nr_prefetched_words < 0)
61 {
62 nr += lf_printf (file, "SIM_DESC sd,\n");
63 nr += lf_printf (file, "%sidecode_cache *cache_entry,\n",
64 options.prefix.global.name);
65 nr += lf_printf (file, "%sinstruction_address cia",
66 options.prefix.global.name);
67 }
68 else if (options.gen.smp)
69 {
70 nr += lf_printf (file, "sim_cpu *cpu,\n");
71 for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
72 {
73 nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
74 options.prefix.global.name,
75 word_nr);
76 }
77 nr += lf_printf (file, "%sinstruction_address cia",
78 options.prefix.global.name);
79 }
80 else
81 {
82 nr += lf_printf (file, "SIM_DESC sd,\n");
83 for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
84 {
85 nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
86 options.prefix.global.name,
87 word_nr);
88 }
89 nr += lf_printf (file, "%sinstruction_address cia",
90 options.prefix.global.name);
91 }
92 return nr;
93 }
94
95 int
96 print_semantic_function_actual (lf *file,
97 int nr_prefetched_words)
98 {
99 int nr = 0;
100 int word_nr;
101 if (options.gen.icache || nr_prefetched_words < 0)
102 {
103 nr += lf_printf (file, "sd, cache_entry, cia");
104 }
105 else
106 {
107 if (options.gen.smp)
108 nr += lf_printf (file, "cpu");
109 else
110 nr += lf_printf (file, "sd");
111 for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
112 nr += lf_printf (file, ", instruction_%d", word_nr);
113 nr += lf_printf (file, ", cia");
114 }
115 return nr;
116 }
117
118 int
119 print_semantic_function_type (lf *file)
120 {
121 int nr = 0;
122 nr += lf_printf (file, "%sinstruction_address",
123 options.prefix.global.name);
124 return nr;
125 }
126
127
128 /* Idecode functions */
129
130 int
131 print_icache_function_formal (lf *file,
132 int nr_prefetched_words)
133 {
134 int nr = 0;
135 int word_nr;
136 if (options.gen.smp)
137 nr += lf_printf (file, "sim_cpu *cpu,\n");
138 else
139 nr += lf_printf (file, "SIM_DESC sd,\n");
140 for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
141 nr += lf_printf (file, " %sinstruction_word instruction_%d,\n",
142 options.prefix.global.name, word_nr);
143 nr += lf_printf (file, " %sinstruction_address cia,\n",
144 options.prefix.global.name);
145 nr += lf_printf (file, " %sidecode_cache *cache_entry",
146 options.prefix.global.name);
147 return nr;
148 }
149
150 int
151 print_icache_function_actual (lf *file,
152 int nr_prefetched_words)
153 {
154 int nr = 0;
155 int word_nr;
156 if (options.gen.smp)
157 nr += lf_printf (file, "cpu");
158 else
159 nr += lf_printf (file, "sd");
160 for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
161 nr += lf_printf (file, ", instruction_%d", word_nr);
162 nr += lf_printf (file, ", cia, cache_entry");
163 return nr;
164 }
165
166 int
167 print_icache_function_type (lf *file)
168 {
169 int nr;
170 if (options.gen.semantic_icache)
171 {
172 nr = print_semantic_function_type (file);
173 }
174 else
175 {
176 nr = lf_printf (file, "%sidecode_semantic *",
177 options.prefix.global.name);
178 }
179 return nr;
180 }
181
182
183 /* Function names */
184
185 static int
186 print_opcode_bits (lf *file,
187 opcode_bits *bits)
188 {
189 int nr = 0;
190 if (bits == NULL)
191 return nr;
192 nr += lf_putchr (file, '_');
193 nr += lf_putstr (file, bits->field->val_string);
194 if (bits->opcode->is_boolean && bits->value == 0)
195 nr += lf_putint (file, bits->opcode->boolean_constant);
196 else if (!bits->opcode->is_boolean) {
197 if (bits->opcode->last < bits->field->last)
198 nr += lf_putint (file, bits->value << (bits->field->last - bits->opcode->last));
199 else
200 nr += lf_putint (file, bits->value);
201 }
202 nr += print_opcode_bits (file, bits->next);
203 return nr;
204 }
205
206 static int
207 print_c_name (lf *file,
208 const char *name)
209 {
210 int nr = 0;
211 const char *pos;
212 for (pos = name; *pos != '\0'; pos++)
213 {
214 switch (*pos)
215 {
216 case '/':
217 case '-':
218 break;
219 case ' ':
220 case '.':
221 nr += lf_putchr (file, '_');
222 break;
223 default:
224 nr += lf_putchr (file, *pos);
225 break;
226 }
227 }
228 return nr;
229 }
230
231 extern int
232 print_function_name (lf *file,
233 const char *basename,
234 const char *format_name,
235 const char *model_name,
236 opcode_bits *expanded_bits,
237 lf_function_name_prefixes prefix)
238 {
239 int nr = 0;
240 /* the prefix */
241 switch (prefix)
242 {
243 case function_name_prefix_semantics:
244 nr += lf_printf (file, "%s", options.prefix.semantics.name);
245 nr += lf_printf (file, "semantic_");
246 break;
247 case function_name_prefix_idecode:
248 nr += lf_printf (file, "%s", options.prefix.idecode.name);
249 nr += lf_printf (file, "idecode_");
250 break;
251 case function_name_prefix_itable:
252 nr += lf_printf (file, "%sitable_", options.prefix.itable.name);
253 break;
254 case function_name_prefix_icache:
255 nr += lf_printf (file, "%s", options.prefix.icache.name);
256 nr += lf_printf (file, "icache_");
257 break;
258 case function_name_prefix_engine:
259 nr += lf_printf (file, "%s", options.prefix.engine.name);
260 nr += lf_printf (file, "engine_");
261 default:
262 break;
263 }
264
265 if (model_name != NULL)
266 {
267 nr += print_c_name (file, model_name);
268 nr += lf_printf (file, "_");
269 }
270
271 /* the format name if available */
272 if (format_name != NULL)
273 {
274 nr += print_c_name (file, format_name);
275 nr += lf_printf (file, "_");
276 }
277
278 /* the function name */
279 nr += print_c_name (file, basename);
280
281 /* the suffix */
282 nr += print_opcode_bits (file, expanded_bits);
283
284 return nr;
285 }
286
287
288 void
289 print_my_defines (lf *file,
290 const char *basename,
291 const char *format_name,
292 opcode_bits *expanded_bits)
293 {
294 /* #define MY_INDEX xxxxx */
295 lf_indent_suppress (file);
296 lf_printf (file, "#undef MY_INDEX\n");
297 lf_indent_suppress (file);
298 lf_printf (file, "#define MY_INDEX ");
299 print_function_name (file,
300 basename, format_name, NULL,
301 NULL,
302 function_name_prefix_itable);
303 lf_printf (file, "\n");
304 /* #define MY_PREFIX xxxxxx */
305 lf_indent_suppress (file);
306 lf_printf (file, "#undef ");
307 print_function_name (file,
308 basename, format_name, NULL,
309 expanded_bits,
310 function_name_prefix_none);
311 lf_printf (file, "\n");
312 lf_indent_suppress (file);
313 lf_printf (file, "#undef MY_PREFIX\n");
314 lf_indent_suppress (file);
315 lf_printf (file, "#define MY_PREFIX ");
316 print_function_name (file,
317 basename, format_name, NULL,
318 expanded_bits,
319 function_name_prefix_none);
320 lf_printf (file, "\n");
321 /* #define MY_NAME xxxxxx */
322 lf_indent_suppress (file);
323 lf_indent_suppress (file);
324 lf_printf (file, "#undef MY_NAME\n");
325 lf_indent_suppress (file);
326 lf_printf (file, "#define MY_NAME \"");
327 print_function_name (file,
328 basename, format_name, NULL,
329 expanded_bits,
330 function_name_prefix_none);
331 lf_printf (file, "\"\n");
332 }
333
334
335 static int
336 print_itrace_prefix (lf *file,
337 const char *phase_lc)
338 {
339 const char *prefix = "trace_one_insn (";
340 int indent = strlen (prefix);
341 lf_printf (file, "%sSD, CPU, %s, TRACE_LINENUM_P (CPU),\n",
342 prefix, (options.gen.delayed_branch ? "cia.ip" : "cia"));
343 lf_indent (file, +indent);
344 lf_printf (file, "%sitable[MY_INDEX].file,\n", options.prefix.itable.name);
345 lf_printf (file, "%sitable[MY_INDEX].line_nr,\n", options.prefix.itable.name);
346 lf_printf (file, "\"%s\",\n", phase_lc);
347 lf_printf (file, "\"%%-18s - ");
348 return indent;
349 }
350
351
352 static void
353 print_itrace_format (lf *file,
354 insn_mnemonic_entry *assembler)
355 {
356 /* pass=1 is fmt string; pass=2 is is arguments */
357 int pass;
358 /* print the format string */
359 for (pass = 1; pass <= 2; pass++)
360 {
361 const char *chp = assembler->format;
362 chp++; /* skip the leading quote */
363 /* prefix the format with the insn `name' */
364 if (pass == 2)
365 {
366 lf_printf (file, ",\n");
367 lf_printf (file, "%sitable[MY_INDEX].name", options.prefix.itable.name);
368 }
369 /* write out the format/args */
370 while (*chp != '\0')
371 {
372 if (chp[0] == '\\' && (chp[1] == '<' || chp[1] == '>'))
373 {
374 if (pass == 1)
375 lf_putchr (file, chp[1]);
376 chp += 2;
377 }
378 else if (chp[0] == '<' || chp[0] == '%')
379 {
380 /* parse [ "%" ... ] "<" [ func "#" ] param ">" */
381 const char *fmt;
382 const char *func;
383 int strlen_func;
384 const char *param;
385 int strlen_param;
386 /* the "%" ... "<" format */
387 fmt = chp;
388 while (chp[0] != '<' && chp[0] != '\0')
389 chp++;
390 if (chp[0] != '<')
391 error (assembler->line, "Missing `<' after `%%'\n");
392 chp++;
393 /* [ "func" # ] OR "param" */
394 func = chp;
395 param = chp;
396 while (chp[0] != '>' && chp[0] != '#' && chp[0] != '\0')
397 chp++;
398 strlen_func = chp - func;
399 if (chp[0] == '#')
400 {
401 chp++;
402 param = chp;
403 while (chp[0] != '>' && chp[0] != '\0')
404 chp++;
405 }
406 strlen_param = chp - param;
407 if (chp[0] != '>')
408 error (assembler->line, "Missing closing `>' in assembler string\n");
409 chp++;
410 /* now process it */
411 if (pass == 2)
412 lf_printf (file, ",\n");
413 if (strncmp (fmt, "<", 1) == 0)
414 /* implicit long int format */
415 {
416 if (pass == 1)
417 lf_printf (file, "%%ld");
418 else
419 {
420 lf_printf (file, "(long) ");
421 lf_write (file, param, strlen_param);
422 }
423 }
424 else if (strncmp (fmt, "%<", 2) == 0)
425 /* explicit format */
426 {
427 if (pass == 1)
428 lf_printf (file, "%%");
429 else
430 lf_write (file, param, strlen_param);
431 }
432 else if (strncmp (fmt, "%s<", 3) == 0)
433 /* string format */
434 {
435 if (pass == 1)
436 lf_printf (file, "%%s");
437 else
438 {
439 lf_printf (file, "%sstr_", options.prefix.global.name);
440 lf_write (file, func, strlen_func);
441 lf_printf (file, " (_SD, ");
442 lf_write (file, param, strlen_param);
443 lf_printf (file, ")");
444 }
445 }
446 else if (strncmp (fmt, "%lx<", 4) == 0)
447 /* simple hex */
448 {
449 if (pass == 1)
450 lf_printf (file, "%%lx");
451 else
452 {
453 lf_printf (file, "(unsigned long) ");
454 lf_write (file, param, strlen_param);
455 }
456 }
457 else if (strncmp (fmt, "%08lx<", 6) == 0)
458 /* simple hex */
459 {
460 if (pass == 1)
461 lf_printf (file, "%%08lx");
462 else
463 {
464 lf_printf (file, "(unsigned long) ");
465 lf_write (file, param, strlen_param);
466 }
467 }
468 else
469 error (assembler->line, "Unknown assembler string format\n");
470 }
471 else
472 {
473 if (pass == 1)
474 lf_putchr (file, chp[0]);
475 chp += 1;
476 }
477 }
478 }
479 lf_printf (file, ");\n");
480 }
481
482
483 void
484 print_itrace (lf *file,
485 insn_entry *insn,
486 int idecode)
487 {
488 const char *phase = (idecode) ? "DECODE" : "INSN";
489 const char *phase_lc = (idecode) ? "decode" : "insn";
490 lf_printf (file, "\n");
491 lf_indent_suppress (file);
492 lf_printf (file, "#if defined (WITH_TRACE)\n");
493 lf_printf (file, "/* trace the instructions execution if enabled */\n");
494 lf_printf (file, "if (TRACE_%s_P (CPU)) {\n", phase);
495 lf_indent (file, +2);
496 if (insn->mnemonics != NULL)
497 {
498 insn_mnemonic_entry *assembler = insn->mnemonics;
499 int is_first = 1;
500 do
501 {
502 if (assembler->condition != NULL)
503 {
504 int indent;
505 lf_printf (file, "%sif (%s)\n",
506 is_first ? "" : "else ",
507 assembler->condition);
508 lf_indent (file, +2);
509 indent = print_itrace_prefix (file, phase_lc);
510 print_itrace_format (file, assembler);
511 lf_indent (file, -indent);
512 lf_indent (file, -2);
513 if (assembler->next == NULL)
514 error (assembler->line, "Missing final unconditional assembler\n");
515 }
516 else
517 {
518 int indent;
519 if (!is_first)
520 {
521 lf_printf (file, "else\n");
522 lf_indent (file, +2);
523 }
524 indent = print_itrace_prefix (file, phase_lc);
525 print_itrace_format (file, assembler);
526 lf_indent (file, -indent);
527 if (!is_first)
528 lf_indent (file, -2);
529 if (assembler->next != NULL)
530 error (assembler->line, "Unconditional assembler is not last\n");
531 }
532 is_first = 0;
533 assembler = assembler->next;
534 }
535 while (assembler != NULL);
536 }
537 else
538 {
539 int indent = print_itrace_prefix (file, phase_lc);
540 lf_printf (file, "?\",\n");
541 lf_printf (file, "itable[MY_INDEX].name);\n");
542 lf_indent (file, -indent);
543 }
544 lf_indent (file, -2);
545 lf_printf (file, "}\n");
546 lf_indent_suppress (file);
547 lf_printf (file, "#endif\n");
548 }
549
550
551 void
552 print_sim_engine_abort (lf *file,
553 const char *message)
554 {
555 lf_printf (file, "sim_engine_abort (SD, CPU, cia, ");
556 lf_printf (file, "\"%s\"", message);
557 lf_printf (file, ");\n");
558 }
559
560
561 /****************************************************************/
562
563
564 static void
565 gen_semantics_h (lf *file,
566 insn_list *semantics,
567 int max_nr_words)
568 {
569 int word_nr;
570 insn_list *semantic;
571 for (word_nr = -1; word_nr <= max_nr_words; word_nr++)
572 {
573 lf_printf (file, "typedef ");
574 print_semantic_function_type (file);
575 lf_printf (file, " %sidecode_semantic",
576 options.prefix.global.name);
577 if (word_nr >= 0)
578 lf_printf (file, "_%d", word_nr);
579 lf_printf (file, "\n(");
580 lf_indent (file, +1);
581 print_semantic_function_formal (file, word_nr);
582 lf_indent (file, -1);
583 lf_printf (file, ");\n");
584 lf_printf (file, "\n");
585 }
586 switch (options.gen.code)
587 {
588 case generate_calls:
589 for (semantic = semantics; semantic != NULL; semantic = semantic->next)
590 {
591 /* Ignore any special/internal instructions */
592 if (semantic->insn->nr_words == 0)
593 continue;
594 print_semantic_declaration (file,
595 semantic->insn,
596 semantic->expanded_bits,
597 semantic->opcodes,
598 semantic->nr_prefetched_words);
599 }
600 break;
601 case generate_jumps:
602 lf_print__this_file_is_empty (file, "generating jumps");
603 break;
604 }
605 }
606
607
608 static void
609 gen_semantics_c (lf *file,
610 insn_list *semantics,
611 cache_entry *cache_rules)
612 {
613 if (options.gen.code == generate_calls)
614 {
615 insn_list *semantic;
616 lf_printf (file, "\n");
617 lf_printf (file, "#include \"sim-main.h\"\n");
618 lf_printf (file, "#include \"%sitable.h\"\n",
619 options.prefix.itable.name);
620 lf_printf (file, "#include \"%sidecode.h\"\n",
621 options.prefix.idecode.name);
622 lf_printf (file, "#include \"%ssemantics.h\"\n",
623 options.prefix.semantics.name);
624 lf_printf (file, "#include \"%ssupport.h\"\n",
625 options.prefix.support.name);
626 lf_printf (file, "\n");
627 for (semantic = semantics; semantic != NULL; semantic = semantic->next)
628 {
629 /* Ignore any special/internal instructions */
630 if (semantic->insn->nr_words == 0)
631 continue;
632 print_semantic_definition (file,
633 semantic->insn,
634 semantic->expanded_bits,
635 semantic->opcodes,
636 cache_rules,
637 semantic->nr_prefetched_words);
638 }
639 }
640 else
641 {
642 lf_print__this_file_is_empty (file, "generating jump engine");
643 }
644 }
645
646
647 /****************************************************************/
648
649
650 static void
651 gen_icache_h (lf *file,
652 insn_list *semantic,
653 function_entry *functions,
654 int max_nr_words)
655 {
656 int word_nr;
657 for (word_nr = 0; word_nr <= max_nr_words; word_nr++)
658 {
659 lf_printf (file, "typedef ");
660 print_icache_function_type(file);
661 lf_printf (file, " %sidecode_icache_%d\n(",
662 options.prefix.global.name,
663 word_nr);
664 print_icache_function_formal(file, word_nr);
665 lf_printf (file, ");\n");
666 lf_printf (file, "\n");
667 }
668 if (options.gen.code == generate_calls
669 && options.gen.icache)
670 {
671 function_entry_traverse (file, functions,
672 print_icache_internal_function_declaration,
673 NULL);
674 while (semantic != NULL)
675 {
676 print_icache_declaration (file,
677 semantic->insn,
678 semantic->expanded_bits,
679 semantic->opcodes,
680 semantic->nr_prefetched_words);
681 semantic = semantic->next;
682 }
683 }
684 else
685 {
686 lf_print__this_file_is_empty (file, "generating jump engine");
687 }
688 }
689
690 static void
691 gen_icache_c (lf *file,
692 insn_list *semantic,
693 function_entry *functions,
694 cache_entry *cache_rules)
695 {
696 /* output `internal' invalid/floating-point unavailable functions
697 where needed */
698 if (options.gen.code == generate_calls
699 && options.gen.icache)
700 {
701 lf_printf (file, "\n");
702 lf_printf (file, "#include \"cpu.h\"\n");
703 lf_printf (file, "#include \"idecode.h\"\n");
704 lf_printf (file, "#include \"semantics.h\"\n");
705 lf_printf (file, "#include \"icache.h\"\n");
706 lf_printf (file, "#include \"support.h\"\n");
707 lf_printf (file, "\n");
708 function_entry_traverse (file, functions,
709 print_icache_internal_function_definition,
710 NULL);
711 lf_printf (file, "\n");
712 while (semantic != NULL)
713 {
714 print_icache_definition (file,
715 semantic->insn,
716 semantic->expanded_bits,
717 semantic->opcodes,
718 cache_rules,
719 semantic->nr_prefetched_words);
720 semantic = semantic->next;
721 }
722 }
723 else
724 {
725 lf_print__this_file_is_empty (file, "generating jump engine");
726 }
727 }
728
729
730 /****************************************************************/
731
732
733 static void
734 gen_idecode_h (lf *file,
735 gen_table *gen,
736 insn_table *insns,
737 cache_entry *cache_rules)
738 {
739 lf_printf (file, "typedef unsigned%d %sinstruction_word;\n",
740 options.insn_bit_size, options.prefix.global.name);
741 if (options.gen.delayed_branch)
742 {
743 lf_printf (file, "typedef struct _%sinstruction_address {\n",
744 options.prefix.global.name);
745 lf_printf (file, " address_word ip; /* instruction pointer */\n");
746 lf_printf (file, " address_word dp; /* delayed-slot pointer */\n");
747 lf_printf (file, "} %sinstruction_address;\n", options.prefix.global.name);
748 }
749 else
750 {
751 lf_printf (file, "typedef address_word %sinstruction_address;\n",
752 options.prefix.global.name);
753
754 }
755 if (options.gen.nia == nia_is_invalid
756 && strlen (options.prefix.global.uname) > 0)
757 {
758 lf_indent_suppress (file);
759 lf_printf (file, "#define %sINVALID_INSTRUCTION_ADDRESS ",
760 options.prefix.global.uname);
761 lf_printf (file, "INVALID_INSTRUCTION_ADDRESS\n");
762 }
763 lf_printf (file, "\n");
764 print_icache_struct (file, insns, cache_rules);
765 lf_printf (file, "\n");
766 if (options.gen.icache)
767 {
768 ERROR ("FIXME - idecode with icache suffering from bit-rot");
769 }
770 else
771 {
772 gen_list *entry;
773 for (entry = gen->tables; entry != NULL; entry = entry->next)
774 {
775 print_idecode_issue_function_header (file,
776 entry->processor,
777 0/*is definition*/,
778 1/*ALWAYS ONE WORD*/);
779 }
780 }
781 }
782
783
784 static void
785 gen_idecode_c (lf *file,
786 gen_table *gen,
787 insn_table *isa,
788 cache_entry *cache_rules)
789 {
790 /* the intro */
791 lf_printf (file, "#include \"sim-main.h\"\n");
792 lf_printf (file, "#include \"%sidecode.h\"\n", options.prefix.global.name);
793 lf_printf (file, "#include \"%ssemantics.h\"\n", options.prefix.global.name);
794 lf_printf (file, "#include \"%sicache.h\"\n", options.prefix.global.name);
795 lf_printf (file, "#include \"%ssupport.h\"\n", options.prefix.global.name);
796 lf_printf (file, "\n");
797 lf_printf (file, "\n");
798
799 print_idecode_globals (file);
800 lf_printf (file, "\n");
801
802 switch (options.gen.code)
803 {
804 case generate_calls:
805 {
806 gen_list *entry;
807 for (entry = gen->tables; entry != NULL; entry = entry->next)
808 {
809 print_idecode_lookups (file, entry->table, cache_rules);
810
811 /* output the main idecode routine */
812 if (!options.gen.icache)
813 {
814 print_idecode_issue_function_header (file,
815 entry->processor,
816 1/*is definition*/,
817 1/*ALWAYS ONE WORD*/);
818 lf_printf (file, "{\n");
819 lf_indent (file, +2);
820 lf_printf (file, "%sinstruction_address nia;\n",
821 options.prefix.global.name);
822 print_idecode_body (file, entry->table, "nia =");
823 lf_printf (file, "return nia;");
824 lf_indent (file, -2);
825 lf_printf (file, "}\n");
826 }
827 }
828 break;
829 }
830 case generate_jumps:
831 {
832 lf_print__this_file_is_empty (file, "generating a jump engine");
833 break;
834 }
835 }
836 }
837
838
839 /****************************************************************/
840
841
842 static void
843 gen_run_c (lf *file,
844 gen_table *gen)
845 {
846 gen_list *entry;
847 lf_printf (file, "#include \"sim-main.h\"\n");
848 lf_printf (file, "#include \"engine.h\"\n");
849 lf_printf (file, "#include \"bfd.h\"\n");
850 lf_printf (file, "\n");
851 lf_printf (file, "void\n");
852 lf_printf (file, "sim_engine_run (SIM_DESC sd,\n");
853 lf_printf (file, " int next_cpu_nr,\n");
854 lf_printf (file, " int siggnal)\n");
855 lf_printf (file, "{\n");
856 lf_indent (file, +2);
857 lf_printf (file, "int mach;\n");
858 lf_printf (file, "if (STATE_ARCHITECTURE (sd) == NULL)\n");
859 lf_printf (file, " mach = 0;\n");
860 lf_printf (file, "else\n");
861 lf_printf (file, " mach = STATE_ARCHITECTURE (sd)->mach;\n");
862 lf_printf (file, "switch (mach)\n");
863 lf_printf (file, " {\n");
864 lf_indent (file, +2);
865 for (entry = gen->tables; entry != NULL; entry = entry->next)
866 {
867 lf_printf (file, "case bfd_mach_%s:\n", entry->processor);
868 lf_indent (file, +2);
869 print_function_name (file,
870 "run",
871 NULL, /* format name */
872 entry->processor,
873 NULL, /* expanded bits */
874 function_name_prefix_engine);
875 lf_printf (file, " (sd, next_cpu_nr, siggnal);\n");
876 lf_printf (file, "break;\n");
877 lf_indent (file, -2);
878 }
879 lf_printf (file, "default:\n");
880 lf_indent (file, +2);
881 lf_printf (file, "sim_engine_abort (sd, NULL, NULL_CIA,\n");
882 lf_printf (file, " \"sim_engine_run - unknown machine\");\n");
883 lf_printf (file, "break;\n");
884 lf_indent (file, -2);
885 lf_indent (file, -2);
886 lf_printf (file, " }\n");
887 lf_indent (file, -2);
888 lf_printf (file, "}\n");
889 }
890
891
892 /****************************************************************/
893
894 static gen_table *
895 do_gen (insn_table *isa,
896 decode_table *decode_rules)
897 {
898 gen_table *gen;
899 if (decode_rules == NULL)
900 error (NULL, "Must specify a decode table\n");
901 if (isa == NULL)
902 error (NULL, "Must specify an instruction table\n");
903 if (decode_table_max_word_nr (decode_rules) > 0)
904 options.gen.multi_word = decode_table_max_word_nr (decode_rules);
905 gen = make_gen_tables (isa, decode_rules);
906 gen_tables_expand_insns (gen);
907 gen_tables_expand_semantics (gen);
908 return gen;
909 }
910
911 /****************************************************************/
912
913 igen_options options;
914
915 int
916 main (int argc,
917 char **argv,
918 char **envp)
919 {
920 cache_entry *cache_rules = NULL;
921 lf_file_references file_references = lf_include_references;
922 decode_table *decode_rules = NULL;
923 insn_table *isa = NULL;
924 gen_table *gen = NULL;
925 char *real_file_name = NULL;
926 int is_header = 0;
927 int ch;
928 lf *standard_out = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "igen");
929
930 INIT_OPTIONS (options);
931
932 if (argc == 1)
933 {
934 printf ("Usage:\n");
935 printf ("\n");
936 printf (" igen <config-opts> ... <input-opts>... <output-opts>...\n");
937 printf ("\n");
938 printf ("Config options:\n");
939 printf ("\n");
940 printf (" -B <bit-size>\n");
941 printf ("\t Set the number of bits in an instruction (depreciated).\n");
942 printf ("\t This option can now be set directly in the instruction table.\n");
943 printf ("\n");
944 printf (" -D <data-structure>\n");
945 printf ("\t Dump the specified data structure to stdout. Valid structures include:\n");
946 printf ("\t processor-names - list the names of all the processors (models)\n");
947 printf ("\n");
948 printf (" -F <filter-list>\n");
949 printf ("\t Filter out any instructions with a non-empty flags field that contains\n");
950 printf ("\t a flag not listed in the <filter-list>.\n");
951 printf ("\n");
952 printf (" -H <high-bit>\n");
953 printf ("\t Set the number of the high (most significant) instruction bit (depreciated).\n");
954 printf ("\t This option can now be set directly in the instruction table.\n");
955 printf ("\n");
956 printf (" -I <icache-size>\n");
957 printf ("\t Specify size of the cracking instruction cache (default %d instructions).\n",
958 options.gen.icache_size);
959 printf ("\t Implies -G icache.\n");
960 printf ("\n");
961 printf (" -M <model-list>\n");
962 printf ("\t Filter out any instructions that do not support at least one of the listed\n");
963 printf ("\t models (An instructions with no model information is considered to support\n");
964 printf ("\n all models.).\n");
965 printf ("\n");
966 printf (" -N <nr-cpus>\n");
967 printf ("\t Generate a simulator supporting <nr-cpus>\n");
968 printf ("\t Specify `-N 0' to disable generation of the SMP. Specifying `-N 1' will\n");
969 printf ("\t still generate an SMP enabled simulator but will only support one CPU.\n");
970 printf ("\n");
971 printf (" -T <mechanism>\n");
972 printf ("\t Override the decode mechanism specified by the decode rules\n");
973 printf ("\n");
974 printf (" -P <prefix>\n");
975 printf ("\t Prepend global names (except itable) with the string <prefix>.\n");
976 printf ("\t Specify -P <module>=<prefix> to set the <modules> prefix.\n");
977 printf ("\n");
978 printf (" -Werror\n");
979 printf ("\t Make warnings errors\n");
980 printf ("\n");
981 printf (" -G [!]<gen-option>\n");
982 printf ("\t Any of the following options:\n");
983 printf ("\n");
984 printf ("\t decode-duplicate - Override the decode rules, forcing the duplication of\n");
985 printf ("\t semantic functions\n");
986 printf ("\t decode-combine - Combine any duplicated entries within a table\n");
987 printf ("\t decode-zero-reserved - Override the decode rules, forcing reserved bits to be\n");
988 printf ("\t treated as zero.\n");
989 printf ("\t decode-switch-is-goto - Overfide the padded-switch code type as a goto-switch\n");
990 printf ("\n");
991 printf ("\t gen-conditional-issue - conditionally issue each instruction\n");
992 printf ("\t gen-delayed-branch - need both cia and nia passed around\n");
993 printf ("\t gen-direct-access - use #defines to directly access values\n");
994 printf ("\t gen-zero-r<N> - arch assumes GPR(<N>) == 0, keep it that way\n");
995 printf ("\t gen-icache - generate an instruction cracking cache\n");
996 printf ("\t gen-insn-in-icache - save original instruction when cracking\n");
997 printf ("\t gen-multi-sim - generate multiple simulators - one per model\n");
998 printf ("\t By default, a single simulator that will\n");
999 printf ("\t execute any instruction is generated\n");
1000 printf ("\t gen-multi-word - generate code allowing for multi-word insns\n");
1001 printf ("\t gen-semantic-icache - include semantic code in cracking functions\n");
1002 printf ("\t gen-slot-verification - perform slot verification as part of decode\n");
1003 printf ("\t gen-nia-invalid - NIA defaults to nia_invalid\n");
1004 printf ("\t gen-nia-void - do not compute/return NIA\n");
1005 printf ("\n");
1006 printf ("\t trace-combine - report combined entries a rule application\n");
1007 printf ("\t trace-entries - report entries after a rules application\n");
1008 printf ("\t trace-rule-rejection - report each rule as rejected\n");
1009 printf ("\t trace-rule-selection - report each rule as selected\n");
1010 printf ("\n");
1011 printf ("\t field-widths - instruction formats specify widths (depreciated)\n");
1012 printf ("\t By default, an instruction format specifies bit\n");
1013 printf ("\t positions\n");
1014 printf ("\t This option can now be set directly in the\n");
1015 printf ("\t instruction table\n");
1016 printf ("\t jumps - use jumps instead of function calls\n");
1017 printf ("\t omit-line-numbers - do not include line number information in the output\n");
1018 printf ("\n");
1019 printf ("Input options:\n");
1020 printf ("\n");
1021 printf (" -k <cache-rules> (depreciated)\n");
1022 printf (" -o <decode-rules>\n");
1023 printf (" -i <instruction-table>\n");
1024 printf ("\n");
1025 printf ("Output options:\n");
1026 printf ("\n");
1027 printf (" -x Perform expansion (required)\n");
1028 printf (" -n <real-name> Specify the real name of the next output file\n");
1029 printf (" -h Generate the header (.h) file rather than the body (.c)\n");
1030 printf (" -c <output-file> output icache\n");
1031 printf (" -d <output-file> output idecode\n");
1032 printf (" -e <output-file> output engine\n");
1033 printf (" -f <output-file> output support functions\n");
1034 printf (" -m <output-file> output model\n");
1035 printf (" -r <output-file> output multi-sim run\n");
1036 printf (" -s <output-file> output schematic\n");
1037 printf (" -t <output-file> output itable\n");
1038 }
1039
1040 while ((ch = getopt(argc, argv,
1041 "B:D:F:G:H:I:M:N:P:T:W:o:k:i:n:hc:d:e:m:r:s:t:f:x"))
1042 != -1)
1043 {
1044 fprintf (stderr, " -%c ", ch);
1045 if (optarg)
1046 fprintf (stderr, "%s ", optarg);
1047 fprintf (stderr, "\\\n");
1048
1049 switch(ch)
1050 {
1051
1052 case 'M':
1053 filter_parse (&options.model_filter, optarg);
1054 break;
1055
1056 case 'D':
1057 if (strcmp (optarg, "processor-names"))
1058 {
1059 char *processor;
1060 for (processor = filter_next (options.model_filter, "");
1061 processor != NULL;
1062 processor = filter_next (options.model_filter, processor))
1063 lf_printf (standard_out, "%s\n", processor);
1064 }
1065 else
1066 error (NULL, "Unknown data structure %s, not dumped\n", optarg);
1067 break;
1068
1069 case 'F':
1070 filter_parse (&options.flags_filter, optarg);
1071 break;
1072
1073 case 'I':
1074 options.gen.icache_size = a2i (optarg);
1075 options.gen.icache = 1;
1076 break;
1077
1078 case 'B':
1079 options.insn_bit_size = a2i (optarg);
1080 if (options.insn_bit_size <= 0
1081 || options.insn_bit_size > max_insn_bit_size)
1082 {
1083 error (NULL, "Instruction bitsize must be in range 1..%d\n",
1084 max_insn_bit_size);
1085 }
1086 if (options.hi_bit_nr != options.insn_bit_size - 1
1087 && options.hi_bit_nr != 0)
1088 {
1089 error (NULL, "Conflict betweem hi-bit-nr and insn-bit-size\n");
1090 }
1091 break;
1092
1093 case 'H':
1094 options.hi_bit_nr = a2i (optarg);
1095 if (options.hi_bit_nr != options.insn_bit_size - 1
1096 && options.hi_bit_nr != 0)
1097 {
1098 error (NULL, "Conflict between hi-bit-nr and insn-bit-size\n");
1099 }
1100 break;
1101
1102 case 'N':
1103 options.gen.smp = a2i (optarg);
1104 break;
1105
1106 case 'P':
1107 {
1108 igen_prefix_name *names;
1109 char *chp;
1110 chp = strchr (optarg, '=');
1111 if (chp == NULL)
1112 {
1113 names = &options.prefix.global;
1114 chp = optarg;
1115 }
1116 else
1117 {
1118 chp = chp + 1; /* skip `=' */
1119 if (strncmp (optarg, "global=", chp - optarg) == 0)
1120 {
1121 names = &options.prefix.global;
1122 }
1123 if (strncmp (optarg, "engine=", chp - optarg) == 0)
1124 {
1125 names = &options.prefix.engine;
1126 }
1127 if (strncmp (optarg, "icache=", chp - optarg) == 0)
1128 {
1129 names = &options.prefix.icache;
1130 }
1131 if (strncmp (optarg, "idecode=", chp - optarg) == 0)
1132 {
1133 names = &options.prefix.idecode;
1134 }
1135 if (strncmp (optarg, "itable=", chp - optarg) == 0)
1136 {
1137 names = &options.prefix.itable;
1138 }
1139 if (strncmp (optarg, "semantics=", chp - optarg) == 0)
1140 {
1141 names = &options.prefix.semantics;
1142 }
1143 if (strncmp (optarg, "support=", chp - optarg) == 0)
1144 {
1145 names = &options.prefix.support;
1146 }
1147 else
1148 {
1149 names = NULL;
1150 error (NULL, "Prefix `%s' unreconized\n", optarg);
1151 }
1152 }
1153 names->name = strdup (chp);
1154 names->uname = strdup (chp);
1155 chp = names->uname;
1156 while (*chp) {
1157 if (islower(*chp))
1158 *chp = toupper(*chp);
1159 chp++;
1160 }
1161 if (names == &options.prefix.global)
1162 {
1163 options.prefix.engine = options.prefix.global;
1164 options.prefix.icache = options.prefix.global;
1165 options.prefix.idecode = options.prefix.global;
1166 /* options.prefix.itable = options.prefix.global; */
1167 options.prefix.semantics = options.prefix.global;
1168 options.prefix.support = options.prefix.global;
1169 }
1170 break;
1171 }
1172
1173 case 'W':
1174 {
1175 if (strcmp (optarg, "error") == 0)
1176 options.warning = error;
1177 else
1178 error (NULL, "Unknown -W argument `%s'\n", optarg);
1179 break;
1180 }
1181
1182
1183 case 'G':
1184 if (strcmp (optarg, "decode-duplicate") == 0)
1185 {
1186 options.decode.duplicate = 1;
1187 }
1188 else if (strcmp (optarg, "decode-combine") == 0)
1189 {
1190 options.decode.combine = 1;
1191 }
1192 else if (strcmp (optarg, "decode-zero-reserved") == 0)
1193 {
1194 options.decode.zero_reserved = 1;
1195 }
1196
1197 else if (strcmp (optarg, "gen-conditional-issue") == 0)
1198 {
1199 options.gen.conditional_issue = 1;
1200 }
1201 else if (strcmp (optarg, "conditional-issue") == 0)
1202 {
1203 options.gen.conditional_issue = 1;
1204 options.warning (NULL, "Option conditional-issue replaced by gen-conditional-issue\n");
1205 }
1206 else if (strcmp (optarg, "gen-delayed-branch") == 0)
1207 {
1208 options.gen.delayed_branch = 1;
1209 }
1210 else if (strcmp (optarg, "delayed-branch") == 0)
1211 {
1212 options.gen.delayed_branch = 1;
1213 options.warning (NULL, "Option delayed-branch replaced by gen-delayed-branch\n");
1214 }
1215 else if (strcmp (optarg, "gen-direct-access") == 0)
1216 {
1217 options.gen.direct_access = 1;
1218 }
1219 else if (strcmp (optarg, "direct-access") == 0)
1220 {
1221 options.gen.direct_access = 1;
1222 options.warning (NULL, "Option direct-access replaced by gen-direct-access\n");
1223 }
1224 else if (strncmp (optarg, "gen-zero-r", strlen ("gen-zero-r")) == 0)
1225 {
1226 options.gen.zero_reg = 1;
1227 options.gen.zero_reg_nr = atoi (optarg + strlen ("gen-zero-r"));
1228 }
1229 else if (strncmp (optarg, "zero-r", strlen ("zero-r")) == 0)
1230 {
1231 options.gen.zero_reg = 1;
1232 options.gen.zero_reg_nr = atoi (optarg + strlen ("zero-r"));
1233 options.warning (NULL, "Option zero-r<N> replaced by gen-zero-r<N>\n");
1234 }
1235 else if (strcmp (optarg, "gen-icache") == 0)
1236 {
1237 options.gen.icache = 1;
1238 }
1239 else if (strcmp (optarg, "gen-insn-in-icache") == 0)
1240 {
1241 options.gen.insn_in_icache = 1;
1242 }
1243 else if (strcmp (optarg, "gen-multi-sim") == 0)
1244 {
1245 options.gen.multi_sim = 1;
1246 }
1247 else if (strcmp (optarg, "gen-multi-word") == 0)
1248 {
1249 options.gen.multi_word = 1;
1250 }
1251 else if (strcmp (optarg, "gen-semantic-icache") == 0)
1252 {
1253 options.gen.semantic_icache = 1;
1254 }
1255 else if (strcmp (optarg, "gen-slot-verification") == 0)
1256 {
1257 options.gen.slot_verification = 1;
1258 }
1259 else if (strcmp (optarg, "verify-slot") == 0)
1260 {
1261 options.gen.slot_verification = 1;
1262 options.warning (NULL, "Option verify-slot replaced by gen-slot-verification\n");
1263 }
1264 else if (strcmp (optarg, "gen-nia-invalid") == 0)
1265 {
1266 options.gen.nia = nia_is_invalid;
1267 }
1268 else if (strcmp (optarg, "default-nia-minus-one") == 0)
1269 {
1270 options.gen.nia = nia_is_invalid;
1271 options.warning (NULL, "Option default-nia-minus-one replaced by gen-nia-invalid\n");
1272 }
1273 else if (strcmp (optarg, "gen-nia-void") == 0)
1274 {
1275 options.gen.nia = nia_is_void;
1276 }
1277 else if (strcmp (optarg, "trace-combine") == 0)
1278 {
1279 options.trace.combine = 1;
1280 }
1281 else if (strcmp (optarg, "trace-entries") == 0)
1282 {
1283 options.trace.entries = 1;
1284 }
1285 else if (strcmp (optarg, "trace-rule-rejection") == 0)
1286 {
1287 options.trace.rule_rejection = 1;
1288 }
1289 else if (strcmp (optarg, "trace-rule-selection") == 0)
1290 {
1291 options.trace.rule_selection = 1;
1292 }
1293 else if (strcmp (optarg, "jumps") == 0)
1294 {
1295 options.gen.code = generate_jumps;
1296 }
1297 else if (strcmp (optarg, "field-widths") == 0)
1298 {
1299 options.insn_specifying_widths = 1;
1300 }
1301 else if (strcmp (optarg, "omit-line-numbers") == 0)
1302 {
1303 file_references = lf_omit_references;
1304 }
1305 else
1306 error (NULL, "Unknown option %s\n", optarg);
1307 break;
1308
1309 case 'i':
1310 isa = load_insn_table (optarg, cache_rules);
1311 if (isa->illegal_insn == NULL)
1312 error (NULL, "illegal-instruction missing from insn table\n");
1313 break;
1314
1315 case 'x':
1316 gen = do_gen (isa, decode_rules);
1317 break;
1318
1319 case 'o':
1320 decode_rules = load_decode_table (optarg);
1321 break;
1322
1323 case 'k':
1324 if (isa != NULL)
1325 error (NULL, "Cache file must appear before the insn file\n");
1326 cache_rules = load_cache_table (optarg);
1327 break;
1328
1329 case 'n':
1330 real_file_name = strdup(optarg);
1331 break;
1332
1333 case 'h':
1334 is_header = 1;
1335 break;
1336
1337 case 'c':
1338 case 'd':
1339 case 'e':
1340 case 'f':
1341 case 'm':
1342 case 'r':
1343 case 's':
1344 case 't':
1345 {
1346 lf *file = lf_open(optarg, real_file_name, file_references,
1347 (is_header ? lf_is_h : lf_is_c),
1348 argv[0]);
1349 if (gen == NULL && ch != 't' && ch != 'm' && ch != 'f')
1350 {
1351 options.warning (NULL, "Explicitly generate tables with -x option\n");
1352 gen = do_gen (isa, decode_rules);
1353 }
1354 lf_print__file_start(file);
1355 switch (ch)
1356 {
1357 case 'm':
1358 if (is_header)
1359 gen_model_h (file, isa);
1360 else
1361 gen_model_c (file, isa);
1362 break;
1363 case 't':
1364 if (is_header)
1365 gen_itable_h (file, isa);
1366 else
1367 gen_itable_c (file, isa);
1368 break;
1369 case 'f':
1370 if (is_header)
1371 gen_support_h (file, isa);
1372 else
1373 gen_support_c (file, isa);
1374 break;
1375 case 'r':
1376 if (is_header)
1377 options.warning (NULL, "-hr option ignored\n");
1378 else
1379 gen_run_c (file, gen);
1380 break;
1381 case 's':
1382 if(is_header)
1383 gen_semantics_h (file, gen->semantics, isa->max_nr_words);
1384 else
1385 gen_semantics_c (file, gen->semantics, isa->caches);
1386 break;
1387 case 'd':
1388 if (is_header)
1389 gen_idecode_h (file, gen, isa, cache_rules);
1390 else
1391 gen_idecode_c (file, gen, isa, cache_rules);
1392 break;
1393 case 'e':
1394 if (is_header)
1395 gen_engine_h (file, gen, isa, cache_rules);
1396 else
1397 gen_engine_c (file, gen, isa, cache_rules);
1398 break;
1399 case 'c':
1400 if (is_header)
1401 gen_icache_h (file,
1402 gen->semantics,
1403 isa->functions,
1404 isa->max_nr_words);
1405 else
1406 gen_icache_c (file,
1407 gen->semantics,
1408 isa->functions,
1409 cache_rules);
1410 break;
1411 }
1412 lf_print__file_finish(file);
1413 lf_close(file);
1414 is_header = 0;
1415 }
1416 real_file_name = NULL;
1417 break;
1418 default:
1419 ERROR ("Bad switch");
1420 }
1421 }
1422 return (0);
1423 }