1 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
2 Daniel Jacobowitz <dan@codesourcery.com>
3 Joseph Myers <joseph@codesourcery.com>
5 * configure: Regenerate.
7 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
10 * config.in: Regenerate.
12 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
14 * configure: Regenerated.
16 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
18 * configure: Regenerated.
20 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
22 * configure: Regenerated.
24 2005-03-23 Mark Kettenis <kettenis@gnu.org>
26 * configure: Regenerate.
28 2005-02-21 Corinna Vinschen <vinschen@redhat.com>
30 * iq2000.c: Eliminate need to include gdb/sim-iq2000.h.
32 2005-02-18 Corinna Vinschen <vinschen@redhat.com>
34 * configure.ac: Rename from configure.in and pull up to autoconf 2.59.
35 * configure: Regenerate.
37 2002-03-18 Jeff Johnston <jjohnstn@redhat.com>
39 * sem-switch.c: Regenerated.
42 2002-01-28 Jeff Johnston <jjohnstn@redhat.com>
44 * arch.c: Regenerated.
52 * sem-switch.c: Ditto.
55 2001-11-16 Jeff Johnston <jjohnstn@redhat.com>
57 * decode.c: Regenerated after putting orui into machine-specific
61 * sem-switch.c: Ditto.
64 2001-11-13 Jeff Johnston <jjohnstn@redhat.com>
66 * cpu.h: Regenerated after changing jump and branch operands
67 so that no bit masking is performed.
69 * iq2000.c (get_h_pc): Change to return h_pc directly.
70 (set_h_pc): Change to always set the insn mask bit.
71 * sim-if.c (iq2000bf_disassemble_insn): Change to pass the
73 (sim_create_inferior): Changed so starting address is taken
74 directly from link. If not specified, start address is
75 0 with insn mask set on.
77 2001-11-08 Jeff Johnston <jjohnstn@redhat.com>
79 * cpu.h: Regenerated after making jump operand UINT.
82 2001-10-31 Jeff Johnston <jjohnstn@redhat.com>
84 * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw,
85 sb, sh, and sw insns handling of offset operand.
88 2001-10-30 Jeff Johnston <jjohnstn@redhat.com>
93 * sem-switch.c: Ditto.
95 * iq2000.c (get_h_pc): New routine.
97 (fetch_str): Translate cpu data addresses to data area.
99 (iq2000bf_fetch_register): Use get_h_pc.
100 (iq2000bf_store_register): Use set_h_pc.
101 * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN
102 on the pc value passed first.
103 * sim-if.c (iq2000bf_disassemble_insn): New function.
104 (sim_open): Add extra memory region for insn memory vs data memory.
105 Also change disassembler to be iq2000bf_disassemble_insn.
106 (sim_create_inferior): Translate start address using INSN2CPU macro.
107 * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros
108 to translate between Harvard and cpu addresses.
110 2001-10-26 Jeff Johnston <jjohnstn@redhat.com>
112 * sem-switch.c: Regenerated after reverting addiu
116 2001-10-25 Jeff Johnston <jjohnstn@redhat.com>
118 * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until
119 iq10 simulator merged here.
120 * cpu.h: Regenerated after fixing addiu insn.
125 * sem-switch.c: Ditto.
128 2001-09-12 Stan Cox <scox@redhat.com>
130 * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c,
132 * iq2000.c (do_syscall): Support system traps.
134 2001-07-05 Ben Elliston <bje@redhat.com>
136 * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
137 (stamp-cpu): Likewise.
139 2001-04-02 Ben Elliston <bje@redhat.com>
141 * arch.c, arch.h: Regnerate to track recent cgen improvements.
142 * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise.
143 * model.c, sem-switch.c, sem.c: Likewise.
145 2001-01-22 Ben Elliston <bje@redhat.com>
147 * cpu.h, decode.c, decode.h, model.c: Regenerate.
148 * sem.c, sem-switch.c: Likewise.
150 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate.
151 * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise.
153 2000-07-05 Ben Elliston <bje@redhat.com>
155 * configure: Regenerated to track ../common/aclocal.m4 changes.
157 2000-07-04 Ben Elliston <bje@redhat.com>
159 * sem.c, sem-switch.c: Regenerate.
161 * iq2000.c (do_break): Use sim_engine_halt ().
162 * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate.
164 2000-07-03 Ben Elliston <bje@redhat.com>
166 * iq2000.c (do_syscall): Examine syscall register (nominally %11).
167 (do_break): Handle breakpoints.
168 * tconfig.in (SIM_HAVE_BREAKPOINTS): Define.
169 (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise.
171 2000-06-29 Andrew Cagney <cagney@redhat.com>
173 * iq2000.c (iq2000bf_fetch_register): Implement.
174 (iq2000bf_store_register): Ditto.
176 2000-05-17 Ben Elliston <bje@redhat.com>
178 * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE
179 to set the skip count for the (skip ..) rtx.
180 (extract-pbb): Likewise.
181 (extract-pbb): Include the delay slot instruction of all CTI
182 instructions in the pbb, not just those that may nullify their
183 delay slot (eg. likely branches).
185 * sem.c, sem-switch.c: Regenerate.
187 2000-05-16 Ben Elliston <bje@redhat.com>
189 * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate.
190 * sem.c, sem-switch.c: Likewise.
191 * mloop.in (extract-pbb): Prohibit branch instructions in the
192 delay slot of branch likely instructions.
194 2000-05-16 Ben Elliston <bje@redhat.com>
196 * Makefile.in: New file.
197 * configure.in: Ditto.
199 * config.in, configure: Generate.
200 * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto.
201 * decode.c, decode.h: Ditto.
202 * model.c, sem-switch.c, sem.c: Ditto.
203 * mloop.in: New file.
205 * iq2000-sim.h: Ditto.