sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 2 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License along
  18 # with this program; if not, write to the Free Software Foundation, Inc.,
  19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20
  21 ## COMMON_PRE_CONFIG_FRAG
  22
  23 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  24 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  25
  26 CONFIG_DEVICES = dv-sockser.o
  27 CONFIG_DEVICES =
  28
  29 SIM_OBJS = \
  30         $(SIM_NEW_COMMON_OBJS) \
  31         sim-cpu.o \
  32         sim-hload.o \
  33         sim-hrw.o \
  34         sim-model.o \
  35         sim-reg.o \
  36         cgen-utils.o cgen-trace.o cgen-scache.o \
  37         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  38         sim-if.o arch.o \
  39         $(M32R_OBJS) \
  40         $(M32RX_OBJS) \
  41         traps.o devices.o \
  42         $(CONFIG_DEVICES)
  43
  44 # Extra headers included by sim-main.h.
  45 SIM_EXTRA_DEPS = \
  46         $(CGEN_INCLUDE_DEPS) \
  47         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  48
  49 SIM_EXTRA_CFLAGS =
  50
  51 SIM_RUN_OBJS = nrun.o
  52 SIM_EXTRA_CLEAN = m32r-clean
  53
  54 # This selects the m32r newlib/libgloss syscall definitions.
  55 NL_TARGET = -DNL_TARGET_m32r
  56
  57 ## COMMON_POST_CONFIG_FRAG
  58
  59 arch = m32r
  60
  61 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  62
  63 arch.o: arch.c $(SIM_MAIN_DEPS)
  64
  65 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  66 devices.o: devices.c $(SIM_MAIN_DEPS)
  67
  68 # M32R objs
  69
  70 M32RBF_INCLUDE_DEPS = \
  71         $(CGEN_MAIN_CPU_DEPS) \
  72         cpu.h decode.h eng.h
  73
  74 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  75
  76 # FIXME: Use of `mono' is wip.
  77 mloop.c eng.h: stamp-mloop
  78 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  79         $(SHELL) $(srccom)/genmloop.sh \
  80                 -mono -fast -pbb -switch sem-switch.c \
  81                 -cpu m32rbf -infile $(srcdir)/mloop.in
  82         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  83         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  84         touch stamp-mloop
  85 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  86
  87 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  88 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  89 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  90 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  91
  92 # M32RX objs
  93
  94 M32RXF_INCLUDE_DEPS = \
  95         $(CGEN_MAIN_CPU_DEPS) \
  96         cpux.h decodex.h engx.h
  97
  98 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
  99
 100 # FIXME: Use of `mono' is wip.
 101 mloopx.c engx.h: stamp-xmloop
 102 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 103         $(SHELL) $(srccom)/genmloop.sh \
 104                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 105                 -cpu m32rxf -infile $(srcdir)/mloopx.in
 106         $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
 107         $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
 108         touch stamp-xmloop
 109 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 110
 111 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 112 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 113 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 114 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 115
 116 m32r-clean:
 117         rm -f mloop.c eng.h stamp-mloop
 118         rm -f mloopx.c engx.h stamp-xmloop
 119         rm -f stamp-arch stamp-cpu stamp-xcpu
 120         rm -f tmp-*
 121
 122 # cgen support, enable with --enable-cgen-maint
 123 CGEN_MAINT = ; @true
 124 # The following line is commented in or out depending upon --enable-cgen-maint.
 125 @CGEN_MAINT@CGEN_MAINT =
 126
 127 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 128         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 129           FLAGS="with-scache with-profile=fn"
 130         touch stamp-arch
 131 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 132
 133 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 134         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 135           cpu=m32rbf mach=m32r SUFFIX= \
 136           FLAGS="with-scache with-profile=fn" \
 137           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 138         touch stamp-cpu
 139 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 140
 141 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 142         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 143           cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 144         touch stamp-xcpu
 145 cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu