sim/m32r/decode.c

   1 /* Simulator instruction decoder for m32rbf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2010 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #define WANT_CPU m32rbf
  26 #define WANT_CPU_M32RBF
  27
  28 #include "sim-main.h"
  29 #include "sim-assert.h"
  30
  31 /* The instruction descriptor array.
  32    This is computed at runtime.  Space for it is not malloc'd to save a
  33    teensy bit of cpu in the decoder.  Moving it to malloc space is trivial
  34    but won't be done until necessary (we don't currently support the runtime
  35    addition of instructions nor an SMP machine with different cpus).  */
  36 static IDESC m32rbf_insn_data[M32RBF_INSN__MAX];
  37
  38 /* Commas between elements are contained in the macros.
  39    Some of these are conditionally compiled out.  */
  40
  41 static const struct insn_sem m32rbf_insn_sem[] =
  42 {
  43   { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY },
  44   { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY },
  45   { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY },
  46   { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY },
  47   { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY },
  48   { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY },
  49   { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD },
  50   { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 },
  51   { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD },
  52   { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 },
  53   { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD },
  54   { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 },
  55   { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD },
  56   { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 },
  57   { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI },
  58   { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV },
  59   { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 },
  60   { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX },
  61   { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 },
  62   { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 },
  63   { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ },
  64   { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ },
  65   { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ },
  66   { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ },
  67   { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ },
  68   { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ },
  69   { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ },
  70   { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 },
  71   { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 },
  72   { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 },
  73   { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 },
  74   { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ },
  75   { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 },
  76   { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 },
  77   { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP },
  78   { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI },
  79   { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP },
  80   { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI },
  81   { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV },
  82   { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV },
  83   { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV },
  84   { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV },
  85   { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL },
  86   { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP },
  87   { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD },
  88   { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D },
  89   { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LDB },
  90   { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LDB_D },
  91   { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LDH },
  92   { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LDH_D },
  93   { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LDB },
  94   { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LDB_D },
  95   { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LDH },
  96   { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LDH_D },
  97   { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS },
  98   { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 },
  99   { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 },
 100   { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 },
 101   { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK },
 102   { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI },
 103   { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI },
 104   { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI },
 105   { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI },
 106   { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD },
 107   { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI },
 108   { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI },
 109   { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI },
 110   { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI },
 111   { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV },
 112   { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI },
 113   { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI },
 114   { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI },
 115   { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC },
 116   { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI },
 117   { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI },
 118   { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC },
 119   { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV },
 120   { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP },
 121   { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV },
 122   { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC },
 123   { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC },
 124   { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE },
 125   { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH },
 126   { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD },
 127   { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 },
 128   { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI },
 129   { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD },
 130   { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 },
 131   { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI },
 132   { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD },
 133   { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 },
 134   { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI },
 135   { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST },
 136   { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D },
 137   { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB },
 138   { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D },
 139   { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH },
 140   { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D },
 141   { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS },
 142   { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS },
 143   { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD },
 144   { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV },
 145   { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX },
 146   { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP },
 147   { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK },
 148   { M32R_INSN_CLRPSW, M32RBF_INSN_CLRPSW, M32RBF_SFMT_CLRPSW },
 149   { M32R_INSN_SETPSW, M32RBF_INSN_SETPSW, M32RBF_SFMT_SETPSW },
 150   { M32R_INSN_BSET, M32RBF_INSN_BSET, M32RBF_SFMT_BSET },
 151   { M32R_INSN_BCLR, M32RBF_INSN_BCLR, M32RBF_SFMT_BSET },
 152   { M32R_INSN_BTST, M32RBF_INSN_BTST, M32RBF_SFMT_BTST },
 153 };
 154
 155 static const struct insn_sem m32rbf_insn_sem_invalid =
 156 {
 157   VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY
 158 };
 159
 160 /* Initialize an IDESC from the compile-time computable parts.  */
 161
 162 static INLINE void
 163 init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
 164 {
 165   const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
 166
 167   id->num = t->index;
 168   id->sfmt = t->sfmt;
 169   if ((int) t->type <= 0)
 170     id->idata = & cgen_virtual_insn_table[- (int) t->type];
 171   else
 172     id->idata = & insn_table[t->type];
 173   id->attrs = CGEN_INSN_ATTRS (id->idata);
 174   /* Oh my god, a magic number.  */
 175   id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
 176
 177 #if WITH_PROFILE_MODEL_P
 178   id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
 179   {
 180     SIM_DESC sd = CPU_STATE (cpu);
 181     SIM_ASSERT (t->index == id->timing->num);
 182   }
 183 #endif
 184
 185   /* Semantic pointers are initialized elsewhere.  */
 186 }
 187
 188 /* Initialize the instruction descriptor table.  */
 189
 190 void
 191 m32rbf_init_idesc_table (SIM_CPU *cpu)
 192 {
 193   IDESC *id,*tabend;
 194   const struct insn_sem *t,*tend;
 195   int tabsize = M32RBF_INSN__MAX;
 196   IDESC *table = m32rbf_insn_data;
 197
 198   memset (table, 0, tabsize * sizeof (IDESC));
 199
 200   /* First set all entries to the `invalid insn'.  */
 201   t = & m32rbf_insn_sem_invalid;
 202   for (id = table, tabend = table + tabsize; id < tabend; ++id)
 203     init_idesc (cpu, id, t);
 204
 205   /* Now fill in the values for the chosen cpu.  */
 206   for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t);
 207        t != tend; ++t)
 208     {
 209       init_idesc (cpu, & table[t->index], t);
 210     }
 211
 212   /* Link the IDESC table into the cpu.  */
 213   CPU_IDESC (cpu) = table;
 214 }
 215
 216 /* Given an instruction, return a pointer to its IDESC entry.  */
 217
 218 const IDESC *
 219 m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
 220               CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
 221               ARGBUF *abuf)
 222 {
 223   /* Result of decoder.  */
 224   M32RBF_INSN_TYPE itype;
 225
 226   {
 227     CGEN_INSN_WORD insn = base_insn;
 228
 229     {
 230       unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
 231       switch (val)
 232       {
 233       case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv;
 234       case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx;
 235       case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add;
 236       case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv;
 237       case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp;
 238       case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp;
 239       case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv;
 240       case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx;
 241       case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add;
 242       case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv;
 243       case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add;
 244       case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add;
 245       case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add;
 246       case 15 :
 247         if ((entire_insn & 0xf8f0) == 0xf0)
 248           { itype = M32RBF_INSN_BTST; goto extract_sfmt_btst; }
 249         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 250       case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add;
 251       case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add;
 252       case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add;
 253       case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add;
 254       case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv;
 255       case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc;
 256       case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc;
 257       case 28 :
 258         {
 259           unsigned int val = (((insn >> 8) & (1 << 0)));
 260           switch (val)
 261           {
 262           case 0 :
 263             if ((entire_insn & 0xfff0) == 0x1ec0)
 264               { itype = M32RBF_INSN_JL; goto extract_sfmt_jl; }
 265             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 266           case 1 :
 267             if ((entire_insn & 0xfff0) == 0x1fc0)
 268               { itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; }
 269             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 270           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 271           }
 272         }
 273       case 29 :
 274         if ((entire_insn & 0xffff) == 0x10d6)
 275           { itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; }
 276         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 277       case 31 :
 278         if ((entire_insn & 0xfff0) == 0x10f0)
 279           { itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; }
 280         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 281       case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb;
 282       case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth;
 283       case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st;
 284       case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock;
 285       case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus;
 286       case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus;
 287       case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ldb;
 288       case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ldb;
 289       case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ldh;
 290       case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ldh;
 291       case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld;
 292       case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock;
 293       case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus;
 294       case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi;
 295       case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi;
 296       case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi;
 297       case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi;
 298       case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi;
 299       case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi;
 300       case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi;
 301       case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi;
 302       case 64 : /* fall through */
 303       case 65 : /* fall through */
 304       case 66 : /* fall through */
 305       case 67 : /* fall through */
 306       case 68 : /* fall through */
 307       case 69 : /* fall through */
 308       case 70 : /* fall through */
 309       case 71 : /* fall through */
 310       case 72 : /* fall through */
 311       case 73 : /* fall through */
 312       case 74 : /* fall through */
 313       case 75 : /* fall through */
 314       case 76 : /* fall through */
 315       case 77 : /* fall through */
 316       case 78 : /* fall through */
 317       case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi;
 318       case 80 : /* fall through */
 319       case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli;
 320       case 82 : /* fall through */
 321       case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli;
 322       case 84 : /* fall through */
 323       case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli;
 324       case 87 :
 325         {
 326           unsigned int val = (((insn >> 0) & (1 << 0)));
 327           switch (val)
 328           {
 329           case 0 :
 330             if ((entire_insn & 0xf0ff) == 0x5070)
 331               { itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; }
 332             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 333           case 1 :
 334             if ((entire_insn & 0xf0ff) == 0x5071)
 335               { itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; }
 336             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 337           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 338           }
 339         }
 340       case 88 :
 341         if ((entire_insn & 0xffff) == 0x5080)
 342           { itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; }
 343         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 344       case 89 :
 345         if ((entire_insn & 0xffff) == 0x5090)
 346           { itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; }
 347         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 348       case 95 :
 349         {
 350           unsigned int val = (((insn >> 0) & (3 << 0)));
 351           switch (val)
 352           {
 353           case 0 :
 354             if ((entire_insn & 0xf0ff) == 0x50f0)
 355               { itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; }
 356             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 357           case 1 :
 358             if ((entire_insn & 0xf0ff) == 0x50f1)
 359               { itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; }
 360             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 361           case 2 :
 362             if ((entire_insn & 0xf0ff) == 0x50f2)
 363               { itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; }
 364             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 365           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 366           }
 367         }
 368       case 96 : /* fall through */
 369       case 97 : /* fall through */
 370       case 98 : /* fall through */
 371       case 99 : /* fall through */
 372       case 100 : /* fall through */
 373       case 101 : /* fall through */
 374       case 102 : /* fall through */
 375       case 103 : /* fall through */
 376       case 104 : /* fall through */
 377       case 105 : /* fall through */
 378       case 106 : /* fall through */
 379       case 107 : /* fall through */
 380       case 108 : /* fall through */
 381       case 109 : /* fall through */
 382       case 110 : /* fall through */
 383       case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8;
 384       case 112 :
 385         {
 386           unsigned int val = (((insn >> 8) & (15 << 0)));
 387           switch (val)
 388           {
 389           case 0 :
 390             if ((entire_insn & 0xffff) == 0x7000)
 391               { itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; }
 392             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 393           case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw;
 394           case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw;
 395           case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
 396           case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
 397           case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
 398           case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
 399           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 400           }
 401         }
 402       case 113 : /* fall through */
 403       case 114 : /* fall through */
 404       case 115 : /* fall through */
 405       case 116 : /* fall through */
 406       case 117 : /* fall through */
 407       case 118 : /* fall through */
 408       case 119 : /* fall through */
 409       case 120 : /* fall through */
 410       case 121 : /* fall through */
 411       case 122 : /* fall through */
 412       case 123 : /* fall through */
 413       case 124 : /* fall through */
 414       case 125 : /* fall through */
 415       case 126 : /* fall through */
 416       case 127 :
 417         {
 418           unsigned int val = (((insn >> 8) & (15 << 0)));
 419           switch (val)
 420           {
 421           case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw;
 422           case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw;
 423           case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8;
 424           case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8;
 425           case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8;
 426           case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8;
 427           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 428           }
 429         }
 430       case 132 :
 431         if ((entire_insn & 0xfff00000) == 0x80400000)
 432           { itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; }
 433         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 434       case 133 :
 435         if ((entire_insn & 0xfff00000) == 0x80500000)
 436           { itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; }
 437         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 438       case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3;
 439       case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3;
 440       case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3;
 441       case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3;
 442       case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3;
 443       case 144 :
 444         if ((entire_insn & 0xf0f0ffff) == 0x90000000)
 445           { itype = M32RBF_INSN_DIV; goto extract_sfmt_div; }
 446         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 447       case 145 :
 448         if ((entire_insn & 0xf0f0ffff) == 0x90100000)
 449           { itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; }
 450         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 451       case 146 :
 452         if ((entire_insn & 0xf0f0ffff) == 0x90200000)
 453           { itype = M32RBF_INSN_REM; goto extract_sfmt_div; }
 454         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 455       case 147 :
 456         if ((entire_insn & 0xf0f0ffff) == 0x90300000)
 457           { itype = M32RBF_INSN_REMU; goto extract_sfmt_div; }
 458         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 459       case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3;
 460       case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3;
 461       case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3;
 462       case 159 :
 463         if ((entire_insn & 0xf0ff0000) == 0x90f00000)
 464           { itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; }
 465         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 466       case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d;
 467       case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d;
 468       case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d;
 469       case 166 :
 470         if ((entire_insn & 0xf8f00000) == 0xa0600000)
 471           { itype = M32RBF_INSN_BSET; goto extract_sfmt_bset; }
 472         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 473       case 167 :
 474         if ((entire_insn & 0xf8f00000) == 0xa0700000)
 475           { itype = M32RBF_INSN_BCLR; goto extract_sfmt_bset; }
 476         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 477       case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ldb_d;
 478       case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ldb_d;
 479       case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ldh_d;
 480       case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ldh_d;
 481       case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d;
 482       case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq;
 483       case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq;
 484       case 184 :
 485         if ((entire_insn & 0xfff00000) == 0xb0800000)
 486           { itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; }
 487         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 488       case 185 :
 489         if ((entire_insn & 0xfff00000) == 0xb0900000)
 490           { itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; }
 491         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 492       case 186 :
 493         if ((entire_insn & 0xfff00000) == 0xb0a00000)
 494           { itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; }
 495         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 496       case 187 :
 497         if ((entire_insn & 0xfff00000) == 0xb0b00000)
 498           { itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; }
 499         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 500       case 188 :
 501         if ((entire_insn & 0xfff00000) == 0xb0c00000)
 502           { itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; }
 503         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 504       case 189 :
 505         if ((entire_insn & 0xfff00000) == 0xb0d00000)
 506           { itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; }
 507         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 508       case 220 :
 509         if ((entire_insn & 0xf0ff0000) == 0xd0c00000)
 510           { itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; }
 511         itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 512       case 224 : /* fall through */
 513       case 225 : /* fall through */
 514       case 226 : /* fall through */
 515       case 227 : /* fall through */
 516       case 228 : /* fall through */
 517       case 229 : /* fall through */
 518       case 230 : /* fall through */
 519       case 231 : /* fall through */
 520       case 232 : /* fall through */
 521       case 233 : /* fall through */
 522       case 234 : /* fall through */
 523       case 235 : /* fall through */
 524       case 236 : /* fall through */
 525       case 237 : /* fall through */
 526       case 238 : /* fall through */
 527       case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24;
 528       case 240 : /* fall through */
 529       case 241 : /* fall through */
 530       case 242 : /* fall through */
 531       case 243 : /* fall through */
 532       case 244 : /* fall through */
 533       case 245 : /* fall through */
 534       case 246 : /* fall through */
 535       case 247 : /* fall through */
 536       case 248 : /* fall through */
 537       case 249 : /* fall through */
 538       case 250 : /* fall through */
 539       case 251 : /* fall through */
 540       case 252 : /* fall through */
 541       case 253 : /* fall through */
 542       case 254 : /* fall through */
 543       case 255 :
 544         {
 545           unsigned int val = (((insn >> 8) & (3 << 0)));
 546           switch (val)
 547           {
 548           case 0 :
 549             if ((entire_insn & 0xff000000) == 0xfc000000)
 550               { itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; }
 551             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 552           case 1 :
 553             if ((entire_insn & 0xff000000) == 0xfd000000)
 554               { itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; }
 555             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 556           case 2 :
 557             if ((entire_insn & 0xff000000) == 0xfe000000)
 558               { itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; }
 559             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 560           case 3 :
 561             if ((entire_insn & 0xff000000) == 0xff000000)
 562               { itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; }
 563             itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 564           default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 565           }
 566         }
 567       default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
 568       }
 569     }
 570   }
 571
 572   /* The instruction has been decoded, now extract the fields.  */
 573
 574  extract_sfmt_empty:
 575   {
 576     const IDESC *idesc = &m32rbf_insn_data[itype];
 577 #define FLD(f) abuf->fields.sfmt_empty.f
 578
 579
 580   /* Record the fields for the semantic handler.  */
 581   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
 582
 583 #undef FLD
 584     return idesc;
 585   }
 586
 587  extract_sfmt_add:
 588   {
 589     const IDESC *idesc = &m32rbf_insn_data[itype];
 590     CGEN_INSN_WORD insn = entire_insn;
 591 #define FLD(f) abuf->fields.sfmt_add.f
 592     UINT f_r1;
 593     UINT f_r2;
 594
 595     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
 596     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 597
 598   /* Record the fields for the semantic handler.  */
 599   FLD (f_r1) = f_r1;
 600   FLD (f_r2) = f_r2;
 601   FLD (i_dr) = & CPU (h_gr)[f_r1];
 602   FLD (i_sr) = & CPU (h_gr)[f_r2];
 603   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
 604
 605 #if WITH_PROFILE_MODEL_P
 606   /* Record the fields for profiling.  */
 607   if (PROFILE_MODEL_P (current_cpu))
 608     {
 609       FLD (in_dr) = f_r1;
 610       FLD (in_sr) = f_r2;
 611       FLD (out_dr) = f_r1;
 612     }
 613 #endif
 614 #undef FLD
 615     return idesc;
 616   }
 617
 618  extract_sfmt_add3:
 619   {
 620     const IDESC *idesc = &m32rbf_insn_data[itype];
 621     CGEN_INSN_WORD insn = entire_insn;
 622 #define FLD(f) abuf->fields.sfmt_add3.f
 623     UINT f_r1;
 624     UINT f_r2;
 625     INT f_simm16;
 626
 627     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
 628     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 629     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
 630
 631   /* Record the fields for the semantic handler.  */
 632   FLD (f_simm16) = f_simm16;
 633   FLD (f_r2) = f_r2;
 634   FLD (f_r1) = f_r1;
 635   FLD (i_sr) = & CPU (h_gr)[f_r2];
 636   FLD (i_dr) = & CPU (h_gr)[f_r1];
 637   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
 638
 639 #if WITH_PROFILE_MODEL_P
 640   /* Record the fields for profiling.  */
 641   if (PROFILE_MODEL_P (current_cpu))
 642     {
 643       FLD (in_sr) = f_r2;
 644       FLD (out_dr) = f_r1;
 645     }
 646 #endif
 647 #undef FLD
 648     return idesc;
 649   }
 650
 651  extract_sfmt_and3:
 652   {
 653     const IDESC *idesc = &m32rbf_insn_data[itype];
 654     CGEN_INSN_WORD insn = entire_insn;
 655 #define FLD(f) abuf->fields.sfmt_and3.f
 656     UINT f_r1;
 657     UINT f_r2;
 658     UINT f_uimm16;
 659
 660     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
 661     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 662     f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
 663
 664   /* Record the fields for the semantic handler.  */
 665   FLD (f_r2) = f_r2;
 666   FLD (f_uimm16) = f_uimm16;
 667   FLD (f_r1) = f_r1;
 668   FLD (i_sr) = & CPU (h_gr)[f_r2];
 669   FLD (i_dr) = & CPU (h_gr)[f_r1];
 670   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
 671
 672 #if WITH_PROFILE_MODEL_P
 673   /* Record the fields for profiling.  */
 674   if (PROFILE_MODEL_P (current_cpu))
 675     {
 676       FLD (in_sr) = f_r2;
 677       FLD (out_dr) = f_r1;
 678     }
 679 #endif
 680 #undef FLD
 681     return idesc;
 682   }
 683
 684  extract_sfmt_or3:
 685   {
 686     const IDESC *idesc = &m32rbf_insn_data[itype];
 687     CGEN_INSN_WORD insn = entire_insn;
 688 #define FLD(f) abuf->fields.sfmt_and3.f
 689     UINT f_r1;
 690     UINT f_r2;
 691     UINT f_uimm16;
 692
 693     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
 694     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 695     f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
 696
 697   /* Record the fields for the semantic handler.  */
 698   FLD (f_r2) = f_r2;
 699   FLD (f_uimm16) = f_uimm16;
 700   FLD (f_r1) = f_r1;
 701   FLD (i_sr) = & CPU (h_gr)[f_r2];
 702   FLD (i_dr) = & CPU (h_gr)[f_r1];
 703   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
 704
 705 #if WITH_PROFILE_MODEL_P
 706   /* Record the fields for profiling.  */
 707   if (PROFILE_MODEL_P (current_cpu))
 708     {
 709       FLD (in_sr) = f_r2;
 710       FLD (out_dr) = f_r1;
 711     }
 712 #endif
 713 #undef FLD
 714     return idesc;
 715   }
 716
 717  extract_sfmt_addi:
 718   {
 719     const IDESC *idesc = &m32rbf_insn_data[itype];
 720     CGEN_INSN_WORD insn = entire_insn;
 721 #define FLD(f) abuf->fields.sfmt_addi.f
 722     UINT f_r1;
 723     INT f_simm8;
 724
 725     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
 726     f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
 727
 728   /* Record the fields for the semantic handler.  */
 729   FLD (f_r1) = f_r1;
 730   FLD (f_simm8) = f_simm8;
 731   FLD (i_dr) = & CPU (h_gr)[f_r1];
 732   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0));
 733
 734 #if WITH_PROFILE_MODEL_P
 735   /* Record the fields for profiling.  */
 736   if (PROFILE_MODEL_P (current_cpu))
 737     {
 738       FLD (in_dr) = f_r1;
 739       FLD (out_dr) = f_r1;
 740     }
 741 #endif
 742 #undef FLD
 743     return idesc;
 744   }
 745
 746  extract_sfmt_addv:
 747   {
 748     const IDESC *idesc = &m32rbf_insn_data[itype];
 749     CGEN_INSN_WORD insn = entire_insn;
 750 #define FLD(f) abuf->fields.sfmt_add.f
 751     UINT f_r1;
 752     UINT f_r2;
 753
 754     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
 755     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 756
 757   /* Record the fields for the semantic handler.  */
 758   FLD (f_r1) = f_r1;
 759   FLD (f_r2) = f_r2;
 760   FLD (i_dr) = & CPU (h_gr)[f_r1];
 761   FLD (i_sr) = & CPU (h_gr)[f_r2];
 762   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
 763
 764 #if WITH_PROFILE_MODEL_P
 765   /* Record the fields for profiling.  */
 766   if (PROFILE_MODEL_P (current_cpu))
 767     {
 768       FLD (in_dr) = f_r1;
 769       FLD (in_sr) = f_r2;
 770       FLD (out_dr) = f_r1;
 771     }
 772 #endif
 773 #undef FLD
 774     return idesc;
 775   }
 776
 777  extract_sfmt_addv3:
 778   {
 779     const IDESC *idesc = &m32rbf_insn_data[itype];
 780     CGEN_INSN_WORD insn = entire_insn;
 781 #define FLD(f) abuf->fields.sfmt_add3.f
 782     UINT f_r1;
 783     UINT f_r2;
 784     INT f_simm16;
 785
 786     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
 787     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 788     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
 789
 790   /* Record the fields for the semantic handler.  */
 791   FLD (f_simm16) = f_simm16;
 792   FLD (f_r2) = f_r2;
 793   FLD (f_r1) = f_r1;
 794   FLD (i_sr) = & CPU (h_gr)[f_r2];
 795   FLD (i_dr) = & CPU (h_gr)[f_r1];
 796   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
 797
 798 #if WITH_PROFILE_MODEL_P
 799   /* Record the fields for profiling.  */
 800   if (PROFILE_MODEL_P (current_cpu))
 801     {
 802       FLD (in_sr) = f_r2;
 803       FLD (out_dr) = f_r1;
 804     }
 805 #endif
 806 #undef FLD
 807     return idesc;
 808   }
 809
 810  extract_sfmt_addx:
 811   {
 812     const IDESC *idesc = &m32rbf_insn_data[itype];
 813     CGEN_INSN_WORD insn = entire_insn;
 814 #define FLD(f) abuf->fields.sfmt_add.f
 815     UINT f_r1;
 816     UINT f_r2;
 817
 818     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
 819     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
 820
 821   /* Record the fields for the semantic handler.  */
 822   FLD (f_r1) = f_r1;
 823   FLD (f_r2) = f_r2;
 824   FLD (i_dr) = & CPU (h_gr)[f_r1];
 825   FLD (i_sr) = & CPU (h_gr)[f_r2];
 826   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
 827
 828 #if WITH_PROFILE_MODEL_P
 829   /* Record the fields for profiling.  */
 830   if (PROFILE_MODEL_P (current_cpu))
 831     {
 832       FLD (in_dr) = f_r1;
 833       FLD (in_sr) = f_r2;
 834       FLD (out_dr) = f_r1;
 835     }
 836 #endif
 837 #undef FLD
 838     return idesc;
 839   }
 840
 841  extract_sfmt_bc8:
 842   {
 843     const IDESC *idesc = &m32rbf_insn_data[itype];
 844     CGEN_INSN_WORD insn = entire_insn;
 845 #define FLD(f) abuf->fields.sfmt_bl8.f
 846     SI f_disp8;
 847
 848     f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
 849
 850   /* Record the fields for the semantic handler.  */
 851   FLD (i_disp8) = f_disp8;
 852   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
 853
 854 #if WITH_PROFILE_MODEL_P
 855   /* Record the fields for profiling.  */
 856   if (PROFILE_MODEL_P (current_cpu))
 857     {
 858     }
 859 #endif
 860 #undef FLD
 861     return idesc;
 862   }
 863
 864  extract_sfmt_bc24:
 865   {
 866     const IDESC *idesc = &m32rbf_insn_data[itype];
 867     CGEN_INSN_WORD insn = entire_insn;
 868 #define FLD(f) abuf->fields.sfmt_bl24.f
 869     SI f_disp24;
 870
 871     f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
 872
 873   /* Record the fields for the semantic handler.  */
 874   FLD (i_disp24) = f_disp24;
 875   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
 876
 877 #if WITH_PROFILE_MODEL_P
 878   /* Record the fields for profiling.  */
 879   if (PROFILE_MODEL_P (current_cpu))
 880     {
 881     }
 882 #endif
 883 #undef FLD
 884     return idesc;
 885   }
 886
 887  extract_sfmt_beq:
 888   {
 889     const IDESC *idesc = &m32rbf_insn_data[itype];
 890     CGEN_INSN_WORD insn = entire_insn;
 891 #define FLD(f) abuf->fields.sfmt_beq.f
 892     UINT f_r1;
 893     UINT f_r2;
 894     SI f_disp16;
 895
 896     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
 897     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 898     f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
 899
 900   /* Record the fields for the semantic handler.  */
 901   FLD (f_r1) = f_r1;
 902   FLD (f_r2) = f_r2;
 903   FLD (i_disp16) = f_disp16;
 904   FLD (i_src1) = & CPU (h_gr)[f_r1];
 905   FLD (i_src2) = & CPU (h_gr)[f_r2];
 906   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
 907
 908 #if WITH_PROFILE_MODEL_P
 909   /* Record the fields for profiling.  */
 910   if (PROFILE_MODEL_P (current_cpu))
 911     {
 912       FLD (in_src1) = f_r1;
 913       FLD (in_src2) = f_r2;
 914     }
 915 #endif
 916 #undef FLD
 917     return idesc;
 918   }
 919
 920  extract_sfmt_beqz:
 921   {
 922     const IDESC *idesc = &m32rbf_insn_data[itype];
 923     CGEN_INSN_WORD insn = entire_insn;
 924 #define FLD(f) abuf->fields.sfmt_beq.f
 925     UINT f_r2;
 926     SI f_disp16;
 927
 928     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
 929     f_disp16 = ((((EXTRACT_MSB0_SINT (insn, 32, 16, 16)) << (2))) + (pc));
 930
 931   /* Record the fields for the semantic handler.  */
 932   FLD (f_r2) = f_r2;
 933   FLD (i_disp16) = f_disp16;
 934   FLD (i_src2) = & CPU (h_gr)[f_r2];
 935   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0));
 936
 937 #if WITH_PROFILE_MODEL_P
 938   /* Record the fields for profiling.  */
 939   if (PROFILE_MODEL_P (current_cpu))
 940     {
 941       FLD (in_src2) = f_r2;
 942     }
 943 #endif
 944 #undef FLD
 945     return idesc;
 946   }
 947
 948  extract_sfmt_bl8:
 949   {
 950     const IDESC *idesc = &m32rbf_insn_data[itype];
 951     CGEN_INSN_WORD insn = entire_insn;
 952 #define FLD(f) abuf->fields.sfmt_bl8.f
 953     SI f_disp8;
 954
 955     f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
 956
 957   /* Record the fields for the semantic handler.  */
 958   FLD (i_disp8) = f_disp8;
 959   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
 960
 961 #if WITH_PROFILE_MODEL_P
 962   /* Record the fields for profiling.  */
 963   if (PROFILE_MODEL_P (current_cpu))
 964     {
 965       FLD (out_h_gr_SI_14) = 14;
 966     }
 967 #endif
 968 #undef FLD
 969     return idesc;
 970   }
 971
 972  extract_sfmt_bl24:
 973   {
 974     const IDESC *idesc = &m32rbf_insn_data[itype];
 975     CGEN_INSN_WORD insn = entire_insn;
 976 #define FLD(f) abuf->fields.sfmt_bl24.f
 977     SI f_disp24;
 978
 979     f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
 980
 981   /* Record the fields for the semantic handler.  */
 982   FLD (i_disp24) = f_disp24;
 983   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
 984
 985 #if WITH_PROFILE_MODEL_P
 986   /* Record the fields for profiling.  */
 987   if (PROFILE_MODEL_P (current_cpu))
 988     {
 989       FLD (out_h_gr_SI_14) = 14;
 990     }
 991 #endif
 992 #undef FLD
 993     return idesc;
 994   }
 995
 996  extract_sfmt_bra8:
 997   {
 998     const IDESC *idesc = &m32rbf_insn_data[itype];
 999     CGEN_INSN_WORD insn = entire_insn;
1000 #define FLD(f) abuf->fields.sfmt_bl8.f
1001     SI f_disp8;
1002
1003     f_disp8 = ((((EXTRACT_MSB0_SINT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
1004
1005   /* Record the fields for the semantic handler.  */
1006   FLD (i_disp8) = f_disp8;
1007   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
1008
1009 #if WITH_PROFILE_MODEL_P
1010   /* Record the fields for profiling.  */
1011   if (PROFILE_MODEL_P (current_cpu))
1012     {
1013     }
1014 #endif
1015 #undef FLD
1016     return idesc;
1017   }
1018
1019  extract_sfmt_bra24:
1020   {
1021     const IDESC *idesc = &m32rbf_insn_data[itype];
1022     CGEN_INSN_WORD insn = entire_insn;
1023 #define FLD(f) abuf->fields.sfmt_bl24.f
1024     SI f_disp24;
1025
1026     f_disp24 = ((((EXTRACT_MSB0_SINT (insn, 32, 8, 24)) << (2))) + (pc));
1027
1028   /* Record the fields for the semantic handler.  */
1029   FLD (i_disp24) = f_disp24;
1030   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
1031
1032 #if WITH_PROFILE_MODEL_P
1033   /* Record the fields for profiling.  */
1034   if (PROFILE_MODEL_P (current_cpu))
1035     {
1036     }
1037 #endif
1038 #undef FLD
1039     return idesc;
1040   }
1041
1042  extract_sfmt_cmp:
1043   {
1044     const IDESC *idesc = &m32rbf_insn_data[itype];
1045     CGEN_INSN_WORD insn = entire_insn;
1046 #define FLD(f) abuf->fields.sfmt_st_plus.f
1047     UINT f_r1;
1048     UINT f_r2;
1049
1050     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1051     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1052
1053   /* Record the fields for the semantic handler.  */
1054   FLD (f_r1) = f_r1;
1055   FLD (f_r2) = f_r2;
1056   FLD (i_src1) = & CPU (h_gr)[f_r1];
1057   FLD (i_src2) = & CPU (h_gr)[f_r2];
1058   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1059
1060 #if WITH_PROFILE_MODEL_P
1061   /* Record the fields for profiling.  */
1062   if (PROFILE_MODEL_P (current_cpu))
1063     {
1064       FLD (in_src1) = f_r1;
1065       FLD (in_src2) = f_r2;
1066     }
1067 #endif
1068 #undef FLD
1069     return idesc;
1070   }
1071
1072  extract_sfmt_cmpi:
1073   {
1074     const IDESC *idesc = &m32rbf_insn_data[itype];
1075     CGEN_INSN_WORD insn = entire_insn;
1076 #define FLD(f) abuf->fields.sfmt_st_d.f
1077     UINT f_r2;
1078     INT f_simm16;
1079
1080     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1081     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1082
1083   /* Record the fields for the semantic handler.  */
1084   FLD (f_simm16) = f_simm16;
1085   FLD (f_r2) = f_r2;
1086   FLD (i_src2) = & CPU (h_gr)[f_r2];
1087   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0));
1088
1089 #if WITH_PROFILE_MODEL_P
1090   /* Record the fields for profiling.  */
1091   if (PROFILE_MODEL_P (current_cpu))
1092     {
1093       FLD (in_src2) = f_r2;
1094     }
1095 #endif
1096 #undef FLD
1097     return idesc;
1098   }
1099
1100  extract_sfmt_div:
1101   {
1102     const IDESC *idesc = &m32rbf_insn_data[itype];
1103     CGEN_INSN_WORD insn = entire_insn;
1104 #define FLD(f) abuf->fields.sfmt_add.f
1105     UINT f_r1;
1106     UINT f_r2;
1107
1108     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1109     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1110
1111   /* Record the fields for the semantic handler.  */
1112   FLD (f_r1) = f_r1;
1113   FLD (f_r2) = f_r2;
1114   FLD (i_dr) = & CPU (h_gr)[f_r1];
1115   FLD (i_sr) = & CPU (h_gr)[f_r2];
1116   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
1117
1118 #if WITH_PROFILE_MODEL_P
1119   /* Record the fields for profiling.  */
1120   if (PROFILE_MODEL_P (current_cpu))
1121     {
1122       FLD (in_dr) = f_r1;
1123       FLD (in_sr) = f_r2;
1124       FLD (out_dr) = f_r1;
1125     }
1126 #endif
1127 #undef FLD
1128     return idesc;
1129   }
1130
1131  extract_sfmt_jl:
1132   {
1133     const IDESC *idesc = &m32rbf_insn_data[itype];
1134     CGEN_INSN_WORD insn = entire_insn;
1135 #define FLD(f) abuf->fields.sfmt_jl.f
1136     UINT f_r2;
1137
1138     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1139
1140   /* Record the fields for the semantic handler.  */
1141   FLD (f_r2) = f_r2;
1142   FLD (i_sr) = & CPU (h_gr)[f_r2];
1143   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
1144
1145 #if WITH_PROFILE_MODEL_P
1146   /* Record the fields for profiling.  */
1147   if (PROFILE_MODEL_P (current_cpu))
1148     {
1149       FLD (in_sr) = f_r2;
1150       FLD (out_h_gr_SI_14) = 14;
1151     }
1152 #endif
1153 #undef FLD
1154     return idesc;
1155   }
1156
1157  extract_sfmt_jmp:
1158   {
1159     const IDESC *idesc = &m32rbf_insn_data[itype];
1160     CGEN_INSN_WORD insn = entire_insn;
1161 #define FLD(f) abuf->fields.sfmt_jl.f
1162     UINT f_r2;
1163
1164     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1165
1166   /* Record the fields for the semantic handler.  */
1167   FLD (f_r2) = f_r2;
1168   FLD (i_sr) = & CPU (h_gr)[f_r2];
1169   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
1170
1171 #if WITH_PROFILE_MODEL_P
1172   /* Record the fields for profiling.  */
1173   if (PROFILE_MODEL_P (current_cpu))
1174     {
1175       FLD (in_sr) = f_r2;
1176     }
1177 #endif
1178 #undef FLD
1179     return idesc;
1180   }
1181
1182  extract_sfmt_ld:
1183   {
1184     const IDESC *idesc = &m32rbf_insn_data[itype];
1185     CGEN_INSN_WORD insn = entire_insn;
1186 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1187     UINT f_r1;
1188     UINT f_r2;
1189
1190     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1191     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1192
1193   /* Record the fields for the semantic handler.  */
1194   FLD (f_r2) = f_r2;
1195   FLD (f_r1) = f_r1;
1196   FLD (i_sr) = & CPU (h_gr)[f_r2];
1197   FLD (i_dr) = & CPU (h_gr)[f_r1];
1198   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1199
1200 #if WITH_PROFILE_MODEL_P
1201   /* Record the fields for profiling.  */
1202   if (PROFILE_MODEL_P (current_cpu))
1203     {
1204       FLD (in_sr) = f_r2;
1205       FLD (out_dr) = f_r1;
1206     }
1207 #endif
1208 #undef FLD
1209     return idesc;
1210   }
1211
1212  extract_sfmt_ld_d:
1213   {
1214     const IDESC *idesc = &m32rbf_insn_data[itype];
1215     CGEN_INSN_WORD insn = entire_insn;
1216 #define FLD(f) abuf->fields.sfmt_add3.f
1217     UINT f_r1;
1218     UINT f_r2;
1219     INT f_simm16;
1220
1221     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1222     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1223     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1224
1225   /* Record the fields for the semantic handler.  */
1226   FLD (f_simm16) = f_simm16;
1227   FLD (f_r2) = f_r2;
1228   FLD (f_r1) = f_r1;
1229   FLD (i_sr) = & CPU (h_gr)[f_r2];
1230   FLD (i_dr) = & CPU (h_gr)[f_r1];
1231   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1232
1233 #if WITH_PROFILE_MODEL_P
1234   /* Record the fields for profiling.  */
1235   if (PROFILE_MODEL_P (current_cpu))
1236     {
1237       FLD (in_sr) = f_r2;
1238       FLD (out_dr) = f_r1;
1239     }
1240 #endif
1241 #undef FLD
1242     return idesc;
1243   }
1244
1245  extract_sfmt_ldb:
1246   {
1247     const IDESC *idesc = &m32rbf_insn_data[itype];
1248     CGEN_INSN_WORD insn = entire_insn;
1249 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1250     UINT f_r1;
1251     UINT f_r2;
1252
1253     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1254     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1255
1256   /* Record the fields for the semantic handler.  */
1257   FLD (f_r2) = f_r2;
1258   FLD (f_r1) = f_r1;
1259   FLD (i_sr) = & CPU (h_gr)[f_r2];
1260   FLD (i_dr) = & CPU (h_gr)[f_r1];
1261   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1262
1263 #if WITH_PROFILE_MODEL_P
1264   /* Record the fields for profiling.  */
1265   if (PROFILE_MODEL_P (current_cpu))
1266     {
1267       FLD (in_sr) = f_r2;
1268       FLD (out_dr) = f_r1;
1269     }
1270 #endif
1271 #undef FLD
1272     return idesc;
1273   }
1274
1275  extract_sfmt_ldb_d:
1276   {
1277     const IDESC *idesc = &m32rbf_insn_data[itype];
1278     CGEN_INSN_WORD insn = entire_insn;
1279 #define FLD(f) abuf->fields.sfmt_add3.f
1280     UINT f_r1;
1281     UINT f_r2;
1282     INT f_simm16;
1283
1284     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1285     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1286     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1287
1288   /* Record the fields for the semantic handler.  */
1289   FLD (f_simm16) = f_simm16;
1290   FLD (f_r2) = f_r2;
1291   FLD (f_r1) = f_r1;
1292   FLD (i_sr) = & CPU (h_gr)[f_r2];
1293   FLD (i_dr) = & CPU (h_gr)[f_r1];
1294   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1295
1296 #if WITH_PROFILE_MODEL_P
1297   /* Record the fields for profiling.  */
1298   if (PROFILE_MODEL_P (current_cpu))
1299     {
1300       FLD (in_sr) = f_r2;
1301       FLD (out_dr) = f_r1;
1302     }
1303 #endif
1304 #undef FLD
1305     return idesc;
1306   }
1307
1308  extract_sfmt_ldh:
1309   {
1310     const IDESC *idesc = &m32rbf_insn_data[itype];
1311     CGEN_INSN_WORD insn = entire_insn;
1312 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1313     UINT f_r1;
1314     UINT f_r2;
1315
1316     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1317     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1318
1319   /* Record the fields for the semantic handler.  */
1320   FLD (f_r2) = f_r2;
1321   FLD (f_r1) = f_r1;
1322   FLD (i_sr) = & CPU (h_gr)[f_r2];
1323   FLD (i_dr) = & CPU (h_gr)[f_r1];
1324   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1325
1326 #if WITH_PROFILE_MODEL_P
1327   /* Record the fields for profiling.  */
1328   if (PROFILE_MODEL_P (current_cpu))
1329     {
1330       FLD (in_sr) = f_r2;
1331       FLD (out_dr) = f_r1;
1332     }
1333 #endif
1334 #undef FLD
1335     return idesc;
1336   }
1337
1338  extract_sfmt_ldh_d:
1339   {
1340     const IDESC *idesc = &m32rbf_insn_data[itype];
1341     CGEN_INSN_WORD insn = entire_insn;
1342 #define FLD(f) abuf->fields.sfmt_add3.f
1343     UINT f_r1;
1344     UINT f_r2;
1345     INT f_simm16;
1346
1347     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1348     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1349     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1350
1351   /* Record the fields for the semantic handler.  */
1352   FLD (f_simm16) = f_simm16;
1353   FLD (f_r2) = f_r2;
1354   FLD (f_r1) = f_r1;
1355   FLD (i_sr) = & CPU (h_gr)[f_r2];
1356   FLD (i_dr) = & CPU (h_gr)[f_r1];
1357   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1358
1359 #if WITH_PROFILE_MODEL_P
1360   /* Record the fields for profiling.  */
1361   if (PROFILE_MODEL_P (current_cpu))
1362     {
1363       FLD (in_sr) = f_r2;
1364       FLD (out_dr) = f_r1;
1365     }
1366 #endif
1367 #undef FLD
1368     return idesc;
1369   }
1370
1371  extract_sfmt_ld_plus:
1372   {
1373     const IDESC *idesc = &m32rbf_insn_data[itype];
1374     CGEN_INSN_WORD insn = entire_insn;
1375 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1376     UINT f_r1;
1377     UINT f_r2;
1378
1379     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1380     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1381
1382   /* Record the fields for the semantic handler.  */
1383   FLD (f_r2) = f_r2;
1384   FLD (f_r1) = f_r1;
1385   FLD (i_sr) = & CPU (h_gr)[f_r2];
1386   FLD (i_dr) = & CPU (h_gr)[f_r1];
1387   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1388
1389 #if WITH_PROFILE_MODEL_P
1390   /* Record the fields for profiling.  */
1391   if (PROFILE_MODEL_P (current_cpu))
1392     {
1393       FLD (in_sr) = f_r2;
1394       FLD (out_dr) = f_r1;
1395       FLD (out_sr) = f_r2;
1396     }
1397 #endif
1398 #undef FLD
1399     return idesc;
1400   }
1401
1402  extract_sfmt_ld24:
1403   {
1404     const IDESC *idesc = &m32rbf_insn_data[itype];
1405     CGEN_INSN_WORD insn = entire_insn;
1406 #define FLD(f) abuf->fields.sfmt_ld24.f
1407     UINT f_r1;
1408     UINT f_uimm24;
1409
1410     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1411     f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24);
1412
1413   /* Record the fields for the semantic handler.  */
1414   FLD (f_r1) = f_r1;
1415   FLD (i_uimm24) = f_uimm24;
1416   FLD (i_dr) = & CPU (h_gr)[f_r1];
1417   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0));
1418
1419 #if WITH_PROFILE_MODEL_P
1420   /* Record the fields for profiling.  */
1421   if (PROFILE_MODEL_P (current_cpu))
1422     {
1423       FLD (out_dr) = f_r1;
1424     }
1425 #endif
1426 #undef FLD
1427     return idesc;
1428   }
1429
1430  extract_sfmt_ldi8:
1431   {
1432     const IDESC *idesc = &m32rbf_insn_data[itype];
1433     CGEN_INSN_WORD insn = entire_insn;
1434 #define FLD(f) abuf->fields.sfmt_addi.f
1435     UINT f_r1;
1436     INT f_simm8;
1437
1438     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1439     f_simm8 = EXTRACT_MSB0_SINT (insn, 16, 8, 8);
1440
1441   /* Record the fields for the semantic handler.  */
1442   FLD (f_simm8) = f_simm8;
1443   FLD (f_r1) = f_r1;
1444   FLD (i_dr) = & CPU (h_gr)[f_r1];
1445   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1446
1447 #if WITH_PROFILE_MODEL_P
1448   /* Record the fields for profiling.  */
1449   if (PROFILE_MODEL_P (current_cpu))
1450     {
1451       FLD (out_dr) = f_r1;
1452     }
1453 #endif
1454 #undef FLD
1455     return idesc;
1456   }
1457
1458  extract_sfmt_ldi16:
1459   {
1460     const IDESC *idesc = &m32rbf_insn_data[itype];
1461     CGEN_INSN_WORD insn = entire_insn;
1462 #define FLD(f) abuf->fields.sfmt_add3.f
1463     UINT f_r1;
1464     INT f_simm16;
1465
1466     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1467     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1468
1469   /* Record the fields for the semantic handler.  */
1470   FLD (f_simm16) = f_simm16;
1471   FLD (f_r1) = f_r1;
1472   FLD (i_dr) = & CPU (h_gr)[f_r1];
1473   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1474
1475 #if WITH_PROFILE_MODEL_P
1476   /* Record the fields for profiling.  */
1477   if (PROFILE_MODEL_P (current_cpu))
1478     {
1479       FLD (out_dr) = f_r1;
1480     }
1481 #endif
1482 #undef FLD
1483     return idesc;
1484   }
1485
1486  extract_sfmt_lock:
1487   {
1488     const IDESC *idesc = &m32rbf_insn_data[itype];
1489     CGEN_INSN_WORD insn = entire_insn;
1490 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1491     UINT f_r1;
1492     UINT f_r2;
1493
1494     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1495     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1496
1497   /* Record the fields for the semantic handler.  */
1498   FLD (f_r2) = f_r2;
1499   FLD (f_r1) = f_r1;
1500   FLD (i_sr) = & CPU (h_gr)[f_r2];
1501   FLD (i_dr) = & CPU (h_gr)[f_r1];
1502   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1503
1504 #if WITH_PROFILE_MODEL_P
1505   /* Record the fields for profiling.  */
1506   if (PROFILE_MODEL_P (current_cpu))
1507     {
1508       FLD (in_sr) = f_r2;
1509       FLD (out_dr) = f_r1;
1510     }
1511 #endif
1512 #undef FLD
1513     return idesc;
1514   }
1515
1516  extract_sfmt_machi:
1517   {
1518     const IDESC *idesc = &m32rbf_insn_data[itype];
1519     CGEN_INSN_WORD insn = entire_insn;
1520 #define FLD(f) abuf->fields.sfmt_st_plus.f
1521     UINT f_r1;
1522     UINT f_r2;
1523
1524     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1525     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1526
1527   /* Record the fields for the semantic handler.  */
1528   FLD (f_r1) = f_r1;
1529   FLD (f_r2) = f_r2;
1530   FLD (i_src1) = & CPU (h_gr)[f_r1];
1531   FLD (i_src2) = & CPU (h_gr)[f_r2];
1532   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1533
1534 #if WITH_PROFILE_MODEL_P
1535   /* Record the fields for profiling.  */
1536   if (PROFILE_MODEL_P (current_cpu))
1537     {
1538       FLD (in_src1) = f_r1;
1539       FLD (in_src2) = f_r2;
1540     }
1541 #endif
1542 #undef FLD
1543     return idesc;
1544   }
1545
1546  extract_sfmt_mulhi:
1547   {
1548     const IDESC *idesc = &m32rbf_insn_data[itype];
1549     CGEN_INSN_WORD insn = entire_insn;
1550 #define FLD(f) abuf->fields.sfmt_st_plus.f
1551     UINT f_r1;
1552     UINT f_r2;
1553
1554     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1555     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1556
1557   /* Record the fields for the semantic handler.  */
1558   FLD (f_r1) = f_r1;
1559   FLD (f_r2) = f_r2;
1560   FLD (i_src1) = & CPU (h_gr)[f_r1];
1561   FLD (i_src2) = & CPU (h_gr)[f_r2];
1562   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1563
1564 #if WITH_PROFILE_MODEL_P
1565   /* Record the fields for profiling.  */
1566   if (PROFILE_MODEL_P (current_cpu))
1567     {
1568       FLD (in_src1) = f_r1;
1569       FLD (in_src2) = f_r2;
1570     }
1571 #endif
1572 #undef FLD
1573     return idesc;
1574   }
1575
1576  extract_sfmt_mv:
1577   {
1578     const IDESC *idesc = &m32rbf_insn_data[itype];
1579     CGEN_INSN_WORD insn = entire_insn;
1580 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1581     UINT f_r1;
1582     UINT f_r2;
1583
1584     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1585     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1586
1587   /* Record the fields for the semantic handler.  */
1588   FLD (f_r2) = f_r2;
1589   FLD (f_r1) = f_r1;
1590   FLD (i_sr) = & CPU (h_gr)[f_r2];
1591   FLD (i_dr) = & CPU (h_gr)[f_r1];
1592   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1593
1594 #if WITH_PROFILE_MODEL_P
1595   /* Record the fields for profiling.  */
1596   if (PROFILE_MODEL_P (current_cpu))
1597     {
1598       FLD (in_sr) = f_r2;
1599       FLD (out_dr) = f_r1;
1600     }
1601 #endif
1602 #undef FLD
1603     return idesc;
1604   }
1605
1606  extract_sfmt_mvfachi:
1607   {
1608     const IDESC *idesc = &m32rbf_insn_data[itype];
1609     CGEN_INSN_WORD insn = entire_insn;
1610 #define FLD(f) abuf->fields.sfmt_seth.f
1611     UINT f_r1;
1612
1613     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1614
1615   /* Record the fields for the semantic handler.  */
1616   FLD (f_r1) = f_r1;
1617   FLD (i_dr) = & CPU (h_gr)[f_r1];
1618   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1619
1620 #if WITH_PROFILE_MODEL_P
1621   /* Record the fields for profiling.  */
1622   if (PROFILE_MODEL_P (current_cpu))
1623     {
1624       FLD (out_dr) = f_r1;
1625     }
1626 #endif
1627 #undef FLD
1628     return idesc;
1629   }
1630
1631  extract_sfmt_mvfc:
1632   {
1633     const IDESC *idesc = &m32rbf_insn_data[itype];
1634     CGEN_INSN_WORD insn = entire_insn;
1635 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1636     UINT f_r1;
1637     UINT f_r2;
1638
1639     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1640     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1641
1642   /* Record the fields for the semantic handler.  */
1643   FLD (f_r2) = f_r2;
1644   FLD (f_r1) = f_r1;
1645   FLD (i_dr) = & CPU (h_gr)[f_r1];
1646   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1647
1648 #if WITH_PROFILE_MODEL_P
1649   /* Record the fields for profiling.  */
1650   if (PROFILE_MODEL_P (current_cpu))
1651     {
1652       FLD (out_dr) = f_r1;
1653     }
1654 #endif
1655 #undef FLD
1656     return idesc;
1657   }
1658
1659  extract_sfmt_mvtachi:
1660   {
1661     const IDESC *idesc = &m32rbf_insn_data[itype];
1662     CGEN_INSN_WORD insn = entire_insn;
1663 #define FLD(f) abuf->fields.sfmt_st_plus.f
1664     UINT f_r1;
1665
1666     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1667
1668   /* Record the fields for the semantic handler.  */
1669   FLD (f_r1) = f_r1;
1670   FLD (i_src1) = & CPU (h_gr)[f_r1];
1671   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0));
1672
1673 #if WITH_PROFILE_MODEL_P
1674   /* Record the fields for profiling.  */
1675   if (PROFILE_MODEL_P (current_cpu))
1676     {
1677       FLD (in_src1) = f_r1;
1678     }
1679 #endif
1680 #undef FLD
1681     return idesc;
1682   }
1683
1684  extract_sfmt_mvtc:
1685   {
1686     const IDESC *idesc = &m32rbf_insn_data[itype];
1687     CGEN_INSN_WORD insn = entire_insn;
1688 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1689     UINT f_r1;
1690     UINT f_r2;
1691
1692     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1693     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1694
1695   /* Record the fields for the semantic handler.  */
1696   FLD (f_r2) = f_r2;
1697   FLD (f_r1) = f_r1;
1698   FLD (i_sr) = & CPU (h_gr)[f_r2];
1699   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
1700
1701 #if WITH_PROFILE_MODEL_P
1702   /* Record the fields for profiling.  */
1703   if (PROFILE_MODEL_P (current_cpu))
1704     {
1705       FLD (in_sr) = f_r2;
1706     }
1707 #endif
1708 #undef FLD
1709     return idesc;
1710   }
1711
1712  extract_sfmt_nop:
1713   {
1714     const IDESC *idesc = &m32rbf_insn_data[itype];
1715 #define FLD(f) abuf->fields.sfmt_empty.f
1716
1717
1718   /* Record the fields for the semantic handler.  */
1719   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0));
1720
1721 #undef FLD
1722     return idesc;
1723   }
1724
1725  extract_sfmt_rac:
1726   {
1727     const IDESC *idesc = &m32rbf_insn_data[itype];
1728 #define FLD(f) abuf->fields.sfmt_empty.f
1729
1730
1731   /* Record the fields for the semantic handler.  */
1732   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0));
1733
1734 #undef FLD
1735     return idesc;
1736   }
1737
1738  extract_sfmt_rte:
1739   {
1740     const IDESC *idesc = &m32rbf_insn_data[itype];
1741 #define FLD(f) abuf->fields.sfmt_empty.f
1742
1743
1744   /* Record the fields for the semantic handler.  */
1745   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0));
1746
1747 #if WITH_PROFILE_MODEL_P
1748   /* Record the fields for profiling.  */
1749   if (PROFILE_MODEL_P (current_cpu))
1750     {
1751     }
1752 #endif
1753 #undef FLD
1754     return idesc;
1755   }
1756
1757  extract_sfmt_seth:
1758   {
1759     const IDESC *idesc = &m32rbf_insn_data[itype];
1760     CGEN_INSN_WORD insn = entire_insn;
1761 #define FLD(f) abuf->fields.sfmt_seth.f
1762     UINT f_r1;
1763     UINT f_hi16;
1764
1765     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1766     f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
1767
1768   /* Record the fields for the semantic handler.  */
1769   FLD (f_hi16) = f_hi16;
1770   FLD (f_r1) = f_r1;
1771   FLD (i_dr) = & CPU (h_gr)[f_r1];
1772   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
1773
1774 #if WITH_PROFILE_MODEL_P
1775   /* Record the fields for profiling.  */
1776   if (PROFILE_MODEL_P (current_cpu))
1777     {
1778       FLD (out_dr) = f_r1;
1779     }
1780 #endif
1781 #undef FLD
1782     return idesc;
1783   }
1784
1785  extract_sfmt_sll3:
1786   {
1787     const IDESC *idesc = &m32rbf_insn_data[itype];
1788     CGEN_INSN_WORD insn = entire_insn;
1789 #define FLD(f) abuf->fields.sfmt_add3.f
1790     UINT f_r1;
1791     UINT f_r2;
1792     INT f_simm16;
1793
1794     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1795     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1796     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1797
1798   /* Record the fields for the semantic handler.  */
1799   FLD (f_simm16) = f_simm16;
1800   FLD (f_r2) = f_r2;
1801   FLD (f_r1) = f_r1;
1802   FLD (i_sr) = & CPU (h_gr)[f_r2];
1803   FLD (i_dr) = & CPU (h_gr)[f_r1];
1804   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
1805
1806 #if WITH_PROFILE_MODEL_P
1807   /* Record the fields for profiling.  */
1808   if (PROFILE_MODEL_P (current_cpu))
1809     {
1810       FLD (in_sr) = f_r2;
1811       FLD (out_dr) = f_r1;
1812     }
1813 #endif
1814 #undef FLD
1815     return idesc;
1816   }
1817
1818  extract_sfmt_slli:
1819   {
1820     const IDESC *idesc = &m32rbf_insn_data[itype];
1821     CGEN_INSN_WORD insn = entire_insn;
1822 #define FLD(f) abuf->fields.sfmt_slli.f
1823     UINT f_r1;
1824     UINT f_uimm5;
1825
1826     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1827     f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5);
1828
1829   /* Record the fields for the semantic handler.  */
1830   FLD (f_r1) = f_r1;
1831   FLD (f_uimm5) = f_uimm5;
1832   FLD (i_dr) = & CPU (h_gr)[f_r1];
1833   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0));
1834
1835 #if WITH_PROFILE_MODEL_P
1836   /* Record the fields for profiling.  */
1837   if (PROFILE_MODEL_P (current_cpu))
1838     {
1839       FLD (in_dr) = f_r1;
1840       FLD (out_dr) = f_r1;
1841     }
1842 #endif
1843 #undef FLD
1844     return idesc;
1845   }
1846
1847  extract_sfmt_st:
1848   {
1849     const IDESC *idesc = &m32rbf_insn_data[itype];
1850     CGEN_INSN_WORD insn = entire_insn;
1851 #define FLD(f) abuf->fields.sfmt_st_plus.f
1852     UINT f_r1;
1853     UINT f_r2;
1854
1855     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1856     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1857
1858   /* Record the fields for the semantic handler.  */
1859   FLD (f_r1) = f_r1;
1860   FLD (f_r2) = f_r2;
1861   FLD (i_src1) = & CPU (h_gr)[f_r1];
1862   FLD (i_src2) = & CPU (h_gr)[f_r2];
1863   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1864
1865 #if WITH_PROFILE_MODEL_P
1866   /* Record the fields for profiling.  */
1867   if (PROFILE_MODEL_P (current_cpu))
1868     {
1869       FLD (in_src1) = f_r1;
1870       FLD (in_src2) = f_r2;
1871     }
1872 #endif
1873 #undef FLD
1874     return idesc;
1875   }
1876
1877  extract_sfmt_st_d:
1878   {
1879     const IDESC *idesc = &m32rbf_insn_data[itype];
1880     CGEN_INSN_WORD insn = entire_insn;
1881 #define FLD(f) abuf->fields.sfmt_st_d.f
1882     UINT f_r1;
1883     UINT f_r2;
1884     INT f_simm16;
1885
1886     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1887     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1888     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1889
1890   /* Record the fields for the semantic handler.  */
1891   FLD (f_simm16) = f_simm16;
1892   FLD (f_r1) = f_r1;
1893   FLD (f_r2) = f_r2;
1894   FLD (i_src1) = & CPU (h_gr)[f_r1];
1895   FLD (i_src2) = & CPU (h_gr)[f_r2];
1896   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1897
1898 #if WITH_PROFILE_MODEL_P
1899   /* Record the fields for profiling.  */
1900   if (PROFILE_MODEL_P (current_cpu))
1901     {
1902       FLD (in_src1) = f_r1;
1903       FLD (in_src2) = f_r2;
1904     }
1905 #endif
1906 #undef FLD
1907     return idesc;
1908   }
1909
1910  extract_sfmt_stb:
1911   {
1912     const IDESC *idesc = &m32rbf_insn_data[itype];
1913     CGEN_INSN_WORD insn = entire_insn;
1914 #define FLD(f) abuf->fields.sfmt_st_plus.f
1915     UINT f_r1;
1916     UINT f_r2;
1917
1918     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1919     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1920
1921   /* Record the fields for the semantic handler.  */
1922   FLD (f_r1) = f_r1;
1923   FLD (f_r2) = f_r2;
1924   FLD (i_src1) = & CPU (h_gr)[f_r1];
1925   FLD (i_src2) = & CPU (h_gr)[f_r2];
1926   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1927
1928 #if WITH_PROFILE_MODEL_P
1929   /* Record the fields for profiling.  */
1930   if (PROFILE_MODEL_P (current_cpu))
1931     {
1932       FLD (in_src1) = f_r1;
1933       FLD (in_src2) = f_r2;
1934     }
1935 #endif
1936 #undef FLD
1937     return idesc;
1938   }
1939
1940  extract_sfmt_stb_d:
1941   {
1942     const IDESC *idesc = &m32rbf_insn_data[itype];
1943     CGEN_INSN_WORD insn = entire_insn;
1944 #define FLD(f) abuf->fields.sfmt_st_d.f
1945     UINT f_r1;
1946     UINT f_r2;
1947     INT f_simm16;
1948
1949     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
1950     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
1951     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
1952
1953   /* Record the fields for the semantic handler.  */
1954   FLD (f_simm16) = f_simm16;
1955   FLD (f_r1) = f_r1;
1956   FLD (f_r2) = f_r2;
1957   FLD (i_src1) = & CPU (h_gr)[f_r1];
1958   FLD (i_src2) = & CPU (h_gr)[f_r2];
1959   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1960
1961 #if WITH_PROFILE_MODEL_P
1962   /* Record the fields for profiling.  */
1963   if (PROFILE_MODEL_P (current_cpu))
1964     {
1965       FLD (in_src1) = f_r1;
1966       FLD (in_src2) = f_r2;
1967     }
1968 #endif
1969 #undef FLD
1970     return idesc;
1971   }
1972
1973  extract_sfmt_sth:
1974   {
1975     const IDESC *idesc = &m32rbf_insn_data[itype];
1976     CGEN_INSN_WORD insn = entire_insn;
1977 #define FLD(f) abuf->fields.sfmt_st_plus.f
1978     UINT f_r1;
1979     UINT f_r2;
1980
1981     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
1982     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
1983
1984   /* Record the fields for the semantic handler.  */
1985   FLD (f_r1) = f_r1;
1986   FLD (f_r2) = f_r2;
1987   FLD (i_src1) = & CPU (h_gr)[f_r1];
1988   FLD (i_src2) = & CPU (h_gr)[f_r2];
1989   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
1990
1991 #if WITH_PROFILE_MODEL_P
1992   /* Record the fields for profiling.  */
1993   if (PROFILE_MODEL_P (current_cpu))
1994     {
1995       FLD (in_src1) = f_r1;
1996       FLD (in_src2) = f_r2;
1997     }
1998 #endif
1999 #undef FLD
2000     return idesc;
2001   }
2002
2003  extract_sfmt_sth_d:
2004   {
2005     const IDESC *idesc = &m32rbf_insn_data[itype];
2006     CGEN_INSN_WORD insn = entire_insn;
2007 #define FLD(f) abuf->fields.sfmt_st_d.f
2008     UINT f_r1;
2009     UINT f_r2;
2010     INT f_simm16;
2011
2012     f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
2013     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2014     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2015
2016   /* Record the fields for the semantic handler.  */
2017   FLD (f_simm16) = f_simm16;
2018   FLD (f_r1) = f_r1;
2019   FLD (f_r2) = f_r2;
2020   FLD (i_src1) = & CPU (h_gr)[f_r1];
2021   FLD (i_src2) = & CPU (h_gr)[f_r2];
2022   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
2023
2024 #if WITH_PROFILE_MODEL_P
2025   /* Record the fields for profiling.  */
2026   if (PROFILE_MODEL_P (current_cpu))
2027     {
2028       FLD (in_src1) = f_r1;
2029       FLD (in_src2) = f_r2;
2030     }
2031 #endif
2032 #undef FLD
2033     return idesc;
2034   }
2035
2036  extract_sfmt_st_plus:
2037   {
2038     const IDESC *idesc = &m32rbf_insn_data[itype];
2039     CGEN_INSN_WORD insn = entire_insn;
2040 #define FLD(f) abuf->fields.sfmt_st_plus.f
2041     UINT f_r1;
2042     UINT f_r2;
2043
2044     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
2045     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
2046
2047   /* Record the fields for the semantic handler.  */
2048   FLD (f_r1) = f_r1;
2049   FLD (f_r2) = f_r2;
2050   FLD (i_src1) = & CPU (h_gr)[f_r1];
2051   FLD (i_src2) = & CPU (h_gr)[f_r2];
2052   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
2053
2054 #if WITH_PROFILE_MODEL_P
2055   /* Record the fields for profiling.  */
2056   if (PROFILE_MODEL_P (current_cpu))
2057     {
2058       FLD (in_src1) = f_r1;
2059       FLD (in_src2) = f_r2;
2060       FLD (out_src2) = f_r2;
2061     }
2062 #endif
2063 #undef FLD
2064     return idesc;
2065   }
2066
2067  extract_sfmt_trap:
2068   {
2069     const IDESC *idesc = &m32rbf_insn_data[itype];
2070     CGEN_INSN_WORD insn = entire_insn;
2071 #define FLD(f) abuf->fields.sfmt_trap.f
2072     UINT f_uimm4;
2073
2074     f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
2075
2076   /* Record the fields for the semantic handler.  */
2077   FLD (f_uimm4) = f_uimm4;
2078   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0));
2079
2080 #if WITH_PROFILE_MODEL_P
2081   /* Record the fields for profiling.  */
2082   if (PROFILE_MODEL_P (current_cpu))
2083     {
2084     }
2085 #endif
2086 #undef FLD
2087     return idesc;
2088   }
2089
2090  extract_sfmt_unlock:
2091   {
2092     const IDESC *idesc = &m32rbf_insn_data[itype];
2093     CGEN_INSN_WORD insn = entire_insn;
2094 #define FLD(f) abuf->fields.sfmt_st_plus.f
2095     UINT f_r1;
2096     UINT f_r2;
2097
2098     f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
2099     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
2100
2101   /* Record the fields for the semantic handler.  */
2102   FLD (f_r1) = f_r1;
2103   FLD (f_r2) = f_r2;
2104   FLD (i_src1) = & CPU (h_gr)[f_r1];
2105   FLD (i_src2) = & CPU (h_gr)[f_r2];
2106   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
2107
2108 #if WITH_PROFILE_MODEL_P
2109   /* Record the fields for profiling.  */
2110   if (PROFILE_MODEL_P (current_cpu))
2111     {
2112       FLD (in_src1) = f_r1;
2113       FLD (in_src2) = f_r2;
2114     }
2115 #endif
2116 #undef FLD
2117     return idesc;
2118   }
2119
2120  extract_sfmt_clrpsw:
2121   {
2122     const IDESC *idesc = &m32rbf_insn_data[itype];
2123     CGEN_INSN_WORD insn = entire_insn;
2124 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2125     UINT f_uimm8;
2126
2127     f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
2128
2129   /* Record the fields for the semantic handler.  */
2130   FLD (f_uimm8) = f_uimm8;
2131   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0));
2132
2133 #undef FLD
2134     return idesc;
2135   }
2136
2137  extract_sfmt_setpsw:
2138   {
2139     const IDESC *idesc = &m32rbf_insn_data[itype];
2140     CGEN_INSN_WORD insn = entire_insn;
2141 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2142     UINT f_uimm8;
2143
2144     f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
2145
2146   /* Record the fields for the semantic handler.  */
2147   FLD (f_uimm8) = f_uimm8;
2148   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0));
2149
2150 #undef FLD
2151     return idesc;
2152   }
2153
2154  extract_sfmt_bset:
2155   {
2156     const IDESC *idesc = &m32rbf_insn_data[itype];
2157     CGEN_INSN_WORD insn = entire_insn;
2158 #define FLD(f) abuf->fields.sfmt_bset.f
2159     UINT f_uimm3;
2160     UINT f_r2;
2161     INT f_simm16;
2162
2163     f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3);
2164     f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
2165     f_simm16 = EXTRACT_MSB0_SINT (insn, 32, 16, 16);
2166
2167   /* Record the fields for the semantic handler.  */
2168   FLD (f_simm16) = f_simm16;
2169   FLD (f_r2) = f_r2;
2170   FLD (f_uimm3) = f_uimm3;
2171   FLD (i_sr) = & CPU (h_gr)[f_r2];
2172   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0));
2173
2174 #if WITH_PROFILE_MODEL_P
2175   /* Record the fields for profiling.  */
2176   if (PROFILE_MODEL_P (current_cpu))
2177     {
2178       FLD (in_sr) = f_r2;
2179     }
2180 #endif
2181 #undef FLD
2182     return idesc;
2183   }
2184
2185  extract_sfmt_btst:
2186   {
2187     const IDESC *idesc = &m32rbf_insn_data[itype];
2188     CGEN_INSN_WORD insn = entire_insn;
2189 #define FLD(f) abuf->fields.sfmt_bset.f
2190     UINT f_uimm3;
2191     UINT f_r2;
2192
2193     f_uimm3 = EXTRACT_MSB0_UINT (insn, 16, 5, 3);
2194     f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
2195
2196   /* Record the fields for the semantic handler.  */
2197   FLD (f_r2) = f_r2;
2198   FLD (f_uimm3) = f_uimm3;
2199   FLD (i_sr) = & CPU (h_gr)[f_r2];
2200   TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0));
2201
2202 #if WITH_PROFILE_MODEL_P
2203   /* Record the fields for profiling.  */
2204   if (PROFILE_MODEL_P (current_cpu))
2205     {
2206       FLD (in_sr) = f_r2;
2207     }
2208 #endif
2209 #undef FLD
2210     return idesc;
2211   }
2212
2213 }