sim/m32r/sem2-switch.c

   1 /* Simulator instruction semantics for m32r2f.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2013 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, see <http://www.gnu.org/licenses/>.
  21
  22 */
  23
  24 #ifdef DEFINE_LABELS
  25
  26   /* The labels have the case they have because the enum of insn types
  27      is all uppercase and in the non-stdc case the insn symbol is built
  28      into the enum name.  */
  29
  30   static struct {
  31     int index;
  32     void *label;
  33   } labels[] = {
  34     { M32R2F_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  35     { M32R2F_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  36     { M32R2F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  37     { M32R2F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  38     { M32R2F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  39     { M32R2F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  40     { M32R2F_INSN_ADD, && case_sem_INSN_ADD },
  41     { M32R2F_INSN_ADD3, && case_sem_INSN_ADD3 },
  42     { M32R2F_INSN_AND, && case_sem_INSN_AND },
  43     { M32R2F_INSN_AND3, && case_sem_INSN_AND3 },
  44     { M32R2F_INSN_OR, && case_sem_INSN_OR },
  45     { M32R2F_INSN_OR3, && case_sem_INSN_OR3 },
  46     { M32R2F_INSN_XOR, && case_sem_INSN_XOR },
  47     { M32R2F_INSN_XOR3, && case_sem_INSN_XOR3 },
  48     { M32R2F_INSN_ADDI, && case_sem_INSN_ADDI },
  49     { M32R2F_INSN_ADDV, && case_sem_INSN_ADDV },
  50     { M32R2F_INSN_ADDV3, && case_sem_INSN_ADDV3 },
  51     { M32R2F_INSN_ADDX, && case_sem_INSN_ADDX },
  52     { M32R2F_INSN_BC8, && case_sem_INSN_BC8 },
  53     { M32R2F_INSN_BC24, && case_sem_INSN_BC24 },
  54     { M32R2F_INSN_BEQ, && case_sem_INSN_BEQ },
  55     { M32R2F_INSN_BEQZ, && case_sem_INSN_BEQZ },
  56     { M32R2F_INSN_BGEZ, && case_sem_INSN_BGEZ },
  57     { M32R2F_INSN_BGTZ, && case_sem_INSN_BGTZ },
  58     { M32R2F_INSN_BLEZ, && case_sem_INSN_BLEZ },
  59     { M32R2F_INSN_BLTZ, && case_sem_INSN_BLTZ },
  60     { M32R2F_INSN_BNEZ, && case_sem_INSN_BNEZ },
  61     { M32R2F_INSN_BL8, && case_sem_INSN_BL8 },
  62     { M32R2F_INSN_BL24, && case_sem_INSN_BL24 },
  63     { M32R2F_INSN_BCL8, && case_sem_INSN_BCL8 },
  64     { M32R2F_INSN_BCL24, && case_sem_INSN_BCL24 },
  65     { M32R2F_INSN_BNC8, && case_sem_INSN_BNC8 },
  66     { M32R2F_INSN_BNC24, && case_sem_INSN_BNC24 },
  67     { M32R2F_INSN_BNE, && case_sem_INSN_BNE },
  68     { M32R2F_INSN_BRA8, && case_sem_INSN_BRA8 },
  69     { M32R2F_INSN_BRA24, && case_sem_INSN_BRA24 },
  70     { M32R2F_INSN_BNCL8, && case_sem_INSN_BNCL8 },
  71     { M32R2F_INSN_BNCL24, && case_sem_INSN_BNCL24 },
  72     { M32R2F_INSN_CMP, && case_sem_INSN_CMP },
  73     { M32R2F_INSN_CMPI, && case_sem_INSN_CMPI },
  74     { M32R2F_INSN_CMPU, && case_sem_INSN_CMPU },
  75     { M32R2F_INSN_CMPUI, && case_sem_INSN_CMPUI },
  76     { M32R2F_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
  77     { M32R2F_INSN_CMPZ, && case_sem_INSN_CMPZ },
  78     { M32R2F_INSN_DIV, && case_sem_INSN_DIV },
  79     { M32R2F_INSN_DIVU, && case_sem_INSN_DIVU },
  80     { M32R2F_INSN_REM, && case_sem_INSN_REM },
  81     { M32R2F_INSN_REMU, && case_sem_INSN_REMU },
  82     { M32R2F_INSN_REMH, && case_sem_INSN_REMH },
  83     { M32R2F_INSN_REMUH, && case_sem_INSN_REMUH },
  84     { M32R2F_INSN_REMB, && case_sem_INSN_REMB },
  85     { M32R2F_INSN_REMUB, && case_sem_INSN_REMUB },
  86     { M32R2F_INSN_DIVUH, && case_sem_INSN_DIVUH },
  87     { M32R2F_INSN_DIVB, && case_sem_INSN_DIVB },
  88     { M32R2F_INSN_DIVUB, && case_sem_INSN_DIVUB },
  89     { M32R2F_INSN_DIVH, && case_sem_INSN_DIVH },
  90     { M32R2F_INSN_JC, && case_sem_INSN_JC },
  91     { M32R2F_INSN_JNC, && case_sem_INSN_JNC },
  92     { M32R2F_INSN_JL, && case_sem_INSN_JL },
  93     { M32R2F_INSN_JMP, && case_sem_INSN_JMP },
  94     { M32R2F_INSN_LD, && case_sem_INSN_LD },
  95     { M32R2F_INSN_LD_D, && case_sem_INSN_LD_D },
  96     { M32R2F_INSN_LDB, && case_sem_INSN_LDB },
  97     { M32R2F_INSN_LDB_D, && case_sem_INSN_LDB_D },
  98     { M32R2F_INSN_LDH, && case_sem_INSN_LDH },
  99     { M32R2F_INSN_LDH_D, && case_sem_INSN_LDH_D },
 100     { M32R2F_INSN_LDUB, && case_sem_INSN_LDUB },
 101     { M32R2F_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
 102     { M32R2F_INSN_LDUH, && case_sem_INSN_LDUH },
 103     { M32R2F_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
 104     { M32R2F_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
 105     { M32R2F_INSN_LD24, && case_sem_INSN_LD24 },
 106     { M32R2F_INSN_LDI8, && case_sem_INSN_LDI8 },
 107     { M32R2F_INSN_LDI16, && case_sem_INSN_LDI16 },
 108     { M32R2F_INSN_LOCK, && case_sem_INSN_LOCK },
 109     { M32R2F_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
 110     { M32R2F_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
 111     { M32R2F_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
 112     { M32R2F_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
 113     { M32R2F_INSN_MUL, && case_sem_INSN_MUL },
 114     { M32R2F_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
 115     { M32R2F_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
 116     { M32R2F_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
 117     { M32R2F_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
 118     { M32R2F_INSN_MV, && case_sem_INSN_MV },
 119     { M32R2F_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
 120     { M32R2F_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
 121     { M32R2F_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
 122     { M32R2F_INSN_MVFC, && case_sem_INSN_MVFC },
 123     { M32R2F_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
 124     { M32R2F_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
 125     { M32R2F_INSN_MVTC, && case_sem_INSN_MVTC },
 126     { M32R2F_INSN_NEG, && case_sem_INSN_NEG },
 127     { M32R2F_INSN_NOP, && case_sem_INSN_NOP },
 128     { M32R2F_INSN_NOT, && case_sem_INSN_NOT },
 129     { M32R2F_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
 130     { M32R2F_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
 131     { M32R2F_INSN_RTE, && case_sem_INSN_RTE },
 132     { M32R2F_INSN_SETH, && case_sem_INSN_SETH },
 133     { M32R2F_INSN_SLL, && case_sem_INSN_SLL },
 134     { M32R2F_INSN_SLL3, && case_sem_INSN_SLL3 },
 135     { M32R2F_INSN_SLLI, && case_sem_INSN_SLLI },
 136     { M32R2F_INSN_SRA, && case_sem_INSN_SRA },
 137     { M32R2F_INSN_SRA3, && case_sem_INSN_SRA3 },
 138     { M32R2F_INSN_SRAI, && case_sem_INSN_SRAI },
 139     { M32R2F_INSN_SRL, && case_sem_INSN_SRL },
 140     { M32R2F_INSN_SRL3, && case_sem_INSN_SRL3 },
 141     { M32R2F_INSN_SRLI, && case_sem_INSN_SRLI },
 142     { M32R2F_INSN_ST, && case_sem_INSN_ST },
 143     { M32R2F_INSN_ST_D, && case_sem_INSN_ST_D },
 144     { M32R2F_INSN_STB, && case_sem_INSN_STB },
 145     { M32R2F_INSN_STB_D, && case_sem_INSN_STB_D },
 146     { M32R2F_INSN_STH, && case_sem_INSN_STH },
 147     { M32R2F_INSN_STH_D, && case_sem_INSN_STH_D },
 148     { M32R2F_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
 149     { M32R2F_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS },
 150     { M32R2F_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS },
 151     { M32R2F_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
 152     { M32R2F_INSN_SUB, && case_sem_INSN_SUB },
 153     { M32R2F_INSN_SUBV, && case_sem_INSN_SUBV },
 154     { M32R2F_INSN_SUBX, && case_sem_INSN_SUBX },
 155     { M32R2F_INSN_TRAP, && case_sem_INSN_TRAP },
 156     { M32R2F_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
 157     { M32R2F_INSN_SATB, && case_sem_INSN_SATB },
 158     { M32R2F_INSN_SATH, && case_sem_INSN_SATH },
 159     { M32R2F_INSN_SAT, && case_sem_INSN_SAT },
 160     { M32R2F_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
 161     { M32R2F_INSN_SADD, && case_sem_INSN_SADD },
 162     { M32R2F_INSN_MACWU1, && case_sem_INSN_MACWU1 },
 163     { M32R2F_INSN_MSBLO, && case_sem_INSN_MSBLO },
 164     { M32R2F_INSN_MULWU1, && case_sem_INSN_MULWU1 },
 165     { M32R2F_INSN_MACLH1, && case_sem_INSN_MACLH1 },
 166     { M32R2F_INSN_SC, && case_sem_INSN_SC },
 167     { M32R2F_INSN_SNC, && case_sem_INSN_SNC },
 168     { M32R2F_INSN_CLRPSW, && case_sem_INSN_CLRPSW },
 169     { M32R2F_INSN_SETPSW, && case_sem_INSN_SETPSW },
 170     { M32R2F_INSN_BSET, && case_sem_INSN_BSET },
 171     { M32R2F_INSN_BCLR, && case_sem_INSN_BCLR },
 172     { M32R2F_INSN_BTST, && case_sem_INSN_BTST },
 173     { M32R2F_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
 174     { M32R2F_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
 175     { M32R2F_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
 176     { M32R2F_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
 177     { M32R2F_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
 178     { M32R2F_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
 179     { M32R2F_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
 180     { M32R2F_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
 181     { M32R2F_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
 182     { M32R2F_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
 183     { M32R2F_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
 184     { M32R2F_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
 185     { M32R2F_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
 186     { M32R2F_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
 187     { M32R2F_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
 188     { M32R2F_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
 189     { M32R2F_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
 190     { M32R2F_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
 191     { M32R2F_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
 192     { M32R2F_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
 193     { M32R2F_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
 194     { M32R2F_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
 195     { M32R2F_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
 196     { M32R2F_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
 197     { M32R2F_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
 198     { M32R2F_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
 199     { M32R2F_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
 200     { M32R2F_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
 201     { M32R2F_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
 202     { M32R2F_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
 203     { M32R2F_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
 204     { M32R2F_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
 205     { M32R2F_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
 206     { M32R2F_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
 207     { M32R2F_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
 208     { M32R2F_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
 209     { M32R2F_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
 210     { M32R2F_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
 211     { M32R2F_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
 212     { M32R2F_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
 213     { M32R2F_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
 214     { M32R2F_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
 215     { M32R2F_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
 216     { M32R2F_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
 217     { M32R2F_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
 218     { M32R2F_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
 219     { M32R2F_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
 220     { M32R2F_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
 221     { M32R2F_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
 222     { M32R2F_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
 223     { M32R2F_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
 224     { M32R2F_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
 225     { M32R2F_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
 226     { M32R2F_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
 227     { M32R2F_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
 228     { M32R2F_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
 229     { M32R2F_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
 230     { M32R2F_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
 231     { M32R2F_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
 232     { M32R2F_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
 233     { M32R2F_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
 234     { M32R2F_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
 235     { M32R2F_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
 236     { M32R2F_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
 237     { M32R2F_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
 238     { M32R2F_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
 239     { M32R2F_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
 240     { M32R2F_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
 241     { M32R2F_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
 242     { M32R2F_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
 243     { M32R2F_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
 244     { M32R2F_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
 245     { M32R2F_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
 246     { M32R2F_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
 247     { M32R2F_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
 248     { M32R2F_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
 249     { M32R2F_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
 250     { M32R2F_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
 251     { M32R2F_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
 252     { M32R2F_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
 253     { M32R2F_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
 254     { M32R2F_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
 255     { M32R2F_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
 256     { M32R2F_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
 257     { M32R2F_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
 258     { M32R2F_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
 259     { M32R2F_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
 260     { M32R2F_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
 261     { M32R2F_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
 262     { M32R2F_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
 263     { M32R2F_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
 264     { M32R2F_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
 265     { M32R2F_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
 266     { M32R2F_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
 267     { M32R2F_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
 268     { M32R2F_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
 269     { M32R2F_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
 270     { M32R2F_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
 271     { M32R2F_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
 272     { M32R2F_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
 273     { M32R2F_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
 274     { M32R2F_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
 275     { M32R2F_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
 276     { M32R2F_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
 277     { M32R2F_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
 278     { M32R2F_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
 279     { M32R2F_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
 280     { M32R2F_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
 281     { M32R2F_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
 282     { M32R2F_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
 283     { M32R2F_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
 284     { M32R2F_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
 285     { M32R2F_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
 286     { M32R2F_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
 287     { M32R2F_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
 288     { M32R2F_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
 289     { M32R2F_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
 290     { M32R2F_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
 291     { M32R2F_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
 292     { M32R2F_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
 293     { M32R2F_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
 294     { M32R2F_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
 295     { M32R2F_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
 296     { M32R2F_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
 297     { M32R2F_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS },
 298     { M32R2F_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS },
 299     { M32R2F_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS },
 300     { M32R2F_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS },
 301     { M32R2F_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
 302     { M32R2F_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
 303     { M32R2F_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
 304     { M32R2F_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
 305     { M32R2F_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
 306     { M32R2F_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
 307     { M32R2F_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
 308     { M32R2F_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
 309     { M32R2F_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
 310     { M32R2F_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
 311     { M32R2F_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
 312     { M32R2F_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
 313     { M32R2F_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
 314     { M32R2F_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
 315     { M32R2F_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
 316     { M32R2F_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
 317     { M32R2F_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
 318     { M32R2F_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
 319     { M32R2F_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
 320     { M32R2F_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
 321     { M32R2F_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
 322     { M32R2F_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
 323     { M32R2F_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
 324     { M32R2F_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
 325     { M32R2F_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
 326     { M32R2F_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
 327     { M32R2F_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
 328     { M32R2F_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
 329     { M32R2F_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW },
 330     { M32R2F_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW },
 331     { M32R2F_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW },
 332     { M32R2F_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW },
 333     { M32R2F_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST },
 334     { M32R2F_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST },
 335     { 0, 0 }
 336   };
 337   int i;
 338
 339   for (i = 0; labels[i].label != 0; ++i)
 340     {
 341 #if FAST_P
 342       CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 343 #else
 344       CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 345 #endif
 346     }
 347
 348 #undef DEFINE_LABELS
 349 #endif /* DEFINE_LABELS */
 350
 351 #ifdef DEFINE_SWITCH
 352
 353 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 354    off frills like tracing and profiling.  */
 355 /* FIXME: A better way would be to have TRACE_RESULT check for something
 356    that can cause it to be optimized out.  Another way would be to emit
 357    special handlers into the instruction "stream".  */
 358
 359 #if FAST_P
 360 #undef TRACE_RESULT
 361 #define TRACE_RESULT(cpu, abuf, name, type, val)
 362 #endif
 363
 364 #undef GET_ATTR
 365 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 366
 367 {
 368
 369 #if WITH_SCACHE_PBB
 370
 371 /* Branch to next handler without going around main loop.  */
 372 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 373 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 374
 375 #else /* ! WITH_SCACHE_PBB */
 376
 377 #define NEXT(vpc) BREAK (sem)
 378 #ifdef __GNUC__
 379 #if FAST_P
 380   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 381 #else
 382   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 383 #endif
 384 #else
 385   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 386 #endif
 387
 388 #endif /* ! WITH_SCACHE_PBB */
 389
 390     {
 391
 392   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 393 {
 394   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 395   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 396 #define FLD(f) abuf->fields.sfmt_empty.f
 397   int UNUSED written = 0;
 398   IADDR UNUSED pc = abuf->addr;
 399   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 400
 401   {
 402     /* Update the recorded pc in the cpu state struct.
 403        Only necessary for WITH_SCACHE case, but to avoid the
 404        conditional compilation ....  */
 405     SET_H_PC (pc);
 406     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
 407        using the default-insn-bitsize spec.  When executing insns in parallel
 408        we may want to queue the fault and continue execution.  */
 409     vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 410     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
 411   }
 412
 413 #undef FLD
 414 }
 415   NEXT (vpc);
 416
 417   CASE (sem, INSN_X_AFTER) : /* --after-- */
 418 {
 419   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 420   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 421 #define FLD(f) abuf->fields.sfmt_empty.f
 422   int UNUSED written = 0;
 423   IADDR UNUSED pc = abuf->addr;
 424   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 425
 426   {
 427 #if WITH_SCACHE_PBB_M32R2F
 428     m32r2f_pbb_after (current_cpu, sem_arg);
 429 #endif
 430   }
 431
 432 #undef FLD
 433 }
 434   NEXT (vpc);
 435
 436   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 437 {
 438   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 439   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 440 #define FLD(f) abuf->fields.sfmt_empty.f
 441   int UNUSED written = 0;
 442   IADDR UNUSED pc = abuf->addr;
 443   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 444
 445   {
 446 #if WITH_SCACHE_PBB_M32R2F
 447     m32r2f_pbb_before (current_cpu, sem_arg);
 448 #endif
 449   }
 450
 451 #undef FLD
 452 }
 453   NEXT (vpc);
 454
 455   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 456 {
 457   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 458   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 459 #define FLD(f) abuf->fields.sfmt_empty.f
 460   int UNUSED written = 0;
 461   IADDR UNUSED pc = abuf->addr;
 462   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 463
 464   {
 465 #if WITH_SCACHE_PBB_M32R2F
 466 #ifdef DEFINE_SWITCH
 467     vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg,
 468                                pbb_br_type, pbb_br_npc);
 469     BREAK (sem);
 470 #else
 471     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 472     vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg,
 473                                CPU_PBB_BR_TYPE (current_cpu),
 474                                CPU_PBB_BR_NPC (current_cpu));
 475 #endif
 476 #endif
 477   }
 478
 479 #undef FLD
 480 }
 481   NEXT (vpc);
 482
 483   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 484 {
 485   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 486   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 487 #define FLD(f) abuf->fields.sfmt_empty.f
 488   int UNUSED written = 0;
 489   IADDR UNUSED pc = abuf->addr;
 490   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 491
 492   {
 493 #if WITH_SCACHE_PBB_M32R2F
 494     vpc = m32r2f_pbb_chain (current_cpu, sem_arg);
 495 #ifdef DEFINE_SWITCH
 496     BREAK (sem);
 497 #endif
 498 #endif
 499   }
 500
 501 #undef FLD
 502 }
 503   NEXT (vpc);
 504
 505   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 506 {
 507   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 508   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 509 #define FLD(f) abuf->fields.sfmt_empty.f
 510   int UNUSED written = 0;
 511   IADDR UNUSED pc = abuf->addr;
 512   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 513
 514   {
 515 #if WITH_SCACHE_PBB_M32R2F
 516 #if defined DEFINE_SWITCH || defined FAST_P
 517     /* In the switch case FAST_P is a constant, allowing several optimizations
 518        in any called inline functions.  */
 519     vpc = m32r2f_pbb_begin (current_cpu, FAST_P);
 520 #else
 521 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 522     vpc = m32r2f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 523 #else
 524     vpc = m32r2f_pbb_begin (current_cpu, 0);
 525 #endif
 526 #endif
 527 #endif
 528   }
 529
 530 #undef FLD
 531 }
 532   NEXT (vpc);
 533
 534   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 535 {
 536   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 537   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 538 #define FLD(f) abuf->fields.sfmt_add.f
 539   int UNUSED written = 0;
 540   IADDR UNUSED pc = abuf->addr;
 541   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 542
 543   {
 544     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 545     * FLD (i_dr) = opval;
 546     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 547   }
 548
 549 #undef FLD
 550 }
 551   NEXT (vpc);
 552
 553   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
 554 {
 555   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 556   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 557 #define FLD(f) abuf->fields.sfmt_add3.f
 558   int UNUSED written = 0;
 559   IADDR UNUSED pc = abuf->addr;
 560   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 561
 562   {
 563     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 564     * FLD (i_dr) = opval;
 565     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 566   }
 567
 568 #undef FLD
 569 }
 570   NEXT (vpc);
 571
 572   CASE (sem, INSN_AND) : /* and $dr,$sr */
 573 {
 574   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 575   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 576 #define FLD(f) abuf->fields.sfmt_add.f
 577   int UNUSED written = 0;
 578   IADDR UNUSED pc = abuf->addr;
 579   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 580
 581   {
 582     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 583     * FLD (i_dr) = opval;
 584     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 585   }
 586
 587 #undef FLD
 588 }
 589   NEXT (vpc);
 590
 591   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
 592 {
 593   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 594   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 595 #define FLD(f) abuf->fields.sfmt_and3.f
 596   int UNUSED written = 0;
 597   IADDR UNUSED pc = abuf->addr;
 598   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 599
 600   {
 601     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 602     * FLD (i_dr) = opval;
 603     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 604   }
 605
 606 #undef FLD
 607 }
 608   NEXT (vpc);
 609
 610   CASE (sem, INSN_OR) : /* or $dr,$sr */
 611 {
 612   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 613   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 614 #define FLD(f) abuf->fields.sfmt_add.f
 615   int UNUSED written = 0;
 616   IADDR UNUSED pc = abuf->addr;
 617   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 618
 619   {
 620     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 621     * FLD (i_dr) = opval;
 622     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 623   }
 624
 625 #undef FLD
 626 }
 627   NEXT (vpc);
 628
 629   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
 630 {
 631   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 632   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 633 #define FLD(f) abuf->fields.sfmt_and3.f
 634   int UNUSED written = 0;
 635   IADDR UNUSED pc = abuf->addr;
 636   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 637
 638   {
 639     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 640     * FLD (i_dr) = opval;
 641     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 642   }
 643
 644 #undef FLD
 645 }
 646   NEXT (vpc);
 647
 648   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 649 {
 650   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 651   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 652 #define FLD(f) abuf->fields.sfmt_add.f
 653   int UNUSED written = 0;
 654   IADDR UNUSED pc = abuf->addr;
 655   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 656
 657   {
 658     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 659     * FLD (i_dr) = opval;
 660     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 661   }
 662
 663 #undef FLD
 664 }
 665   NEXT (vpc);
 666
 667   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
 668 {
 669   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 670   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 671 #define FLD(f) abuf->fields.sfmt_and3.f
 672   int UNUSED written = 0;
 673   IADDR UNUSED pc = abuf->addr;
 674   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 675
 676   {
 677     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 678     * FLD (i_dr) = opval;
 679     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 680   }
 681
 682 #undef FLD
 683 }
 684   NEXT (vpc);
 685
 686   CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
 687 {
 688   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 689   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 690 #define FLD(f) abuf->fields.sfmt_addi.f
 691   int UNUSED written = 0;
 692   IADDR UNUSED pc = abuf->addr;
 693   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 694
 695   {
 696     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 697     * FLD (i_dr) = opval;
 698     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 699   }
 700
 701 #undef FLD
 702 }
 703   NEXT (vpc);
 704
 705   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 706 {
 707   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 708   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 709 #define FLD(f) abuf->fields.sfmt_add.f
 710   int UNUSED written = 0;
 711   IADDR UNUSED pc = abuf->addr;
 712   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 713
 714 {
 715   SI temp0;BI temp1;
 716   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 717   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 718   {
 719     SI opval = temp0;
 720     * FLD (i_dr) = opval;
 721     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 722   }
 723   {
 724     BI opval = temp1;
 725     CPU (h_cond) = opval;
 726     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 727   }
 728 }
 729
 730 #undef FLD
 731 }
 732   NEXT (vpc);
 733
 734   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
 735 {
 736   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 737   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 738 #define FLD(f) abuf->fields.sfmt_add3.f
 739   int UNUSED written = 0;
 740   IADDR UNUSED pc = abuf->addr;
 741   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 742
 743 {
 744   SI temp0;BI temp1;
 745   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 746   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 747   {
 748     SI opval = temp0;
 749     * FLD (i_dr) = opval;
 750     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 751   }
 752   {
 753     BI opval = temp1;
 754     CPU (h_cond) = opval;
 755     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 756   }
 757 }
 758
 759 #undef FLD
 760 }
 761   NEXT (vpc);
 762
 763   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 764 {
 765   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 766   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 767 #define FLD(f) abuf->fields.sfmt_add.f
 768   int UNUSED written = 0;
 769   IADDR UNUSED pc = abuf->addr;
 770   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 771
 772 {
 773   SI temp0;BI temp1;
 774   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 775   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 776   {
 777     SI opval = temp0;
 778     * FLD (i_dr) = opval;
 779     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 780   }
 781   {
 782     BI opval = temp1;
 783     CPU (h_cond) = opval;
 784     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 785   }
 786 }
 787
 788 #undef FLD
 789 }
 790   NEXT (vpc);
 791
 792   CASE (sem, INSN_BC8) : /* bc.s $disp8 */
 793 {
 794   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 795   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 796 #define FLD(f) abuf->fields.sfmt_bl8.f
 797   int UNUSED written = 0;
 798   IADDR UNUSED pc = abuf->addr;
 799   SEM_BRANCH_INIT
 800   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 801
 802 if (CPU (h_cond)) {
 803   {
 804     USI opval = FLD (i_disp8);
 805     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 806     written |= (1 << 2);
 807     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 808   }
 809 }
 810
 811   abuf->written = written;
 812   SEM_BRANCH_FINI (vpc);
 813 #undef FLD
 814 }
 815   NEXT (vpc);
 816
 817   CASE (sem, INSN_BC24) : /* bc.l $disp24 */
 818 {
 819   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 820   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 821 #define FLD(f) abuf->fields.sfmt_bl24.f
 822   int UNUSED written = 0;
 823   IADDR UNUSED pc = abuf->addr;
 824   SEM_BRANCH_INIT
 825   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 826
 827 if (CPU (h_cond)) {
 828   {
 829     USI opval = FLD (i_disp24);
 830     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 831     written |= (1 << 2);
 832     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 833   }
 834 }
 835
 836   abuf->written = written;
 837   SEM_BRANCH_FINI (vpc);
 838 #undef FLD
 839 }
 840   NEXT (vpc);
 841
 842   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 843 {
 844   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 845   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 846 #define FLD(f) abuf->fields.sfmt_beq.f
 847   int UNUSED written = 0;
 848   IADDR UNUSED pc = abuf->addr;
 849   SEM_BRANCH_INIT
 850   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 851
 852 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 853   {
 854     USI opval = FLD (i_disp16);
 855     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 856     written |= (1 << 3);
 857     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 858   }
 859 }
 860
 861   abuf->written = written;
 862   SEM_BRANCH_FINI (vpc);
 863 #undef FLD
 864 }
 865   NEXT (vpc);
 866
 867   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 868 {
 869   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 870   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 871 #define FLD(f) abuf->fields.sfmt_beq.f
 872   int UNUSED written = 0;
 873   IADDR UNUSED pc = abuf->addr;
 874   SEM_BRANCH_INIT
 875   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 876
 877 if (EQSI (* FLD (i_src2), 0)) {
 878   {
 879     USI opval = FLD (i_disp16);
 880     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 881     written |= (1 << 2);
 882     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 883   }
 884 }
 885
 886   abuf->written = written;
 887   SEM_BRANCH_FINI (vpc);
 888 #undef FLD
 889 }
 890   NEXT (vpc);
 891
 892   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 893 {
 894   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 895   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 896 #define FLD(f) abuf->fields.sfmt_beq.f
 897   int UNUSED written = 0;
 898   IADDR UNUSED pc = abuf->addr;
 899   SEM_BRANCH_INIT
 900   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 901
 902 if (GESI (* FLD (i_src2), 0)) {
 903   {
 904     USI opval = FLD (i_disp16);
 905     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 906     written |= (1 << 2);
 907     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 908   }
 909 }
 910
 911   abuf->written = written;
 912   SEM_BRANCH_FINI (vpc);
 913 #undef FLD
 914 }
 915   NEXT (vpc);
 916
 917   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 918 {
 919   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 920   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 921 #define FLD(f) abuf->fields.sfmt_beq.f
 922   int UNUSED written = 0;
 923   IADDR UNUSED pc = abuf->addr;
 924   SEM_BRANCH_INIT
 925   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 926
 927 if (GTSI (* FLD (i_src2), 0)) {
 928   {
 929     USI opval = FLD (i_disp16);
 930     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 931     written |= (1 << 2);
 932     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 933   }
 934 }
 935
 936   abuf->written = written;
 937   SEM_BRANCH_FINI (vpc);
 938 #undef FLD
 939 }
 940   NEXT (vpc);
 941
 942   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 943 {
 944   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 945   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 946 #define FLD(f) abuf->fields.sfmt_beq.f
 947   int UNUSED written = 0;
 948   IADDR UNUSED pc = abuf->addr;
 949   SEM_BRANCH_INIT
 950   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 951
 952 if (LESI (* FLD (i_src2), 0)) {
 953   {
 954     USI opval = FLD (i_disp16);
 955     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 956     written |= (1 << 2);
 957     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 958   }
 959 }
 960
 961   abuf->written = written;
 962   SEM_BRANCH_FINI (vpc);
 963 #undef FLD
 964 }
 965   NEXT (vpc);
 966
 967   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 968 {
 969   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 970   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 971 #define FLD(f) abuf->fields.sfmt_beq.f
 972   int UNUSED written = 0;
 973   IADDR UNUSED pc = abuf->addr;
 974   SEM_BRANCH_INIT
 975   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 976
 977 if (LTSI (* FLD (i_src2), 0)) {
 978   {
 979     USI opval = FLD (i_disp16);
 980     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 981     written |= (1 << 2);
 982     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 983   }
 984 }
 985
 986   abuf->written = written;
 987   SEM_BRANCH_FINI (vpc);
 988 #undef FLD
 989 }
 990   NEXT (vpc);
 991
 992   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 993 {
 994   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 995   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 996 #define FLD(f) abuf->fields.sfmt_beq.f
 997   int UNUSED written = 0;
 998   IADDR UNUSED pc = abuf->addr;
 999   SEM_BRANCH_INIT
1000   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1001
1002 if (NESI (* FLD (i_src2), 0)) {
1003   {
1004     USI opval = FLD (i_disp16);
1005     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1006     written |= (1 << 2);
1007     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1008   }
1009 }
1010
1011   abuf->written = written;
1012   SEM_BRANCH_FINI (vpc);
1013 #undef FLD
1014 }
1015   NEXT (vpc);
1016
1017   CASE (sem, INSN_BL8) : /* bl.s $disp8 */
1018 {
1019   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1020   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1021 #define FLD(f) abuf->fields.sfmt_bl8.f
1022   int UNUSED written = 0;
1023   IADDR UNUSED pc = abuf->addr;
1024   SEM_BRANCH_INIT
1025   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1026
1027 {
1028   {
1029     SI opval = ADDSI (ANDSI (pc, -4), 4);
1030     CPU (h_gr[((UINT) 14)]) = opval;
1031     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1032   }
1033   {
1034     USI opval = FLD (i_disp8);
1035     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1036     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1037   }
1038 }
1039
1040   SEM_BRANCH_FINI (vpc);
1041 #undef FLD
1042 }
1043   NEXT (vpc);
1044
1045   CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1046 {
1047   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1048   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1049 #define FLD(f) abuf->fields.sfmt_bl24.f
1050   int UNUSED written = 0;
1051   IADDR UNUSED pc = abuf->addr;
1052   SEM_BRANCH_INIT
1053   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1054
1055 {
1056   {
1057     SI opval = ADDSI (pc, 4);
1058     CPU (h_gr[((UINT) 14)]) = opval;
1059     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1060   }
1061   {
1062     USI opval = FLD (i_disp24);
1063     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1064     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1065   }
1066 }
1067
1068   SEM_BRANCH_FINI (vpc);
1069 #undef FLD
1070 }
1071   NEXT (vpc);
1072
1073   CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1074 {
1075   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1076   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1077 #define FLD(f) abuf->fields.sfmt_bl8.f
1078   int UNUSED written = 0;
1079   IADDR UNUSED pc = abuf->addr;
1080   SEM_BRANCH_INIT
1081   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1082
1083 if (CPU (h_cond)) {
1084 {
1085   {
1086     SI opval = ADDSI (ANDSI (pc, -4), 4);
1087     CPU (h_gr[((UINT) 14)]) = opval;
1088     written |= (1 << 3);
1089     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1090   }
1091   {
1092     USI opval = FLD (i_disp8);
1093     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1094     written |= (1 << 4);
1095     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1096   }
1097 }
1098 }
1099
1100   abuf->written = written;
1101   SEM_BRANCH_FINI (vpc);
1102 #undef FLD
1103 }
1104   NEXT (vpc);
1105
1106   CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1107 {
1108   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1109   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1110 #define FLD(f) abuf->fields.sfmt_bl24.f
1111   int UNUSED written = 0;
1112   IADDR UNUSED pc = abuf->addr;
1113   SEM_BRANCH_INIT
1114   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1115
1116 if (CPU (h_cond)) {
1117 {
1118   {
1119     SI opval = ADDSI (pc, 4);
1120     CPU (h_gr[((UINT) 14)]) = opval;
1121     written |= (1 << 3);
1122     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1123   }
1124   {
1125     USI opval = FLD (i_disp24);
1126     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1127     written |= (1 << 4);
1128     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1129   }
1130 }
1131 }
1132
1133   abuf->written = written;
1134   SEM_BRANCH_FINI (vpc);
1135 #undef FLD
1136 }
1137   NEXT (vpc);
1138
1139   CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1140 {
1141   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1142   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1143 #define FLD(f) abuf->fields.sfmt_bl8.f
1144   int UNUSED written = 0;
1145   IADDR UNUSED pc = abuf->addr;
1146   SEM_BRANCH_INIT
1147   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1148
1149 if (NOTBI (CPU (h_cond))) {
1150   {
1151     USI opval = FLD (i_disp8);
1152     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1153     written |= (1 << 2);
1154     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1155   }
1156 }
1157
1158   abuf->written = written;
1159   SEM_BRANCH_FINI (vpc);
1160 #undef FLD
1161 }
1162   NEXT (vpc);
1163
1164   CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1165 {
1166   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1167   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1168 #define FLD(f) abuf->fields.sfmt_bl24.f
1169   int UNUSED written = 0;
1170   IADDR UNUSED pc = abuf->addr;
1171   SEM_BRANCH_INIT
1172   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1173
1174 if (NOTBI (CPU (h_cond))) {
1175   {
1176     USI opval = FLD (i_disp24);
1177     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1178     written |= (1 << 2);
1179     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1180   }
1181 }
1182
1183   abuf->written = written;
1184   SEM_BRANCH_FINI (vpc);
1185 #undef FLD
1186 }
1187   NEXT (vpc);
1188
1189   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1190 {
1191   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1192   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1193 #define FLD(f) abuf->fields.sfmt_beq.f
1194   int UNUSED written = 0;
1195   IADDR UNUSED pc = abuf->addr;
1196   SEM_BRANCH_INIT
1197   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1198
1199 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1200   {
1201     USI opval = FLD (i_disp16);
1202     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1203     written |= (1 << 3);
1204     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1205   }
1206 }
1207
1208   abuf->written = written;
1209   SEM_BRANCH_FINI (vpc);
1210 #undef FLD
1211 }
1212   NEXT (vpc);
1213
1214   CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1215 {
1216   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1217   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1218 #define FLD(f) abuf->fields.sfmt_bl8.f
1219   int UNUSED written = 0;
1220   IADDR UNUSED pc = abuf->addr;
1221   SEM_BRANCH_INIT
1222   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1223
1224   {
1225     USI opval = FLD (i_disp8);
1226     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1227     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1228   }
1229
1230   SEM_BRANCH_FINI (vpc);
1231 #undef FLD
1232 }
1233   NEXT (vpc);
1234
1235   CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1236 {
1237   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1239 #define FLD(f) abuf->fields.sfmt_bl24.f
1240   int UNUSED written = 0;
1241   IADDR UNUSED pc = abuf->addr;
1242   SEM_BRANCH_INIT
1243   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1244
1245   {
1246     USI opval = FLD (i_disp24);
1247     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1248     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1249   }
1250
1251   SEM_BRANCH_FINI (vpc);
1252 #undef FLD
1253 }
1254   NEXT (vpc);
1255
1256   CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1257 {
1258   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1259   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1260 #define FLD(f) abuf->fields.sfmt_bl8.f
1261   int UNUSED written = 0;
1262   IADDR UNUSED pc = abuf->addr;
1263   SEM_BRANCH_INIT
1264   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1265
1266 if (NOTBI (CPU (h_cond))) {
1267 {
1268   {
1269     SI opval = ADDSI (ANDSI (pc, -4), 4);
1270     CPU (h_gr[((UINT) 14)]) = opval;
1271     written |= (1 << 3);
1272     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1273   }
1274   {
1275     USI opval = FLD (i_disp8);
1276     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1277     written |= (1 << 4);
1278     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1279   }
1280 }
1281 }
1282
1283   abuf->written = written;
1284   SEM_BRANCH_FINI (vpc);
1285 #undef FLD
1286 }
1287   NEXT (vpc);
1288
1289   CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1290 {
1291   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1292   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1293 #define FLD(f) abuf->fields.sfmt_bl24.f
1294   int UNUSED written = 0;
1295   IADDR UNUSED pc = abuf->addr;
1296   SEM_BRANCH_INIT
1297   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1298
1299 if (NOTBI (CPU (h_cond))) {
1300 {
1301   {
1302     SI opval = ADDSI (pc, 4);
1303     CPU (h_gr[((UINT) 14)]) = opval;
1304     written |= (1 << 3);
1305     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1306   }
1307   {
1308     USI opval = FLD (i_disp24);
1309     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1310     written |= (1 << 4);
1311     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1312   }
1313 }
1314 }
1315
1316   abuf->written = written;
1317   SEM_BRANCH_FINI (vpc);
1318 #undef FLD
1319 }
1320   NEXT (vpc);
1321
1322   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1323 {
1324   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1325   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1326 #define FLD(f) abuf->fields.sfmt_st_plus.f
1327   int UNUSED written = 0;
1328   IADDR UNUSED pc = abuf->addr;
1329   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1330
1331   {
1332     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1333     CPU (h_cond) = opval;
1334     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1335   }
1336
1337 #undef FLD
1338 }
1339   NEXT (vpc);
1340
1341   CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1342 {
1343   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1344   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1345 #define FLD(f) abuf->fields.sfmt_st_d.f
1346   int UNUSED written = 0;
1347   IADDR UNUSED pc = abuf->addr;
1348   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1349
1350   {
1351     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1352     CPU (h_cond) = opval;
1353     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1354   }
1355
1356 #undef FLD
1357 }
1358   NEXT (vpc);
1359
1360   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1361 {
1362   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1363   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1364 #define FLD(f) abuf->fields.sfmt_st_plus.f
1365   int UNUSED written = 0;
1366   IADDR UNUSED pc = abuf->addr;
1367   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1368
1369   {
1370     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1371     CPU (h_cond) = opval;
1372     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1373   }
1374
1375 #undef FLD
1376 }
1377   NEXT (vpc);
1378
1379   CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1380 {
1381   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1382   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1383 #define FLD(f) abuf->fields.sfmt_st_d.f
1384   int UNUSED written = 0;
1385   IADDR UNUSED pc = abuf->addr;
1386   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1387
1388   {
1389     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1390     CPU (h_cond) = opval;
1391     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1392   }
1393
1394 #undef FLD
1395 }
1396   NEXT (vpc);
1397
1398   CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1399 {
1400   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1401   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1402 #define FLD(f) abuf->fields.sfmt_st_plus.f
1403   int UNUSED written = 0;
1404   IADDR UNUSED pc = abuf->addr;
1405   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1406
1407   {
1408     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1409     CPU (h_cond) = opval;
1410     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1411   }
1412
1413 #undef FLD
1414 }
1415   NEXT (vpc);
1416
1417   CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1418 {
1419   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1420   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1421 #define FLD(f) abuf->fields.sfmt_st_plus.f
1422   int UNUSED written = 0;
1423   IADDR UNUSED pc = abuf->addr;
1424   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1425
1426   {
1427     BI opval = EQSI (* FLD (i_src2), 0);
1428     CPU (h_cond) = opval;
1429     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1430   }
1431
1432 #undef FLD
1433 }
1434   NEXT (vpc);
1435
1436   CASE (sem, INSN_DIV) : /* div $dr,$sr */
1437 {
1438   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1439   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1440 #define FLD(f) abuf->fields.sfmt_add.f
1441   int UNUSED written = 0;
1442   IADDR UNUSED pc = abuf->addr;
1443   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1444
1445 if (NESI (* FLD (i_sr), 0)) {
1446   {
1447     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1448     * FLD (i_dr) = opval;
1449     written |= (1 << 2);
1450     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1451   }
1452 }
1453
1454   abuf->written = written;
1455 #undef FLD
1456 }
1457   NEXT (vpc);
1458
1459   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1460 {
1461   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1462   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1463 #define FLD(f) abuf->fields.sfmt_add.f
1464   int UNUSED written = 0;
1465   IADDR UNUSED pc = abuf->addr;
1466   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1467
1468 if (NESI (* FLD (i_sr), 0)) {
1469   {
1470     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1471     * FLD (i_dr) = opval;
1472     written |= (1 << 2);
1473     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1474   }
1475 }
1476
1477   abuf->written = written;
1478 #undef FLD
1479 }
1480   NEXT (vpc);
1481
1482   CASE (sem, INSN_REM) : /* rem $dr,$sr */
1483 {
1484   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1485   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1486 #define FLD(f) abuf->fields.sfmt_add.f
1487   int UNUSED written = 0;
1488   IADDR UNUSED pc = abuf->addr;
1489   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1490
1491 if (NESI (* FLD (i_sr), 0)) {
1492   {
1493     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1494     * FLD (i_dr) = opval;
1495     written |= (1 << 2);
1496     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1497   }
1498 }
1499
1500   abuf->written = written;
1501 #undef FLD
1502 }
1503   NEXT (vpc);
1504
1505   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1506 {
1507   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1508   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1509 #define FLD(f) abuf->fields.sfmt_add.f
1510   int UNUSED written = 0;
1511   IADDR UNUSED pc = abuf->addr;
1512   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1513
1514 if (NESI (* FLD (i_sr), 0)) {
1515   {
1516     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1517     * FLD (i_dr) = opval;
1518     written |= (1 << 2);
1519     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1520   }
1521 }
1522
1523   abuf->written = written;
1524 #undef FLD
1525 }
1526   NEXT (vpc);
1527
1528   CASE (sem, INSN_REMH) : /* remh $dr,$sr */
1529 {
1530   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1531   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1532 #define FLD(f) abuf->fields.sfmt_add.f
1533   int UNUSED written = 0;
1534   IADDR UNUSED pc = abuf->addr;
1535   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1536
1537 if (NESI (* FLD (i_sr), 0)) {
1538   {
1539     SI opval = MODSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1540     * FLD (i_dr) = opval;
1541     written |= (1 << 2);
1542     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1543   }
1544 }
1545
1546   abuf->written = written;
1547 #undef FLD
1548 }
1549   NEXT (vpc);
1550
1551   CASE (sem, INSN_REMUH) : /* remuh $dr,$sr */
1552 {
1553   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1554   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1555 #define FLD(f) abuf->fields.sfmt_add.f
1556   int UNUSED written = 0;
1557   IADDR UNUSED pc = abuf->addr;
1558   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1559
1560 if (NESI (* FLD (i_sr), 0)) {
1561   {
1562     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1563     * FLD (i_dr) = opval;
1564     written |= (1 << 2);
1565     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1566   }
1567 }
1568
1569   abuf->written = written;
1570 #undef FLD
1571 }
1572   NEXT (vpc);
1573
1574   CASE (sem, INSN_REMB) : /* remb $dr,$sr */
1575 {
1576   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1577   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1578 #define FLD(f) abuf->fields.sfmt_add.f
1579   int UNUSED written = 0;
1580   IADDR UNUSED pc = abuf->addr;
1581   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1582
1583 if (NESI (* FLD (i_sr), 0)) {
1584   {
1585     SI opval = MODSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr));
1586     * FLD (i_dr) = opval;
1587     written |= (1 << 2);
1588     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1589   }
1590 }
1591
1592   abuf->written = written;
1593 #undef FLD
1594 }
1595   NEXT (vpc);
1596
1597   CASE (sem, INSN_REMUB) : /* remub $dr,$sr */
1598 {
1599   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1600   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1601 #define FLD(f) abuf->fields.sfmt_add.f
1602   int UNUSED written = 0;
1603   IADDR UNUSED pc = abuf->addr;
1604   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1605
1606 if (NESI (* FLD (i_sr), 0)) {
1607   {
1608     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1609     * FLD (i_dr) = opval;
1610     written |= (1 << 2);
1611     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1612   }
1613 }
1614
1615   abuf->written = written;
1616 #undef FLD
1617 }
1618   NEXT (vpc);
1619
1620   CASE (sem, INSN_DIVUH) : /* divuh $dr,$sr */
1621 {
1622   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1623   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1624 #define FLD(f) abuf->fields.sfmt_add.f
1625   int UNUSED written = 0;
1626   IADDR UNUSED pc = abuf->addr;
1627   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1628
1629 if (NESI (* FLD (i_sr), 0)) {
1630   {
1631     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1632     * FLD (i_dr) = opval;
1633     written |= (1 << 2);
1634     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1635   }
1636 }
1637
1638   abuf->written = written;
1639 #undef FLD
1640 }
1641   NEXT (vpc);
1642
1643   CASE (sem, INSN_DIVB) : /* divb $dr,$sr */
1644 {
1645   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1646   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1647 #define FLD(f) abuf->fields.sfmt_add.f
1648   int UNUSED written = 0;
1649   IADDR UNUSED pc = abuf->addr;
1650   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1651
1652 if (NESI (* FLD (i_sr), 0)) {
1653   {
1654     SI opval = DIVSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr));
1655     * FLD (i_dr) = opval;
1656     written |= (1 << 2);
1657     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1658   }
1659 }
1660
1661   abuf->written = written;
1662 #undef FLD
1663 }
1664   NEXT (vpc);
1665
1666   CASE (sem, INSN_DIVUB) : /* divub $dr,$sr */
1667 {
1668   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1669   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1670 #define FLD(f) abuf->fields.sfmt_add.f
1671   int UNUSED written = 0;
1672   IADDR UNUSED pc = abuf->addr;
1673   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1674
1675 if (NESI (* FLD (i_sr), 0)) {
1676   {
1677     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1678     * FLD (i_dr) = opval;
1679     written |= (1 << 2);
1680     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1681   }
1682 }
1683
1684   abuf->written = written;
1685 #undef FLD
1686 }
1687   NEXT (vpc);
1688
1689   CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1690 {
1691   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1692   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1693 #define FLD(f) abuf->fields.sfmt_add.f
1694   int UNUSED written = 0;
1695   IADDR UNUSED pc = abuf->addr;
1696   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1697
1698 if (NESI (* FLD (i_sr), 0)) {
1699   {
1700     SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1701     * FLD (i_dr) = opval;
1702     written |= (1 << 2);
1703     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1704   }
1705 }
1706
1707   abuf->written = written;
1708 #undef FLD
1709 }
1710   NEXT (vpc);
1711
1712   CASE (sem, INSN_JC) : /* jc $sr */
1713 {
1714   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1715   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1716 #define FLD(f) abuf->fields.sfmt_jl.f
1717   int UNUSED written = 0;
1718   IADDR UNUSED pc = abuf->addr;
1719   SEM_BRANCH_INIT
1720   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1721
1722 if (CPU (h_cond)) {
1723   {
1724     USI opval = ANDSI (* FLD (i_sr), -4);
1725     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1726     written |= (1 << 2);
1727     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1728   }
1729 }
1730
1731   abuf->written = written;
1732   SEM_BRANCH_FINI (vpc);
1733 #undef FLD
1734 }
1735   NEXT (vpc);
1736
1737   CASE (sem, INSN_JNC) : /* jnc $sr */
1738 {
1739   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1740   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1741 #define FLD(f) abuf->fields.sfmt_jl.f
1742   int UNUSED written = 0;
1743   IADDR UNUSED pc = abuf->addr;
1744   SEM_BRANCH_INIT
1745   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1746
1747 if (NOTBI (CPU (h_cond))) {
1748   {
1749     USI opval = ANDSI (* FLD (i_sr), -4);
1750     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1751     written |= (1 << 2);
1752     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1753   }
1754 }
1755
1756   abuf->written = written;
1757   SEM_BRANCH_FINI (vpc);
1758 #undef FLD
1759 }
1760   NEXT (vpc);
1761
1762   CASE (sem, INSN_JL) : /* jl $sr */
1763 {
1764   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1765   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1766 #define FLD(f) abuf->fields.sfmt_jl.f
1767   int UNUSED written = 0;
1768   IADDR UNUSED pc = abuf->addr;
1769   SEM_BRANCH_INIT
1770   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1771
1772 {
1773   SI temp0;USI temp1;
1774   temp0 = ADDSI (ANDSI (pc, -4), 4);
1775   temp1 = ANDSI (* FLD (i_sr), -4);
1776   {
1777     SI opval = temp0;
1778     CPU (h_gr[((UINT) 14)]) = opval;
1779     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1780   }
1781   {
1782     USI opval = temp1;
1783     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1784     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1785   }
1786 }
1787
1788   SEM_BRANCH_FINI (vpc);
1789 #undef FLD
1790 }
1791   NEXT (vpc);
1792
1793   CASE (sem, INSN_JMP) : /* jmp $sr */
1794 {
1795   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1796   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1797 #define FLD(f) abuf->fields.sfmt_jl.f
1798   int UNUSED written = 0;
1799   IADDR UNUSED pc = abuf->addr;
1800   SEM_BRANCH_INIT
1801   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1802
1803   {
1804     USI opval = ANDSI (* FLD (i_sr), -4);
1805     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1806     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1807   }
1808
1809   SEM_BRANCH_FINI (vpc);
1810 #undef FLD
1811 }
1812   NEXT (vpc);
1813
1814   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1815 {
1816   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1817   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1818 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1819   int UNUSED written = 0;
1820   IADDR UNUSED pc = abuf->addr;
1821   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1822
1823   {
1824     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1825     * FLD (i_dr) = opval;
1826     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1827   }
1828
1829 #undef FLD
1830 }
1831   NEXT (vpc);
1832
1833   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1834 {
1835   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1836   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1837 #define FLD(f) abuf->fields.sfmt_add3.f
1838   int UNUSED written = 0;
1839   IADDR UNUSED pc = abuf->addr;
1840   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1841
1842   {
1843     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1844     * FLD (i_dr) = opval;
1845     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1846   }
1847
1848 #undef FLD
1849 }
1850   NEXT (vpc);
1851
1852   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1853 {
1854   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1855   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1856 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1857   int UNUSED written = 0;
1858   IADDR UNUSED pc = abuf->addr;
1859   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1860
1861   {
1862     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1863     * FLD (i_dr) = opval;
1864     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1865   }
1866
1867 #undef FLD
1868 }
1869   NEXT (vpc);
1870
1871   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1872 {
1873   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1874   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1875 #define FLD(f) abuf->fields.sfmt_add3.f
1876   int UNUSED written = 0;
1877   IADDR UNUSED pc = abuf->addr;
1878   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1879
1880   {
1881     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1882     * FLD (i_dr) = opval;
1883     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1884   }
1885
1886 #undef FLD
1887 }
1888   NEXT (vpc);
1889
1890   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1891 {
1892   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1893   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1894 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1895   int UNUSED written = 0;
1896   IADDR UNUSED pc = abuf->addr;
1897   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1898
1899   {
1900     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1901     * FLD (i_dr) = opval;
1902     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1903   }
1904
1905 #undef FLD
1906 }
1907   NEXT (vpc);
1908
1909   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1910 {
1911   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1912   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1913 #define FLD(f) abuf->fields.sfmt_add3.f
1914   int UNUSED written = 0;
1915   IADDR UNUSED pc = abuf->addr;
1916   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1917
1918   {
1919     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1920     * FLD (i_dr) = opval;
1921     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1922   }
1923
1924 #undef FLD
1925 }
1926   NEXT (vpc);
1927
1928   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1929 {
1930   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1931   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1932 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1933   int UNUSED written = 0;
1934   IADDR UNUSED pc = abuf->addr;
1935   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1936
1937   {
1938     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1939     * FLD (i_dr) = opval;
1940     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1941   }
1942
1943 #undef FLD
1944 }
1945   NEXT (vpc);
1946
1947   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1948 {
1949   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1950   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1951 #define FLD(f) abuf->fields.sfmt_add3.f
1952   int UNUSED written = 0;
1953   IADDR UNUSED pc = abuf->addr;
1954   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1955
1956   {
1957     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1958     * FLD (i_dr) = opval;
1959     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1960   }
1961
1962 #undef FLD
1963 }
1964   NEXT (vpc);
1965
1966   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1967 {
1968   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1969   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1970 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1971   int UNUSED written = 0;
1972   IADDR UNUSED pc = abuf->addr;
1973   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1974
1975   {
1976     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1977     * FLD (i_dr) = opval;
1978     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1979   }
1980
1981 #undef FLD
1982 }
1983   NEXT (vpc);
1984
1985   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1986 {
1987   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1988   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1989 #define FLD(f) abuf->fields.sfmt_add3.f
1990   int UNUSED written = 0;
1991   IADDR UNUSED pc = abuf->addr;
1992   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1993
1994   {
1995     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1996     * FLD (i_dr) = opval;
1997     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1998   }
1999
2000 #undef FLD
2001 }
2002   NEXT (vpc);
2003
2004   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
2005 {
2006   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2007   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2008 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2009   int UNUSED written = 0;
2010   IADDR UNUSED pc = abuf->addr;
2011   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2012
2013 {
2014   SI temp0;SI temp1;
2015   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
2016   temp1 = ADDSI (* FLD (i_sr), 4);
2017   {
2018     SI opval = temp0;
2019     * FLD (i_dr) = opval;
2020     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2021   }
2022   {
2023     SI opval = temp1;
2024     * FLD (i_sr) = opval;
2025     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2026   }
2027 }
2028
2029 #undef FLD
2030 }
2031   NEXT (vpc);
2032
2033   CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
2034 {
2035   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2036   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2037 #define FLD(f) abuf->fields.sfmt_ld24.f
2038   int UNUSED written = 0;
2039   IADDR UNUSED pc = abuf->addr;
2040   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2041
2042   {
2043     SI opval = FLD (i_uimm24);
2044     * FLD (i_dr) = opval;
2045     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2046   }
2047
2048 #undef FLD
2049 }
2050   NEXT (vpc);
2051
2052   CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
2053 {
2054   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2055   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2056 #define FLD(f) abuf->fields.sfmt_addi.f
2057   int UNUSED written = 0;
2058   IADDR UNUSED pc = abuf->addr;
2059   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2060
2061   {
2062     SI opval = FLD (f_simm8);
2063     * FLD (i_dr) = opval;
2064     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2065   }
2066
2067 #undef FLD
2068 }
2069   NEXT (vpc);
2070
2071   CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
2072 {
2073   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2074   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2075 #define FLD(f) abuf->fields.sfmt_add3.f
2076   int UNUSED written = 0;
2077   IADDR UNUSED pc = abuf->addr;
2078   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2079
2080   {
2081     SI opval = FLD (f_simm16);
2082     * FLD (i_dr) = opval;
2083     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2084   }
2085
2086 #undef FLD
2087 }
2088   NEXT (vpc);
2089
2090   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
2091 {
2092   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2093   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2094 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2095   int UNUSED written = 0;
2096   IADDR UNUSED pc = abuf->addr;
2097   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2098
2099 {
2100   {
2101     BI opval = 1;
2102     CPU (h_lock) = opval;
2103     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2104   }
2105   {
2106     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
2107     * FLD (i_dr) = opval;
2108     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2109   }
2110 }
2111
2112 #undef FLD
2113 }
2114   NEXT (vpc);
2115
2116   CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
2117 {
2118   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2119   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2120 #define FLD(f) abuf->fields.sfmt_machi_a.f
2121   int UNUSED written = 0;
2122   IADDR UNUSED pc = abuf->addr;
2123   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2124
2125   {
2126     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
2127     SET_H_ACCUMS (FLD (f_acc), opval);
2128     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2129   }
2130
2131 #undef FLD
2132 }
2133   NEXT (vpc);
2134
2135   CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
2136 {
2137   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2138   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2139 #define FLD(f) abuf->fields.sfmt_machi_a.f
2140   int UNUSED written = 0;
2141   IADDR UNUSED pc = abuf->addr;
2142   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2143
2144   {
2145     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
2146     SET_H_ACCUMS (FLD (f_acc), opval);
2147     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2148   }
2149
2150 #undef FLD
2151 }
2152   NEXT (vpc);
2153
2154   CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
2155 {
2156   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2158 #define FLD(f) abuf->fields.sfmt_machi_a.f
2159   int UNUSED written = 0;
2160   IADDR UNUSED pc = abuf->addr;
2161   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2162
2163   {
2164     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
2165     SET_H_ACCUMS (FLD (f_acc), opval);
2166     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2167   }
2168
2169 #undef FLD
2170 }
2171   NEXT (vpc);
2172
2173   CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
2174 {
2175   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2176   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2177 #define FLD(f) abuf->fields.sfmt_machi_a.f
2178   int UNUSED written = 0;
2179   IADDR UNUSED pc = abuf->addr;
2180   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2181
2182   {
2183     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2184     SET_H_ACCUMS (FLD (f_acc), opval);
2185     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2186   }
2187
2188 #undef FLD
2189 }
2190   NEXT (vpc);
2191
2192   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2193 {
2194   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2195   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2196 #define FLD(f) abuf->fields.sfmt_add.f
2197   int UNUSED written = 0;
2198   IADDR UNUSED pc = abuf->addr;
2199   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2200
2201   {
2202     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2203     * FLD (i_dr) = opval;
2204     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2205   }
2206
2207 #undef FLD
2208 }
2209   NEXT (vpc);
2210
2211   CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2212 {
2213   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2214   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2215 #define FLD(f) abuf->fields.sfmt_machi_a.f
2216   int UNUSED written = 0;
2217   IADDR UNUSED pc = abuf->addr;
2218   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2219
2220   {
2221     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2222     SET_H_ACCUMS (FLD (f_acc), opval);
2223     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2224   }
2225
2226 #undef FLD
2227 }
2228   NEXT (vpc);
2229
2230   CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2231 {
2232   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2233   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2234 #define FLD(f) abuf->fields.sfmt_machi_a.f
2235   int UNUSED written = 0;
2236   IADDR UNUSED pc = abuf->addr;
2237   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2238
2239   {
2240     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2241     SET_H_ACCUMS (FLD (f_acc), opval);
2242     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2243   }
2244
2245 #undef FLD
2246 }
2247   NEXT (vpc);
2248
2249   CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2250 {
2251   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2252   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2253 #define FLD(f) abuf->fields.sfmt_machi_a.f
2254   int UNUSED written = 0;
2255   IADDR UNUSED pc = abuf->addr;
2256   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2257
2258   {
2259     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2260     SET_H_ACCUMS (FLD (f_acc), opval);
2261     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2262   }
2263
2264 #undef FLD
2265 }
2266   NEXT (vpc);
2267
2268   CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2269 {
2270   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2271   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2272 #define FLD(f) abuf->fields.sfmt_machi_a.f
2273   int UNUSED written = 0;
2274   IADDR UNUSED pc = abuf->addr;
2275   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2276
2277   {
2278     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2279     SET_H_ACCUMS (FLD (f_acc), opval);
2280     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2281   }
2282
2283 #undef FLD
2284 }
2285   NEXT (vpc);
2286
2287   CASE (sem, INSN_MV) : /* mv $dr,$sr */
2288 {
2289   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2291 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2292   int UNUSED written = 0;
2293   IADDR UNUSED pc = abuf->addr;
2294   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2295
2296   {
2297     SI opval = * FLD (i_sr);
2298     * FLD (i_dr) = opval;
2299     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2300   }
2301
2302 #undef FLD
2303 }
2304   NEXT (vpc);
2305
2306   CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2307 {
2308   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2309   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2311   int UNUSED written = 0;
2312   IADDR UNUSED pc = abuf->addr;
2313   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2314
2315   {
2316     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2317     * FLD (i_dr) = opval;
2318     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2319   }
2320
2321 #undef FLD
2322 }
2323   NEXT (vpc);
2324
2325   CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2326 {
2327   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2328   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2329 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2330   int UNUSED written = 0;
2331   IADDR UNUSED pc = abuf->addr;
2332   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2333
2334   {
2335     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2336     * FLD (i_dr) = opval;
2337     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2338   }
2339
2340 #undef FLD
2341 }
2342   NEXT (vpc);
2343
2344   CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2345 {
2346   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2347   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2348 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2349   int UNUSED written = 0;
2350   IADDR UNUSED pc = abuf->addr;
2351   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2352
2353   {
2354     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2355     * FLD (i_dr) = opval;
2356     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2357   }
2358
2359 #undef FLD
2360 }
2361   NEXT (vpc);
2362
2363   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2364 {
2365   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2366   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2367 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2368   int UNUSED written = 0;
2369   IADDR UNUSED pc = abuf->addr;
2370   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2371
2372   {
2373     SI opval = GET_H_CR (FLD (f_r2));
2374     * FLD (i_dr) = opval;
2375     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2376   }
2377
2378 #undef FLD
2379 }
2380   NEXT (vpc);
2381
2382   CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2383 {
2384   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2385   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2386 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2387   int UNUSED written = 0;
2388   IADDR UNUSED pc = abuf->addr;
2389   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2390
2391   {
2392     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2393     SET_H_ACCUMS (FLD (f_accs), opval);
2394     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2395   }
2396
2397 #undef FLD
2398 }
2399   NEXT (vpc);
2400
2401   CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2402 {
2403   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2404   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2405 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2406   int UNUSED written = 0;
2407   IADDR UNUSED pc = abuf->addr;
2408   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2409
2410   {
2411     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2412     SET_H_ACCUMS (FLD (f_accs), opval);
2413     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2414   }
2415
2416 #undef FLD
2417 }
2418   NEXT (vpc);
2419
2420   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2421 {
2422   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2423   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2424 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2425   int UNUSED written = 0;
2426   IADDR UNUSED pc = abuf->addr;
2427   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2428
2429   {
2430     USI opval = * FLD (i_sr);
2431     SET_H_CR (FLD (f_r1), opval);
2432     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2433   }
2434
2435 #undef FLD
2436 }
2437   NEXT (vpc);
2438
2439   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2440 {
2441   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2442   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2443 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2444   int UNUSED written = 0;
2445   IADDR UNUSED pc = abuf->addr;
2446   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2447
2448   {
2449     SI opval = NEGSI (* FLD (i_sr));
2450     * FLD (i_dr) = opval;
2451     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2452   }
2453
2454 #undef FLD
2455 }
2456   NEXT (vpc);
2457
2458   CASE (sem, INSN_NOP) : /* nop */
2459 {
2460   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2461   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2462 #define FLD(f) abuf->fields.sfmt_empty.f
2463   int UNUSED written = 0;
2464   IADDR UNUSED pc = abuf->addr;
2465   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2466
2467 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2468
2469 #undef FLD
2470 }
2471   NEXT (vpc);
2472
2473   CASE (sem, INSN_NOT) : /* not $dr,$sr */
2474 {
2475   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2476   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2477 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2478   int UNUSED written = 0;
2479   IADDR UNUSED pc = abuf->addr;
2480   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2481
2482   {
2483     SI opval = INVSI (* FLD (i_sr));
2484     * FLD (i_dr) = opval;
2485     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2486   }
2487
2488 #undef FLD
2489 }
2490   NEXT (vpc);
2491
2492   CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2493 {
2494   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2495   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2496 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2497   int UNUSED written = 0;
2498   IADDR UNUSED pc = abuf->addr;
2499   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2500
2501 {
2502   DI tmp_tmp1;
2503   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2504   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2505   {
2506     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2507     SET_H_ACCUMS (FLD (f_accd), opval);
2508     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2509   }
2510 }
2511
2512 #undef FLD
2513 }
2514   NEXT (vpc);
2515
2516   CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2517 {
2518   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2519   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2520 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2521   int UNUSED written = 0;
2522   IADDR UNUSED pc = abuf->addr;
2523   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2524
2525 {
2526   DI tmp_tmp1;
2527   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2528   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2529   {
2530     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2531     SET_H_ACCUMS (FLD (f_accd), opval);
2532     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2533   }
2534 }
2535
2536 #undef FLD
2537 }
2538   NEXT (vpc);
2539
2540   CASE (sem, INSN_RTE) : /* rte */
2541 {
2542   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2543   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2544 #define FLD(f) abuf->fields.sfmt_empty.f
2545   int UNUSED written = 0;
2546   IADDR UNUSED pc = abuf->addr;
2547   SEM_BRANCH_INIT
2548   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2549
2550 {
2551   {
2552     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2553     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2554     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2555   }
2556   {
2557     USI opval = GET_H_CR (((UINT) 14));
2558     SET_H_CR (((UINT) 6), opval);
2559     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2560   }
2561   {
2562     UQI opval = CPU (h_bpsw);
2563     SET_H_PSW (opval);
2564     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2565   }
2566   {
2567     UQI opval = CPU (h_bbpsw);
2568     CPU (h_bpsw) = opval;
2569     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2570   }
2571 }
2572
2573   SEM_BRANCH_FINI (vpc);
2574 #undef FLD
2575 }
2576   NEXT (vpc);
2577
2578   CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2579 {
2580   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2581   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2582 #define FLD(f) abuf->fields.sfmt_seth.f
2583   int UNUSED written = 0;
2584   IADDR UNUSED pc = abuf->addr;
2585   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2586
2587   {
2588     SI opval = SLLSI (FLD (f_hi16), 16);
2589     * FLD (i_dr) = opval;
2590     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2591   }
2592
2593 #undef FLD
2594 }
2595   NEXT (vpc);
2596
2597   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2598 {
2599   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2600   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2601 #define FLD(f) abuf->fields.sfmt_add.f
2602   int UNUSED written = 0;
2603   IADDR UNUSED pc = abuf->addr;
2604   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2605
2606   {
2607     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2608     * FLD (i_dr) = opval;
2609     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2610   }
2611
2612 #undef FLD
2613 }
2614   NEXT (vpc);
2615
2616   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2617 {
2618   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2619   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2620 #define FLD(f) abuf->fields.sfmt_add3.f
2621   int UNUSED written = 0;
2622   IADDR UNUSED pc = abuf->addr;
2623   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2624
2625   {
2626     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2627     * FLD (i_dr) = opval;
2628     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2629   }
2630
2631 #undef FLD
2632 }
2633   NEXT (vpc);
2634
2635   CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2636 {
2637   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2638   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2639 #define FLD(f) abuf->fields.sfmt_slli.f
2640   int UNUSED written = 0;
2641   IADDR UNUSED pc = abuf->addr;
2642   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2643
2644   {
2645     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2646     * FLD (i_dr) = opval;
2647     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2648   }
2649
2650 #undef FLD
2651 }
2652   NEXT (vpc);
2653
2654   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2655 {
2656   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2657   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2658 #define FLD(f) abuf->fields.sfmt_add.f
2659   int UNUSED written = 0;
2660   IADDR UNUSED pc = abuf->addr;
2661   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2662
2663   {
2664     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2665     * FLD (i_dr) = opval;
2666     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2667   }
2668
2669 #undef FLD
2670 }
2671   NEXT (vpc);
2672
2673   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2674 {
2675   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2676   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2677 #define FLD(f) abuf->fields.sfmt_add3.f
2678   int UNUSED written = 0;
2679   IADDR UNUSED pc = abuf->addr;
2680   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2681
2682   {
2683     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2684     * FLD (i_dr) = opval;
2685     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2686   }
2687
2688 #undef FLD
2689 }
2690   NEXT (vpc);
2691
2692   CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2693 {
2694   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2695   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2696 #define FLD(f) abuf->fields.sfmt_slli.f
2697   int UNUSED written = 0;
2698   IADDR UNUSED pc = abuf->addr;
2699   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2700
2701   {
2702     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2703     * FLD (i_dr) = opval;
2704     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2705   }
2706
2707 #undef FLD
2708 }
2709   NEXT (vpc);
2710
2711   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2712 {
2713   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2714   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2715 #define FLD(f) abuf->fields.sfmt_add.f
2716   int UNUSED written = 0;
2717   IADDR UNUSED pc = abuf->addr;
2718   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2719
2720   {
2721     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2722     * FLD (i_dr) = opval;
2723     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2724   }
2725
2726 #undef FLD
2727 }
2728   NEXT (vpc);
2729
2730   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2731 {
2732   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2733   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2734 #define FLD(f) abuf->fields.sfmt_add3.f
2735   int UNUSED written = 0;
2736   IADDR UNUSED pc = abuf->addr;
2737   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2738
2739   {
2740     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2741     * FLD (i_dr) = opval;
2742     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2743   }
2744
2745 #undef FLD
2746 }
2747   NEXT (vpc);
2748
2749   CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2750 {
2751   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2752   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2753 #define FLD(f) abuf->fields.sfmt_slli.f
2754   int UNUSED written = 0;
2755   IADDR UNUSED pc = abuf->addr;
2756   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2757
2758   {
2759     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2760     * FLD (i_dr) = opval;
2761     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2762   }
2763
2764 #undef FLD
2765 }
2766   NEXT (vpc);
2767
2768   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2769 {
2770   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2771   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2772 #define FLD(f) abuf->fields.sfmt_st_plus.f
2773   int UNUSED written = 0;
2774   IADDR UNUSED pc = abuf->addr;
2775   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2776
2777   {
2778     SI opval = * FLD (i_src1);
2779     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2780     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2781   }
2782
2783 #undef FLD
2784 }
2785   NEXT (vpc);
2786
2787   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2788 {
2789   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2790   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2791 #define FLD(f) abuf->fields.sfmt_st_d.f
2792   int UNUSED written = 0;
2793   IADDR UNUSED pc = abuf->addr;
2794   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2795
2796   {
2797     SI opval = * FLD (i_src1);
2798     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2799     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2800   }
2801
2802 #undef FLD
2803 }
2804   NEXT (vpc);
2805
2806   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2807 {
2808   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2809   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2810 #define FLD(f) abuf->fields.sfmt_st_plus.f
2811   int UNUSED written = 0;
2812   IADDR UNUSED pc = abuf->addr;
2813   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2814
2815   {
2816     QI opval = * FLD (i_src1);
2817     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2818     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2819   }
2820
2821 #undef FLD
2822 }
2823   NEXT (vpc);
2824
2825   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2826 {
2827   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2828   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2829 #define FLD(f) abuf->fields.sfmt_st_d.f
2830   int UNUSED written = 0;
2831   IADDR UNUSED pc = abuf->addr;
2832   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2833
2834   {
2835     QI opval = * FLD (i_src1);
2836     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2837     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2838   }
2839
2840 #undef FLD
2841 }
2842   NEXT (vpc);
2843
2844   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2845 {
2846   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2847   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2848 #define FLD(f) abuf->fields.sfmt_st_plus.f
2849   int UNUSED written = 0;
2850   IADDR UNUSED pc = abuf->addr;
2851   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2852
2853   {
2854     HI opval = * FLD (i_src1);
2855     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2856     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2857   }
2858
2859 #undef FLD
2860 }
2861   NEXT (vpc);
2862
2863   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2864 {
2865   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2866   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2867 #define FLD(f) abuf->fields.sfmt_st_d.f
2868   int UNUSED written = 0;
2869   IADDR UNUSED pc = abuf->addr;
2870   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2871
2872   {
2873     HI opval = * FLD (i_src1);
2874     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2875     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2876   }
2877
2878 #undef FLD
2879 }
2880   NEXT (vpc);
2881
2882   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2883 {
2884   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2885   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2886 #define FLD(f) abuf->fields.sfmt_st_plus.f
2887   int UNUSED written = 0;
2888   IADDR UNUSED pc = abuf->addr;
2889   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2890
2891 {
2892   SI tmp_new_src2;
2893   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2894   {
2895     SI opval = * FLD (i_src1);
2896     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2897     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2898   }
2899   {
2900     SI opval = tmp_new_src2;
2901     * FLD (i_src2) = opval;
2902     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2903   }
2904 }
2905
2906 #undef FLD
2907 }
2908   NEXT (vpc);
2909
2910   CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */
2911 {
2912   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2913   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2914 #define FLD(f) abuf->fields.sfmt_st_plus.f
2915   int UNUSED written = 0;
2916   IADDR UNUSED pc = abuf->addr;
2917   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2918
2919 {
2920   SI tmp_new_src2;
2921   tmp_new_src2 = * FLD (i_src2);
2922   {
2923     HI opval = * FLD (i_src1);
2924     SETMEMHI (current_cpu, pc, tmp_new_src2, opval);
2925     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2926   }
2927   {
2928     SI opval = ADDSI (tmp_new_src2, 2);
2929     * FLD (i_src2) = opval;
2930     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2931   }
2932 }
2933
2934 #undef FLD
2935 }
2936   NEXT (vpc);
2937
2938   CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */
2939 {
2940   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2941   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2942 #define FLD(f) abuf->fields.sfmt_st_plus.f
2943   int UNUSED written = 0;
2944   IADDR UNUSED pc = abuf->addr;
2945   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2946
2947 {
2948   SI tmp_new_src2;
2949   tmp_new_src2 = * FLD (i_src2);
2950   {
2951     QI opval = * FLD (i_src1);
2952     SETMEMQI (current_cpu, pc, tmp_new_src2, opval);
2953     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2954   }
2955   {
2956     SI opval = ADDSI (tmp_new_src2, 1);
2957     * FLD (i_src2) = opval;
2958     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2959   }
2960 }
2961
2962 #undef FLD
2963 }
2964   NEXT (vpc);
2965
2966   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2967 {
2968   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2969   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2970 #define FLD(f) abuf->fields.sfmt_st_plus.f
2971   int UNUSED written = 0;
2972   IADDR UNUSED pc = abuf->addr;
2973   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2974
2975 {
2976   SI tmp_new_src2;
2977   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2978   {
2979     SI opval = * FLD (i_src1);
2980     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2981     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2982   }
2983   {
2984     SI opval = tmp_new_src2;
2985     * FLD (i_src2) = opval;
2986     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2987   }
2988 }
2989
2990 #undef FLD
2991 }
2992   NEXT (vpc);
2993
2994   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2995 {
2996   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2997   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2998 #define FLD(f) abuf->fields.sfmt_add.f
2999   int UNUSED written = 0;
3000   IADDR UNUSED pc = abuf->addr;
3001   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3002
3003   {
3004     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
3005     * FLD (i_dr) = opval;
3006     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3007   }
3008
3009 #undef FLD
3010 }
3011   NEXT (vpc);
3012
3013   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
3014 {
3015   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3016   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3017 #define FLD(f) abuf->fields.sfmt_add.f
3018   int UNUSED written = 0;
3019   IADDR UNUSED pc = abuf->addr;
3020   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3021
3022 {
3023   SI temp0;BI temp1;
3024   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
3025   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3026   {
3027     SI opval = temp0;
3028     * FLD (i_dr) = opval;
3029     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3030   }
3031   {
3032     BI opval = temp1;
3033     CPU (h_cond) = opval;
3034     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3035   }
3036 }
3037
3038 #undef FLD
3039 }
3040   NEXT (vpc);
3041
3042   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
3043 {
3044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3046 #define FLD(f) abuf->fields.sfmt_add.f
3047   int UNUSED written = 0;
3048   IADDR UNUSED pc = abuf->addr;
3049   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3050
3051 {
3052   SI temp0;BI temp1;
3053   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3054   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3055   {
3056     SI opval = temp0;
3057     * FLD (i_dr) = opval;
3058     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3059   }
3060   {
3061     BI opval = temp1;
3062     CPU (h_cond) = opval;
3063     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3064   }
3065 }
3066
3067 #undef FLD
3068 }
3069   NEXT (vpc);
3070
3071   CASE (sem, INSN_TRAP) : /* trap $uimm4 */
3072 {
3073   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3074   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3075 #define FLD(f) abuf->fields.sfmt_trap.f
3076   int UNUSED written = 0;
3077   IADDR UNUSED pc = abuf->addr;
3078   SEM_BRANCH_INIT
3079   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3080
3081 {
3082   {
3083     USI opval = GET_H_CR (((UINT) 6));
3084     SET_H_CR (((UINT) 14), opval);
3085     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3086   }
3087   {
3088     USI opval = ADDSI (pc, 4);
3089     SET_H_CR (((UINT) 6), opval);
3090     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3091   }
3092   {
3093     UQI opval = CPU (h_bpsw);
3094     CPU (h_bbpsw) = opval;
3095     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
3096   }
3097   {
3098     UQI opval = GET_H_PSW ();
3099     CPU (h_bpsw) = opval;
3100     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
3101   }
3102   {
3103     UQI opval = ANDQI (GET_H_PSW (), 128);
3104     SET_H_PSW (opval);
3105     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
3106   }
3107   {
3108     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
3109     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3110     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3111   }
3112 }
3113
3114   SEM_BRANCH_FINI (vpc);
3115 #undef FLD
3116 }
3117   NEXT (vpc);
3118
3119   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
3120 {
3121   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3122   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3123 #define FLD(f) abuf->fields.sfmt_st_plus.f
3124   int UNUSED written = 0;
3125   IADDR UNUSED pc = abuf->addr;
3126   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3127
3128 {
3129 if (CPU (h_lock)) {
3130   {
3131     SI opval = * FLD (i_src1);
3132     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
3133     written |= (1 << 4);
3134     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3135   }
3136 }
3137   {
3138     BI opval = 0;
3139     CPU (h_lock) = opval;
3140     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
3141   }
3142 }
3143
3144   abuf->written = written;
3145 #undef FLD
3146 }
3147   NEXT (vpc);
3148
3149   CASE (sem, INSN_SATB) : /* satb $dr,$sr */
3150 {
3151   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3153 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3154   int UNUSED written = 0;
3155   IADDR UNUSED pc = abuf->addr;
3156   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3157
3158   {
3159     SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
3160     * FLD (i_dr) = opval;
3161     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3162   }
3163
3164 #undef FLD
3165 }
3166   NEXT (vpc);
3167
3168   CASE (sem, INSN_SATH) : /* sath $dr,$sr */
3169 {
3170   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3171   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3172 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3173   int UNUSED written = 0;
3174   IADDR UNUSED pc = abuf->addr;
3175   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3176
3177   {
3178     SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
3179     * FLD (i_dr) = opval;
3180     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3181   }
3182
3183 #undef FLD
3184 }
3185   NEXT (vpc);
3186
3187   CASE (sem, INSN_SAT) : /* sat $dr,$sr */
3188 {
3189   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3190   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3191 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3192   int UNUSED written = 0;
3193   IADDR UNUSED pc = abuf->addr;
3194   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3195
3196   {
3197     SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
3198     * FLD (i_dr) = opval;
3199     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3200   }
3201
3202 #undef FLD
3203 }
3204   NEXT (vpc);
3205
3206   CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
3207 {
3208   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3209   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3210 #define FLD(f) abuf->fields.sfmt_st_plus.f
3211   int UNUSED written = 0;
3212   IADDR UNUSED pc = abuf->addr;
3213   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3214
3215   {
3216     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
3217     CPU (h_cond) = opval;
3218     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3219   }
3220
3221 #undef FLD
3222 }
3223   NEXT (vpc);
3224
3225   CASE (sem, INSN_SADD) : /* sadd */
3226 {
3227   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3228   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3229 #define FLD(f) abuf->fields.sfmt_empty.f
3230   int UNUSED written = 0;
3231   IADDR UNUSED pc = abuf->addr;
3232   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3233
3234   {
3235     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3236     SET_H_ACCUMS (((UINT) 0), opval);
3237     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3238   }
3239
3240 #undef FLD
3241 }
3242   NEXT (vpc);
3243
3244   CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3245 {
3246   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3247   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3248 #define FLD(f) abuf->fields.sfmt_st_plus.f
3249   int UNUSED written = 0;
3250   IADDR UNUSED pc = abuf->addr;
3251   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3252
3253   {
3254     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3255     SET_H_ACCUMS (((UINT) 1), opval);
3256     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3257   }
3258
3259 #undef FLD
3260 }
3261   NEXT (vpc);
3262
3263   CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3264 {
3265   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3266   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3267 #define FLD(f) abuf->fields.sfmt_st_plus.f
3268   int UNUSED written = 0;
3269   IADDR UNUSED pc = abuf->addr;
3270   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3271
3272   {
3273     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3274     SET_H_ACCUM (opval);
3275     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3276   }
3277
3278 #undef FLD
3279 }
3280   NEXT (vpc);
3281
3282   CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3283 {
3284   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3285   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3286 #define FLD(f) abuf->fields.sfmt_st_plus.f
3287   int UNUSED written = 0;
3288   IADDR UNUSED pc = abuf->addr;
3289   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3290
3291   {
3292     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3293     SET_H_ACCUMS (((UINT) 1), opval);
3294     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3295   }
3296
3297 #undef FLD
3298 }
3299   NEXT (vpc);
3300
3301   CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3302 {
3303   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3304   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3305 #define FLD(f) abuf->fields.sfmt_st_plus.f
3306   int UNUSED written = 0;
3307   IADDR UNUSED pc = abuf->addr;
3308   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3309
3310   {
3311     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3312     SET_H_ACCUMS (((UINT) 1), opval);
3313     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3314   }
3315
3316 #undef FLD
3317 }
3318   NEXT (vpc);
3319
3320   CASE (sem, INSN_SC) : /* sc */
3321 {
3322   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3323   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3324 #define FLD(f) abuf->fields.sfmt_empty.f
3325   int UNUSED written = 0;
3326   IADDR UNUSED pc = abuf->addr;
3327   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3328
3329 if (ZEXTBISI (CPU (h_cond)))
3330   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3331
3332 #undef FLD
3333 }
3334   NEXT (vpc);
3335
3336   CASE (sem, INSN_SNC) : /* snc */
3337 {
3338   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3339   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3340 #define FLD(f) abuf->fields.sfmt_empty.f
3341   int UNUSED written = 0;
3342   IADDR UNUSED pc = abuf->addr;
3343   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3344
3345 if (ZEXTBISI (NOTBI (CPU (h_cond))))
3346   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3347
3348 #undef FLD
3349 }
3350   NEXT (vpc);
3351
3352   CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */
3353 {
3354   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3355   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3356 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3357   int UNUSED written = 0;
3358   IADDR UNUSED pc = abuf->addr;
3359   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3360
3361   {
3362     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
3363     SET_H_CR (((UINT) 0), opval);
3364     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3365   }
3366
3367 #undef FLD
3368 }
3369   NEXT (vpc);
3370
3371   CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */
3372 {
3373   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3374   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3375 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3376   int UNUSED written = 0;
3377   IADDR UNUSED pc = abuf->addr;
3378   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3379
3380   {
3381     USI opval = FLD (f_uimm8);
3382     SET_H_CR (((UINT) 0), opval);
3383     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3384   }
3385
3386 #undef FLD
3387 }
3388   NEXT (vpc);
3389
3390   CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */
3391 {
3392   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3393   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3394 #define FLD(f) abuf->fields.sfmt_bset.f
3395   int UNUSED written = 0;
3396   IADDR UNUSED pc = abuf->addr;
3397   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3398
3399   {
3400     QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3))));
3401     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3402     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3403   }
3404
3405 #undef FLD
3406 }
3407   NEXT (vpc);
3408
3409   CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */
3410 {
3411   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3412   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3413 #define FLD(f) abuf->fields.sfmt_bset.f
3414   int UNUSED written = 0;
3415   IADDR UNUSED pc = abuf->addr;
3416   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3417
3418   {
3419     QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3)))));
3420     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3421     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3422   }
3423
3424 #undef FLD
3425 }
3426   NEXT (vpc);
3427
3428   CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */
3429 {
3430   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3431   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3432 #define FLD(f) abuf->fields.sfmt_bset.f
3433   int UNUSED written = 0;
3434   IADDR UNUSED pc = abuf->addr;
3435   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3436
3437   {
3438     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
3439     CPU (h_cond) = opval;
3440     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3441   }
3442
3443 #undef FLD
3444 }
3445   NEXT (vpc);
3446
3447   CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3448 {
3449   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3450   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3451 #define FLD(f) abuf->fields.sfmt_add.f
3452 #define OPRND(f) par_exec->operands.sfmt_add.f
3453   int UNUSED written = 0;
3454   IADDR UNUSED pc = abuf->addr;
3455   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3456
3457   {
3458     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3459     OPRND (dr) = opval;
3460     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3461   }
3462
3463 #undef OPRND
3464 #undef FLD
3465 }
3466   NEXT (vpc);
3467
3468 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3469   {
3470     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3471     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3472 #define FLD(f) abuf->fields.sfmt_add.f
3473 #define OPRND(f) par_exec->operands.sfmt_add.f
3474     int UNUSED written = abuf->written;
3475     IADDR UNUSED pc = abuf->addr;
3476     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3477
3478   * FLD (i_dr) = OPRND (dr);
3479
3480 #undef OPRND
3481 #undef FLD
3482   }
3483   NEXT (vpc);
3484
3485   CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3486 {
3487   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3488   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3489 #define FLD(f) abuf->fields.sfmt_add.f
3490 #define OPRND(f) par_exec->operands.sfmt_add.f
3491   int UNUSED written = 0;
3492   IADDR UNUSED pc = abuf->addr;
3493   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3494
3495   {
3496     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3497     OPRND (dr) = opval;
3498     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3499   }
3500
3501 #undef OPRND
3502 #undef FLD
3503 }
3504   NEXT (vpc);
3505
3506 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3507   {
3508     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3509     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3510 #define FLD(f) abuf->fields.sfmt_add.f
3511 #define OPRND(f) par_exec->operands.sfmt_add.f
3512     int UNUSED written = abuf->written;
3513     IADDR UNUSED pc = abuf->addr;
3514     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3515
3516   * FLD (i_dr) = OPRND (dr);
3517
3518 #undef OPRND
3519 #undef FLD
3520   }
3521   NEXT (vpc);
3522
3523   CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3524 {
3525   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3526   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3527 #define FLD(f) abuf->fields.sfmt_add.f
3528 #define OPRND(f) par_exec->operands.sfmt_add.f
3529   int UNUSED written = 0;
3530   IADDR UNUSED pc = abuf->addr;
3531   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3532
3533   {
3534     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3535     OPRND (dr) = opval;
3536     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3537   }
3538
3539 #undef OPRND
3540 #undef FLD
3541 }
3542   NEXT (vpc);
3543
3544 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3545   {
3546     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3547     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3548 #define FLD(f) abuf->fields.sfmt_add.f
3549 #define OPRND(f) par_exec->operands.sfmt_add.f
3550     int UNUSED written = abuf->written;
3551     IADDR UNUSED pc = abuf->addr;
3552     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3553
3554   * FLD (i_dr) = OPRND (dr);
3555
3556 #undef OPRND
3557 #undef FLD
3558   }
3559   NEXT (vpc);
3560
3561   CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3562 {
3563   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3564   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3565 #define FLD(f) abuf->fields.sfmt_add.f
3566 #define OPRND(f) par_exec->operands.sfmt_add.f
3567   int UNUSED written = 0;
3568   IADDR UNUSED pc = abuf->addr;
3569   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3570
3571   {
3572     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3573     OPRND (dr) = opval;
3574     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3575   }
3576
3577 #undef OPRND
3578 #undef FLD
3579 }
3580   NEXT (vpc);
3581
3582 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3583   {
3584     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3585     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3586 #define FLD(f) abuf->fields.sfmt_add.f
3587 #define OPRND(f) par_exec->operands.sfmt_add.f
3588     int UNUSED written = abuf->written;
3589     IADDR UNUSED pc = abuf->addr;
3590     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3591
3592   * FLD (i_dr) = OPRND (dr);
3593
3594 #undef OPRND
3595 #undef FLD
3596   }
3597   NEXT (vpc);
3598
3599   CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3600 {
3601   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3602   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3603 #define FLD(f) abuf->fields.sfmt_addi.f
3604 #define OPRND(f) par_exec->operands.sfmt_addi.f
3605   int UNUSED written = 0;
3606   IADDR UNUSED pc = abuf->addr;
3607   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3608
3609   {
3610     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3611     OPRND (dr) = opval;
3612     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3613   }
3614
3615 #undef OPRND
3616 #undef FLD
3617 }
3618   NEXT (vpc);
3619
3620 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3621   {
3622     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3623     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3624 #define FLD(f) abuf->fields.sfmt_addi.f
3625 #define OPRND(f) par_exec->operands.sfmt_addi.f
3626     int UNUSED written = abuf->written;
3627     IADDR UNUSED pc = abuf->addr;
3628     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3629
3630   * FLD (i_dr) = OPRND (dr);
3631
3632 #undef OPRND
3633 #undef FLD
3634   }
3635   NEXT (vpc);
3636
3637   CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3638 {
3639   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3640   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3641 #define FLD(f) abuf->fields.sfmt_add.f
3642 #define OPRND(f) par_exec->operands.sfmt_addv.f
3643   int UNUSED written = 0;
3644   IADDR UNUSED pc = abuf->addr;
3645   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3646
3647 {
3648   SI temp0;BI temp1;
3649   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3650   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3651   {
3652     SI opval = temp0;
3653     OPRND (dr) = opval;
3654     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3655   }
3656   {
3657     BI opval = temp1;
3658     OPRND (condbit) = opval;
3659     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3660   }
3661 }
3662
3663 #undef OPRND
3664 #undef FLD
3665 }
3666   NEXT (vpc);
3667
3668 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3669   {
3670     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3671     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3672 #define FLD(f) abuf->fields.sfmt_add.f
3673 #define OPRND(f) par_exec->operands.sfmt_addv.f
3674     int UNUSED written = abuf->written;
3675     IADDR UNUSED pc = abuf->addr;
3676     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3677
3678   CPU (h_cond) = OPRND (condbit);
3679   * FLD (i_dr) = OPRND (dr);
3680
3681 #undef OPRND
3682 #undef FLD
3683   }
3684   NEXT (vpc);
3685
3686   CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3687 {
3688   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3689   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3690 #define FLD(f) abuf->fields.sfmt_add.f
3691 #define OPRND(f) par_exec->operands.sfmt_addx.f
3692   int UNUSED written = 0;
3693   IADDR UNUSED pc = abuf->addr;
3694   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3695
3696 {
3697   SI temp0;BI temp1;
3698   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3699   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3700   {
3701     SI opval = temp0;
3702     OPRND (dr) = opval;
3703     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3704   }
3705   {
3706     BI opval = temp1;
3707     OPRND (condbit) = opval;
3708     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3709   }
3710 }
3711
3712 #undef OPRND
3713 #undef FLD
3714 }
3715   NEXT (vpc);
3716
3717 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3718   {
3719     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3720     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3721 #define FLD(f) abuf->fields.sfmt_add.f
3722 #define OPRND(f) par_exec->operands.sfmt_addx.f
3723     int UNUSED written = abuf->written;
3724     IADDR UNUSED pc = abuf->addr;
3725     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3726
3727   CPU (h_cond) = OPRND (condbit);
3728   * FLD (i_dr) = OPRND (dr);
3729
3730 #undef OPRND
3731 #undef FLD
3732   }
3733   NEXT (vpc);
3734
3735   CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3736 {
3737   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3738   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3739 #define FLD(f) abuf->fields.sfmt_bl8.f
3740 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3741   int UNUSED written = 0;
3742   IADDR UNUSED pc = abuf->addr;
3743   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3744
3745 if (CPU (h_cond)) {
3746   {
3747     USI opval = FLD (i_disp8);
3748     OPRND (pc) = opval;
3749     written |= (1 << 2);
3750     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3751   }
3752 }
3753
3754   abuf->written = written;
3755 #undef OPRND
3756 #undef FLD
3757 }
3758   NEXT (vpc);
3759
3760 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3761   {
3762     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3763     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3764 #define FLD(f) abuf->fields.sfmt_bl8.f
3765 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3766     int UNUSED written = abuf->written;
3767     IADDR UNUSED pc = abuf->addr;
3768     SEM_BRANCH_INIT
3769     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3770
3771   if (written & (1 << 2))
3772     {
3773       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3774     }
3775
3776   SEM_BRANCH_FINI (vpc);
3777 #undef OPRND
3778 #undef FLD
3779   }
3780   NEXT (vpc);
3781
3782   CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3783 {
3784   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3785   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3786 #define FLD(f) abuf->fields.sfmt_bl8.f
3787 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3788   int UNUSED written = 0;
3789   IADDR UNUSED pc = abuf->addr;
3790   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3791
3792 {
3793   {
3794     SI opval = ADDSI (ANDSI (pc, -4), 4);
3795     OPRND (h_gr_SI_14) = opval;
3796     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3797   }
3798   {
3799     USI opval = FLD (i_disp8);
3800     OPRND (pc) = opval;
3801     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3802   }
3803 }
3804
3805 #undef OPRND
3806 #undef FLD
3807 }
3808   NEXT (vpc);
3809
3810 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3811   {
3812     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3813     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3814 #define FLD(f) abuf->fields.sfmt_bl8.f
3815 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3816     int UNUSED written = abuf->written;
3817     IADDR UNUSED pc = abuf->addr;
3818     SEM_BRANCH_INIT
3819     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3820
3821   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3822   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3823
3824   SEM_BRANCH_FINI (vpc);
3825 #undef OPRND
3826 #undef FLD
3827   }
3828   NEXT (vpc);
3829
3830   CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3831 {
3832   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3833   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3834 #define FLD(f) abuf->fields.sfmt_bl8.f
3835 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3836   int UNUSED written = 0;
3837   IADDR UNUSED pc = abuf->addr;
3838   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3839
3840 if (CPU (h_cond)) {
3841 {
3842   {
3843     SI opval = ADDSI (ANDSI (pc, -4), 4);
3844     OPRND (h_gr_SI_14) = opval;
3845     written |= (1 << 3);
3846     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3847   }
3848   {
3849     USI opval = FLD (i_disp8);
3850     OPRND (pc) = opval;
3851     written |= (1 << 4);
3852     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3853   }
3854 }
3855 }
3856
3857   abuf->written = written;
3858 #undef OPRND
3859 #undef FLD
3860 }
3861   NEXT (vpc);
3862
3863 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3864   {
3865     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3866     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3867 #define FLD(f) abuf->fields.sfmt_bl8.f
3868 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3869     int UNUSED written = abuf->written;
3870     IADDR UNUSED pc = abuf->addr;
3871     SEM_BRANCH_INIT
3872     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3873
3874   if (written & (1 << 3))
3875     {
3876       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3877     }
3878   if (written & (1 << 4))
3879     {
3880       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3881     }
3882
3883   SEM_BRANCH_FINI (vpc);
3884 #undef OPRND
3885 #undef FLD
3886   }
3887   NEXT (vpc);
3888
3889   CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3890 {
3891   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3892   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3893 #define FLD(f) abuf->fields.sfmt_bl8.f
3894 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3895   int UNUSED written = 0;
3896   IADDR UNUSED pc = abuf->addr;
3897   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3898
3899 if (NOTBI (CPU (h_cond))) {
3900   {
3901     USI opval = FLD (i_disp8);
3902     OPRND (pc) = opval;
3903     written |= (1 << 2);
3904     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3905   }
3906 }
3907
3908   abuf->written = written;
3909 #undef OPRND
3910 #undef FLD
3911 }
3912   NEXT (vpc);
3913
3914 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3915   {
3916     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3917     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3918 #define FLD(f) abuf->fields.sfmt_bl8.f
3919 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3920     int UNUSED written = abuf->written;
3921     IADDR UNUSED pc = abuf->addr;
3922     SEM_BRANCH_INIT
3923     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3924
3925   if (written & (1 << 2))
3926     {
3927       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3928     }
3929
3930   SEM_BRANCH_FINI (vpc);
3931 #undef OPRND
3932 #undef FLD
3933   }
3934   NEXT (vpc);
3935
3936   CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3937 {
3938   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3939   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3940 #define FLD(f) abuf->fields.sfmt_bl8.f
3941 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3942   int UNUSED written = 0;
3943   IADDR UNUSED pc = abuf->addr;
3944   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3945
3946   {
3947     USI opval = FLD (i_disp8);
3948     OPRND (pc) = opval;
3949     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3950   }
3951
3952 #undef OPRND
3953 #undef FLD
3954 }
3955   NEXT (vpc);
3956
3957 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3958   {
3959     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3960     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3961 #define FLD(f) abuf->fields.sfmt_bl8.f
3962 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3963     int UNUSED written = abuf->written;
3964     IADDR UNUSED pc = abuf->addr;
3965     SEM_BRANCH_INIT
3966     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3967
3968   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3969
3970   SEM_BRANCH_FINI (vpc);
3971 #undef OPRND
3972 #undef FLD
3973   }
3974   NEXT (vpc);
3975
3976   CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3977 {
3978   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3979   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3980 #define FLD(f) abuf->fields.sfmt_bl8.f
3981 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3982   int UNUSED written = 0;
3983   IADDR UNUSED pc = abuf->addr;
3984   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3985
3986 if (NOTBI (CPU (h_cond))) {
3987 {
3988   {
3989     SI opval = ADDSI (ANDSI (pc, -4), 4);
3990     OPRND (h_gr_SI_14) = opval;
3991     written |= (1 << 3);
3992     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3993   }
3994   {
3995     USI opval = FLD (i_disp8);
3996     OPRND (pc) = opval;
3997     written |= (1 << 4);
3998     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3999   }
4000 }
4001 }
4002
4003   abuf->written = written;
4004 #undef OPRND
4005 #undef FLD
4006 }
4007   NEXT (vpc);
4008
4009 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
4010   {
4011     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4012     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4013 #define FLD(f) abuf->fields.sfmt_bl8.f
4014 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
4015     int UNUSED written = abuf->written;
4016     IADDR UNUSED pc = abuf->addr;
4017     SEM_BRANCH_INIT
4018     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4019
4020   if (written & (1 << 3))
4021     {
4022       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4023     }
4024   if (written & (1 << 4))
4025     {
4026       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4027     }
4028
4029   SEM_BRANCH_FINI (vpc);
4030 #undef OPRND
4031 #undef FLD
4032   }
4033   NEXT (vpc);
4034
4035   CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
4036 {
4037   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4038   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4039 #define FLD(f) abuf->fields.sfmt_st_plus.f
4040 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4041   int UNUSED written = 0;
4042   IADDR UNUSED pc = abuf->addr;
4043   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4044
4045   {
4046     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
4047     OPRND (condbit) = opval;
4048     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4049   }
4050
4051 #undef OPRND
4052 #undef FLD
4053 }
4054   NEXT (vpc);
4055
4056 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
4057   {
4058     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4059     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4060 #define FLD(f) abuf->fields.sfmt_st_plus.f
4061 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4062     int UNUSED written = abuf->written;
4063     IADDR UNUSED pc = abuf->addr;
4064     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4065
4066   CPU (h_cond) = OPRND (condbit);
4067
4068 #undef OPRND
4069 #undef FLD
4070   }
4071   NEXT (vpc);
4072
4073   CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
4074 {
4075   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4076   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4077 #define FLD(f) abuf->fields.sfmt_st_plus.f
4078 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4079   int UNUSED written = 0;
4080   IADDR UNUSED pc = abuf->addr;
4081   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4082
4083   {
4084     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
4085     OPRND (condbit) = opval;
4086     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4087   }
4088
4089 #undef OPRND
4090 #undef FLD
4091 }
4092   NEXT (vpc);
4093
4094 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
4095   {
4096     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4097     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4098 #define FLD(f) abuf->fields.sfmt_st_plus.f
4099 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4100     int UNUSED written = abuf->written;
4101     IADDR UNUSED pc = abuf->addr;
4102     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4103
4104   CPU (h_cond) = OPRND (condbit);
4105
4106 #undef OPRND
4107 #undef FLD
4108   }
4109   NEXT (vpc);
4110
4111   CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
4112 {
4113   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4114   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4115 #define FLD(f) abuf->fields.sfmt_st_plus.f
4116 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4117   int UNUSED written = 0;
4118   IADDR UNUSED pc = abuf->addr;
4119   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4120
4121   {
4122     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
4123     OPRND (condbit) = opval;
4124     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4125   }
4126
4127 #undef OPRND
4128 #undef FLD
4129 }
4130   NEXT (vpc);
4131
4132 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
4133   {
4134     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4135     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4136 #define FLD(f) abuf->fields.sfmt_st_plus.f
4137 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4138     int UNUSED written = abuf->written;
4139     IADDR UNUSED pc = abuf->addr;
4140     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4141
4142   CPU (h_cond) = OPRND (condbit);
4143
4144 #undef OPRND
4145 #undef FLD
4146   }
4147   NEXT (vpc);
4148
4149   CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
4150 {
4151   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4153 #define FLD(f) abuf->fields.sfmt_st_plus.f
4154 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4155   int UNUSED written = 0;
4156   IADDR UNUSED pc = abuf->addr;
4157   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4158
4159   {
4160     BI opval = EQSI (* FLD (i_src2), 0);
4161     OPRND (condbit) = opval;
4162     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4163   }
4164
4165 #undef OPRND
4166 #undef FLD
4167 }
4168   NEXT (vpc);
4169
4170 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
4171   {
4172     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4173     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4174 #define FLD(f) abuf->fields.sfmt_st_plus.f
4175 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4176     int UNUSED written = abuf->written;
4177     IADDR UNUSED pc = abuf->addr;
4178     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4179
4180   CPU (h_cond) = OPRND (condbit);
4181
4182 #undef OPRND
4183 #undef FLD
4184   }
4185   NEXT (vpc);
4186
4187   CASE (sem, INSN_PAR_JC) : /* jc $sr */
4188 {
4189   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4190   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4191 #define FLD(f) abuf->fields.sfmt_jl.f
4192 #define OPRND(f) par_exec->operands.sfmt_jc.f
4193   int UNUSED written = 0;
4194   IADDR UNUSED pc = abuf->addr;
4195   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4196
4197 if (CPU (h_cond)) {
4198   {
4199     USI opval = ANDSI (* FLD (i_sr), -4);
4200     OPRND (pc) = opval;
4201     written |= (1 << 2);
4202     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4203   }
4204 }
4205
4206   abuf->written = written;
4207 #undef OPRND
4208 #undef FLD
4209 }
4210   NEXT (vpc);
4211
4212 CASE (sem, INSN_WRITE_JC) : /* jc $sr */
4213   {
4214     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4215     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4216 #define FLD(f) abuf->fields.sfmt_jl.f
4217 #define OPRND(f) par_exec->operands.sfmt_jc.f
4218     int UNUSED written = abuf->written;
4219     IADDR UNUSED pc = abuf->addr;
4220     SEM_BRANCH_INIT
4221     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4222
4223   if (written & (1 << 2))
4224     {
4225       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4226     }
4227
4228   SEM_BRANCH_FINI (vpc);
4229 #undef OPRND
4230 #undef FLD
4231   }
4232   NEXT (vpc);
4233
4234   CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
4235 {
4236   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4237   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4238 #define FLD(f) abuf->fields.sfmt_jl.f
4239 #define OPRND(f) par_exec->operands.sfmt_jc.f
4240   int UNUSED written = 0;
4241   IADDR UNUSED pc = abuf->addr;
4242   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4243
4244 if (NOTBI (CPU (h_cond))) {
4245   {
4246     USI opval = ANDSI (* FLD (i_sr), -4);
4247     OPRND (pc) = opval;
4248     written |= (1 << 2);
4249     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4250   }
4251 }
4252
4253   abuf->written = written;
4254 #undef OPRND
4255 #undef FLD
4256 }
4257   NEXT (vpc);
4258
4259 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
4260   {
4261     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4262     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4263 #define FLD(f) abuf->fields.sfmt_jl.f
4264 #define OPRND(f) par_exec->operands.sfmt_jc.f
4265     int UNUSED written = abuf->written;
4266     IADDR UNUSED pc = abuf->addr;
4267     SEM_BRANCH_INIT
4268     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4269
4270   if (written & (1 << 2))
4271     {
4272       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4273     }
4274
4275   SEM_BRANCH_FINI (vpc);
4276 #undef OPRND
4277 #undef FLD
4278   }
4279   NEXT (vpc);
4280
4281   CASE (sem, INSN_PAR_JL) : /* jl $sr */
4282 {
4283   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4284   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4285 #define FLD(f) abuf->fields.sfmt_jl.f
4286 #define OPRND(f) par_exec->operands.sfmt_jl.f
4287   int UNUSED written = 0;
4288   IADDR UNUSED pc = abuf->addr;
4289   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4290
4291 {
4292   SI temp0;USI temp1;
4293   temp0 = ADDSI (ANDSI (pc, -4), 4);
4294   temp1 = ANDSI (* FLD (i_sr), -4);
4295   {
4296     SI opval = temp0;
4297     OPRND (h_gr_SI_14) = opval;
4298     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4299   }
4300   {
4301     USI opval = temp1;
4302     OPRND (pc) = opval;
4303     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4304   }
4305 }
4306
4307 #undef OPRND
4308 #undef FLD
4309 }
4310   NEXT (vpc);
4311
4312 CASE (sem, INSN_WRITE_JL) : /* jl $sr */
4313   {
4314     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4315     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4316 #define FLD(f) abuf->fields.sfmt_jl.f
4317 #define OPRND(f) par_exec->operands.sfmt_jl.f
4318     int UNUSED written = abuf->written;
4319     IADDR UNUSED pc = abuf->addr;
4320     SEM_BRANCH_INIT
4321     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4322
4323   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4324   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4325
4326   SEM_BRANCH_FINI (vpc);
4327 #undef OPRND
4328 #undef FLD
4329   }
4330   NEXT (vpc);
4331
4332   CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4333 {
4334   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4335   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4336 #define FLD(f) abuf->fields.sfmt_jl.f
4337 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4338   int UNUSED written = 0;
4339   IADDR UNUSED pc = abuf->addr;
4340   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4341
4342   {
4343     USI opval = ANDSI (* FLD (i_sr), -4);
4344     OPRND (pc) = opval;
4345     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4346   }
4347
4348 #undef OPRND
4349 #undef FLD
4350 }
4351   NEXT (vpc);
4352
4353 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4354   {
4355     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4356     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4357 #define FLD(f) abuf->fields.sfmt_jl.f
4358 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4359     int UNUSED written = abuf->written;
4360     IADDR UNUSED pc = abuf->addr;
4361     SEM_BRANCH_INIT
4362     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4363
4364   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4365
4366   SEM_BRANCH_FINI (vpc);
4367 #undef OPRND
4368 #undef FLD
4369   }
4370   NEXT (vpc);
4371
4372   CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4373 {
4374   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4375   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4376 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4377 #define OPRND(f) par_exec->operands.sfmt_ld.f
4378   int UNUSED written = 0;
4379   IADDR UNUSED pc = abuf->addr;
4380   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4381
4382   {
4383     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4384     OPRND (dr) = opval;
4385     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4386   }
4387
4388 #undef OPRND
4389 #undef FLD
4390 }
4391   NEXT (vpc);
4392
4393 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4394   {
4395     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4396     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4397 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4398 #define OPRND(f) par_exec->operands.sfmt_ld.f
4399     int UNUSED written = abuf->written;
4400     IADDR UNUSED pc = abuf->addr;
4401     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4402
4403   * FLD (i_dr) = OPRND (dr);
4404
4405 #undef OPRND
4406 #undef FLD
4407   }
4408   NEXT (vpc);
4409
4410   CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4411 {
4412   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4413   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4414 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4415 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4416   int UNUSED written = 0;
4417   IADDR UNUSED pc = abuf->addr;
4418   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4419
4420   {
4421     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4422     OPRND (dr) = opval;
4423     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4424   }
4425
4426 #undef OPRND
4427 #undef FLD
4428 }
4429   NEXT (vpc);
4430
4431 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4432   {
4433     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4434     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4435 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4436 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4437     int UNUSED written = abuf->written;
4438     IADDR UNUSED pc = abuf->addr;
4439     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4440
4441   * FLD (i_dr) = OPRND (dr);
4442
4443 #undef OPRND
4444 #undef FLD
4445   }
4446   NEXT (vpc);
4447
4448   CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4449 {
4450   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4451   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4452 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4453 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4454   int UNUSED written = 0;
4455   IADDR UNUSED pc = abuf->addr;
4456   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4457
4458   {
4459     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4460     OPRND (dr) = opval;
4461     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4462   }
4463
4464 #undef OPRND
4465 #undef FLD
4466 }
4467   NEXT (vpc);
4468
4469 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4470   {
4471     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4472     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4473 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4474 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4475     int UNUSED written = abuf->written;
4476     IADDR UNUSED pc = abuf->addr;
4477     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4478
4479   * FLD (i_dr) = OPRND (dr);
4480
4481 #undef OPRND
4482 #undef FLD
4483   }
4484   NEXT (vpc);
4485
4486   CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4487 {
4488   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4489   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4490 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4491 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4492   int UNUSED written = 0;
4493   IADDR UNUSED pc = abuf->addr;
4494   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4495
4496   {
4497     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4498     OPRND (dr) = opval;
4499     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4500   }
4501
4502 #undef OPRND
4503 #undef FLD
4504 }
4505   NEXT (vpc);
4506
4507 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4508   {
4509     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4510     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4511 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4512 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4513     int UNUSED written = abuf->written;
4514     IADDR UNUSED pc = abuf->addr;
4515     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4516
4517   * FLD (i_dr) = OPRND (dr);
4518
4519 #undef OPRND
4520 #undef FLD
4521   }
4522   NEXT (vpc);
4523
4524   CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4525 {
4526   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4527   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4528 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4529 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4530   int UNUSED written = 0;
4531   IADDR UNUSED pc = abuf->addr;
4532   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4533
4534   {
4535     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4536     OPRND (dr) = opval;
4537     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4538   }
4539
4540 #undef OPRND
4541 #undef FLD
4542 }
4543   NEXT (vpc);
4544
4545 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4546   {
4547     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4548     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4549 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4550 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4551     int UNUSED written = abuf->written;
4552     IADDR UNUSED pc = abuf->addr;
4553     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4554
4555   * FLD (i_dr) = OPRND (dr);
4556
4557 #undef OPRND
4558 #undef FLD
4559   }
4560   NEXT (vpc);
4561
4562   CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4563 {
4564   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4565   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4566 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4567 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4568   int UNUSED written = 0;
4569   IADDR UNUSED pc = abuf->addr;
4570   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4571
4572 {
4573   SI temp0;SI temp1;
4574   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4575   temp1 = ADDSI (* FLD (i_sr), 4);
4576   {
4577     SI opval = temp0;
4578     OPRND (dr) = opval;
4579     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4580   }
4581   {
4582     SI opval = temp1;
4583     OPRND (sr) = opval;
4584     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4585   }
4586 }
4587
4588 #undef OPRND
4589 #undef FLD
4590 }
4591   NEXT (vpc);
4592
4593 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4594   {
4595     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4596     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4597 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4598 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4599     int UNUSED written = abuf->written;
4600     IADDR UNUSED pc = abuf->addr;
4601     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4602
4603   * FLD (i_dr) = OPRND (dr);
4604   * FLD (i_sr) = OPRND (sr);
4605
4606 #undef OPRND
4607 #undef FLD
4608   }
4609   NEXT (vpc);
4610
4611   CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4612 {
4613   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4614   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4615 #define FLD(f) abuf->fields.sfmt_addi.f
4616 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4617   int UNUSED written = 0;
4618   IADDR UNUSED pc = abuf->addr;
4619   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4620
4621   {
4622     SI opval = FLD (f_simm8);
4623     OPRND (dr) = opval;
4624     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4625   }
4626
4627 #undef OPRND
4628 #undef FLD
4629 }
4630   NEXT (vpc);
4631
4632 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4633   {
4634     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4635     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4636 #define FLD(f) abuf->fields.sfmt_addi.f
4637 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4638     int UNUSED written = abuf->written;
4639     IADDR UNUSED pc = abuf->addr;
4640     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4641
4642   * FLD (i_dr) = OPRND (dr);
4643
4644 #undef OPRND
4645 #undef FLD
4646   }
4647   NEXT (vpc);
4648
4649   CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4650 {
4651   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4652   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4653 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4654 #define OPRND(f) par_exec->operands.sfmt_lock.f
4655   int UNUSED written = 0;
4656   IADDR UNUSED pc = abuf->addr;
4657   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4658
4659 {
4660   {
4661     BI opval = 1;
4662     OPRND (h_lock_BI) = opval;
4663     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4664   }
4665   {
4666     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4667     OPRND (dr) = opval;
4668     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4669   }
4670 }
4671
4672 #undef OPRND
4673 #undef FLD
4674 }
4675   NEXT (vpc);
4676
4677 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4678   {
4679     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4680     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4681 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4682 #define OPRND(f) par_exec->operands.sfmt_lock.f
4683     int UNUSED written = abuf->written;
4684     IADDR UNUSED pc = abuf->addr;
4685     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4686
4687   * FLD (i_dr) = OPRND (dr);
4688   CPU (h_lock) = OPRND (h_lock_BI);
4689
4690 #undef OPRND
4691 #undef FLD
4692   }
4693   NEXT (vpc);
4694
4695   CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4696 {
4697   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4698   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4699 #define FLD(f) abuf->fields.sfmt_machi_a.f
4700 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4701   int UNUSED written = 0;
4702   IADDR UNUSED pc = abuf->addr;
4703   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4704
4705   {
4706     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4707     OPRND (acc) = opval;
4708     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4709   }
4710
4711 #undef OPRND
4712 #undef FLD
4713 }
4714   NEXT (vpc);
4715
4716 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4717   {
4718     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4719     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4720 #define FLD(f) abuf->fields.sfmt_machi_a.f
4721 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4722     int UNUSED written = abuf->written;
4723     IADDR UNUSED pc = abuf->addr;
4724     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4725
4726   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4727
4728 #undef OPRND
4729 #undef FLD
4730   }
4731   NEXT (vpc);
4732
4733   CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4734 {
4735   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4736   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4737 #define FLD(f) abuf->fields.sfmt_machi_a.f
4738 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4739   int UNUSED written = 0;
4740   IADDR UNUSED pc = abuf->addr;
4741   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4742
4743   {
4744     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4745     OPRND (acc) = opval;
4746     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4747   }
4748
4749 #undef OPRND
4750 #undef FLD
4751 }
4752   NEXT (vpc);
4753
4754 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4755   {
4756     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4757     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4758 #define FLD(f) abuf->fields.sfmt_machi_a.f
4759 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4760     int UNUSED written = abuf->written;
4761     IADDR UNUSED pc = abuf->addr;
4762     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4763
4764   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4765
4766 #undef OPRND
4767 #undef FLD
4768   }
4769   NEXT (vpc);
4770
4771   CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4772 {
4773   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4774   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4775 #define FLD(f) abuf->fields.sfmt_machi_a.f
4776 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4777   int UNUSED written = 0;
4778   IADDR UNUSED pc = abuf->addr;
4779   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4780
4781   {
4782     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4783     OPRND (acc) = opval;
4784     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4785   }
4786
4787 #undef OPRND
4788 #undef FLD
4789 }
4790   NEXT (vpc);
4791
4792 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4793   {
4794     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4795     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4796 #define FLD(f) abuf->fields.sfmt_machi_a.f
4797 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4798     int UNUSED written = abuf->written;
4799     IADDR UNUSED pc = abuf->addr;
4800     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4801
4802   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4803
4804 #undef OPRND
4805 #undef FLD
4806   }
4807   NEXT (vpc);
4808
4809   CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4810 {
4811   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4812   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4813 #define FLD(f) abuf->fields.sfmt_machi_a.f
4814 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4815   int UNUSED written = 0;
4816   IADDR UNUSED pc = abuf->addr;
4817   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4818
4819   {
4820     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4821     OPRND (acc) = opval;
4822     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4823   }
4824
4825 #undef OPRND
4826 #undef FLD
4827 }
4828   NEXT (vpc);
4829
4830 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4831   {
4832     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4833     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4834 #define FLD(f) abuf->fields.sfmt_machi_a.f
4835 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4836     int UNUSED written = abuf->written;
4837     IADDR UNUSED pc = abuf->addr;
4838     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4839
4840   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4841
4842 #undef OPRND
4843 #undef FLD
4844   }
4845   NEXT (vpc);
4846
4847   CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4848 {
4849   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4850   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4851 #define FLD(f) abuf->fields.sfmt_add.f
4852 #define OPRND(f) par_exec->operands.sfmt_add.f
4853   int UNUSED written = 0;
4854   IADDR UNUSED pc = abuf->addr;
4855   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4856
4857   {
4858     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4859     OPRND (dr) = opval;
4860     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4861   }
4862
4863 #undef OPRND
4864 #undef FLD
4865 }
4866   NEXT (vpc);
4867
4868 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4869   {
4870     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4871     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4872 #define FLD(f) abuf->fields.sfmt_add.f
4873 #define OPRND(f) par_exec->operands.sfmt_add.f
4874     int UNUSED written = abuf->written;
4875     IADDR UNUSED pc = abuf->addr;
4876     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4877
4878   * FLD (i_dr) = OPRND (dr);
4879
4880 #undef OPRND
4881 #undef FLD
4882   }
4883   NEXT (vpc);
4884
4885   CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4886 {
4887   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4888   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4889 #define FLD(f) abuf->fields.sfmt_machi_a.f
4890 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4891   int UNUSED written = 0;
4892   IADDR UNUSED pc = abuf->addr;
4893   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4894
4895   {
4896     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4897     OPRND (acc) = opval;
4898     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4899   }
4900
4901 #undef OPRND
4902 #undef FLD
4903 }
4904   NEXT (vpc);
4905
4906 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4907   {
4908     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4909     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4910 #define FLD(f) abuf->fields.sfmt_machi_a.f
4911 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4912     int UNUSED written = abuf->written;
4913     IADDR UNUSED pc = abuf->addr;
4914     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4915
4916   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4917
4918 #undef OPRND
4919 #undef FLD
4920   }
4921   NEXT (vpc);
4922
4923   CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4924 {
4925   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4926   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4927 #define FLD(f) abuf->fields.sfmt_machi_a.f
4928 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4929   int UNUSED written = 0;
4930   IADDR UNUSED pc = abuf->addr;
4931   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4932
4933   {
4934     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4935     OPRND (acc) = opval;
4936     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4937   }
4938
4939 #undef OPRND
4940 #undef FLD
4941 }
4942   NEXT (vpc);
4943
4944 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4945   {
4946     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4947     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4948 #define FLD(f) abuf->fields.sfmt_machi_a.f
4949 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4950     int UNUSED written = abuf->written;
4951     IADDR UNUSED pc = abuf->addr;
4952     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4953
4954   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4955
4956 #undef OPRND
4957 #undef FLD
4958   }
4959   NEXT (vpc);
4960
4961   CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4962 {
4963   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4964   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4965 #define FLD(f) abuf->fields.sfmt_machi_a.f
4966 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4967   int UNUSED written = 0;
4968   IADDR UNUSED pc = abuf->addr;
4969   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4970
4971   {
4972     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4973     OPRND (acc) = opval;
4974     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4975   }
4976
4977 #undef OPRND
4978 #undef FLD
4979 }
4980   NEXT (vpc);
4981
4982 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4983   {
4984     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4985     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4986 #define FLD(f) abuf->fields.sfmt_machi_a.f
4987 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4988     int UNUSED written = abuf->written;
4989     IADDR UNUSED pc = abuf->addr;
4990     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4991
4992   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4993
4994 #undef OPRND
4995 #undef FLD
4996   }
4997   NEXT (vpc);
4998
4999   CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
5000 {
5001   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5002   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5003 #define FLD(f) abuf->fields.sfmt_machi_a.f
5004 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
5005   int UNUSED written = 0;
5006   IADDR UNUSED pc = abuf->addr;
5007   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5008
5009   {
5010     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
5011     OPRND (acc) = opval;
5012     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5013   }
5014
5015 #undef OPRND
5016 #undef FLD
5017 }
5018   NEXT (vpc);
5019
5020 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
5021   {
5022     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5023     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5024 #define FLD(f) abuf->fields.sfmt_machi_a.f
5025 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
5026     int UNUSED written = abuf->written;
5027     IADDR UNUSED pc = abuf->addr;
5028     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5029
5030   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
5031
5032 #undef OPRND
5033 #undef FLD
5034   }
5035   NEXT (vpc);
5036
5037   CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
5038 {
5039   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5040   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5041 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5042 #define OPRND(f) par_exec->operands.sfmt_mv.f
5043   int UNUSED written = 0;
5044   IADDR UNUSED pc = abuf->addr;
5045   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5046
5047   {
5048     SI opval = * FLD (i_sr);
5049     OPRND (dr) = opval;
5050     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5051   }
5052
5053 #undef OPRND
5054 #undef FLD
5055 }
5056   NEXT (vpc);
5057
5058 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
5059   {
5060     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5061     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5062 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5063 #define OPRND(f) par_exec->operands.sfmt_mv.f
5064     int UNUSED written = abuf->written;
5065     IADDR UNUSED pc = abuf->addr;
5066     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5067
5068   * FLD (i_dr) = OPRND (dr);
5069
5070 #undef OPRND
5071 #undef FLD
5072   }
5073   NEXT (vpc);
5074
5075   CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
5076 {
5077   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5078   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5079 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5080 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5081   int UNUSED written = 0;
5082   IADDR UNUSED pc = abuf->addr;
5083   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5084
5085   {
5086     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
5087     OPRND (dr) = opval;
5088     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5089   }
5090
5091 #undef OPRND
5092 #undef FLD
5093 }
5094   NEXT (vpc);
5095
5096 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
5097   {
5098     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5099     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5100 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5101 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5102     int UNUSED written = abuf->written;
5103     IADDR UNUSED pc = abuf->addr;
5104     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5105
5106   * FLD (i_dr) = OPRND (dr);
5107
5108 #undef OPRND
5109 #undef FLD
5110   }
5111   NEXT (vpc);
5112
5113   CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
5114 {
5115   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5116   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5117 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5118 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5119   int UNUSED written = 0;
5120   IADDR UNUSED pc = abuf->addr;
5121   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5122
5123   {
5124     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
5125     OPRND (dr) = opval;
5126     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5127   }
5128
5129 #undef OPRND
5130 #undef FLD
5131 }
5132   NEXT (vpc);
5133
5134 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
5135   {
5136     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5137     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5138 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5139 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5140     int UNUSED written = abuf->written;
5141     IADDR UNUSED pc = abuf->addr;
5142     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5143
5144   * FLD (i_dr) = OPRND (dr);
5145
5146 #undef OPRND
5147 #undef FLD
5148   }
5149   NEXT (vpc);
5150
5151   CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
5152 {
5153   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5154   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5155 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5156 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5157   int UNUSED written = 0;
5158   IADDR UNUSED pc = abuf->addr;
5159   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5160
5161   {
5162     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
5163     OPRND (dr) = opval;
5164     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5165   }
5166
5167 #undef OPRND
5168 #undef FLD
5169 }
5170   NEXT (vpc);
5171
5172 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
5173   {
5174     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5175     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5176 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5177 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5178     int UNUSED written = abuf->written;
5179     IADDR UNUSED pc = abuf->addr;
5180     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5181
5182   * FLD (i_dr) = OPRND (dr);
5183
5184 #undef OPRND
5185 #undef FLD
5186   }
5187   NEXT (vpc);
5188
5189   CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
5190 {
5191   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5192   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5193 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5194 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5195   int UNUSED written = 0;
5196   IADDR UNUSED pc = abuf->addr;
5197   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5198
5199   {
5200     SI opval = GET_H_CR (FLD (f_r2));
5201     OPRND (dr) = opval;
5202     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5203   }
5204
5205 #undef OPRND
5206 #undef FLD
5207 }
5208   NEXT (vpc);
5209
5210 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
5211   {
5212     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5213     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5214 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5215 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5216     int UNUSED written = abuf->written;
5217     IADDR UNUSED pc = abuf->addr;
5218     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5219
5220   * FLD (i_dr) = OPRND (dr);
5221
5222 #undef OPRND
5223 #undef FLD
5224   }
5225   NEXT (vpc);
5226
5227   CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
5228 {
5229   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5230   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5231 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5232 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5233   int UNUSED written = 0;
5234   IADDR UNUSED pc = abuf->addr;
5235   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5236
5237   {
5238     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
5239     OPRND (accs) = opval;
5240     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5241   }
5242
5243 #undef OPRND
5244 #undef FLD
5245 }
5246   NEXT (vpc);
5247
5248 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
5249   {
5250     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5251     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5252 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5253 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5254     int UNUSED written = abuf->written;
5255     IADDR UNUSED pc = abuf->addr;
5256     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5257
5258   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5259
5260 #undef OPRND
5261 #undef FLD
5262   }
5263   NEXT (vpc);
5264
5265   CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
5266 {
5267   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5268   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5269 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5270 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5271   int UNUSED written = 0;
5272   IADDR UNUSED pc = abuf->addr;
5273   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5274
5275   {
5276     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
5277     OPRND (accs) = opval;
5278     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5279   }
5280
5281 #undef OPRND
5282 #undef FLD
5283 }
5284   NEXT (vpc);
5285
5286 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
5287   {
5288     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5289     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5290 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5291 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5292     int UNUSED written = abuf->written;
5293     IADDR UNUSED pc = abuf->addr;
5294     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5295
5296   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5297
5298 #undef OPRND
5299 #undef FLD
5300   }
5301   NEXT (vpc);
5302
5303   CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
5304 {
5305   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5306   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5307 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5308 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5309   int UNUSED written = 0;
5310   IADDR UNUSED pc = abuf->addr;
5311   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5312
5313   {
5314     USI opval = * FLD (i_sr);
5315     OPRND (dcr) = opval;
5316     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5317   }
5318
5319 #undef OPRND
5320 #undef FLD
5321 }
5322   NEXT (vpc);
5323
5324 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
5325   {
5326     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5327     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5328 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5329 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5330     int UNUSED written = abuf->written;
5331     IADDR UNUSED pc = abuf->addr;
5332     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5333
5334   SET_H_CR (FLD (f_r1), OPRND (dcr));
5335
5336 #undef OPRND
5337 #undef FLD
5338   }
5339   NEXT (vpc);
5340
5341   CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5342 {
5343   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5344   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5345 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5346 #define OPRND(f) par_exec->operands.sfmt_mv.f
5347   int UNUSED written = 0;
5348   IADDR UNUSED pc = abuf->addr;
5349   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5350
5351   {
5352     SI opval = NEGSI (* FLD (i_sr));
5353     OPRND (dr) = opval;
5354     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5355   }
5356
5357 #undef OPRND
5358 #undef FLD
5359 }
5360   NEXT (vpc);
5361
5362 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5363   {
5364     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5365     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5366 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5367 #define OPRND(f) par_exec->operands.sfmt_mv.f
5368     int UNUSED written = abuf->written;
5369     IADDR UNUSED pc = abuf->addr;
5370     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5371
5372   * FLD (i_dr) = OPRND (dr);
5373
5374 #undef OPRND
5375 #undef FLD
5376   }
5377   NEXT (vpc);
5378
5379   CASE (sem, INSN_PAR_NOP) : /* nop */
5380 {
5381   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5382   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5383 #define FLD(f) abuf->fields.sfmt_empty.f
5384 #define OPRND(f) par_exec->operands.sfmt_nop.f
5385   int UNUSED written = 0;
5386   IADDR UNUSED pc = abuf->addr;
5387   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5388
5389 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5390
5391 #undef OPRND
5392 #undef FLD
5393 }
5394   NEXT (vpc);
5395
5396 CASE (sem, INSN_WRITE_NOP) : /* nop */
5397   {
5398     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5399     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5400 #define FLD(f) abuf->fields.sfmt_empty.f
5401 #define OPRND(f) par_exec->operands.sfmt_nop.f
5402     int UNUSED written = abuf->written;
5403     IADDR UNUSED pc = abuf->addr;
5404     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5405
5406
5407 #undef OPRND
5408 #undef FLD
5409   }
5410   NEXT (vpc);
5411
5412   CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5413 {
5414   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5415   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5416 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5417 #define OPRND(f) par_exec->operands.sfmt_mv.f
5418   int UNUSED written = 0;
5419   IADDR UNUSED pc = abuf->addr;
5420   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5421
5422   {
5423     SI opval = INVSI (* FLD (i_sr));
5424     OPRND (dr) = opval;
5425     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5426   }
5427
5428 #undef OPRND
5429 #undef FLD
5430 }
5431   NEXT (vpc);
5432
5433 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5434   {
5435     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5436     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5437 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5438 #define OPRND(f) par_exec->operands.sfmt_mv.f
5439     int UNUSED written = abuf->written;
5440     IADDR UNUSED pc = abuf->addr;
5441     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5442
5443   * FLD (i_dr) = OPRND (dr);
5444
5445 #undef OPRND
5446 #undef FLD
5447   }
5448   NEXT (vpc);
5449
5450   CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5451 {
5452   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5453   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5454 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5455 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5456   int UNUSED written = 0;
5457   IADDR UNUSED pc = abuf->addr;
5458   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5459
5460 {
5461   DI tmp_tmp1;
5462   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5463   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5464   {
5465     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5466     OPRND (accd) = opval;
5467     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5468   }
5469 }
5470
5471 #undef OPRND
5472 #undef FLD
5473 }
5474   NEXT (vpc);
5475
5476 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5477   {
5478     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5479     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5480 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5481 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5482     int UNUSED written = abuf->written;
5483     IADDR UNUSED pc = abuf->addr;
5484     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5485
5486   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5487
5488 #undef OPRND
5489 #undef FLD
5490   }
5491   NEXT (vpc);
5492
5493   CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5494 {
5495   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5496   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5497 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5498 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5499   int UNUSED written = 0;
5500   IADDR UNUSED pc = abuf->addr;
5501   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5502
5503 {
5504   DI tmp_tmp1;
5505   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5506   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5507   {
5508     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5509     OPRND (accd) = opval;
5510     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5511   }
5512 }
5513
5514 #undef OPRND
5515 #undef FLD
5516 }
5517   NEXT (vpc);
5518
5519 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5520   {
5521     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5522     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5523 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5524 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5525     int UNUSED written = abuf->written;
5526     IADDR UNUSED pc = abuf->addr;
5527     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5528
5529   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5530
5531 #undef OPRND
5532 #undef FLD
5533   }
5534   NEXT (vpc);
5535
5536   CASE (sem, INSN_PAR_RTE) : /* rte */
5537 {
5538   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5539   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5540 #define FLD(f) abuf->fields.sfmt_empty.f
5541 #define OPRND(f) par_exec->operands.sfmt_rte.f
5542   int UNUSED written = 0;
5543   IADDR UNUSED pc = abuf->addr;
5544   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5545
5546 {
5547   {
5548     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5549     OPRND (pc) = opval;
5550     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5551   }
5552   {
5553     USI opval = GET_H_CR (((UINT) 14));
5554     OPRND (h_cr_USI_6) = opval;
5555     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5556   }
5557   {
5558     UQI opval = CPU (h_bpsw);
5559     OPRND (h_psw_UQI) = opval;
5560     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5561   }
5562   {
5563     UQI opval = CPU (h_bbpsw);
5564     OPRND (h_bpsw_UQI) = opval;
5565     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5566   }
5567 }
5568
5569 #undef OPRND
5570 #undef FLD
5571 }
5572   NEXT (vpc);
5573
5574 CASE (sem, INSN_WRITE_RTE) : /* rte */
5575   {
5576     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5577     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5578 #define FLD(f) abuf->fields.sfmt_empty.f
5579 #define OPRND(f) par_exec->operands.sfmt_rte.f
5580     int UNUSED written = abuf->written;
5581     IADDR UNUSED pc = abuf->addr;
5582     SEM_BRANCH_INIT
5583     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5584
5585   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5586   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5587   SET_H_PSW (OPRND (h_psw_UQI));
5588   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5589
5590   SEM_BRANCH_FINI (vpc);
5591 #undef OPRND
5592 #undef FLD
5593   }
5594   NEXT (vpc);
5595
5596   CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5597 {
5598   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5599   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5600 #define FLD(f) abuf->fields.sfmt_add.f
5601 #define OPRND(f) par_exec->operands.sfmt_add.f
5602   int UNUSED written = 0;
5603   IADDR UNUSED pc = abuf->addr;
5604   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5605
5606   {
5607     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5608     OPRND (dr) = opval;
5609     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5610   }
5611
5612 #undef OPRND
5613 #undef FLD
5614 }
5615   NEXT (vpc);
5616
5617 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5618   {
5619     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5620     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5621 #define FLD(f) abuf->fields.sfmt_add.f
5622 #define OPRND(f) par_exec->operands.sfmt_add.f
5623     int UNUSED written = abuf->written;
5624     IADDR UNUSED pc = abuf->addr;
5625     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5626
5627   * FLD (i_dr) = OPRND (dr);
5628
5629 #undef OPRND
5630 #undef FLD
5631   }
5632   NEXT (vpc);
5633
5634   CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5635 {
5636   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5637   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5638 #define FLD(f) abuf->fields.sfmt_slli.f
5639 #define OPRND(f) par_exec->operands.sfmt_slli.f
5640   int UNUSED written = 0;
5641   IADDR UNUSED pc = abuf->addr;
5642   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5643
5644   {
5645     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5646     OPRND (dr) = opval;
5647     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5648   }
5649
5650 #undef OPRND
5651 #undef FLD
5652 }
5653   NEXT (vpc);
5654
5655 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5656   {
5657     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5658     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5659 #define FLD(f) abuf->fields.sfmt_slli.f
5660 #define OPRND(f) par_exec->operands.sfmt_slli.f
5661     int UNUSED written = abuf->written;
5662     IADDR UNUSED pc = abuf->addr;
5663     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5664
5665   * FLD (i_dr) = OPRND (dr);
5666
5667 #undef OPRND
5668 #undef FLD
5669   }
5670   NEXT (vpc);
5671
5672   CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5673 {
5674   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5675   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5676 #define FLD(f) abuf->fields.sfmt_add.f
5677 #define OPRND(f) par_exec->operands.sfmt_add.f
5678   int UNUSED written = 0;
5679   IADDR UNUSED pc = abuf->addr;
5680   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5681
5682   {
5683     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5684     OPRND (dr) = opval;
5685     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5686   }
5687
5688 #undef OPRND
5689 #undef FLD
5690 }
5691   NEXT (vpc);
5692
5693 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5694   {
5695     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5696     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5697 #define FLD(f) abuf->fields.sfmt_add.f
5698 #define OPRND(f) par_exec->operands.sfmt_add.f
5699     int UNUSED written = abuf->written;
5700     IADDR UNUSED pc = abuf->addr;
5701     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5702
5703   * FLD (i_dr) = OPRND (dr);
5704
5705 #undef OPRND
5706 #undef FLD
5707   }
5708   NEXT (vpc);
5709
5710   CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5711 {
5712   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5713   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5714 #define FLD(f) abuf->fields.sfmt_slli.f
5715 #define OPRND(f) par_exec->operands.sfmt_slli.f
5716   int UNUSED written = 0;
5717   IADDR UNUSED pc = abuf->addr;
5718   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5719
5720   {
5721     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5722     OPRND (dr) = opval;
5723     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5724   }
5725
5726 #undef OPRND
5727 #undef FLD
5728 }
5729   NEXT (vpc);
5730
5731 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5732   {
5733     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5734     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5735 #define FLD(f) abuf->fields.sfmt_slli.f
5736 #define OPRND(f) par_exec->operands.sfmt_slli.f
5737     int UNUSED written = abuf->written;
5738     IADDR UNUSED pc = abuf->addr;
5739     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5740
5741   * FLD (i_dr) = OPRND (dr);
5742
5743 #undef OPRND
5744 #undef FLD
5745   }
5746   NEXT (vpc);
5747
5748   CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5749 {
5750   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5751   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5752 #define FLD(f) abuf->fields.sfmt_add.f
5753 #define OPRND(f) par_exec->operands.sfmt_add.f
5754   int UNUSED written = 0;
5755   IADDR UNUSED pc = abuf->addr;
5756   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5757
5758   {
5759     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5760     OPRND (dr) = opval;
5761     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5762   }
5763
5764 #undef OPRND
5765 #undef FLD
5766 }
5767   NEXT (vpc);
5768
5769 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5770   {
5771     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5772     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5773 #define FLD(f) abuf->fields.sfmt_add.f
5774 #define OPRND(f) par_exec->operands.sfmt_add.f
5775     int UNUSED written = abuf->written;
5776     IADDR UNUSED pc = abuf->addr;
5777     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5778
5779   * FLD (i_dr) = OPRND (dr);
5780
5781 #undef OPRND
5782 #undef FLD
5783   }
5784   NEXT (vpc);
5785
5786   CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5787 {
5788   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5789   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5790 #define FLD(f) abuf->fields.sfmt_slli.f
5791 #define OPRND(f) par_exec->operands.sfmt_slli.f
5792   int UNUSED written = 0;
5793   IADDR UNUSED pc = abuf->addr;
5794   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5795
5796   {
5797     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5798     OPRND (dr) = opval;
5799     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5800   }
5801
5802 #undef OPRND
5803 #undef FLD
5804 }
5805   NEXT (vpc);
5806
5807 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5808   {
5809     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5810     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5811 #define FLD(f) abuf->fields.sfmt_slli.f
5812 #define OPRND(f) par_exec->operands.sfmt_slli.f
5813     int UNUSED written = abuf->written;
5814     IADDR UNUSED pc = abuf->addr;
5815     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5816
5817   * FLD (i_dr) = OPRND (dr);
5818
5819 #undef OPRND
5820 #undef FLD
5821   }
5822   NEXT (vpc);
5823
5824   CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5825 {
5826   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5827   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5828 #define FLD(f) abuf->fields.sfmt_st_plus.f
5829 #define OPRND(f) par_exec->operands.sfmt_st.f
5830   int UNUSED written = 0;
5831   IADDR UNUSED pc = abuf->addr;
5832   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5833
5834   {
5835     SI opval = * FLD (i_src1);
5836     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5837     OPRND (h_memory_SI_src2) = opval;
5838     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5839   }
5840
5841 #undef OPRND
5842 #undef FLD
5843 }
5844   NEXT (vpc);
5845
5846 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5847   {
5848     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5849     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5850 #define FLD(f) abuf->fields.sfmt_st_plus.f
5851 #define OPRND(f) par_exec->operands.sfmt_st.f
5852     int UNUSED written = abuf->written;
5853     IADDR UNUSED pc = abuf->addr;
5854     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5855
5856   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5857
5858 #undef OPRND
5859 #undef FLD
5860   }
5861   NEXT (vpc);
5862
5863   CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5864 {
5865   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5866   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5867 #define FLD(f) abuf->fields.sfmt_st_plus.f
5868 #define OPRND(f) par_exec->operands.sfmt_stb.f
5869   int UNUSED written = 0;
5870   IADDR UNUSED pc = abuf->addr;
5871   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5872
5873   {
5874     QI opval = * FLD (i_src1);
5875     OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5876     OPRND (h_memory_QI_src2) = opval;
5877     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5878   }
5879
5880 #undef OPRND
5881 #undef FLD
5882 }
5883   NEXT (vpc);
5884
5885 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5886   {
5887     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5888     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5889 #define FLD(f) abuf->fields.sfmt_st_plus.f
5890 #define OPRND(f) par_exec->operands.sfmt_stb.f
5891     int UNUSED written = abuf->written;
5892     IADDR UNUSED pc = abuf->addr;
5893     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5894
5895   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5896
5897 #undef OPRND
5898 #undef FLD
5899   }
5900   NEXT (vpc);
5901
5902   CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5903 {
5904   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5905   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5906 #define FLD(f) abuf->fields.sfmt_st_plus.f
5907 #define OPRND(f) par_exec->operands.sfmt_sth.f
5908   int UNUSED written = 0;
5909   IADDR UNUSED pc = abuf->addr;
5910   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5911
5912   {
5913     HI opval = * FLD (i_src1);
5914     OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5915     OPRND (h_memory_HI_src2) = opval;
5916     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5917   }
5918
5919 #undef OPRND
5920 #undef FLD
5921 }
5922   NEXT (vpc);
5923
5924 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5925   {
5926     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5927     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5928 #define FLD(f) abuf->fields.sfmt_st_plus.f
5929 #define OPRND(f) par_exec->operands.sfmt_sth.f
5930     int UNUSED written = abuf->written;
5931     IADDR UNUSED pc = abuf->addr;
5932     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5933
5934   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5935
5936 #undef OPRND
5937 #undef FLD
5938   }
5939   NEXT (vpc);
5940
5941   CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5942 {
5943   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5944   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5945 #define FLD(f) abuf->fields.sfmt_st_plus.f
5946 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5947   int UNUSED written = 0;
5948   IADDR UNUSED pc = abuf->addr;
5949   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5950
5951 {
5952   SI tmp_new_src2;
5953   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5954   {
5955     SI opval = * FLD (i_src1);
5956     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5957     OPRND (h_memory_SI_new_src2) = opval;
5958     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5959   }
5960   {
5961     SI opval = tmp_new_src2;
5962     OPRND (src2) = opval;
5963     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5964   }
5965 }
5966
5967 #undef OPRND
5968 #undef FLD
5969 }
5970   NEXT (vpc);
5971
5972 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5973   {
5974     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5975     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5976 #define FLD(f) abuf->fields.sfmt_st_plus.f
5977 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5978     int UNUSED written = abuf->written;
5979     IADDR UNUSED pc = abuf->addr;
5980     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5981
5982   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5983   * FLD (i_src2) = OPRND (src2);
5984
5985 #undef OPRND
5986 #undef FLD
5987   }
5988   NEXT (vpc);
5989
5990   CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */
5991 {
5992   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5993   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5994 #define FLD(f) abuf->fields.sfmt_st_plus.f
5995 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5996   int UNUSED written = 0;
5997   IADDR UNUSED pc = abuf->addr;
5998   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5999
6000 {
6001   SI tmp_new_src2;
6002   tmp_new_src2 = * FLD (i_src2);
6003   {
6004     HI opval = * FLD (i_src1);
6005     OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2;
6006     OPRND (h_memory_HI_new_src2) = opval;
6007     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6008   }
6009   {
6010     SI opval = ADDSI (tmp_new_src2, 2);
6011     OPRND (src2) = opval;
6012     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6013   }
6014 }
6015
6016 #undef OPRND
6017 #undef FLD
6018 }
6019   NEXT (vpc);
6020
6021 CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */
6022   {
6023     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6024     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6025 #define FLD(f) abuf->fields.sfmt_st_plus.f
6026 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
6027     int UNUSED written = abuf->written;
6028     IADDR UNUSED pc = abuf->addr;
6029     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6030
6031   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2));
6032   * FLD (i_src2) = OPRND (src2);
6033
6034 #undef OPRND
6035 #undef FLD
6036   }
6037   NEXT (vpc);
6038
6039   CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */
6040 {
6041   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6042   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6043 #define FLD(f) abuf->fields.sfmt_st_plus.f
6044 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
6045   int UNUSED written = 0;
6046   IADDR UNUSED pc = abuf->addr;
6047   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6048
6049 {
6050   SI tmp_new_src2;
6051   tmp_new_src2 = * FLD (i_src2);
6052   {
6053     QI opval = * FLD (i_src1);
6054     OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2;
6055     OPRND (h_memory_QI_new_src2) = opval;
6056     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6057   }
6058   {
6059     SI opval = ADDSI (tmp_new_src2, 1);
6060     OPRND (src2) = opval;
6061     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6062   }
6063 }
6064
6065 #undef OPRND
6066 #undef FLD
6067 }
6068   NEXT (vpc);
6069
6070 CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */
6071   {
6072     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6073     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6074 #define FLD(f) abuf->fields.sfmt_st_plus.f
6075 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
6076     int UNUSED written = abuf->written;
6077     IADDR UNUSED pc = abuf->addr;
6078     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6079
6080   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2));
6081   * FLD (i_src2) = OPRND (src2);
6082
6083 #undef OPRND
6084 #undef FLD
6085   }
6086   NEXT (vpc);
6087
6088   CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
6089 {
6090   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6091   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6092 #define FLD(f) abuf->fields.sfmt_st_plus.f
6093 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
6094   int UNUSED written = 0;
6095   IADDR UNUSED pc = abuf->addr;
6096   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6097
6098 {
6099   SI tmp_new_src2;
6100   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
6101   {
6102     SI opval = * FLD (i_src1);
6103     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
6104     OPRND (h_memory_SI_new_src2) = opval;
6105     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6106   }
6107   {
6108     SI opval = tmp_new_src2;
6109     OPRND (src2) = opval;
6110     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6111   }
6112 }
6113
6114 #undef OPRND
6115 #undef FLD
6116 }
6117   NEXT (vpc);
6118
6119 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
6120   {
6121     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6122     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6123 #define FLD(f) abuf->fields.sfmt_st_plus.f
6124 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
6125     int UNUSED written = abuf->written;
6126     IADDR UNUSED pc = abuf->addr;
6127     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6128
6129   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
6130   * FLD (i_src2) = OPRND (src2);
6131
6132 #undef OPRND
6133 #undef FLD
6134   }
6135   NEXT (vpc);
6136
6137   CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
6138 {
6139   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6140   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6141 #define FLD(f) abuf->fields.sfmt_add.f
6142 #define OPRND(f) par_exec->operands.sfmt_add.f
6143   int UNUSED written = 0;
6144   IADDR UNUSED pc = abuf->addr;
6145   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6146
6147   {
6148     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
6149     OPRND (dr) = opval;
6150     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6151   }
6152
6153 #undef OPRND
6154 #undef FLD
6155 }
6156   NEXT (vpc);
6157
6158 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
6159   {
6160     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6161     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6162 #define FLD(f) abuf->fields.sfmt_add.f
6163 #define OPRND(f) par_exec->operands.sfmt_add.f
6164     int UNUSED written = abuf->written;
6165     IADDR UNUSED pc = abuf->addr;
6166     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6167
6168   * FLD (i_dr) = OPRND (dr);
6169
6170 #undef OPRND
6171 #undef FLD
6172   }
6173   NEXT (vpc);
6174
6175   CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
6176 {
6177   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6178   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6179 #define FLD(f) abuf->fields.sfmt_add.f
6180 #define OPRND(f) par_exec->operands.sfmt_addv.f
6181   int UNUSED written = 0;
6182   IADDR UNUSED pc = abuf->addr;
6183   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6184
6185 {
6186   SI temp0;BI temp1;
6187   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
6188   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
6189   {
6190     SI opval = temp0;
6191     OPRND (dr) = opval;
6192     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6193   }
6194   {
6195     BI opval = temp1;
6196     OPRND (condbit) = opval;
6197     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6198   }
6199 }
6200
6201 #undef OPRND
6202 #undef FLD
6203 }
6204   NEXT (vpc);
6205
6206 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
6207   {
6208     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6209     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6210 #define FLD(f) abuf->fields.sfmt_add.f
6211 #define OPRND(f) par_exec->operands.sfmt_addv.f
6212     int UNUSED written = abuf->written;
6213     IADDR UNUSED pc = abuf->addr;
6214     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6215
6216   CPU (h_cond) = OPRND (condbit);
6217   * FLD (i_dr) = OPRND (dr);
6218
6219 #undef OPRND
6220 #undef FLD
6221   }
6222   NEXT (vpc);
6223
6224   CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
6225 {
6226   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6227   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6228 #define FLD(f) abuf->fields.sfmt_add.f
6229 #define OPRND(f) par_exec->operands.sfmt_addx.f
6230   int UNUSED written = 0;
6231   IADDR UNUSED pc = abuf->addr;
6232   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6233
6234 {
6235   SI temp0;BI temp1;
6236   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6237   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6238   {
6239     SI opval = temp0;
6240     OPRND (dr) = opval;
6241     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6242   }
6243   {
6244     BI opval = temp1;
6245     OPRND (condbit) = opval;
6246     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6247   }
6248 }
6249
6250 #undef OPRND
6251 #undef FLD
6252 }
6253   NEXT (vpc);
6254
6255 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
6256   {
6257     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6258     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6259 #define FLD(f) abuf->fields.sfmt_add.f
6260 #define OPRND(f) par_exec->operands.sfmt_addx.f
6261     int UNUSED written = abuf->written;
6262     IADDR UNUSED pc = abuf->addr;
6263     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6264
6265   CPU (h_cond) = OPRND (condbit);
6266   * FLD (i_dr) = OPRND (dr);
6267
6268 #undef OPRND
6269 #undef FLD
6270   }
6271   NEXT (vpc);
6272
6273   CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
6274 {
6275   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6276   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6277 #define FLD(f) abuf->fields.sfmt_trap.f
6278 #define OPRND(f) par_exec->operands.sfmt_trap.f
6279   int UNUSED written = 0;
6280   IADDR UNUSED pc = abuf->addr;
6281   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6282
6283 {
6284   {
6285     USI opval = GET_H_CR (((UINT) 6));
6286     OPRND (h_cr_USI_14) = opval;
6287     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6288   }
6289   {
6290     USI opval = ADDSI (pc, 4);
6291     OPRND (h_cr_USI_6) = opval;
6292     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6293   }
6294   {
6295     UQI opval = CPU (h_bpsw);
6296     OPRND (h_bbpsw_UQI) = opval;
6297     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
6298   }
6299   {
6300     UQI opval = GET_H_PSW ();
6301     OPRND (h_bpsw_UQI) = opval;
6302     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
6303   }
6304   {
6305     UQI opval = ANDQI (GET_H_PSW (), 128);
6306     OPRND (h_psw_UQI) = opval;
6307     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
6308   }
6309   {
6310     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
6311     OPRND (pc) = opval;
6312     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6313   }
6314 }
6315
6316 #undef OPRND
6317 #undef FLD
6318 }
6319   NEXT (vpc);
6320
6321 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
6322   {
6323     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6324     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6325 #define FLD(f) abuf->fields.sfmt_trap.f
6326 #define OPRND(f) par_exec->operands.sfmt_trap.f
6327     int UNUSED written = abuf->written;
6328     IADDR UNUSED pc = abuf->addr;
6329     SEM_BRANCH_INIT
6330     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6331
6332   CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
6333   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
6334   SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
6335   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
6336   SET_H_PSW (OPRND (h_psw_UQI));
6337   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
6338
6339   SEM_BRANCH_FINI (vpc);
6340 #undef OPRND
6341 #undef FLD
6342   }
6343   NEXT (vpc);
6344
6345   CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
6346 {
6347   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6348   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6349 #define FLD(f) abuf->fields.sfmt_st_plus.f
6350 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6351   int UNUSED written = 0;
6352   IADDR UNUSED pc = abuf->addr;
6353   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6354
6355 {
6356 if (CPU (h_lock)) {
6357   {
6358     SI opval = * FLD (i_src1);
6359     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
6360     OPRND (h_memory_SI_src2) = opval;
6361     written |= (1 << 4);
6362     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6363   }
6364 }
6365   {
6366     BI opval = 0;
6367     OPRND (h_lock_BI) = opval;
6368     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
6369   }
6370 }
6371
6372   abuf->written = written;
6373 #undef OPRND
6374 #undef FLD
6375 }
6376   NEXT (vpc);
6377
6378 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
6379   {
6380     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6381     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6382 #define FLD(f) abuf->fields.sfmt_st_plus.f
6383 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6384     int UNUSED written = abuf->written;
6385     IADDR UNUSED pc = abuf->addr;
6386     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6387
6388   CPU (h_lock) = OPRND (h_lock_BI);
6389   if (written & (1 << 4))
6390     {
6391       SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
6392     }
6393
6394 #undef OPRND
6395 #undef FLD
6396   }
6397   NEXT (vpc);
6398
6399   CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
6400 {
6401   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6402   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6403 #define FLD(f) abuf->fields.sfmt_st_plus.f
6404 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6405   int UNUSED written = 0;
6406   IADDR UNUSED pc = abuf->addr;
6407   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6408
6409   {
6410     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
6411     OPRND (condbit) = opval;
6412     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6413   }
6414
6415 #undef OPRND
6416 #undef FLD
6417 }
6418   NEXT (vpc);
6419
6420 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
6421   {
6422     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6423     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6424 #define FLD(f) abuf->fields.sfmt_st_plus.f
6425 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6426     int UNUSED written = abuf->written;
6427     IADDR UNUSED pc = abuf->addr;
6428     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6429
6430   CPU (h_cond) = OPRND (condbit);
6431
6432 #undef OPRND
6433 #undef FLD
6434   }
6435   NEXT (vpc);
6436
6437   CASE (sem, INSN_PAR_SADD) : /* sadd */
6438 {
6439   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6440   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6441 #define FLD(f) abuf->fields.sfmt_empty.f
6442 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6443   int UNUSED written = 0;
6444   IADDR UNUSED pc = abuf->addr;
6445   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6446
6447   {
6448     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6449     OPRND (h_accums_DI_0) = opval;
6450     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6451   }
6452
6453 #undef OPRND
6454 #undef FLD
6455 }
6456   NEXT (vpc);
6457
6458 CASE (sem, INSN_WRITE_SADD) : /* sadd */
6459   {
6460     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6461     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6462 #define FLD(f) abuf->fields.sfmt_empty.f
6463 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6464     int UNUSED written = abuf->written;
6465     IADDR UNUSED pc = abuf->addr;
6466     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6467
6468   SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6469
6470 #undef OPRND
6471 #undef FLD
6472   }
6473   NEXT (vpc);
6474
6475   CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6476 {
6477   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6478   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6479 #define FLD(f) abuf->fields.sfmt_st_plus.f
6480 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6481   int UNUSED written = 0;
6482   IADDR UNUSED pc = abuf->addr;
6483   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6484
6485   {
6486     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6487     OPRND (h_accums_DI_1) = opval;
6488     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6489   }
6490
6491 #undef OPRND
6492 #undef FLD
6493 }
6494   NEXT (vpc);
6495
6496 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6497   {
6498     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6499     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6500 #define FLD(f) abuf->fields.sfmt_st_plus.f
6501 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6502     int UNUSED written = abuf->written;
6503     IADDR UNUSED pc = abuf->addr;
6504     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6505
6506   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6507
6508 #undef OPRND
6509 #undef FLD
6510   }
6511   NEXT (vpc);
6512
6513   CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6514 {
6515   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6516   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6517 #define FLD(f) abuf->fields.sfmt_st_plus.f
6518 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6519   int UNUSED written = 0;
6520   IADDR UNUSED pc = abuf->addr;
6521   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6522
6523   {
6524     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6525     OPRND (accum) = opval;
6526     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6527   }
6528
6529 #undef OPRND
6530 #undef FLD
6531 }
6532   NEXT (vpc);
6533
6534 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6535   {
6536     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6537     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6538 #define FLD(f) abuf->fields.sfmt_st_plus.f
6539 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6540     int UNUSED written = abuf->written;
6541     IADDR UNUSED pc = abuf->addr;
6542     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6543
6544   SET_H_ACCUM (OPRND (accum));
6545
6546 #undef OPRND
6547 #undef FLD
6548   }
6549   NEXT (vpc);
6550
6551   CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6552 {
6553   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6554   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6555 #define FLD(f) abuf->fields.sfmt_st_plus.f
6556 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6557   int UNUSED written = 0;
6558   IADDR UNUSED pc = abuf->addr;
6559   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6560
6561   {
6562     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6563     OPRND (h_accums_DI_1) = opval;
6564     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6565   }
6566
6567 #undef OPRND
6568 #undef FLD
6569 }
6570   NEXT (vpc);
6571
6572 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6573   {
6574     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6575     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6576 #define FLD(f) abuf->fields.sfmt_st_plus.f
6577 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6578     int UNUSED written = abuf->written;
6579     IADDR UNUSED pc = abuf->addr;
6580     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6581
6582   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6583
6584 #undef OPRND
6585 #undef FLD
6586   }
6587   NEXT (vpc);
6588
6589   CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6590 {
6591   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6592   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6593 #define FLD(f) abuf->fields.sfmt_st_plus.f
6594 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6595   int UNUSED written = 0;
6596   IADDR UNUSED pc = abuf->addr;
6597   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6598
6599   {
6600     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6601     OPRND (h_accums_DI_1) = opval;
6602     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6603   }
6604
6605 #undef OPRND
6606 #undef FLD
6607 }
6608   NEXT (vpc);
6609
6610 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6611   {
6612     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6613     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6614 #define FLD(f) abuf->fields.sfmt_st_plus.f
6615 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6616     int UNUSED written = abuf->written;
6617     IADDR UNUSED pc = abuf->addr;
6618     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6619
6620   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6621
6622 #undef OPRND
6623 #undef FLD
6624   }
6625   NEXT (vpc);
6626
6627   CASE (sem, INSN_PAR_SC) : /* sc */
6628 {
6629   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6630   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6631 #define FLD(f) abuf->fields.sfmt_empty.f
6632 #define OPRND(f) par_exec->operands.sfmt_sc.f
6633   int UNUSED written = 0;
6634   IADDR UNUSED pc = abuf->addr;
6635   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6636
6637 if (ZEXTBISI (CPU (h_cond)))
6638   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6639
6640 #undef OPRND
6641 #undef FLD
6642 }
6643   NEXT (vpc);
6644
6645 CASE (sem, INSN_WRITE_SC) : /* sc */
6646   {
6647     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6648     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6649 #define FLD(f) abuf->fields.sfmt_empty.f
6650 #define OPRND(f) par_exec->operands.sfmt_sc.f
6651     int UNUSED written = abuf->written;
6652     IADDR UNUSED pc = abuf->addr;
6653     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6654
6655
6656 #undef OPRND
6657 #undef FLD
6658   }
6659   NEXT (vpc);
6660
6661   CASE (sem, INSN_PAR_SNC) : /* snc */
6662 {
6663   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6664   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6665 #define FLD(f) abuf->fields.sfmt_empty.f
6666 #define OPRND(f) par_exec->operands.sfmt_sc.f
6667   int UNUSED written = 0;
6668   IADDR UNUSED pc = abuf->addr;
6669   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6670
6671 if (ZEXTBISI (NOTBI (CPU (h_cond))))
6672   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6673
6674 #undef OPRND
6675 #undef FLD
6676 }
6677   NEXT (vpc);
6678
6679 CASE (sem, INSN_WRITE_SNC) : /* snc */
6680   {
6681     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6682     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6683 #define FLD(f) abuf->fields.sfmt_empty.f
6684 #define OPRND(f) par_exec->operands.sfmt_sc.f
6685     int UNUSED written = abuf->written;
6686     IADDR UNUSED pc = abuf->addr;
6687     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6688
6689
6690 #undef OPRND
6691 #undef FLD
6692   }
6693   NEXT (vpc);
6694
6695   CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */
6696 {
6697   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6698   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6699 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6700 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6701   int UNUSED written = 0;
6702   IADDR UNUSED pc = abuf->addr;
6703   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6704
6705   {
6706     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
6707     OPRND (h_cr_USI_0) = opval;
6708     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6709   }
6710
6711 #undef OPRND
6712 #undef FLD
6713 }
6714   NEXT (vpc);
6715
6716 CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */
6717   {
6718     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6719     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6720 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6721 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6722     int UNUSED written = abuf->written;
6723     IADDR UNUSED pc = abuf->addr;
6724     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6725
6726   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6727
6728 #undef OPRND
6729 #undef FLD
6730   }
6731   NEXT (vpc);
6732
6733   CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */
6734 {
6735   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6736   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6737 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6738 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6739   int UNUSED written = 0;
6740   IADDR UNUSED pc = abuf->addr;
6741   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6742
6743   {
6744     USI opval = FLD (f_uimm8);
6745     OPRND (h_cr_USI_0) = opval;
6746     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6747   }
6748
6749 #undef OPRND
6750 #undef FLD
6751 }
6752   NEXT (vpc);
6753
6754 CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */
6755   {
6756     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6757     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6758 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6759 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6760     int UNUSED written = abuf->written;
6761     IADDR UNUSED pc = abuf->addr;
6762     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6763
6764   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6765
6766 #undef OPRND
6767 #undef FLD
6768   }
6769   NEXT (vpc);
6770
6771   CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */
6772 {
6773   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6774   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6775 #define FLD(f) abuf->fields.sfmt_bset.f
6776 #define OPRND(f) par_exec->operands.sfmt_btst.f
6777   int UNUSED written = 0;
6778   IADDR UNUSED pc = abuf->addr;
6779   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6780
6781   {
6782     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
6783     OPRND (condbit) = opval;
6784     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6785   }
6786
6787 #undef OPRND
6788 #undef FLD
6789 }
6790   NEXT (vpc);
6791
6792 CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */
6793   {
6794     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6795     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6796 #define FLD(f) abuf->fields.sfmt_bset.f
6797 #define OPRND(f) par_exec->operands.sfmt_btst.f
6798     int UNUSED written = abuf->written;
6799     IADDR UNUSED pc = abuf->addr;
6800     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6801
6802   CPU (h_cond) = OPRND (condbit);
6803
6804 #undef OPRND
6805 #undef FLD
6806   }
6807   NEXT (vpc);
6808
6809
6810     }
6811   ENDSWITCH (sem) /* End of semantic switch.  */
6812
6813   /* At this point `vpc' contains the next insn to execute.  */
6814 }
6815
6816 #undef DEFINE_SWITCH
6817 #endif /* DEFINE_SWITCH */